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-rw-r--r--tools/perf/perf.c11
-rw-r--r--tools/perf/util/sort.c4
-rw-r--r--tools/perf/util/sort.h4
-rw-r--r--tools/perf/util/util.c21
-rw-r--r--tools/perf/util/util.h2
5 files changed, 25 insertions, 17 deletions
diff --git a/tools/perf/perf.c b/tools/perf/perf.c
index d5a0878de816..cefd8f74630c 100644
--- a/tools/perf/perf.c
+++ b/tools/perf/perf.c
@@ -421,16 +421,6 @@ void pthread__unblock_sigwinch(void)
421 pthread_sigmask(SIG_UNBLOCK, &set, NULL); 421 pthread_sigmask(SIG_UNBLOCK, &set, NULL);
422} 422}
423 423
424#ifdef _SC_LEVEL1_DCACHE_LINESIZE
425#define cache_line_size(cacheline_sizep) *cacheline_sizep = sysconf(_SC_LEVEL1_DCACHE_LINESIZE)
426#else
427static void cache_line_size(int *cacheline_sizep)
428{
429 if (sysfs__read_int("devices/system/cpu/cpu0/cache/index0/coherency_line_size", cacheline_sizep))
430 pr_debug("cannot determine cache line size");
431}
432#endif
433
434int main(int argc, const char **argv) 424int main(int argc, const char **argv)
435{ 425{
436 int err; 426 int err;
@@ -444,7 +434,6 @@ int main(int argc, const char **argv)
444 434
445 /* The page_size is placed in util object. */ 435 /* The page_size is placed in util object. */
446 page_size = sysconf(_SC_PAGE_SIZE); 436 page_size = sysconf(_SC_PAGE_SIZE);
447 cache_line_size(&cacheline_size);
448 437
449 if (sysctl__read_int("kernel/perf_event_max_stack", &value) == 0) 438 if (sysctl__read_int("kernel/perf_event_max_stack", &value) == 0)
450 sysctl_perf_event_max_stack = value; 439 sysctl_perf_event_max_stack = value;
diff --git a/tools/perf/util/sort.c b/tools/perf/util/sort.c
index e65903a695a6..4058ade352a5 100644
--- a/tools/perf/util/sort.c
+++ b/tools/perf/util/sort.c
@@ -2582,7 +2582,7 @@ int sort_dimension__add(struct perf_hpp_list *list, const char *tok,
2582 if (sort__mode != SORT_MODE__MEMORY) 2582 if (sort__mode != SORT_MODE__MEMORY)
2583 return -EINVAL; 2583 return -EINVAL;
2584 2584
2585 if (sd->entry == &sort_mem_dcacheline && cacheline_size == 0) 2585 if (sd->entry == &sort_mem_dcacheline && cacheline_size() == 0)
2586 return -EINVAL; 2586 return -EINVAL;
2587 2587
2588 if (sd->entry == &sort_mem_daddr_sym) 2588 if (sd->entry == &sort_mem_daddr_sym)
@@ -2628,7 +2628,7 @@ static int setup_sort_list(struct perf_hpp_list *list, char *str,
2628 if (*tok) { 2628 if (*tok) {
2629 ret = sort_dimension__add(list, tok, evlist, level); 2629 ret = sort_dimension__add(list, tok, evlist, level);
2630 if (ret == -EINVAL) { 2630 if (ret == -EINVAL) {
2631 if (!cacheline_size && !strncasecmp(tok, "dcacheline", strlen(tok))) 2631 if (!cacheline_size() && !strncasecmp(tok, "dcacheline", strlen(tok)))
2632 pr_err("The \"dcacheline\" --sort key needs to know the cacheline size and it couldn't be determined on this system"); 2632 pr_err("The \"dcacheline\" --sort key needs to know the cacheline size and it couldn't be determined on this system");
2633 else 2633 else
2634 pr_err("Invalid --sort key: `%s'", tok); 2634 pr_err("Invalid --sort key: `%s'", tok);
diff --git a/tools/perf/util/sort.h b/tools/perf/util/sort.h
index 035b62e2c60b..9e6896293bbd 100644
--- a/tools/perf/util/sort.h
+++ b/tools/perf/util/sort.h
@@ -186,13 +186,13 @@ static inline float hist_entry__get_percent_limit(struct hist_entry *he)
186static inline u64 cl_address(u64 address) 186static inline u64 cl_address(u64 address)
187{ 187{
188 /* return the cacheline of the address */ 188 /* return the cacheline of the address */
189 return (address & ~(cacheline_size - 1)); 189 return (address & ~(cacheline_size() - 1));
190} 190}
191 191
192static inline u64 cl_offset(u64 address) 192static inline u64 cl_offset(u64 address)
193{ 193{
194 /* return the cacheline of the address */ 194 /* return the cacheline of the address */
195 return (address & (cacheline_size - 1)); 195 return (address & (cacheline_size() - 1));
196} 196}
197 197
198enum sort_mode { 198enum sort_mode {
diff --git a/tools/perf/util/util.c b/tools/perf/util/util.c
index 1019bbc5dbd8..99ab52165680 100644
--- a/tools/perf/util/util.c
+++ b/tools/perf/util/util.c
@@ -38,7 +38,26 @@ void perf_set_multithreaded(void)
38} 38}
39 39
40unsigned int page_size; 40unsigned int page_size;
41int cacheline_size; 41
42#ifdef _SC_LEVEL1_DCACHE_LINESIZE
43#define cache_line_size(cacheline_sizep) *cacheline_sizep = sysconf(_SC_LEVEL1_DCACHE_LINESIZE)
44#else
45static void cache_line_size(int *cacheline_sizep)
46{
47 if (sysfs__read_int("devices/system/cpu/cpu0/cache/index0/coherency_line_size", cacheline_sizep))
48 pr_debug("cannot determine cache line size");
49}
50#endif
51
52int cacheline_size(void)
53{
54 static int size;
55
56 if (!size)
57 cache_line_size(&size);
58
59 return size;
60}
42 61
43int sysctl_perf_event_max_stack = PERF_MAX_STACK_DEPTH; 62int sysctl_perf_event_max_stack = PERF_MAX_STACK_DEPTH;
44int sysctl_perf_event_max_contexts_per_stack = PERF_MAX_CONTEXTS_PER_STACK; 63int sysctl_perf_event_max_contexts_per_stack = PERF_MAX_CONTEXTS_PER_STACK;
diff --git a/tools/perf/util/util.h b/tools/perf/util/util.h
index c9626c206208..74d21dfe0d29 100644
--- a/tools/perf/util/util.h
+++ b/tools/perf/util/util.h
@@ -43,7 +43,7 @@ size_t hex_width(u64 v);
43int hex2u64(const char *ptr, u64 *val); 43int hex2u64(const char *ptr, u64 *val);
44 44
45extern unsigned int page_size; 45extern unsigned int page_size;
46extern int cacheline_size; 46int __pure cacheline_size(void);
47 47
48int fetch_kernel_version(unsigned int *puint, 48int fetch_kernel_version(unsigned int *puint,
49 char *str, size_t str_sz); 49 char *str, size_t str_sz);