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-rw-r--r--arch/mips/include/asm/uasm.h1
-rw-r--r--arch/mips/include/uapi/asm/inst.h1
-rw-r--r--arch/mips/mm/uasm-micromips.c1
-rw-r--r--arch/mips/mm/uasm-mips.c1
-rw-r--r--arch/mips/mm/uasm.c9
-rw-r--r--arch/mips/net/ebpf_jit.c4
6 files changed, 13 insertions, 4 deletions
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index 59dae37f6b8d..b1990dd75f27 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -157,6 +157,7 @@ Ip_u2u1s3(_slti);
157Ip_u2u1s3(_sltiu); 157Ip_u2u1s3(_sltiu);
158Ip_u3u1u2(_sltu); 158Ip_u3u1u2(_sltu);
159Ip_u2u1u3(_sra); 159Ip_u2u1u3(_sra);
160Ip_u3u2u1(_srav);
160Ip_u2u1u3(_srl); 161Ip_u2u1u3(_srl);
161Ip_u3u2u1(_srlv); 162Ip_u3u2u1(_srlv);
162Ip_u3u1u2(_subu); 163Ip_u3u1u2(_subu);
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index 273ef58f4d43..40fbb5dd66df 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -371,6 +371,7 @@ enum mm_32a_minor_op {
371 mm_srl32_op = 0x040, 371 mm_srl32_op = 0x040,
372 mm_srlv32_op = 0x050, 372 mm_srlv32_op = 0x050,
373 mm_sra_op = 0x080, 373 mm_sra_op = 0x080,
374 mm_srav_op = 0x090,
374 mm_rotr_op = 0x0c0, 375 mm_rotr_op = 0x0c0,
375 mm_lwxs_op = 0x118, 376 mm_lwxs_op = 0x118,
376 mm_addu32_op = 0x150, 377 mm_addu32_op = 0x150,
diff --git a/arch/mips/mm/uasm-micromips.c b/arch/mips/mm/uasm-micromips.c
index 24e5b0d06899..75ef90486fe6 100644
--- a/arch/mips/mm/uasm-micromips.c
+++ b/arch/mips/mm/uasm-micromips.c
@@ -104,6 +104,7 @@ static const struct insn insn_table_MM[insn_invalid] = {
104 [insn_sltiu] = {M(mm_sltiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM}, 104 [insn_sltiu] = {M(mm_sltiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM},
105 [insn_sltu] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_sltu_op), RT | RS | RD}, 105 [insn_sltu] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_sltu_op), RT | RS | RD},
106 [insn_sra] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_sra_op), RT | RS | RD}, 106 [insn_sra] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_sra_op), RT | RS | RD},
107 [insn_srav] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_srav_op), RT | RS | RD},
107 [insn_srl] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_srl32_op), RT | RS | RD}, 108 [insn_srl] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_srl32_op), RT | RS | RD},
108 [insn_srlv] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_srlv32_op), RT | RS | RD}, 109 [insn_srlv] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_srlv32_op), RT | RS | RD},
109 [insn_rotr] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_rotr_op), RT | RS | RD}, 110 [insn_rotr] = {M(mm_pool32a_op, 0, 0, 0, 0, mm_rotr_op), RT | RS | RD},
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c
index 60ceb93c71a0..6abe40fc413d 100644
--- a/arch/mips/mm/uasm-mips.c
+++ b/arch/mips/mm/uasm-mips.c
@@ -171,6 +171,7 @@ static const struct insn insn_table[insn_invalid] = {
171 [insn_sltiu] = {M(sltiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM}, 171 [insn_sltiu] = {M(sltiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
172 [insn_sltu] = {M(spec_op, 0, 0, 0, 0, sltu_op), RS | RT | RD}, 172 [insn_sltu] = {M(spec_op, 0, 0, 0, 0, sltu_op), RS | RT | RD},
173 [insn_sra] = {M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE}, 173 [insn_sra] = {M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE},
174 [insn_srav] = {M(spec_op, 0, 0, 0, 0, srav_op), RS | RT | RD},
174 [insn_srl] = {M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE}, 175 [insn_srl] = {M(spec_op, 0, 0, 0, 0, srl_op), RT | RD | RE},
175 [insn_srlv] = {M(spec_op, 0, 0, 0, 0, srlv_op), RS | RT | RD}, 176 [insn_srlv] = {M(spec_op, 0, 0, 0, 0, srlv_op), RS | RT | RD},
176 [insn_subu] = {M(spec_op, 0, 0, 0, 0, subu_op), RS | RT | RD}, 177 [insn_subu] = {M(spec_op, 0, 0, 0, 0, subu_op), RS | RT | RD},
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 57570c0649b4..45b6264ff308 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -61,10 +61,10 @@ enum opcode {
61 insn_mthc0, insn_mthi, insn_mtlo, insn_mul, insn_multu, insn_nor, 61 insn_mthc0, insn_mthi, insn_mtlo, insn_mul, insn_multu, insn_nor,
62 insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sb, 62 insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sb,
63 insn_sc, insn_scd, insn_sd, insn_sh, insn_sll, insn_sllv, 63 insn_sc, insn_scd, insn_sd, insn_sh, insn_sll, insn_sllv,
64 insn_slt, insn_slti, insn_sltiu, insn_sltu, insn_sra, insn_srl, 64 insn_slt, insn_slti, insn_sltiu, insn_sltu, insn_sra, insn_srav,
65 insn_srlv, insn_subu, insn_sw, insn_sync, insn_syscall, insn_tlbp, 65 insn_srl, insn_srlv, insn_subu, insn_sw, insn_sync, insn_syscall,
66 insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait, insn_wsbh, insn_xor, 66 insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait, insn_wsbh,
67 insn_xori, insn_yield, 67 insn_xor, insn_xori, insn_yield,
68 insn_invalid /* insn_invalid must be last */ 68 insn_invalid /* insn_invalid must be last */
69}; 69};
70 70
@@ -353,6 +353,7 @@ I_u2u1s3(_slti)
353I_u2u1s3(_sltiu) 353I_u2u1s3(_sltiu)
354I_u3u1u2(_sltu) 354I_u3u1u2(_sltu)
355I_u2u1u3(_sra) 355I_u2u1u3(_sra)
356I_u3u2u1(_srav)
356I_u2u1u3(_srl) 357I_u2u1u3(_srl)
357I_u3u2u1(_srlv) 358I_u3u2u1(_srlv)
358I_u2u1u3(_rotr) 359I_u2u1u3(_rotr)
diff --git a/arch/mips/net/ebpf_jit.c b/arch/mips/net/ebpf_jit.c
index aeb7b1b0f202..b16710a8a9e7 100644
--- a/arch/mips/net/ebpf_jit.c
+++ b/arch/mips/net/ebpf_jit.c
@@ -854,6 +854,7 @@ static int build_one_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
854 case BPF_ALU | BPF_MOD | BPF_X: /* ALU_REG */ 854 case BPF_ALU | BPF_MOD | BPF_X: /* ALU_REG */
855 case BPF_ALU | BPF_LSH | BPF_X: /* ALU_REG */ 855 case BPF_ALU | BPF_LSH | BPF_X: /* ALU_REG */
856 case BPF_ALU | BPF_RSH | BPF_X: /* ALU_REG */ 856 case BPF_ALU | BPF_RSH | BPF_X: /* ALU_REG */
857 case BPF_ALU | BPF_ARSH | BPF_X: /* ALU_REG */
857 src = ebpf_to_mips_reg(ctx, insn, src_reg_no_fp); 858 src = ebpf_to_mips_reg(ctx, insn, src_reg_no_fp);
858 dst = ebpf_to_mips_reg(ctx, insn, dst_reg); 859 dst = ebpf_to_mips_reg(ctx, insn, dst_reg);
859 if (src < 0 || dst < 0) 860 if (src < 0 || dst < 0)
@@ -913,6 +914,9 @@ static int build_one_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
913 case BPF_RSH: 914 case BPF_RSH:
914 emit_instr(ctx, srlv, dst, dst, src); 915 emit_instr(ctx, srlv, dst, dst, src);
915 break; 916 break;
917 case BPF_ARSH:
918 emit_instr(ctx, srav, dst, dst, src);
919 break;
916 default: 920 default:
917 pr_err("ALU_REG NOT HANDLED\n"); 921 pr_err("ALU_REG NOT HANDLED\n");
918 return -EINVAL; 922 return -EINVAL;