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authorKim Phillips <kim.phillips@amd.com>2019-09-19 16:43:04 -0400
committerArnaldo Carvalho de Melo <acme@redhat.com>2019-09-25 08:51:42 -0400
commit93125562ce385fc0322e010003767d656677bdef (patch)
tree76c7d831bdff36fe74bc73a7e897ca3c9e4e2786 /tools
parent0c03d3aa255b5d3a7b64051a79f6e9f487194a9f (diff)
perf vendor events: Minor fixes to the README
Some grammatical fixes, and updates to some path references that have since changed. Signed-off-by: Kim Phillips <kim.phillips@amd.com> Reviewed-by: Andi Kleen <ak@linux.intel.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Borislav Petkov <bp@suse.de> Cc: Janakarajan Natarajan <janakarajan.natarajan@amd.com> Cc: Jin Yao <yao.jin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Kan Liang <kan.liang@linux.intel.com> Cc: Luke Mujica <lukemujica@google.com> Cc: Martin Liška <mliska@suse.cz> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lore.kernel.org/lkml/20190919204306.12598-3-kim.phillips@amd.com Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools')
-rw-r--r--tools/perf/pmu-events/README22
1 files changed, 11 insertions, 11 deletions
diff --git a/tools/perf/pmu-events/README b/tools/perf/pmu-events/README
index e62b09b6a844..de7efa2cebd1 100644
--- a/tools/perf/pmu-events/README
+++ b/tools/perf/pmu-events/README
@@ -30,9 +30,9 @@ the topic. Eg: "Floating-point.json".
30All the topic JSON files for a CPU model/family should be in a separate 30All the topic JSON files for a CPU model/family should be in a separate
31sub directory. Thus for the Silvermont X86 CPU: 31sub directory. Thus for the Silvermont X86 CPU:
32 32
33 $ ls tools/perf/pmu-events/arch/x86/Silvermont_core 33 $ ls tools/perf/pmu-events/arch/x86/silvermont
34 Cache.json Memory.json Virtual-Memory.json 34 cache.json memory.json virtual-memory.json
35 Frontend.json Pipeline.json 35 frontend.json pipeline.json
36 36
37The JSONs folder for a CPU model/family may be placed in the root arch 37The JSONs folder for a CPU model/family may be placed in the root arch
38folder, or may be placed in a vendor sub-folder under the arch folder 38folder, or may be placed in a vendor sub-folder under the arch folder
@@ -94,7 +94,7 @@ users to specify events by their name:
94 94
95where 'pm_1plus_ppc_cmpl' is a Power8 PMU event. 95where 'pm_1plus_ppc_cmpl' is a Power8 PMU event.
96 96
97However some errors in processing may cause the perf build to fail. 97However some errors in processing may cause the alias build to fail.
98 98
99Mapfile format 99Mapfile format
100=============== 100===============
@@ -119,7 +119,7 @@ where:
119 119
120 Header line 120 Header line
121 The header line is the first line in the file, which is 121 The header line is the first line in the file, which is
122 always _IGNORED_. It can empty. 122 always _IGNORED_. It can be empty.
123 123
124 CPUID: 124 CPUID:
125 CPUID is an arch-specific char string, that can be used 125 CPUID is an arch-specific char string, that can be used
@@ -138,15 +138,15 @@ where:
138 files, relative to the directory containing the mapfile.csv 138 files, relative to the directory containing the mapfile.csv
139 139
140 Type: 140 Type:
141 indicates whether the events or "core" or "uncore" events. 141 indicates whether the events are "core" or "uncore" events.
142 142
143 143
144 Eg: 144 Eg:
145 145
146 $ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv 146 $ grep silvermont tools/perf/pmu-events/arch/x86/mapfile.csv
147 GenuineIntel-6-37,V13,Silvermont_core,core 147 GenuineIntel-6-37,v13,silvermont,core
148 GenuineIntel-6-4D,V13,Silvermont_core,core 148 GenuineIntel-6-4D,v13,silvermont,core
149 GenuineIntel-6-4C,V13,Silvermont_core,core 149 GenuineIntel-6-4C,v13,silvermont,core
150 150
151 i.e the three CPU models use the JSON files (i.e PMU events) listed 151 i.e the three CPU models use the JSON files (i.e PMU events) listed
152 in the directory 'tools/perf/pmu-events/arch/x86/Silvermont_core'. 152 in the directory 'tools/perf/pmu-events/arch/x86/silvermont'.