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authorMaxime Ripard <maxime.ripard@bootlin.com>2019-08-19 15:25:20 -0400
committerMark Brown <broonie@kernel.org>2019-08-20 13:32:37 -0400
commitdd657eae8164f7e4bafe8b875031a7c6c50646a9 (patch)
tree6a483d218d499516039fce7528df623d7745ddcc /sound
parent515fcfbc773632e160f4b94e8df8d278a8d704f7 (diff)
ASoC: sun4i-i2s: Fix the LRCK polarity
The LRCK polarity "normal" polarity in the I2S/TDM specs and in the Allwinner datasheet are not the same. In the case where the i2s controller is being used as the LRCK master, it's pretty clear when looked at under a scope. Let's fix this, and add a comment to clear up as much the confusion as possible. Fixes: 7d2993811a1e ("ASoC: sun4i-i2s: Add support for H3") Fixes: 21faaea1343f ("ASoC: sun4i-i2s: Add support for A83T") Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://lore.kernel.org/r/e03fb6b2a916223070b9f18405b0ef117a452ff4.1566242458.git-series.maxime.ripard@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/sunxi/sun4i-i2s.c18
1 files changed, 12 insertions, 6 deletions
diff --git a/sound/soc/sunxi/sun4i-i2s.c b/sound/soc/sunxi/sun4i-i2s.c
index e3eadfe38aaf..29b5eacd3abe 100644
--- a/sound/soc/sunxi/sun4i-i2s.c
+++ b/sound/soc/sunxi/sun4i-i2s.c
@@ -570,23 +570,29 @@ static int sun8i_i2s_set_soc_fmt(const struct sun4i_i2s *i2s,
570 u32 mode, val; 570 u32 mode, val;
571 u8 offset; 571 u8 offset;
572 572
573 /* DAI clock polarity */ 573 /*
574 * DAI clock polarity
575 *
576 * The setup for LRCK contradicts the datasheet, but under a
577 * scope it's clear that the LRCK polarity is reversed
578 * compared to the expected polarity on the bus.
579 */
574 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 580 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
575 case SND_SOC_DAIFMT_IB_IF: 581 case SND_SOC_DAIFMT_IB_IF:
576 /* Invert both clocks */ 582 /* Invert both clocks */
577 val = SUN8I_I2S_FMT0_BCLK_POLARITY_INVERTED | 583 val = SUN8I_I2S_FMT0_BCLK_POLARITY_INVERTED;
578 SUN8I_I2S_FMT0_LRCLK_POLARITY_INVERTED;
579 break; 584 break;
580 case SND_SOC_DAIFMT_IB_NF: 585 case SND_SOC_DAIFMT_IB_NF:
581 /* Invert bit clock */ 586 /* Invert bit clock */
582 val = SUN8I_I2S_FMT0_BCLK_POLARITY_INVERTED; 587 val = SUN8I_I2S_FMT0_BCLK_POLARITY_INVERTED |
588 SUN8I_I2S_FMT0_LRCLK_POLARITY_INVERTED;
583 break; 589 break;
584 case SND_SOC_DAIFMT_NB_IF: 590 case SND_SOC_DAIFMT_NB_IF:
585 /* Invert frame clock */ 591 /* Invert frame clock */
586 val = SUN8I_I2S_FMT0_LRCLK_POLARITY_INVERTED; 592 val = 0;
587 break; 593 break;
588 case SND_SOC_DAIFMT_NB_NF: 594 case SND_SOC_DAIFMT_NB_NF:
589 val = 0; 595 val = SUN8I_I2S_FMT0_LRCLK_POLARITY_INVERTED;
590 break; 596 break;
591 default: 597 default:
592 return -EINVAL; 598 return -EINVAL;