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authorLinus Torvalds <torvalds@linux-foundation.org>2017-11-26 17:11:54 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2017-11-26 17:11:54 -0500
commit02fc87b117a9b9ec325089d098fce86ed11966bd (patch)
tree537176c1c32b25c781bf8974af854a4ee4dbc77a /include/linux/stackprotector.h
parent6830c8db58c2616d8ba2bf45e7d98dca5f69b07f (diff)
parent12a78d43de767eaf8fb272facb7a7b6f2dc6a9df (diff)
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull misc x86 fixes from Ingo Molnar: - topology enumeration fixes - KASAN fix - two entry fixes (not yet the big series related to KASLR) - remove obsolete code - instruction decoder fix - better /dev/mem sanity checks, hopefully working better this time - pkeys fixes - two ACPI fixes - 5-level paging related fixes - UMIP fixes that should make application visible faults more debuggable - boot fix for weird virtualization environment * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (24 commits) x86/decoder: Add new TEST instruction pattern x86/PCI: Remove unused HyperTransport interrupt support x86/umip: Fix insn_get_code_seg_params()'s return value x86/boot/KASLR: Remove unused variable x86/entry/64: Add missing irqflags tracing to native_load_gs_index() x86/mm/kasan: Don't use vmemmap_populate() to initialize shadow x86/entry/64: Fix entry_SYSCALL_64_after_hwframe() IRQ tracing x86/pkeys/selftests: Fix protection keys write() warning x86/pkeys/selftests: Rename 'si_pkey' to 'siginfo_pkey' x86/mpx/selftests: Fix up weird arrays x86/pkeys: Update documentation about availability x86/umip: Print a warning into the syslog if UMIP-protected instructions are used x86/smpboot: Fix __max_logical_packages estimate x86/topology: Avoid wasting 128k for package id array perf/x86/intel/uncore: Cache logical pkg id in uncore driver x86/acpi: Reduce code duplication in mp_override_legacy_irq() x86/acpi: Handle SCI interrupts above legacy space gracefully x86/boot: Fix boot failure when SMP MP-table is based at 0 x86/mm: Limit mmap() of /dev/mem to valid physical addresses x86/selftests: Add test for mapping placement for 5-level paging ...
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0500 DMAEngine: Define interleaved transfer request api' href='/cgit/cgit.cgi/litmus-rt-tegra.git/commit/Documentation/dmaengine.txt?id=b14dab792dee3245b628e046d80a7fad5573fea6'>b14dab792de
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			DMA Engine API Guide
			====================

		 Vinod Koul <vinod dot koul at intel.com>

NOTE: For DMA Engine usage in async_tx please see:
	Documentation/crypto/async-tx-api.txt


Below is a guide to device driver writers on how to use the Slave-DMA API of the
DMA Engine. This is applicable only for slave DMA usage only.

The slave DMA usage consists of following steps:
1. Allocate a DMA slave channel
2. Set slave and controller specific parameters
3. Get a descriptor for transaction
4. Submit the transaction
5. Issue pending requests and wait for callback notification

1. Allocate a DMA slave channel

   Channel allocation is slightly different in the slave DMA context,
   client drivers typically need a channel from a particular DMA
   controller only and even in some cases a specific channel is desired.
   To request a channel dma_request_channel() API is used.

   Interface:
	struct dma_chan *dma_request_channel(dma_cap_mask_t mask,
			dma_filter_fn filter_fn,
			void *filter_param);
   where dma_filter_fn is defined as:
	typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param);

   The 'filter_fn' parameter is optional, but highly recommended for
   slave and cyclic channels as they typically need to obtain a specific
   DMA channel.

   When the optional 'filter_fn' parameter is NULL, dma_request_channel()
   simply returns the first channel that satisfies the capability mask.

   Otherwise, the 'filter_fn' routine will be called once for each free
   channel which has a capability in 'mask'.  'filter_fn' is expected to
   return 'true' when the desired DMA channel is found.

   A channel allocated via this interface is exclusive to the caller,
   until dma_release_channel() is called.

2. Set slave and controller specific parameters

   Next step is always to pass some specific information to the DMA
   driver.  Most of the generic information which a slave DMA can use
   is in struct dma_slave_config.  This allows the clients to specify
   DMA direction, DMA addresses, bus widths, DMA burst lengths etc
   for the peripheral.

   If some DMA controllers have more parameters to be sent then they
   should try to embed struct dma_slave_config in their controller
   specific structure. That gives flexibility to client to pass more
   parameters, if required.

   Interface:
	int dmaengine_slave_config(struct dma_chan *chan,
				  struct dma_slave_config *config)

   Please see the dma_slave_config structure definition in dmaengine.h
   for a detailed explanation of the struct members.  Please note
   that the 'direction' member will be going away as it duplicates the
   direction given in the prepare call.

3. Get a descriptor for transaction

   For slave usage the various modes of slave transfers supported by the
   DMA-engine are:

   slave_sg	- DMA a list of scatter gather buffers from/to a peripheral
   dma_cyclic	- Perform a cyclic DMA operation from/to a peripheral till the
		  operation is explicitly stopped.
   interleaved_dma - This is common to Slave as well as M2M clients. For slave
		 address of devices' fifo could be already known to the driver.
		 Various types of operations could be expressed by setting
		 appropriate values to the 'dma_interleaved_template' members.

   A non-NULL return of this transfer API represents a "descriptor" for
   the given transaction.

   Interface:
	struct dma_async_tx_descriptor *(*chan->device->device_prep_slave_sg)(
		struct dma_chan *chan, struct scatterlist *sgl,
		unsigned int sg_len, enum dma_data_direction direction,
		unsigned long flags);

	struct dma_async_tx_descriptor *(*chan->device->device_prep_dma_cyclic)(
		struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
		size_t period_len, enum dma_data_direction direction);

	struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)(
		struct dma_chan *chan, struct dma_interleaved_template *xt,
		unsigned long flags);

   The peripheral driver is expected to have mapped the scatterlist for
   the DMA operation prior to calling device_prep_slave_sg, and must
   keep the scatterlist mapped until the DMA operation has completed.
   The scatterlist must be mapped using the DMA struct device.  So,
   normal setup should look like this:

	nr_sg = dma_map_sg(chan->device->dev, sgl, sg_len);
	if (nr_sg == 0)
		/* error */

	desc = chan->device->device_prep_slave_sg(chan, sgl, nr_sg,
			direction, flags);

   Once a descriptor has been obtained, the callback information can be
   added and the descriptor must then be submitted.  Some DMA engine
   drivers may hold a spinlock between a successful preparation and
   submission so it is important that these two operations are closely
   paired.

   Note:
	Although the async_tx API specifies that completion callback
	routines cannot submit any new operations, this is not the
	case for slave/cyclic DMA.

	For slave DMA, the subsequent transaction may not be available
	for submission prior to callback function being invoked, so
	slave DMA callbacks are permitted to prepare and submit a new