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authorVadim Pasternak <vadimp@mellanox.com>2018-02-09 18:59:30 -0500
committerDarren Hart (VMware) <dvhart@infradead.org>2018-02-09 20:23:07 -0500
commitef08e14a3832c88bb8d5ccbb88eab48642fc6aa9 (patch)
tree55fac70f63a892010ba394e4469c57a2325353dd /drivers/platform/x86/mlx-platform.c
parent6016f7d54bc49e3c570d5c7adbb463fe87e19dd7 (diff)
platform/x86: mlx-platform: Add support for new msn274x system type
It adds support for new Mellanox system types of basic class msn274x, containing system MSN2740 (32x100GbE Ethernet switch with cost reduction) and its derivatives. These are the Top of the Rack system, equipped with Mellanox Small Form Factor carrier board and switch board with Mellanox Spectrum device, which supports Ethernet switching with 32X100G ports line rate of up to EDR speed. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
Diffstat (limited to 'drivers/platform/x86/mlx-platform.c')
-rw-r--r--drivers/platform/x86/mlx-platform.c124
1 files changed, 124 insertions, 0 deletions
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index e87fe34eadf5..3a13285d1aa8 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -94,6 +94,7 @@
94/* Hotplug devices adapter numbers */ 94/* Hotplug devices adapter numbers */
95#define MLXPLAT_CPLD_NR_NONE -1 95#define MLXPLAT_CPLD_NR_NONE -1
96#define MLXPLAT_CPLD_PSU_DEFAULT_NR 10 96#define MLXPLAT_CPLD_PSU_DEFAULT_NR 10
97#define MLXPLAT_CPLD_PSU_MSNXXXX_NR 4
97#define MLXPLAT_CPLD_FAN1_DEFAULT_NR 11 98#define MLXPLAT_CPLD_FAN1_DEFAULT_NR 11
98#define MLXPLAT_CPLD_FAN2_DEFAULT_NR 12 99#define MLXPLAT_CPLD_FAN2_DEFAULT_NR 12
99#define MLXPLAT_CPLD_FAN3_DEFAULT_NR 13 100#define MLXPLAT_CPLD_FAN3_DEFAULT_NR 13
@@ -335,6 +336,108 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_msn21xx_data = {
335 .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW, 336 .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
336}; 337};
337 338
339/* Platform hotplug msn274x system family data */
340static struct mlxreg_core_data mlxplat_mlxcpld_msn274x_psu_items_data[] = {
341 {
342 .label = "psu1",
343 .reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET,
344 .mask = BIT(0),
345 .hpdev.brdinfo = &mlxplat_mlxcpld_psu[0],
346 .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
347 },
348 {
349 .label = "psu2",
350 .reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET,
351 .mask = BIT(1),
352 .hpdev.brdinfo = &mlxplat_mlxcpld_psu[1],
353 .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
354 },
355};
356
357static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_pwr_items_data[] = {
358 {
359 .label = "pwr1",
360 .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,
361 .mask = BIT(0),
362 .hpdev.brdinfo = &mlxplat_mlxcpld_pwr[0],
363 .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
364 },
365 {
366 .label = "pwr2",
367 .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,
368 .mask = BIT(1),
369 .hpdev.brdinfo = &mlxplat_mlxcpld_pwr[1],
370 .hpdev.nr = MLXPLAT_CPLD_PSU_MSNXXXX_NR,
371 },
372};
373
374static struct mlxreg_core_data mlxplat_mlxcpld_msn274x_fan_items_data[] = {
375 {
376 .label = "fan1",
377 .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
378 .mask = BIT(0),
379 .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
380 },
381 {
382 .label = "fan2",
383 .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
384 .mask = BIT(1),
385 .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
386 },
387 {
388 .label = "fan3",
389 .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
390 .mask = BIT(2),
391 .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
392 },
393 {
394 .label = "fan4",
395 .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
396 .mask = BIT(3),
397 .hpdev.nr = MLXPLAT_CPLD_NR_NONE,
398 },
399};
400
401static struct mlxreg_core_item mlxplat_mlxcpld_msn274x_items[] = {
402 {
403 .data = mlxplat_mlxcpld_msn274x_psu_items_data,
404 .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
405 .reg = MLXPLAT_CPLD_LPC_REG_PSU_OFFSET,
406 .mask = MLXPLAT_CPLD_PSU_MASK,
407 .count = ARRAY_SIZE(mlxplat_mlxcpld_msn274x_psu_items_data),
408 .inversed = 1,
409 .health = false,
410 },
411 {
412 .data = mlxplat_mlxcpld_default_ng_pwr_items_data,
413 .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
414 .reg = MLXPLAT_CPLD_LPC_REG_PWR_OFFSET,
415 .mask = MLXPLAT_CPLD_PWR_MASK,
416 .count = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_pwr_items_data),
417 .inversed = 0,
418 .health = false,
419 },
420 {
421 .data = mlxplat_mlxcpld_msn274x_fan_items_data,
422 .aggr_mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
423 .reg = MLXPLAT_CPLD_LPC_REG_FAN_OFFSET,
424 .mask = MLXPLAT_CPLD_FAN_MASK,
425 .count = ARRAY_SIZE(mlxplat_mlxcpld_msn274x_fan_items_data),
426 .inversed = 1,
427 .health = false,
428 },
429};
430
431static
432struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_msn274x_data = {
433 .items = mlxplat_mlxcpld_msn274x_items,
434 .counter = ARRAY_SIZE(mlxplat_mlxcpld_msn274x_items),
435 .cell = MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET,
436 .mask = MLXPLAT_CPLD_AGGR_MASK_NG_DEF,
437 .cell_low = MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET,
438 .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
439};
440
338static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) 441static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
339{ 442{
340 switch (reg) { 443 switch (reg) {
@@ -464,8 +567,29 @@ static int __init mlxplat_dmi_msn21xx_matched(const struct dmi_system_id *dmi)
464 return 1; 567 return 1;
465}; 568};
466 569
570static int __init mlxplat_dmi_msn274x_matched(const struct dmi_system_id *dmi)
571{
572 int i;
573
574 for (i = 0; i < ARRAY_SIZE(mlxplat_mux_data); i++) {
575 mlxplat_mux_data[i].values = mlxplat_msn21xx_channels;
576 mlxplat_mux_data[i].n_values =
577 ARRAY_SIZE(mlxplat_msn21xx_channels);
578 }
579 mlxplat_hotplug = &mlxplat_mlxcpld_msn274x_data;
580
581 return 1;
582};
583
467static const struct dmi_system_id mlxplat_dmi_table[] __initconst = { 584static const struct dmi_system_id mlxplat_dmi_table[] __initconst = {
468 { 585 {
586 .callback = mlxplat_dmi_msn274x_matched,
587 .matches = {
588 DMI_MATCH(DMI_BOARD_VENDOR, "Mellanox Technologies"),
589 DMI_MATCH(DMI_PRODUCT_NAME, "MSN274"),
590 },
591 },
592 {
469 .callback = mlxplat_dmi_default_matched, 593 .callback = mlxplat_dmi_default_matched,
470 .matches = { 594 .matches = {
471 DMI_MATCH(DMI_BOARD_VENDOR, "Mellanox Technologies"), 595 DMI_MATCH(DMI_BOARD_VENDOR, "Mellanox Technologies"),