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authorVadim Pasternak <vadimp@mellanox.com>2018-05-07 02:48:53 -0400
committerDarren Hart (VMware) <dvhart@infradead.org>2018-06-01 12:54:34 -0400
commit1189456b1cce36f653622d15c0f38410bf6c37c5 (patch)
tree6604c999e37833d035d58eed85f2132e565f057c /drivers/platform/x86/mlx-platform.c
parentcbf7ff8cdb03a81ae81680ac133c7b1bf5194001 (diff)
platform/x86: mlx-platform: Add LED platform driver activation
Add LED platform driver activation from mlx-platform. This LED driver uses the same regmap infrastructure as others Mellanox platform drivers, so LED specific registers description is added. System LED configuration depends on system type. To support all the relevant types per system type LED descriptions are defined for passing to LED platform driver. Signed-off-by: Vadim Pasternak <vadimp@mellanox.com> Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
Diffstat (limited to 'drivers/platform/x86/mlx-platform.c')
-rw-r--r--drivers/platform/x86/mlx-platform.c259
1 files changed, 258 insertions, 1 deletions
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c
index 912f844713ab..a0fd9aa6d932 100644
--- a/drivers/platform/x86/mlx-platform.c
+++ b/drivers/platform/x86/mlx-platform.c
@@ -47,6 +47,11 @@
47/* LPC bus IO offsets */ 47/* LPC bus IO offsets */
48#define MLXPLAT_CPLD_LPC_I2C_BASE_ADRR 0x2000 48#define MLXPLAT_CPLD_LPC_I2C_BASE_ADRR 0x2000
49#define MLXPLAT_CPLD_LPC_REG_BASE_ADRR 0x2500 49#define MLXPLAT_CPLD_LPC_REG_BASE_ADRR 0x2500
50#define MLXPLAT_CPLD_LPC_REG_LED1_OFFSET 0x20
51#define MLXPLAT_CPLD_LPC_REG_LED2_OFFSET 0x21
52#define MLXPLAT_CPLD_LPC_REG_LED3_OFFSET 0x22
53#define MLXPLAT_CPLD_LPC_REG_LED4_OFFSET 0x23
54#define MLXPLAT_CPLD_LPC_REG_LED5_OFFSET 0x24
50#define MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET 0x3a 55#define MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET 0x3a
51#define MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET 0x3b 56#define MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET 0x3b
52#define MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET 0x40 57#define MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET 0x40
@@ -84,6 +89,8 @@
84#define MLXPLAT_CPLD_PWR_MASK GENMASK(1, 0) 89#define MLXPLAT_CPLD_PWR_MASK GENMASK(1, 0)
85#define MLXPLAT_CPLD_FAN_MASK GENMASK(3, 0) 90#define MLXPLAT_CPLD_FAN_MASK GENMASK(3, 0)
86#define MLXPLAT_CPLD_FAN_NG_MASK GENMASK(5, 0) 91#define MLXPLAT_CPLD_FAN_NG_MASK GENMASK(5, 0)
92#define MLXPLAT_CPLD_LED_LO_NIBBLE_MASK GENMASK(7, 4)
93#define MLXPLAT_CPLD_LED_HI_NIBBLE_MASK GENMASK(3, 0)
87 94
88/* Default I2C parent bus number */ 95/* Default I2C parent bus number */
89#define MLXPLAT_CPLD_PHYS_ADAPTER_DEF_NR 1 96#define MLXPLAT_CPLD_PHYS_ADAPTER_DEF_NR 1
@@ -114,11 +121,13 @@
114 * @pdev_i2c - i2c controller platform device 121 * @pdev_i2c - i2c controller platform device
115 * @pdev_mux - array of mux platform devices 122 * @pdev_mux - array of mux platform devices
116 * @pdev_hotplug - hotplug platform devices 123 * @pdev_hotplug - hotplug platform devices
124 * @pdev_led - led platform devices
117 */ 125 */
118struct mlxplat_priv { 126struct mlxplat_priv {
119 struct platform_device *pdev_i2c; 127 struct platform_device *pdev_i2c;
120 struct platform_device *pdev_mux[MLXPLAT_CPLD_LPC_MUX_DEVS]; 128 struct platform_device *pdev_mux[MLXPLAT_CPLD_LPC_MUX_DEVS];
121 struct platform_device *pdev_hotplug; 129 struct platform_device *pdev_hotplug;
130 struct platform_device *pdev_led;
122}; 131};
123 132
124/* Regions for LPC I2C controller and LPC base register space */ 133/* Regions for LPC I2C controller and LPC base register space */
@@ -592,9 +601,227 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_ng_data = {
592 .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW, 601 .mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
593}; 602};
594 603
604/* Platform led default data */
605static struct mlxreg_core_data mlxplat_mlxcpld_default_led_data[] = {
606 {
607 .label = "status:green",
608 .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
609 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
610 },
611 {
612 .label = "status:red",
613 .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
614 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK
615 },
616 {
617 .label = "psu:green",
618 .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
619 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
620 },
621 {
622 .label = "psu:red",
623 .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
624 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
625 },
626 {
627 .label = "fan1:green",
628 .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
629 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
630 },
631 {
632 .label = "fan1:red",
633 .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
634 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
635 },
636 {
637 .label = "fan2:green",
638 .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
639 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
640 },
641 {
642 .label = "fan2:red",
643 .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
644 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
645 },
646 {
647 .label = "fan3:green",
648 .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
649 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
650 },
651 {
652 .label = "fan3:red",
653 .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
654 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
655 },
656 {
657 .label = "fan4:green",
658 .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
659 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
660 },
661 {
662 .label = "fan4:red",
663 .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
664 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
665 },
666};
667
668static struct mlxreg_core_platform_data mlxplat_default_led_data = {
669 .data = mlxplat_mlxcpld_default_led_data,
670 .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_led_data),
671};
672
673/* Platform led MSN21xx system family data */
674static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_led_data[] = {
675 {
676 .label = "status:green",
677 .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
678 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
679 },
680 {
681 .label = "status:red",
682 .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
683 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK
684 },
685 {
686 .label = "fan:green",
687 .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
688 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
689 },
690 {
691 .label = "fan:red",
692 .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
693 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
694 },
695 {
696 .label = "psu1:green",
697 .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
698 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
699 },
700 {
701 .label = "psu1:red",
702 .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
703 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
704 },
705 {
706 .label = "psu2:green",
707 .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
708 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
709 },
710 {
711 .label = "psu2:red",
712 .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
713 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
714 },
715 {
716 .label = "uid:blue",
717 .reg = MLXPLAT_CPLD_LPC_REG_LED5_OFFSET,
718 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
719 },
720};
721
722static struct mlxreg_core_platform_data mlxplat_msn21xx_led_data = {
723 .data = mlxplat_mlxcpld_msn21xx_led_data,
724 .counter = ARRAY_SIZE(mlxplat_mlxcpld_msn21xx_led_data),
725};
726
727/* Platform led for default data for 200GbE systems */
728static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_led_data[] = {
729 {
730 .label = "status:green",
731 .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
732 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
733 },
734 {
735 .label = "status:orange",
736 .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
737 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK
738 },
739 {
740 .label = "psu:green",
741 .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
742 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
743 },
744 {
745 .label = "psu:orange",
746 .reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
747 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
748 },
749 {
750 .label = "fan1:green",
751 .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
752 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
753 },
754 {
755 .label = "fan1:orange",
756 .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
757 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
758 },
759 {
760 .label = "fan2:green",
761 .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
762 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
763 },
764 {
765 .label = "fan2:orange",
766 .reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
767 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
768 },
769 {
770 .label = "fan3:green",
771 .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
772 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
773 },
774 {
775 .label = "fan3:orange",
776 .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
777 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
778 },
779 {
780 .label = "fan4:green",
781 .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
782 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
783 },
784 {
785 .label = "fan4:orange",
786 .reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
787 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
788 },
789 {
790 .label = "fan5:green",
791 .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
792 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
793 },
794 {
795 .label = "fan5:orange",
796 .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
797 .mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
798 },
799 {
800 .label = "fan6:green",
801 .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
802 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
803 },
804 {
805 .label = "fan6:orange",
806 .reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
807 .mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
808 },
809};
810
811static struct mlxreg_core_platform_data mlxplat_default_ng_led_data = {
812 .data = mlxplat_mlxcpld_default_ng_led_data,
813 .counter = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_led_data),
814};
815
816
595static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg) 817static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
596{ 818{
597 switch (reg) { 819 switch (reg) {
820 case MLXPLAT_CPLD_LPC_REG_LED1_OFFSET:
821 case MLXPLAT_CPLD_LPC_REG_LED2_OFFSET:
822 case MLXPLAT_CPLD_LPC_REG_LED3_OFFSET:
823 case MLXPLAT_CPLD_LPC_REG_LED4_OFFSET:
824 case MLXPLAT_CPLD_LPC_REG_LED5_OFFSET:
598 case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: 825 case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET:
599 case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET: 826 case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET:
600 case MLXPLAT_CPLD_LPC_REG_PSU_EVENT_OFFSET: 827 case MLXPLAT_CPLD_LPC_REG_PSU_EVENT_OFFSET:
@@ -611,6 +838,11 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
611static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) 838static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
612{ 839{
613 switch (reg) { 840 switch (reg) {
841 case MLXPLAT_CPLD_LPC_REG_LED1_OFFSET:
842 case MLXPLAT_CPLD_LPC_REG_LED2_OFFSET:
843 case MLXPLAT_CPLD_LPC_REG_LED3_OFFSET:
844 case MLXPLAT_CPLD_LPC_REG_LED4_OFFSET:
845 case MLXPLAT_CPLD_LPC_REG_LED5_OFFSET:
614 case MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET: 846 case MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET:
615 case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: 847 case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET:
616 case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET: 848 case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET:
@@ -632,6 +864,11 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
632static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) 864static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
633{ 865{
634 switch (reg) { 866 switch (reg) {
867 case MLXPLAT_CPLD_LPC_REG_LED1_OFFSET:
868 case MLXPLAT_CPLD_LPC_REG_LED2_OFFSET:
869 case MLXPLAT_CPLD_LPC_REG_LED3_OFFSET:
870 case MLXPLAT_CPLD_LPC_REG_LED4_OFFSET:
871 case MLXPLAT_CPLD_LPC_REG_LED5_OFFSET:
635 case MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET: 872 case MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET:
636 case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET: 873 case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET:
637 case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET: 874 case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET:
@@ -692,6 +929,7 @@ static struct resource mlxplat_mlxcpld_resources[] = {
692 929
693static struct platform_device *mlxplat_dev; 930static struct platform_device *mlxplat_dev;
694static struct mlxreg_core_hotplug_platform_data *mlxplat_hotplug; 931static struct mlxreg_core_hotplug_platform_data *mlxplat_hotplug;
932static struct mlxreg_core_platform_data *mlxplat_led;
695 933
696static int __init mlxplat_dmi_default_matched(const struct dmi_system_id *dmi) 934static int __init mlxplat_dmi_default_matched(const struct dmi_system_id *dmi)
697{ 935{
@@ -705,6 +943,7 @@ static int __init mlxplat_dmi_default_matched(const struct dmi_system_id *dmi)
705 mlxplat_hotplug = &mlxplat_mlxcpld_default_data; 943 mlxplat_hotplug = &mlxplat_mlxcpld_default_data;
706 mlxplat_hotplug->deferred_nr = 944 mlxplat_hotplug->deferred_nr =
707 mlxplat_default_channels[i - 1][MLXPLAT_CPLD_GRP_CHNL_NUM - 1]; 945 mlxplat_default_channels[i - 1][MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
946 mlxplat_led = &mlxplat_default_led_data;
708 947
709 return 1; 948 return 1;
710}; 949};
@@ -721,6 +960,7 @@ static int __init mlxplat_dmi_msn21xx_matched(const struct dmi_system_id *dmi)
721 mlxplat_hotplug = &mlxplat_mlxcpld_msn21xx_data; 960 mlxplat_hotplug = &mlxplat_mlxcpld_msn21xx_data;
722 mlxplat_hotplug->deferred_nr = 961 mlxplat_hotplug->deferred_nr =
723 mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1]; 962 mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
963 mlxplat_led = &mlxplat_msn21xx_led_data;
724 964
725 return 1; 965 return 1;
726}; 966};
@@ -737,6 +977,7 @@ static int __init mlxplat_dmi_msn274x_matched(const struct dmi_system_id *dmi)
737 mlxplat_hotplug = &mlxplat_mlxcpld_msn274x_data; 977 mlxplat_hotplug = &mlxplat_mlxcpld_msn274x_data;
738 mlxplat_hotplug->deferred_nr = 978 mlxplat_hotplug->deferred_nr =
739 mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1]; 979 mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
980 mlxplat_led = &mlxplat_default_led_data;
740 981
741 return 1; 982 return 1;
742}; 983};
@@ -753,6 +994,7 @@ static int __init mlxplat_dmi_msn201x_matched(const struct dmi_system_id *dmi)
753 mlxplat_hotplug = &mlxplat_mlxcpld_msn201x_data; 994 mlxplat_hotplug = &mlxplat_mlxcpld_msn201x_data;
754 mlxplat_hotplug->deferred_nr = 995 mlxplat_hotplug->deferred_nr =
755 mlxplat_default_channels[i - 1][MLXPLAT_CPLD_GRP_CHNL_NUM - 1]; 996 mlxplat_default_channels[i - 1][MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
997 mlxplat_led = &mlxplat_default_ng_led_data;
756 998
757 return 1; 999 return 1;
758}; 1000};
@@ -769,6 +1011,7 @@ static int __init mlxplat_dmi_qmb7xx_matched(const struct dmi_system_id *dmi)
769 mlxplat_hotplug = &mlxplat_mlxcpld_default_ng_data; 1011 mlxplat_hotplug = &mlxplat_mlxcpld_default_ng_data;
770 mlxplat_hotplug->deferred_nr = 1012 mlxplat_hotplug->deferred_nr =
771 mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1]; 1013 mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
1014 mlxplat_led = &mlxplat_msn21xx_led_data;
772 1015
773 return 1; 1016 return 1;
774}; 1017};
@@ -990,14 +1233,27 @@ static int __init mlxplat_init(void)
990 goto fail_platform_mux_register; 1233 goto fail_platform_mux_register;
991 } 1234 }
992 1235
1236 /* Add LED driver. */
1237 mlxplat_led->regmap = mlxplat_hotplug->regmap;
1238 priv->pdev_led = platform_device_register_resndata(
1239 &mlxplat_dev->dev, "leds-mlxreg",
1240 PLATFORM_DEVID_NONE, NULL, 0,
1241 mlxplat_led, sizeof(*mlxplat_led));
1242 if (IS_ERR(priv->pdev_led)) {
1243 err = PTR_ERR(priv->pdev_led);
1244 goto fail_platform_hotplug_register;
1245 }
1246
993 /* Sync registers with hardware. */ 1247 /* Sync registers with hardware. */
994 regcache_mark_dirty(mlxplat_hotplug->regmap); 1248 regcache_mark_dirty(mlxplat_hotplug->regmap);
995 err = regcache_sync(mlxplat_hotplug->regmap); 1249 err = regcache_sync(mlxplat_hotplug->regmap);
996 if (err) 1250 if (err)
997 goto fail_platform_hotplug_register; 1251 goto fail_platform_led_register;
998 1252
999 return 0; 1253 return 0;
1000 1254
1255fail_platform_led_register:
1256 platform_device_unregister(priv->pdev_led);
1001fail_platform_hotplug_register: 1257fail_platform_hotplug_register:
1002 platform_device_unregister(priv->pdev_hotplug); 1258 platform_device_unregister(priv->pdev_hotplug);
1003fail_platform_mux_register: 1259fail_platform_mux_register:
@@ -1016,6 +1272,7 @@ static void __exit mlxplat_exit(void)
1016 struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev); 1272 struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev);
1017 int i; 1273 int i;
1018 1274
1275 platform_device_unregister(priv->pdev_led);
1019 platform_device_unregister(priv->pdev_hotplug); 1276 platform_device_unregister(priv->pdev_hotplug);
1020 1277
1021 for (i = ARRAY_SIZE(mlxplat_mux_data) - 1; i >= 0 ; i--) 1278 for (i = ARRAY_SIZE(mlxplat_mux_data) - 1; i >= 0 ; i--)