diff options
author | James Prestwood <james.prestwood@linux.intel.com> | 2019-01-07 16:32:48 -0500 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2019-04-22 17:51:15 -0400 |
commit | 6afb7e26978da5e86e57e540fdce65c8b04f398a (patch) | |
tree | 4f7db713da3aa893de57fdd4775f7aa83727276d /drivers/pci/quirks.c | |
parent | d28ca864c493637f3c957f4ed9348a94fca6de60 (diff) |
PCI: Mark Atheros AR9462 to avoid bus reset
When using PCI passthrough with this device, the host machine locks up
completely when starting the VM, requiring a hard reboot. Add a quirk to
avoid bus resets on this device.
Fixes: c3e59ee4e766 ("PCI: Mark Atheros AR93xx to avoid bus reset")
Link: https://lore.kernel.org/linux-pci/20190107213248.3034-1-james.prestwood@linux.intel.com
Signed-off-by: James Prestwood <james.prestwood@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: stable@vger.kernel.org # v3.14+
Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r-- | drivers/pci/quirks.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 68bee35fcafa..9b9e28854a58 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c | |||
@@ -3408,6 +3408,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0030, quirk_no_bus_reset); | |||
3408 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0032, quirk_no_bus_reset); | 3408 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0032, quirk_no_bus_reset); |
3409 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset); | 3409 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset); |
3410 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, quirk_no_bus_reset); | 3410 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, quirk_no_bus_reset); |
3411 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0034, quirk_no_bus_reset); | ||
3411 | 3412 | ||
3412 | /* | 3413 | /* |
3413 | * Root port on some Cavium CN8xxx chips do not successfully complete a bus | 3414 | * Root port on some Cavium CN8xxx chips do not successfully complete a bus |