diff options
author | Thierry Reding <treding@nvidia.com> | 2019-04-11 04:48:25 -0400 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2019-04-11 11:58:41 -0400 |
commit | cb2b58391e40d0877b1f60023c8be72696ff8511 (patch) | |
tree | f66aee3644f43148a4ff79dc71e68f9b1a6faddb /drivers/memory | |
parent | f2222a9e8033ceca2ed8b1addea1d541b536ab7b (diff) |
memory: tegra: Properly spell "tegra"
Rename all occurrences of "terga" to "tegra". It's an easy typo to make
and a difficult one to spot.
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/memory')
-rw-r--r-- | drivers/memory/tegra/mc.c | 18 | ||||
-rw-r--r-- | drivers/memory/tegra/mc.h | 2 | ||||
-rw-r--r-- | drivers/memory/tegra/tegra114.c | 2 | ||||
-rw-r--r-- | drivers/memory/tegra/tegra124.c | 4 | ||||
-rw-r--r-- | drivers/memory/tegra/tegra20.c | 28 | ||||
-rw-r--r-- | drivers/memory/tegra/tegra210.c | 2 | ||||
-rw-r--r-- | drivers/memory/tegra/tegra30.c | 2 |
7 files changed, 29 insertions, 29 deletions
diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index 0a53598d982f..a08b61a86760 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c | |||
@@ -74,7 +74,7 @@ static const struct of_device_id tegra_mc_of_match[] = { | |||
74 | }; | 74 | }; |
75 | MODULE_DEVICE_TABLE(of, tegra_mc_of_match); | 75 | MODULE_DEVICE_TABLE(of, tegra_mc_of_match); |
76 | 76 | ||
77 | static int terga_mc_block_dma_common(struct tegra_mc *mc, | 77 | static int tegra_mc_block_dma_common(struct tegra_mc *mc, |
78 | const struct tegra_mc_reset *rst) | 78 | const struct tegra_mc_reset *rst) |
79 | { | 79 | { |
80 | unsigned long flags; | 80 | unsigned long flags; |
@@ -90,13 +90,13 @@ static int terga_mc_block_dma_common(struct tegra_mc *mc, | |||
90 | return 0; | 90 | return 0; |
91 | } | 91 | } |
92 | 92 | ||
93 | static bool terga_mc_dma_idling_common(struct tegra_mc *mc, | 93 | static bool tegra_mc_dma_idling_common(struct tegra_mc *mc, |
94 | const struct tegra_mc_reset *rst) | 94 | const struct tegra_mc_reset *rst) |
95 | { | 95 | { |
96 | return (mc_readl(mc, rst->status) & BIT(rst->bit)) != 0; | 96 | return (mc_readl(mc, rst->status) & BIT(rst->bit)) != 0; |
97 | } | 97 | } |
98 | 98 | ||
99 | static int terga_mc_unblock_dma_common(struct tegra_mc *mc, | 99 | static int tegra_mc_unblock_dma_common(struct tegra_mc *mc, |
100 | const struct tegra_mc_reset *rst) | 100 | const struct tegra_mc_reset *rst) |
101 | { | 101 | { |
102 | unsigned long flags; | 102 | unsigned long flags; |
@@ -112,17 +112,17 @@ static int terga_mc_unblock_dma_common(struct tegra_mc *mc, | |||
112 | return 0; | 112 | return 0; |
113 | } | 113 | } |
114 | 114 | ||
115 | static int terga_mc_reset_status_common(struct tegra_mc *mc, | 115 | static int tegra_mc_reset_status_common(struct tegra_mc *mc, |
116 | const struct tegra_mc_reset *rst) | 116 | const struct tegra_mc_reset *rst) |
117 | { | 117 | { |
118 | return (mc_readl(mc, rst->control) & BIT(rst->bit)) != 0; | 118 | return (mc_readl(mc, rst->control) & BIT(rst->bit)) != 0; |
119 | } | 119 | } |
120 | 120 | ||
121 | const struct tegra_mc_reset_ops terga_mc_reset_ops_common = { | 121 | const struct tegra_mc_reset_ops tegra_mc_reset_ops_common = { |
122 | .block_dma = terga_mc_block_dma_common, | 122 | .block_dma = tegra_mc_block_dma_common, |
123 | .dma_idling = terga_mc_dma_idling_common, | 123 | .dma_idling = tegra_mc_dma_idling_common, |
124 | .unblock_dma = terga_mc_unblock_dma_common, | 124 | .unblock_dma = tegra_mc_unblock_dma_common, |
125 | .reset_status = terga_mc_reset_status_common, | 125 | .reset_status = tegra_mc_reset_status_common, |
126 | }; | 126 | }; |
127 | 127 | ||
128 | static inline struct tegra_mc *reset_to_mc(struct reset_controller_dev *rcdev) | 128 | static inline struct tegra_mc *reset_to_mc(struct reset_controller_dev *rcdev) |
diff --git a/drivers/memory/tegra/mc.h b/drivers/memory/tegra/mc.h index 887a3b07334f..392993955c93 100644 --- a/drivers/memory/tegra/mc.h +++ b/drivers/memory/tegra/mc.h | |||
@@ -35,7 +35,7 @@ static inline void mc_writel(struct tegra_mc *mc, u32 value, | |||
35 | writel_relaxed(value, mc->regs + offset); | 35 | writel_relaxed(value, mc->regs + offset); |
36 | } | 36 | } |
37 | 37 | ||
38 | extern const struct tegra_mc_reset_ops terga_mc_reset_ops_common; | 38 | extern const struct tegra_mc_reset_ops tegra_mc_reset_ops_common; |
39 | 39 | ||
40 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC | 40 | #ifdef CONFIG_ARCH_TEGRA_2x_SOC |
41 | extern const struct tegra_mc_soc tegra20_mc_soc; | 41 | extern const struct tegra_mc_soc tegra20_mc_soc; |
diff --git a/drivers/memory/tegra/tegra114.c b/drivers/memory/tegra/tegra114.c index 6560a5101322..7247a46b71a8 100644 --- a/drivers/memory/tegra/tegra114.c +++ b/drivers/memory/tegra/tegra114.c | |||
@@ -975,7 +975,7 @@ const struct tegra_mc_soc tegra114_mc_soc = { | |||
975 | .smmu = &tegra114_smmu_soc, | 975 | .smmu = &tegra114_smmu_soc, |
976 | .intmask = MC_INT_INVALID_SMMU_PAGE | MC_INT_SECURITY_VIOLATION | | 976 | .intmask = MC_INT_INVALID_SMMU_PAGE | MC_INT_SECURITY_VIOLATION | |
977 | MC_INT_DECERR_EMEM, | 977 | MC_INT_DECERR_EMEM, |
978 | .reset_ops = &terga_mc_reset_ops_common, | 978 | .reset_ops = &tegra_mc_reset_ops_common, |
979 | .resets = tegra114_mc_resets, | 979 | .resets = tegra114_mc_resets, |
980 | .num_resets = ARRAY_SIZE(tegra114_mc_resets), | 980 | .num_resets = ARRAY_SIZE(tegra114_mc_resets), |
981 | }; | 981 | }; |
diff --git a/drivers/memory/tegra/tegra124.c b/drivers/memory/tegra/tegra124.c index b561a1fe7f46..8f8487bda642 100644 --- a/drivers/memory/tegra/tegra124.c +++ b/drivers/memory/tegra/tegra124.c | |||
@@ -1074,7 +1074,7 @@ const struct tegra_mc_soc tegra124_mc_soc = { | |||
1074 | .intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR | | 1074 | .intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR | |
1075 | MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE | | 1075 | MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE | |
1076 | MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM, | 1076 | MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM, |
1077 | .reset_ops = &terga_mc_reset_ops_common, | 1077 | .reset_ops = &tegra_mc_reset_ops_common, |
1078 | .resets = tegra124_mc_resets, | 1078 | .resets = tegra124_mc_resets, |
1079 | .num_resets = ARRAY_SIZE(tegra124_mc_resets), | 1079 | .num_resets = ARRAY_SIZE(tegra124_mc_resets), |
1080 | }; | 1080 | }; |
@@ -1104,7 +1104,7 @@ const struct tegra_mc_soc tegra132_mc_soc = { | |||
1104 | .intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR | | 1104 | .intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR | |
1105 | MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE | | 1105 | MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE | |
1106 | MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM, | 1106 | MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM, |
1107 | .reset_ops = &terga_mc_reset_ops_common, | 1107 | .reset_ops = &tegra_mc_reset_ops_common, |
1108 | .resets = tegra124_mc_resets, | 1108 | .resets = tegra124_mc_resets, |
1109 | .num_resets = ARRAY_SIZE(tegra124_mc_resets), | 1109 | .num_resets = ARRAY_SIZE(tegra124_mc_resets), |
1110 | }; | 1110 | }; |
diff --git a/drivers/memory/tegra/tegra20.c b/drivers/memory/tegra/tegra20.c index b786aec089e7..121237b16add 100644 --- a/drivers/memory/tegra/tegra20.c +++ b/drivers/memory/tegra/tegra20.c | |||
@@ -198,7 +198,7 @@ static const struct tegra_mc_reset tegra20_mc_resets[] = { | |||
198 | TEGRA20_MC_RESET(VI, 0x100, 0x178, 0x104, 14), | 198 | TEGRA20_MC_RESET(VI, 0x100, 0x178, 0x104, 14), |
199 | }; | 199 | }; |
200 | 200 | ||
201 | static int terga20_mc_hotreset_assert(struct tegra_mc *mc, | 201 | static int tegra20_mc_hotreset_assert(struct tegra_mc *mc, |
202 | const struct tegra_mc_reset *rst) | 202 | const struct tegra_mc_reset *rst) |
203 | { | 203 | { |
204 | unsigned long flags; | 204 | unsigned long flags; |
@@ -214,7 +214,7 @@ static int terga20_mc_hotreset_assert(struct tegra_mc *mc, | |||
214 | return 0; | 214 | return 0; |
215 | } | 215 | } |
216 | 216 | ||
217 | static int terga20_mc_hotreset_deassert(struct tegra_mc *mc, | 217 | static int tegra20_mc_hotreset_deassert(struct tegra_mc *mc, |
218 | const struct tegra_mc_reset *rst) | 218 | const struct tegra_mc_reset *rst) |
219 | { | 219 | { |
220 | unsigned long flags; | 220 | unsigned long flags; |
@@ -230,7 +230,7 @@ static int terga20_mc_hotreset_deassert(struct tegra_mc *mc, | |||
230 | return 0; | 230 | return 0; |
231 | } | 231 | } |
232 | 232 | ||
233 | static int terga20_mc_block_dma(struct tegra_mc *mc, | 233 | static int tegra20_mc_block_dma(struct tegra_mc *mc, |
234 | const struct tegra_mc_reset *rst) | 234 | const struct tegra_mc_reset *rst) |
235 | { | 235 | { |
236 | unsigned long flags; | 236 | unsigned long flags; |
@@ -246,19 +246,19 @@ static int terga20_mc_block_dma(struct tegra_mc *mc, | |||
246 | return 0; | 246 | return 0; |
247 | } | 247 | } |
248 | 248 | ||
249 | static bool terga20_mc_dma_idling(struct tegra_mc *mc, | 249 | static bool tegra20_mc_dma_idling(struct tegra_mc *mc, |
250 | const struct tegra_mc_reset *rst) | 250 | const struct tegra_mc_reset *rst) |
251 | { | 251 | { |
252 | return mc_readl(mc, rst->status) == 0; | 252 | return mc_readl(mc, rst->status) == 0; |
253 | } | 253 | } |
254 | 254 | ||
255 | static int terga20_mc_reset_status(struct tegra_mc *mc, | 255 | static int tegra20_mc_reset_status(struct tegra_mc *mc, |
256 | const struct tegra_mc_reset *rst) | 256 | const struct tegra_mc_reset *rst) |
257 | { | 257 | { |
258 | return (mc_readl(mc, rst->reset) & BIT(rst->bit)) == 0; | 258 | return (mc_readl(mc, rst->reset) & BIT(rst->bit)) == 0; |
259 | } | 259 | } |
260 | 260 | ||
261 | static int terga20_mc_unblock_dma(struct tegra_mc *mc, | 261 | static int tegra20_mc_unblock_dma(struct tegra_mc *mc, |
262 | const struct tegra_mc_reset *rst) | 262 | const struct tegra_mc_reset *rst) |
263 | { | 263 | { |
264 | unsigned long flags; | 264 | unsigned long flags; |
@@ -274,13 +274,13 @@ static int terga20_mc_unblock_dma(struct tegra_mc *mc, | |||
274 | return 0; | 274 | return 0; |
275 | } | 275 | } |
276 | 276 | ||
277 | static const struct tegra_mc_reset_ops terga20_mc_reset_ops = { | 277 | static const struct tegra_mc_reset_ops tegra20_mc_reset_ops = { |
278 | .hotreset_assert = terga20_mc_hotreset_assert, | 278 | .hotreset_assert = tegra20_mc_hotreset_assert, |
279 | .hotreset_deassert = terga20_mc_hotreset_deassert, | 279 | .hotreset_deassert = tegra20_mc_hotreset_deassert, |
280 | .block_dma = terga20_mc_block_dma, | 280 | .block_dma = tegra20_mc_block_dma, |
281 | .dma_idling = terga20_mc_dma_idling, | 281 | .dma_idling = tegra20_mc_dma_idling, |
282 | .unblock_dma = terga20_mc_unblock_dma, | 282 | .unblock_dma = tegra20_mc_unblock_dma, |
283 | .reset_status = terga20_mc_reset_status, | 283 | .reset_status = tegra20_mc_reset_status, |
284 | }; | 284 | }; |
285 | 285 | ||
286 | const struct tegra_mc_soc tegra20_mc_soc = { | 286 | const struct tegra_mc_soc tegra20_mc_soc = { |
@@ -290,7 +290,7 @@ const struct tegra_mc_soc tegra20_mc_soc = { | |||
290 | .client_id_mask = 0x3f, | 290 | .client_id_mask = 0x3f, |
291 | .intmask = MC_INT_SECURITY_VIOLATION | MC_INT_INVALID_GART_PAGE | | 291 | .intmask = MC_INT_SECURITY_VIOLATION | MC_INT_INVALID_GART_PAGE | |
292 | MC_INT_DECERR_EMEM, | 292 | MC_INT_DECERR_EMEM, |
293 | .reset_ops = &terga20_mc_reset_ops, | 293 | .reset_ops = &tegra20_mc_reset_ops, |
294 | .resets = tegra20_mc_resets, | 294 | .resets = tegra20_mc_resets, |
295 | .num_resets = ARRAY_SIZE(tegra20_mc_resets), | 295 | .num_resets = ARRAY_SIZE(tegra20_mc_resets), |
296 | }; | 296 | }; |
diff --git a/drivers/memory/tegra/tegra210.c b/drivers/memory/tegra/tegra210.c index d00a77160407..aa22cda637eb 100644 --- a/drivers/memory/tegra/tegra210.c +++ b/drivers/memory/tegra/tegra210.c | |||
@@ -1132,7 +1132,7 @@ const struct tegra_mc_soc tegra210_mc_soc = { | |||
1132 | .intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR | | 1132 | .intmask = MC_INT_DECERR_MTS | MC_INT_SECERR_SEC | MC_INT_DECERR_VPR | |
1133 | MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE | | 1133 | MC_INT_INVALID_APB_ASID_UPDATE | MC_INT_INVALID_SMMU_PAGE | |
1134 | MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM, | 1134 | MC_INT_SECURITY_VIOLATION | MC_INT_DECERR_EMEM, |
1135 | .reset_ops = &terga_mc_reset_ops_common, | 1135 | .reset_ops = &tegra_mc_reset_ops_common, |
1136 | .resets = tegra210_mc_resets, | 1136 | .resets = tegra210_mc_resets, |
1137 | .num_resets = ARRAY_SIZE(tegra210_mc_resets), | 1137 | .num_resets = ARRAY_SIZE(tegra210_mc_resets), |
1138 | }; | 1138 | }; |
diff --git a/drivers/memory/tegra/tegra30.c b/drivers/memory/tegra/tegra30.c index bee5314ed404..68499ffdf0f4 100644 --- a/drivers/memory/tegra/tegra30.c +++ b/drivers/memory/tegra/tegra30.c | |||
@@ -999,7 +999,7 @@ const struct tegra_mc_soc tegra30_mc_soc = { | |||
999 | .smmu = &tegra30_smmu_soc, | 999 | .smmu = &tegra30_smmu_soc, |
1000 | .intmask = MC_INT_INVALID_SMMU_PAGE | MC_INT_SECURITY_VIOLATION | | 1000 | .intmask = MC_INT_INVALID_SMMU_PAGE | MC_INT_SECURITY_VIOLATION | |
1001 | MC_INT_DECERR_EMEM, | 1001 | MC_INT_DECERR_EMEM, |
1002 | .reset_ops = &terga_mc_reset_ops_common, | 1002 | .reset_ops = &tegra_mc_reset_ops_common, |
1003 | .resets = tegra30_mc_resets, | 1003 | .resets = tegra30_mc_resets, |
1004 | .num_resets = ARRAY_SIZE(tegra30_mc_resets), | 1004 | .num_resets = ARRAY_SIZE(tegra30_mc_resets), |
1005 | }; | 1005 | }; |