media: use the BIT() macro

As warned by cppcheck:

	[drivers/media/dvb-frontends/cx24123.c:434]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour
	[drivers/media/pci/bt8xx/bttv-input.c:87]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour
	[drivers/media/pci/bt8xx/bttv-input.c:98]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour
			...
	[drivers/media/v4l2-core/v4l2-ioctl.c:1391]: (error) Shifting signed 32-bit value by 31 bits is undefined behaviour

There are lots of places where we're doing 1 << 31. That's bad,
as, depending on the architecture, this has an undefined behavior.

The BIT() macro is already prepared to handle this, so, let's
just switch all "1 << number" macros by BIT(number) at the header files
with has 1 << 31.

Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> # exynos4-is and s3c-camif
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> # omap3isp, vsp1, xilinx, wl128x and ipu3
Reviewed-by: Benoit Parrot <bparrot@ti.com> # am437x and ti-vpe
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>

1 files changed, 14 insertions, 14 deletions

diff --git a/drivers/media/pci/ivtv/ivtv-irq.h b/drivers/media/pci/ivtv/ivtv-irq.h
index 7d2f45e2b83c..b8b0703a1c82 100644
--- a/drivers/media/pci/ivtv/ivtv-irq.h
+++ b/drivers/media/pci/ivtv/ivtv-irq.h
@@ -10,20 +10,20 @@
 #ifndef IVTV_IRQ_H
 #define IVTV_IRQ_H
 
-#define IVTV_IRQ_ENC_START_CAP          (0x1 << 31)
-#define IVTV_IRQ_ENC_EOS                (0x1 << 30)
-#define IVTV_IRQ_ENC_VBI_CAP            (0x1 << 29)
-#define IVTV_IRQ_ENC_VIM_RST            (0x1 << 28)
-#define IVTV_IRQ_ENC_DMA_COMPLETE       (0x1 << 27)
-#define IVTV_IRQ_ENC_PIO_COMPLETE       (0x1 << 25)
-#define IVTV_IRQ_DEC_AUD_MODE_CHG       (0x1 << 24)
-#define IVTV_IRQ_DEC_DATA_REQ           (0x1 << 22)
-#define IVTV_IRQ_DEC_DMA_COMPLETE       (0x1 << 20)
-#define IVTV_IRQ_DEC_VBI_RE_INSERT      (0x1 << 19)
-#define IVTV_IRQ_DMA_ERR                (0x1 << 18)
-#define IVTV_IRQ_DMA_WRITE              (0x1 << 17)
-#define IVTV_IRQ_DMA_READ               (0x1 << 16)
-#define IVTV_IRQ_DEC_VSYNC              (0x1 << 10)
+#define IVTV_IRQ_ENC_START_CAP          BIT(31)
+#define IVTV_IRQ_ENC_EOS                BIT(30)
+#define IVTV_IRQ_ENC_VBI_CAP            BIT(29)
+#define IVTV_IRQ_ENC_VIM_RST            BIT(28)
+#define IVTV_IRQ_ENC_DMA_COMPLETE       BIT(27)
+#define IVTV_IRQ_ENC_PIO_COMPLETE       BIT(25)
+#define IVTV_IRQ_DEC_AUD_MODE_CHG       BIT(24)
+#define IVTV_IRQ_DEC_DATA_REQ           BIT(22)
+#define IVTV_IRQ_DEC_DMA_COMPLETE       BIT(20)
+#define IVTV_IRQ_DEC_VBI_RE_INSERT      BIT(19)
+#define IVTV_IRQ_DMA_ERR                BIT(18)
+#define IVTV_IRQ_DMA_WRITE              BIT(17)
+#define IVTV_IRQ_DMA_READ               BIT(16)
+#define IVTV_IRQ_DEC_VSYNC              BIT(10)
 
 /* IRQ Masks */
 #define IVTV_IRQ_MASK_INIT (IVTV_IRQ_DMA_ERR|IVTV_IRQ_ENC_DMA_COMPLETE|\