diff options
author | Thierry Reding <treding@nvidia.com> | 2014-08-06 03:14:28 -0400 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2014-11-13 10:12:07 -0500 |
commit | 976cebc35bed0456a42bf96073a26f251d23b264 (patch) | |
tree | 611ecdac7589073a738b9ed49a80e1e04e2d4b14 /drivers/gpu/drm/tegra/dsi.c | |
parent | 0bfad396715a24e28d12d35f4a6ce87f65194609 (diff) |
drm/tegra: dsi: Make FIFO depths host parameters
Rather than hardcoding them as macros, make the host and video FIFO
depths parameters so that they can be more easily adjusted if a new
generation of the Tegra SoC changes them.
While at it, set the depth of the video FIFO to the correct value of
1920 *words* rather than *bytes*.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/dsi.c')
-rw-r--r-- | drivers/gpu/drm/tegra/dsi.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c index f7874458926a..584b771d8b2f 100644 --- a/drivers/gpu/drm/tegra/dsi.c +++ b/drivers/gpu/drm/tegra/dsi.c | |||
@@ -26,9 +26,6 @@ | |||
26 | #include "dsi.h" | 26 | #include "dsi.h" |
27 | #include "mipi-phy.h" | 27 | #include "mipi-phy.h" |
28 | 28 | ||
29 | #define DSI_VIDEO_FIFO_DEPTH (1920 / 4) | ||
30 | #define DSI_HOST_FIFO_DEPTH 64 | ||
31 | |||
32 | struct tegra_dsi { | 29 | struct tegra_dsi { |
33 | struct host1x_client client; | 30 | struct host1x_client client; |
34 | struct tegra_output output; | 31 | struct tegra_output output; |
@@ -54,6 +51,9 @@ struct tegra_dsi { | |||
54 | 51 | ||
55 | struct regulator *vdd; | 52 | struct regulator *vdd; |
56 | bool enabled; | 53 | bool enabled; |
54 | |||
55 | unsigned int video_fifo_depth; | ||
56 | unsigned int host_fifo_depth; | ||
57 | }; | 57 | }; |
58 | 58 | ||
59 | static inline struct tegra_dsi * | 59 | static inline struct tegra_dsi * |
@@ -467,7 +467,7 @@ static int tegra_output_dsi_enable(struct tegra_output *output) | |||
467 | DSI_CONTROL_SOURCE(dc->pipe); | 467 | DSI_CONTROL_SOURCE(dc->pipe); |
468 | tegra_dsi_writel(dsi, value, DSI_CONTROL); | 468 | tegra_dsi_writel(dsi, value, DSI_CONTROL); |
469 | 469 | ||
470 | tegra_dsi_writel(dsi, DSI_VIDEO_FIFO_DEPTH, DSI_MAX_THRESHOLD); | 470 | tegra_dsi_writel(dsi, dsi->video_fifo_depth, DSI_MAX_THRESHOLD); |
471 | 471 | ||
472 | value = DSI_HOST_CONTROL_HS | DSI_HOST_CONTROL_CS | | 472 | value = DSI_HOST_CONTROL_HS | DSI_HOST_CONTROL_CS | |
473 | DSI_HOST_CONTROL_ECC; | 473 | DSI_HOST_CONTROL_ECC; |
@@ -843,6 +843,8 @@ static int tegra_dsi_probe(struct platform_device *pdev) | |||
843 | return -ENOMEM; | 843 | return -ENOMEM; |
844 | 844 | ||
845 | dsi->output.dev = dsi->dev = &pdev->dev; | 845 | dsi->output.dev = dsi->dev = &pdev->dev; |
846 | dsi->video_fifo_depth = 1920; | ||
847 | dsi->host_fifo_depth = 64; | ||
846 | 848 | ||
847 | err = tegra_output_probe(&dsi->output); | 849 | err = tegra_output_probe(&dsi->output); |
848 | if (err < 0) | 850 | if (err < 0) |