diff options
author | Linus Walleij <linus.walleij@linaro.org> | 2015-12-06 04:55:28 -0500 |
---|---|---|
committer | Linus Walleij <linus.walleij@linaro.org> | 2016-01-05 05:21:05 -0500 |
commit | 5c77c0212b97693219ead6dcddf7e036421012d7 (patch) | |
tree | b79c4f6980af204992883f17ebf55926c64e92db /drivers/gpio/gpio-intel-mid.c | |
parent | f372d5f59cc4879eee3efe19e309f95c4078d748 (diff) |
gpio: intel-mid: use gpiochip data pointer
This makes the driver use the data pointer added to the gpio_chip
to store a pointer to the state container instead of relying on
container_of().
Cc: David Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/gpio/gpio-intel-mid.c')
-rw-r--r-- | drivers/gpio/gpio-intel-mid.c | 19 |
1 files changed, 7 insertions, 12 deletions
diff --git a/drivers/gpio/gpio-intel-mid.c b/drivers/gpio/gpio-intel-mid.c index 26d2083a5901..cdaba13cb8e8 100644 --- a/drivers/gpio/gpio-intel-mid.c +++ b/drivers/gpio/gpio-intel-mid.c | |||
@@ -78,15 +78,10 @@ struct intel_mid_gpio { | |||
78 | struct pci_dev *pdev; | 78 | struct pci_dev *pdev; |
79 | }; | 79 | }; |
80 | 80 | ||
81 | static inline struct intel_mid_gpio *to_intel_gpio_priv(struct gpio_chip *gc) | ||
82 | { | ||
83 | return container_of(gc, struct intel_mid_gpio, chip); | ||
84 | } | ||
85 | |||
86 | static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, | 81 | static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, |
87 | enum GPIO_REG reg_type) | 82 | enum GPIO_REG reg_type) |
88 | { | 83 | { |
89 | struct intel_mid_gpio *priv = to_intel_gpio_priv(chip); | 84 | struct intel_mid_gpio *priv = gpiochip_get_data(chip); |
90 | unsigned nreg = chip->ngpio / 32; | 85 | unsigned nreg = chip->ngpio / 32; |
91 | u8 reg = offset / 32; | 86 | u8 reg = offset / 32; |
92 | 87 | ||
@@ -96,7 +91,7 @@ static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, | |||
96 | static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, | 91 | static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, |
97 | enum GPIO_REG reg_type) | 92 | enum GPIO_REG reg_type) |
98 | { | 93 | { |
99 | struct intel_mid_gpio *priv = to_intel_gpio_priv(chip); | 94 | struct intel_mid_gpio *priv = gpiochip_get_data(chip); |
100 | unsigned nreg = chip->ngpio / 32; | 95 | unsigned nreg = chip->ngpio / 32; |
101 | u8 reg = offset / 16; | 96 | u8 reg = offset / 16; |
102 | 97 | ||
@@ -138,7 +133,7 @@ static void intel_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
138 | 133 | ||
139 | static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 134 | static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
140 | { | 135 | { |
141 | struct intel_mid_gpio *priv = to_intel_gpio_priv(chip); | 136 | struct intel_mid_gpio *priv = gpiochip_get_data(chip); |
142 | void __iomem *gpdr = gpio_reg(chip, offset, GPDR); | 137 | void __iomem *gpdr = gpio_reg(chip, offset, GPDR); |
143 | u32 value; | 138 | u32 value; |
144 | unsigned long flags; | 139 | unsigned long flags; |
@@ -161,7 +156,7 @@ static int intel_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |||
161 | static int intel_gpio_direction_output(struct gpio_chip *chip, | 156 | static int intel_gpio_direction_output(struct gpio_chip *chip, |
162 | unsigned offset, int value) | 157 | unsigned offset, int value) |
163 | { | 158 | { |
164 | struct intel_mid_gpio *priv = to_intel_gpio_priv(chip); | 159 | struct intel_mid_gpio *priv = gpiochip_get_data(chip); |
165 | void __iomem *gpdr = gpio_reg(chip, offset, GPDR); | 160 | void __iomem *gpdr = gpio_reg(chip, offset, GPDR); |
166 | unsigned long flags; | 161 | unsigned long flags; |
167 | 162 | ||
@@ -185,7 +180,7 @@ static int intel_gpio_direction_output(struct gpio_chip *chip, | |||
185 | static int intel_mid_irq_type(struct irq_data *d, unsigned type) | 180 | static int intel_mid_irq_type(struct irq_data *d, unsigned type) |
186 | { | 181 | { |
187 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 182 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
188 | struct intel_mid_gpio *priv = to_intel_gpio_priv(gc); | 183 | struct intel_mid_gpio *priv = gpiochip_get_data(gc); |
189 | u32 gpio = irqd_to_hwirq(d); | 184 | u32 gpio = irqd_to_hwirq(d); |
190 | unsigned long flags; | 185 | unsigned long flags; |
191 | u32 value; | 186 | u32 value; |
@@ -304,7 +299,7 @@ MODULE_DEVICE_TABLE(pci, intel_gpio_ids); | |||
304 | static void intel_mid_irq_handler(struct irq_desc *desc) | 299 | static void intel_mid_irq_handler(struct irq_desc *desc) |
305 | { | 300 | { |
306 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); | 301 | struct gpio_chip *gc = irq_desc_get_handler_data(desc); |
307 | struct intel_mid_gpio *priv = to_intel_gpio_priv(gc); | 302 | struct intel_mid_gpio *priv = gpiochip_get_data(gc); |
308 | struct irq_data *data = irq_desc_get_irq_data(desc); | 303 | struct irq_data *data = irq_desc_get_irq_data(desc); |
309 | struct irq_chip *chip = irq_data_get_irq_chip(data); | 304 | struct irq_chip *chip = irq_data_get_irq_chip(data); |
310 | u32 base, gpio, mask; | 305 | u32 base, gpio, mask; |
@@ -406,7 +401,7 @@ static int intel_gpio_probe(struct pci_dev *pdev, | |||
406 | spin_lock_init(&priv->lock); | 401 | spin_lock_init(&priv->lock); |
407 | 402 | ||
408 | pci_set_drvdata(pdev, priv); | 403 | pci_set_drvdata(pdev, priv); |
409 | retval = gpiochip_add(&priv->chip); | 404 | retval = gpiochip_add_data(&priv->chip, priv); |
410 | if (retval) { | 405 | if (retval) { |
411 | dev_err(&pdev->dev, "gpiochip_add error %d\n", retval); | 406 | dev_err(&pdev->dev, "gpiochip_add error %d\n", retval); |
412 | return retval; | 407 | return retval; |