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authorAlan Tull <atull@kernel.org>2017-11-15 15:20:18 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2017-11-28 10:30:37 -0500
commited81f5fc3c35c22d0fc62813cfa4e11b6aea0a64 (patch)
treef3109f452fb0ec191b1096a6640b80e77af07440 /drivers/fpga/fpga-region.c
parent1743df83ae5a949037eb86a12f225abd4374d176 (diff)
fpga: region: fix slow warning with more than one overlay
When DT overlays are applied, each FPGA region keeps track of the fpga image info as region->info. This pointer is assigned only if an overlay causes the FPGA to be programmed. As it stands, this pointer can be overwritten, causing a slow warning later when overlays are removed. This patch fixes this by changing the allowed behaviour. If a region has received an overlay that programmed the FPGA, reject other overlays that try to program the FPGA. To reprogram the FPGA, first remove the overlay. This makes sense as removing the overlay also removes the devices cleanly. Note that overlays that make DT changes without reprogramming the FPGA are exempt from this restriction. Signed-off-by: Alan Tull <atull@kernel.org> Acked-by: Moritz Fischer <mdf@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/fpga/fpga-region.c')
-rw-r--r--drivers/fpga/fpga-region.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/fpga/fpga-region.c b/drivers/fpga/fpga-region.c
index afac5433978b..35af952a889a 100644
--- a/drivers/fpga/fpga-region.c
+++ b/drivers/fpga/fpga-region.c
@@ -355,6 +355,11 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region,
355 const char *firmware_name; 355 const char *firmware_name;
356 int ret; 356 int ret;
357 357
358 if (region->info) {
359 dev_err(dev, "Region already has overlay applied.\n");
360 return -EINVAL;
361 }
362
358 /* 363 /*
359 * Reject overlay if child FPGA Regions added in the overlay have 364 * Reject overlay if child FPGA Regions added in the overlay have
360 * firmware-name property (would mean that an FPGA region that has 365 * firmware-name property (would mean that an FPGA region that has