diff options
author | Stephen Boyd <sboyd@codeaurora.org> | 2015-04-10 19:11:02 -0400 |
---|---|---|
committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2015-06-02 06:10:08 -0400 |
commit | 4ba15d1d41ba9a51da2dc986c145b7514cc394be (patch) | |
tree | 303c8647c2d486884c16abb1eea9cf5348ad6c69 /drivers/clocksource/qcom-timer.c | |
parent | ac34ad27fc160b5bd31c731cdaaf6e1d1890ccb2 (diff) |
clocksource/drivers/qcom: Remove dead code
This code is no longer used now that mach-msm has been removed.
Delete it.
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'drivers/clocksource/qcom-timer.c')
-rw-r--r-- | drivers/clocksource/qcom-timer.c | 59 |
1 files changed, 0 insertions, 59 deletions
diff --git a/drivers/clocksource/qcom-timer.c b/drivers/clocksource/qcom-timer.c index 098c542e5c53..cba2d015564c 100644 --- a/drivers/clocksource/qcom-timer.c +++ b/drivers/clocksource/qcom-timer.c | |||
@@ -40,8 +40,6 @@ | |||
40 | 40 | ||
41 | #define GPT_HZ 32768 | 41 | #define GPT_HZ 32768 |
42 | 42 | ||
43 | #define MSM_DGT_SHIFT 5 | ||
44 | |||
45 | static void __iomem *event_base; | 43 | static void __iomem *event_base; |
46 | static void __iomem *sts_base; | 44 | static void __iomem *sts_base; |
47 | 45 | ||
@@ -232,7 +230,6 @@ err: | |||
232 | register_current_timer_delay(&msm_delay_timer); | 230 | register_current_timer_delay(&msm_delay_timer); |
233 | } | 231 | } |
234 | 232 | ||
235 | #ifdef CONFIG_ARCH_QCOM | ||
236 | static void __init msm_dt_timer_init(struct device_node *np) | 233 | static void __init msm_dt_timer_init(struct device_node *np) |
237 | { | 234 | { |
238 | u32 freq; | 235 | u32 freq; |
@@ -285,59 +282,3 @@ static void __init msm_dt_timer_init(struct device_node *np) | |||
285 | } | 282 | } |
286 | CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init); | 283 | CLOCKSOURCE_OF_DECLARE(kpss_timer, "qcom,kpss-timer", msm_dt_timer_init); |
287 | CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init); | 284 | CLOCKSOURCE_OF_DECLARE(scss_timer, "qcom,scss-timer", msm_dt_timer_init); |
288 | #else | ||
289 | |||
290 | static int __init msm_timer_map(phys_addr_t addr, u32 event, u32 source, | ||
291 | u32 sts) | ||
292 | { | ||
293 | void __iomem *base; | ||
294 | |||
295 | base = ioremap(addr, SZ_256); | ||
296 | if (!base) { | ||
297 | pr_err("Failed to map timer base\n"); | ||
298 | return -ENOMEM; | ||
299 | } | ||
300 | event_base = base + event; | ||
301 | source_base = base + source; | ||
302 | if (sts) | ||
303 | sts_base = base + sts; | ||
304 | |||
305 | return 0; | ||
306 | } | ||
307 | |||
308 | static notrace cycle_t msm_read_timer_count_shift(struct clocksource *cs) | ||
309 | { | ||
310 | /* | ||
311 | * Shift timer count down by a constant due to unreliable lower bits | ||
312 | * on some targets. | ||
313 | */ | ||
314 | return msm_read_timer_count(cs) >> MSM_DGT_SHIFT; | ||
315 | } | ||
316 | |||
317 | void __init msm7x01_timer_init(void) | ||
318 | { | ||
319 | struct clocksource *cs = &msm_clocksource; | ||
320 | |||
321 | if (msm_timer_map(0xc0100000, 0x0, 0x10, 0x0)) | ||
322 | return; | ||
323 | cs->read = msm_read_timer_count_shift; | ||
324 | cs->mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT)); | ||
325 | /* 600 KHz */ | ||
326 | msm_timer_init(19200000 >> MSM_DGT_SHIFT, 32 - MSM_DGT_SHIFT, 7, | ||
327 | false); | ||
328 | } | ||
329 | |||
330 | void __init msm7x30_timer_init(void) | ||
331 | { | ||
332 | if (msm_timer_map(0xc0100000, 0x4, 0x24, 0x80)) | ||
333 | return; | ||
334 | msm_timer_init(24576000 / 4, 32, 1, false); | ||
335 | } | ||
336 | |||
337 | void __init qsd8x50_timer_init(void) | ||
338 | { | ||
339 | if (msm_timer_map(0xAC100000, 0x0, 0x10, 0x34)) | ||
340 | return; | ||
341 | msm_timer_init(19200000 / 4, 32, 7, false); | ||
342 | } | ||
343 | #endif | ||