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authorPawan Gupta <pawan.kumar.gupta@linux.intel.com>2019-10-23 04:52:35 -0400
committerThomas Gleixner <tglx@linutronix.de>2019-10-28 03:36:58 -0400
commit286836a70433fb64131d2590f4bf512097c255e1 (patch)
treeebe852b24b62aeaa315695707b1832ad2e53244e /arch/x86
parentc2955f270a84762343000f103e0640d29c7a96f3 (diff)
x86/cpu: Add a helper function x86_read_arch_cap_msr()
Add a helper function to read the IA32_ARCH_CAPABILITIES MSR. Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Neelima Krishnan <neelima.krishnan@intel.com> Reviewed-by: Mark Gross <mgross@linux.intel.com> Reviewed-by: Tony Luck <tony.luck@intel.com> Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Diffstat (limited to 'arch/x86')
-rw-r--r--arch/x86/kernel/cpu/common.c15
-rw-r--r--arch/x86/kernel/cpu/cpu.h2
2 files changed, 13 insertions, 4 deletions
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 9ae7d1bcd4f4..897c8302d982 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1092,19 +1092,26 @@ static bool __init cpu_matches(unsigned long which)
1092 return m && !!(m->driver_data & which); 1092 return m && !!(m->driver_data & which);
1093} 1093}
1094 1094
1095static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c) 1095u64 x86_read_arch_cap_msr(void)
1096{ 1096{
1097 u64 ia32_cap = 0; 1097 u64 ia32_cap = 0;
1098 1098
1099 if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1100 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap);
1101
1102 return ia32_cap;
1103}
1104
1105static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
1106{
1107 u64 ia32_cap = x86_read_arch_cap_msr();
1108
1099 if (cpu_matches(NO_SPECULATION)) 1109 if (cpu_matches(NO_SPECULATION))
1100 return; 1110 return;
1101 1111
1102 setup_force_cpu_bug(X86_BUG_SPECTRE_V1); 1112 setup_force_cpu_bug(X86_BUG_SPECTRE_V1);
1103 setup_force_cpu_bug(X86_BUG_SPECTRE_V2); 1113 setup_force_cpu_bug(X86_BUG_SPECTRE_V2);
1104 1114
1105 if (cpu_has(c, X86_FEATURE_ARCH_CAPABILITIES))
1106 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap);
1107
1108 if (!cpu_matches(NO_SSB) && !(ia32_cap & ARCH_CAP_SSB_NO) && 1115 if (!cpu_matches(NO_SSB) && !(ia32_cap & ARCH_CAP_SSB_NO) &&
1109 !cpu_has(c, X86_FEATURE_AMD_SSB_NO)) 1116 !cpu_has(c, X86_FEATURE_AMD_SSB_NO))
1110 setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS); 1117 setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS);
diff --git a/arch/x86/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h
index c0e2407abdd6..a5cd0eba2746 100644
--- a/arch/x86/kernel/cpu/cpu.h
+++ b/arch/x86/kernel/cpu/cpu.h
@@ -62,4 +62,6 @@ unsigned int aperfmperf_get_khz(int cpu);
62 62
63extern void x86_spec_ctrl_setup_ap(void); 63extern void x86_spec_ctrl_setup_ap(void);
64 64
65extern u64 x86_read_arch_cap_msr(void);
66
65#endif /* ARCH_X86_CPU_H */ 67#endif /* ARCH_X86_CPU_H */