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author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-06-05 19:11:43 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-06-05 19:11:43 -0400 |
commit | f60342fac9fae20ada2cd5faadbc2a1337cae03f (patch) | |
tree | fe64b1cb3ea699d819e5e808264903aee2d8dc9a /arch/mips/boot | |
parent | 5231804cf9e584f3e7e763a0d6d2fffe011c1bce (diff) | |
parent | ef5332c10d4f332a2ac79e9ad5452f4e89d1815a (diff) |
Merge tag 'mmc-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson:
"MMC core:
- Decrease polling rate for erase/trim/discard
- Allow non-sleeping GPIOs for card detect
- Improve mmc block removal path
- Enable support for mmc_sw_reset() for SDIO cards
- Add mmc_sw_reset() to allow users to do a soft reset of the card
- Allow power delay to be tunable via DT
- Allow card detect debounce delay to be tunable via DT
- Enable new quirk to limit clock rate for Marvell 8887 chip
- Don't show eMMC RPMB and BOOT areas in /proc/partitions
- Add capability to avoid 3.3V signaling for fragile HWs
MMC host:
- Improve/fixup support for handle highmem pages
- Remove depends on HAS_DMA in case of platform dependency
- mvsdio: Enable support for erase/trim/discard
- rtsx_usb: Enable support for erase/trim/discard
- renesas_sdhi: Fix WP logic regressions
- renesas_sdhi: Add r8a77965 support
- renesas_sdhi: Add R8A77980 to whitelist
- meson: Add optional support for device reset
- meson: Add support for the Meson-AXG platform
- dw_mmc: Add new driver for BlueField DW variant
- mediatek: Add support for 64G DRAM DMA
- sunxi: Deploy runtime PM support
- jz4740: Add support for JZ4780
- jz4740: Enable support for DT based platforms
- sdhci: Various improvement to timeout handling
- sdhci: Disable support for HS200/HS400/UHS when no 1.8V support
- sdhci-omap: Add support for controller in k2g SoC
- sdhci-omap: Add workarounds for a couple of Erratas
- sdhci-omap: Enable support for generic sdhci DT properties
- sdhci-cadence: Re-send tune request to deal with errata
- sdhci-pci: Fix 3.3V voltage switch for some BYT-based Intel controllers
- sdhci-pci: Avoid 3.3V signaling on some NI 904x
- sdhci-esdhc-imx: Use watermark levels for PIO access
- sdhci-msm: Improve card detection handling
- sdhci-msm: Add support voltage pad switching"
* tag 'mmc-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (104 commits)
mmc: renesas_sdhi: really fix WP logic regressions
mmc: mvsdio: Enable MMC_CAP_ERASE
mmc: mvsdio: Respect card busy time out from mmc core
mmc: sdhci-msm: Remove NO_CARD_NO_RESET quirk
mmc: sunxi: Use ifdef rather than __maybe_unused
mmc: mxmmc: Use ifdef rather than __maybe_unused
mmc: mxmmc: include linux/highmem.h
mmc: sunxi: mark PM functions as __maybe_unused
mmc: Throttle calls to MMC_SEND_STATUS during mmc_do_erase()
mmc: au1xmmc: handle highmem pages
mmc: Allow non-sleeping GPIO cd
mmc: sdhci-*: Don't emit error msg if sdhci_add_host() fails
mmc: sd: Define name for default speed dtr
mmc: core: Move calls to ->prepare_hs400_tuning() closer to mmc code
mmc: sdhci-xenon: use match_string() helper
mmc: wbsd: handle highmem pages
mmc: ushc: handle highmem pages
mmc: mxcmmc: handle highmem pages
mmc: atmel-mci: use sg_copy_{from,to}_buffer
mmc: android-goldfish: use sg_copy_{from,to}_buffer
...
Diffstat (limited to 'arch/mips/boot')
-rw-r--r-- | arch/mips/boot/dts/ingenic/ci20.dts | 34 | ||||
-rw-r--r-- | arch/mips/boot/dts/ingenic/jz4780.dtsi | 52 |
2 files changed, 86 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index 38078594cf97..50cff3cbcc6d 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts | |||
@@ -36,6 +36,28 @@ | |||
36 | clock-frequency = <48000000>; | 36 | clock-frequency = <48000000>; |
37 | }; | 37 | }; |
38 | 38 | ||
39 | &mmc0 { | ||
40 | status = "okay"; | ||
41 | |||
42 | bus-width = <4>; | ||
43 | max-frequency = <50000000>; | ||
44 | |||
45 | pinctrl-names = "default"; | ||
46 | pinctrl-0 = <&pins_mmc0>; | ||
47 | |||
48 | cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>; | ||
49 | }; | ||
50 | |||
51 | &mmc1 { | ||
52 | status = "okay"; | ||
53 | |||
54 | bus-width = <4>; | ||
55 | max-frequency = <50000000>; | ||
56 | |||
57 | pinctrl-names = "default"; | ||
58 | pinctrl-0 = <&pins_mmc1>; | ||
59 | }; | ||
60 | |||
39 | &uart0 { | 61 | &uart0 { |
40 | status = "okay"; | 62 | status = "okay"; |
41 | 63 | ||
@@ -203,4 +225,16 @@ | |||
203 | groups = "nemc-cs6"; | 225 | groups = "nemc-cs6"; |
204 | bias-disable; | 226 | bias-disable; |
205 | }; | 227 | }; |
228 | |||
229 | pins_mmc0: mmc0 { | ||
230 | function = "mmc0"; | ||
231 | groups = "mmc0-1bit-e", "mmc0-4bit-e"; | ||
232 | bias-disable; | ||
233 | }; | ||
234 | |||
235 | pins_mmc1: mmc1 { | ||
236 | function = "mmc1"; | ||
237 | groups = "mmc1-1bit-d", "mmc1-4bit-d"; | ||
238 | bias-disable; | ||
239 | }; | ||
206 | }; | 240 | }; |
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index 9b5794667aee..b72e53bb7292 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi | |||
@@ -1,5 +1,6 @@ | |||
1 | // SPDX-License-Identifier: GPL-2.0 | 1 | // SPDX-License-Identifier: GPL-2.0 |
2 | #include <dt-bindings/clock/jz4780-cgu.h> | 2 | #include <dt-bindings/clock/jz4780-cgu.h> |
3 | #include <dt-bindings/dma/jz4780-dma.h> | ||
3 | 4 | ||
4 | / { | 5 | / { |
5 | #address-cells = <1>; | 6 | #address-cells = <1>; |
@@ -241,6 +242,57 @@ | |||
241 | status = "disabled"; | 242 | status = "disabled"; |
242 | }; | 243 | }; |
243 | 244 | ||
245 | dma: dma@13420000 { | ||
246 | compatible = "ingenic,jz4780-dma"; | ||
247 | reg = <0x13420000 0x10000>; | ||
248 | #dma-cells = <2>; | ||
249 | |||
250 | interrupt-parent = <&intc>; | ||
251 | interrupts = <10>; | ||
252 | |||
253 | clocks = <&cgu JZ4780_CLK_PDMA>; | ||
254 | }; | ||
255 | |||
256 | mmc0: mmc@13450000 { | ||
257 | compatible = "ingenic,jz4780-mmc"; | ||
258 | reg = <0x13450000 0x1000>; | ||
259 | |||
260 | interrupt-parent = <&intc>; | ||
261 | interrupts = <37>; | ||
262 | |||
263 | clocks = <&cgu JZ4780_CLK_MSC0>; | ||
264 | clock-names = "mmc"; | ||
265 | |||
266 | cap-sd-highspeed; | ||
267 | cap-mmc-highspeed; | ||
268 | cap-sdio-irq; | ||
269 | dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>, | ||
270 | <&dma JZ4780_DMA_MSC0_TX 0xffffffff>; | ||
271 | dma-names = "rx", "tx"; | ||
272 | |||
273 | status = "disabled"; | ||
274 | }; | ||
275 | |||
276 | mmc1: mmc@13460000 { | ||
277 | compatible = "ingenic,jz4780-mmc"; | ||
278 | reg = <0x13460000 0x1000>; | ||
279 | |||
280 | interrupt-parent = <&intc>; | ||
281 | interrupts = <36>; | ||
282 | |||
283 | clocks = <&cgu JZ4780_CLK_MSC1>; | ||
284 | clock-names = "mmc"; | ||
285 | |||
286 | cap-sd-highspeed; | ||
287 | cap-mmc-highspeed; | ||
288 | cap-sdio-irq; | ||
289 | dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>, | ||
290 | <&dma JZ4780_DMA_MSC1_TX 0xffffffff>; | ||
291 | dma-names = "rx", "tx"; | ||
292 | |||
293 | status = "disabled"; | ||
294 | }; | ||
295 | |||
244 | bch: bch@134d0000 { | 296 | bch: bch@134d0000 { |
245 | compatible = "ingenic,jz4780-bch"; | 297 | compatible = "ingenic,jz4780-bch"; |
246 | reg = <0x134d0000 0x10000>; | 298 | reg = <0x134d0000 0x10000>; |