aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/boot
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2018-04-10 14:39:22 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2018-04-10 14:39:22 -0400
commit948869fa9f391664cfe008fa9968a1110bfd14fd (patch)
tree8cab813f6064d9bfa03fdfe6524277ca41e65305 /arch/mips/boot
parent2a56bb596b2c1fb612f9988afda9655c8c872a6e (diff)
parenta5075e6226c42a8e64ea1b862eec7747dc46cb32 (diff)
Merge tag 'mips_4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips
Pull MIPS updates from James Hogan: "These are the main MIPS changes for 4.17. Rough overview: (1) generic platform: Add support for Microsemi Ocelot SoCs (2) crypto: Add CRC32 and CRC32C HW acceleration module (3) Various cleanups and misc improvements More detailed summary: Miscellaneous: - hang more efficiently on halt/powerdown/restart - pm-cps: Block system suspend when a JTAG probe is present - expand make help text for generic defconfigs - refactor handling of legacy defconfigs - determine the entry point from the ELF file header to fix microMIPS for certain toolchains - introduce isa-rev.h for MIPS_ISA_REV and use to simplify other code Minor cleanups: - DTS: boston/ci20: Unit name cleanups and correction - kdump: Make the default for PHYSICAL_START always 64-bit - constify gpio_led in Alchemy, AR7, and TXX9 - silence a couple of W=1 warnings - remove duplicate includes Platform support: Generic platform: - add support for Microsemi Ocelot - dt-bindings: Add vendor prefix for Microsemi Corporation - dt-bindings: Add bindings for Microsemi SoCs - add ocelot SoC & PCB123 board DTS files - MAINTAINERS: Add entry for Microsemi MIPS SoCs - enable crc32-mips on r6 configs ath79: - fix AR724X_PLL_REG_PCIE_CONFIG offset BCM47xx: - firmware: Use mac_pton() for MAC address parsing - add Luxul XAP1500/XWR1750 WiFi LEDs - use standard reset button for Luxul XWR-1750 BMIPS: - enable CONFIG_BRCMSTB_PM in bmips_stb_defconfig for build coverage - add STB PM, wake-up timer, watchdog DT nodes Octeon: - drop '.' after newlines in printk calls ralink: - pci-mt7621: Enable PCIe on MT7688" * tag 'mips_4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips: (37 commits) MIPS: BCM47XX: Use standard reset button for Luxul XWR-1750 MIPS: BCM47XX: Add Luxul XAP1500/XWR1750 WiFi LEDs MIPS: Make the default for PHYSICAL_START always 64-bit MIPS: Use the entry point from the ELF file header MAINTAINERS: Add entry for Microsemi MIPS SoCs MIPS: generic: Add support for Microsemi Ocelot MIPS: mscc: Add ocelot PCB123 device tree MIPS: mscc: Add ocelot dtsi dt-bindings: mips: Add bindings for Microsemi SoCs dt-bindings: Add vendor prefix for Microsemi Corporation MIPS: ath79: Fix AR724X_PLL_REG_PCIE_CONFIG offset MIPS: pci-mt7620: Enable PCIe on MT7688 MIPS: pm-cps: Block system suspend when a JTAG probe is present MIPS: VDSO: Replace __mips_isa_rev with MIPS_ISA_REV MIPS: BPF: Replace __mips_isa_rev with MIPS_ISA_REV MIPS: cpu-features.h: Replace __mips_isa_rev with MIPS_ISA_REV MIPS: Introduce isa-rev.h to define MIPS_ISA_REV MIPS: Hang more efficiently on halt/powerdown/restart FIRMWARE: bcm47xx_nvram: Replace mac address parsing MIPS: BMIPS: Add Broadcom STB watchdog nodes ...
Diffstat (limited to 'arch/mips/boot')
-rw-r--r--arch/mips/boot/dts/Makefile1
-rw-r--r--arch/mips/boot/dts/brcm/bcm7125.dtsi7
-rw-r--r--arch/mips/boot/dts/brcm/bcm7346.dtsi62
-rw-r--r--arch/mips/boot/dts/brcm/bcm7358.dtsi17
-rw-r--r--arch/mips/boot/dts/brcm/bcm7360.dtsi62
-rw-r--r--arch/mips/boot/dts/brcm/bcm7362.dtsi62
-rw-r--r--arch/mips/boot/dts/brcm/bcm7420.dtsi7
-rw-r--r--arch/mips/boot/dts/brcm/bcm7425.dtsi89
-rw-r--r--arch/mips/boot/dts/brcm/bcm7435.dtsi89
-rw-r--r--arch/mips/boot/dts/brcm/bcm97125cbmb.dts4
-rw-r--r--arch/mips/boot/dts/brcm/bcm97346dbsmb.dts8
-rw-r--r--arch/mips/boot/dts/brcm/bcm97358svmb.dts8
-rw-r--r--arch/mips/boot/dts/brcm/bcm97360svmb.dts8
-rw-r--r--arch/mips/boot/dts/brcm/bcm97362svmb.dts8
-rw-r--r--arch/mips/boot/dts/brcm/bcm97420c.dts4
-rw-r--r--arch/mips/boot/dts/brcm/bcm97425svmb.dts8
-rw-r--r--arch/mips/boot/dts/brcm/bcm97435svmb.dts8
-rw-r--r--arch/mips/boot/dts/img/boston.dts2
-rw-r--r--arch/mips/boot/dts/ingenic/ci20.dts8
-rw-r--r--arch/mips/boot/dts/mscc/Makefile3
-rw-r--r--arch/mips/boot/dts/mscc/ocelot.dtsi117
-rw-r--r--arch/mips/boot/dts/mscc/ocelot_pcb123.dts27
22 files changed, 604 insertions, 5 deletions
diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index e2c6f131c8eb..1e79cab8e269 100644
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ subdir-y += cavium-octeon
4subdir-y += img 4subdir-y += img
5subdir-y += ingenic 5subdir-y += ingenic
6subdir-y += lantiq 6subdir-y += lantiq
7subdir-y += mscc
7subdir-y += mti 8subdir-y += mti
8subdir-y += netlogic 9subdir-y += netlogic
9subdir-y += ni 10subdir-y += ni
diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
index 2f9ef565e5d0..5bf77b6fcceb 100644
--- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
@@ -198,6 +198,13 @@
198 status = "disabled"; 198 status = "disabled";
199 }; 199 };
200 200
201 watchdog: watchdog@4067e8 {
202 clocks = <&upg_clk>;
203 compatible = "brcm,bcm7038-wdt";
204 reg = <0x4067e8 0x14>;
205 status = "disabled";
206 };
207
201 upg_gio: gpio@406700 { 208 upg_gio: gpio@406700 {
202 compatible = "brcm,brcmstb-gpio"; 209 compatible = "brcm,brcmstb-gpio";
203 reg = <0x406700 0x80>; 210 reg = <0x406700 0x80>;
diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index 02e426fe6013..2afa0dada575 100644
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -233,6 +233,13 @@
233 status = "disabled"; 233 status = "disabled";
234 }; 234 };
235 235
236 watchdog: watchdog@4067e8 {
237 clocks = <&upg_clk>;
238 compatible = "brcm,bcm7038-wdt";
239 reg = <0x4067e8 0x14>;
240 status = "disabled";
241 };
242
236 aon_pm_l2_intc: interrupt-controller@408440 { 243 aon_pm_l2_intc: interrupt-controller@408440 {
237 compatible = "brcm,l2-intc"; 244 compatible = "brcm,l2-intc";
238 reg = <0x408440 0x30>; 245 reg = <0x408440 0x30>;
@@ -243,6 +250,17 @@
243 brcm,irq-can-wake; 250 brcm,irq-can-wake;
244 }; 251 };
245 252
253 aon_ctrl: syscon@408000 {
254 compatible = "brcm,brcmstb-aon-ctrl";
255 reg = <0x408000 0x100>, <0x408200 0x200>;
256 reg-names = "aon-ctrl", "aon-sram";
257 };
258
259 timers: timer@4067c0 {
260 compatible = "brcm,brcmstb-timers";
261 reg = <0x4067c0 0x40>;
262 };
263
246 upg_gio: gpio@406700 { 264 upg_gio: gpio@406700 {
247 compatible = "brcm,brcmstb-gpio"; 265 compatible = "brcm,brcmstb-gpio";
248 reg = <0x406700 0x60>; 266 reg = <0x406700 0x60>;
@@ -483,5 +501,49 @@
483 interrupt-names = "mspi_done"; 501 interrupt-names = "mspi_done";
484 status = "disabled"; 502 status = "disabled";
485 }; 503 };
504
505 waketimer: waketimer@408e80 {
506 compatible = "brcm,brcmstb-waketimer";
507 reg = <0x408e80 0x14>;
508 interrupts = <0x3>;
509 interrupt-parent = <&aon_pm_l2_intc>;
510 interrupt-names = "timer";
511 clocks = <&upg_clk>;
512 status = "disabled";
513 };
514 };
515
516 memory_controllers {
517 compatible = "simple-bus";
518 ranges = <0x0 0x103b0000 0xa000>;
519 #address-cells = <1>;
520 #size-cells = <1>;
521
522 memory-controller@0 {
523 compatible = "brcm,brcmstb-memc", "simple-bus";
524 ranges = <0x0 0x0 0xa000>;
525 #address-cells = <1>;
526 #size-cells = <1>;
527
528 memc-arb@1000 {
529 compatible = "brcm,brcmstb-memc-arb";
530 reg = <0x1000 0x248>;
531 };
532
533 memc-ddr@2000 {
534 compatible = "brcm,brcmstb-memc-ddr";
535 reg = <0x2000 0x300>;
536 };
537
538 ddr-phy@6000 {
539 compatible = "brcm,brcmstb-ddr-phy";
540 reg = <0x6000 0xc8>;
541 };
542
543 shimphy@8000 {
544 compatible = "brcm,brcmstb-ddr-shimphy";
545 reg = <0x8000 0x13c>;
546 };
547 };
486 }; 548 };
487}; 549};
diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
index 1089d6ebc841..6375fc77f389 100644
--- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
@@ -217,6 +217,13 @@
217 status = "disabled"; 217 status = "disabled";
218 }; 218 };
219 219
220 watchdog: watchdog@4066a8 {
221 clocks = <&upg_clk>;
222 compatible = "brcm,bcm7038-wdt";
223 reg = <0x4066a8 0x14>;
224 status = "disabled";
225 };
226
220 aon_pm_l2_intc: interrupt-controller@408240 { 227 aon_pm_l2_intc: interrupt-controller@408240 {
221 compatible = "brcm,l2-intc"; 228 compatible = "brcm,l2-intc";
222 reg = <0x408240 0x30>; 229 reg = <0x408240 0x30>;
@@ -362,5 +369,15 @@
362 interrupt-names = "mspi_done"; 369 interrupt-names = "mspi_done";
363 status = "disabled"; 370 status = "disabled";
364 }; 371 };
372
373 waketimer: waketimer@408e80 {
374 compatible = "brcm,brcmstb-waketimer";
375 reg = <0x408e80 0x14>;
376 interrupts = <0x3>;
377 interrupt-parent = <&aon_pm_l2_intc>;
378 interrupt-names = "timer";
379 clocks = <&upg_clk>;
380 status = "disabled";
381 };
365 }; 382 };
366}; 383};
diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index 4b87ebec407a..a57cacea91cf 100644
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -209,6 +209,13 @@
209 status = "disabled"; 209 status = "disabled";
210 }; 210 };
211 211
212 watchdog: watchdog@4066a8 {
213 clocks = <&upg_clk>;
214 compatible = "brcm,bcm7038-wdt";
215 reg = <0x4066a8 0x14>;
216 status = "disabled";
217 };
218
212 aon_pm_l2_intc: interrupt-controller@408440 { 219 aon_pm_l2_intc: interrupt-controller@408440 {
213 compatible = "brcm,l2-intc"; 220 compatible = "brcm,l2-intc";
214 reg = <0x408440 0x30>; 221 reg = <0x408440 0x30>;
@@ -219,6 +226,17 @@
219 brcm,irq-can-wake; 226 brcm,irq-can-wake;
220 }; 227 };
221 228
229 aon_ctrl: syscon@408000 {
230 compatible = "brcm,brcmstb-aon-ctrl";
231 reg = <0x408000 0x100>, <0x408200 0x200>;
232 reg-names = "aon-ctrl", "aon-sram";
233 };
234
235 timers: timer@406680 {
236 compatible = "brcm,brcmstb-timers";
237 reg = <0x406680 0x40>;
238 };
239
222 upg_gio: gpio@406500 { 240 upg_gio: gpio@406500 {
223 compatible = "brcm,brcmstb-gpio"; 241 compatible = "brcm,brcmstb-gpio";
224 reg = <0x406500 0xa0>; 242 reg = <0x406500 0xa0>;
@@ -402,5 +420,49 @@
402 interrupt-names = "mspi_done"; 420 interrupt-names = "mspi_done";
403 status = "disabled"; 421 status = "disabled";
404 }; 422 };
423
424 waketimer: waketimer@408e80 {
425 compatible = "brcm,brcmstb-waketimer";
426 reg = <0x408e80 0x14>;
427 interrupts = <0x3>;
428 interrupt-parent = <&aon_pm_l2_intc>;
429 interrupt-names = "timer";
430 clocks = <&upg_clk>;
431 status = "disabled";
432 };
433 };
434
435 memory_controllers {
436 compatible = "simple-bus";
437 ranges = <0x0 0x103b0000 0xa000>;
438 #address-cells = <1>;
439 #size-cells = <1>;
440
441 memory-controller@0 {
442 compatible = "brcm,brcmstb-memc", "simple-bus";
443 ranges = <0x0 0x0 0xa000>;
444 #address-cells = <1>;
445 #size-cells = <1>;
446
447 memc-arb@1000 {
448 compatible = "brcm,brcmstb-memc-arb";
449 reg = <0x1000 0x248>;
450 };
451
452 memc-ddr@2000 {
453 compatible = "brcm,brcmstb-memc-ddr";
454 reg = <0x2000 0x300>;
455 };
456
457 ddr-phy@6000 {
458 compatible = "brcm,brcmstb-ddr-phy";
459 reg = <0x6000 0xc8>;
460 };
461
462 shimphy@8000 {
463 compatible = "brcm,brcmstb-ddr-shimphy";
464 reg = <0x8000 0x13c>;
465 };
466 };
405 }; 467 };
406}; 468};
diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index ca657df34b6d..728b9e9f84b8 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -205,6 +205,13 @@
205 status = "disabled"; 205 status = "disabled";
206 }; 206 };
207 207
208 watchdog: watchdog@4066a8 {
209 clocks = <&upg_clk>;
210 compatible = "brcm,bcm7038-wdt";
211 reg = <0x4066a8 0x14>;
212 status = "disabled";
213 };
214
208 aon_pm_l2_intc: interrupt-controller@408440 { 215 aon_pm_l2_intc: interrupt-controller@408440 {
209 compatible = "brcm,l2-intc"; 216 compatible = "brcm,l2-intc";
210 reg = <0x408440 0x30>; 217 reg = <0x408440 0x30>;
@@ -215,6 +222,17 @@
215 brcm,irq-can-wake; 222 brcm,irq-can-wake;
216 }; 223 };
217 224
225 aon_ctrl: syscon@408000 {
226 compatible = "brcm,brcmstb-aon-ctrl";
227 reg = <0x408000 0x100>, <0x408200 0x200>;
228 reg-names = "aon-ctrl", "aon-sram";
229 };
230
231 timers: timer@406680 {
232 compatible = "brcm,brcmstb-timers";
233 reg = <0x406680 0x40>;
234 };
235
218 upg_gio: gpio@406500 { 236 upg_gio: gpio@406500 {
219 compatible = "brcm,brcmstb-gpio"; 237 compatible = "brcm,brcmstb-gpio";
220 reg = <0x406500 0xa0>; 238 reg = <0x406500 0xa0>;
@@ -398,5 +416,49 @@
398 interrupt-names = "mspi_done"; 416 interrupt-names = "mspi_done";
399 status = "disabled"; 417 status = "disabled";
400 }; 418 };
419
420 waketimer: waketimer@408e80 {
421 compatible = "brcm,brcmstb-waketimer";
422 reg = <0x408e80 0x14>;
423 interrupts = <0x3>;
424 interrupt-parent = <&aon_pm_l2_intc>;
425 interrupt-names = "timer";
426 clocks = <&upg_clk>;
427 status = "disabled";
428 };
429 };
430
431 memory_controllers {
432 compatible = "simple-bus";
433 ranges = <0x0 0x103b0000 0xa000>;
434 #address-cells = <1>;
435 #size-cells = <1>;
436
437 memory-controller@0 {
438 compatible = "brcm,brcmstb-memc", "simple-bus";
439 ranges = <0x0 0x0 0xa000>;
440 #address-cells = <1>;
441 #size-cells = <1>;
442
443 memc-arb@1000 {
444 compatible = "brcm,brcmstb-memc-arb";
445 reg = <0x1000 0x248>;
446 };
447
448 memc-ddr@2000 {
449 compatible = "brcm,brcmstb-memc-ddr";
450 reg = <0x2000 0x300>;
451 };
452
453 ddr-phy@6000 {
454 compatible = "brcm,brcmstb-ddr-phy";
455 reg = <0x6000 0xc8>;
456 };
457
458 shimphy@8000 {
459 compatible = "brcm,brcmstb-ddr-shimphy";
460 reg = <0x8000 0x13c>;
461 };
462 };
401 }; 463 };
402}; 464};
diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
index d262e11bc3f9..9540c27f12e7 100644
--- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
@@ -214,6 +214,13 @@
214 status = "disabled"; 214 status = "disabled";
215 }; 215 };
216 216
217 watchdog: watchdog@4067e8 {
218 clocks = <&upg_clk>;
219 compatible = "brcm,bcm7038-wdt";
220 reg = <0x4067e8 0x14>;
221 status = "disabled";
222 };
223
217 upg_gio: gpio@406700 { 224 upg_gio: gpio@406700 {
218 compatible = "brcm,brcmstb-gpio"; 225 compatible = "brcm,brcmstb-gpio";
219 reg = <0x406700 0x80>; 226 reg = <0x406700 0x80>;
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index e4fb9b6e6dce..410e61ebaf9e 100644
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -232,6 +232,13 @@
232 status = "disabled"; 232 status = "disabled";
233 }; 233 };
234 234
235 watchdog: watchdog@4067e8 {
236 clocks = <&upg_clk>;
237 compatible = "brcm,bcm7038-wdt";
238 reg = <0x4067e8 0x14>;
239 status = "disabled";
240 };
241
235 aon_pm_l2_intc: interrupt-controller@408440 { 242 aon_pm_l2_intc: interrupt-controller@408440 {
236 compatible = "brcm,l2-intc"; 243 compatible = "brcm,l2-intc";
237 reg = <0x408440 0x30>; 244 reg = <0x408440 0x30>;
@@ -242,6 +249,17 @@
242 brcm,irq-can-wake; 249 brcm,irq-can-wake;
243 }; 250 };
244 251
252 aon_ctrl: syscon@408000 {
253 compatible = "brcm,brcmstb-aon-ctrl";
254 reg = <0x408000 0x100>, <0x408200 0x200>;
255 reg-names = "aon-ctrl", "aon-sram";
256 };
257
258 timers: timer@4067c0 {
259 compatible = "brcm,brcmstb-timers";
260 reg = <0x4067c0 0x40>;
261 };
262
245 upg_gio: gpio@406700 { 263 upg_gio: gpio@406700 {
246 compatible = "brcm,brcmstb-gpio"; 264 compatible = "brcm,brcmstb-gpio";
247 reg = <0x406700 0x80>; 265 reg = <0x406700 0x80>;
@@ -494,5 +512,76 @@
494 interrupt-names = "mspi_done"; 512 interrupt-names = "mspi_done";
495 status = "disabled"; 513 status = "disabled";
496 }; 514 };
515
516 waketimer: waketimer@409580 {
517 compatible = "brcm,brcmstb-waketimer";
518 reg = <0x409580 0x14>;
519 interrupts = <0x3>;
520 interrupt-parent = <&aon_pm_l2_intc>;
521 interrupt-names = "timer";
522 clocks = <&upg_clk>;
523 status = "disabled";
524 };
525 };
526
527 memory_controllers {
528 compatible = "simple-bus";
529 ranges = <0x0 0x103b0000 0x1a000>;
530 #address-cells = <1>;
531 #size-cells = <1>;
532
533 memory-controller@0 {
534 compatible = "brcm,brcmstb-memc", "simple-bus";
535 ranges = <0x0 0x0 0xa000>;
536 #address-cells = <1>;
537 #size-cells = <1>;
538
539 memc-arb@1000 {
540 compatible = "brcm,brcmstb-memc-arb";
541 reg = <0x1000 0x248>;
542 };
543
544 memc-ddr@2000 {
545 compatible = "brcm,brcmstb-memc-ddr";
546 reg = <0x2000 0x300>;
547 };
548
549 ddr-phy@6000 {
550 compatible = "brcm,brcmstb-ddr-phy";
551 reg = <0x6000 0xc8>;
552 };
553
554 shimphy@8000 {
555 compatible = "brcm,brcmstb-ddr-shimphy";
556 reg = <0x8000 0x13c>;
557 };
558 };
559
560 memory-controller@1 {
561 compatible = "brcm,brcmstb-memc", "simple-bus";
562 ranges = <0x0 0x10000 0xa000>;
563 #address-cells = <1>;
564 #size-cells = <1>;
565
566 memc-arb@1000 {
567 compatible = "brcm,brcmstb-memc-arb";
568 reg = <0x1000 0x248>;
569 };
570
571 memc-ddr@2000 {
572 compatible = "brcm,brcmstb-memc-ddr";
573 reg = <0x2000 0x300>;
574 };
575
576 ddr-phy@6000 {
577 compatible = "brcm,brcmstb-ddr-phy";
578 reg = <0x6000 0xc8>;
579 };
580
581 shimphy@8000 {
582 compatible = "brcm,brcmstb-ddr-shimphy";
583 reg = <0x8000 0x13c>;
584 };
585 };
497 }; 586 };
498}; 587};
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index 1484e8990e52..8398b7f68bf4 100644
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -247,6 +247,13 @@
247 status = "disabled"; 247 status = "disabled";
248 }; 248 };
249 249
250 watchdog: watchdog@4067e8 {
251 clocks = <&upg_clk>;
252 compatible = "brcm,bcm7038-wdt";
253 reg = <0x4067e8 0x14>;
254 status = "disabled";
255 };
256
250 aon_pm_l2_intc: interrupt-controller@408440 { 257 aon_pm_l2_intc: interrupt-controller@408440 {
251 compatible = "brcm,l2-intc"; 258 compatible = "brcm,l2-intc";
252 reg = <0x408440 0x30>; 259 reg = <0x408440 0x30>;
@@ -257,6 +264,17 @@
257 brcm,irq-can-wake; 264 brcm,irq-can-wake;
258 }; 265 };
259 266
267 aon_ctrl: syscon@408000 {
268 compatible = "brcm,brcmstb-aon-ctrl";
269 reg = <0x408000 0x100>, <0x408200 0x200>;
270 reg-names = "aon-ctrl", "aon-sram";
271 };
272
273 timers: timer@4067c0 {
274 compatible = "brcm,brcmstb-timers";
275 reg = <0x4067c0 0x40>;
276 };
277
260 upg_gio: gpio@406700 { 278 upg_gio: gpio@406700 {
261 compatible = "brcm,brcmstb-gpio"; 279 compatible = "brcm,brcmstb-gpio";
262 reg = <0x406700 0x80>; 280 reg = <0x406700 0x80>;
@@ -509,5 +527,76 @@
509 interrupt-names = "mspi_done"; 527 interrupt-names = "mspi_done";
510 status = "disabled"; 528 status = "disabled";
511 }; 529 };
530
531 waketimer: waketimer@409580 {
532 compatible = "brcm,brcmstb-waketimer";
533 reg = <0x409580 0x14>;
534 interrupts = <0x3>;
535 interrupt-parent = <&aon_pm_l2_intc>;
536 interrupt-names = "timer";
537 clocks = <&upg_clk>;
538 status = "disabled";
539 };
540 };
541
542 memory_controllers {
543 compatible = "simple-bus";
544 ranges = <0x0 0x103b0000 0x1a000>;
545 #address-cells = <1>;
546 #size-cells = <1>;
547
548 memory-controller@0 {
549 compatible = "brcm,brcmstb-memc", "simple-bus";
550 ranges = <0x0 0x0 0xa000>;
551 #address-cells = <1>;
552 #size-cells = <1>;
553
554 memc-arb@1000 {
555 compatible = "brcm,brcmstb-memc-arb";
556 reg = <0x1000 0x248>;
557 };
558
559 memc-ddr@2000 {
560 compatible = "brcm,brcmstb-memc-ddr";
561 reg = <0x2000 0x300>;
562 };
563
564 ddr-phy@6000 {
565 compatible = "brcm,brcmstb-ddr-phy";
566 reg = <0x6000 0xc8>;
567 };
568
569 shimphy@8000 {
570 compatible = "brcm,brcmstb-ddr-shimphy";
571 reg = <0x8000 0x13c>;
572 };
573 };
574
575 memory-controller@1 {
576 compatible = "brcm,brcmstb-memc", "simple-bus";
577 ranges = <0x0 0x10000 0xa000>;
578 #address-cells = <1>;
579 #size-cells = <1>;
580
581 memc-arb@1000 {
582 compatible = "brcm,brcmstb-memc-arb";
583 reg = <0x1000 0x248>;
584 };
585
586 memc-ddr@2000 {
587 compatible = "brcm,brcmstb-memc-ddr";
588 reg = <0x2000 0x300>;
589 };
590
591 ddr-phy@6000 {
592 compatible = "brcm,brcmstb-ddr-phy";
593 reg = <0x6000 0xc8>;
594 };
595
596 shimphy@8000 {
597 compatible = "brcm,brcmstb-ddr-shimphy";
598 reg = <0x8000 0x13c>;
599 };
600 };
512 }; 601 };
513}; 602};
diff --git a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
index 7f59ea2ded6c..79e9769f7e00 100644
--- a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
@@ -50,6 +50,10 @@
50 status = "okay"; 50 status = "okay";
51}; 51};
52 52
53&watchdog {
54 status = "okay";
55};
56
53/* FIXME: USB is wonky; disable it for now */ 57/* FIXME: USB is wonky; disable it for now */
54&ehci0 { 58&ehci0 {
55 status = "disabled"; 59 status = "disabled";
diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
index 9e7d5228f2b7..28370ff77eeb 100644
--- a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
@@ -59,6 +59,10 @@
59 status = "okay"; 59 status = "okay";
60}; 60};
61 61
62&watchdog {
63 status = "okay";
64};
65
62&enet0 { 66&enet0 {
63 status = "okay"; 67 status = "okay";
64}; 68};
@@ -114,3 +118,7 @@
114&mspi { 118&mspi {
115 status = "okay"; 119 status = "okay";
116}; 120};
121
122&waketimer {
123 status = "okay";
124};
diff --git a/arch/mips/boot/dts/brcm/bcm97358svmb.dts b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
index 708207a0002d..41c1b510c230 100644
--- a/arch/mips/boot/dts/brcm/bcm97358svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97358svmb.dts
@@ -55,6 +55,10 @@
55 status = "okay"; 55 status = "okay";
56}; 56};
57 57
58&watchdog {
59 status = "okay";
60};
61
58&enet0 { 62&enet0 {
59 status = "okay"; 63 status = "okay";
60}; 64};
@@ -106,3 +110,7 @@
106&mspi { 110&mspi {
107 status = "okay"; 111 status = "okay";
108}; 112};
113
114&waketimer {
115 status = "okay";
116};
diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
index 73c6dc9c8c6d..9f6c6c9b7ea7 100644
--- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
@@ -50,6 +50,10 @@
50 status = "okay"; 50 status = "okay";
51}; 51};
52 52
53&watchdog {
54 status = "okay";
55};
56
53&enet0 { 57&enet0 {
54 status = "okay"; 58 status = "okay";
55}; 59};
@@ -109,3 +113,7 @@
109&mspi { 113&mspi {
110 status = "okay"; 114 status = "okay";
111}; 115};
116
117&waketimer {
118 status = "okay";
119};
diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
index 37bacfdcf9d9..df8b755c390f 100644
--- a/arch/mips/boot/dts/brcm/bcm97362svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
@@ -47,6 +47,10 @@
47 status = "okay"; 47 status = "okay";
48}; 48};
49 49
50&watchdog {
51 status = "okay";
52};
53
50&enet0 { 54&enet0 {
51 status = "okay"; 55 status = "okay";
52}; 56};
@@ -78,3 +82,7 @@
78&mspi { 82&mspi {
79 status = "okay"; 83 status = "okay";
80}; 84};
85
86&waketimer {
87 status = "okay";
88};
diff --git a/arch/mips/boot/dts/brcm/bcm97420c.dts b/arch/mips/boot/dts/brcm/bcm97420c.dts
index f96241e94874..086faeaa384a 100644
--- a/arch/mips/boot/dts/brcm/bcm97420c.dts
+++ b/arch/mips/boot/dts/brcm/bcm97420c.dts
@@ -60,6 +60,10 @@
60 status = "okay"; 60 status = "okay";
61}; 61};
62 62
63&watchdog {
64 status = "okay";
65};
66
63/* FIXME: MAC driver comes up but cannot attach to PHY */ 67/* FIXME: MAC driver comes up but cannot attach to PHY */
64&enet0 { 68&enet0 {
65 status = "disabled"; 69 status = "disabled";
diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
index ce762c7b2e54..0ed22217bf3a 100644
--- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
@@ -61,6 +61,10 @@
61 status = "okay"; 61 status = "okay";
62}; 62};
63 63
64&watchdog {
65 status = "okay";
66};
67
64&enet0 { 68&enet0 {
65 status = "okay"; 69 status = "okay";
66}; 70};
@@ -144,3 +148,7 @@
144&mspi { 148&mspi {
145 status = "okay"; 149 status = "okay";
146}; 150};
151
152&waketimer {
153 status = "okay";
154};
diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
index d4dd31a543fd..2c145a883aef 100644
--- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
@@ -61,6 +61,10 @@
61 status = "okay"; 61 status = "okay";
62}; 62};
63 63
64&watchdog {
65 status = "okay";
66};
67
64&enet0 { 68&enet0 {
65 status = "okay"; 69 status = "okay";
66}; 70};
@@ -120,3 +124,7 @@
120&mspi { 124&mspi {
121 status = "okay"; 125 status = "okay";
122}; 126};
127
128&waketimer {
129 status = "okay";
130};
diff --git a/arch/mips/boot/dts/img/boston.dts b/arch/mips/boot/dts/img/boston.dts
index 2cd49b60e030..1bd105428f61 100644
--- a/arch/mips/boot/dts/img/boston.dts
+++ b/arch/mips/boot/dts/img/boston.dts
@@ -157,7 +157,7 @@
157 #address-cells = <1>; 157 #address-cells = <1>;
158 #size-cells = <0>; 158 #size-cells = <0>;
159 159
160 rtc@0x68 { 160 rtc@68 {
161 compatible = "st,m41t81s"; 161 compatible = "st,m41t81s";
162 reg = <0x68>; 162 reg = <0x68>;
163 }; 163 };
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
index a4cc52214dbd..38078594cf97 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -110,22 +110,22 @@
110 reg = <0x0 0x0 0x0 0x800000>; 110 reg = <0x0 0x0 0x0 0x800000>;
111 }; 111 };
112 112
113 partition@0x800000 { 113 partition@800000 {
114 label = "u-boot"; 114 label = "u-boot";
115 reg = <0x0 0x800000 0x0 0x200000>; 115 reg = <0x0 0x800000 0x0 0x200000>;
116 }; 116 };
117 117
118 partition@0xa00000 { 118 partition@a00000 {
119 label = "u-boot-env"; 119 label = "u-boot-env";
120 reg = <0x0 0xa00000 0x0 0x200000>; 120 reg = <0x0 0xa00000 0x0 0x200000>;
121 }; 121 };
122 122
123 partition@0xc00000 { 123 partition@c00000 {
124 label = "boot"; 124 label = "boot";
125 reg = <0x0 0xc00000 0x0 0x4000000>; 125 reg = <0x0 0xc00000 0x0 0x4000000>;
126 }; 126 };
127 127
128 partition@0x8c00000 { 128 partition@4c00000 {
129 label = "system"; 129 label = "system";
130 reg = <0x0 0x4c00000 0x1 0xfb400000>; 130 reg = <0x0 0x4c00000 0x1 0xfb400000>;
131 }; 131 };
diff --git a/arch/mips/boot/dts/mscc/Makefile b/arch/mips/boot/dts/mscc/Makefile
new file mode 100644
index 000000000000..c51164537c02
--- /dev/null
+++ b/arch/mips/boot/dts/mscc/Makefile
@@ -0,0 +1,3 @@
1dtb-$(CONFIG_LEGACY_BOARD_OCELOT) += ocelot_pcb123.dtb
2
3obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))
diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi
new file mode 100644
index 000000000000..dd239cab2f9d
--- /dev/null
+++ b/arch/mips/boot/dts/mscc/ocelot.dtsi
@@ -0,0 +1,117 @@
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/* Copyright (c) 2017 Microsemi Corporation */
3
4/ {
5 #address-cells = <1>;
6 #size-cells = <1>;
7 compatible = "mscc,ocelot";
8
9 cpus {
10 #address-cells = <1>;
11 #size-cells = <0>;
12
13 cpu@0 {
14 compatible = "mips,mips24KEc";
15 device_type = "cpu";
16 clocks = <&cpu_clk>;
17 reg = <0>;
18 };
19 };
20
21 aliases {
22 serial0 = &uart0;
23 };
24
25 cpuintc: interrupt-controller {
26 #address-cells = <0>;
27 #interrupt-cells = <1>;
28 interrupt-controller;
29 compatible = "mti,cpu-interrupt-controller";
30 };
31
32 cpu_clk: cpu-clock {
33 compatible = "fixed-clock";
34 #clock-cells = <0>;
35 clock-frequency = <500000000>;
36 };
37
38 ahb_clk: ahb-clk {
39 compatible = "fixed-factor-clock";
40 #clock-cells = <0>;
41 clocks = <&cpu_clk>;
42 clock-div = <2>;
43 clock-mult = <1>;
44 };
45
46 ahb@70000000 {
47 compatible = "simple-bus";
48 #address-cells = <1>;
49 #size-cells = <1>;
50 ranges = <0 0x70000000 0x2000000>;
51
52 interrupt-parent = <&intc>;
53
54 cpu_ctrl: syscon@0 {
55 compatible = "mscc,ocelot-cpu-syscon", "syscon";
56 reg = <0x0 0x2c>;
57 };
58
59 intc: interrupt-controller@70 {
60 compatible = "mscc,ocelot-icpu-intr";
61 reg = <0x70 0x70>;
62 #interrupt-cells = <1>;
63 interrupt-controller;
64 interrupt-parent = <&cpuintc>;
65 interrupts = <2>;
66 };
67
68 uart0: serial@100000 {
69 pinctrl-0 = <&uart_pins>;
70 pinctrl-names = "default";
71 compatible = "ns16550a";
72 reg = <0x100000 0x20>;
73 interrupts = <6>;
74 clocks = <&ahb_clk>;
75 reg-io-width = <4>;
76 reg-shift = <2>;
77
78 status = "disabled";
79 };
80
81 uart2: serial@100800 {
82 pinctrl-0 = <&uart2_pins>;
83 pinctrl-names = "default";
84 compatible = "ns16550a";
85 reg = <0x100800 0x20>;
86 interrupts = <7>;
87 clocks = <&ahb_clk>;
88 reg-io-width = <4>;
89 reg-shift = <2>;
90
91 status = "disabled";
92 };
93
94 reset@1070008 {
95 compatible = "mscc,ocelot-chip-reset";
96 reg = <0x1070008 0x4>;
97 };
98
99 gpio: pinctrl@1070034 {
100 compatible = "mscc,ocelot-pinctrl";
101 reg = <0x1070034 0x68>;
102 gpio-controller;
103 #gpio-cells = <2>;
104 gpio-ranges = <&gpio 0 0 22>;
105
106 uart_pins: uart-pins {
107 pins = "GPIO_6", "GPIO_7";
108 function = "uart";
109 };
110
111 uart2_pins: uart2-pins {
112 pins = "GPIO_12", "GPIO_13";
113 function = "uart2";
114 };
115 };
116 };
117};
diff --git a/arch/mips/boot/dts/mscc/ocelot_pcb123.dts b/arch/mips/boot/dts/mscc/ocelot_pcb123.dts
new file mode 100644
index 000000000000..29d6414f8886
--- /dev/null
+++ b/arch/mips/boot/dts/mscc/ocelot_pcb123.dts
@@ -0,0 +1,27 @@
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/* Copyright (c) 2017 Microsemi Corporation */
3
4/dts-v1/;
5
6#include "ocelot.dtsi"
7
8/ {
9 compatible = "mscc,ocelot-pcb123", "mscc,ocelot";
10
11 chosen {
12 stdout-path = "serial0:115200n8";
13 };
14
15 memory@0 {
16 device_type = "memory";
17 reg = <0x0 0x0e000000>;
18 };
19};
20
21&uart0 {
22 status = "okay";
23};
24
25&uart2 {
26 status = "okay";
27};
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-24 20:39:52 -0400