diff options
| author | Alex Deucher <alexdeucher@gmail.com> | 2010-03-29 17:39:44 -0400 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2010-03-30 23:13:05 -0400 |
| commit | d9c9fe3622d15e7e84121ffedef60f4080ab4f03 (patch) | |
| tree | cb198a6b96e53f725adb7c562b6ff6ff8aa2c31e | |
| parent | 3ca82da3ebe019facd611184385897fa614e6b9e (diff) | |
drm/radeon/kms/atom: minor fixes to transmitter setup
- 8 lane links are not valid for DP
- remove unused num var
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_encoders.c | 54 |
1 files changed, 21 insertions, 33 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index fd4052f71bf3..6f334519a061 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c | |||
| @@ -708,7 +708,7 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action) | |||
| 708 | struct radeon_connector_atom_dig *dig_connector = | 708 | struct radeon_connector_atom_dig *dig_connector = |
| 709 | radeon_get_atom_connector_priv_from_encoder(encoder); | 709 | radeon_get_atom_connector_priv_from_encoder(encoder); |
| 710 | union dig_encoder_control args; | 710 | union dig_encoder_control args; |
| 711 | int index = 0, num = 0; | 711 | int index = 0; |
| 712 | uint8_t frev, crev; | 712 | uint8_t frev, crev; |
| 713 | 713 | ||
| 714 | if (!dig || !dig_connector) | 714 | if (!dig || !dig_connector) |
| @@ -724,7 +724,6 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action) | |||
| 724 | else | 724 | else |
| 725 | index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl); | 725 | index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl); |
| 726 | } | 726 | } |
| 727 | num = dig->dig_encoder + 1; | ||
| 728 | 727 | ||
| 729 | if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) | 728 | if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) |
| 730 | return; | 729 | return; |
| @@ -786,7 +785,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
| 786 | struct drm_connector *connector; | 785 | struct drm_connector *connector; |
| 787 | struct radeon_connector *radeon_connector; | 786 | struct radeon_connector *radeon_connector; |
| 788 | union dig_transmitter_control args; | 787 | union dig_transmitter_control args; |
| 789 | int index = 0, num = 0; | 788 | int index = 0; |
| 790 | uint8_t frev, crev; | 789 | uint8_t frev, crev; |
| 791 | bool is_dp = false; | 790 | bool is_dp = false; |
| 792 | int pll_id = 0; | 791 | int pll_id = 0; |
| @@ -862,15 +861,12 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
| 862 | switch (radeon_encoder->encoder_id) { | 861 | switch (radeon_encoder->encoder_id) { |
| 863 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: | 862 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
| 864 | args.v3.acConfig.ucTransmitterSel = 0; | 863 | args.v3.acConfig.ucTransmitterSel = 0; |
| 865 | num = 0; | ||
| 866 | break; | 864 | break; |
| 867 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: | 865 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: |
| 868 | args.v3.acConfig.ucTransmitterSel = 1; | 866 | args.v3.acConfig.ucTransmitterSel = 1; |
| 869 | num = 1; | ||
| 870 | break; | 867 | break; |
| 871 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: | 868 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: |
| 872 | args.v3.acConfig.ucTransmitterSel = 2; | 869 | args.v3.acConfig.ucTransmitterSel = 2; |
| 873 | num = 2; | ||
| 874 | break; | 870 | break; |
| 875 | } | 871 | } |
| 876 | 872 | ||
| @@ -881,23 +877,19 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
| 881 | args.v3.acConfig.fCoherentMode = 1; | 877 | args.v3.acConfig.fCoherentMode = 1; |
| 882 | } | 878 | } |
| 883 | } else if (ASIC_IS_DCE32(rdev)) { | 879 | } else if (ASIC_IS_DCE32(rdev)) { |
| 884 | if (dig->dig_encoder == 1) | 880 | args.v2.acConfig.ucEncoderSel = dig->dig_encoder; |
| 885 | args.v2.acConfig.ucEncoderSel = 1; | ||
| 886 | if (dig_connector->linkb) | 881 | if (dig_connector->linkb) |
| 887 | args.v2.acConfig.ucLinkSel = 1; | 882 | args.v2.acConfig.ucLinkSel = 1; |
| 888 | 883 | ||
| 889 | switch (radeon_encoder->encoder_id) { | 884 | switch (radeon_encoder->encoder_id) { |
| 890 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: | 885 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
| 891 | args.v2.acConfig.ucTransmitterSel = 0; | 886 | args.v2.acConfig.ucTransmitterSel = 0; |
| 892 | num = 0; | ||
| 893 | break; | 887 | break; |
| 894 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: | 888 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: |
| 895 | args.v2.acConfig.ucTransmitterSel = 1; | 889 | args.v2.acConfig.ucTransmitterSel = 1; |
| 896 | num = 1; | ||
| 897 | break; | 890 | break; |
| 898 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: | 891 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: |
| 899 | args.v2.acConfig.ucTransmitterSel = 2; | 892 | args.v2.acConfig.ucTransmitterSel = 2; |
| 900 | num = 2; | ||
| 901 | break; | 893 | break; |
| 902 | } | 894 | } |
| 903 | 895 | ||
| @@ -915,31 +907,25 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
| 915 | else | 907 | else |
| 916 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER; | 908 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER; |
| 917 | 909 | ||
| 918 | switch (radeon_encoder->encoder_id) { | 910 | if ((rdev->flags & RADEON_IS_IGP) && |
| 919 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: | 911 | (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_UNIPHY)) { |
| 920 | if (rdev->flags & RADEON_IS_IGP) { | 912 | if (is_dp || (radeon_encoder->pixel_clock <= 165000)) { |
| 921 | if (radeon_encoder->pixel_clock > 165000) { | 913 | if (dig_connector->igp_lane_info & 0x1) |
| 922 | if (dig_connector->igp_lane_info & 0x3) | 914 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; |
| 923 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; | 915 | else if (dig_connector->igp_lane_info & 0x2) |
| 924 | else if (dig_connector->igp_lane_info & 0xc) | 916 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7; |
| 925 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; | 917 | else if (dig_connector->igp_lane_info & 0x4) |
| 926 | } else { | 918 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11; |
| 927 | if (dig_connector->igp_lane_info & 0x1) | 919 | else if (dig_connector->igp_lane_info & 0x8) |
| 928 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; | 920 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; |
| 929 | else if (dig_connector->igp_lane_info & 0x2) | 921 | } else { |
| 930 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7; | 922 | if (dig_connector->igp_lane_info & 0x3) |
| 931 | else if (dig_connector->igp_lane_info & 0x4) | 923 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; |
| 932 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11; | 924 | else if (dig_connector->igp_lane_info & 0xc) |
| 933 | else if (dig_connector->igp_lane_info & 0x8) | 925 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; |
| 934 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; | ||
| 935 | } | ||
| 936 | } | 926 | } |
| 937 | break; | ||
| 938 | } | 927 | } |
| 939 | 928 | ||
| 940 | if (radeon_encoder->pixel_clock > 165000) | ||
| 941 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_8LANE_LINK; | ||
| 942 | |||
| 943 | if (dig_connector->linkb) | 929 | if (dig_connector->linkb) |
| 944 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB; | 930 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB; |
| 945 | else | 931 | else |
| @@ -950,6 +936,8 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
| 950 | else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { | 936 | else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { |
| 951 | if (dig->coherent_mode) | 937 | if (dig->coherent_mode) |
| 952 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT; | 938 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT; |
| 939 | if (radeon_encoder->pixel_clock > 165000) | ||
| 940 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_8LANE_LINK; | ||
| 953 | } | 941 | } |
| 954 | } | 942 | } |
| 955 | 943 | ||
