diff options
author | Matt Redfearn <matt.redfearn@imgtec.com> | 2017-04-19 08:26:45 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2017-04-20 08:56:58 -0400 |
commit | 4287adec7212d48fb878a45400fd7e11a198462c (patch) | |
tree | 8bfd774d6b97feb0ae092b2f133add6d576072a2 | |
parent | 0773cea37470f8e080c510fe720fc356cf35df3a (diff) |
MIPS/Malta: Probe gic-timer via devicetree
The Malta platform is the only platform remaining to probe the GIC
clocksource via gic_clocksource_init. This route hardcodes an expected
virq number based on MIPS_GIC_IRQ_BASE, which can be fragile to the
eventual virq layout. Instread, probe the driver using the preferred and
more modern devicetree method.
Before the driver is probed, set the "clock-frequency" property of the
devicetree node to the value detected by Malta platform code.
Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Link: http://lkml.kernel.org/r/1492604806-23420-1-git-send-email-matt.redfearn@imgtec.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r-- | arch/mips/mti-malta/malta-time.c | 31 |
1 files changed, 30 insertions, 1 deletions
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c index 1829a9031eec..289edcfadd7c 100644 --- a/arch/mips/mti-malta/malta-time.c +++ b/arch/mips/mti-malta/malta-time.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/i8253.h> | 21 | #include <linux/i8253.h> |
22 | #include <linux/init.h> | 22 | #include <linux/init.h> |
23 | #include <linux/kernel_stat.h> | 23 | #include <linux/kernel_stat.h> |
24 | #include <linux/libfdt.h> | ||
24 | #include <linux/math64.h> | 25 | #include <linux/math64.h> |
25 | #include <linux/sched.h> | 26 | #include <linux/sched.h> |
26 | #include <linux/spinlock.h> | 27 | #include <linux/spinlock.h> |
@@ -207,6 +208,33 @@ static void __init init_rtc(void) | |||
207 | CMOS_WRITE(ctrl & ~RTC_SET, RTC_CONTROL); | 208 | CMOS_WRITE(ctrl & ~RTC_SET, RTC_CONTROL); |
208 | } | 209 | } |
209 | 210 | ||
211 | #ifdef CONFIG_CLKSRC_MIPS_GIC | ||
212 | static u32 gic_frequency_dt; | ||
213 | |||
214 | static struct property gic_frequency_prop = { | ||
215 | .name = "clock-frequency", | ||
216 | .length = sizeof(u32), | ||
217 | .value = &gic_frequency_dt, | ||
218 | }; | ||
219 | |||
220 | static void update_gic_frequency_dt(void) | ||
221 | { | ||
222 | struct device_node *node; | ||
223 | |||
224 | gic_frequency_dt = cpu_to_be32(gic_frequency); | ||
225 | |||
226 | node = of_find_compatible_node(NULL, NULL, "mti,gic-timer"); | ||
227 | if (!node) { | ||
228 | pr_err("mti,gic-timer device node not found\n"); | ||
229 | return; | ||
230 | } | ||
231 | |||
232 | if (of_update_property(node, &gic_frequency_prop) < 0) | ||
233 | pr_err("error updating gic frequency property\n"); | ||
234 | } | ||
235 | |||
236 | #endif | ||
237 | |||
210 | void __init plat_time_init(void) | 238 | void __init plat_time_init(void) |
211 | { | 239 | { |
212 | unsigned int prid = read_c0_prid() & (PRID_COMP_MASK | PRID_IMP_MASK); | 240 | unsigned int prid = read_c0_prid() & (PRID_COMP_MASK | PRID_IMP_MASK); |
@@ -236,7 +264,8 @@ void __init plat_time_init(void) | |||
236 | printk("GIC frequency %d.%02d MHz\n", freq/1000000, | 264 | printk("GIC frequency %d.%02d MHz\n", freq/1000000, |
237 | (freq%1000000)*100/1000000); | 265 | (freq%1000000)*100/1000000); |
238 | #ifdef CONFIG_CLKSRC_MIPS_GIC | 266 | #ifdef CONFIG_CLKSRC_MIPS_GIC |
239 | gic_clocksource_init(gic_frequency); | 267 | update_gic_frequency_dt(); |
268 | clocksource_probe(); | ||
240 | #endif | 269 | #endif |
241 | } | 270 | } |
242 | #endif | 271 | #endif |