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<title>litmus-rt-ext-res.git/drivers/clk/qcom, branch EXT-RES</title>
<subtitle>LITMUS^RT with extended reservations for Forbidden Zones paper @ RTAS'20</subtitle>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-ext-res.git/'/>
<entry>
<title>clk: qcom: ipq806x: Fix board clk rates</title>
<updated>2017-01-12T10:39:26+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2016-11-10T01:08:28+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-ext-res.git/commit/?id=e3b665ef41106381a7ad3e6bbdf2ebba7682cc25'/>
<id>e3b665ef41106381a7ad3e6bbdf2ebba7682cc25</id>
<content type='text'>
commit cbf2e548ca8ad4bb274d014e9a70bd841d29948e upstream.

The clocks on these boards run at 25 MHz, not 19.2 and 27 like
other platforms. Unfortunately I copy/pasted from other similar
SoCs but forgot this one is different. Fix it.

Fixes: a085f877a882 ("clk: qcom: Move cxo/pxo/xo into dt files")
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

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<pre>
commit cbf2e548ca8ad4bb274d014e9a70bd841d29948e upstream.

The clocks on these boards run at 25 MHz, not 19.2 and 27 like
other platforms. Unfortunately I copy/pasted from other similar
SoCs but forgot this one is different. Fix it.

Fixes: a085f877a882 ("clk: qcom: Move cxo/pxo/xo into dt files")
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</pre>
</div>
</content>
</entry>
<entry>
<title>clk: Add USB3 PHY reset lines</title>
<updated>2016-09-16T23:19:50+00:00</updated>
<author>
<name>Vivek Gautam</name>
<email>vivek.gautam@codeaurora.org</email>
</author>
<published>2016-09-15T04:45:33+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-ext-res.git/commit/?id=dc19b6f5be5b6f82548981adc1c5019b7a82d7c7'/>
<id>dc19b6f5be5b6f82548981adc1c5019b7a82d7c7</id>
<content type='text'>
Adding missing reset lines for USB 3.0 PHY.

Signed-off-by: Vivek Gautam &lt;vivek.gautam@codeaurora.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
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<pre>
Adding missing reset lines for USB 3.0 PHY.

Signed-off-by: Vivek Gautam &lt;vivek.gautam@codeaurora.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: gcc-msm8996: add missing pcie phy reset lines</title>
<updated>2016-08-25T20:02:33+00:00</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2016-08-25T11:20:47+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-ext-res.git/commit/?id=62d157587efa54487c32b3c2ca76979348e0b90a'/>
<id>62d157587efa54487c32b3c2ca76979348e0b90a</id>
<content type='text'>
This patch adds missing 2 PCIE common reset lines.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
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<pre>
This patch adds missing 2 PCIE common reset lines.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: gcc-msm8996: Fix pcie 2 pipe register offset</title>
<updated>2016-08-25T20:02:20+00:00</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2016-08-25T11:20:46+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-ext-res.git/commit/?id=ce61966c05f276294b6be04d1765ad0d827ddefd'/>
<id>ce61966c05f276294b6be04d1765ad0d827ddefd</id>
<content type='text'>
This patch corrects the register offset for pcie2 pipe clock.
Offset according to datasheet is 0x6e018 instead of 0x6e108.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Fixes: b1e010c0730a ("clk: qcom: Add MSM8996 Global Clock Control (GCC) driver")
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch corrects the register offset for pcie2 pipe clock.
Offset according to datasheet is 0x6e018 instead of 0x6e108.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Fixes: b1e010c0730a ("clk: qcom: Add MSM8996 Global Clock Control (GCC) driver")
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: qcom: select GDSC for msm8996 gcc and mmcc</title>
<updated>2016-08-25T19:51:17+00:00</updated>
<author>
<name>Srinivas Kandagatla</name>
<email>srinivas.kandagatla@linaro.org</email>
</author>
<published>2016-08-25T11:28:07+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-ext-res.git/commit/?id=6d91f2c0141330b919ae4d13395f38c341469564'/>
<id>6d91f2c0141330b919ae4d13395f38c341469564</id>
<content type='text'>
This patch selects QCOM_GDSC Kconfig for msm8996 GCC and MMCC clock
controllers, as these provide some of the gdscs on the SOC.

Also selecting this config will make it align with other drivers which
do the same.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Fixes: 52111672f791 ("clk: qcom: gdsc: Add GDSCs in msm8996 GCC")
Fixes: 7e824d507909 ("clk: qcom: gdsc: Add mmcc gdscs for msm8996 family")
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch selects QCOM_GDSC Kconfig for msm8996 GCC and MMCC clock
controllers, as these provide some of the gdscs on the SOC.

Also selecting this config will make it align with other drivers which
do the same.

Signed-off-by: Srinivas Kandagatla &lt;srinivas.kandagatla@linaro.org&gt;
Fixes: 52111672f791 ("clk: qcom: gdsc: Add GDSCs in msm8996 GCC")
Fixes: 7e824d507909 ("clk: qcom: gdsc: Add mmcc gdscs for msm8996 family")
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: qcom: Migrate to clk_hw based registration and OF APIs</title>
<updated>2016-08-25T00:37:06+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>stephen.boyd@linaro.org</email>
</author>
<published>2016-08-16T22:38:27+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-ext-res.git/commit/?id=120c1552839036f0fb2c01fffb8d8ce4049b729a'/>
<id>120c1552839036f0fb2c01fffb8d8ce4049b729a</id>
<content type='text'>
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers in this driver, allowing us to
move closer to a clear split of consumer and provider clk APIs.

Signed-off-by: Stephen Boyd &lt;stephen.boyd@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers in this driver, allowing us to
move closer to a clear split of consumer and provider clk APIs.

Signed-off-by: Stephen Boyd &lt;stephen.boyd@linaro.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: qcom: gdsc: Add the missing BIMC gdsc for msm8996</title>
<updated>2016-08-19T19:55:19+00:00</updated>
<author>
<name>Rajendra Nayak</name>
<email>rnayak@codeaurora.org</email>
</author>
<published>2016-08-16T07:25:48+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-ext-res.git/commit/?id=63bb4fd6a391167f855f9b38b27945bed4015756'/>
<id>63bb4fd6a391167f855f9b38b27945bed4015756</id>
<content type='text'>
Add BIMC gdsc data found in MMCC part of msm8996 family of devices.

Signed-off-by: Rajendra Nayak &lt;rnayak@codeaurora.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
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<pre>
Add BIMC gdsc data found in MMCC part of msm8996 family of devices.

Signed-off-by: Rajendra Nayak &lt;rnayak@codeaurora.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: gcc-ipq4019: Delete unnecessary assignment for the field "owner"</title>
<updated>2016-08-17T21:32:08+00:00</updated>
<author>
<name>Markus Elfring</name>
<email>elfring@users.sourceforge.net</email>
</author>
<published>2016-08-16T06:53:10+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-ext-res.git/commit/?id=57c4a2ac8f55e6648c36a1df8c4919f06d08d66e'/>
<id>57c4a2ac8f55e6648c36a1df8c4919f06d08d66e</id>
<content type='text'>
The field "owner" is set by the core.
Thus delete an unneeded initialisation.

Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
Signed-off-by: Markus Elfring &lt;elfring@users.sourceforge.net&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The field "owner" is set by the core.
Thus delete an unneeded initialisation.

Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci
Signed-off-by: Markus Elfring &lt;elfring@users.sourceforge.net&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: qcom: Sort Makefile alphabetically</title>
<updated>2016-08-15T23:09:04+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2016-08-15T23:09:04+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-ext-res.git/commit/?id=7e6a3a1d79fe9bb9b9daacb59e9b5c35f71570f5'/>
<id>7e6a3a1d79fe9bb9b9daacb59e9b5c35f71570f5</id>
<content type='text'>
We've started getting out of order, fix it.

Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We've started getting out of order, fix it.

Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: mdm9615: Add support for MDM9615 Clock Controllers</title>
<updated>2016-08-15T22:51:21+00:00</updated>
<author>
<name>Neil Armstrong</name>
<email>narmstrong@baylibre.com</email>
</author>
<published>2016-08-11T12:48:04+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus-rt-ext-res.git/commit/?id=7792a8d6713c33758636c252bd6ff7c8c001de12'/>
<id>7792a8d6713c33758636c252bd6ff7c8c001de12</id>
<content type='text'>
In order to support the Qualcomm MDM9615 SoC, add support for
the Global and LPASS Clock Controllers.

Signed-off-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
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<pre>
In order to support the Qualcomm MDM9615 SoC, add support for
the Global and LPASS Clock Controllers.

Signed-off-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</pre>
</div>
</content>
</entry>
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