litmus-rt-ext-res.git/arch/powerpc/mm/Makefile, branch EXT-RES

powerpc/Makefile: Drop CONFIG_WORD_SIZE for BITS

2016-09-13T07:37:06+00:00

Commit 2578bfae84a7 ("[POWERPC] Create and use CONFIG_WORD_SIZE") added
CONFIG_WORD_SIZE, and suggests that other arches were going to do
likewise.

But that never happened, powerpc is the only architecture which uses it.

So switch to using a simple make variable, BITS, like x86, sh, sparc and
tile. It is also easier to spell and simpler, avoiding any confusion
about whether it's defined due to ordering of make vs kconfig.

Signed-off-by: Michael Ellerman

powerpc/mm/thp: Abstraction for THP functions

2016-05-11T11:53:57+00:00

Signed-off-by: Aneesh Kumar K.V 
Signed-off-by: Michael Ellerman

powerpc/mm: Add radix support for hugetlb

2016-05-11T11:53:55+00:00

Signed-off-by: Aneesh Kumar K.V 
Signed-off-by: Michael Ellerman

powerpc/mm/radix: Add tlbflush routines

2016-05-01T08:33:09+00:00

Core kernel doesn't track the page size of the VA range that we are
invalidating. Hence we end up flushing TLB for the entire mm here. Later
patches will improve this.

We also don't flush page walk cache separetly instead use RIC=2 when
flushing TLB, because we do a MMU gather flush after freeing page table.

MMU_NO_CONTEXT is updated for hash.

Signed-off-by: Aneesh Kumar K.V 
Signed-off-by: Michael Ellerman

powerpc/mm: Rename mmu_context_hash64.c to mmu_context_book3s64.c

2016-05-01T08:33:07+00:00

This file now contains both hash and radix specific code. Rename it to
indicate this better.

Signed-off-by: Aneesh Kumar K.V 
Signed-off-by: Michael Ellerman

powerpc/mm/radix: Add radix callbacks for early init routines

2016-05-01T08:33:00+00:00

This adds routines for early setup for radix. We use device tree
property "ibm,processor-radix-AP-encodings" to find supported page
sizes. If we don't find the above we consider 64K and 4K as supported
page sizes.

We do map vmemap using 2M page size if we can. The linear mapping is
done such that we use required page size for that range. For example
memory of 3.5G is mapped such that we use 1G mapping till 3G range and
use 2M mapping for the rest.

Signed-off-by: Aneesh Kumar K.V 
Signed-off-by: Michael Ellerman

powerpc/mm: Move hash and no hash code to separate files

2016-05-01T08:32:42+00:00

This patch reduces the number of #ifdefs in C code and will also help in
adding radix changes later. Only code movement in this patch.

Signed-off-by: Aneesh Kumar K.V 
[mpe: Propagate copyrights and update GPL text]
Signed-off-by: Michael Ellerman

powerpc/8xx: Map linear kernel RAM with 8M pages

2016-03-11T23:18:01+00:00

On a live running system (VoIP gateway for Air Trafic Control), over
a 10 minutes period (with 277s idle), we get 87 millions DTLB misses
and approximatly 35 secondes are spent in DTLB handler.
This represents 5.8% of the overall time and even 10.8% of the
non-idle time.
Among those 87 millions DTLB misses, 15% are on user addresses and
85% are on kernel addresses. And within the kernel addresses, 93%
are on addresses from the linear address space and only 7% are on
addresses from the virtual address space.

MPC8xx has no BATs but it has 8Mb page size. This patch implements
mapping of kernel RAM using 8Mb pages, on the same model as what is
done on the 40x.

In 4k pages mode, each PGD entry maps a 4Mb area: we map every two
entries to the same 8Mb physical page. In each second entry, we add
4Mb to the page physical address to ease life of the FixupDAR
routine. This is just ignored by HW.

In 16k pages mode, each PGD entry maps a 64Mb area: each PGD entry
will point to the first page of the area. The DTLB handler adds
the 3 bits from EPN to map the correct page.

With this patch applied, we now get only 13 millions TLB misses
during the 10 minutes period. The idle time has increased to 313s
and the overall time spent in DTLB miss handler is 6.3s, which
represents 1% of the overall time and 2.2% of non-idle time.

Signed-off-by: Christophe Leroy 
Signed-off-by: Scott Wood

powerpc/mm: Convert 4k insert from asm to C

2015-12-14T04:19:12+00:00

This is similar to 64K insert. May be we want to consolidate

Acked-by: Scott Wood 
Signed-off-by: Aneesh Kumar K.V 
Signed-off-by: Michael Ellerman

powerpc/mm: Convert 4k hash insert to C

2015-12-14T04:19:09+00:00

Acked-by: Scott Wood 
Signed-off-by: Aneesh Kumar K.V 
Signed-off-by: Michael Ellerman