diff options
Diffstat (limited to 'drivers')
346 files changed, 10895 insertions, 10776 deletions
diff --git a/drivers/acorn/char/i2c.c b/drivers/acorn/char/i2c.c index 9e584a7af434..157d8b73bb64 100644 --- a/drivers/acorn/char/i2c.c +++ b/drivers/acorn/char/i2c.c | |||
@@ -238,7 +238,7 @@ static int rtc_ioctl(struct inode *inode, struct file *file, | |||
238 | return -EINVAL; | 238 | return -EINVAL; |
239 | } | 239 | } |
240 | 240 | ||
241 | static struct file_operations rtc_fops = { | 241 | static const struct file_operations rtc_fops = { |
242 | .ioctl = rtc_ioctl, | 242 | .ioctl = rtc_ioctl, |
243 | }; | 243 | }; |
244 | 244 | ||
diff --git a/drivers/block/DAC960.c b/drivers/block/DAC960.c index 7b2fa3d8f61c..92bf868ca056 100644 --- a/drivers/block/DAC960.c +++ b/drivers/block/DAC960.c | |||
@@ -7024,7 +7024,7 @@ static int DAC960_gam_ioctl(struct inode *inode, struct file *file, | |||
7024 | return -EINVAL; | 7024 | return -EINVAL; |
7025 | } | 7025 | } |
7026 | 7026 | ||
7027 | static struct file_operations DAC960_gam_fops = { | 7027 | static const struct file_operations DAC960_gam_fops = { |
7028 | .owner = THIS_MODULE, | 7028 | .owner = THIS_MODULE, |
7029 | .ioctl = DAC960_gam_ioctl | 7029 | .ioctl = DAC960_gam_ioctl |
7030 | }; | 7030 | }; |
diff --git a/drivers/block/acsi_slm.c b/drivers/block/acsi_slm.c index e04be94d195c..e2e043290963 100644 --- a/drivers/block/acsi_slm.c +++ b/drivers/block/acsi_slm.c | |||
@@ -269,7 +269,7 @@ static int slm_get_pagesize( int device, int *w, int *h ); | |||
269 | 269 | ||
270 | static DEFINE_TIMER(slm_timer, slm_test_ready, 0, 0); | 270 | static DEFINE_TIMER(slm_timer, slm_test_ready, 0, 0); |
271 | 271 | ||
272 | static struct file_operations slm_fops = { | 272 | static const struct file_operations slm_fops = { |
273 | .owner = THIS_MODULE, | 273 | .owner = THIS_MODULE, |
274 | .read = slm_read, | 274 | .read = slm_read, |
275 | .write = slm_write, | 275 | .write = slm_write, |
diff --git a/drivers/block/aoe/aoechr.c b/drivers/block/aoe/aoechr.c index e22b4c9520a9..39e563ea0878 100644 --- a/drivers/block/aoe/aoechr.c +++ b/drivers/block/aoe/aoechr.c | |||
@@ -233,7 +233,7 @@ loop: | |||
233 | } | 233 | } |
234 | } | 234 | } |
235 | 235 | ||
236 | static struct file_operations aoe_fops = { | 236 | static const struct file_operations aoe_fops = { |
237 | .write = aoechr_write, | 237 | .write = aoechr_write, |
238 | .read = aoechr_read, | 238 | .read = aoechr_read, |
239 | .open = aoechr_open, | 239 | .open = aoechr_open, |
diff --git a/drivers/block/paride/pg.c b/drivers/block/paride/pg.c index 9970aedbb5d9..d89e7d32a3b6 100644 --- a/drivers/block/paride/pg.c +++ b/drivers/block/paride/pg.c | |||
@@ -227,7 +227,7 @@ static struct class *pg_class; | |||
227 | 227 | ||
228 | /* kernel glue structures */ | 228 | /* kernel glue structures */ |
229 | 229 | ||
230 | static struct file_operations pg_fops = { | 230 | static const struct file_operations pg_fops = { |
231 | .owner = THIS_MODULE, | 231 | .owner = THIS_MODULE, |
232 | .read = pg_read, | 232 | .read = pg_read, |
233 | .write = pg_write, | 233 | .write = pg_write, |
diff --git a/drivers/block/paride/pt.c b/drivers/block/paride/pt.c index c902b25e4869..9f4e67ee1eb0 100644 --- a/drivers/block/paride/pt.c +++ b/drivers/block/paride/pt.c | |||
@@ -232,7 +232,7 @@ static char pt_scratch[512]; /* scratch block buffer */ | |||
232 | 232 | ||
233 | /* kernel glue structures */ | 233 | /* kernel glue structures */ |
234 | 234 | ||
235 | static struct file_operations pt_fops = { | 235 | static const struct file_operations pt_fops = { |
236 | .owner = THIS_MODULE, | 236 | .owner = THIS_MODULE, |
237 | .read = pt_read, | 237 | .read = pt_read, |
238 | .write = pt_write, | 238 | .write = pt_write, |
diff --git a/drivers/block/pktcdvd.c b/drivers/block/pktcdvd.c index c0e89490e3d5..93fb6ed4ed52 100644 --- a/drivers/block/pktcdvd.c +++ b/drivers/block/pktcdvd.c | |||
@@ -435,7 +435,7 @@ static int pkt_debugfs_fops_open(struct inode *inode, struct file *file) | |||
435 | return single_open(file, pkt_debugfs_seq_show, inode->i_private); | 435 | return single_open(file, pkt_debugfs_seq_show, inode->i_private); |
436 | } | 436 | } |
437 | 437 | ||
438 | static struct file_operations debug_fops = { | 438 | static const struct file_operations debug_fops = { |
439 | .open = pkt_debugfs_fops_open, | 439 | .open = pkt_debugfs_fops_open, |
440 | .read = seq_read, | 440 | .read = seq_read, |
441 | .llseek = seq_lseek, | 441 | .llseek = seq_lseek, |
@@ -2725,7 +2725,7 @@ static int pkt_seq_open(struct inode *inode, struct file *file) | |||
2725 | return single_open(file, pkt_seq_show, PDE(inode)->data); | 2725 | return single_open(file, pkt_seq_show, PDE(inode)->data); |
2726 | } | 2726 | } |
2727 | 2727 | ||
2728 | static struct file_operations pkt_proc_fops = { | 2728 | static const struct file_operations pkt_proc_fops = { |
2729 | .open = pkt_seq_open, | 2729 | .open = pkt_seq_open, |
2730 | .read = seq_read, | 2730 | .read = seq_read, |
2731 | .llseek = seq_lseek, | 2731 | .llseek = seq_lseek, |
@@ -3052,7 +3052,7 @@ static int pkt_ctl_ioctl(struct inode *inode, struct file *file, unsigned int cm | |||
3052 | } | 3052 | } |
3053 | 3053 | ||
3054 | 3054 | ||
3055 | static struct file_operations pkt_ctl_fops = { | 3055 | static const struct file_operations pkt_ctl_fops = { |
3056 | .ioctl = pkt_ctl_ioctl, | 3056 | .ioctl = pkt_ctl_ioctl, |
3057 | .owner = THIS_MODULE, | 3057 | .owner = THIS_MODULE, |
3058 | }; | 3058 | }; |
diff --git a/drivers/bluetooth/hci_vhci.c b/drivers/bluetooth/hci_vhci.c index a278d98a9151..b71a5ccc587f 100644 --- a/drivers/bluetooth/hci_vhci.c +++ b/drivers/bluetooth/hci_vhci.c | |||
@@ -332,7 +332,7 @@ static int vhci_fasync(int fd, struct file *file, int on) | |||
332 | return 0; | 332 | return 0; |
333 | } | 333 | } |
334 | 334 | ||
335 | static struct file_operations vhci_fops = { | 335 | static const struct file_operations vhci_fops = { |
336 | .owner = THIS_MODULE, | 336 | .owner = THIS_MODULE, |
337 | .llseek = vhci_llseek, | 337 | .llseek = vhci_llseek, |
338 | .read = vhci_read, | 338 | .read = vhci_read, |
diff --git a/drivers/cdrom/viocd.c b/drivers/cdrom/viocd.c index 93fbf84dcc4a..dc13ebacedfb 100644 --- a/drivers/cdrom/viocd.c +++ b/drivers/cdrom/viocd.c | |||
@@ -176,7 +176,7 @@ static int proc_viocd_open(struct inode *inode, struct file *file) | |||
176 | return single_open(file, proc_viocd_show, NULL); | 176 | return single_open(file, proc_viocd_show, NULL); |
177 | } | 177 | } |
178 | 178 | ||
179 | static struct file_operations proc_viocd_operations = { | 179 | static const struct file_operations proc_viocd_operations = { |
180 | .open = proc_viocd_open, | 180 | .open = proc_viocd_open, |
181 | .read = seq_read, | 181 | .read = seq_read, |
182 | .llseek = seq_lseek, | 182 | .llseek = seq_lseek, |
diff --git a/drivers/char/briq_panel.c b/drivers/char/briq_panel.c index 9f8082f8dd29..7f60a18ef76b 100644 --- a/drivers/char/briq_panel.c +++ b/drivers/char/briq_panel.c | |||
@@ -187,7 +187,7 @@ static ssize_t briq_panel_write(struct file *file, const char __user *buf, size_ | |||
187 | return len; | 187 | return len; |
188 | } | 188 | } |
189 | 189 | ||
190 | static struct file_operations briq_panel_fops = { | 190 | static const struct file_operations briq_panel_fops = { |
191 | .owner = THIS_MODULE, | 191 | .owner = THIS_MODULE, |
192 | .read = briq_panel_read, | 192 | .read = briq_panel_read, |
193 | .write = briq_panel_write, | 193 | .write = briq_panel_write, |
diff --git a/drivers/char/cyclades.c b/drivers/char/cyclades.c index 363beb165729..54df35527bc5 100644 --- a/drivers/char/cyclades.c +++ b/drivers/char/cyclades.c | |||
@@ -829,17 +829,18 @@ static unsigned short cy_pci_nboard; | |||
829 | static unsigned short cy_isa_nboard; | 829 | static unsigned short cy_isa_nboard; |
830 | static unsigned short cy_nboard; | 830 | static unsigned short cy_nboard; |
831 | #ifdef CONFIG_PCI | 831 | #ifdef CONFIG_PCI |
832 | static unsigned short cy_pci_dev_id[] = { | 832 | static struct pci_device_id cy_pci_dev_id[] __devinitdata = { |
833 | PCI_DEVICE_ID_CYCLOM_Y_Lo, /* PCI < 1Mb */ | 833 | { PCI_DEVICE(PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_CYCLOM_Y_Lo) }, /* PCI < 1Mb */ |
834 | PCI_DEVICE_ID_CYCLOM_Y_Hi, /* PCI > 1Mb */ | 834 | { PCI_DEVICE(PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_CYCLOM_Y_Hi) }, /* PCI > 1Mb */ |
835 | PCI_DEVICE_ID_CYCLOM_4Y_Lo, /* 4Y PCI < 1Mb */ | 835 | { PCI_DEVICE(PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_CYCLOM_4Y_Lo) }, /* 4Y PCI < 1Mb */ |
836 | PCI_DEVICE_ID_CYCLOM_4Y_Hi, /* 4Y PCI > 1Mb */ | 836 | { PCI_DEVICE(PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_CYCLOM_4Y_Hi) }, /* 4Y PCI > 1Mb */ |
837 | PCI_DEVICE_ID_CYCLOM_8Y_Lo, /* 8Y PCI < 1Mb */ | 837 | { PCI_DEVICE(PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_CYCLOM_8Y_Lo) }, /* 8Y PCI < 1Mb */ |
838 | PCI_DEVICE_ID_CYCLOM_8Y_Hi, /* 8Y PCI > 1Mb */ | 838 | { PCI_DEVICE(PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_CYCLOM_8Y_Hi) }, /* 8Y PCI > 1Mb */ |
839 | PCI_DEVICE_ID_CYCLOM_Z_Lo, /* Z PCI < 1Mb */ | 839 | { PCI_DEVICE(PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_CYCLOM_Z_Lo) }, /* Z PCI < 1Mb */ |
840 | PCI_DEVICE_ID_CYCLOM_Z_Hi, /* Z PCI > 1Mb */ | 840 | { PCI_DEVICE(PCI_VENDOR_ID_CYCLADES, PCI_DEVICE_ID_CYCLOM_Z_Hi) }, /* Z PCI > 1Mb */ |
841 | 0 /* end of table */ | 841 | { } /* end of table */ |
842 | }; | 842 | }; |
843 | MODULE_DEVICE_TABLE(pci, cy_pci_dev_id); | ||
843 | #endif | 844 | #endif |
844 | 845 | ||
845 | static void cy_start(struct tty_struct *); | 846 | static void cy_start(struct tty_struct *); |
@@ -4758,7 +4759,7 @@ static int __init cy_detect_pci(void) | |||
4758 | 4759 | ||
4759 | for (i = 0; i < NR_CARDS; i++) { | 4760 | for (i = 0; i < NR_CARDS; i++) { |
4760 | /* look for a Cyclades card by vendor and device id */ | 4761 | /* look for a Cyclades card by vendor and device id */ |
4761 | while ((device_id = cy_pci_dev_id[dev_index]) != 0) { | 4762 | while ((device_id = cy_pci_dev_id[dev_index].device) != 0) { |
4762 | if ((pdev = pci_get_device(PCI_VENDOR_ID_CYCLADES, | 4763 | if ((pdev = pci_get_device(PCI_VENDOR_ID_CYCLADES, |
4763 | device_id, pdev)) == NULL) { | 4764 | device_id, pdev)) == NULL) { |
4764 | dev_index++; /* try next device id */ | 4765 | dev_index++; /* try next device id */ |
diff --git a/drivers/char/drm/drm_drv.c b/drivers/char/drm/drm_drv.c index a70af0de4453..f5b9b2480c14 100644 --- a/drivers/char/drm/drm_drv.c +++ b/drivers/char/drm/drm_drv.c | |||
@@ -371,7 +371,7 @@ void drm_exit(struct drm_driver *driver) | |||
371 | EXPORT_SYMBOL(drm_exit); | 371 | EXPORT_SYMBOL(drm_exit); |
372 | 372 | ||
373 | /** File operations structure */ | 373 | /** File operations structure */ |
374 | static struct file_operations drm_stub_fops = { | 374 | static const struct file_operations drm_stub_fops = { |
375 | .owner = THIS_MODULE, | 375 | .owner = THIS_MODULE, |
376 | .open = drm_stub_open | 376 | .open = drm_stub_open |
377 | }; | 377 | }; |
diff --git a/drivers/char/drm/i810_dma.c b/drivers/char/drm/i810_dma.c index 60cb4e45a75e..603d17fd2d69 100644 --- a/drivers/char/drm/i810_dma.c +++ b/drivers/char/drm/i810_dma.c | |||
@@ -112,7 +112,7 @@ static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma) | |||
112 | return 0; | 112 | return 0; |
113 | } | 113 | } |
114 | 114 | ||
115 | static struct file_operations i810_buffer_fops = { | 115 | static const struct file_operations i810_buffer_fops = { |
116 | .open = drm_open, | 116 | .open = drm_open, |
117 | .release = drm_release, | 117 | .release = drm_release, |
118 | .ioctl = drm_ioctl, | 118 | .ioctl = drm_ioctl, |
diff --git a/drivers/char/drm/i830_dma.c b/drivers/char/drm/i830_dma.c index 95224455ec0c..3314a9fea9e5 100644 --- a/drivers/char/drm/i830_dma.c +++ b/drivers/char/drm/i830_dma.c | |||
@@ -114,7 +114,7 @@ static int i830_mmap_buffers(struct file *filp, struct vm_area_struct *vma) | |||
114 | return 0; | 114 | return 0; |
115 | } | 115 | } |
116 | 116 | ||
117 | static struct file_operations i830_buffer_fops = { | 117 | static const struct file_operations i830_buffer_fops = { |
118 | .open = drm_open, | 118 | .open = drm_open, |
119 | .release = drm_release, | 119 | .release = drm_release, |
120 | .ioctl = drm_ioctl, | 120 | .ioctl = drm_ioctl, |
diff --git a/drivers/char/drm/via_dmablit.c b/drivers/char/drm/via_dmablit.c index 2054d5773717..2881a06b6f55 100644 --- a/drivers/char/drm/via_dmablit.c +++ b/drivers/char/drm/via_dmablit.c | |||
@@ -376,10 +376,8 @@ via_dmablit_handler(drm_device_t *dev, int engine, int from_irq) | |||
376 | blitq->cur = cur; | 376 | blitq->cur = cur; |
377 | blitq->num_outstanding--; | 377 | blitq->num_outstanding--; |
378 | blitq->end = jiffies + DRM_HZ; | 378 | blitq->end = jiffies + DRM_HZ; |
379 | if (!timer_pending(&blitq->poll_timer)) { | 379 | if (!timer_pending(&blitq->poll_timer)) |
380 | blitq->poll_timer.expires = jiffies+1; | 380 | mod_timer(&blitq->poll_timer, jiffies + 1); |
381 | add_timer(&blitq->poll_timer); | ||
382 | } | ||
383 | } else { | 381 | } else { |
384 | if (timer_pending(&blitq->poll_timer)) { | 382 | if (timer_pending(&blitq->poll_timer)) { |
385 | del_timer(&blitq->poll_timer); | 383 | del_timer(&blitq->poll_timer); |
@@ -478,8 +476,7 @@ via_dmablit_timer(unsigned long data) | |||
478 | via_dmablit_handler(dev, engine, 0); | 476 | via_dmablit_handler(dev, engine, 0); |
479 | 477 | ||
480 | if (!timer_pending(&blitq->poll_timer)) { | 478 | if (!timer_pending(&blitq->poll_timer)) { |
481 | blitq->poll_timer.expires = jiffies+1; | 479 | mod_timer(&blitq->poll_timer, jiffies + 1); |
482 | add_timer(&blitq->poll_timer); | ||
483 | 480 | ||
484 | /* | 481 | /* |
485 | * Rerun handler to delete timer if engines are off, and | 482 | * Rerun handler to delete timer if engines are off, and |
@@ -574,9 +571,8 @@ via_init_dmablit(drm_device_t *dev) | |||
574 | } | 571 | } |
575 | DRM_INIT_WAITQUEUE(&blitq->busy_queue); | 572 | DRM_INIT_WAITQUEUE(&blitq->busy_queue); |
576 | INIT_WORK(&blitq->wq, via_dmablit_workqueue); | 573 | INIT_WORK(&blitq->wq, via_dmablit_workqueue); |
577 | init_timer(&blitq->poll_timer); | 574 | setup_timer(&blitq->poll_timer, via_dmablit_timer, |
578 | blitq->poll_timer.function = &via_dmablit_timer; | 575 | (unsigned long)blitq); |
579 | blitq->poll_timer.data = (unsigned long) blitq; | ||
580 | } | 576 | } |
581 | } | 577 | } |
582 | 578 | ||
diff --git a/drivers/char/ds1302.c b/drivers/char/ds1302.c index bcdb107aa967..fada6ddefbae 100644 --- a/drivers/char/ds1302.c +++ b/drivers/char/ds1302.c | |||
@@ -120,7 +120,6 @@ get_rtc_time(struct rtc_time *rtc_tm) | |||
120 | unsigned long flags; | 120 | unsigned long flags; |
121 | 121 | ||
122 | local_irq_save(flags); | 122 | local_irq_save(flags); |
123 | local_irq_disable(); | ||
124 | 123 | ||
125 | rtc_tm->tm_sec = CMOS_READ(RTC_SECONDS); | 124 | rtc_tm->tm_sec = CMOS_READ(RTC_SECONDS); |
126 | rtc_tm->tm_min = CMOS_READ(RTC_MINUTES); | 125 | rtc_tm->tm_min = CMOS_READ(RTC_MINUTES); |
@@ -219,7 +218,6 @@ rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd, | |||
219 | BIN_TO_BCD(yrs); | 218 | BIN_TO_BCD(yrs); |
220 | 219 | ||
221 | local_irq_save(flags); | 220 | local_irq_save(flags); |
222 | local_irq_disable(); | ||
223 | CMOS_WRITE(yrs, RTC_YEAR); | 221 | CMOS_WRITE(yrs, RTC_YEAR); |
224 | CMOS_WRITE(mon, RTC_MONTH); | 222 | CMOS_WRITE(mon, RTC_MONTH); |
225 | CMOS_WRITE(day, RTC_DAY_OF_MONTH); | 223 | CMOS_WRITE(day, RTC_DAY_OF_MONTH); |
diff --git a/drivers/char/dtlk.c b/drivers/char/dtlk.c index d4005e94fe5f..d8dbdb916232 100644 --- a/drivers/char/dtlk.c +++ b/drivers/char/dtlk.c | |||
@@ -72,6 +72,7 @@ | |||
72 | #define TRACE_RET ((void) 0) | 72 | #define TRACE_RET ((void) 0) |
73 | #endif /* TRACING */ | 73 | #endif /* TRACING */ |
74 | 74 | ||
75 | static void dtlk_timer_tick(unsigned long data); | ||
75 | 76 | ||
76 | static int dtlk_major; | 77 | static int dtlk_major; |
77 | static int dtlk_port_lpc; | 78 | static int dtlk_port_lpc; |
@@ -81,7 +82,7 @@ static int dtlk_has_indexing; | |||
81 | static unsigned int dtlk_portlist[] = | 82 | static unsigned int dtlk_portlist[] = |
82 | {0x25e, 0x29e, 0x2de, 0x31e, 0x35e, 0x39e, 0}; | 83 | {0x25e, 0x29e, 0x2de, 0x31e, 0x35e, 0x39e, 0}; |
83 | static wait_queue_head_t dtlk_process_list; | 84 | static wait_queue_head_t dtlk_process_list; |
84 | static struct timer_list dtlk_timer; | 85 | static DEFINE_TIMER(dtlk_timer, dtlk_timer_tick, 0, 0); |
85 | 86 | ||
86 | /* prototypes for file_operations struct */ | 87 | /* prototypes for file_operations struct */ |
87 | static ssize_t dtlk_read(struct file *, char __user *, | 88 | static ssize_t dtlk_read(struct file *, char __user *, |
@@ -117,7 +118,6 @@ static char dtlk_write_tts(char); | |||
117 | /* | 118 | /* |
118 | static void dtlk_handle_error(char, char, unsigned int); | 119 | static void dtlk_handle_error(char, char, unsigned int); |
119 | */ | 120 | */ |
120 | static void dtlk_timer_tick(unsigned long data); | ||
121 | 121 | ||
122 | static ssize_t dtlk_read(struct file *file, char __user *buf, | 122 | static ssize_t dtlk_read(struct file *file, char __user *buf, |
123 | size_t count, loff_t * ppos) | 123 | size_t count, loff_t * ppos) |
@@ -318,7 +318,7 @@ static int dtlk_release(struct inode *inode, struct file *file) | |||
318 | } | 318 | } |
319 | TRACE_RET; | 319 | TRACE_RET; |
320 | 320 | ||
321 | del_timer(&dtlk_timer); | 321 | del_timer_sync(&dtlk_timer); |
322 | 322 | ||
323 | return 0; | 323 | return 0; |
324 | } | 324 | } |
@@ -336,8 +336,6 @@ static int __init dtlk_init(void) | |||
336 | if (dtlk_dev_probe() == 0) | 336 | if (dtlk_dev_probe() == 0) |
337 | printk(", MAJOR %d\n", dtlk_major); | 337 | printk(", MAJOR %d\n", dtlk_major); |
338 | 338 | ||
339 | init_timer(&dtlk_timer); | ||
340 | dtlk_timer.function = dtlk_timer_tick; | ||
341 | init_waitqueue_head(&dtlk_process_list); | 339 | init_waitqueue_head(&dtlk_process_list); |
342 | 340 | ||
343 | return 0; | 341 | return 0; |
diff --git a/drivers/char/generic_nvram.c b/drivers/char/generic_nvram.c index 43ff59816511..2398e864c28d 100644 --- a/drivers/char/generic_nvram.c +++ b/drivers/char/generic_nvram.c | |||
@@ -117,7 +117,7 @@ static int nvram_ioctl(struct inode *inode, struct file *file, | |||
117 | return 0; | 117 | return 0; |
118 | } | 118 | } |
119 | 119 | ||
120 | struct file_operations nvram_fops = { | 120 | const struct file_operations nvram_fops = { |
121 | .owner = THIS_MODULE, | 121 | .owner = THIS_MODULE, |
122 | .llseek = nvram_llseek, | 122 | .llseek = nvram_llseek, |
123 | .read = read_nvram, | 123 | .read = read_nvram, |
diff --git a/drivers/char/hw_random/intel-rng.c b/drivers/char/hw_random/intel-rng.c index f22e78e3c70f..cc1046e6ee02 100644 --- a/drivers/char/hw_random/intel-rng.c +++ b/drivers/char/hw_random/intel-rng.c | |||
@@ -96,49 +96,49 @@ | |||
96 | */ | 96 | */ |
97 | static const struct pci_device_id pci_tbl[] = { | 97 | static const struct pci_device_id pci_tbl[] = { |
98 | /* AA | 98 | /* AA |
99 | { 0x8086, 0x2418, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, */ | 99 | { PCI_DEVICE(0x8086, 0x2418) }, */ |
100 | { 0x8086, 0x2410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* AA */ | 100 | { PCI_DEVICE(0x8086, 0x2410) }, /* AA */ |
101 | /* AB | 101 | /* AB |
102 | { 0x8086, 0x2428, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, */ | 102 | { PCI_DEVICE(0x8086, 0x2428) }, */ |
103 | { 0x8086, 0x2420, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* AB */ | 103 | { PCI_DEVICE(0x8086, 0x2420) }, /* AB */ |
104 | /* ?? | 104 | /* ?? |
105 | { 0x8086, 0x2430, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, */ | 105 | { PCI_DEVICE(0x8086, 0x2430) }, */ |
106 | /* BAM, CAM, DBM, FBM, GxM | 106 | /* BAM, CAM, DBM, FBM, GxM |
107 | { 0x8086, 0x2448, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, */ | 107 | { PCI_DEVICE(0x8086, 0x2448) }, */ |
108 | { 0x8086, 0x244c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* BAM */ | 108 | { PCI_DEVICE(0x8086, 0x244c) }, /* BAM */ |
109 | { 0x8086, 0x248c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* CAM */ | 109 | { PCI_DEVICE(0x8086, 0x248c) }, /* CAM */ |
110 | { 0x8086, 0x24cc, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* DBM */ | 110 | { PCI_DEVICE(0x8086, 0x24cc) }, /* DBM */ |
111 | { 0x8086, 0x2641, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* FBM */ | 111 | { PCI_DEVICE(0x8086, 0x2641) }, /* FBM */ |
112 | { 0x8086, 0x27b9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* GxM */ | 112 | { PCI_DEVICE(0x8086, 0x27b9) }, /* GxM */ |
113 | { 0x8086, 0x27bd, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* GxM DH */ | 113 | { PCI_DEVICE(0x8086, 0x27bd) }, /* GxM DH */ |
114 | /* BA, CA, DB, Ex, 6300, Fx, 631x/632x, Gx | 114 | /* BA, CA, DB, Ex, 6300, Fx, 631x/632x, Gx |
115 | { 0x8086, 0x244e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, */ | 115 | { PCI_DEVICE(0x8086, 0x244e) }, */ |
116 | { 0x8086, 0x2440, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* BA */ | 116 | { PCI_DEVICE(0x8086, 0x2440) }, /* BA */ |
117 | { 0x8086, 0x2480, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* CA */ | 117 | { PCI_DEVICE(0x8086, 0x2480) }, /* CA */ |
118 | { 0x8086, 0x24c0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* DB */ | 118 | { PCI_DEVICE(0x8086, 0x24c0) }, /* DB */ |
119 | { 0x8086, 0x24d0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Ex */ | 119 | { PCI_DEVICE(0x8086, 0x24d0) }, /* Ex */ |
120 | { 0x8086, 0x25a1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 6300 */ | 120 | { PCI_DEVICE(0x8086, 0x25a1) }, /* 6300 */ |
121 | { 0x8086, 0x2640, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Fx */ | 121 | { PCI_DEVICE(0x8086, 0x2640) }, /* Fx */ |
122 | { 0x8086, 0x2670, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 122 | { PCI_DEVICE(0x8086, 0x2670) }, /* 631x/632x */ |
123 | { 0x8086, 0x2671, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 123 | { PCI_DEVICE(0x8086, 0x2671) }, /* 631x/632x */ |
124 | { 0x8086, 0x2672, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 124 | { PCI_DEVICE(0x8086, 0x2672) }, /* 631x/632x */ |
125 | { 0x8086, 0x2673, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 125 | { PCI_DEVICE(0x8086, 0x2673) }, /* 631x/632x */ |
126 | { 0x8086, 0x2674, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 126 | { PCI_DEVICE(0x8086, 0x2674) }, /* 631x/632x */ |
127 | { 0x8086, 0x2675, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 127 | { PCI_DEVICE(0x8086, 0x2675) }, /* 631x/632x */ |
128 | { 0x8086, 0x2676, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 128 | { PCI_DEVICE(0x8086, 0x2676) }, /* 631x/632x */ |
129 | { 0x8086, 0x2677, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 129 | { PCI_DEVICE(0x8086, 0x2677) }, /* 631x/632x */ |
130 | { 0x8086, 0x2678, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 130 | { PCI_DEVICE(0x8086, 0x2678) }, /* 631x/632x */ |
131 | { 0x8086, 0x2679, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 131 | { PCI_DEVICE(0x8086, 0x2679) }, /* 631x/632x */ |
132 | { 0x8086, 0x267a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 132 | { PCI_DEVICE(0x8086, 0x267a) }, /* 631x/632x */ |
133 | { 0x8086, 0x267b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 133 | { PCI_DEVICE(0x8086, 0x267b) }, /* 631x/632x */ |
134 | { 0x8086, 0x267c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 134 | { PCI_DEVICE(0x8086, 0x267c) }, /* 631x/632x */ |
135 | { 0x8086, 0x267d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 135 | { PCI_DEVICE(0x8086, 0x267d) }, /* 631x/632x */ |
136 | { 0x8086, 0x267e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 136 | { PCI_DEVICE(0x8086, 0x267e) }, /* 631x/632x */ |
137 | { 0x8086, 0x267f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* 631x/632x */ | 137 | { PCI_DEVICE(0x8086, 0x267f) }, /* 631x/632x */ |
138 | { 0x8086, 0x27b8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* Gx */ | 138 | { PCI_DEVICE(0x8086, 0x27b8) }, /* Gx */ |
139 | /* E | 139 | /* E |
140 | { 0x8086, 0x245e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, */ | 140 | { PCI_DEVICE(0x8086, 0x245e) }, */ |
141 | { 0x8086, 0x2450, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* E */ | 141 | { PCI_DEVICE(0x8086, 0x2450) }, /* E */ |
142 | { 0, }, /* terminate list */ | 142 | { 0, }, /* terminate list */ |
143 | }; | 143 | }; |
144 | MODULE_DEVICE_TABLE(pci, pci_tbl); | 144 | MODULE_DEVICE_TABLE(pci, pci_tbl); |
diff --git a/drivers/char/ip2/i2lib.c b/drivers/char/ip2/i2lib.c index 88b9d338da53..f86fa0c55d36 100644 --- a/drivers/char/ip2/i2lib.c +++ b/drivers/char/ip2/i2lib.c | |||
@@ -80,7 +80,7 @@ static int i2RetryFlushOutput(i2ChanStrPtr); | |||
80 | // Not a documented part of the library routines (careful...) but the Diagnostic | 80 | // Not a documented part of the library routines (careful...) but the Diagnostic |
81 | // i2diag.c finds them useful to help the throughput in certain limited | 81 | // i2diag.c finds them useful to help the throughput in certain limited |
82 | // single-threaded operations. | 82 | // single-threaded operations. |
83 | static void iiSendPendingMail(i2eBordStrPtr); | 83 | static inline void iiSendPendingMail(i2eBordStrPtr); |
84 | static void serviceOutgoingFifo(i2eBordStrPtr); | 84 | static void serviceOutgoingFifo(i2eBordStrPtr); |
85 | 85 | ||
86 | // Functions defined in ip2.c as part of interrupt handling | 86 | // Functions defined in ip2.c as part of interrupt handling |
@@ -150,6 +150,13 @@ i2Validate ( i2ChanStrPtr pCh ) | |||
150 | == (CHANNEL_MAGIC | CHANNEL_SUPPORT)); | 150 | == (CHANNEL_MAGIC | CHANNEL_SUPPORT)); |
151 | } | 151 | } |
152 | 152 | ||
153 | static void iiSendPendingMail_t(unsigned long data) | ||
154 | { | ||
155 | i2eBordStrPtr pB = (i2eBordStrPtr)data; | ||
156 | |||
157 | iiSendPendingMail(pB); | ||
158 | } | ||
159 | |||
153 | //****************************************************************************** | 160 | //****************************************************************************** |
154 | // Function: iiSendPendingMail(pB) | 161 | // Function: iiSendPendingMail(pB) |
155 | // Parameters: Pointer to a board structure | 162 | // Parameters: Pointer to a board structure |
@@ -184,12 +191,9 @@ iiSendPendingMail(i2eBordStrPtr pB) | |||
184 | /\/\|=mhw=|\/\/ */ | 191 | /\/\|=mhw=|\/\/ */ |
185 | 192 | ||
186 | if( ++pB->SendPendingRetry < 16 ) { | 193 | if( ++pB->SendPendingRetry < 16 ) { |
187 | 194 | setup_timer(&pB->SendPendingTimer, | |
188 | init_timer( &(pB->SendPendingTimer) ); | 195 | iiSendPendingMail_t, (unsigned long)pB); |
189 | pB->SendPendingTimer.expires = jiffies + 1; | 196 | mod_timer(&pB->SendPendingTimer, jiffies + 1); |
190 | pB->SendPendingTimer.function = (void*)(unsigned long)iiSendPendingMail; | ||
191 | pB->SendPendingTimer.data = (unsigned long)pB; | ||
192 | add_timer( &(pB->SendPendingTimer) ); | ||
193 | } else { | 197 | } else { |
194 | printk( KERN_ERR "IP2: iiSendPendingMail unable to queue outbound mail\n" ); | 198 | printk( KERN_ERR "IP2: iiSendPendingMail unable to queue outbound mail\n" ); |
195 | } | 199 | } |
@@ -1265,8 +1269,10 @@ i2RetryFlushOutput(i2ChanStrPtr pCh) | |||
1265 | // soon as all the data is completely sent. | 1269 | // soon as all the data is completely sent. |
1266 | //****************************************************************************** | 1270 | //****************************************************************************** |
1267 | static void | 1271 | static void |
1268 | i2DrainWakeup(i2ChanStrPtr pCh) | 1272 | i2DrainWakeup(unsigned long d) |
1269 | { | 1273 | { |
1274 | i2ChanStrPtr pCh = (i2ChanStrPtr)d; | ||
1275 | |||
1270 | ip2trace (CHANN, ITRC_DRAIN, 10, 1, pCh->BookmarkTimer.expires ); | 1276 | ip2trace (CHANN, ITRC_DRAIN, 10, 1, pCh->BookmarkTimer.expires ); |
1271 | 1277 | ||
1272 | pCh->BookmarkTimer.expires = 0; | 1278 | pCh->BookmarkTimer.expires = 0; |
@@ -1292,14 +1298,12 @@ i2DrainOutput(i2ChanStrPtr pCh, int timeout) | |||
1292 | } | 1298 | } |
1293 | if ((timeout > 0) && (pCh->BookmarkTimer.expires == 0 )) { | 1299 | if ((timeout > 0) && (pCh->BookmarkTimer.expires == 0 )) { |
1294 | // One per customer (channel) | 1300 | // One per customer (channel) |
1295 | init_timer( &(pCh->BookmarkTimer) ); | 1301 | setup_timer(&pCh->BookmarkTimer, i2DrainWakeup, |
1296 | pCh->BookmarkTimer.expires = jiffies + timeout; | 1302 | (unsigned long)pCh); |
1297 | pCh->BookmarkTimer.function = (void*)(unsigned long)i2DrainWakeup; | ||
1298 | pCh->BookmarkTimer.data = (unsigned long)pCh; | ||
1299 | 1303 | ||
1300 | ip2trace (CHANN, ITRC_DRAIN, 1, 1, pCh->BookmarkTimer.expires ); | 1304 | ip2trace (CHANN, ITRC_DRAIN, 1, 1, pCh->BookmarkTimer.expires ); |
1301 | 1305 | ||
1302 | add_timer( &(pCh->BookmarkTimer) ); | 1306 | mod_timer(&pCh->BookmarkTimer, jiffies + timeout); |
1303 | } | 1307 | } |
1304 | 1308 | ||
1305 | i2QueueCommands( PTYPE_INLINE, pCh, -1, 1, CMD_BMARK_REQ ); | 1309 | i2QueueCommands( PTYPE_INLINE, pCh, -1, 1, CMD_BMARK_REQ ); |
diff --git a/drivers/char/ip2/ip2main.c b/drivers/char/ip2/ip2main.c index 7c70310a49b5..83c7258d3580 100644 --- a/drivers/char/ip2/ip2main.c +++ b/drivers/char/ip2/ip2main.c | |||
@@ -1271,8 +1271,8 @@ static void do_input(struct work_struct *work) | |||
1271 | // code duplicated from n_tty (ldisc) | 1271 | // code duplicated from n_tty (ldisc) |
1272 | static inline void isig(int sig, struct tty_struct *tty, int flush) | 1272 | static inline void isig(int sig, struct tty_struct *tty, int flush) |
1273 | { | 1273 | { |
1274 | if (tty->pgrp > 0) | 1274 | if (tty->pgrp) |
1275 | kill_pg(tty->pgrp, sig, 1); | 1275 | kill_pgrp(tty->pgrp, sig, 1); |
1276 | if (flush || !L_NOFLSH(tty)) { | 1276 | if (flush || !L_NOFLSH(tty)) { |
1277 | if ( tty->ldisc.flush_buffer ) | 1277 | if ( tty->ldisc.flush_buffer ) |
1278 | tty->ldisc.flush_buffer(tty); | 1278 | tty->ldisc.flush_buffer(tty); |
diff --git a/drivers/char/mbcs.c b/drivers/char/mbcs.c index 0afb7ba999cf..57f9115a456c 100644 --- a/drivers/char/mbcs.c +++ b/drivers/char/mbcs.c | |||
@@ -46,7 +46,7 @@ LIST_HEAD(soft_list); | |||
46 | /* | 46 | /* |
47 | * file operations | 47 | * file operations |
48 | */ | 48 | */ |
49 | struct file_operations mbcs_ops = { | 49 | const struct file_operations mbcs_ops = { |
50 | .open = mbcs_open, | 50 | .open = mbcs_open, |
51 | .llseek = mbcs_sram_llseek, | 51 | .llseek = mbcs_sram_llseek, |
52 | .read = mbcs_sram_read, | 52 | .read = mbcs_sram_read, |
diff --git a/drivers/char/mspec.c b/drivers/char/mspec.c index 235e89226112..7ac30612068b 100644 --- a/drivers/char/mspec.c +++ b/drivers/char/mspec.c | |||
@@ -291,7 +291,7 @@ uncached_mmap(struct file *file, struct vm_area_struct *vma) | |||
291 | return mspec_mmap(file, vma, MSPEC_UNCACHED); | 291 | return mspec_mmap(file, vma, MSPEC_UNCACHED); |
292 | } | 292 | } |
293 | 293 | ||
294 | static struct file_operations fetchop_fops = { | 294 | static const struct file_operations fetchop_fops = { |
295 | .owner = THIS_MODULE, | 295 | .owner = THIS_MODULE, |
296 | .mmap = fetchop_mmap | 296 | .mmap = fetchop_mmap |
297 | }; | 297 | }; |
@@ -302,7 +302,7 @@ static struct miscdevice fetchop_miscdev = { | |||
302 | .fops = &fetchop_fops | 302 | .fops = &fetchop_fops |
303 | }; | 303 | }; |
304 | 304 | ||
305 | static struct file_operations cached_fops = { | 305 | static const struct file_operations cached_fops = { |
306 | .owner = THIS_MODULE, | 306 | .owner = THIS_MODULE, |
307 | .mmap = cached_mmap | 307 | .mmap = cached_mmap |
308 | }; | 308 | }; |
@@ -313,7 +313,7 @@ static struct miscdevice cached_miscdev = { | |||
313 | .fops = &cached_fops | 313 | .fops = &cached_fops |
314 | }; | 314 | }; |
315 | 315 | ||
316 | static struct file_operations uncached_fops = { | 316 | static const struct file_operations uncached_fops = { |
317 | .owner = THIS_MODULE, | 317 | .owner = THIS_MODULE, |
318 | .mmap = uncached_mmap | 318 | .mmap = uncached_mmap |
319 | }; | 319 | }; |
diff --git a/drivers/char/n_r3964.c b/drivers/char/n_r3964.c index fab1b7d42858..65f2d3a96b85 100644 --- a/drivers/char/n_r3964.c +++ b/drivers/char/n_r3964.c | |||
@@ -1005,9 +1005,7 @@ static int r3964_open(struct tty_struct *tty) | |||
1005 | tty->disc_data = pInfo; | 1005 | tty->disc_data = pInfo; |
1006 | tty->receive_room = 65536; | 1006 | tty->receive_room = 65536; |
1007 | 1007 | ||
1008 | init_timer(&pInfo->tmr); | 1008 | setup_timer(&pInfo->tmr, on_timeout, (unsigned long)pInfo); |
1009 | pInfo->tmr.data = (unsigned long)pInfo; | ||
1010 | pInfo->tmr.function = on_timeout; | ||
1011 | 1009 | ||
1012 | return 0; | 1010 | return 0; |
1013 | } | 1011 | } |
diff --git a/drivers/char/n_tty.c b/drivers/char/n_tty.c index 2bdb0144a22e..6ac3ca4c723c 100644 --- a/drivers/char/n_tty.c +++ b/drivers/char/n_tty.c | |||
@@ -579,8 +579,8 @@ static void eraser(unsigned char c, struct tty_struct *tty) | |||
579 | 579 | ||
580 | static inline void isig(int sig, struct tty_struct *tty, int flush) | 580 | static inline void isig(int sig, struct tty_struct *tty, int flush) |
581 | { | 581 | { |
582 | if (tty->pgrp > 0) | 582 | if (tty->pgrp) |
583 | kill_pg(tty->pgrp, sig, 1); | 583 | kill_pgrp(tty->pgrp, sig, 1); |
584 | if (flush || !L_NOFLSH(tty)) { | 584 | if (flush || !L_NOFLSH(tty)) { |
585 | n_tty_flush_buffer(tty); | 585 | n_tty_flush_buffer(tty); |
586 | if (tty->driver->flush_buffer) | 586 | if (tty->driver->flush_buffer) |
@@ -1184,13 +1184,13 @@ static int job_control(struct tty_struct *tty, struct file *file) | |||
1184 | /* don't stop on /dev/console */ | 1184 | /* don't stop on /dev/console */ |
1185 | if (file->f_op->write != redirected_tty_write && | 1185 | if (file->f_op->write != redirected_tty_write && |
1186 | current->signal->tty == tty) { | 1186 | current->signal->tty == tty) { |
1187 | if (tty->pgrp <= 0) | 1187 | if (!tty->pgrp) |
1188 | printk("read_chan: tty->pgrp <= 0!\n"); | 1188 | printk("read_chan: no tty->pgrp!\n"); |
1189 | else if (process_group(current) != tty->pgrp) { | 1189 | else if (task_pgrp(current) != tty->pgrp) { |
1190 | if (is_ignored(SIGTTIN) || | 1190 | if (is_ignored(SIGTTIN) || |
1191 | is_orphaned_pgrp(process_group(current))) | 1191 | is_current_pgrp_orphaned()) |
1192 | return -EIO; | 1192 | return -EIO; |
1193 | kill_pg(process_group(current), SIGTTIN, 1); | 1193 | kill_pgrp(task_pgrp(current), SIGTTIN, 1); |
1194 | return -ERESTARTSYS; | 1194 | return -ERESTARTSYS; |
1195 | } | 1195 | } |
1196 | } | 1196 | } |
diff --git a/drivers/char/nwbutton.c b/drivers/char/nwbutton.c index 2d264971d839..2604246501e4 100644 --- a/drivers/char/nwbutton.c +++ b/drivers/char/nwbutton.c | |||
@@ -23,8 +23,11 @@ | |||
23 | #define __NWBUTTON_C /* Tell the header file who we are */ | 23 | #define __NWBUTTON_C /* Tell the header file who we are */ |
24 | #include "nwbutton.h" | 24 | #include "nwbutton.h" |
25 | 25 | ||
26 | static void button_sequence_finished (unsigned long parameters); | ||
27 | |||
26 | static int button_press_count; /* The count of button presses */ | 28 | static int button_press_count; /* The count of button presses */ |
27 | static struct timer_list button_timer; /* Times for the end of a sequence */ | 29 | /* Times for the end of a sequence */ |
30 | static DEFINE_TIMER(button_timer, button_sequence_finished, 0, 0); | ||
28 | static DECLARE_WAIT_QUEUE_HEAD(button_wait_queue); /* Used for blocking read */ | 31 | static DECLARE_WAIT_QUEUE_HEAD(button_wait_queue); /* Used for blocking read */ |
29 | static char button_output_buffer[32]; /* Stores data to write out of device */ | 32 | static char button_output_buffer[32]; /* Stores data to write out of device */ |
30 | static int bcount; /* The number of bytes in the buffer */ | 33 | static int bcount; /* The number of bytes in the buffer */ |
@@ -146,14 +149,8 @@ static void button_sequence_finished (unsigned long parameters) | |||
146 | 149 | ||
147 | static irqreturn_t button_handler (int irq, void *dev_id) | 150 | static irqreturn_t button_handler (int irq, void *dev_id) |
148 | { | 151 | { |
149 | if (button_press_count) { | ||
150 | del_timer (&button_timer); | ||
151 | } | ||
152 | button_press_count++; | 152 | button_press_count++; |
153 | init_timer (&button_timer); | 153 | mod_timer(&button_timer, jiffies + bdelay); |
154 | button_timer.function = button_sequence_finished; | ||
155 | button_timer.expires = (jiffies + bdelay); | ||
156 | add_timer (&button_timer); | ||
157 | 154 | ||
158 | return IRQ_HANDLED; | 155 | return IRQ_HANDLED; |
159 | } | 156 | } |
diff --git a/drivers/char/pcmcia/cm4000_cs.c b/drivers/char/pcmcia/cm4000_cs.c index 211c93fda6fc..e91b43a014b0 100644 --- a/drivers/char/pcmcia/cm4000_cs.c +++ b/drivers/char/pcmcia/cm4000_cs.c | |||
@@ -946,8 +946,7 @@ release_io: | |||
946 | 946 | ||
947 | return_with_timer: | 947 | return_with_timer: |
948 | DEBUGP(7, dev, "<- monitor_card (returns with timer)\n"); | 948 | DEBUGP(7, dev, "<- monitor_card (returns with timer)\n"); |
949 | dev->timer.expires = jiffies + dev->mdelay; | 949 | mod_timer(&dev->timer, jiffies + dev->mdelay); |
950 | add_timer(&dev->timer); | ||
951 | clear_bit(LOCK_MONITOR, &dev->flags); | 950 | clear_bit(LOCK_MONITOR, &dev->flags); |
952 | } | 951 | } |
953 | 952 | ||
@@ -1406,12 +1405,9 @@ static void start_monitor(struct cm4000_dev *dev) | |||
1406 | DEBUGP(3, dev, "-> start_monitor\n"); | 1405 | DEBUGP(3, dev, "-> start_monitor\n"); |
1407 | if (!dev->monitor_running) { | 1406 | if (!dev->monitor_running) { |
1408 | DEBUGP(5, dev, "create, init and add timer\n"); | 1407 | DEBUGP(5, dev, "create, init and add timer\n"); |
1409 | init_timer(&dev->timer); | 1408 | setup_timer(&dev->timer, monitor_card, (unsigned long)dev); |
1410 | dev->monitor_running = 1; | 1409 | dev->monitor_running = 1; |
1411 | dev->timer.expires = jiffies; | 1410 | mod_timer(&dev->timer, jiffies); |
1412 | dev->timer.data = (unsigned long) dev; | ||
1413 | dev->timer.function = monitor_card; | ||
1414 | add_timer(&dev->timer); | ||
1415 | } else | 1411 | } else |
1416 | DEBUGP(5, dev, "monitor already running\n"); | 1412 | DEBUGP(5, dev, "monitor already running\n"); |
1417 | DEBUGP(3, dev, "<- start_monitor\n"); | 1413 | DEBUGP(3, dev, "<- start_monitor\n"); |
diff --git a/drivers/char/pcmcia/cm4040_cs.c b/drivers/char/pcmcia/cm4040_cs.c index 9b1ff7e8f896..0e82968c2f38 100644 --- a/drivers/char/pcmcia/cm4040_cs.c +++ b/drivers/char/pcmcia/cm4040_cs.c | |||
@@ -632,8 +632,7 @@ static int reader_probe(struct pcmcia_device *link) | |||
632 | init_waitqueue_head(&dev->poll_wait); | 632 | init_waitqueue_head(&dev->poll_wait); |
633 | init_waitqueue_head(&dev->read_wait); | 633 | init_waitqueue_head(&dev->read_wait); |
634 | init_waitqueue_head(&dev->write_wait); | 634 | init_waitqueue_head(&dev->write_wait); |
635 | init_timer(&dev->poll_timer); | 635 | setup_timer(&dev->poll_timer, cm4040_do_poll, 0); |
636 | dev->poll_timer.function = &cm4040_do_poll; | ||
637 | 636 | ||
638 | ret = reader_config(link, i); | 637 | ret = reader_config(link, i); |
639 | if (ret) | 638 | if (ret) |
diff --git a/drivers/char/pcmcia/synclink_cs.c b/drivers/char/pcmcia/synclink_cs.c index 4ab2c98f978c..8d025e9b5bce 100644 --- a/drivers/char/pcmcia/synclink_cs.c +++ b/drivers/char/pcmcia/synclink_cs.c | |||
@@ -1361,9 +1361,7 @@ static int startup(MGSLPC_INFO * info) | |||
1361 | 1361 | ||
1362 | memset(&info->icount, 0, sizeof(info->icount)); | 1362 | memset(&info->icount, 0, sizeof(info->icount)); |
1363 | 1363 | ||
1364 | init_timer(&info->tx_timer); | 1364 | setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info); |
1365 | info->tx_timer.data = (unsigned long)info; | ||
1366 | info->tx_timer.function = tx_timeout; | ||
1367 | 1365 | ||
1368 | /* Allocate and claim adapter resources */ | 1366 | /* Allocate and claim adapter resources */ |
1369 | retval = claim_resources(info); | 1367 | retval = claim_resources(info); |
@@ -1408,7 +1406,7 @@ static void shutdown(MGSLPC_INFO * info) | |||
1408 | wake_up_interruptible(&info->status_event_wait_q); | 1406 | wake_up_interruptible(&info->status_event_wait_q); |
1409 | wake_up_interruptible(&info->event_wait_q); | 1407 | wake_up_interruptible(&info->event_wait_q); |
1410 | 1408 | ||
1411 | del_timer(&info->tx_timer); | 1409 | del_timer_sync(&info->tx_timer); |
1412 | 1410 | ||
1413 | if (info->tx_buf) { | 1411 | if (info->tx_buf) { |
1414 | free_page((unsigned long) info->tx_buf); | 1412 | free_page((unsigned long) info->tx_buf); |
@@ -3549,8 +3547,8 @@ static void tx_start(MGSLPC_INFO *info) | |||
3549 | } else { | 3547 | } else { |
3550 | info->tx_active = 1; | 3548 | info->tx_active = 1; |
3551 | tx_ready(info); | 3549 | tx_ready(info); |
3552 | info->tx_timer.expires = jiffies + msecs_to_jiffies(5000); | 3550 | mod_timer(&info->tx_timer, jiffies + |
3553 | add_timer(&info->tx_timer); | 3551 | msecs_to_jiffies(5000)); |
3554 | } | 3552 | } |
3555 | } | 3553 | } |
3556 | 3554 | ||
diff --git a/drivers/char/random.c b/drivers/char/random.c index 13d0b1350a62..b9dc7aa1dfb3 100644 --- a/drivers/char/random.c +++ b/drivers/char/random.c | |||
@@ -1117,14 +1117,14 @@ random_ioctl(struct inode * inode, struct file * file, | |||
1117 | } | 1117 | } |
1118 | } | 1118 | } |
1119 | 1119 | ||
1120 | struct file_operations random_fops = { | 1120 | const struct file_operations random_fops = { |
1121 | .read = random_read, | 1121 | .read = random_read, |
1122 | .write = random_write, | 1122 | .write = random_write, |
1123 | .poll = random_poll, | 1123 | .poll = random_poll, |
1124 | .ioctl = random_ioctl, | 1124 | .ioctl = random_ioctl, |
1125 | }; | 1125 | }; |
1126 | 1126 | ||
1127 | struct file_operations urandom_fops = { | 1127 | const struct file_operations urandom_fops = { |
1128 | .read = urandom_read, | 1128 | .read = urandom_read, |
1129 | .write = random_write, | 1129 | .write = random_write, |
1130 | .ioctl = random_ioctl, | 1130 | .ioctl = random_ioctl, |
diff --git a/drivers/char/rio/rio_linux.c b/drivers/char/rio/rio_linux.c index e79b2ede8510..85c161845260 100644 --- a/drivers/char/rio/rio_linux.c +++ b/drivers/char/rio/rio_linux.c | |||
@@ -418,8 +418,7 @@ static void rio_pollfunc(unsigned long data) | |||
418 | func_enter(); | 418 | func_enter(); |
419 | 419 | ||
420 | rio_interrupt(0, &p->RIOHosts[data]); | 420 | rio_interrupt(0, &p->RIOHosts[data]); |
421 | p->RIOHosts[data].timer.expires = jiffies + rio_poll; | 421 | mod_timer(&p->RIOHosts[data].timer, jiffies + rio_poll); |
422 | add_timer(&p->RIOHosts[data].timer); | ||
423 | 422 | ||
424 | func_exit(); | 423 | func_exit(); |
425 | } | 424 | } |
@@ -1154,13 +1153,10 @@ static int __init rio_init(void) | |||
1154 | /* Init the timer "always" to make sure that it can safely be | 1153 | /* Init the timer "always" to make sure that it can safely be |
1155 | deleted when we unload... */ | 1154 | deleted when we unload... */ |
1156 | 1155 | ||
1157 | init_timer(&hp->timer); | 1156 | setup_timer(&hp->timer, rio_pollfunc, i); |
1158 | if (!hp->Ivec) { | 1157 | if (!hp->Ivec) { |
1159 | rio_dprintk(RIO_DEBUG_INIT, "Starting polling at %dj intervals.\n", rio_poll); | 1158 | rio_dprintk(RIO_DEBUG_INIT, "Starting polling at %dj intervals.\n", rio_poll); |
1160 | hp->timer.data = i; | 1159 | mod_timer(&hp->timer, jiffies + rio_poll); |
1161 | hp->timer.function = rio_pollfunc; | ||
1162 | hp->timer.expires = jiffies + rio_poll; | ||
1163 | add_timer(&hp->timer); | ||
1164 | } | 1160 | } |
1165 | } | 1161 | } |
1166 | 1162 | ||
@@ -1191,7 +1187,7 @@ static void __exit rio_exit(void) | |||
1191 | rio_dprintk(RIO_DEBUG_INIT, "freed irq %d.\n", hp->Ivec); | 1187 | rio_dprintk(RIO_DEBUG_INIT, "freed irq %d.\n", hp->Ivec); |
1192 | } | 1188 | } |
1193 | /* It is safe/allowed to del_timer a non-active timer */ | 1189 | /* It is safe/allowed to del_timer a non-active timer */ |
1194 | del_timer(&hp->timer); | 1190 | del_timer_sync(&hp->timer); |
1195 | if (hp->Caddr) | 1191 | if (hp->Caddr) |
1196 | iounmap(hp->Caddr); | 1192 | iounmap(hp->Caddr); |
1197 | if (hp->Type == RIO_PCI) | 1193 | if (hp->Type == RIO_PCI) |
diff --git a/drivers/char/rocket.c b/drivers/char/rocket.c index 106f225e745f..76357c855ce3 100644 --- a/drivers/char/rocket.c +++ b/drivers/char/rocket.c | |||
@@ -106,6 +106,8 @@ | |||
106 | 106 | ||
107 | /****** RocketPort Local Variables ******/ | 107 | /****** RocketPort Local Variables ******/ |
108 | 108 | ||
109 | static void rp_do_poll(unsigned long dummy); | ||
110 | |||
109 | static struct tty_driver *rocket_driver; | 111 | static struct tty_driver *rocket_driver; |
110 | 112 | ||
111 | static struct rocket_version driver_version = { | 113 | static struct rocket_version driver_version = { |
@@ -116,7 +118,7 @@ static struct r_port *rp_table[MAX_RP_PORTS]; /* The main repository of | |||
116 | static unsigned int xmit_flags[NUM_BOARDS]; /* Bit significant, indicates port had data to transmit. */ | 118 | static unsigned int xmit_flags[NUM_BOARDS]; /* Bit significant, indicates port had data to transmit. */ |
117 | /* eg. Bit 0 indicates port 0 has xmit data, ... */ | 119 | /* eg. Bit 0 indicates port 0 has xmit data, ... */ |
118 | static atomic_t rp_num_ports_open; /* Number of serial ports open */ | 120 | static atomic_t rp_num_ports_open; /* Number of serial ports open */ |
119 | static struct timer_list rocket_timer; | 121 | static DEFINE_TIMER(rocket_timer, rp_do_poll, 0, 0); |
120 | 122 | ||
121 | static unsigned long board1; /* ISA addresses, retrieved from rocketport.conf */ | 123 | static unsigned long board1; /* ISA addresses, retrieved from rocketport.conf */ |
122 | static unsigned long board2; | 124 | static unsigned long board2; |
@@ -2368,12 +2370,6 @@ static int __init rp_init(void) | |||
2368 | return -ENOMEM; | 2370 | return -ENOMEM; |
2369 | 2371 | ||
2370 | /* | 2372 | /* |
2371 | * Set up the timer channel. | ||
2372 | */ | ||
2373 | init_timer(&rocket_timer); | ||
2374 | rocket_timer.function = rp_do_poll; | ||
2375 | |||
2376 | /* | ||
2377 | * Initialize the array of pointers to our own internal state | 2373 | * Initialize the array of pointers to our own internal state |
2378 | * structures. | 2374 | * structures. |
2379 | */ | 2375 | */ |
diff --git a/drivers/char/rtc.c b/drivers/char/rtc.c index 664f36c98e6a..b6d3072dce5a 100644 --- a/drivers/char/rtc.c +++ b/drivers/char/rtc.c | |||
@@ -135,7 +135,9 @@ static struct fasync_struct *rtc_async_queue; | |||
135 | static DECLARE_WAIT_QUEUE_HEAD(rtc_wait); | 135 | static DECLARE_WAIT_QUEUE_HEAD(rtc_wait); |
136 | 136 | ||
137 | #ifdef RTC_IRQ | 137 | #ifdef RTC_IRQ |
138 | static struct timer_list rtc_irq_timer; | 138 | static void rtc_dropped_irq(unsigned long data); |
139 | |||
140 | static DEFINE_TIMER(rtc_irq_timer, rtc_dropped_irq, 0, 0); | ||
139 | #endif | 141 | #endif |
140 | 142 | ||
141 | static ssize_t rtc_read(struct file *file, char __user *buf, | 143 | static ssize_t rtc_read(struct file *file, char __user *buf, |
@@ -150,8 +152,6 @@ static unsigned int rtc_poll(struct file *file, poll_table *wait); | |||
150 | 152 | ||
151 | static void get_rtc_alm_time (struct rtc_time *alm_tm); | 153 | static void get_rtc_alm_time (struct rtc_time *alm_tm); |
152 | #ifdef RTC_IRQ | 154 | #ifdef RTC_IRQ |
153 | static void rtc_dropped_irq(unsigned long data); | ||
154 | |||
155 | static void set_rtc_irq_bit_locked(unsigned char bit); | 155 | static void set_rtc_irq_bit_locked(unsigned char bit); |
156 | static void mask_rtc_irq_bit_locked(unsigned char bit); | 156 | static void mask_rtc_irq_bit_locked(unsigned char bit); |
157 | 157 | ||
@@ -454,8 +454,8 @@ static int rtc_do_ioctl(unsigned int cmd, unsigned long arg, int kernel) | |||
454 | 454 | ||
455 | spin_lock_irqsave (&rtc_lock, flags); | 455 | spin_lock_irqsave (&rtc_lock, flags); |
456 | if (!(rtc_status & RTC_TIMER_ON)) { | 456 | if (!(rtc_status & RTC_TIMER_ON)) { |
457 | rtc_irq_timer.expires = jiffies + HZ/rtc_freq + 2*HZ/100; | 457 | mod_timer(&rtc_irq_timer, jiffies + HZ/rtc_freq + |
458 | add_timer(&rtc_irq_timer); | 458 | 2*HZ/100); |
459 | rtc_status |= RTC_TIMER_ON; | 459 | rtc_status |= RTC_TIMER_ON; |
460 | } | 460 | } |
461 | set_rtc_irq_bit_locked(RTC_PIE); | 461 | set_rtc_irq_bit_locked(RTC_PIE); |
@@ -1084,8 +1084,6 @@ no_irq: | |||
1084 | if (rtc_has_irq == 0) | 1084 | if (rtc_has_irq == 0) |
1085 | goto no_irq2; | 1085 | goto no_irq2; |
1086 | 1086 | ||
1087 | init_timer(&rtc_irq_timer); | ||
1088 | rtc_irq_timer.function = rtc_dropped_irq; | ||
1089 | spin_lock_irq(&rtc_lock); | 1087 | spin_lock_irq(&rtc_lock); |
1090 | rtc_freq = 1024; | 1088 | rtc_freq = 1024; |
1091 | if (!hpet_set_periodic_freq(rtc_freq)) { | 1089 | if (!hpet_set_periodic_freq(rtc_freq)) { |
diff --git a/drivers/char/specialix.c b/drivers/char/specialix.c index 92043c8f2355..baf7234b6e66 100644 --- a/drivers/char/specialix.c +++ b/drivers/char/specialix.c | |||
@@ -459,10 +459,9 @@ void missed_irq (unsigned long data) | |||
459 | if (irq) { | 459 | if (irq) { |
460 | printk (KERN_INFO "Missed interrupt... Calling int from timer. \n"); | 460 | printk (KERN_INFO "Missed interrupt... Calling int from timer. \n"); |
461 | sx_interrupt (((struct specialix_board *)data)->irq, | 461 | sx_interrupt (((struct specialix_board *)data)->irq, |
462 | (void*)data, NULL); | 462 | (void*)data); |
463 | } | 463 | } |
464 | missed_irq_timer.expires = jiffies + sx_poll; | 464 | mod_timer(&missed_irq_timer, jiffies + sx_poll); |
465 | add_timer (&missed_irq_timer); | ||
466 | } | 465 | } |
467 | #endif | 466 | #endif |
468 | 467 | ||
@@ -597,11 +596,8 @@ static int sx_probe(struct specialix_board *bp) | |||
597 | dprintk (SX_DEBUG_INIT, " GFCR = 0x%02x\n", sx_in_off(bp, CD186x_GFRCR) ); | 596 | dprintk (SX_DEBUG_INIT, " GFCR = 0x%02x\n", sx_in_off(bp, CD186x_GFRCR) ); |
598 | 597 | ||
599 | #ifdef SPECIALIX_TIMER | 598 | #ifdef SPECIALIX_TIMER |
600 | init_timer (&missed_irq_timer); | 599 | setup_timer(&missed_irq_timer, missed_irq, (unsigned long)bp); |
601 | missed_irq_timer.function = missed_irq; | 600 | mod_timer(&missed_irq_timer, jiffies + sx_poll); |
602 | missed_irq_timer.data = (unsigned long) bp; | ||
603 | missed_irq_timer.expires = jiffies + sx_poll; | ||
604 | add_timer (&missed_irq_timer); | ||
605 | #endif | 601 | #endif |
606 | 602 | ||
607 | printk(KERN_INFO"sx%d: specialix IO8+ board detected at 0x%03x, IRQ %d, CD%d Rev. %c.\n", | 603 | printk(KERN_INFO"sx%d: specialix IO8+ board detected at 0x%03x, IRQ %d, CD%d Rev. %c.\n", |
@@ -2559,7 +2555,7 @@ static void __exit specialix_exit_module(void) | |||
2559 | if (sx_board[i].flags & SX_BOARD_PRESENT) | 2555 | if (sx_board[i].flags & SX_BOARD_PRESENT) |
2560 | sx_release_io_range(&sx_board[i]); | 2556 | sx_release_io_range(&sx_board[i]); |
2561 | #ifdef SPECIALIX_TIMER | 2557 | #ifdef SPECIALIX_TIMER |
2562 | del_timer (&missed_irq_timer); | 2558 | del_timer_sync(&missed_irq_timer); |
2563 | #endif | 2559 | #endif |
2564 | 2560 | ||
2565 | func_exit(); | 2561 | func_exit(); |
diff --git a/drivers/char/synclink.c b/drivers/char/synclink.c index bf76db1342c5..ce4db6f52362 100644 --- a/drivers/char/synclink.c +++ b/drivers/char/synclink.c | |||
@@ -1798,9 +1798,7 @@ static int startup(struct mgsl_struct * info) | |||
1798 | 1798 | ||
1799 | memset(&info->icount, 0, sizeof(info->icount)); | 1799 | memset(&info->icount, 0, sizeof(info->icount)); |
1800 | 1800 | ||
1801 | init_timer(&info->tx_timer); | 1801 | setup_timer(&info->tx_timer, mgsl_tx_timeout, (unsigned long)info); |
1802 | info->tx_timer.data = (unsigned long)info; | ||
1803 | info->tx_timer.function = mgsl_tx_timeout; | ||
1804 | 1802 | ||
1805 | /* Allocate and claim adapter resources */ | 1803 | /* Allocate and claim adapter resources */ |
1806 | retval = mgsl_claim_resources(info); | 1804 | retval = mgsl_claim_resources(info); |
@@ -1851,7 +1849,7 @@ static void shutdown(struct mgsl_struct * info) | |||
1851 | wake_up_interruptible(&info->status_event_wait_q); | 1849 | wake_up_interruptible(&info->status_event_wait_q); |
1852 | wake_up_interruptible(&info->event_wait_q); | 1850 | wake_up_interruptible(&info->event_wait_q); |
1853 | 1851 | ||
1854 | del_timer(&info->tx_timer); | 1852 | del_timer_sync(&info->tx_timer); |
1855 | 1853 | ||
1856 | if (info->xmit_buf) { | 1854 | if (info->xmit_buf) { |
1857 | free_page((unsigned long) info->xmit_buf); | 1855 | free_page((unsigned long) info->xmit_buf); |
@@ -5710,8 +5708,8 @@ static void usc_start_transmitter( struct mgsl_struct *info ) | |||
5710 | 5708 | ||
5711 | usc_TCmd( info, TCmd_SendFrame ); | 5709 | usc_TCmd( info, TCmd_SendFrame ); |
5712 | 5710 | ||
5713 | info->tx_timer.expires = jiffies + msecs_to_jiffies(5000); | 5711 | mod_timer(&info->tx_timer, jiffies + |
5714 | add_timer(&info->tx_timer); | 5712 | msecs_to_jiffies(5000)); |
5715 | } | 5713 | } |
5716 | info->tx_active = 1; | 5714 | info->tx_active = 1; |
5717 | } | 5715 | } |
diff --git a/drivers/char/synclink_gt.c b/drivers/char/synclink_gt.c index 54af763518fe..0a367cd4121f 100644 --- a/drivers/char/synclink_gt.c +++ b/drivers/char/synclink_gt.c | |||
@@ -1825,8 +1825,7 @@ static void rx_async(struct slgt_info *info) | |||
1825 | if (i < count) { | 1825 | if (i < count) { |
1826 | /* receive buffer not completed */ | 1826 | /* receive buffer not completed */ |
1827 | info->rbuf_index += i; | 1827 | info->rbuf_index += i; |
1828 | info->rx_timer.expires = jiffies + 1; | 1828 | mod_timer(&info->rx_timer, jiffies + 1); |
1829 | add_timer(&info->rx_timer); | ||
1830 | break; | 1829 | break; |
1831 | } | 1830 | } |
1832 | 1831 | ||
@@ -3340,13 +3339,8 @@ static struct slgt_info *alloc_dev(int adapter_num, int port_num, struct pci_dev | |||
3340 | info->adapter_num = adapter_num; | 3339 | info->adapter_num = adapter_num; |
3341 | info->port_num = port_num; | 3340 | info->port_num = port_num; |
3342 | 3341 | ||
3343 | init_timer(&info->tx_timer); | 3342 | setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info); |
3344 | info->tx_timer.data = (unsigned long)info; | 3343 | setup_timer(&info->rx_timer, rx_timeout, (unsigned long)info); |
3345 | info->tx_timer.function = tx_timeout; | ||
3346 | |||
3347 | init_timer(&info->rx_timer); | ||
3348 | info->rx_timer.data = (unsigned long)info; | ||
3349 | info->rx_timer.function = rx_timeout; | ||
3350 | 3344 | ||
3351 | /* Copy configuration info to device instance data */ | 3345 | /* Copy configuration info to device instance data */ |
3352 | info->pdev = pdev; | 3346 | info->pdev = pdev; |
@@ -3794,10 +3788,9 @@ static void tx_start(struct slgt_info *info) | |||
3794 | } | 3788 | } |
3795 | } | 3789 | } |
3796 | 3790 | ||
3797 | if (info->params.mode == MGSL_MODE_HDLC) { | 3791 | if (info->params.mode == MGSL_MODE_HDLC) |
3798 | info->tx_timer.expires = jiffies + msecs_to_jiffies(5000); | 3792 | mod_timer(&info->tx_timer, jiffies + |
3799 | add_timer(&info->tx_timer); | 3793 | msecs_to_jiffies(5000)); |
3800 | } | ||
3801 | } else { | 3794 | } else { |
3802 | tdma_reset(info); | 3795 | tdma_reset(info); |
3803 | /* set 1st descriptor address */ | 3796 | /* set 1st descriptor address */ |
diff --git a/drivers/char/synclinkmp.c b/drivers/char/synclinkmp.c index ebde4e552335..ef93d055bdd7 100644 --- a/drivers/char/synclinkmp.c +++ b/drivers/char/synclinkmp.c | |||
@@ -2744,8 +2744,7 @@ static int startup(SLMP_INFO * info) | |||
2744 | 2744 | ||
2745 | change_params(info); | 2745 | change_params(info); |
2746 | 2746 | ||
2747 | info->status_timer.expires = jiffies + msecs_to_jiffies(10); | 2747 | mod_timer(&info->status_timer, jiffies + msecs_to_jiffies(10)); |
2748 | add_timer(&info->status_timer); | ||
2749 | 2748 | ||
2750 | if (info->tty) | 2749 | if (info->tty) |
2751 | clear_bit(TTY_IO_ERROR, &info->tty->flags); | 2750 | clear_bit(TTY_IO_ERROR, &info->tty->flags); |
@@ -3841,13 +3840,9 @@ static SLMP_INFO *alloc_dev(int adapter_num, int port_num, struct pci_dev *pdev) | |||
3841 | info->bus_type = MGSL_BUS_TYPE_PCI; | 3840 | info->bus_type = MGSL_BUS_TYPE_PCI; |
3842 | info->irq_flags = IRQF_SHARED; | 3841 | info->irq_flags = IRQF_SHARED; |
3843 | 3842 | ||
3844 | init_timer(&info->tx_timer); | 3843 | setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info); |
3845 | info->tx_timer.data = (unsigned long)info; | 3844 | setup_timer(&info->status_timer, status_timeout, |
3846 | info->tx_timer.function = tx_timeout; | 3845 | (unsigned long)info); |
3847 | |||
3848 | init_timer(&info->status_timer); | ||
3849 | info->status_timer.data = (unsigned long)info; | ||
3850 | info->status_timer.function = status_timeout; | ||
3851 | 3846 | ||
3852 | /* Store the PCI9050 misc control register value because a flaw | 3847 | /* Store the PCI9050 misc control register value because a flaw |
3853 | * in the PCI9050 prevents LCR registers from being read if | 3848 | * in the PCI9050 prevents LCR registers from being read if |
@@ -4291,8 +4286,8 @@ void tx_start(SLMP_INFO *info) | |||
4291 | write_reg(info, TXDMA + DIR, 0x40); /* enable Tx DMA interrupts (EOM) */ | 4286 | write_reg(info, TXDMA + DIR, 0x40); /* enable Tx DMA interrupts (EOM) */ |
4292 | write_reg(info, TXDMA + DSR, 0xf2); /* clear Tx DMA IRQs, enable Tx DMA */ | 4287 | write_reg(info, TXDMA + DSR, 0xf2); /* clear Tx DMA IRQs, enable Tx DMA */ |
4293 | 4288 | ||
4294 | info->tx_timer.expires = jiffies + msecs_to_jiffies(5000); | 4289 | mod_timer(&info->tx_timer, jiffies + |
4295 | add_timer(&info->tx_timer); | 4290 | msecs_to_jiffies(5000)); |
4296 | } | 4291 | } |
4297 | else { | 4292 | else { |
4298 | tx_load_fifo(info); | 4293 | tx_load_fifo(info); |
@@ -5574,10 +5569,7 @@ void status_timeout(unsigned long context) | |||
5574 | if (status) | 5569 | if (status) |
5575 | isr_io_pin(info,status); | 5570 | isr_io_pin(info,status); |
5576 | 5571 | ||
5577 | info->status_timer.data = (unsigned long)info; | 5572 | mod_timer(&info->status_timer, jiffies + msecs_to_jiffies(10)); |
5578 | info->status_timer.function = status_timeout; | ||
5579 | info->status_timer.expires = jiffies + msecs_to_jiffies(10); | ||
5580 | add_timer(&info->status_timer); | ||
5581 | } | 5573 | } |
5582 | 5574 | ||
5583 | 5575 | ||
diff --git a/drivers/char/tpm/tpm.c b/drivers/char/tpm/tpm.c index 33e1f66e39cb..2f572b97c16d 100644 --- a/drivers/char/tpm/tpm.c +++ b/drivers/char/tpm/tpm.c | |||
@@ -1107,9 +1107,8 @@ struct tpm_chip *tpm_register_hardware(struct device *dev, const struct tpm_vend | |||
1107 | 1107 | ||
1108 | INIT_WORK(&chip->work, timeout_work); | 1108 | INIT_WORK(&chip->work, timeout_work); |
1109 | 1109 | ||
1110 | init_timer(&chip->user_read_timer); | 1110 | setup_timer(&chip->user_read_timer, user_reader_timeout, |
1111 | chip->user_read_timer.function = user_reader_timeout; | 1111 | (unsigned long)chip); |
1112 | chip->user_read_timer.data = (unsigned long) chip; | ||
1113 | 1112 | ||
1114 | memcpy(&chip->vendor, entry, sizeof(struct tpm_vendor_specific)); | 1113 | memcpy(&chip->vendor, entry, sizeof(struct tpm_vendor_specific)); |
1115 | 1114 | ||
diff --git a/drivers/char/tpm/tpm_bios.c b/drivers/char/tpm/tpm_bios.c index 7fca5f470beb..4eba32b23b29 100644 --- a/drivers/char/tpm/tpm_bios.c +++ b/drivers/char/tpm/tpm_bios.c | |||
@@ -441,7 +441,7 @@ static int tpm_ascii_bios_measurements_open(struct inode *inode, | |||
441 | return err; | 441 | return err; |
442 | } | 442 | } |
443 | 443 | ||
444 | struct file_operations tpm_ascii_bios_measurements_ops = { | 444 | const struct file_operations tpm_ascii_bios_measurements_ops = { |
445 | .open = tpm_ascii_bios_measurements_open, | 445 | .open = tpm_ascii_bios_measurements_open, |
446 | .read = seq_read, | 446 | .read = seq_read, |
447 | .llseek = seq_lseek, | 447 | .llseek = seq_lseek, |
@@ -474,7 +474,7 @@ static int tpm_binary_bios_measurements_open(struct inode *inode, | |||
474 | return err; | 474 | return err; |
475 | } | 475 | } |
476 | 476 | ||
477 | struct file_operations tpm_binary_bios_measurements_ops = { | 477 | const struct file_operations tpm_binary_bios_measurements_ops = { |
478 | .open = tpm_binary_bios_measurements_open, | 478 | .open = tpm_binary_bios_measurements_open, |
479 | .read = seq_read, | 479 | .read = seq_read, |
480 | .llseek = seq_lseek, | 480 | .llseek = seq_lseek, |
diff --git a/drivers/char/tty_io.c b/drivers/char/tty_io.c index 558ca927e32b..65672c57470b 100644 --- a/drivers/char/tty_io.c +++ b/drivers/char/tty_io.c | |||
@@ -155,6 +155,8 @@ int tty_ioctl(struct inode * inode, struct file * file, | |||
155 | unsigned int cmd, unsigned long arg); | 155 | unsigned int cmd, unsigned long arg); |
156 | static int tty_fasync(int fd, struct file * filp, int on); | 156 | static int tty_fasync(int fd, struct file * filp, int on); |
157 | static void release_tty(struct tty_struct *tty, int idx); | 157 | static void release_tty(struct tty_struct *tty, int idx); |
158 | static struct pid *__proc_set_tty(struct task_struct *tsk, | ||
159 | struct tty_struct *tty); | ||
158 | 160 | ||
159 | /** | 161 | /** |
160 | * alloc_tty_struct - allocate a tty object | 162 | * alloc_tty_struct - allocate a tty object |
@@ -1109,17 +1111,17 @@ int tty_check_change(struct tty_struct * tty) | |||
1109 | { | 1111 | { |
1110 | if (current->signal->tty != tty) | 1112 | if (current->signal->tty != tty) |
1111 | return 0; | 1113 | return 0; |
1112 | if (tty->pgrp <= 0) { | 1114 | if (!tty->pgrp) { |
1113 | printk(KERN_WARNING "tty_check_change: tty->pgrp <= 0!\n"); | 1115 | printk(KERN_WARNING "tty_check_change: tty->pgrp == NULL!\n"); |
1114 | return 0; | 1116 | return 0; |
1115 | } | 1117 | } |
1116 | if (process_group(current) == tty->pgrp) | 1118 | if (task_pgrp(current) == tty->pgrp) |
1117 | return 0; | 1119 | return 0; |
1118 | if (is_ignored(SIGTTOU)) | 1120 | if (is_ignored(SIGTTOU)) |
1119 | return 0; | 1121 | return 0; |
1120 | if (is_orphaned_pgrp(process_group(current))) | 1122 | if (is_current_pgrp_orphaned()) |
1121 | return -EIO; | 1123 | return -EIO; |
1122 | (void) kill_pg(process_group(current), SIGTTOU, 1); | 1124 | (void) kill_pgrp(task_pgrp(current), SIGTTOU, 1); |
1123 | return -ERESTARTSYS; | 1125 | return -ERESTARTSYS; |
1124 | } | 1126 | } |
1125 | 1127 | ||
@@ -1354,8 +1356,8 @@ static void do_tty_hangup(struct work_struct *work) | |||
1354 | tty_release is called */ | 1356 | tty_release is called */ |
1355 | 1357 | ||
1356 | read_lock(&tasklist_lock); | 1358 | read_lock(&tasklist_lock); |
1357 | if (tty->session > 0) { | 1359 | if (tty->session) { |
1358 | do_each_task_pid(tty->session, PIDTYPE_SID, p) { | 1360 | do_each_pid_task(tty->session, PIDTYPE_SID, p) { |
1359 | spin_lock_irq(&p->sighand->siglock); | 1361 | spin_lock_irq(&p->sighand->siglock); |
1360 | if (p->signal->tty == tty) | 1362 | if (p->signal->tty == tty) |
1361 | p->signal->tty = NULL; | 1363 | p->signal->tty = NULL; |
@@ -1365,16 +1367,17 @@ static void do_tty_hangup(struct work_struct *work) | |||
1365 | } | 1367 | } |
1366 | __group_send_sig_info(SIGHUP, SEND_SIG_PRIV, p); | 1368 | __group_send_sig_info(SIGHUP, SEND_SIG_PRIV, p); |
1367 | __group_send_sig_info(SIGCONT, SEND_SIG_PRIV, p); | 1369 | __group_send_sig_info(SIGCONT, SEND_SIG_PRIV, p); |
1368 | if (tty->pgrp > 0) | 1370 | put_pid(p->signal->tty_old_pgrp); /* A noop */ |
1369 | p->signal->tty_old_pgrp = tty->pgrp; | 1371 | if (tty->pgrp) |
1372 | p->signal->tty_old_pgrp = get_pid(tty->pgrp); | ||
1370 | spin_unlock_irq(&p->sighand->siglock); | 1373 | spin_unlock_irq(&p->sighand->siglock); |
1371 | } while_each_task_pid(tty->session, PIDTYPE_SID, p); | 1374 | } while_each_pid_task(tty->session, PIDTYPE_SID, p); |
1372 | } | 1375 | } |
1373 | read_unlock(&tasklist_lock); | 1376 | read_unlock(&tasklist_lock); |
1374 | 1377 | ||
1375 | tty->flags = 0; | 1378 | tty->flags = 0; |
1376 | tty->session = 0; | 1379 | tty->session = NULL; |
1377 | tty->pgrp = -1; | 1380 | tty->pgrp = NULL; |
1378 | tty->ctrl_status = 0; | 1381 | tty->ctrl_status = 0; |
1379 | /* | 1382 | /* |
1380 | * If one of the devices matches a console pointer, we | 1383 | * If one of the devices matches a console pointer, we |
@@ -1459,12 +1462,12 @@ int tty_hung_up_p(struct file * filp) | |||
1459 | 1462 | ||
1460 | EXPORT_SYMBOL(tty_hung_up_p); | 1463 | EXPORT_SYMBOL(tty_hung_up_p); |
1461 | 1464 | ||
1462 | static void session_clear_tty(pid_t session) | 1465 | static void session_clear_tty(struct pid *session) |
1463 | { | 1466 | { |
1464 | struct task_struct *p; | 1467 | struct task_struct *p; |
1465 | do_each_task_pid(session, PIDTYPE_SID, p) { | 1468 | do_each_pid_task(session, PIDTYPE_SID, p) { |
1466 | proc_clear_tty(p); | 1469 | proc_clear_tty(p); |
1467 | } while_each_task_pid(session, PIDTYPE_SID, p); | 1470 | } while_each_pid_task(session, PIDTYPE_SID, p); |
1468 | } | 1471 | } |
1469 | 1472 | ||
1470 | /** | 1473 | /** |
@@ -1494,46 +1497,54 @@ static void session_clear_tty(pid_t session) | |||
1494 | void disassociate_ctty(int on_exit) | 1497 | void disassociate_ctty(int on_exit) |
1495 | { | 1498 | { |
1496 | struct tty_struct *tty; | 1499 | struct tty_struct *tty; |
1497 | int tty_pgrp = -1; | 1500 | struct pid *tty_pgrp = NULL; |
1498 | int session; | ||
1499 | 1501 | ||
1500 | lock_kernel(); | 1502 | lock_kernel(); |
1501 | 1503 | ||
1502 | mutex_lock(&tty_mutex); | 1504 | mutex_lock(&tty_mutex); |
1503 | tty = get_current_tty(); | 1505 | tty = get_current_tty(); |
1504 | if (tty) { | 1506 | if (tty) { |
1505 | tty_pgrp = tty->pgrp; | 1507 | tty_pgrp = get_pid(tty->pgrp); |
1506 | mutex_unlock(&tty_mutex); | 1508 | mutex_unlock(&tty_mutex); |
1507 | /* XXX: here we race, there is nothing protecting tty */ | 1509 | /* XXX: here we race, there is nothing protecting tty */ |
1508 | if (on_exit && tty->driver->type != TTY_DRIVER_TYPE_PTY) | 1510 | if (on_exit && tty->driver->type != TTY_DRIVER_TYPE_PTY) |
1509 | tty_vhangup(tty); | 1511 | tty_vhangup(tty); |
1510 | } else { | 1512 | } else if (on_exit) { |
1511 | pid_t old_pgrp = current->signal->tty_old_pgrp; | 1513 | struct pid *old_pgrp; |
1514 | spin_lock_irq(¤t->sighand->siglock); | ||
1515 | old_pgrp = current->signal->tty_old_pgrp; | ||
1516 | current->signal->tty_old_pgrp = NULL; | ||
1517 | spin_unlock_irq(¤t->sighand->siglock); | ||
1512 | if (old_pgrp) { | 1518 | if (old_pgrp) { |
1513 | kill_pg(old_pgrp, SIGHUP, on_exit); | 1519 | kill_pgrp(old_pgrp, SIGHUP, on_exit); |
1514 | kill_pg(old_pgrp, SIGCONT, on_exit); | 1520 | kill_pgrp(old_pgrp, SIGCONT, on_exit); |
1521 | put_pid(old_pgrp); | ||
1515 | } | 1522 | } |
1516 | mutex_unlock(&tty_mutex); | 1523 | mutex_unlock(&tty_mutex); |
1517 | unlock_kernel(); | 1524 | unlock_kernel(); |
1518 | return; | 1525 | return; |
1519 | } | 1526 | } |
1520 | if (tty_pgrp > 0) { | 1527 | if (tty_pgrp) { |
1521 | kill_pg(tty_pgrp, SIGHUP, on_exit); | 1528 | kill_pgrp(tty_pgrp, SIGHUP, on_exit); |
1522 | if (!on_exit) | 1529 | if (!on_exit) |
1523 | kill_pg(tty_pgrp, SIGCONT, on_exit); | 1530 | kill_pgrp(tty_pgrp, SIGCONT, on_exit); |
1531 | put_pid(tty_pgrp); | ||
1524 | } | 1532 | } |
1525 | 1533 | ||
1526 | spin_lock_irq(¤t->sighand->siglock); | 1534 | spin_lock_irq(¤t->sighand->siglock); |
1535 | tty_pgrp = current->signal->tty_old_pgrp; | ||
1527 | current->signal->tty_old_pgrp = 0; | 1536 | current->signal->tty_old_pgrp = 0; |
1528 | session = process_session(current); | ||
1529 | spin_unlock_irq(¤t->sighand->siglock); | 1537 | spin_unlock_irq(¤t->sighand->siglock); |
1538 | put_pid(tty_pgrp); | ||
1530 | 1539 | ||
1531 | mutex_lock(&tty_mutex); | 1540 | mutex_lock(&tty_mutex); |
1532 | /* It is possible that do_tty_hangup has free'd this tty */ | 1541 | /* It is possible that do_tty_hangup has free'd this tty */ |
1533 | tty = get_current_tty(); | 1542 | tty = get_current_tty(); |
1534 | if (tty) { | 1543 | if (tty) { |
1535 | tty->session = 0; | 1544 | put_pid(tty->session); |
1536 | tty->pgrp = 0; | 1545 | put_pid(tty->pgrp); |
1546 | tty->session = NULL; | ||
1547 | tty->pgrp = NULL; | ||
1537 | } else { | 1548 | } else { |
1538 | #ifdef TTY_DEBUG_HANGUP | 1549 | #ifdef TTY_DEBUG_HANGUP |
1539 | printk(KERN_DEBUG "error attempted to write to tty [0x%p]" | 1550 | printk(KERN_DEBUG "error attempted to write to tty [0x%p]" |
@@ -1544,7 +1555,7 @@ void disassociate_ctty(int on_exit) | |||
1544 | 1555 | ||
1545 | /* Now clear signal->tty under the lock */ | 1556 | /* Now clear signal->tty under the lock */ |
1546 | read_lock(&tasklist_lock); | 1557 | read_lock(&tasklist_lock); |
1547 | session_clear_tty(session); | 1558 | session_clear_tty(task_session(current)); |
1548 | read_unlock(&tasklist_lock); | 1559 | read_unlock(&tasklist_lock); |
1549 | unlock_kernel(); | 1560 | unlock_kernel(); |
1550 | } | 1561 | } |
@@ -2481,6 +2492,7 @@ static int tty_open(struct inode * inode, struct file * filp) | |||
2481 | int index; | 2492 | int index; |
2482 | dev_t device = inode->i_rdev; | 2493 | dev_t device = inode->i_rdev; |
2483 | unsigned short saved_flags = filp->f_flags; | 2494 | unsigned short saved_flags = filp->f_flags; |
2495 | struct pid *old_pgrp; | ||
2484 | 2496 | ||
2485 | nonseekable_open(inode, filp); | 2497 | nonseekable_open(inode, filp); |
2486 | 2498 | ||
@@ -2574,15 +2586,17 @@ got_driver: | |||
2574 | goto retry_open; | 2586 | goto retry_open; |
2575 | } | 2587 | } |
2576 | 2588 | ||
2589 | old_pgrp = NULL; | ||
2577 | mutex_lock(&tty_mutex); | 2590 | mutex_lock(&tty_mutex); |
2578 | spin_lock_irq(¤t->sighand->siglock); | 2591 | spin_lock_irq(¤t->sighand->siglock); |
2579 | if (!noctty && | 2592 | if (!noctty && |
2580 | current->signal->leader && | 2593 | current->signal->leader && |
2581 | !current->signal->tty && | 2594 | !current->signal->tty && |
2582 | tty->session == 0) | 2595 | tty->session == NULL) |
2583 | __proc_set_tty(current, tty); | 2596 | old_pgrp = __proc_set_tty(current, tty); |
2584 | spin_unlock_irq(¤t->sighand->siglock); | 2597 | spin_unlock_irq(¤t->sighand->siglock); |
2585 | mutex_unlock(&tty_mutex); | 2598 | mutex_unlock(&tty_mutex); |
2599 | put_pid(old_pgrp); | ||
2586 | return 0; | 2600 | return 0; |
2587 | } | 2601 | } |
2588 | 2602 | ||
@@ -2721,9 +2735,18 @@ static int tty_fasync(int fd, struct file * filp, int on) | |||
2721 | return retval; | 2735 | return retval; |
2722 | 2736 | ||
2723 | if (on) { | 2737 | if (on) { |
2738 | enum pid_type type; | ||
2739 | struct pid *pid; | ||
2724 | if (!waitqueue_active(&tty->read_wait)) | 2740 | if (!waitqueue_active(&tty->read_wait)) |
2725 | tty->minimum_to_wake = 1; | 2741 | tty->minimum_to_wake = 1; |
2726 | retval = f_setown(filp, (-tty->pgrp) ? : current->pid, 0); | 2742 | if (tty->pgrp) { |
2743 | pid = tty->pgrp; | ||
2744 | type = PIDTYPE_PGID; | ||
2745 | } else { | ||
2746 | pid = task_pid(current); | ||
2747 | type = PIDTYPE_PID; | ||
2748 | } | ||
2749 | retval = __f_setown(filp, pid, type, 0); | ||
2727 | if (retval) | 2750 | if (retval) |
2728 | return retval; | 2751 | return retval; |
2729 | } else { | 2752 | } else { |
@@ -2825,10 +2848,10 @@ static int tiocswinsz(struct tty_struct *tty, struct tty_struct *real_tty, | |||
2825 | } | 2848 | } |
2826 | } | 2849 | } |
2827 | #endif | 2850 | #endif |
2828 | if (tty->pgrp > 0) | 2851 | if (tty->pgrp) |
2829 | kill_pg(tty->pgrp, SIGWINCH, 1); | 2852 | kill_pgrp(tty->pgrp, SIGWINCH, 1); |
2830 | if ((real_tty->pgrp != tty->pgrp) && (real_tty->pgrp > 0)) | 2853 | if ((real_tty->pgrp != tty->pgrp) && real_tty->pgrp) |
2831 | kill_pg(real_tty->pgrp, SIGWINCH, 1); | 2854 | kill_pgrp(real_tty->pgrp, SIGWINCH, 1); |
2832 | tty->winsize = tmp_ws; | 2855 | tty->winsize = tmp_ws; |
2833 | real_tty->winsize = tmp_ws; | 2856 | real_tty->winsize = tmp_ws; |
2834 | done: | 2857 | done: |
@@ -2913,8 +2936,7 @@ static int fionbio(struct file *file, int __user *p) | |||
2913 | static int tiocsctty(struct tty_struct *tty, int arg) | 2936 | static int tiocsctty(struct tty_struct *tty, int arg) |
2914 | { | 2937 | { |
2915 | int ret = 0; | 2938 | int ret = 0; |
2916 | if (current->signal->leader && | 2939 | if (current->signal->leader && (task_session(current) == tty->session)) |
2917 | (process_session(current) == tty->session)) | ||
2918 | return ret; | 2940 | return ret; |
2919 | 2941 | ||
2920 | mutex_lock(&tty_mutex); | 2942 | mutex_lock(&tty_mutex); |
@@ -2927,7 +2949,7 @@ static int tiocsctty(struct tty_struct *tty, int arg) | |||
2927 | goto unlock; | 2949 | goto unlock; |
2928 | } | 2950 | } |
2929 | 2951 | ||
2930 | if (tty->session > 0) { | 2952 | if (tty->session) { |
2931 | /* | 2953 | /* |
2932 | * This tty is already the controlling | 2954 | * This tty is already the controlling |
2933 | * tty for another session group! | 2955 | * tty for another session group! |
@@ -2970,7 +2992,7 @@ static int tiocgpgrp(struct tty_struct *tty, struct tty_struct *real_tty, pid_t | |||
2970 | */ | 2992 | */ |
2971 | if (tty == real_tty && current->signal->tty != real_tty) | 2993 | if (tty == real_tty && current->signal->tty != real_tty) |
2972 | return -ENOTTY; | 2994 | return -ENOTTY; |
2973 | return put_user(real_tty->pgrp, p); | 2995 | return put_user(pid_nr(real_tty->pgrp), p); |
2974 | } | 2996 | } |
2975 | 2997 | ||
2976 | /** | 2998 | /** |
@@ -2987,7 +3009,8 @@ static int tiocgpgrp(struct tty_struct *tty, struct tty_struct *real_tty, pid_t | |||
2987 | 3009 | ||
2988 | static int tiocspgrp(struct tty_struct *tty, struct tty_struct *real_tty, pid_t __user *p) | 3010 | static int tiocspgrp(struct tty_struct *tty, struct tty_struct *real_tty, pid_t __user *p) |
2989 | { | 3011 | { |
2990 | pid_t pgrp; | 3012 | struct pid *pgrp; |
3013 | pid_t pgrp_nr; | ||
2991 | int retval = tty_check_change(real_tty); | 3014 | int retval = tty_check_change(real_tty); |
2992 | 3015 | ||
2993 | if (retval == -EIO) | 3016 | if (retval == -EIO) |
@@ -2996,16 +3019,26 @@ static int tiocspgrp(struct tty_struct *tty, struct tty_struct *real_tty, pid_t | |||
2996 | return retval; | 3019 | return retval; |
2997 | if (!current->signal->tty || | 3020 | if (!current->signal->tty || |
2998 | (current->signal->tty != real_tty) || | 3021 | (current->signal->tty != real_tty) || |
2999 | (real_tty->session != process_session(current))) | 3022 | (real_tty->session != task_session(current))) |
3000 | return -ENOTTY; | 3023 | return -ENOTTY; |
3001 | if (get_user(pgrp, p)) | 3024 | if (get_user(pgrp_nr, p)) |
3002 | return -EFAULT; | 3025 | return -EFAULT; |
3003 | if (pgrp < 0) | 3026 | if (pgrp_nr < 0) |
3004 | return -EINVAL; | 3027 | return -EINVAL; |
3005 | if (session_of_pgrp(pgrp) != process_session(current)) | 3028 | rcu_read_lock(); |
3006 | return -EPERM; | 3029 | pgrp = find_pid(pgrp_nr); |
3007 | real_tty->pgrp = pgrp; | 3030 | retval = -ESRCH; |
3008 | return 0; | 3031 | if (!pgrp) |
3032 | goto out_unlock; | ||
3033 | retval = -EPERM; | ||
3034 | if (session_of_pgrp(pgrp) != task_session(current)) | ||
3035 | goto out_unlock; | ||
3036 | retval = 0; | ||
3037 | put_pid(real_tty->pgrp); | ||
3038 | real_tty->pgrp = get_pid(pgrp); | ||
3039 | out_unlock: | ||
3040 | rcu_read_unlock(); | ||
3041 | return retval; | ||
3009 | } | 3042 | } |
3010 | 3043 | ||
3011 | /** | 3044 | /** |
@@ -3028,9 +3061,9 @@ static int tiocgsid(struct tty_struct *tty, struct tty_struct *real_tty, pid_t _ | |||
3028 | */ | 3061 | */ |
3029 | if (tty == real_tty && current->signal->tty != real_tty) | 3062 | if (tty == real_tty && current->signal->tty != real_tty) |
3030 | return -ENOTTY; | 3063 | return -ENOTTY; |
3031 | if (real_tty->session <= 0) | 3064 | if (!real_tty->session) |
3032 | return -ENOTTY; | 3065 | return -ENOTTY; |
3033 | return put_user(real_tty->session, p); | 3066 | return put_user(pid_nr(real_tty->session), p); |
3034 | } | 3067 | } |
3035 | 3068 | ||
3036 | /** | 3069 | /** |
@@ -3330,7 +3363,7 @@ void __do_SAK(struct tty_struct *tty) | |||
3330 | tty_hangup(tty); | 3363 | tty_hangup(tty); |
3331 | #else | 3364 | #else |
3332 | struct task_struct *g, *p; | 3365 | struct task_struct *g, *p; |
3333 | int session; | 3366 | struct pid *session; |
3334 | int i; | 3367 | int i; |
3335 | struct file *filp; | 3368 | struct file *filp; |
3336 | struct fdtable *fdt; | 3369 | struct fdtable *fdt; |
@@ -3346,12 +3379,12 @@ void __do_SAK(struct tty_struct *tty) | |||
3346 | 3379 | ||
3347 | read_lock(&tasklist_lock); | 3380 | read_lock(&tasklist_lock); |
3348 | /* Kill the entire session */ | 3381 | /* Kill the entire session */ |
3349 | do_each_task_pid(session, PIDTYPE_SID, p) { | 3382 | do_each_pid_task(session, PIDTYPE_SID, p) { |
3350 | printk(KERN_NOTICE "SAK: killed process %d" | 3383 | printk(KERN_NOTICE "SAK: killed process %d" |
3351 | " (%s): process_session(p)==tty->session\n", | 3384 | " (%s): process_session(p)==tty->session\n", |
3352 | p->pid, p->comm); | 3385 | p->pid, p->comm); |
3353 | send_sig(SIGKILL, p, 1); | 3386 | send_sig(SIGKILL, p, 1); |
3354 | } while_each_task_pid(session, PIDTYPE_SID, p); | 3387 | } while_each_pid_task(session, PIDTYPE_SID, p); |
3355 | /* Now kill any processes that happen to have the | 3388 | /* Now kill any processes that happen to have the |
3356 | * tty open. | 3389 | * tty open. |
3357 | */ | 3390 | */ |
@@ -3520,7 +3553,8 @@ static void initialize_tty_struct(struct tty_struct *tty) | |||
3520 | memset(tty, 0, sizeof(struct tty_struct)); | 3553 | memset(tty, 0, sizeof(struct tty_struct)); |
3521 | tty->magic = TTY_MAGIC; | 3554 | tty->magic = TTY_MAGIC; |
3522 | tty_ldisc_assign(tty, tty_ldisc_get(N_TTY)); | 3555 | tty_ldisc_assign(tty, tty_ldisc_get(N_TTY)); |
3523 | tty->pgrp = -1; | 3556 | tty->session = NULL; |
3557 | tty->pgrp = NULL; | ||
3524 | tty->overrun_time = jiffies; | 3558 | tty->overrun_time = jiffies; |
3525 | tty->buf.head = tty->buf.tail = NULL; | 3559 | tty->buf.head = tty->buf.tail = NULL; |
3526 | tty_buffer_init(tty); | 3560 | tty_buffer_init(tty); |
@@ -3791,21 +3825,28 @@ void proc_clear_tty(struct task_struct *p) | |||
3791 | } | 3825 | } |
3792 | EXPORT_SYMBOL(proc_clear_tty); | 3826 | EXPORT_SYMBOL(proc_clear_tty); |
3793 | 3827 | ||
3794 | void __proc_set_tty(struct task_struct *tsk, struct tty_struct *tty) | 3828 | static struct pid *__proc_set_tty(struct task_struct *tsk, struct tty_struct *tty) |
3795 | { | 3829 | { |
3830 | struct pid *old_pgrp; | ||
3796 | if (tty) { | 3831 | if (tty) { |
3797 | tty->session = process_session(tsk); | 3832 | tty->session = get_pid(task_session(tsk)); |
3798 | tty->pgrp = process_group(tsk); | 3833 | tty->pgrp = get_pid(task_pgrp(tsk)); |
3799 | } | 3834 | } |
3835 | old_pgrp = tsk->signal->tty_old_pgrp; | ||
3800 | tsk->signal->tty = tty; | 3836 | tsk->signal->tty = tty; |
3801 | tsk->signal->tty_old_pgrp = 0; | 3837 | tsk->signal->tty_old_pgrp = NULL; |
3838 | return old_pgrp; | ||
3802 | } | 3839 | } |
3803 | 3840 | ||
3804 | void proc_set_tty(struct task_struct *tsk, struct tty_struct *tty) | 3841 | void proc_set_tty(struct task_struct *tsk, struct tty_struct *tty) |
3805 | { | 3842 | { |
3843 | struct pid *old_pgrp; | ||
3844 | |||
3806 | spin_lock_irq(&tsk->sighand->siglock); | 3845 | spin_lock_irq(&tsk->sighand->siglock); |
3807 | __proc_set_tty(tsk, tty); | 3846 | old_pgrp = __proc_set_tty(tsk, tty); |
3808 | spin_unlock_irq(&tsk->sighand->siglock); | 3847 | spin_unlock_irq(&tsk->sighand->siglock); |
3848 | |||
3849 | put_pid(old_pgrp); | ||
3809 | } | 3850 | } |
3810 | 3851 | ||
3811 | struct tty_struct *get_current_tty(void) | 3852 | struct tty_struct *get_current_tty(void) |
diff --git a/drivers/char/viotape.c b/drivers/char/viotape.c index 9438512b17f1..13faf8d17482 100644 --- a/drivers/char/viotape.c +++ b/drivers/char/viotape.c | |||
@@ -872,7 +872,7 @@ free_op: | |||
872 | return ret; | 872 | return ret; |
873 | } | 873 | } |
874 | 874 | ||
875 | struct file_operations viotap_fops = { | 875 | const struct file_operations viotap_fops = { |
876 | owner: THIS_MODULE, | 876 | owner: THIS_MODULE, |
877 | read: viotap_read, | 877 | read: viotap_read, |
878 | write: viotap_write, | 878 | write: viotap_write, |
diff --git a/drivers/char/vt.c b/drivers/char/vt.c index 13299b8fdbd6..94ce3e7fc9e4 100644 --- a/drivers/char/vt.c +++ b/drivers/char/vt.c | |||
@@ -210,7 +210,7 @@ static int scrollback_delta; | |||
210 | */ | 210 | */ |
211 | int (*console_blank_hook)(int); | 211 | int (*console_blank_hook)(int); |
212 | 212 | ||
213 | static struct timer_list console_timer; | 213 | static DEFINE_TIMER(console_timer, blank_screen_t, 0, 0); |
214 | static int blank_state; | 214 | static int blank_state; |
215 | static int blank_timer_expired; | 215 | static int blank_timer_expired; |
216 | enum { | 216 | enum { |
@@ -866,8 +866,8 @@ int vc_resize(struct vc_data *vc, unsigned int cols, unsigned int lines) | |||
866 | ws.ws_col = vc->vc_cols; | 866 | ws.ws_col = vc->vc_cols; |
867 | ws.ws_ypixel = vc->vc_scan_lines; | 867 | ws.ws_ypixel = vc->vc_scan_lines; |
868 | if ((ws.ws_row != cws->ws_row || ws.ws_col != cws->ws_col) && | 868 | if ((ws.ws_row != cws->ws_row || ws.ws_col != cws->ws_col) && |
869 | vc->vc_tty->pgrp > 0) | 869 | vc->vc_tty->pgrp) |
870 | kill_pg(vc->vc_tty->pgrp, SIGWINCH, 1); | 870 | kill_pgrp(vc->vc_tty->pgrp, SIGWINCH, 1); |
871 | *cws = ws; | 871 | *cws = ws; |
872 | } | 872 | } |
873 | 873 | ||
@@ -2625,8 +2625,6 @@ static int __init con_init(void) | |||
2625 | for (i = 0; i < MAX_NR_CONSOLES; i++) | 2625 | for (i = 0; i < MAX_NR_CONSOLES; i++) |
2626 | con_driver_map[i] = conswitchp; | 2626 | con_driver_map[i] = conswitchp; |
2627 | 2627 | ||
2628 | init_timer(&console_timer); | ||
2629 | console_timer.function = blank_screen_t; | ||
2630 | if (blankinterval) { | 2628 | if (blankinterval) { |
2631 | blank_state = blank_normal_wait; | 2629 | blank_state = blank_normal_wait; |
2632 | mod_timer(&console_timer, jiffies + blankinterval); | 2630 | mod_timer(&console_timer, jiffies + blankinterval); |
diff --git a/drivers/char/watchdog/alim7101_wdt.c b/drivers/char/watchdog/alim7101_wdt.c index bf25d0a55a99..e5b2c2ee292c 100644 --- a/drivers/char/watchdog/alim7101_wdt.c +++ b/drivers/char/watchdog/alim7101_wdt.c | |||
@@ -417,10 +417,8 @@ module_init(alim7101_wdt_init); | |||
417 | module_exit(alim7101_wdt_unload); | 417 | module_exit(alim7101_wdt_unload); |
418 | 418 | ||
419 | static struct pci_device_id alim7101_pci_tbl[] __devinitdata = { | 419 | static struct pci_device_id alim7101_pci_tbl[] __devinitdata = { |
420 | { PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, | 420 | { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533) }, |
421 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | 421 | { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) }, |
422 | { PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101, | ||
423 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | ||
424 | { } | 422 | { } |
425 | }; | 423 | }; |
426 | 424 | ||
diff --git a/drivers/char/watchdog/iTCO_wdt.c b/drivers/char/watchdog/iTCO_wdt.c index 7eac922df867..fd8a44a08cd3 100644 --- a/drivers/char/watchdog/iTCO_wdt.c +++ b/drivers/char/watchdog/iTCO_wdt.c | |||
@@ -539,7 +539,7 @@ static int iTCO_wdt_ioctl (struct inode *inode, struct file *file, | |||
539 | * Kernel Interfaces | 539 | * Kernel Interfaces |
540 | */ | 540 | */ |
541 | 541 | ||
542 | static struct file_operations iTCO_wdt_fops = { | 542 | static const struct file_operations iTCO_wdt_fops = { |
543 | .owner = THIS_MODULE, | 543 | .owner = THIS_MODULE, |
544 | .llseek = no_llseek, | 544 | .llseek = no_llseek, |
545 | .write = iTCO_wdt_write, | 545 | .write = iTCO_wdt_write, |
diff --git a/drivers/char/watchdog/omap_wdt.c b/drivers/char/watchdog/omap_wdt.c index 6c6f97332dbb..84074a697dce 100644 --- a/drivers/char/watchdog/omap_wdt.c +++ b/drivers/char/watchdog/omap_wdt.c | |||
@@ -230,7 +230,7 @@ omap_wdt_ioctl(struct inode *inode, struct file *file, | |||
230 | } | 230 | } |
231 | } | 231 | } |
232 | 232 | ||
233 | static struct file_operations omap_wdt_fops = { | 233 | static const struct file_operations omap_wdt_fops = { |
234 | .owner = THIS_MODULE, | 234 | .owner = THIS_MODULE, |
235 | .write = omap_wdt_write, | 235 | .write = omap_wdt_write, |
236 | .ioctl = omap_wdt_ioctl, | 236 | .ioctl = omap_wdt_ioctl, |
diff --git a/drivers/char/watchdog/pc87413_wdt.c b/drivers/char/watchdog/pc87413_wdt.c index 1d447e32af41..a77a90717ad2 100644 --- a/drivers/char/watchdog/pc87413_wdt.c +++ b/drivers/char/watchdog/pc87413_wdt.c | |||
@@ -526,7 +526,7 @@ static int pc87413_notify_sys(struct notifier_block *this, | |||
526 | 526 | ||
527 | /* -- Module's structures ---------------------------------------*/ | 527 | /* -- Module's structures ---------------------------------------*/ |
528 | 528 | ||
529 | static struct file_operations pc87413_fops = { | 529 | static const struct file_operations pc87413_fops = { |
530 | .owner = THIS_MODULE, | 530 | .owner = THIS_MODULE, |
531 | .llseek = no_llseek, | 531 | .llseek = no_llseek, |
532 | .write = pc87413_write, | 532 | .write = pc87413_write, |
diff --git a/drivers/char/watchdog/pnx4008_wdt.c b/drivers/char/watchdog/pnx4008_wdt.c index 3a55fc6abcd8..ff6f1ca1e5e7 100644 --- a/drivers/char/watchdog/pnx4008_wdt.c +++ b/drivers/char/watchdog/pnx4008_wdt.c | |||
@@ -238,7 +238,7 @@ static int pnx4008_wdt_release(struct inode *inode, struct file *file) | |||
238 | return 0; | 238 | return 0; |
239 | } | 239 | } |
240 | 240 | ||
241 | static struct file_operations pnx4008_wdt_fops = { | 241 | static const struct file_operations pnx4008_wdt_fops = { |
242 | .owner = THIS_MODULE, | 242 | .owner = THIS_MODULE, |
243 | .llseek = no_llseek, | 243 | .llseek = no_llseek, |
244 | .write = pnx4008_wdt_write, | 244 | .write = pnx4008_wdt_write, |
diff --git a/drivers/char/watchdog/rm9k_wdt.c b/drivers/char/watchdog/rm9k_wdt.c index 7576a13e86bc..b4678839d3bb 100644 --- a/drivers/char/watchdog/rm9k_wdt.c +++ b/drivers/char/watchdog/rm9k_wdt.c | |||
@@ -95,7 +95,7 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be disabled once started"); | |||
95 | 95 | ||
96 | 96 | ||
97 | /* Kernel interfaces */ | 97 | /* Kernel interfaces */ |
98 | static struct file_operations fops = { | 98 | static const struct file_operations fops = { |
99 | .owner = THIS_MODULE, | 99 | .owner = THIS_MODULE, |
100 | .open = wdt_gpi_open, | 100 | .open = wdt_gpi_open, |
101 | .release = wdt_gpi_release, | 101 | .release = wdt_gpi_release, |
diff --git a/drivers/char/watchdog/smsc37b787_wdt.c b/drivers/char/watchdog/smsc37b787_wdt.c index 9f56913b484f..a9681d580dd3 100644 --- a/drivers/char/watchdog/smsc37b787_wdt.c +++ b/drivers/char/watchdog/smsc37b787_wdt.c | |||
@@ -510,7 +510,7 @@ static int wb_smsc_wdt_notify_sys(struct notifier_block *this, unsigned long cod | |||
510 | 510 | ||
511 | /* -- Module's structures ---------------------------------------*/ | 511 | /* -- Module's structures ---------------------------------------*/ |
512 | 512 | ||
513 | static struct file_operations wb_smsc_wdt_fops = | 513 | static const struct file_operations wb_smsc_wdt_fops = |
514 | { | 514 | { |
515 | .owner = THIS_MODULE, | 515 | .owner = THIS_MODULE, |
516 | .llseek = no_llseek, | 516 | .llseek = no_llseek, |
diff --git a/drivers/char/watchdog/w83697hf_wdt.c b/drivers/char/watchdog/w83697hf_wdt.c index 7768b55487c8..c960ec110dd7 100644 --- a/drivers/char/watchdog/w83697hf_wdt.c +++ b/drivers/char/watchdog/w83697hf_wdt.c | |||
@@ -323,7 +323,7 @@ wdt_notify_sys(struct notifier_block *this, unsigned long code, | |||
323 | * Kernel Interfaces | 323 | * Kernel Interfaces |
324 | */ | 324 | */ |
325 | 325 | ||
326 | static struct file_operations wdt_fops = { | 326 | static const struct file_operations wdt_fops = { |
327 | .owner = THIS_MODULE, | 327 | .owner = THIS_MODULE, |
328 | .llseek = no_llseek, | 328 | .llseek = no_llseek, |
329 | .write = wdt_write, | 329 | .write = wdt_write, |
diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c index c82bc0ed7f14..8bcc887692ab 100644 --- a/drivers/edac/e752x_edac.c +++ b/drivers/edac/e752x_edac.c | |||
@@ -285,8 +285,9 @@ static void do_process_ce(struct mem_ctl_info *mci, u16 error_one, | |||
285 | if (!pvt->map_type) | 285 | if (!pvt->map_type) |
286 | row = 7 - row; | 286 | row = 7 - row; |
287 | 287 | ||
288 | edac_mc_handle_ce(mci, page, 0, sec1_syndrome, row, channel, | 288 | /* e752x mc reads 34:6 of the DRAM linear address */ |
289 | "e752x CE"); | 289 | edac_mc_handle_ce(mci, page, offset_in_page(sec1_add << 4), |
290 | sec1_syndrome, row, channel, "e752x CE"); | ||
290 | } | 291 | } |
291 | 292 | ||
292 | static inline void process_ce(struct mem_ctl_info *mci, u16 error_one, | 293 | static inline void process_ce(struct mem_ctl_info *mci, u16 error_one, |
@@ -319,8 +320,10 @@ static void do_process_ue(struct mem_ctl_info *mci, u16 error_one, | |||
319 | ((block_page >> 1) & 3) : | 320 | ((block_page >> 1) & 3) : |
320 | edac_mc_find_csrow_by_page(mci, block_page); | 321 | edac_mc_find_csrow_by_page(mci, block_page); |
321 | 322 | ||
322 | edac_mc_handle_ue(mci, block_page, 0, row, | 323 | /* e752x mc reads 34:6 of the DRAM linear address */ |
323 | "e752x UE from Read"); | 324 | edac_mc_handle_ue(mci, block_page, |
325 | offset_in_page(error_2b << 4), | ||
326 | row, "e752x UE from Read"); | ||
324 | } | 327 | } |
325 | if (error_one & 0x0404) { | 328 | if (error_one & 0x0404) { |
326 | error_2b = scrb_add; | 329 | error_2b = scrb_add; |
@@ -333,8 +336,10 @@ static void do_process_ue(struct mem_ctl_info *mci, u16 error_one, | |||
333 | ((block_page >> 1) & 3) : | 336 | ((block_page >> 1) & 3) : |
334 | edac_mc_find_csrow_by_page(mci, block_page); | 337 | edac_mc_find_csrow_by_page(mci, block_page); |
335 | 338 | ||
336 | edac_mc_handle_ue(mci, block_page, 0, row, | 339 | /* e752x mc reads 34:6 of the DRAM linear address */ |
337 | "e752x UE from Scruber"); | 340 | edac_mc_handle_ue(mci, block_page, |
341 | offset_in_page(error_2b << 4), | ||
342 | row, "e752x UE from Scruber"); | ||
338 | } | 343 | } |
339 | } | 344 | } |
340 | 345 | ||
@@ -556,17 +561,17 @@ static void e752x_check_sysbus(struct e752x_error_info *info, | |||
556 | error32 = (stat32 >> 16) & 0x3ff; | 561 | error32 = (stat32 >> 16) & 0x3ff; |
557 | stat32 = stat32 & 0x3ff; | 562 | stat32 = stat32 & 0x3ff; |
558 | 563 | ||
559 | if(stat32 & 0x083) | 564 | if(stat32 & 0x087) |
560 | sysbus_error(1, stat32 & 0x083, error_found, handle_error); | 565 | sysbus_error(1, stat32 & 0x087, error_found, handle_error); |
561 | 566 | ||
562 | if(stat32 & 0x37c) | 567 | if(stat32 & 0x378) |
563 | sysbus_error(0, stat32 & 0x37c, error_found, handle_error); | 568 | sysbus_error(0, stat32 & 0x378, error_found, handle_error); |
564 | 569 | ||
565 | if(error32 & 0x083) | 570 | if(error32 & 0x087) |
566 | sysbus_error(1, error32 & 0x083, error_found, handle_error); | 571 | sysbus_error(1, error32 & 0x087, error_found, handle_error); |
567 | 572 | ||
568 | if(error32 & 0x37c) | 573 | if(error32 & 0x378) |
569 | sysbus_error(0, error32 & 0x37c, error_found, handle_error); | 574 | sysbus_error(0, error32 & 0x378, error_found, handle_error); |
570 | } | 575 | } |
571 | 576 | ||
572 | static void e752x_check_membuf (struct e752x_error_info *info, | 577 | static void e752x_check_membuf (struct e752x_error_info *info, |
@@ -782,7 +787,12 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, | |||
782 | u8 value; | 787 | u8 value; |
783 | u32 dra, drc, cumul_size; | 788 | u32 dra, drc, cumul_size; |
784 | 789 | ||
785 | pci_read_config_dword(pdev, E752X_DRA, &dra); | 790 | dra = 0; |
791 | for (index=0; index < 4; index++) { | ||
792 | u8 dra_reg; | ||
793 | pci_read_config_byte(pdev, E752X_DRA+index, &dra_reg); | ||
794 | dra |= dra_reg << (index * 8); | ||
795 | } | ||
786 | pci_read_config_dword(pdev, E752X_DRC, &drc); | 796 | pci_read_config_dword(pdev, E752X_DRC, &drc); |
787 | drc_chan = dual_channel_active(ddrcsr); | 797 | drc_chan = dual_channel_active(ddrcsr); |
788 | drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */ | 798 | drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */ |
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c index 1b4fc9221803..7b622300d0e5 100644 --- a/drivers/edac/edac_mc.c +++ b/drivers/edac/edac_mc.c | |||
@@ -927,6 +927,57 @@ static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci, | |||
927 | return count; | 927 | return count; |
928 | } | 928 | } |
929 | 929 | ||
930 | /* memory scrubbing */ | ||
931 | static ssize_t mci_sdram_scrub_rate_store(struct mem_ctl_info *mci, | ||
932 | const char *data, size_t count) | ||
933 | { | ||
934 | u32 bandwidth = -1; | ||
935 | |||
936 | if (mci->set_sdram_scrub_rate) { | ||
937 | |||
938 | memctrl_int_store(&bandwidth, data, count); | ||
939 | |||
940 | if (!(*mci->set_sdram_scrub_rate)(mci, &bandwidth)) { | ||
941 | edac_printk(KERN_DEBUG, EDAC_MC, | ||
942 | "Scrub rate set successfully, applied: %d\n", | ||
943 | bandwidth); | ||
944 | } else { | ||
945 | /* FIXME: error codes maybe? */ | ||
946 | edac_printk(KERN_DEBUG, EDAC_MC, | ||
947 | "Scrub rate set FAILED, could not apply: %d\n", | ||
948 | bandwidth); | ||
949 | } | ||
950 | } else { | ||
951 | /* FIXME: produce "not implemented" ERROR for user-side. */ | ||
952 | edac_printk(KERN_WARNING, EDAC_MC, | ||
953 | "Memory scrubbing 'set'control is not implemented!\n"); | ||
954 | } | ||
955 | return count; | ||
956 | } | ||
957 | |||
958 | static ssize_t mci_sdram_scrub_rate_show(struct mem_ctl_info *mci, char *data) | ||
959 | { | ||
960 | u32 bandwidth = -1; | ||
961 | |||
962 | if (mci->get_sdram_scrub_rate) { | ||
963 | if (!(*mci->get_sdram_scrub_rate)(mci, &bandwidth)) { | ||
964 | edac_printk(KERN_DEBUG, EDAC_MC, | ||
965 | "Scrub rate successfully, fetched: %d\n", | ||
966 | bandwidth); | ||
967 | } else { | ||
968 | /* FIXME: error codes maybe? */ | ||
969 | edac_printk(KERN_DEBUG, EDAC_MC, | ||
970 | "Scrub rate fetch FAILED, got: %d\n", | ||
971 | bandwidth); | ||
972 | } | ||
973 | } else { | ||
974 | /* FIXME: produce "not implemented" ERROR for user-side. */ | ||
975 | edac_printk(KERN_WARNING, EDAC_MC, | ||
976 | "Memory scrubbing 'get' control is not implemented!\n"); | ||
977 | } | ||
978 | return sprintf(data, "%d\n", bandwidth); | ||
979 | } | ||
980 | |||
930 | /* default attribute files for the MCI object */ | 981 | /* default attribute files for the MCI object */ |
931 | static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data) | 982 | static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data) |
932 | { | 983 | { |
@@ -1033,6 +1084,9 @@ MCIDEV_ATTR(ce_noinfo_count,S_IRUGO,mci_ce_noinfo_show,NULL); | |||
1033 | MCIDEV_ATTR(ue_count,S_IRUGO,mci_ue_count_show,NULL); | 1084 | MCIDEV_ATTR(ue_count,S_IRUGO,mci_ue_count_show,NULL); |
1034 | MCIDEV_ATTR(ce_count,S_IRUGO,mci_ce_count_show,NULL); | 1085 | MCIDEV_ATTR(ce_count,S_IRUGO,mci_ce_count_show,NULL); |
1035 | 1086 | ||
1087 | /* memory scrubber attribute file */ | ||
1088 | MCIDEV_ATTR(sdram_scrub_rate,S_IRUGO|S_IWUSR,mci_sdram_scrub_rate_show,mci_sdram_scrub_rate_store); | ||
1089 | |||
1036 | static struct mcidev_attribute *mci_attr[] = { | 1090 | static struct mcidev_attribute *mci_attr[] = { |
1037 | &mci_attr_reset_counters, | 1091 | &mci_attr_reset_counters, |
1038 | &mci_attr_mc_name, | 1092 | &mci_attr_mc_name, |
@@ -1042,6 +1096,7 @@ static struct mcidev_attribute *mci_attr[] = { | |||
1042 | &mci_attr_ce_noinfo_count, | 1096 | &mci_attr_ce_noinfo_count, |
1043 | &mci_attr_ue_count, | 1097 | &mci_attr_ue_count, |
1044 | &mci_attr_ce_count, | 1098 | &mci_attr_ce_count, |
1099 | &mci_attr_sdram_scrub_rate, | ||
1045 | NULL | 1100 | NULL |
1046 | }; | 1101 | }; |
1047 | 1102 | ||
@@ -1442,11 +1497,11 @@ int edac_mc_add_mc(struct mem_ctl_info *mci, int mc_idx) | |||
1442 | /* set load time so that error rate can be tracked */ | 1497 | /* set load time so that error rate can be tracked */ |
1443 | mci->start_time = jiffies; | 1498 | mci->start_time = jiffies; |
1444 | 1499 | ||
1445 | if (edac_create_sysfs_mci_device(mci)) { | 1500 | if (edac_create_sysfs_mci_device(mci)) { |
1446 | edac_mc_printk(mci, KERN_WARNING, | 1501 | edac_mc_printk(mci, KERN_WARNING, |
1447 | "failed to create sysfs device\n"); | 1502 | "failed to create sysfs device\n"); |
1448 | goto fail1; | 1503 | goto fail1; |
1449 | } | 1504 | } |
1450 | 1505 | ||
1451 | /* Report action taken */ | 1506 | /* Report action taken */ |
1452 | edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: DEV %s\n", | 1507 | edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: DEV %s\n", |
@@ -1703,6 +1758,116 @@ void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, const char *msg) | |||
1703 | EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info); | 1758 | EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info); |
1704 | 1759 | ||
1705 | 1760 | ||
1761 | /************************************************************* | ||
1762 | * On Fully Buffered DIMM modules, this help function is | ||
1763 | * called to process UE events | ||
1764 | */ | ||
1765 | void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, | ||
1766 | unsigned int csrow, | ||
1767 | unsigned int channela, | ||
1768 | unsigned int channelb, | ||
1769 | char *msg) | ||
1770 | { | ||
1771 | int len = EDAC_MC_LABEL_LEN * 4; | ||
1772 | char labels[len + 1]; | ||
1773 | char *pos = labels; | ||
1774 | int chars; | ||
1775 | |||
1776 | if (csrow >= mci->nr_csrows) { | ||
1777 | /* something is wrong */ | ||
1778 | edac_mc_printk(mci, KERN_ERR, | ||
1779 | "INTERNAL ERROR: row out of range (%d >= %d)\n", | ||
1780 | csrow, mci->nr_csrows); | ||
1781 | edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR"); | ||
1782 | return; | ||
1783 | } | ||
1784 | |||
1785 | if (channela >= mci->csrows[csrow].nr_channels) { | ||
1786 | /* something is wrong */ | ||
1787 | edac_mc_printk(mci, KERN_ERR, | ||
1788 | "INTERNAL ERROR: channel-a out of range " | ||
1789 | "(%d >= %d)\n", | ||
1790 | channela, mci->csrows[csrow].nr_channels); | ||
1791 | edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR"); | ||
1792 | return; | ||
1793 | } | ||
1794 | |||
1795 | if (channelb >= mci->csrows[csrow].nr_channels) { | ||
1796 | /* something is wrong */ | ||
1797 | edac_mc_printk(mci, KERN_ERR, | ||
1798 | "INTERNAL ERROR: channel-b out of range " | ||
1799 | "(%d >= %d)\n", | ||
1800 | channelb, mci->csrows[csrow].nr_channels); | ||
1801 | edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR"); | ||
1802 | return; | ||
1803 | } | ||
1804 | |||
1805 | mci->ue_count++; | ||
1806 | mci->csrows[csrow].ue_count++; | ||
1807 | |||
1808 | /* Generate the DIMM labels from the specified channels */ | ||
1809 | chars = snprintf(pos, len + 1, "%s", | ||
1810 | mci->csrows[csrow].channels[channela].label); | ||
1811 | len -= chars; pos += chars; | ||
1812 | chars = snprintf(pos, len + 1, "-%s", | ||
1813 | mci->csrows[csrow].channels[channelb].label); | ||
1814 | |||
1815 | if (log_ue) | ||
1816 | edac_mc_printk(mci, KERN_EMERG, | ||
1817 | "UE row %d, channel-a= %d channel-b= %d " | ||
1818 | "labels \"%s\": %s\n", csrow, channela, channelb, | ||
1819 | labels, msg); | ||
1820 | |||
1821 | if (panic_on_ue) | ||
1822 | panic("UE row %d, channel-a= %d channel-b= %d " | ||
1823 | "labels \"%s\": %s\n", csrow, channela, | ||
1824 | channelb, labels, msg); | ||
1825 | } | ||
1826 | EXPORT_SYMBOL(edac_mc_handle_fbd_ue); | ||
1827 | |||
1828 | /************************************************************* | ||
1829 | * On Fully Buffered DIMM modules, this help function is | ||
1830 | * called to process CE events | ||
1831 | */ | ||
1832 | void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, | ||
1833 | unsigned int csrow, | ||
1834 | unsigned int channel, | ||
1835 | char *msg) | ||
1836 | { | ||
1837 | |||
1838 | /* Ensure boundary values */ | ||
1839 | if (csrow >= mci->nr_csrows) { | ||
1840 | /* something is wrong */ | ||
1841 | edac_mc_printk(mci, KERN_ERR, | ||
1842 | "INTERNAL ERROR: row out of range (%d >= %d)\n", | ||
1843 | csrow, mci->nr_csrows); | ||
1844 | edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR"); | ||
1845 | return; | ||
1846 | } | ||
1847 | if (channel >= mci->csrows[csrow].nr_channels) { | ||
1848 | /* something is wrong */ | ||
1849 | edac_mc_printk(mci, KERN_ERR, | ||
1850 | "INTERNAL ERROR: channel out of range (%d >= %d)\n", | ||
1851 | channel, mci->csrows[csrow].nr_channels); | ||
1852 | edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR"); | ||
1853 | return; | ||
1854 | } | ||
1855 | |||
1856 | if (log_ce) | ||
1857 | /* FIXME - put in DIMM location */ | ||
1858 | edac_mc_printk(mci, KERN_WARNING, | ||
1859 | "CE row %d, channel %d, label \"%s\": %s\n", | ||
1860 | csrow, channel, | ||
1861 | mci->csrows[csrow].channels[channel].label, | ||
1862 | msg); | ||
1863 | |||
1864 | mci->ce_count++; | ||
1865 | mci->csrows[csrow].ce_count++; | ||
1866 | mci->csrows[csrow].channels[channel].ce_count++; | ||
1867 | } | ||
1868 | EXPORT_SYMBOL(edac_mc_handle_fbd_ce); | ||
1869 | |||
1870 | |||
1706 | /* | 1871 | /* |
1707 | * Iterate over all MC instances and check for ECC, et al, errors | 1872 | * Iterate over all MC instances and check for ECC, et al, errors |
1708 | */ | 1873 | */ |
@@ -1806,7 +1971,7 @@ static void __exit edac_mc_exit(void) | |||
1806 | debugf0("%s()\n", __func__); | 1971 | debugf0("%s()\n", __func__); |
1807 | kthread_stop(edac_thread); | 1972 | kthread_stop(edac_thread); |
1808 | 1973 | ||
1809 | /* tear down the sysfs device */ | 1974 | /* tear down the sysfs device */ |
1810 | edac_sysfs_memctrl_teardown(); | 1975 | edac_sysfs_memctrl_teardown(); |
1811 | edac_sysfs_pci_teardown(); | 1976 | edac_sysfs_pci_teardown(); |
1812 | } | 1977 | } |
diff --git a/drivers/edac/edac_mc.h b/drivers/edac/edac_mc.h index a1cfd4e3c97d..713444cc4105 100644 --- a/drivers/edac/edac_mc.h +++ b/drivers/edac/edac_mc.h | |||
@@ -123,7 +123,9 @@ enum mem_type { | |||
123 | MEM_RDR, /* Registered single data rate SDRAM */ | 123 | MEM_RDR, /* Registered single data rate SDRAM */ |
124 | MEM_DDR, /* Double data rate SDRAM */ | 124 | MEM_DDR, /* Double data rate SDRAM */ |
125 | MEM_RDDR, /* Registered Double data rate SDRAM */ | 125 | MEM_RDDR, /* Registered Double data rate SDRAM */ |
126 | MEM_RMBS /* Rambus DRAM */ | 126 | MEM_RMBS, /* Rambus DRAM */ |
127 | MEM_DDR2, /* DDR2 RAM */ | ||
128 | MEM_FB_DDR2, /* fully buffered DDR2 */ | ||
127 | }; | 129 | }; |
128 | 130 | ||
129 | #define MEM_FLAG_EMPTY BIT(MEM_EMPTY) | 131 | #define MEM_FLAG_EMPTY BIT(MEM_EMPTY) |
@@ -137,6 +139,8 @@ enum mem_type { | |||
137 | #define MEM_FLAG_DDR BIT(MEM_DDR) | 139 | #define MEM_FLAG_DDR BIT(MEM_DDR) |
138 | #define MEM_FLAG_RDDR BIT(MEM_RDDR) | 140 | #define MEM_FLAG_RDDR BIT(MEM_RDDR) |
139 | #define MEM_FLAG_RMBS BIT(MEM_RMBS) | 141 | #define MEM_FLAG_RMBS BIT(MEM_RMBS) |
142 | #define MEM_FLAG_DDR2 BIT(MEM_DDR2) | ||
143 | #define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2) | ||
140 | 144 | ||
141 | /* chipset Error Detection and Correction capabilities and mode */ | 145 | /* chipset Error Detection and Correction capabilities and mode */ |
142 | enum edac_type { | 146 | enum edac_type { |
@@ -315,8 +319,21 @@ struct mem_ctl_info { | |||
315 | unsigned long scrub_cap; /* chipset scrub capabilities */ | 319 | unsigned long scrub_cap; /* chipset scrub capabilities */ |
316 | enum scrub_type scrub_mode; /* current scrub mode */ | 320 | enum scrub_type scrub_mode; /* current scrub mode */ |
317 | 321 | ||
322 | /* Translates sdram memory scrub rate given in bytes/sec to the | ||
323 | internal representation and configures whatever else needs | ||
324 | to be configured. | ||
325 | */ | ||
326 | int (*set_sdram_scrub_rate) (struct mem_ctl_info *mci, u32 *bw); | ||
327 | |||
328 | /* Get the current sdram memory scrub rate from the internal | ||
329 | representation and converts it to the closest matching | ||
330 | bandwith in bytes/sec. | ||
331 | */ | ||
332 | int (*get_sdram_scrub_rate) (struct mem_ctl_info *mci, u32 *bw); | ||
333 | |||
318 | /* pointer to edac checking routine */ | 334 | /* pointer to edac checking routine */ |
319 | void (*edac_check) (struct mem_ctl_info * mci); | 335 | void (*edac_check) (struct mem_ctl_info * mci); |
336 | |||
320 | /* | 337 | /* |
321 | * Remaps memory pages: controller pages to physical pages. | 338 | * Remaps memory pages: controller pages to physical pages. |
322 | * For most MC's, this will be NULL. | 339 | * For most MC's, this will be NULL. |
@@ -441,6 +458,15 @@ extern void edac_mc_handle_ue(struct mem_ctl_info *mci, | |||
441 | int row, const char *msg); | 458 | int row, const char *msg); |
442 | extern void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, | 459 | extern void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, |
443 | const char *msg); | 460 | const char *msg); |
461 | extern void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, | ||
462 | unsigned int csrow, | ||
463 | unsigned int channel0, | ||
464 | unsigned int channel1, | ||
465 | char *msg); | ||
466 | extern void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, | ||
467 | unsigned int csrow, | ||
468 | unsigned int channel, | ||
469 | char *msg); | ||
444 | 470 | ||
445 | /* | 471 | /* |
446 | * This kmalloc's and initializes all the structures. | 472 | * This kmalloc's and initializes all the structures. |
diff --git a/drivers/i2c/chips/tps65010.c b/drivers/i2c/chips/tps65010.c index 4ee56def61f2..214fbb1423c5 100644 --- a/drivers/i2c/chips/tps65010.c +++ b/drivers/i2c/chips/tps65010.c | |||
@@ -308,7 +308,7 @@ static int dbg_tps_open(struct inode *inode, struct file *file) | |||
308 | return single_open(file, dbg_show, inode->i_private); | 308 | return single_open(file, dbg_show, inode->i_private); |
309 | } | 309 | } |
310 | 310 | ||
311 | static struct file_operations debug_fops = { | 311 | static const struct file_operations debug_fops = { |
312 | .open = dbg_tps_open, | 312 | .open = dbg_tps_open, |
313 | .read = seq_read, | 313 | .read = seq_read, |
314 | .llseek = seq_lseek, | 314 | .llseek = seq_lseek, |
diff --git a/drivers/i2c/i2c-dev.c b/drivers/i2c/i2c-dev.c index ac5bd2a7ca99..cb4fa9bef8cd 100644 --- a/drivers/i2c/i2c-dev.c +++ b/drivers/i2c/i2c-dev.c | |||
@@ -392,7 +392,7 @@ static int i2cdev_release(struct inode *inode, struct file *file) | |||
392 | return 0; | 392 | return 0; |
393 | } | 393 | } |
394 | 394 | ||
395 | static struct file_operations i2cdev_fops = { | 395 | static const struct file_operations i2cdev_fops = { |
396 | .owner = THIS_MODULE, | 396 | .owner = THIS_MODULE, |
397 | .llseek = no_llseek, | 397 | .llseek = no_llseek, |
398 | .read = i2cdev_read, | 398 | .read = i2cdev_read, |
diff --git a/drivers/ide/ide-proc.c b/drivers/ide/ide-proc.c index ad49bd823ebd..30a5780f4185 100644 --- a/drivers/ide/ide-proc.c +++ b/drivers/ide/ide-proc.c | |||
@@ -548,7 +548,7 @@ static int ide_drivers_open(struct inode *inode, struct file *file) | |||
548 | return single_open(file, &ide_drivers_show, NULL); | 548 | return single_open(file, &ide_drivers_show, NULL); |
549 | } | 549 | } |
550 | 550 | ||
551 | static struct file_operations ide_drivers_operations = { | 551 | static const struct file_operations ide_drivers_operations = { |
552 | .open = ide_drivers_open, | 552 | .open = ide_drivers_open, |
553 | .read = seq_read, | 553 | .read = seq_read, |
554 | .llseek = seq_lseek, | 554 | .llseek = seq_lseek, |
diff --git a/drivers/ide/ide-tape.c b/drivers/ide/ide-tape.c index b3bcd1d7315e..c6eec0413a6c 100644 --- a/drivers/ide/ide-tape.c +++ b/drivers/ide/ide-tape.c | |||
@@ -4779,7 +4779,7 @@ static ide_driver_t idetape_driver = { | |||
4779 | /* | 4779 | /* |
4780 | * Our character device supporting functions, passed to register_chrdev. | 4780 | * Our character device supporting functions, passed to register_chrdev. |
4781 | */ | 4781 | */ |
4782 | static struct file_operations idetape_fops = { | 4782 | static const struct file_operations idetape_fops = { |
4783 | .owner = THIS_MODULE, | 4783 | .owner = THIS_MODULE, |
4784 | .read = idetape_chrdev_read, | 4784 | .read = idetape_chrdev_read, |
4785 | .write = idetape_chrdev_write, | 4785 | .write = idetape_chrdev_write, |
diff --git a/drivers/ieee1394/dv1394.c b/drivers/ieee1394/dv1394.c index 55d6ae664fd6..dee9529aa8e7 100644 --- a/drivers/ieee1394/dv1394.c +++ b/drivers/ieee1394/dv1394.c | |||
@@ -2147,7 +2147,7 @@ out: | |||
2147 | } | 2147 | } |
2148 | 2148 | ||
2149 | static struct cdev dv1394_cdev; | 2149 | static struct cdev dv1394_cdev; |
2150 | static struct file_operations dv1394_fops= | 2150 | static const struct file_operations dv1394_fops= |
2151 | { | 2151 | { |
2152 | .owner = THIS_MODULE, | 2152 | .owner = THIS_MODULE, |
2153 | .poll = dv1394_poll, | 2153 | .poll = dv1394_poll, |
diff --git a/drivers/ieee1394/raw1394.c b/drivers/ieee1394/raw1394.c index a77a832828c8..aa9ca8385ec7 100644 --- a/drivers/ieee1394/raw1394.c +++ b/drivers/ieee1394/raw1394.c | |||
@@ -3013,7 +3013,7 @@ static struct hpsb_highlevel raw1394_highlevel = { | |||
3013 | }; | 3013 | }; |
3014 | 3014 | ||
3015 | static struct cdev raw1394_cdev; | 3015 | static struct cdev raw1394_cdev; |
3016 | static struct file_operations raw1394_fops = { | 3016 | static const struct file_operations raw1394_fops = { |
3017 | .owner = THIS_MODULE, | 3017 | .owner = THIS_MODULE, |
3018 | .read = raw1394_read, | 3018 | .read = raw1394_read, |
3019 | .write = raw1394_write, | 3019 | .write = raw1394_write, |
diff --git a/drivers/ieee1394/video1394.c b/drivers/ieee1394/video1394.c index f4d1ec00af65..95ca26d75272 100644 --- a/drivers/ieee1394/video1394.c +++ b/drivers/ieee1394/video1394.c | |||
@@ -1277,7 +1277,7 @@ static long video1394_compat_ioctl(struct file *f, unsigned cmd, unsigned long a | |||
1277 | #endif | 1277 | #endif |
1278 | 1278 | ||
1279 | static struct cdev video1394_cdev; | 1279 | static struct cdev video1394_cdev; |
1280 | static struct file_operations video1394_fops= | 1280 | static const struct file_operations video1394_fops= |
1281 | { | 1281 | { |
1282 | .owner = THIS_MODULE, | 1282 | .owner = THIS_MODULE, |
1283 | .unlocked_ioctl = video1394_ioctl, | 1283 | .unlocked_ioctl = video1394_ioctl, |
diff --git a/drivers/infiniband/core/ucm.c b/drivers/infiniband/core/ucm.c index f15220a0ee75..ee51d79a7ad5 100644 --- a/drivers/infiniband/core/ucm.c +++ b/drivers/infiniband/core/ucm.c | |||
@@ -1221,7 +1221,7 @@ static void ib_ucm_release_class_dev(struct class_device *class_dev) | |||
1221 | kfree(dev); | 1221 | kfree(dev); |
1222 | } | 1222 | } |
1223 | 1223 | ||
1224 | static struct file_operations ucm_fops = { | 1224 | static const struct file_operations ucm_fops = { |
1225 | .owner = THIS_MODULE, | 1225 | .owner = THIS_MODULE, |
1226 | .open = ib_ucm_open, | 1226 | .open = ib_ucm_open, |
1227 | .release = ib_ucm_close, | 1227 | .release = ib_ucm_close, |
diff --git a/drivers/infiniband/core/ucma.c b/drivers/infiniband/core/ucma.c index e2e8d329b443..6b81b98961c7 100644 --- a/drivers/infiniband/core/ucma.c +++ b/drivers/infiniband/core/ucma.c | |||
@@ -833,7 +833,7 @@ static int ucma_close(struct inode *inode, struct file *filp) | |||
833 | return 0; | 833 | return 0; |
834 | } | 834 | } |
835 | 835 | ||
836 | static struct file_operations ucma_fops = { | 836 | static const struct file_operations ucma_fops = { |
837 | .owner = THIS_MODULE, | 837 | .owner = THIS_MODULE, |
838 | .open = ucma_open, | 838 | .open = ucma_open, |
839 | .release = ucma_close, | 839 | .release = ucma_close, |
diff --git a/drivers/infiniband/core/user_mad.c b/drivers/infiniband/core/user_mad.c index 807fbd6b8414..c069ebeba8e3 100644 --- a/drivers/infiniband/core/user_mad.c +++ b/drivers/infiniband/core/user_mad.c | |||
@@ -771,7 +771,7 @@ static int ib_umad_close(struct inode *inode, struct file *filp) | |||
771 | return 0; | 771 | return 0; |
772 | } | 772 | } |
773 | 773 | ||
774 | static struct file_operations umad_fops = { | 774 | static const struct file_operations umad_fops = { |
775 | .owner = THIS_MODULE, | 775 | .owner = THIS_MODULE, |
776 | .read = ib_umad_read, | 776 | .read = ib_umad_read, |
777 | .write = ib_umad_write, | 777 | .write = ib_umad_write, |
@@ -846,7 +846,7 @@ static int ib_umad_sm_close(struct inode *inode, struct file *filp) | |||
846 | return ret; | 846 | return ret; |
847 | } | 847 | } |
848 | 848 | ||
849 | static struct file_operations umad_sm_fops = { | 849 | static const struct file_operations umad_sm_fops = { |
850 | .owner = THIS_MODULE, | 850 | .owner = THIS_MODULE, |
851 | .open = ib_umad_sm_open, | 851 | .open = ib_umad_sm_open, |
852 | .release = ib_umad_sm_close | 852 | .release = ib_umad_sm_close |
diff --git a/drivers/infiniband/core/uverbs_main.c b/drivers/infiniband/core/uverbs_main.c index a617ca7b6923..f8bc822a3cc3 100644 --- a/drivers/infiniband/core/uverbs_main.c +++ b/drivers/infiniband/core/uverbs_main.c | |||
@@ -375,7 +375,7 @@ static int ib_uverbs_event_close(struct inode *inode, struct file *filp) | |||
375 | return 0; | 375 | return 0; |
376 | } | 376 | } |
377 | 377 | ||
378 | static struct file_operations uverbs_event_fops = { | 378 | static const struct file_operations uverbs_event_fops = { |
379 | .owner = THIS_MODULE, | 379 | .owner = THIS_MODULE, |
380 | .read = ib_uverbs_event_read, | 380 | .read = ib_uverbs_event_read, |
381 | .poll = ib_uverbs_event_poll, | 381 | .poll = ib_uverbs_event_poll, |
@@ -679,14 +679,14 @@ static int ib_uverbs_close(struct inode *inode, struct file *filp) | |||
679 | return 0; | 679 | return 0; |
680 | } | 680 | } |
681 | 681 | ||
682 | static struct file_operations uverbs_fops = { | 682 | static const struct file_operations uverbs_fops = { |
683 | .owner = THIS_MODULE, | 683 | .owner = THIS_MODULE, |
684 | .write = ib_uverbs_write, | 684 | .write = ib_uverbs_write, |
685 | .open = ib_uverbs_open, | 685 | .open = ib_uverbs_open, |
686 | .release = ib_uverbs_close | 686 | .release = ib_uverbs_close |
687 | }; | 687 | }; |
688 | 688 | ||
689 | static struct file_operations uverbs_mmap_fops = { | 689 | static const struct file_operations uverbs_mmap_fops = { |
690 | .owner = THIS_MODULE, | 690 | .owner = THIS_MODULE, |
691 | .write = ib_uverbs_write, | 691 | .write = ib_uverbs_write, |
692 | .mmap = ib_uverbs_mmap, | 692 | .mmap = ib_uverbs_mmap, |
diff --git a/drivers/infiniband/hw/ipath/ipath_diag.c b/drivers/infiniband/hw/ipath/ipath_diag.c index 28c087b824c2..0f13a2182cc7 100644 --- a/drivers/infiniband/hw/ipath/ipath_diag.c +++ b/drivers/infiniband/hw/ipath/ipath_diag.c | |||
@@ -59,7 +59,7 @@ static ssize_t ipath_diag_read(struct file *fp, char __user *data, | |||
59 | static ssize_t ipath_diag_write(struct file *fp, const char __user *data, | 59 | static ssize_t ipath_diag_write(struct file *fp, const char __user *data, |
60 | size_t count, loff_t *off); | 60 | size_t count, loff_t *off); |
61 | 61 | ||
62 | static struct file_operations diag_file_ops = { | 62 | static const struct file_operations diag_file_ops = { |
63 | .owner = THIS_MODULE, | 63 | .owner = THIS_MODULE, |
64 | .write = ipath_diag_write, | 64 | .write = ipath_diag_write, |
65 | .read = ipath_diag_read, | 65 | .read = ipath_diag_read, |
@@ -71,7 +71,7 @@ static ssize_t ipath_diagpkt_write(struct file *fp, | |||
71 | const char __user *data, | 71 | const char __user *data, |
72 | size_t count, loff_t *off); | 72 | size_t count, loff_t *off); |
73 | 73 | ||
74 | static struct file_operations diagpkt_file_ops = { | 74 | static const struct file_operations diagpkt_file_ops = { |
75 | .owner = THIS_MODULE, | 75 | .owner = THIS_MODULE, |
76 | .write = ipath_diagpkt_write, | 76 | .write = ipath_diagpkt_write, |
77 | }; | 77 | }; |
diff --git a/drivers/infiniband/hw/ipath/ipath_file_ops.c b/drivers/infiniband/hw/ipath/ipath_file_ops.c index b932bcb67a5e..5d64ff875297 100644 --- a/drivers/infiniband/hw/ipath/ipath_file_ops.c +++ b/drivers/infiniband/hw/ipath/ipath_file_ops.c | |||
@@ -54,7 +54,7 @@ static ssize_t ipath_write(struct file *, const char __user *, size_t, | |||
54 | static unsigned int ipath_poll(struct file *, struct poll_table_struct *); | 54 | static unsigned int ipath_poll(struct file *, struct poll_table_struct *); |
55 | static int ipath_mmap(struct file *, struct vm_area_struct *); | 55 | static int ipath_mmap(struct file *, struct vm_area_struct *); |
56 | 56 | ||
57 | static struct file_operations ipath_file_ops = { | 57 | static const struct file_operations ipath_file_ops = { |
58 | .owner = THIS_MODULE, | 58 | .owner = THIS_MODULE, |
59 | .write = ipath_write, | 59 | .write = ipath_write, |
60 | .open = ipath_open, | 60 | .open = ipath_open, |
@@ -2153,7 +2153,7 @@ bail: | |||
2153 | 2153 | ||
2154 | static struct class *ipath_class; | 2154 | static struct class *ipath_class; |
2155 | 2155 | ||
2156 | static int init_cdev(int minor, char *name, struct file_operations *fops, | 2156 | static int init_cdev(int minor, char *name, const struct file_operations *fops, |
2157 | struct cdev **cdevp, struct class_device **class_devp) | 2157 | struct cdev **cdevp, struct class_device **class_devp) |
2158 | { | 2158 | { |
2159 | const dev_t dev = MKDEV(IPATH_MAJOR, minor); | 2159 | const dev_t dev = MKDEV(IPATH_MAJOR, minor); |
@@ -2210,7 +2210,7 @@ done: | |||
2210 | return ret; | 2210 | return ret; |
2211 | } | 2211 | } |
2212 | 2212 | ||
2213 | int ipath_cdev_init(int minor, char *name, struct file_operations *fops, | 2213 | int ipath_cdev_init(int minor, char *name, const struct file_operations *fops, |
2214 | struct cdev **cdevp, struct class_device **class_devp) | 2214 | struct cdev **cdevp, struct class_device **class_devp) |
2215 | { | 2215 | { |
2216 | return init_cdev(minor, name, fops, cdevp, class_devp); | 2216 | return init_cdev(minor, name, fops, cdevp, class_devp); |
diff --git a/drivers/infiniband/hw/ipath/ipath_fs.c b/drivers/infiniband/hw/ipath/ipath_fs.c index 79a60f020a21..5b40a846ff95 100644 --- a/drivers/infiniband/hw/ipath/ipath_fs.c +++ b/drivers/infiniband/hw/ipath/ipath_fs.c | |||
@@ -47,7 +47,7 @@ | |||
47 | static struct super_block *ipath_super; | 47 | static struct super_block *ipath_super; |
48 | 48 | ||
49 | static int ipathfs_mknod(struct inode *dir, struct dentry *dentry, | 49 | static int ipathfs_mknod(struct inode *dir, struct dentry *dentry, |
50 | int mode, struct file_operations *fops, | 50 | int mode, const struct file_operations *fops, |
51 | void *data) | 51 | void *data) |
52 | { | 52 | { |
53 | int error; | 53 | int error; |
@@ -81,7 +81,7 @@ bail: | |||
81 | 81 | ||
82 | static int create_file(const char *name, mode_t mode, | 82 | static int create_file(const char *name, mode_t mode, |
83 | struct dentry *parent, struct dentry **dentry, | 83 | struct dentry *parent, struct dentry **dentry, |
84 | struct file_operations *fops, void *data) | 84 | const struct file_operations *fops, void *data) |
85 | { | 85 | { |
86 | int error; | 86 | int error; |
87 | 87 | ||
@@ -105,7 +105,7 @@ static ssize_t atomic_stats_read(struct file *file, char __user *buf, | |||
105 | sizeof ipath_stats); | 105 | sizeof ipath_stats); |
106 | } | 106 | } |
107 | 107 | ||
108 | static struct file_operations atomic_stats_ops = { | 108 | static const struct file_operations atomic_stats_ops = { |
109 | .read = atomic_stats_read, | 109 | .read = atomic_stats_read, |
110 | }; | 110 | }; |
111 | 111 | ||
@@ -127,7 +127,7 @@ static ssize_t atomic_counters_read(struct file *file, char __user *buf, | |||
127 | sizeof counters); | 127 | sizeof counters); |
128 | } | 128 | } |
129 | 129 | ||
130 | static struct file_operations atomic_counters_ops = { | 130 | static const struct file_operations atomic_counters_ops = { |
131 | .read = atomic_counters_read, | 131 | .read = atomic_counters_read, |
132 | }; | 132 | }; |
133 | 133 | ||
@@ -166,7 +166,7 @@ static ssize_t atomic_node_info_read(struct file *file, char __user *buf, | |||
166 | sizeof nodeinfo); | 166 | sizeof nodeinfo); |
167 | } | 167 | } |
168 | 168 | ||
169 | static struct file_operations atomic_node_info_ops = { | 169 | static const struct file_operations atomic_node_info_ops = { |
170 | .read = atomic_node_info_read, | 170 | .read = atomic_node_info_read, |
171 | }; | 171 | }; |
172 | 172 | ||
@@ -291,7 +291,7 @@ static ssize_t atomic_port_info_read(struct file *file, char __user *buf, | |||
291 | sizeof portinfo); | 291 | sizeof portinfo); |
292 | } | 292 | } |
293 | 293 | ||
294 | static struct file_operations atomic_port_info_ops = { | 294 | static const struct file_operations atomic_port_info_ops = { |
295 | .read = atomic_port_info_read, | 295 | .read = atomic_port_info_read, |
296 | }; | 296 | }; |
297 | 297 | ||
@@ -394,7 +394,7 @@ bail: | |||
394 | return ret; | 394 | return ret; |
395 | } | 395 | } |
396 | 396 | ||
397 | static struct file_operations flash_ops = { | 397 | static const struct file_operations flash_ops = { |
398 | .read = flash_read, | 398 | .read = flash_read, |
399 | .write = flash_write, | 399 | .write = flash_write, |
400 | }; | 400 | }; |
diff --git a/drivers/infiniband/hw/ipath/ipath_kernel.h b/drivers/infiniband/hw/ipath/ipath_kernel.h index 986b2125b8f5..6d8d05fb5999 100644 --- a/drivers/infiniband/hw/ipath/ipath_kernel.h +++ b/drivers/infiniband/hw/ipath/ipath_kernel.h | |||
@@ -593,7 +593,7 @@ void ipath_shutdown_device(struct ipath_devdata *); | |||
593 | void ipath_disarm_senderrbufs(struct ipath_devdata *); | 593 | void ipath_disarm_senderrbufs(struct ipath_devdata *); |
594 | 594 | ||
595 | struct file_operations; | 595 | struct file_operations; |
596 | int ipath_cdev_init(int minor, char *name, struct file_operations *fops, | 596 | int ipath_cdev_init(int minor, char *name, const struct file_operations *fops, |
597 | struct cdev **cdevp, struct class_device **class_devp); | 597 | struct cdev **cdevp, struct class_device **class_devp); |
598 | void ipath_cdev_cleanup(struct cdev **cdevp, | 598 | void ipath_cdev_cleanup(struct cdev **cdevp, |
599 | struct class_device **class_devp); | 599 | struct class_device **class_devp); |
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_fs.c b/drivers/infiniband/ulp/ipoib/ipoib_fs.c index f1cb83688b31..44c174182a82 100644 --- a/drivers/infiniband/ulp/ipoib/ipoib_fs.c +++ b/drivers/infiniband/ulp/ipoib/ipoib_fs.c | |||
@@ -146,7 +146,7 @@ static int ipoib_mcg_open(struct inode *inode, struct file *file) | |||
146 | return 0; | 146 | return 0; |
147 | } | 147 | } |
148 | 148 | ||
149 | static struct file_operations ipoib_mcg_fops = { | 149 | static const struct file_operations ipoib_mcg_fops = { |
150 | .owner = THIS_MODULE, | 150 | .owner = THIS_MODULE, |
151 | .open = ipoib_mcg_open, | 151 | .open = ipoib_mcg_open, |
152 | .read = seq_read, | 152 | .read = seq_read, |
@@ -252,7 +252,7 @@ static int ipoib_path_open(struct inode *inode, struct file *file) | |||
252 | return 0; | 252 | return 0; |
253 | } | 253 | } |
254 | 254 | ||
255 | static struct file_operations ipoib_path_fops = { | 255 | static const struct file_operations ipoib_path_fops = { |
256 | .owner = THIS_MODULE, | 256 | .owner = THIS_MODULE, |
257 | .open = ipoib_path_open, | 257 | .open = ipoib_path_open, |
258 | .read = seq_read, | 258 | .read = seq_read, |
diff --git a/drivers/input/input.c b/drivers/input/input.c index 7cf2b4f603a3..14d4c0493c36 100644 --- a/drivers/input/input.c +++ b/drivers/input/input.c | |||
@@ -482,7 +482,7 @@ static int input_proc_devices_open(struct inode *inode, struct file *file) | |||
482 | return seq_open(file, &input_devices_seq_ops); | 482 | return seq_open(file, &input_devices_seq_ops); |
483 | } | 483 | } |
484 | 484 | ||
485 | static struct file_operations input_devices_fileops = { | 485 | static const struct file_operations input_devices_fileops = { |
486 | .owner = THIS_MODULE, | 486 | .owner = THIS_MODULE, |
487 | .open = input_proc_devices_open, | 487 | .open = input_proc_devices_open, |
488 | .poll = input_proc_devices_poll, | 488 | .poll = input_proc_devices_poll, |
@@ -533,7 +533,7 @@ static int input_proc_handlers_open(struct inode *inode, struct file *file) | |||
533 | return seq_open(file, &input_handlers_seq_ops); | 533 | return seq_open(file, &input_handlers_seq_ops); |
534 | } | 534 | } |
535 | 535 | ||
536 | static struct file_operations input_handlers_fileops = { | 536 | static const struct file_operations input_handlers_fileops = { |
537 | .owner = THIS_MODULE, | 537 | .owner = THIS_MODULE, |
538 | .open = input_proc_handlers_open, | 538 | .open = input_proc_handlers_open, |
539 | .read = seq_read, | 539 | .read = seq_read, |
@@ -1142,7 +1142,7 @@ static int input_open_file(struct inode *inode, struct file *file) | |||
1142 | return err; | 1142 | return err; |
1143 | } | 1143 | } |
1144 | 1144 | ||
1145 | static struct file_operations input_fops = { | 1145 | static const struct file_operations input_fops = { |
1146 | .owner = THIS_MODULE, | 1146 | .owner = THIS_MODULE, |
1147 | .open = input_open_file, | 1147 | .open = input_open_file, |
1148 | }; | 1148 | }; |
diff --git a/drivers/input/misc/hp_sdc_rtc.c b/drivers/input/misc/hp_sdc_rtc.c index 31d5a13bfd6b..ab76ea442fa5 100644 --- a/drivers/input/misc/hp_sdc_rtc.c +++ b/drivers/input/misc/hp_sdc_rtc.c | |||
@@ -670,7 +670,7 @@ static int hp_sdc_rtc_ioctl(struct inode *inode, struct file *file, | |||
670 | #endif | 670 | #endif |
671 | } | 671 | } |
672 | 672 | ||
673 | static struct file_operations hp_sdc_rtc_fops = { | 673 | static const struct file_operations hp_sdc_rtc_fops = { |
674 | .owner = THIS_MODULE, | 674 | .owner = THIS_MODULE, |
675 | .llseek = no_llseek, | 675 | .llseek = no_llseek, |
676 | .read = hp_sdc_rtc_read, | 676 | .read = hp_sdc_rtc_read, |
diff --git a/drivers/input/misc/uinput.c b/drivers/input/misc/uinput.c index 9516439b7c78..42556232c523 100644 --- a/drivers/input/misc/uinput.c +++ b/drivers/input/misc/uinput.c | |||
@@ -627,7 +627,7 @@ static long uinput_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
627 | return retval; | 627 | return retval; |
628 | } | 628 | } |
629 | 629 | ||
630 | static struct file_operations uinput_fops = { | 630 | static const struct file_operations uinput_fops = { |
631 | .owner = THIS_MODULE, | 631 | .owner = THIS_MODULE, |
632 | .open = uinput_open, | 632 | .open = uinput_open, |
633 | .release = uinput_release, | 633 | .release = uinput_release, |
diff --git a/drivers/input/serio/serio_raw.c b/drivers/input/serio/serio_raw.c index 088ebc348ba3..887357666c68 100644 --- a/drivers/input/serio/serio_raw.c +++ b/drivers/input/serio/serio_raw.c | |||
@@ -234,7 +234,7 @@ static unsigned int serio_raw_poll(struct file *file, poll_table *wait) | |||
234 | return 0; | 234 | return 0; |
235 | } | 235 | } |
236 | 236 | ||
237 | static struct file_operations serio_raw_fops = { | 237 | static const struct file_operations serio_raw_fops = { |
238 | .owner = THIS_MODULE, | 238 | .owner = THIS_MODULE, |
239 | .open = serio_raw_open, | 239 | .open = serio_raw_open, |
240 | .release = serio_raw_release, | 240 | .release = serio_raw_release, |
diff --git a/drivers/isdn/capi/capi.c b/drivers/isdn/capi/capi.c index d22c0224fde6..db1260f73f10 100644 --- a/drivers/isdn/capi/capi.c +++ b/drivers/isdn/capi/capi.c | |||
@@ -118,6 +118,15 @@ struct capiminor { | |||
118 | }; | 118 | }; |
119 | #endif /* CONFIG_ISDN_CAPI_MIDDLEWARE */ | 119 | #endif /* CONFIG_ISDN_CAPI_MIDDLEWARE */ |
120 | 120 | ||
121 | /* FIXME: The following lock is a sledgehammer-workaround to a | ||
122 | * locking issue with the capiminor (and maybe other) data structure(s). | ||
123 | * Access to this data is done in a racy way and crashes the machine with | ||
124 | * a FritzCard DSL driver; sooner or later. This is a workaround | ||
125 | * which trades scalability vs stability, so it doesn't crash the kernel anymore. | ||
126 | * The correct (and scalable) fix for the issue seems to require | ||
127 | * an API change to the drivers... . */ | ||
128 | static DEFINE_SPINLOCK(workaround_lock); | ||
129 | |||
121 | struct capincci { | 130 | struct capincci { |
122 | struct capincci *next; | 131 | struct capincci *next; |
123 | u32 ncci; | 132 | u32 ncci; |
@@ -589,6 +598,7 @@ static void capi_recv_message(struct capi20_appl *ap, struct sk_buff *skb) | |||
589 | #endif /* CONFIG_ISDN_CAPI_MIDDLEWARE */ | 598 | #endif /* CONFIG_ISDN_CAPI_MIDDLEWARE */ |
590 | struct capincci *np; | 599 | struct capincci *np; |
591 | u32 ncci; | 600 | u32 ncci; |
601 | unsigned long flags; | ||
592 | 602 | ||
593 | if (CAPIMSG_CMD(skb->data) == CAPI_CONNECT_B3_CONF) { | 603 | if (CAPIMSG_CMD(skb->data) == CAPI_CONNECT_B3_CONF) { |
594 | u16 info = CAPIMSG_U16(skb->data, 12); // Info field | 604 | u16 info = CAPIMSG_U16(skb->data, 12); // Info field |
@@ -603,9 +613,11 @@ static void capi_recv_message(struct capi20_appl *ap, struct sk_buff *skb) | |||
603 | capincci_alloc(cdev, CAPIMSG_NCCI(skb->data)); | 613 | capincci_alloc(cdev, CAPIMSG_NCCI(skb->data)); |
604 | up(&cdev->ncci_list_sem); | 614 | up(&cdev->ncci_list_sem); |
605 | } | 615 | } |
616 | spin_lock_irqsave(&workaround_lock, flags); | ||
606 | if (CAPIMSG_COMMAND(skb->data) != CAPI_DATA_B3) { | 617 | if (CAPIMSG_COMMAND(skb->data) != CAPI_DATA_B3) { |
607 | skb_queue_tail(&cdev->recvqueue, skb); | 618 | skb_queue_tail(&cdev->recvqueue, skb); |
608 | wake_up_interruptible(&cdev->recvwait); | 619 | wake_up_interruptible(&cdev->recvwait); |
620 | spin_unlock_irqrestore(&workaround_lock, flags); | ||
609 | return; | 621 | return; |
610 | } | 622 | } |
611 | ncci = CAPIMSG_CONTROL(skb->data); | 623 | ncci = CAPIMSG_CONTROL(skb->data); |
@@ -615,6 +627,7 @@ static void capi_recv_message(struct capi20_appl *ap, struct sk_buff *skb) | |||
615 | printk(KERN_ERR "BUG: capi_signal: ncci not found\n"); | 627 | printk(KERN_ERR "BUG: capi_signal: ncci not found\n"); |
616 | skb_queue_tail(&cdev->recvqueue, skb); | 628 | skb_queue_tail(&cdev->recvqueue, skb); |
617 | wake_up_interruptible(&cdev->recvwait); | 629 | wake_up_interruptible(&cdev->recvwait); |
630 | spin_unlock_irqrestore(&workaround_lock, flags); | ||
618 | return; | 631 | return; |
619 | } | 632 | } |
620 | #ifndef CONFIG_ISDN_CAPI_MIDDLEWARE | 633 | #ifndef CONFIG_ISDN_CAPI_MIDDLEWARE |
@@ -625,6 +638,7 @@ static void capi_recv_message(struct capi20_appl *ap, struct sk_buff *skb) | |||
625 | if (!mp) { | 638 | if (!mp) { |
626 | skb_queue_tail(&cdev->recvqueue, skb); | 639 | skb_queue_tail(&cdev->recvqueue, skb); |
627 | wake_up_interruptible(&cdev->recvwait); | 640 | wake_up_interruptible(&cdev->recvwait); |
641 | spin_unlock_irqrestore(&workaround_lock, flags); | ||
628 | return; | 642 | return; |
629 | } | 643 | } |
630 | 644 | ||
@@ -660,6 +674,7 @@ static void capi_recv_message(struct capi20_appl *ap, struct sk_buff *skb) | |||
660 | wake_up_interruptible(&cdev->recvwait); | 674 | wake_up_interruptible(&cdev->recvwait); |
661 | } | 675 | } |
662 | #endif /* CONFIG_ISDN_CAPI_MIDDLEWARE */ | 676 | #endif /* CONFIG_ISDN_CAPI_MIDDLEWARE */ |
677 | spin_unlock_irqrestore(&workaround_lock, flags); | ||
663 | } | 678 | } |
664 | 679 | ||
665 | /* -------- file_operations for capidev ----------------------------- */ | 680 | /* -------- file_operations for capidev ----------------------------- */ |
@@ -988,7 +1003,7 @@ capi_release(struct inode *inode, struct file *file) | |||
988 | return 0; | 1003 | return 0; |
989 | } | 1004 | } |
990 | 1005 | ||
991 | static struct file_operations capi_fops = | 1006 | static const struct file_operations capi_fops = |
992 | { | 1007 | { |
993 | .owner = THIS_MODULE, | 1008 | .owner = THIS_MODULE, |
994 | .llseek = no_llseek, | 1009 | .llseek = no_llseek, |
@@ -1006,6 +1021,7 @@ static struct file_operations capi_fops = | |||
1006 | static int capinc_tty_open(struct tty_struct * tty, struct file * file) | 1021 | static int capinc_tty_open(struct tty_struct * tty, struct file * file) |
1007 | { | 1022 | { |
1008 | struct capiminor *mp; | 1023 | struct capiminor *mp; |
1024 | unsigned long flags; | ||
1009 | 1025 | ||
1010 | if ((mp = capiminor_find(iminor(file->f_path.dentry->d_inode))) == 0) | 1026 | if ((mp = capiminor_find(iminor(file->f_path.dentry->d_inode))) == 0) |
1011 | return -ENXIO; | 1027 | return -ENXIO; |
@@ -1014,6 +1030,7 @@ static int capinc_tty_open(struct tty_struct * tty, struct file * file) | |||
1014 | 1030 | ||
1015 | tty->driver_data = (void *)mp; | 1031 | tty->driver_data = (void *)mp; |
1016 | 1032 | ||
1033 | spin_lock_irqsave(&workaround_lock, flags); | ||
1017 | if (atomic_read(&mp->ttyopencount) == 0) | 1034 | if (atomic_read(&mp->ttyopencount) == 0) |
1018 | mp->tty = tty; | 1035 | mp->tty = tty; |
1019 | atomic_inc(&mp->ttyopencount); | 1036 | atomic_inc(&mp->ttyopencount); |
@@ -1021,6 +1038,7 @@ static int capinc_tty_open(struct tty_struct * tty, struct file * file) | |||
1021 | printk(KERN_DEBUG "capinc_tty_open ocount=%d\n", atomic_read(&mp->ttyopencount)); | 1038 | printk(KERN_DEBUG "capinc_tty_open ocount=%d\n", atomic_read(&mp->ttyopencount)); |
1022 | #endif | 1039 | #endif |
1023 | handle_minor_recv(mp); | 1040 | handle_minor_recv(mp); |
1041 | spin_unlock_irqrestore(&workaround_lock, flags); | ||
1024 | return 0; | 1042 | return 0; |
1025 | } | 1043 | } |
1026 | 1044 | ||
@@ -1054,6 +1072,7 @@ static int capinc_tty_write(struct tty_struct * tty, | |||
1054 | { | 1072 | { |
1055 | struct capiminor *mp = (struct capiminor *)tty->driver_data; | 1073 | struct capiminor *mp = (struct capiminor *)tty->driver_data; |
1056 | struct sk_buff *skb; | 1074 | struct sk_buff *skb; |
1075 | unsigned long flags; | ||
1057 | 1076 | ||
1058 | #ifdef _DEBUG_TTYFUNCS | 1077 | #ifdef _DEBUG_TTYFUNCS |
1059 | printk(KERN_DEBUG "capinc_tty_write(count=%d)\n", count); | 1078 | printk(KERN_DEBUG "capinc_tty_write(count=%d)\n", count); |
@@ -1066,6 +1085,7 @@ static int capinc_tty_write(struct tty_struct * tty, | |||
1066 | return 0; | 1085 | return 0; |
1067 | } | 1086 | } |
1068 | 1087 | ||
1088 | spin_lock_irqsave(&workaround_lock, flags); | ||
1069 | skb = mp->ttyskb; | 1089 | skb = mp->ttyskb; |
1070 | if (skb) { | 1090 | if (skb) { |
1071 | mp->ttyskb = NULL; | 1091 | mp->ttyskb = NULL; |
@@ -1076,6 +1096,7 @@ static int capinc_tty_write(struct tty_struct * tty, | |||
1076 | skb = alloc_skb(CAPI_DATA_B3_REQ_LEN+count, GFP_ATOMIC); | 1096 | skb = alloc_skb(CAPI_DATA_B3_REQ_LEN+count, GFP_ATOMIC); |
1077 | if (!skb) { | 1097 | if (!skb) { |
1078 | printk(KERN_ERR "capinc_tty_write: alloc_skb failed\n"); | 1098 | printk(KERN_ERR "capinc_tty_write: alloc_skb failed\n"); |
1099 | spin_unlock_irqrestore(&workaround_lock, flags); | ||
1079 | return -ENOMEM; | 1100 | return -ENOMEM; |
1080 | } | 1101 | } |
1081 | 1102 | ||
@@ -1086,6 +1107,7 @@ static int capinc_tty_write(struct tty_struct * tty, | |||
1086 | mp->outbytes += skb->len; | 1107 | mp->outbytes += skb->len; |
1087 | (void)handle_minor_send(mp); | 1108 | (void)handle_minor_send(mp); |
1088 | (void)handle_minor_recv(mp); | 1109 | (void)handle_minor_recv(mp); |
1110 | spin_unlock_irqrestore(&workaround_lock, flags); | ||
1089 | return count; | 1111 | return count; |
1090 | } | 1112 | } |
1091 | 1113 | ||
@@ -1093,6 +1115,7 @@ static void capinc_tty_put_char(struct tty_struct *tty, unsigned char ch) | |||
1093 | { | 1115 | { |
1094 | struct capiminor *mp = (struct capiminor *)tty->driver_data; | 1116 | struct capiminor *mp = (struct capiminor *)tty->driver_data; |
1095 | struct sk_buff *skb; | 1117 | struct sk_buff *skb; |
1118 | unsigned long flags; | ||
1096 | 1119 | ||
1097 | #ifdef _DEBUG_TTYFUNCS | 1120 | #ifdef _DEBUG_TTYFUNCS |
1098 | printk(KERN_DEBUG "capinc_put_char(%u)\n", ch); | 1121 | printk(KERN_DEBUG "capinc_put_char(%u)\n", ch); |
@@ -1105,10 +1128,12 @@ static void capinc_tty_put_char(struct tty_struct *tty, unsigned char ch) | |||
1105 | return; | 1128 | return; |
1106 | } | 1129 | } |
1107 | 1130 | ||
1131 | spin_lock_irqsave(&workaround_lock, flags); | ||
1108 | skb = mp->ttyskb; | 1132 | skb = mp->ttyskb; |
1109 | if (skb) { | 1133 | if (skb) { |
1110 | if (skb_tailroom(skb) > 0) { | 1134 | if (skb_tailroom(skb) > 0) { |
1111 | *(skb_put(skb, 1)) = ch; | 1135 | *(skb_put(skb, 1)) = ch; |
1136 | spin_unlock_irqrestore(&workaround_lock, flags); | ||
1112 | return; | 1137 | return; |
1113 | } | 1138 | } |
1114 | mp->ttyskb = NULL; | 1139 | mp->ttyskb = NULL; |
@@ -1124,12 +1149,14 @@ static void capinc_tty_put_char(struct tty_struct *tty, unsigned char ch) | |||
1124 | } else { | 1149 | } else { |
1125 | printk(KERN_ERR "capinc_put_char: char %u lost\n", ch); | 1150 | printk(KERN_ERR "capinc_put_char: char %u lost\n", ch); |
1126 | } | 1151 | } |
1152 | spin_unlock_irqrestore(&workaround_lock, flags); | ||
1127 | } | 1153 | } |
1128 | 1154 | ||
1129 | static void capinc_tty_flush_chars(struct tty_struct *tty) | 1155 | static void capinc_tty_flush_chars(struct tty_struct *tty) |
1130 | { | 1156 | { |
1131 | struct capiminor *mp = (struct capiminor *)tty->driver_data; | 1157 | struct capiminor *mp = (struct capiminor *)tty->driver_data; |
1132 | struct sk_buff *skb; | 1158 | struct sk_buff *skb; |
1159 | unsigned long flags; | ||
1133 | 1160 | ||
1134 | #ifdef _DEBUG_TTYFUNCS | 1161 | #ifdef _DEBUG_TTYFUNCS |
1135 | printk(KERN_DEBUG "capinc_tty_flush_chars\n"); | 1162 | printk(KERN_DEBUG "capinc_tty_flush_chars\n"); |
@@ -1142,6 +1169,7 @@ static void capinc_tty_flush_chars(struct tty_struct *tty) | |||
1142 | return; | 1169 | return; |
1143 | } | 1170 | } |
1144 | 1171 | ||
1172 | spin_lock_irqsave(&workaround_lock, flags); | ||
1145 | skb = mp->ttyskb; | 1173 | skb = mp->ttyskb; |
1146 | if (skb) { | 1174 | if (skb) { |
1147 | mp->ttyskb = NULL; | 1175 | mp->ttyskb = NULL; |
@@ -1150,6 +1178,7 @@ static void capinc_tty_flush_chars(struct tty_struct *tty) | |||
1150 | (void)handle_minor_send(mp); | 1178 | (void)handle_minor_send(mp); |
1151 | } | 1179 | } |
1152 | (void)handle_minor_recv(mp); | 1180 | (void)handle_minor_recv(mp); |
1181 | spin_unlock_irqrestore(&workaround_lock, flags); | ||
1153 | } | 1182 | } |
1154 | 1183 | ||
1155 | static int capinc_tty_write_room(struct tty_struct *tty) | 1184 | static int capinc_tty_write_room(struct tty_struct *tty) |
@@ -1220,12 +1249,15 @@ static void capinc_tty_throttle(struct tty_struct * tty) | |||
1220 | static void capinc_tty_unthrottle(struct tty_struct * tty) | 1249 | static void capinc_tty_unthrottle(struct tty_struct * tty) |
1221 | { | 1250 | { |
1222 | struct capiminor *mp = (struct capiminor *)tty->driver_data; | 1251 | struct capiminor *mp = (struct capiminor *)tty->driver_data; |
1252 | unsigned long flags; | ||
1223 | #ifdef _DEBUG_TTYFUNCS | 1253 | #ifdef _DEBUG_TTYFUNCS |
1224 | printk(KERN_DEBUG "capinc_tty_unthrottle\n"); | 1254 | printk(KERN_DEBUG "capinc_tty_unthrottle\n"); |
1225 | #endif | 1255 | #endif |
1226 | if (mp) { | 1256 | if (mp) { |
1257 | spin_lock_irqsave(&workaround_lock, flags); | ||
1227 | mp->ttyinstop = 0; | 1258 | mp->ttyinstop = 0; |
1228 | handle_minor_recv(mp); | 1259 | handle_minor_recv(mp); |
1260 | spin_unlock_irqrestore(&workaround_lock, flags); | ||
1229 | } | 1261 | } |
1230 | } | 1262 | } |
1231 | 1263 | ||
@@ -1243,12 +1275,15 @@ static void capinc_tty_stop(struct tty_struct *tty) | |||
1243 | static void capinc_tty_start(struct tty_struct *tty) | 1275 | static void capinc_tty_start(struct tty_struct *tty) |
1244 | { | 1276 | { |
1245 | struct capiminor *mp = (struct capiminor *)tty->driver_data; | 1277 | struct capiminor *mp = (struct capiminor *)tty->driver_data; |
1278 | unsigned long flags; | ||
1246 | #ifdef _DEBUG_TTYFUNCS | 1279 | #ifdef _DEBUG_TTYFUNCS |
1247 | printk(KERN_DEBUG "capinc_tty_start\n"); | 1280 | printk(KERN_DEBUG "capinc_tty_start\n"); |
1248 | #endif | 1281 | #endif |
1249 | if (mp) { | 1282 | if (mp) { |
1283 | spin_lock_irqsave(&workaround_lock, flags); | ||
1250 | mp->ttyoutstop = 0; | 1284 | mp->ttyoutstop = 0; |
1251 | (void)handle_minor_send(mp); | 1285 | (void)handle_minor_send(mp); |
1286 | spin_unlock_irqrestore(&workaround_lock, flags); | ||
1252 | } | 1287 | } |
1253 | } | 1288 | } |
1254 | 1289 | ||
@@ -1456,7 +1491,7 @@ static struct procfsentries { | |||
1456 | 1491 | ||
1457 | static void __init proc_init(void) | 1492 | static void __init proc_init(void) |
1458 | { | 1493 | { |
1459 | int nelem = sizeof(procfsentries)/sizeof(procfsentries[0]); | 1494 | int nelem = ARRAY_SIZE(procfsentries); |
1460 | int i; | 1495 | int i; |
1461 | 1496 | ||
1462 | for (i=0; i < nelem; i++) { | 1497 | for (i=0; i < nelem; i++) { |
@@ -1468,7 +1503,7 @@ static void __init proc_init(void) | |||
1468 | 1503 | ||
1469 | static void __exit proc_exit(void) | 1504 | static void __exit proc_exit(void) |
1470 | { | 1505 | { |
1471 | int nelem = sizeof(procfsentries)/sizeof(procfsentries[0]); | 1506 | int nelem = ARRAY_SIZE(procfsentries); |
1472 | int i; | 1507 | int i; |
1473 | 1508 | ||
1474 | for (i=nelem-1; i >= 0; i--) { | 1509 | for (i=nelem-1; i >= 0; i--) { |
diff --git a/drivers/isdn/capi/capidrv.c b/drivers/isdn/capi/capidrv.c index c4d438c17dab..8cec9c3898ec 100644 --- a/drivers/isdn/capi/capidrv.c +++ b/drivers/isdn/capi/capidrv.c | |||
@@ -2218,7 +2218,7 @@ static struct procfsentries { | |||
2218 | 2218 | ||
2219 | static void __init proc_init(void) | 2219 | static void __init proc_init(void) |
2220 | { | 2220 | { |
2221 | int nelem = sizeof(procfsentries)/sizeof(procfsentries[0]); | 2221 | int nelem = ARRAY_SIZE(procfsentries); |
2222 | int i; | 2222 | int i; |
2223 | 2223 | ||
2224 | for (i=0; i < nelem; i++) { | 2224 | for (i=0; i < nelem; i++) { |
@@ -2230,7 +2230,7 @@ static void __init proc_init(void) | |||
2230 | 2230 | ||
2231 | static void __exit proc_exit(void) | 2231 | static void __exit proc_exit(void) |
2232 | { | 2232 | { |
2233 | int nelem = sizeof(procfsentries)/sizeof(procfsentries[0]); | 2233 | int nelem = ARRAY_SIZE(procfsentries); |
2234 | int i; | 2234 | int i; |
2235 | 2235 | ||
2236 | for (i=nelem-1; i >= 0; i--) { | 2236 | for (i=nelem-1; i >= 0; i--) { |
diff --git a/drivers/isdn/capi/kcapi_proc.c b/drivers/isdn/capi/kcapi_proc.c index ca9dc00a45c4..31f4fd8b8b0a 100644 --- a/drivers/isdn/capi/kcapi_proc.c +++ b/drivers/isdn/capi/kcapi_proc.c | |||
@@ -113,14 +113,14 @@ static int seq_contrstats_open(struct inode *inode, struct file *file) | |||
113 | return seq_open(file, &seq_contrstats_ops); | 113 | return seq_open(file, &seq_contrstats_ops); |
114 | } | 114 | } |
115 | 115 | ||
116 | static struct file_operations proc_controller_ops = { | 116 | static const struct file_operations proc_controller_ops = { |
117 | .open = seq_controller_open, | 117 | .open = seq_controller_open, |
118 | .read = seq_read, | 118 | .read = seq_read, |
119 | .llseek = seq_lseek, | 119 | .llseek = seq_lseek, |
120 | .release = seq_release, | 120 | .release = seq_release, |
121 | }; | 121 | }; |
122 | 122 | ||
123 | static struct file_operations proc_contrstats_ops = { | 123 | static const struct file_operations proc_contrstats_ops = { |
124 | .open = seq_contrstats_open, | 124 | .open = seq_contrstats_open, |
125 | .read = seq_read, | 125 | .read = seq_read, |
126 | .llseek = seq_lseek, | 126 | .llseek = seq_lseek, |
@@ -218,14 +218,14 @@ seq_applstats_open(struct inode *inode, struct file *file) | |||
218 | return seq_open(file, &seq_applstats_ops); | 218 | return seq_open(file, &seq_applstats_ops); |
219 | } | 219 | } |
220 | 220 | ||
221 | static struct file_operations proc_applications_ops = { | 221 | static const struct file_operations proc_applications_ops = { |
222 | .open = seq_applications_open, | 222 | .open = seq_applications_open, |
223 | .read = seq_read, | 223 | .read = seq_read, |
224 | .llseek = seq_lseek, | 224 | .llseek = seq_lseek, |
225 | .release = seq_release, | 225 | .release = seq_release, |
226 | }; | 226 | }; |
227 | 227 | ||
228 | static struct file_operations proc_applstats_ops = { | 228 | static const struct file_operations proc_applstats_ops = { |
229 | .open = seq_applstats_open, | 229 | .open = seq_applstats_open, |
230 | .read = seq_read, | 230 | .read = seq_read, |
231 | .llseek = seq_lseek, | 231 | .llseek = seq_lseek, |
@@ -302,7 +302,7 @@ seq_capi_driver_open(struct inode *inode, struct file *file) | |||
302 | return err; | 302 | return err; |
303 | } | 303 | } |
304 | 304 | ||
305 | static struct file_operations proc_driver_ops = { | 305 | static const struct file_operations proc_driver_ops = { |
306 | .open = seq_capi_driver_open, | 306 | .open = seq_capi_driver_open, |
307 | .read = seq_read, | 307 | .read = seq_read, |
308 | .llseek = seq_lseek, | 308 | .llseek = seq_lseek, |
diff --git a/drivers/isdn/divert/divert_procfs.c b/drivers/isdn/divert/divert_procfs.c index 06967da7c4a8..53a189003355 100644 --- a/drivers/isdn/divert/divert_procfs.c +++ b/drivers/isdn/divert/divert_procfs.c | |||
@@ -256,7 +256,7 @@ isdn_divert_ioctl(struct inode *inode, struct file *file, | |||
256 | 256 | ||
257 | 257 | ||
258 | #ifdef CONFIG_PROC_FS | 258 | #ifdef CONFIG_PROC_FS |
259 | static struct file_operations isdn_fops = | 259 | static const struct file_operations isdn_fops = |
260 | { | 260 | { |
261 | .owner = THIS_MODULE, | 261 | .owner = THIS_MODULE, |
262 | .llseek = no_llseek, | 262 | .llseek = no_llseek, |
diff --git a/drivers/isdn/gigaset/Kconfig b/drivers/isdn/gigaset/Kconfig index 708d47a6484b..bcbb6502a773 100644 --- a/drivers/isdn/gigaset/Kconfig +++ b/drivers/isdn/gigaset/Kconfig | |||
@@ -7,7 +7,13 @@ config ISDN_DRV_GIGASET | |||
7 | select CRC_CCITT | 7 | select CRC_CCITT |
8 | select BITREVERSE | 8 | select BITREVERSE |
9 | help | 9 | help |
10 | Say m here if you have a Gigaset or Sinus isdn device. | 10 | This driver supports the Siemens Gigaset SX205/255 family of |
11 | ISDN DECT bases, including the predecessors Gigaset 3070/3075 | ||
12 | and 4170/4175 and their T-Com versions Sinus 45isdn and Sinus | ||
13 | 721X. | ||
14 | If you have one of these devices, say M here and for at least | ||
15 | one of the connection specific parts that follow. | ||
16 | This will build a module called "gigaset". | ||
11 | 17 | ||
12 | if ISDN_DRV_GIGASET!=n | 18 | if ISDN_DRV_GIGASET!=n |
13 | 19 | ||
@@ -15,14 +21,25 @@ config GIGASET_BASE | |||
15 | tristate "Gigaset base station support" | 21 | tristate "Gigaset base station support" |
16 | depends on ISDN_DRV_GIGASET && USB | 22 | depends on ISDN_DRV_GIGASET && USB |
17 | help | 23 | help |
18 | Say m here if you need to communicate with the base | 24 | Say M here if you want to use the USB interface of the Gigaset |
19 | directly via USB. | 25 | base for connection to your system. |
26 | This will build a module called "bas_gigaset". | ||
20 | 27 | ||
21 | config GIGASET_M105 | 28 | config GIGASET_M105 |
22 | tristate "Gigaset M105 support" | 29 | tristate "Gigaset M105 support" |
23 | depends on ISDN_DRV_GIGASET && USB | 30 | depends on ISDN_DRV_GIGASET && USB |
24 | help | 31 | help |
25 | Say m here if you need the driver for the Gigaset M105 device. | 32 | Say M here if you want to connect to the Gigaset base via DECT |
33 | using a Gigaset M105 (Sinus 45 Data 2) USB DECT device. | ||
34 | This will build a module called "usb_gigaset". | ||
35 | |||
36 | config GIGASET_M101 | ||
37 | tristate "Gigaset M101 support" | ||
38 | depends on ISDN_DRV_GIGASET | ||
39 | help | ||
40 | Say M here if you want to connect to the Gigaset base via DECT | ||
41 | using a Gigaset M101 (Sinus 45 Data 1) RS232 DECT device. | ||
42 | This will build a module called "ser_gigaset". | ||
26 | 43 | ||
27 | config GIGASET_DEBUG | 44 | config GIGASET_DEBUG |
28 | bool "Gigaset debugging" | 45 | bool "Gigaset debugging" |
diff --git a/drivers/isdn/gigaset/Makefile b/drivers/isdn/gigaset/Makefile index 9b9acf1a21ad..835b806a9de7 100644 --- a/drivers/isdn/gigaset/Makefile +++ b/drivers/isdn/gigaset/Makefile | |||
@@ -1,6 +1,8 @@ | |||
1 | gigaset-y := common.o interface.o proc.o ev-layer.o i4l.o | 1 | gigaset-y := common.o interface.o proc.o ev-layer.o i4l.o |
2 | usb_gigaset-y := usb-gigaset.o asyncdata.o | 2 | usb_gigaset-y := usb-gigaset.o asyncdata.o |
3 | bas_gigaset-y := bas-gigaset.o isocdata.o | 3 | bas_gigaset-y := bas-gigaset.o isocdata.o |
4 | ser_gigaset-y := ser-gigaset.o asyncdata.o | ||
4 | 5 | ||
5 | obj-$(CONFIG_GIGASET_M105) += usb_gigaset.o gigaset.o | 6 | obj-$(CONFIG_GIGASET_M105) += usb_gigaset.o gigaset.o |
6 | obj-$(CONFIG_GIGASET_BASE) += bas_gigaset.o gigaset.o | 7 | obj-$(CONFIG_GIGASET_BASE) += bas_gigaset.o gigaset.o |
8 | obj-$(CONFIG_GIGASET_M105) += ser_gigaset.o gigaset.o | ||
diff --git a/drivers/isdn/gigaset/asyncdata.c b/drivers/isdn/gigaset/asyncdata.c index 88e958f176d2..ddf5e92be444 100644 --- a/drivers/isdn/gigaset/asyncdata.c +++ b/drivers/isdn/gigaset/asyncdata.c | |||
@@ -13,6 +13,11 @@ | |||
13 | * ===================================================================== | 13 | * ===================================================================== |
14 | */ | 14 | */ |
15 | 15 | ||
16 | /* not set by Kbuild when building both ser_gigaset and usb_gigaset */ | ||
17 | #ifndef KBUILD_MODNAME | ||
18 | #define KBUILD_MODNAME "asy_gigaset" | ||
19 | #endif | ||
20 | |||
16 | #include "gigaset.h" | 21 | #include "gigaset.h" |
17 | #include <linux/crc-ccitt.h> | 22 | #include <linux/crc-ccitt.h> |
18 | #include <linux/bitrev.h> | 23 | #include <linux/bitrev.h> |
diff --git a/drivers/isdn/gigaset/common.c b/drivers/isdn/gigaset/common.c index 4f75cce6fdff..b460a73a7c85 100644 --- a/drivers/isdn/gigaset/common.c +++ b/drivers/isdn/gigaset/common.c | |||
@@ -640,7 +640,6 @@ struct cardstate *gigaset_initcs(struct gigaset_driver *drv, int channels, | |||
640 | return NULL; | 640 | return NULL; |
641 | } | 641 | } |
642 | mutex_init(&cs->mutex); | 642 | mutex_init(&cs->mutex); |
643 | mutex_lock(&cs->mutex); | ||
644 | 643 | ||
645 | gig_dbg(DEBUG_INIT, "allocating bcs[0..%d]", channels - 1); | 644 | gig_dbg(DEBUG_INIT, "allocating bcs[0..%d]", channels - 1); |
646 | cs->bcs = kmalloc(channels * sizeof(struct bc_state), GFP_KERNEL); | 645 | cs->bcs = kmalloc(channels * sizeof(struct bc_state), GFP_KERNEL); |
@@ -738,6 +737,7 @@ struct cardstate *gigaset_initcs(struct gigaset_driver *drv, int channels, | |||
738 | 737 | ||
739 | ++cs->cs_init; | 738 | ++cs->cs_init; |
740 | 739 | ||
740 | /* set up character device */ | ||
741 | gigaset_if_init(cs); | 741 | gigaset_if_init(cs); |
742 | 742 | ||
743 | /* set up device sysfs */ | 743 | /* set up device sysfs */ |
@@ -753,11 +753,9 @@ struct cardstate *gigaset_initcs(struct gigaset_driver *drv, int channels, | |||
753 | add_timer(&cs->timer); | 753 | add_timer(&cs->timer); |
754 | 754 | ||
755 | gig_dbg(DEBUG_INIT, "cs initialized"); | 755 | gig_dbg(DEBUG_INIT, "cs initialized"); |
756 | mutex_unlock(&cs->mutex); | ||
757 | return cs; | 756 | return cs; |
758 | 757 | ||
759 | error: | 758 | error: |
760 | mutex_unlock(&cs->mutex); | ||
761 | gig_dbg(DEBUG_INIT, "failed"); | 759 | gig_dbg(DEBUG_INIT, "failed"); |
762 | gigaset_freecs(cs); | 760 | gigaset_freecs(cs); |
763 | return NULL; | 761 | return NULL; |
@@ -908,20 +906,7 @@ void gigaset_shutdown(struct cardstate *cs) | |||
908 | gig_dbg(DEBUG_CMD, "scheduling SHUTDOWN"); | 906 | gig_dbg(DEBUG_CMD, "scheduling SHUTDOWN"); |
909 | gigaset_schedule_event(cs); | 907 | gigaset_schedule_event(cs); |
910 | 908 | ||
911 | if (wait_event_interruptible(cs->waitqueue, !cs->waiting)) { | 909 | wait_event(cs->waitqueue, !cs->waiting); |
912 | warn("%s: aborted", __func__); | ||
913 | //FIXME | ||
914 | } | ||
915 | |||
916 | if (atomic_read(&cs->mstate) != MS_LOCKED) { | ||
917 | //FIXME? | ||
918 | //gigaset_baud_rate(cs, B115200); | ||
919 | //gigaset_set_line_ctrl(cs, CS8); | ||
920 | //gigaset_set_modem_ctrl(cs, TIOCM_DTR|TIOCM_RTS, 0); | ||
921 | //cs->control_state = 0; | ||
922 | } else { | ||
923 | //FIXME use some saved values? | ||
924 | } | ||
925 | 910 | ||
926 | cleanup_cs(cs); | 911 | cleanup_cs(cs); |
927 | 912 | ||
@@ -944,10 +929,7 @@ void gigaset_stop(struct cardstate *cs) | |||
944 | gig_dbg(DEBUG_CMD, "scheduling STOP"); | 929 | gig_dbg(DEBUG_CMD, "scheduling STOP"); |
945 | gigaset_schedule_event(cs); | 930 | gigaset_schedule_event(cs); |
946 | 931 | ||
947 | if (wait_event_interruptible(cs->waitqueue, !cs->waiting)) { | 932 | wait_event(cs->waitqueue, !cs->waiting); |
948 | warn("%s: aborted", __func__); | ||
949 | //FIXME | ||
950 | } | ||
951 | 933 | ||
952 | cleanup_cs(cs); | 934 | cleanup_cs(cs); |
953 | 935 | ||
diff --git a/drivers/isdn/gigaset/ev-layer.c b/drivers/isdn/gigaset/ev-layer.c index 44f02dbd1111..4661e2c722bc 100644 --- a/drivers/isdn/gigaset/ev-layer.c +++ b/drivers/isdn/gigaset/ev-layer.c | |||
@@ -1015,7 +1015,7 @@ static void finish_shutdown(struct cardstate *cs) | |||
1015 | 1015 | ||
1016 | cs->cmd_result = -ENODEV; | 1016 | cs->cmd_result = -ENODEV; |
1017 | cs->waiting = 0; | 1017 | cs->waiting = 0; |
1018 | wake_up_interruptible(&cs->waitqueue); | 1018 | wake_up(&cs->waitqueue); |
1019 | } | 1019 | } |
1020 | 1020 | ||
1021 | static void do_shutdown(struct cardstate *cs) | 1021 | static void do_shutdown(struct cardstate *cs) |
diff --git a/drivers/isdn/gigaset/interface.c b/drivers/isdn/gigaset/interface.c index f13de20947e0..eb50f3dab5f7 100644 --- a/drivers/isdn/gigaset/interface.c +++ b/drivers/isdn/gigaset/interface.c | |||
@@ -615,6 +615,8 @@ void gigaset_if_init(struct cardstate *cs) | |||
615 | return; | 615 | return; |
616 | 616 | ||
617 | tasklet_init(&cs->if_wake_tasklet, &if_wake, (unsigned long) cs); | 617 | tasklet_init(&cs->if_wake_tasklet, &if_wake, (unsigned long) cs); |
618 | |||
619 | mutex_lock(&cs->mutex); | ||
618 | cs->tty_dev = tty_register_device(drv->tty, cs->minor_index, NULL); | 620 | cs->tty_dev = tty_register_device(drv->tty, cs->minor_index, NULL); |
619 | 621 | ||
620 | if (!IS_ERR(cs->tty_dev)) | 622 | if (!IS_ERR(cs->tty_dev)) |
@@ -623,6 +625,7 @@ void gigaset_if_init(struct cardstate *cs) | |||
623 | warn("could not register device to the tty subsystem"); | 625 | warn("could not register device to the tty subsystem"); |
624 | cs->tty_dev = NULL; | 626 | cs->tty_dev = NULL; |
625 | } | 627 | } |
628 | mutex_unlock(&cs->mutex); | ||
626 | } | 629 | } |
627 | 630 | ||
628 | void gigaset_if_free(struct cardstate *cs) | 631 | void gigaset_if_free(struct cardstate *cs) |
diff --git a/drivers/isdn/gigaset/isocdata.c b/drivers/isdn/gigaset/isocdata.c index df988eb0e36f..8c0eb522dab1 100644 --- a/drivers/isdn/gigaset/isocdata.c +++ b/drivers/isdn/gigaset/isocdata.c | |||
@@ -921,6 +921,8 @@ static void cmd_loop(unsigned char *src, int numbytes, struct inbuf_t *inbuf) | |||
921 | /* end of line */ | 921 | /* end of line */ |
922 | gig_dbg(DEBUG_TRANSCMD, "%s: End of Command (%d Bytes)", | 922 | gig_dbg(DEBUG_TRANSCMD, "%s: End of Command (%d Bytes)", |
923 | __func__, cbytes); | 923 | __func__, cbytes); |
924 | if (cbytes >= MAX_RESP_SIZE - 1) | ||
925 | dev_warn(cs->dev, "response too large\n"); | ||
924 | cs->cbytes = cbytes; | 926 | cs->cbytes = cbytes; |
925 | gigaset_handle_modem_response(cs); | 927 | gigaset_handle_modem_response(cs); |
926 | cbytes = 0; | 928 | cbytes = 0; |
@@ -929,8 +931,6 @@ static void cmd_loop(unsigned char *src, int numbytes, struct inbuf_t *inbuf) | |||
929 | /* advance in line buffer, checking for overflow */ | 931 | /* advance in line buffer, checking for overflow */ |
930 | if (cbytes < MAX_RESP_SIZE - 1) | 932 | if (cbytes < MAX_RESP_SIZE - 1) |
931 | cbytes++; | 933 | cbytes++; |
932 | else | ||
933 | dev_warn(cs->dev, "response too large\n"); | ||
934 | } | 934 | } |
935 | } | 935 | } |
936 | 936 | ||
diff --git a/drivers/isdn/gigaset/ser-gigaset.c b/drivers/isdn/gigaset/ser-gigaset.c new file mode 100644 index 000000000000..c8b7db65e48f --- /dev/null +++ b/drivers/isdn/gigaset/ser-gigaset.c | |||
@@ -0,0 +1,837 @@ | |||
1 | /* This is the serial hardware link layer (HLL) for the Gigaset 307x isdn | ||
2 | * DECT base (aka Sinus 45 isdn) using the RS232 DECT data module M101, | ||
3 | * written as a line discipline. | ||
4 | * | ||
5 | * ===================================================================== | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License as | ||
8 | * published by the Free Software Foundation; either version 2 of | ||
9 | * the License, or (at your option) any later version. | ||
10 | * ===================================================================== | ||
11 | */ | ||
12 | |||
13 | #include "gigaset.h" | ||
14 | |||
15 | #include <linux/module.h> | ||
16 | #include <linux/moduleparam.h> | ||
17 | #include <linux/platform_device.h> | ||
18 | #include <linux/tty.h> | ||
19 | #include <linux/poll.h> | ||
20 | |||
21 | /* Version Information */ | ||
22 | #define DRIVER_AUTHOR "Tilman Schmidt" | ||
23 | #define DRIVER_DESC "Serial Driver for Gigaset 307x using Siemens M101" | ||
24 | |||
25 | #define GIGASET_MINORS 1 | ||
26 | #define GIGASET_MINOR 0 | ||
27 | #define GIGASET_MODULENAME "ser_gigaset" | ||
28 | #define GIGASET_DEVNAME "ttyGS" | ||
29 | |||
30 | /* length limit according to Siemens 3070usb-protokoll.doc ch. 2.1 */ | ||
31 | #define IF_WRITEBUF 264 | ||
32 | |||
33 | MODULE_AUTHOR(DRIVER_AUTHOR); | ||
34 | MODULE_DESCRIPTION(DRIVER_DESC); | ||
35 | MODULE_LICENSE("GPL"); | ||
36 | MODULE_ALIAS_LDISC(N_GIGASET_M101); | ||
37 | |||
38 | static int startmode = SM_ISDN; | ||
39 | module_param(startmode, int, S_IRUGO); | ||
40 | MODULE_PARM_DESC(startmode, "initial operation mode"); | ||
41 | static int cidmode = 1; | ||
42 | module_param(cidmode, int, S_IRUGO); | ||
43 | MODULE_PARM_DESC(cidmode, "stay in CID mode when idle"); | ||
44 | |||
45 | static struct gigaset_driver *driver; | ||
46 | |||
47 | struct ser_cardstate { | ||
48 | struct platform_device dev; | ||
49 | struct tty_struct *tty; | ||
50 | atomic_t refcnt; | ||
51 | struct mutex dead_mutex; | ||
52 | }; | ||
53 | |||
54 | static struct platform_driver device_driver = { | ||
55 | .driver = { | ||
56 | .name = GIGASET_MODULENAME, | ||
57 | }, | ||
58 | }; | ||
59 | |||
60 | static void flush_send_queue(struct cardstate *); | ||
61 | |||
62 | /* transmit data from current open skb | ||
63 | * result: number of bytes sent or error code < 0 | ||
64 | */ | ||
65 | static int write_modem(struct cardstate *cs) | ||
66 | { | ||
67 | struct tty_struct *tty = cs->hw.ser->tty; | ||
68 | struct bc_state *bcs = &cs->bcs[0]; /* only one channel */ | ||
69 | struct sk_buff *skb = bcs->tx_skb; | ||
70 | int sent; | ||
71 | |||
72 | if (!tty || !tty->driver || !skb) | ||
73 | return -EFAULT; | ||
74 | |||
75 | if (!skb->len) { | ||
76 | dev_kfree_skb_any(skb); | ||
77 | bcs->tx_skb = NULL; | ||
78 | return -EINVAL; | ||
79 | } | ||
80 | |||
81 | set_bit(TTY_DO_WRITE_WAKEUP, &tty->flags); | ||
82 | sent = tty->driver->write(tty, skb->data, skb->len); | ||
83 | gig_dbg(DEBUG_OUTPUT, "write_modem: sent %d", sent); | ||
84 | if (sent < 0) { | ||
85 | /* error */ | ||
86 | flush_send_queue(cs); | ||
87 | return sent; | ||
88 | } | ||
89 | skb_pull(skb, sent); | ||
90 | if (!skb->len) { | ||
91 | /* skb sent completely */ | ||
92 | gigaset_skb_sent(bcs, skb); | ||
93 | |||
94 | gig_dbg(DEBUG_INTR, "kfree skb (Adr: %lx)!", | ||
95 | (unsigned long) skb); | ||
96 | dev_kfree_skb_any(skb); | ||
97 | bcs->tx_skb = NULL; | ||
98 | } | ||
99 | return sent; | ||
100 | } | ||
101 | |||
102 | /* | ||
103 | * transmit first queued command buffer | ||
104 | * result: number of bytes sent or error code < 0 | ||
105 | */ | ||
106 | static int send_cb(struct cardstate *cs) | ||
107 | { | ||
108 | struct tty_struct *tty = cs->hw.ser->tty; | ||
109 | struct cmdbuf_t *cb, *tcb; | ||
110 | unsigned long flags; | ||
111 | int sent = 0; | ||
112 | |||
113 | if (!tty || !tty->driver) | ||
114 | return -EFAULT; | ||
115 | |||
116 | cb = cs->cmdbuf; | ||
117 | if (!cb) | ||
118 | return 0; /* nothing to do */ | ||
119 | |||
120 | if (cb->len) { | ||
121 | set_bit(TTY_DO_WRITE_WAKEUP, &tty->flags); | ||
122 | sent = tty->driver->write(tty, cb->buf + cb->offset, cb->len); | ||
123 | if (sent < 0) { | ||
124 | /* error */ | ||
125 | gig_dbg(DEBUG_OUTPUT, "send_cb: write error %d", sent); | ||
126 | flush_send_queue(cs); | ||
127 | return sent; | ||
128 | } | ||
129 | cb->offset += sent; | ||
130 | cb->len -= sent; | ||
131 | gig_dbg(DEBUG_OUTPUT, "send_cb: sent %d, left %u, queued %u", | ||
132 | sent, cb->len, cs->cmdbytes); | ||
133 | } | ||
134 | |||
135 | while (cb && !cb->len) { | ||
136 | spin_lock_irqsave(&cs->cmdlock, flags); | ||
137 | cs->cmdbytes -= cs->curlen; | ||
138 | tcb = cb; | ||
139 | cs->cmdbuf = cb = cb->next; | ||
140 | if (cb) { | ||
141 | cb->prev = NULL; | ||
142 | cs->curlen = cb->len; | ||
143 | } else { | ||
144 | cs->lastcmdbuf = NULL; | ||
145 | cs->curlen = 0; | ||
146 | } | ||
147 | spin_unlock_irqrestore(&cs->cmdlock, flags); | ||
148 | |||
149 | if (tcb->wake_tasklet) | ||
150 | tasklet_schedule(tcb->wake_tasklet); | ||
151 | kfree(tcb); | ||
152 | } | ||
153 | return sent; | ||
154 | } | ||
155 | |||
156 | /* | ||
157 | * send queue tasklet | ||
158 | * If there is already a skb opened, put data to the transfer buffer | ||
159 | * by calling "write_modem". | ||
160 | * Otherwise take a new skb out of the queue. | ||
161 | */ | ||
162 | static void gigaset_modem_fill(unsigned long data) | ||
163 | { | ||
164 | struct cardstate *cs = (struct cardstate *) data; | ||
165 | struct bc_state *bcs; | ||
166 | int sent = 0; | ||
167 | |||
168 | if (!cs || !(bcs = cs->bcs)) { | ||
169 | gig_dbg(DEBUG_OUTPUT, "%s: no cardstate", __func__); | ||
170 | return; | ||
171 | } | ||
172 | if (!bcs->tx_skb) { | ||
173 | /* no skb is being sent; send command if any */ | ||
174 | sent = send_cb(cs); | ||
175 | gig_dbg(DEBUG_OUTPUT, "%s: send_cb -> %d", __func__, sent); | ||
176 | if (sent) | ||
177 | /* something sent or error */ | ||
178 | return; | ||
179 | |||
180 | /* no command to send; get skb */ | ||
181 | if (!(bcs->tx_skb = skb_dequeue(&bcs->squeue))) | ||
182 | /* no skb either, nothing to do */ | ||
183 | return; | ||
184 | |||
185 | gig_dbg(DEBUG_INTR, "Dequeued skb (Adr: %lx)", | ||
186 | (unsigned long) bcs->tx_skb); | ||
187 | } | ||
188 | |||
189 | /* send skb */ | ||
190 | gig_dbg(DEBUG_OUTPUT, "%s: tx_skb", __func__); | ||
191 | if (write_modem(cs) < 0) | ||
192 | gig_dbg(DEBUG_OUTPUT, "%s: write_modem failed", __func__); | ||
193 | } | ||
194 | |||
195 | /* | ||
196 | * throw away all data queued for sending | ||
197 | */ | ||
198 | static void flush_send_queue(struct cardstate *cs) | ||
199 | { | ||
200 | struct sk_buff *skb; | ||
201 | struct cmdbuf_t *cb; | ||
202 | unsigned long flags; | ||
203 | |||
204 | /* command queue */ | ||
205 | spin_lock_irqsave(&cs->cmdlock, flags); | ||
206 | while ((cb = cs->cmdbuf) != NULL) { | ||
207 | cs->cmdbuf = cb->next; | ||
208 | if (cb->wake_tasklet) | ||
209 | tasklet_schedule(cb->wake_tasklet); | ||
210 | kfree(cb); | ||
211 | } | ||
212 | cs->cmdbuf = cs->lastcmdbuf = NULL; | ||
213 | cs->cmdbytes = cs->curlen = 0; | ||
214 | spin_unlock_irqrestore(&cs->cmdlock, flags); | ||
215 | |||
216 | /* data queue */ | ||
217 | if (cs->bcs->tx_skb) | ||
218 | dev_kfree_skb_any(cs->bcs->tx_skb); | ||
219 | while ((skb = skb_dequeue(&cs->bcs->squeue)) != NULL) | ||
220 | dev_kfree_skb_any(skb); | ||
221 | } | ||
222 | |||
223 | |||
224 | /* Gigaset Driver Interface */ | ||
225 | /* ======================== */ | ||
226 | |||
227 | /* | ||
228 | * queue an AT command string for transmission to the Gigaset device | ||
229 | * parameters: | ||
230 | * cs controller state structure | ||
231 | * buf buffer containing the string to send | ||
232 | * len number of characters to send | ||
233 | * wake_tasklet tasklet to run when transmission is complete, or NULL | ||
234 | * return value: | ||
235 | * number of bytes queued, or error code < 0 | ||
236 | */ | ||
237 | static int gigaset_write_cmd(struct cardstate *cs, const unsigned char *buf, | ||
238 | int len, struct tasklet_struct *wake_tasklet) | ||
239 | { | ||
240 | struct cmdbuf_t *cb; | ||
241 | unsigned long flags; | ||
242 | |||
243 | gigaset_dbg_buffer(atomic_read(&cs->mstate) != MS_LOCKED ? | ||
244 | DEBUG_TRANSCMD : DEBUG_LOCKCMD, | ||
245 | "CMD Transmit", len, buf); | ||
246 | |||
247 | if (len <= 0) | ||
248 | return 0; | ||
249 | |||
250 | if (!(cb = kmalloc(sizeof(struct cmdbuf_t) + len, GFP_ATOMIC))) { | ||
251 | dev_err(cs->dev, "%s: out of memory!\n", __func__); | ||
252 | return -ENOMEM; | ||
253 | } | ||
254 | |||
255 | memcpy(cb->buf, buf, len); | ||
256 | cb->len = len; | ||
257 | cb->offset = 0; | ||
258 | cb->next = NULL; | ||
259 | cb->wake_tasklet = wake_tasklet; | ||
260 | |||
261 | spin_lock_irqsave(&cs->cmdlock, flags); | ||
262 | cb->prev = cs->lastcmdbuf; | ||
263 | if (cs->lastcmdbuf) | ||
264 | cs->lastcmdbuf->next = cb; | ||
265 | else { | ||
266 | cs->cmdbuf = cb; | ||
267 | cs->curlen = len; | ||
268 | } | ||
269 | cs->cmdbytes += len; | ||
270 | cs->lastcmdbuf = cb; | ||
271 | spin_unlock_irqrestore(&cs->cmdlock, flags); | ||
272 | |||
273 | spin_lock_irqsave(&cs->lock, flags); | ||
274 | if (cs->connected) | ||
275 | tasklet_schedule(&cs->write_tasklet); | ||
276 | spin_unlock_irqrestore(&cs->lock, flags); | ||
277 | return len; | ||
278 | } | ||
279 | |||
280 | /* | ||
281 | * tty_driver.write_room interface routine | ||
282 | * return number of characters the driver will accept to be written | ||
283 | * parameter: | ||
284 | * controller state structure | ||
285 | * return value: | ||
286 | * number of characters | ||
287 | */ | ||
288 | static int gigaset_write_room(struct cardstate *cs) | ||
289 | { | ||
290 | unsigned bytes; | ||
291 | |||
292 | bytes = cs->cmdbytes; | ||
293 | return bytes < IF_WRITEBUF ? IF_WRITEBUF - bytes : 0; | ||
294 | } | ||
295 | |||
296 | /* | ||
297 | * tty_driver.chars_in_buffer interface routine | ||
298 | * return number of characters waiting to be sent | ||
299 | * parameter: | ||
300 | * controller state structure | ||
301 | * return value: | ||
302 | * number of characters | ||
303 | */ | ||
304 | static int gigaset_chars_in_buffer(struct cardstate *cs) | ||
305 | { | ||
306 | return cs->cmdbytes; | ||
307 | } | ||
308 | |||
309 | /* | ||
310 | * implementation of ioctl(GIGASET_BRKCHARS) | ||
311 | * parameter: | ||
312 | * controller state structure | ||
313 | * return value: | ||
314 | * -EINVAL (unimplemented function) | ||
315 | */ | ||
316 | static int gigaset_brkchars(struct cardstate *cs, const unsigned char buf[6]) | ||
317 | { | ||
318 | /* not implemented */ | ||
319 | return -EINVAL; | ||
320 | } | ||
321 | |||
322 | /* | ||
323 | * Open B channel | ||
324 | * Called by "do_action" in ev-layer.c | ||
325 | */ | ||
326 | static int gigaset_init_bchannel(struct bc_state *bcs) | ||
327 | { | ||
328 | /* nothing to do for M10x */ | ||
329 | gigaset_bchannel_up(bcs); | ||
330 | return 0; | ||
331 | } | ||
332 | |||
333 | /* | ||
334 | * Close B channel | ||
335 | * Called by "do_action" in ev-layer.c | ||
336 | */ | ||
337 | static int gigaset_close_bchannel(struct bc_state *bcs) | ||
338 | { | ||
339 | /* nothing to do for M10x */ | ||
340 | gigaset_bchannel_down(bcs); | ||
341 | return 0; | ||
342 | } | ||
343 | |||
344 | /* | ||
345 | * Set up B channel structure | ||
346 | * This is called by "gigaset_initcs" in common.c | ||
347 | */ | ||
348 | static int gigaset_initbcshw(struct bc_state *bcs) | ||
349 | { | ||
350 | /* unused */ | ||
351 | bcs->hw.ser = NULL; | ||
352 | return 1; | ||
353 | } | ||
354 | |||
355 | /* | ||
356 | * Free B channel structure | ||
357 | * Called by "gigaset_freebcs" in common.c | ||
358 | */ | ||
359 | static int gigaset_freebcshw(struct bc_state *bcs) | ||
360 | { | ||
361 | /* unused */ | ||
362 | return 1; | ||
363 | } | ||
364 | |||
365 | /* | ||
366 | * Reinitialize B channel structure | ||
367 | * This is called by "bcs_reinit" in common.c | ||
368 | */ | ||
369 | static void gigaset_reinitbcshw(struct bc_state *bcs) | ||
370 | { | ||
371 | /* nothing to do for M10x */ | ||
372 | } | ||
373 | |||
374 | /* | ||
375 | * Free hardware specific device data | ||
376 | * This will be called by "gigaset_freecs" in common.c | ||
377 | */ | ||
378 | static void gigaset_freecshw(struct cardstate *cs) | ||
379 | { | ||
380 | tasklet_kill(&cs->write_tasklet); | ||
381 | if (!cs->hw.ser) | ||
382 | return; | ||
383 | dev_set_drvdata(&cs->hw.ser->dev.dev, NULL); | ||
384 | platform_device_unregister(&cs->hw.ser->dev); | ||
385 | kfree(cs->hw.ser); | ||
386 | cs->hw.ser = NULL; | ||
387 | } | ||
388 | |||
389 | static void gigaset_device_release(struct device *dev) | ||
390 | { | ||
391 | struct platform_device *pdev = | ||
392 | container_of(dev, struct platform_device, dev); | ||
393 | |||
394 | /* adapted from platform_device_release() in drivers/base/platform.c */ | ||
395 | //FIXME is this actually necessary? | ||
396 | kfree(dev->platform_data); | ||
397 | kfree(pdev->resource); | ||
398 | } | ||
399 | |||
400 | /* | ||
401 | * Set up hardware specific device data | ||
402 | * This is called by "gigaset_initcs" in common.c | ||
403 | */ | ||
404 | static int gigaset_initcshw(struct cardstate *cs) | ||
405 | { | ||
406 | int rc; | ||
407 | |||
408 | if (!(cs->hw.ser = kzalloc(sizeof(struct ser_cardstate), GFP_KERNEL))) { | ||
409 | err("%s: out of memory!", __func__); | ||
410 | return 0; | ||
411 | } | ||
412 | |||
413 | cs->hw.ser->dev.name = GIGASET_MODULENAME; | ||
414 | cs->hw.ser->dev.id = cs->minor_index; | ||
415 | cs->hw.ser->dev.dev.release = gigaset_device_release; | ||
416 | if ((rc = platform_device_register(&cs->hw.ser->dev)) != 0) { | ||
417 | err("error %d registering platform device", rc); | ||
418 | kfree(cs->hw.ser); | ||
419 | cs->hw.ser = NULL; | ||
420 | return 0; | ||
421 | } | ||
422 | dev_set_drvdata(&cs->hw.ser->dev.dev, cs); | ||
423 | |||
424 | tasklet_init(&cs->write_tasklet, | ||
425 | &gigaset_modem_fill, (unsigned long) cs); | ||
426 | return 1; | ||
427 | } | ||
428 | |||
429 | /* | ||
430 | * set modem control lines | ||
431 | * Parameters: | ||
432 | * card state structure | ||
433 | * modem control line state ([TIOCM_DTR]|[TIOCM_RTS]) | ||
434 | * Called by "gigaset_start" and "gigaset_enterconfigmode" in common.c | ||
435 | * and by "if_lock" and "if_termios" in interface.c | ||
436 | */ | ||
437 | static int gigaset_set_modem_ctrl(struct cardstate *cs, unsigned old_state, unsigned new_state) | ||
438 | { | ||
439 | struct tty_struct *tty = cs->hw.ser->tty; | ||
440 | unsigned int set, clear; | ||
441 | |||
442 | if (!tty || !tty->driver || !tty->driver->tiocmset) | ||
443 | return -EFAULT; | ||
444 | set = new_state & ~old_state; | ||
445 | clear = old_state & ~new_state; | ||
446 | if (!set && !clear) | ||
447 | return 0; | ||
448 | gig_dbg(DEBUG_IF, "tiocmset set %x clear %x", set, clear); | ||
449 | return tty->driver->tiocmset(tty, NULL, set, clear); | ||
450 | } | ||
451 | |||
452 | static int gigaset_baud_rate(struct cardstate *cs, unsigned cflag) | ||
453 | { | ||
454 | return -EINVAL; | ||
455 | } | ||
456 | |||
457 | static int gigaset_set_line_ctrl(struct cardstate *cs, unsigned cflag) | ||
458 | { | ||
459 | return -EINVAL; | ||
460 | } | ||
461 | |||
462 | static struct gigaset_ops ops = { | ||
463 | gigaset_write_cmd, | ||
464 | gigaset_write_room, | ||
465 | gigaset_chars_in_buffer, | ||
466 | gigaset_brkchars, | ||
467 | gigaset_init_bchannel, | ||
468 | gigaset_close_bchannel, | ||
469 | gigaset_initbcshw, | ||
470 | gigaset_freebcshw, | ||
471 | gigaset_reinitbcshw, | ||
472 | gigaset_initcshw, | ||
473 | gigaset_freecshw, | ||
474 | gigaset_set_modem_ctrl, | ||
475 | gigaset_baud_rate, | ||
476 | gigaset_set_line_ctrl, | ||
477 | gigaset_m10x_send_skb, /* asyncdata.c */ | ||
478 | gigaset_m10x_input, /* asyncdata.c */ | ||
479 | }; | ||
480 | |||
481 | |||
482 | /* Line Discipline Interface */ | ||
483 | /* ========================= */ | ||
484 | |||
485 | /* helper functions for cardstate refcounting */ | ||
486 | static struct cardstate *cs_get(struct tty_struct *tty) | ||
487 | { | ||
488 | struct cardstate *cs = tty->disc_data; | ||
489 | |||
490 | if (!cs || !cs->hw.ser) { | ||
491 | gig_dbg(DEBUG_ANY, "%s: no cardstate", __func__); | ||
492 | return NULL; | ||
493 | } | ||
494 | atomic_inc(&cs->hw.ser->refcnt); | ||
495 | return cs; | ||
496 | } | ||
497 | |||
498 | static void cs_put(struct cardstate *cs) | ||
499 | { | ||
500 | if (atomic_dec_and_test(&cs->hw.ser->refcnt)) | ||
501 | mutex_unlock(&cs->hw.ser->dead_mutex); | ||
502 | } | ||
503 | |||
504 | /* | ||
505 | * Called by the tty driver when the line discipline is pushed onto the tty. | ||
506 | * Called in process context. | ||
507 | */ | ||
508 | static int | ||
509 | gigaset_tty_open(struct tty_struct *tty) | ||
510 | { | ||
511 | struct cardstate *cs; | ||
512 | |||
513 | gig_dbg(DEBUG_INIT, "Starting HLL for Gigaset M101"); | ||
514 | |||
515 | info(DRIVER_AUTHOR); | ||
516 | info(DRIVER_DESC); | ||
517 | |||
518 | if (!driver) { | ||
519 | err("%s: no driver structure", __func__); | ||
520 | return -ENODEV; | ||
521 | } | ||
522 | |||
523 | /* allocate memory for our device state and intialize it */ | ||
524 | if (!(cs = gigaset_initcs(driver, 1, 1, 0, cidmode, | ||
525 | GIGASET_MODULENAME))) | ||
526 | goto error; | ||
527 | |||
528 | cs->dev = &cs->hw.ser->dev.dev; | ||
529 | cs->hw.ser->tty = tty; | ||
530 | mutex_init(&cs->hw.ser->dead_mutex); | ||
531 | atomic_set(&cs->hw.ser->refcnt, 1); | ||
532 | |||
533 | tty->disc_data = cs; | ||
534 | |||
535 | /* OK.. Initialization of the datastructures and the HW is done.. Now | ||
536 | * startup system and notify the LL that we are ready to run | ||
537 | */ | ||
538 | if (startmode == SM_LOCKED) | ||
539 | atomic_set(&cs->mstate, MS_LOCKED); | ||
540 | if (!gigaset_start(cs)) { | ||
541 | tasklet_kill(&cs->write_tasklet); | ||
542 | goto error; | ||
543 | } | ||
544 | |||
545 | gig_dbg(DEBUG_INIT, "Startup of HLL done"); | ||
546 | mutex_lock(&cs->hw.ser->dead_mutex); | ||
547 | return 0; | ||
548 | |||
549 | error: | ||
550 | gig_dbg(DEBUG_INIT, "Startup of HLL failed"); | ||
551 | tty->disc_data = NULL; | ||
552 | gigaset_freecs(cs); | ||
553 | return -ENODEV; | ||
554 | } | ||
555 | |||
556 | /* | ||
557 | * Called by the tty driver when the line discipline is removed. | ||
558 | * Called from process context. | ||
559 | */ | ||
560 | static void | ||
561 | gigaset_tty_close(struct tty_struct *tty) | ||
562 | { | ||
563 | struct cardstate *cs = tty->disc_data; | ||
564 | |||
565 | gig_dbg(DEBUG_INIT, "Stopping HLL for Gigaset M101"); | ||
566 | |||
567 | if (!cs) { | ||
568 | gig_dbg(DEBUG_INIT, "%s: no cardstate", __func__); | ||
569 | return; | ||
570 | } | ||
571 | |||
572 | /* prevent other callers from entering ldisc methods */ | ||
573 | tty->disc_data = NULL; | ||
574 | |||
575 | if (!cs->hw.ser) | ||
576 | err("%s: no hw cardstate", __func__); | ||
577 | else { | ||
578 | /* wait for running methods to finish */ | ||
579 | if (!atomic_dec_and_test(&cs->hw.ser->refcnt)) | ||
580 | mutex_lock(&cs->hw.ser->dead_mutex); | ||
581 | } | ||
582 | |||
583 | /* stop operations */ | ||
584 | gigaset_stop(cs); | ||
585 | tasklet_kill(&cs->write_tasklet); | ||
586 | flush_send_queue(cs); | ||
587 | cs->dev = NULL; | ||
588 | gigaset_freecs(cs); | ||
589 | |||
590 | gig_dbg(DEBUG_INIT, "Shutdown of HLL done"); | ||
591 | } | ||
592 | |||
593 | /* | ||
594 | * Called by the tty driver when the tty line is hung up. | ||
595 | * Wait for I/O to driver to complete and unregister ISDN device. | ||
596 | * This is already done by the close routine, so just call that. | ||
597 | * Called from process context. | ||
598 | */ | ||
599 | static int gigaset_tty_hangup(struct tty_struct *tty) | ||
600 | { | ||
601 | gigaset_tty_close(tty); | ||
602 | return 0; | ||
603 | } | ||
604 | |||
605 | /* | ||
606 | * Read on the tty. | ||
607 | * Unused, received data goes only to the Gigaset driver. | ||
608 | */ | ||
609 | static ssize_t | ||
610 | gigaset_tty_read(struct tty_struct *tty, struct file *file, | ||
611 | unsigned char __user *buf, size_t count) | ||
612 | { | ||
613 | return -EAGAIN; | ||
614 | } | ||
615 | |||
616 | /* | ||
617 | * Write on the tty. | ||
618 | * Unused, transmit data comes only from the Gigaset driver. | ||
619 | */ | ||
620 | static ssize_t | ||
621 | gigaset_tty_write(struct tty_struct *tty, struct file *file, | ||
622 | const unsigned char *buf, size_t count) | ||
623 | { | ||
624 | return -EAGAIN; | ||
625 | } | ||
626 | |||
627 | /* | ||
628 | * Ioctl on the tty. | ||
629 | * Called in process context only. | ||
630 | * May be re-entered by multiple ioctl calling threads. | ||
631 | */ | ||
632 | static int | ||
633 | gigaset_tty_ioctl(struct tty_struct *tty, struct file *file, | ||
634 | unsigned int cmd, unsigned long arg) | ||
635 | { | ||
636 | struct cardstate *cs = cs_get(tty); | ||
637 | int rc, val; | ||
638 | int __user *p = (int __user *)arg; | ||
639 | |||
640 | if (!cs) | ||
641 | return -ENXIO; | ||
642 | |||
643 | switch (cmd) { | ||
644 | case TCGETS: | ||
645 | case TCGETA: | ||
646 | /* pass through to underlying serial device */ | ||
647 | rc = n_tty_ioctl(tty, file, cmd, arg); | ||
648 | break; | ||
649 | |||
650 | case TCFLSH: | ||
651 | /* flush our buffers and the serial port's buffer */ | ||
652 | switch (arg) { | ||
653 | case TCIFLUSH: | ||
654 | /* no own input buffer to flush */ | ||
655 | break; | ||
656 | case TCIOFLUSH: | ||
657 | case TCOFLUSH: | ||
658 | flush_send_queue(cs); | ||
659 | break; | ||
660 | } | ||
661 | /* flush the serial port's buffer */ | ||
662 | rc = n_tty_ioctl(tty, file, cmd, arg); | ||
663 | break; | ||
664 | |||
665 | case FIONREAD: | ||
666 | /* unused, always return zero */ | ||
667 | val = 0; | ||
668 | rc = put_user(val, p); | ||
669 | break; | ||
670 | |||
671 | default: | ||
672 | rc = -ENOIOCTLCMD; | ||
673 | } | ||
674 | |||
675 | cs_put(cs); | ||
676 | return rc; | ||
677 | } | ||
678 | |||
679 | /* | ||
680 | * Poll on the tty. | ||
681 | * Unused, always return zero. | ||
682 | */ | ||
683 | static unsigned int | ||
684 | gigaset_tty_poll(struct tty_struct *tty, struct file *file, poll_table *wait) | ||
685 | { | ||
686 | return 0; | ||
687 | } | ||
688 | |||
689 | /* | ||
690 | * Called by the tty driver when a block of data has been received. | ||
691 | * Will not be re-entered while running but other ldisc functions | ||
692 | * may be called in parallel. | ||
693 | * Can be called from hard interrupt level as well as soft interrupt | ||
694 | * level or mainline. | ||
695 | * Parameters: | ||
696 | * tty tty structure | ||
697 | * buf buffer containing received characters | ||
698 | * cflags buffer containing error flags for received characters (ignored) | ||
699 | * count number of received characters | ||
700 | */ | ||
701 | static void | ||
702 | gigaset_tty_receive(struct tty_struct *tty, const unsigned char *buf, | ||
703 | char *cflags, int count) | ||
704 | { | ||
705 | struct cardstate *cs = cs_get(tty); | ||
706 | unsigned tail, head, n; | ||
707 | struct inbuf_t *inbuf; | ||
708 | |||
709 | if (!cs) | ||
710 | return; | ||
711 | if (!(inbuf = cs->inbuf)) { | ||
712 | dev_err(cs->dev, "%s: no inbuf\n", __func__); | ||
713 | cs_put(cs); | ||
714 | return; | ||
715 | } | ||
716 | |||
717 | tail = atomic_read(&inbuf->tail); | ||
718 | head = atomic_read(&inbuf->head); | ||
719 | gig_dbg(DEBUG_INTR, "buffer state: %u -> %u, receive %u bytes", | ||
720 | head, tail, count); | ||
721 | |||
722 | if (head <= tail) { | ||
723 | /* possible buffer wraparound */ | ||
724 | n = min_t(unsigned, count, RBUFSIZE - tail); | ||
725 | memcpy(inbuf->data + tail, buf, n); | ||
726 | tail = (tail + n) % RBUFSIZE; | ||
727 | buf += n; | ||
728 | count -= n; | ||
729 | } | ||
730 | |||
731 | if (count > 0) { | ||
732 | /* tail < head and some data left */ | ||
733 | n = head - tail - 1; | ||
734 | if (count > n) { | ||
735 | dev_err(cs->dev, | ||
736 | "inbuf overflow, discarding %d bytes\n", | ||
737 | count - n); | ||
738 | count = n; | ||
739 | } | ||
740 | memcpy(inbuf->data + tail, buf, count); | ||
741 | tail += count; | ||
742 | } | ||
743 | |||
744 | gig_dbg(DEBUG_INTR, "setting tail to %u", tail); | ||
745 | atomic_set(&inbuf->tail, tail); | ||
746 | |||
747 | /* Everything was received .. Push data into handler */ | ||
748 | gig_dbg(DEBUG_INTR, "%s-->BH", __func__); | ||
749 | gigaset_schedule_event(cs); | ||
750 | cs_put(cs); | ||
751 | } | ||
752 | |||
753 | /* | ||
754 | * Called by the tty driver when there's room for more data to send. | ||
755 | */ | ||
756 | static void | ||
757 | gigaset_tty_wakeup(struct tty_struct *tty) | ||
758 | { | ||
759 | struct cardstate *cs = cs_get(tty); | ||
760 | |||
761 | clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags); | ||
762 | if (!cs) | ||
763 | return; | ||
764 | tasklet_schedule(&cs->write_tasklet); | ||
765 | cs_put(cs); | ||
766 | } | ||
767 | |||
768 | static struct tty_ldisc gigaset_ldisc = { | ||
769 | .owner = THIS_MODULE, | ||
770 | .magic = TTY_LDISC_MAGIC, | ||
771 | .name = "ser_gigaset", | ||
772 | .open = gigaset_tty_open, | ||
773 | .close = gigaset_tty_close, | ||
774 | .hangup = gigaset_tty_hangup, | ||
775 | .read = gigaset_tty_read, | ||
776 | .write = gigaset_tty_write, | ||
777 | .ioctl = gigaset_tty_ioctl, | ||
778 | .poll = gigaset_tty_poll, | ||
779 | .receive_buf = gigaset_tty_receive, | ||
780 | .write_wakeup = gigaset_tty_wakeup, | ||
781 | }; | ||
782 | |||
783 | |||
784 | /* Initialization / Shutdown */ | ||
785 | /* ========================= */ | ||
786 | |||
787 | static int __init ser_gigaset_init(void) | ||
788 | { | ||
789 | int rc; | ||
790 | |||
791 | gig_dbg(DEBUG_INIT, "%s", __func__); | ||
792 | if ((rc = platform_driver_register(&device_driver)) != 0) { | ||
793 | err("error %d registering platform driver", rc); | ||
794 | return rc; | ||
795 | } | ||
796 | |||
797 | /* allocate memory for our driver state and intialize it */ | ||
798 | if (!(driver = gigaset_initdriver(GIGASET_MINOR, GIGASET_MINORS, | ||
799 | GIGASET_MODULENAME, GIGASET_DEVNAME, | ||
800 | &ops, THIS_MODULE))) | ||
801 | goto error; | ||
802 | |||
803 | if ((rc = tty_register_ldisc(N_GIGASET_M101, &gigaset_ldisc)) != 0) { | ||
804 | err("error %d registering line discipline", rc); | ||
805 | goto error; | ||
806 | } | ||
807 | |||
808 | return 0; | ||
809 | |||
810 | error: | ||
811 | if (driver) { | ||
812 | gigaset_freedriver(driver); | ||
813 | driver = NULL; | ||
814 | } | ||
815 | platform_driver_unregister(&device_driver); | ||
816 | return rc; | ||
817 | } | ||
818 | |||
819 | static void __exit ser_gigaset_exit(void) | ||
820 | { | ||
821 | int rc; | ||
822 | |||
823 | gig_dbg(DEBUG_INIT, "%s", __func__); | ||
824 | |||
825 | if (driver) { | ||
826 | gigaset_freedriver(driver); | ||
827 | driver = NULL; | ||
828 | } | ||
829 | |||
830 | if ((rc = tty_unregister_ldisc(N_GIGASET_M101)) != 0) | ||
831 | err("error %d unregistering line discipline", rc); | ||
832 | |||
833 | platform_driver_unregister(&device_driver); | ||
834 | } | ||
835 | |||
836 | module_init(ser_gigaset_init); | ||
837 | module_exit(ser_gigaset_exit); | ||
diff --git a/drivers/isdn/hardware/avm/b1dma.c b/drivers/isdn/hardware/avm/b1dma.c index ddd47cdfdb1f..1e2d38e3d68c 100644 --- a/drivers/isdn/hardware/avm/b1dma.c +++ b/drivers/isdn/hardware/avm/b1dma.c | |||
@@ -29,7 +29,7 @@ | |||
29 | 29 | ||
30 | static char *revision = "$Revision: 1.1.2.3 $"; | 30 | static char *revision = "$Revision: 1.1.2.3 $"; |
31 | 31 | ||
32 | #undef CONFIG_B1DMA_DEBUG | 32 | #undef AVM_B1DMA_DEBUG |
33 | 33 | ||
34 | /* ------------------------------------------------------------- */ | 34 | /* ------------------------------------------------------------- */ |
35 | 35 | ||
@@ -391,16 +391,16 @@ static void b1dma_dispatch_tx(avmcard *card) | |||
391 | _put_slice(&p, skb->data, len); | 391 | _put_slice(&p, skb->data, len); |
392 | } | 392 | } |
393 | txlen = (u8 *)p - (u8 *)dma->sendbuf.dmabuf; | 393 | txlen = (u8 *)p - (u8 *)dma->sendbuf.dmabuf; |
394 | #ifdef CONFIG_B1DMA_DEBUG | 394 | #ifdef AVM_B1DMA_DEBUG |
395 | printk(KERN_DEBUG "tx: put msg len=%d\n", txlen); | 395 | printk(KERN_DEBUG "tx: put msg len=%d\n", txlen); |
396 | #endif | 396 | #endif |
397 | } else { | 397 | } else { |
398 | txlen = skb->len-2; | 398 | txlen = skb->len-2; |
399 | #ifdef CONFIG_B1DMA_POLLDEBUG | 399 | #ifdef AVM_B1DMA_POLLDEBUG |
400 | if (skb->data[2] == SEND_POLLACK) | 400 | if (skb->data[2] == SEND_POLLACK) |
401 | printk(KERN_INFO "%s: send ack\n", card->name); | 401 | printk(KERN_INFO "%s: send ack\n", card->name); |
402 | #endif | 402 | #endif |
403 | #ifdef CONFIG_B1DMA_DEBUG | 403 | #ifdef AVM_B1DMA_DEBUG |
404 | printk(KERN_DEBUG "tx: put 0x%x len=%d\n", | 404 | printk(KERN_DEBUG "tx: put 0x%x len=%d\n", |
405 | skb->data[2], txlen); | 405 | skb->data[2], txlen); |
406 | #endif | 406 | #endif |
@@ -450,7 +450,7 @@ static void b1dma_handle_rx(avmcard *card) | |||
450 | u32 ApplId, MsgLen, DataB3Len, NCCI, WindowSize; | 450 | u32 ApplId, MsgLen, DataB3Len, NCCI, WindowSize; |
451 | u8 b1cmd = _get_byte(&p); | 451 | u8 b1cmd = _get_byte(&p); |
452 | 452 | ||
453 | #ifdef CONFIG_B1DMA_DEBUG | 453 | #ifdef AVM_B1DMA_DEBUG |
454 | printk(KERN_DEBUG "rx: 0x%x %lu\n", b1cmd, (unsigned long)dma->recvlen); | 454 | printk(KERN_DEBUG "rx: 0x%x %lu\n", b1cmd, (unsigned long)dma->recvlen); |
455 | #endif | 455 | #endif |
456 | 456 | ||
@@ -515,7 +515,7 @@ static void b1dma_handle_rx(avmcard *card) | |||
515 | break; | 515 | break; |
516 | 516 | ||
517 | case RECEIVE_START: | 517 | case RECEIVE_START: |
518 | #ifdef CONFIG_B1DMA_POLLDEBUG | 518 | #ifdef AVM_B1DMA_POLLDEBUG |
519 | printk(KERN_INFO "%s: receive poll\n", card->name); | 519 | printk(KERN_INFO "%s: receive poll\n", card->name); |
520 | #endif | 520 | #endif |
521 | if (!suppress_pollack) | 521 | if (!suppress_pollack) |
@@ -601,7 +601,7 @@ static void b1dma_handle_interrupt(avmcard *card) | |||
601 | rxlen = (dma->recvlen + 3) & ~3; | 601 | rxlen = (dma->recvlen + 3) & ~3; |
602 | b1dma_writel(card, dma->recvbuf.dmaaddr+4, AMCC_RXPTR); | 602 | b1dma_writel(card, dma->recvbuf.dmaaddr+4, AMCC_RXPTR); |
603 | b1dma_writel(card, rxlen, AMCC_RXLEN); | 603 | b1dma_writel(card, rxlen, AMCC_RXLEN); |
604 | #ifdef CONFIG_B1DMA_DEBUG | 604 | #ifdef AVM_B1DMA_DEBUG |
605 | } else { | 605 | } else { |
606 | printk(KERN_ERR "%s: rx not complete (%d).\n", | 606 | printk(KERN_ERR "%s: rx not complete (%d).\n", |
607 | card->name, rxlen); | 607 | card->name, rxlen); |
diff --git a/drivers/isdn/hardware/avm/c4.c b/drivers/isdn/hardware/avm/c4.c index 2a3eb38f0ebb..6f5efa8d78cb 100644 --- a/drivers/isdn/hardware/avm/c4.c +++ b/drivers/isdn/hardware/avm/c4.c | |||
@@ -28,8 +28,8 @@ | |||
28 | #include <linux/isdn/capilli.h> | 28 | #include <linux/isdn/capilli.h> |
29 | #include "avmcard.h" | 29 | #include "avmcard.h" |
30 | 30 | ||
31 | #undef CONFIG_C4_DEBUG | 31 | #undef AVM_C4_DEBUG |
32 | #undef CONFIG_C4_POLLDEBUG | 32 | #undef AVM_C4_POLLDEBUG |
33 | 33 | ||
34 | /* ------------------------------------------------------------- */ | 34 | /* ------------------------------------------------------------- */ |
35 | 35 | ||
@@ -420,7 +420,7 @@ static void c4_dispatch_tx(avmcard *card) | |||
420 | 420 | ||
421 | skb = skb_dequeue(&dma->send_queue); | 421 | skb = skb_dequeue(&dma->send_queue); |
422 | if (!skb) { | 422 | if (!skb) { |
423 | #ifdef CONFIG_C4_DEBUG | 423 | #ifdef AVM_C4_DEBUG |
424 | printk(KERN_DEBUG "%s: tx underrun\n", card->name); | 424 | printk(KERN_DEBUG "%s: tx underrun\n", card->name); |
425 | #endif | 425 | #endif |
426 | return; | 426 | return; |
@@ -444,16 +444,16 @@ static void c4_dispatch_tx(avmcard *card) | |||
444 | _put_slice(&p, skb->data, len); | 444 | _put_slice(&p, skb->data, len); |
445 | } | 445 | } |
446 | txlen = (u8 *)p - (u8 *)dma->sendbuf.dmabuf; | 446 | txlen = (u8 *)p - (u8 *)dma->sendbuf.dmabuf; |
447 | #ifdef CONFIG_C4_DEBUG | 447 | #ifdef AVM_C4_DEBUG |
448 | printk(KERN_DEBUG "%s: tx put msg len=%d\n", card->name, txlen); | 448 | printk(KERN_DEBUG "%s: tx put msg len=%d\n", card->name, txlen); |
449 | #endif | 449 | #endif |
450 | } else { | 450 | } else { |
451 | txlen = skb->len-2; | 451 | txlen = skb->len-2; |
452 | #ifdef CONFIG_C4_POLLDEBUG | 452 | #ifdef AVM_C4_POLLDEBUG |
453 | if (skb->data[2] == SEND_POLLACK) | 453 | if (skb->data[2] == SEND_POLLACK) |
454 | printk(KERN_INFO "%s: ack to c4\n", card->name); | 454 | printk(KERN_INFO "%s: ack to c4\n", card->name); |
455 | #endif | 455 | #endif |
456 | #ifdef CONFIG_C4_DEBUG | 456 | #ifdef AVM_C4_DEBUG |
457 | printk(KERN_DEBUG "%s: tx put 0x%x len=%d\n", | 457 | printk(KERN_DEBUG "%s: tx put 0x%x len=%d\n", |
458 | card->name, skb->data[2], txlen); | 458 | card->name, skb->data[2], txlen); |
459 | #endif | 459 | #endif |
@@ -508,7 +508,7 @@ static void c4_handle_rx(avmcard *card) | |||
508 | u32 cidx; | 508 | u32 cidx; |
509 | 509 | ||
510 | 510 | ||
511 | #ifdef CONFIG_C4_DEBUG | 511 | #ifdef AVM_C4_DEBUG |
512 | printk(KERN_DEBUG "%s: rx 0x%x len=%lu\n", card->name, | 512 | printk(KERN_DEBUG "%s: rx 0x%x len=%lu\n", card->name, |
513 | b1cmd, (unsigned long)dma->recvlen); | 513 | b1cmd, (unsigned long)dma->recvlen); |
514 | #endif | 514 | #endif |
@@ -586,7 +586,7 @@ static void c4_handle_rx(avmcard *card) | |||
586 | break; | 586 | break; |
587 | 587 | ||
588 | case RECEIVE_START: | 588 | case RECEIVE_START: |
589 | #ifdef CONFIG_C4_POLLDEBUG | 589 | #ifdef AVM_C4_POLLDEBUG |
590 | printk(KERN_INFO "%s: poll from c4\n", card->name); | 590 | printk(KERN_INFO "%s: poll from c4\n", card->name); |
591 | #endif | 591 | #endif |
592 | if (!suppress_pollack) | 592 | if (!suppress_pollack) |
diff --git a/drivers/isdn/hardware/eicon/capifunc.c b/drivers/isdn/hardware/eicon/capifunc.c index 0afd7633556d..ff284aeb8fbb 100644 --- a/drivers/isdn/hardware/eicon/capifunc.c +++ b/drivers/isdn/hardware/eicon/capifunc.c | |||
@@ -187,7 +187,7 @@ static diva_card *find_card_by_ctrl(word controller) | |||
187 | */ | 187 | */ |
188 | void *TransmitBufferSet(APPL * appl, dword ref) | 188 | void *TransmitBufferSet(APPL * appl, dword ref) |
189 | { | 189 | { |
190 | appl->xbuffer_used[ref] = TRUE; | 190 | appl->xbuffer_used[ref] = true; |
191 | DBG_PRV1(("%d:xbuf_used(%d)", appl->Id, ref + 1)) | 191 | DBG_PRV1(("%d:xbuf_used(%d)", appl->Id, ref + 1)) |
192 | return (void *) ref; | 192 | return (void *) ref; |
193 | } | 193 | } |
@@ -202,7 +202,7 @@ void *TransmitBufferGet(APPL * appl, void *p) | |||
202 | 202 | ||
203 | void TransmitBufferFree(APPL * appl, void *p) | 203 | void TransmitBufferFree(APPL * appl, void *p) |
204 | { | 204 | { |
205 | appl->xbuffer_used[(dword) p] = FALSE; | 205 | appl->xbuffer_used[(dword) p] = false; |
206 | DBG_PRV1(("%d:xbuf_free(%d)", appl->Id, ((dword) p) + 1)) | 206 | DBG_PRV1(("%d:xbuf_free(%d)", appl->Id, ((dword) p) + 1)) |
207 | } | 207 | } |
208 | 208 | ||
diff --git a/drivers/isdn/hardware/eicon/debug.c b/drivers/isdn/hardware/eicon/debug.c index d835e74ecf18..0db9cc661e28 100644 --- a/drivers/isdn/hardware/eicon/debug.c +++ b/drivers/isdn/hardware/eicon/debug.c | |||
@@ -287,7 +287,7 @@ void* diva_maint_finit (void) { | |||
287 | } | 287 | } |
288 | external_dbg_queue = 0; | 288 | external_dbg_queue = 0; |
289 | 289 | ||
290 | for (i = 1; i < (sizeof(clients)/sizeof(clients[0])); i++) { | 290 | for (i = 1; i < ARRAY_SIZE(clients); i++) { |
291 | if (clients[i].pmem) { | 291 | if (clients[i].pmem) { |
292 | diva_os_free (0, clients[i].pmem); | 292 | diva_os_free (0, clients[i].pmem); |
293 | } | 293 | } |
@@ -391,7 +391,7 @@ static void DI_register (void *arg) { | |||
391 | 391 | ||
392 | diva_os_enter_spin_lock (&dbg_q_lock, &old_irql, "register"); | 392 | diva_os_enter_spin_lock (&dbg_q_lock, &old_irql, "register"); |
393 | 393 | ||
394 | for (id = 1; id < (sizeof(clients)/sizeof(clients[0])); id++) { | 394 | for (id = 1; id < ARRAY_SIZE(clients); id++) { |
395 | if (clients[id].hDbg == hDbg) { | 395 | if (clients[id].hDbg == hDbg) { |
396 | /* | 396 | /* |
397 | driver already registered | 397 | driver already registered |
@@ -494,7 +494,7 @@ static void DI_deregister (pDbgHandle hDbg) { | |||
494 | diva_os_enter_spin_lock (&dbg_adapter_lock, &old_irql1, "read"); | 494 | diva_os_enter_spin_lock (&dbg_adapter_lock, &old_irql1, "read"); |
495 | diva_os_enter_spin_lock (&dbg_q_lock, &old_irql, "read"); | 495 | diva_os_enter_spin_lock (&dbg_q_lock, &old_irql, "read"); |
496 | 496 | ||
497 | for (i = 1; i < (sizeof(clients)/sizeof(clients[0])); i++) { | 497 | for (i = 1; i < ARRAY_SIZE(clients); i++) { |
498 | if (clients[i].hDbg == hDbg) { | 498 | if (clients[i].hDbg == hDbg) { |
499 | diva_dbg_entry_head_t* pmsg; | 499 | diva_dbg_entry_head_t* pmsg; |
500 | char tmp[256]; | 500 | char tmp[256]; |
@@ -736,7 +736,7 @@ int diva_get_driver_info (dword id, byte* data, int data_length) { | |||
736 | int to_copy; | 736 | int to_copy; |
737 | 737 | ||
738 | if (!data || !id || (data_length < 17) || | 738 | if (!data || !id || (data_length < 17) || |
739 | (id >= (sizeof(clients)/sizeof(clients[0])))) { | 739 | (id >= ARRAY_SIZE(clients))) { |
740 | return (-1); | 740 | return (-1); |
741 | } | 741 | } |
742 | 742 | ||
@@ -786,7 +786,7 @@ int diva_get_driver_dbg_mask (dword id, byte* data) { | |||
786 | diva_os_spin_lock_magic_t old_irql; | 786 | diva_os_spin_lock_magic_t old_irql; |
787 | int ret = -1; | 787 | int ret = -1; |
788 | 788 | ||
789 | if (!data || !id || (id >= (sizeof(clients)/sizeof(clients[0])))) { | 789 | if (!data || !id || (id >= ARRAY_SIZE(clients))) { |
790 | return (-1); | 790 | return (-1); |
791 | } | 791 | } |
792 | diva_os_enter_spin_lock (&dbg_q_lock, &old_irql, "driver info"); | 792 | diva_os_enter_spin_lock (&dbg_q_lock, &old_irql, "driver info"); |
@@ -809,7 +809,7 @@ int diva_set_driver_dbg_mask (dword id, dword mask) { | |||
809 | int ret = -1; | 809 | int ret = -1; |
810 | 810 | ||
811 | 811 | ||
812 | if (!id || (id >= (sizeof(clients)/sizeof(clients[0])))) { | 812 | if (!id || (id >= ARRAY_SIZE(clients))) { |
813 | return (-1); | 813 | return (-1); |
814 | } | 814 | } |
815 | 815 | ||
@@ -887,7 +887,7 @@ void diva_mnt_add_xdi_adapter (const DESCRIPTOR* d) { | |||
887 | diva_os_enter_spin_lock (&dbg_adapter_lock, &old_irql1, "register"); | 887 | diva_os_enter_spin_lock (&dbg_adapter_lock, &old_irql1, "register"); |
888 | diva_os_enter_spin_lock (&dbg_q_lock, &old_irql, "register"); | 888 | diva_os_enter_spin_lock (&dbg_q_lock, &old_irql, "register"); |
889 | 889 | ||
890 | for (id = 1; id < (sizeof(clients)/sizeof(clients[0])); id++) { | 890 | for (id = 1; id < ARRAY_SIZE(clients); id++) { |
891 | if (clients[id].hDbg && (clients[id].request == d->request)) { | 891 | if (clients[id].hDbg && (clients[id].request == d->request)) { |
892 | diva_os_leave_spin_lock (&dbg_q_lock, &old_irql, "register"); | 892 | diva_os_leave_spin_lock (&dbg_q_lock, &old_irql, "register"); |
893 | diva_os_leave_spin_lock (&dbg_adapter_lock, &old_irql1, "register"); | 893 | diva_os_leave_spin_lock (&dbg_adapter_lock, &old_irql1, "register"); |
@@ -1037,7 +1037,7 @@ void diva_mnt_remove_xdi_adapter (const DESCRIPTOR* d) { | |||
1037 | diva_os_enter_spin_lock (&dbg_adapter_lock, &old_irql1, "read"); | 1037 | diva_os_enter_spin_lock (&dbg_adapter_lock, &old_irql1, "read"); |
1038 | diva_os_enter_spin_lock (&dbg_q_lock, &old_irql, "read"); | 1038 | diva_os_enter_spin_lock (&dbg_q_lock, &old_irql, "read"); |
1039 | 1039 | ||
1040 | for (i = 1; i < (sizeof(clients)/sizeof(clients[0])); i++) { | 1040 | for (i = 1; i < ARRAY_SIZE(clients); i++) { |
1041 | if (clients[i].hDbg && (clients[i].request == d->request)) { | 1041 | if (clients[i].hDbg && (clients[i].request == d->request)) { |
1042 | diva_dbg_entry_head_t* pmsg; | 1042 | diva_dbg_entry_head_t* pmsg; |
1043 | char tmp[256]; | 1043 | char tmp[256]; |
@@ -1115,7 +1115,7 @@ void diva_mnt_remove_xdi_adapter (const DESCRIPTOR* d) { | |||
1115 | void* SuperTraceOpenAdapter (int AdapterNumber) { | 1115 | void* SuperTraceOpenAdapter (int AdapterNumber) { |
1116 | int i; | 1116 | int i; |
1117 | 1117 | ||
1118 | for (i = 1; i < (sizeof(clients)/sizeof(clients[0])); i++) { | 1118 | for (i = 1; i < ARRAY_SIZE(clients); i++) { |
1119 | if (clients[i].hDbg && clients[i].request && (clients[i].logical == AdapterNumber)) { | 1119 | if (clients[i].hDbg && clients[i].request && (clients[i].logical == AdapterNumber)) { |
1120 | return (&clients[i]); | 1120 | return (&clients[i]); |
1121 | } | 1121 | } |
@@ -1508,7 +1508,7 @@ static void diva_maint_state_change_notify (void* user_context, | |||
1508 | int ch = TraceFilterChannel; | 1508 | int ch = TraceFilterChannel; |
1509 | int id = TraceFilterIdent; | 1509 | int id = TraceFilterIdent; |
1510 | 1510 | ||
1511 | if ((id >= 0) && (ch >= 0) && (id < sizeof(clients)/sizeof(clients[0])) && | 1511 | if ((id >= 0) && (ch >= 0) && (id < ARRAY_SIZE(clients)) && |
1512 | (clients[id].Dbg.id == (byte)id) && (clients[id].pIdiLib == hLib)) { | 1512 | (clients[id].Dbg.id == (byte)id) && (clients[id].pIdiLib == hLib)) { |
1513 | if (ch != (int)modem->ChannelNumber) { | 1513 | if (ch != (int)modem->ChannelNumber) { |
1514 | break; | 1514 | break; |
@@ -1555,7 +1555,7 @@ static void diva_maint_state_change_notify (void* user_context, | |||
1555 | int ch = TraceFilterChannel; | 1555 | int ch = TraceFilterChannel; |
1556 | int id = TraceFilterIdent; | 1556 | int id = TraceFilterIdent; |
1557 | 1557 | ||
1558 | if ((id >= 0) && (ch >= 0) && (id < sizeof(clients)/sizeof(clients[0])) && | 1558 | if ((id >= 0) && (ch >= 0) && (id < ARRAY_SIZE(clients)) && |
1559 | (clients[id].Dbg.id == (byte)id) && (clients[id].pIdiLib == hLib)) { | 1559 | (clients[id].Dbg.id == (byte)id) && (clients[id].pIdiLib == hLib)) { |
1560 | if (ch != (int)fax->ChannelNumber) { | 1560 | if (ch != (int)fax->ChannelNumber) { |
1561 | break; | 1561 | break; |
@@ -1803,7 +1803,7 @@ static void diva_maint_trace_notify (void* user_context, | |||
1803 | /* | 1803 | /* |
1804 | Selective trace | 1804 | Selective trace |
1805 | */ | 1805 | */ |
1806 | if ((id >= 0) && (ch >= 0) && (id < sizeof(clients)/sizeof(clients[0])) && | 1806 | if ((id >= 0) && (ch >= 0) && (id < ARRAY_SIZE(clients)) && |
1807 | (clients[id].Dbg.id == (byte)id) && (clients[id].pIdiLib == hLib)) { | 1807 | (clients[id].Dbg.id == (byte)id) && (clients[id].pIdiLib == hLib)) { |
1808 | const char* p = NULL; | 1808 | const char* p = NULL; |
1809 | int ch_value = -1; | 1809 | int ch_value = -1; |
@@ -1925,7 +1925,7 @@ int diva_mnt_shutdown_xdi_adapters (void) { | |||
1925 | byte * pmem; | 1925 | byte * pmem; |
1926 | 1926 | ||
1927 | 1927 | ||
1928 | for (i = 1; i < (sizeof(clients)/sizeof(clients[0])); i++) { | 1928 | for (i = 1; i < ARRAY_SIZE(clients); i++) { |
1929 | pmem = NULL; | 1929 | pmem = NULL; |
1930 | 1930 | ||
1931 | diva_os_enter_spin_lock (&dbg_adapter_lock, &old_irql1, "unload"); | 1931 | diva_os_enter_spin_lock (&dbg_adapter_lock, &old_irql1, "unload"); |
@@ -2006,7 +2006,7 @@ int diva_set_trace_filter (int filter_length, const char* filter) { | |||
2006 | 2006 | ||
2007 | on = (TraceFilter[0] == 0); | 2007 | on = (TraceFilter[0] == 0); |
2008 | 2008 | ||
2009 | for (i = 1; i < (sizeof(clients)/sizeof(clients[0])); i++) { | 2009 | for (i = 1; i < ARRAY_SIZE(clients); i++) { |
2010 | if (clients[i].hDbg && clients[i].pIdiLib && clients[i].request) { | 2010 | if (clients[i].hDbg && clients[i].pIdiLib && clients[i].request) { |
2011 | client_b_on = on && ((clients[i].hDbg->dbgMask & DIVA_MGT_DBG_IFC_BCHANNEL) != 0); | 2011 | client_b_on = on && ((clients[i].hDbg->dbgMask & DIVA_MGT_DBG_IFC_BCHANNEL) != 0); |
2012 | client_atap_on = on && ((clients[i].hDbg->dbgMask & DIVA_MGT_DBG_IFC_AUDIO) != 0); | 2012 | client_atap_on = on && ((clients[i].hDbg->dbgMask & DIVA_MGT_DBG_IFC_AUDIO) != 0); |
@@ -2017,7 +2017,7 @@ int diva_set_trace_filter (int filter_length, const char* filter) { | |||
2017 | } | 2017 | } |
2018 | } | 2018 | } |
2019 | 2019 | ||
2020 | for (i = 1; i < (sizeof(clients)/sizeof(clients[0])); i++) { | 2020 | for (i = 1; i < ARRAY_SIZE(clients); i++) { |
2021 | if (clients[i].hDbg && clients[i].pIdiLib && clients[i].request && clients[i].request_pending) { | 2021 | if (clients[i].hDbg && clients[i].pIdiLib && clients[i].request && clients[i].request_pending) { |
2022 | diva_os_leave_spin_lock (&dbg_q_lock, &old_irql, "write_filter"); | 2022 | diva_os_leave_spin_lock (&dbg_q_lock, &old_irql, "write_filter"); |
2023 | clients[i].request_pending = 0; | 2023 | clients[i].request_pending = 0; |
diff --git a/drivers/isdn/hardware/eicon/di.c b/drivers/isdn/hardware/eicon/di.c index e1df8d98c311..ce8df3878908 100644 --- a/drivers/isdn/hardware/eicon/di.c +++ b/drivers/isdn/hardware/eicon/di.c | |||
@@ -173,16 +173,16 @@ void pr_out(ADAPTER * a) | |||
173 | xdi_xlog_request (XDI_A_NR(a), this->Id, this->ReqCh, this->MInd, | 173 | xdi_xlog_request (XDI_A_NR(a), this->Id, this->ReqCh, this->MInd, |
174 | a->IdTypeTable[this->No]); | 174 | a->IdTypeTable[this->No]); |
175 | a->ram_out(a, &ReqOut->Req, this->MInd); | 175 | a->ram_out(a, &ReqOut->Req, this->MInd); |
176 | more = TRUE; | 176 | more = true; |
177 | } | 177 | } |
178 | else { | 178 | else { |
179 | xdi_xlog_request (XDI_A_NR(a), this->Id, this->ReqCh, this->Req, | 179 | xdi_xlog_request (XDI_A_NR(a), this->Id, this->ReqCh, this->Req, |
180 | a->IdTypeTable[this->No]); | 180 | a->IdTypeTable[this->No]); |
181 | this->More |=XMOREF; | 181 | this->More |=XMOREF; |
182 | a->ram_out(a, &ReqOut->Req, this->Req); | 182 | a->ram_out(a, &ReqOut->Req, this->Req); |
183 | more = FALSE; | 183 | more = false; |
184 | if (a->FlowControlIdTable[this->ReqCh] == this->Id) | 184 | if (a->FlowControlIdTable[this->ReqCh] == this->Id) |
185 | a->FlowControlSkipTable[this->ReqCh] = TRUE; | 185 | a->FlowControlSkipTable[this->ReqCh] = true; |
186 | /* | 186 | /* |
187 | Note that remove request was sent to the card | 187 | Note that remove request was sent to the card |
188 | */ | 188 | */ |
@@ -311,7 +311,7 @@ byte pr_dpc(ADAPTER * a) | |||
311 | /* are marked RNR */ | 311 | /* are marked RNR */ |
312 | if(RNRId && RNRId==a->ram_in(a, &IndIn->IndId)) { | 312 | if(RNRId && RNRId==a->ram_in(a, &IndIn->IndId)) { |
313 | a->ram_out(a, &IndIn->Ind, 0); | 313 | a->ram_out(a, &IndIn->Ind, 0); |
314 | a->ram_out(a, &IndIn->RNR, TRUE); | 314 | a->ram_out(a, &IndIn->RNR, true); |
315 | } | 315 | } |
316 | else { | 316 | else { |
317 | Ind = a->ram_in(a, &IndIn->Ind); | 317 | Ind = a->ram_in(a, &IndIn->Ind); |
@@ -331,7 +331,7 @@ byte pr_dpc(ADAPTER * a) | |||
331 | dtrc(dprintf("RNR")); | 331 | dtrc(dprintf("RNR")); |
332 | a->ram_out(a, &IndIn->Ind, 0); | 332 | a->ram_out(a, &IndIn->Ind, 0); |
333 | RNRId = a->ram_in(a, &IndIn->IndId); | 333 | RNRId = a->ram_in(a, &IndIn->IndId); |
334 | a->ram_out(a, &IndIn->RNR, TRUE); | 334 | a->ram_out(a, &IndIn->RNR, true); |
335 | } | 335 | } |
336 | } | 336 | } |
337 | } | 337 | } |
@@ -340,7 +340,7 @@ byte pr_dpc(ADAPTER * a) | |||
340 | } | 340 | } |
341 | a->ram_out(a, &PR_RAM->IndOutput, 0); | 341 | a->ram_out(a, &PR_RAM->IndOutput, 0); |
342 | } | 342 | } |
343 | return FALSE; | 343 | return false; |
344 | } | 344 | } |
345 | byte scom_test_int(ADAPTER * a) | 345 | byte scom_test_int(ADAPTER * a) |
346 | { | 346 | { |
@@ -399,7 +399,7 @@ byte isdn_rc(ADAPTER * a, | |||
399 | return (0); | 399 | return (0); |
400 | } | 400 | } |
401 | if (extended_info_type == DIVA_RC_TYPE_REMOVE_COMPLETE) | 401 | if (extended_info_type == DIVA_RC_TYPE_REMOVE_COMPLETE) |
402 | a->RcExtensionSupported = TRUE; | 402 | a->RcExtensionSupported = true; |
403 | } | 403 | } |
404 | a->misc_flags_table[e_no] &= ~DIVA_MISC_FLAGS_REMOVE_PENDING; | 404 | a->misc_flags_table[e_no] &= ~DIVA_MISC_FLAGS_REMOVE_PENDING; |
405 | a->misc_flags_table[e_no] &= ~DIVA_MISC_FLAGS_NO_RC_CANCELLING; | 405 | a->misc_flags_table[e_no] &= ~DIVA_MISC_FLAGS_NO_RC_CANCELLING; |
@@ -428,7 +428,7 @@ byte isdn_rc(ADAPTER * a, | |||
428 | } | 428 | } |
429 | if (Rc==OK_FC) { | 429 | if (Rc==OK_FC) { |
430 | a->FlowControlIdTable[Ch] = Id; | 430 | a->FlowControlIdTable[Ch] = Id; |
431 | a->FlowControlSkipTable[Ch] = FALSE; | 431 | a->FlowControlSkipTable[Ch] = false; |
432 | this->Rc = Rc; | 432 | this->Rc = Rc; |
433 | this->More &= ~(XBUSY | XMOREC); | 433 | this->More &= ~(XBUSY | XMOREC); |
434 | this->complete=0xff; | 434 | this->complete=0xff; |
diff --git a/drivers/isdn/hardware/eicon/divamnt.c b/drivers/isdn/hardware/eicon/divamnt.c index 77155d9f399b..6b2940ed0776 100644 --- a/drivers/isdn/hardware/eicon/divamnt.c +++ b/drivers/isdn/hardware/eicon/divamnt.c | |||
@@ -164,7 +164,7 @@ static ssize_t divas_maint_read(struct file *file, char __user *buf, | |||
164 | return (maint_read_write(buf, (int) count)); | 164 | return (maint_read_write(buf, (int) count)); |
165 | } | 165 | } |
166 | 166 | ||
167 | static struct file_operations divas_maint_fops = { | 167 | static const struct file_operations divas_maint_fops = { |
168 | .owner = THIS_MODULE, | 168 | .owner = THIS_MODULE, |
169 | .llseek = no_llseek, | 169 | .llseek = no_llseek, |
170 | .read = divas_maint_read, | 170 | .read = divas_maint_read, |
diff --git a/drivers/isdn/hardware/eicon/divasi.c b/drivers/isdn/hardware/eicon/divasi.c index fff0d89c806b..556b19615bc7 100644 --- a/drivers/isdn/hardware/eicon/divasi.c +++ b/drivers/isdn/hardware/eicon/divasi.c | |||
@@ -131,7 +131,7 @@ static void remove_um_idi_proc(void) | |||
131 | } | 131 | } |
132 | } | 132 | } |
133 | 133 | ||
134 | static struct file_operations divas_idi_fops = { | 134 | static const struct file_operations divas_idi_fops = { |
135 | .owner = THIS_MODULE, | 135 | .owner = THIS_MODULE, |
136 | .llseek = no_llseek, | 136 | .llseek = no_llseek, |
137 | .read = um_idi_read, | 137 | .read = um_idi_read, |
diff --git a/drivers/isdn/hardware/eicon/divasmain.c b/drivers/isdn/hardware/eicon/divasmain.c index 91fc92c01afe..b365e44072c0 100644 --- a/drivers/isdn/hardware/eicon/divasmain.c +++ b/drivers/isdn/hardware/eicon/divasmain.c | |||
@@ -663,7 +663,7 @@ static unsigned int divas_poll(struct file *file, poll_table * wait) | |||
663 | return (POLLIN | POLLRDNORM); | 663 | return (POLLIN | POLLRDNORM); |
664 | } | 664 | } |
665 | 665 | ||
666 | static struct file_operations divas_fops = { | 666 | static const struct file_operations divas_fops = { |
667 | .owner = THIS_MODULE, | 667 | .owner = THIS_MODULE, |
668 | .llseek = no_llseek, | 668 | .llseek = no_llseek, |
669 | .read = divas_read, | 669 | .read = divas_read, |
diff --git a/drivers/isdn/hardware/eicon/divasproc.c b/drivers/isdn/hardware/eicon/divasproc.c index 6a4373a4f1e8..0632a2606998 100644 --- a/drivers/isdn/hardware/eicon/divasproc.c +++ b/drivers/isdn/hardware/eicon/divasproc.c | |||
@@ -113,7 +113,7 @@ static int divas_close(struct inode *inode, struct file *file) | |||
113 | return (0); | 113 | return (0); |
114 | } | 114 | } |
115 | 115 | ||
116 | static struct file_operations divas_fops = { | 116 | static const struct file_operations divas_fops = { |
117 | .owner = THIS_MODULE, | 117 | .owner = THIS_MODULE, |
118 | .llseek = no_llseek, | 118 | .llseek = no_llseek, |
119 | .read = divas_read, | 119 | .read = divas_read, |
diff --git a/drivers/isdn/hardware/eicon/message.c b/drivers/isdn/hardware/eicon/message.c index f9b00f19afd2..784232a144c8 100644 --- a/drivers/isdn/hardware/eicon/message.c +++ b/drivers/isdn/hardware/eicon/message.c | |||
@@ -253,7 +253,7 @@ extern APPL * application; | |||
253 | 253 | ||
254 | 254 | ||
255 | 255 | ||
256 | static byte remove_started = FALSE; | 256 | static byte remove_started = false; |
257 | static PLCI dummy_plci; | 257 | static PLCI dummy_plci; |
258 | 258 | ||
259 | 259 | ||
@@ -456,12 +456,12 @@ word api_put(APPL * appl, CAPI_MSG * msg) | |||
456 | 456 | ||
457 | return _QUEUE_FULL; | 457 | return _QUEUE_FULL; |
458 | } | 458 | } |
459 | c = FALSE; | 459 | c = false; |
460 | if ((((byte *) msg) < ((byte *)(plci->msg_in_queue))) | 460 | if ((((byte *) msg) < ((byte *)(plci->msg_in_queue))) |
461 | || (((byte *) msg) >= ((byte *)(plci->msg_in_queue)) + sizeof(plci->msg_in_queue))) | 461 | || (((byte *) msg) >= ((byte *)(plci->msg_in_queue)) + sizeof(plci->msg_in_queue))) |
462 | { | 462 | { |
463 | if (plci->msg_in_write_pos != plci->msg_in_read_pos) | 463 | if (plci->msg_in_write_pos != plci->msg_in_read_pos) |
464 | c = TRUE; | 464 | c = true; |
465 | } | 465 | } |
466 | if (msg->header.command == _DATA_B3_R) | 466 | if (msg->header.command == _DATA_B3_R) |
467 | { | 467 | { |
@@ -506,13 +506,13 @@ word api_put(APPL * appl, CAPI_MSG * msg) | |||
506 | 506 | ||
507 | return _QUEUE_FULL; | 507 | return _QUEUE_FULL; |
508 | } | 508 | } |
509 | c = TRUE; | 509 | c = true; |
510 | } | 510 | } |
511 | } | 511 | } |
512 | else | 512 | else |
513 | { | 513 | { |
514 | if (plci->req_in || plci->internal_command) | 514 | if (plci->req_in || plci->internal_command) |
515 | c = TRUE; | 515 | c = true; |
516 | else | 516 | else |
517 | { | 517 | { |
518 | plci->command = msg->header.command; | 518 | plci->command = msg->header.command; |
@@ -626,10 +626,10 @@ word api_parse(byte * msg, word length, byte * format, API_PARSE * parms) | |||
626 | break; | 626 | break; |
627 | } | 627 | } |
628 | 628 | ||
629 | if(p>length) return TRUE; | 629 | if(p>length) return true; |
630 | } | 630 | } |
631 | if(parms) parms[i].info = NULL; | 631 | if(parms) parms[i].info = NULL; |
632 | return FALSE; | 632 | return false; |
633 | } | 633 | } |
634 | 634 | ||
635 | void api_save_msg(API_PARSE *in, byte *format, API_SAVE *out) | 635 | void api_save_msg(API_PARSE *in, byte *format, API_SAVE *out) |
@@ -687,7 +687,7 @@ word api_remove_start(void) | |||
687 | word j; | 687 | word j; |
688 | 688 | ||
689 | if(!remove_started) { | 689 | if(!remove_started) { |
690 | remove_started = TRUE; | 690 | remove_started = true; |
691 | for(i=0;i<max_adapter;i++) { | 691 | for(i=0;i<max_adapter;i++) { |
692 | if(adapter[i].request) { | 692 | if(adapter[i].request) { |
693 | for(j=0;j<adapter[i].max_plci;j++) { | 693 | for(j=0;j<adapter[i].max_plci;j++) { |
@@ -1080,7 +1080,7 @@ static void plci_remove(PLCI * plci) | |||
1080 | send_req(plci); | 1080 | send_req(plci); |
1081 | } | 1081 | } |
1082 | } | 1082 | } |
1083 | ncci_remove (plci, 0, FALSE); | 1083 | ncci_remove (plci, 0, false); |
1084 | plci_free_msg_in_queue (plci); | 1084 | plci_free_msg_in_queue (plci); |
1085 | 1085 | ||
1086 | plci->channels = 0; | 1086 | plci->channels = 0; |
@@ -1226,7 +1226,7 @@ byte connect_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
1226 | Id = ((word)1<<8)|a->Id; | 1226 | Id = ((word)1<<8)|a->Id; |
1227 | sendf(appl,_CONNECT_R|CONFIRM,Id,Number,"w",0); | 1227 | sendf(appl,_CONNECT_R|CONFIRM,Id,Number,"w",0); |
1228 | sendf(appl, _DISCONNECT_I, Id, 0, "w", _L1_ERROR); | 1228 | sendf(appl, _DISCONNECT_I, Id, 0, "w", _L1_ERROR); |
1229 | return FALSE; | 1229 | return false; |
1230 | } | 1230 | } |
1231 | Info = _OUT_OF_PLCI; | 1231 | Info = _OUT_OF_PLCI; |
1232 | if((i=get_plci(a))) | 1232 | if((i=get_plci(a))) |
@@ -1330,7 +1330,7 @@ byte connect_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
1330 | plci->command = _CONNECT_R; | 1330 | plci->command = _CONNECT_R; |
1331 | plci->number = Number; | 1331 | plci->number = Number; |
1332 | /* x.31 or D-ch free SAPI in LinkLayer? */ | 1332 | /* x.31 or D-ch free SAPI in LinkLayer? */ |
1333 | if(ch==1 && LinkLayer!=3 && LinkLayer!=12) noCh = TRUE; | 1333 | if(ch==1 && LinkLayer!=3 && LinkLayer!=12) noCh = true; |
1334 | if((ch==0 || ch==2 || noCh || ch==3 || ch==4) && !Info) | 1334 | if((ch==0 || ch==2 || noCh || ch==3 || ch==4) && !Info) |
1335 | { | 1335 | { |
1336 | /* B-channel used for B3 connections (ch==0), or no B channel */ | 1336 | /* B-channel used for B3 connections (ch==0), or no B channel */ |
@@ -1381,7 +1381,7 @@ byte connect_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
1381 | plci->command = 0; | 1381 | plci->command = 0; |
1382 | dbug(1,dprintf("Spoof")); | 1382 | dbug(1,dprintf("Spoof")); |
1383 | send_req(plci); | 1383 | send_req(plci); |
1384 | return FALSE; | 1384 | return false; |
1385 | } | 1385 | } |
1386 | if(ch==4)add_p(plci,CHI,p_chi); | 1386 | if(ch==4)add_p(plci,CHI,p_chi); |
1387 | add_s(plci,CPN,&parms[1]); | 1387 | add_s(plci,CPN,&parms[1]); |
@@ -1395,11 +1395,11 @@ byte connect_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
1395 | plci->appl = appl; | 1395 | plci->appl = appl; |
1396 | sig_req(plci,LISTEN_REQ,0); | 1396 | sig_req(plci,LISTEN_REQ,0); |
1397 | send_req(plci); | 1397 | send_req(plci); |
1398 | return FALSE; | 1398 | return false; |
1399 | } | 1399 | } |
1400 | } | 1400 | } |
1401 | send_req(plci); | 1401 | send_req(plci); |
1402 | return FALSE; | 1402 | return false; |
1403 | } | 1403 | } |
1404 | plci->Id = 0; | 1404 | plci->Id = 0; |
1405 | } | 1405 | } |
@@ -1571,7 +1571,7 @@ byte connect_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
1571 | byte connect_a_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * msg) | 1571 | byte connect_a_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * msg) |
1572 | { | 1572 | { |
1573 | dbug(1,dprintf("connect_a_res")); | 1573 | dbug(1,dprintf("connect_a_res")); |
1574 | return FALSE; | 1574 | return false; |
1575 | } | 1575 | } |
1576 | 1576 | ||
1577 | byte disconnect_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * msg) | 1577 | byte disconnect_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * msg) |
@@ -1624,9 +1624,9 @@ byte disconnect_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plc | |||
1624 | } | 1624 | } |
1625 | } | 1625 | } |
1626 | 1626 | ||
1627 | if(!appl) return FALSE; | 1627 | if(!appl) return false; |
1628 | sendf(appl, _DISCONNECT_R|CONFIRM, Id, Number, "w",Info); | 1628 | sendf(appl, _DISCONNECT_R|CONFIRM, Id, Number, "w",Info); |
1629 | return FALSE; | 1629 | return false; |
1630 | } | 1630 | } |
1631 | 1631 | ||
1632 | byte disconnect_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * msg) | 1632 | byte disconnect_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * msg) |
@@ -1702,7 +1702,7 @@ byte listen_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, A | |||
1702 | "w",Info); | 1702 | "w",Info); |
1703 | 1703 | ||
1704 | if (a) listen_check(a); | 1704 | if (a) listen_check(a); |
1705 | return FALSE; | 1705 | return false; |
1706 | } | 1706 | } |
1707 | 1707 | ||
1708 | byte info_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * msg) | 1708 | byte info_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * msg) |
@@ -1739,7 +1739,7 @@ byte info_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APP | |||
1739 | add_s(plci,KEY,&ai_parms[1]); | 1739 | add_s(plci,KEY,&ai_parms[1]); |
1740 | sig_req(plci,INFO_REQ,0); | 1740 | sig_req(plci,INFO_REQ,0); |
1741 | send_req(plci); | 1741 | send_req(plci); |
1742 | return FALSE; | 1742 | return false; |
1743 | } | 1743 | } |
1744 | 1744 | ||
1745 | if(plci->State && ai_parms[2].length) | 1745 | if(plci->State && ai_parms[2].length) |
@@ -1769,7 +1769,7 @@ byte info_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APP | |||
1769 | if((i=get_plci(a))) | 1769 | if((i=get_plci(a))) |
1770 | { | 1770 | { |
1771 | rc_plci = &a->plci[i-1]; | 1771 | rc_plci = &a->plci[i-1]; |
1772 | appl->NullCREnable = TRUE; | 1772 | appl->NullCREnable = true; |
1773 | rc_plci->internal_command = C_NCR_FAC_REQ; | 1773 | rc_plci->internal_command = C_NCR_FAC_REQ; |
1774 | rc_plci->appl = appl; | 1774 | rc_plci->appl = appl; |
1775 | add_p(rc_plci,CAI,"\x01\x80"); | 1775 | add_p(rc_plci,CAI,"\x01\x80"); |
@@ -1788,7 +1788,7 @@ byte info_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APP | |||
1788 | add_ai(rc_plci, &msg[1]); | 1788 | add_ai(rc_plci, &msg[1]); |
1789 | sig_req(rc_plci,NCR_FACILITY,0); | 1789 | sig_req(rc_plci,NCR_FACILITY,0); |
1790 | send_req(rc_plci); | 1790 | send_req(rc_plci); |
1791 | return FALSE; | 1791 | return false; |
1792 | /* for application controlled supplementary services */ | 1792 | /* for application controlled supplementary services */ |
1793 | } | 1793 | } |
1794 | } | 1794 | } |
@@ -1811,13 +1811,13 @@ byte info_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APP | |||
1811 | Number, | 1811 | Number, |
1812 | "w",Info); | 1812 | "w",Info); |
1813 | } | 1813 | } |
1814 | return FALSE; | 1814 | return false; |
1815 | } | 1815 | } |
1816 | 1816 | ||
1817 | byte info_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * msg) | 1817 | byte info_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * msg) |
1818 | { | 1818 | { |
1819 | dbug(1,dprintf("info_res")); | 1819 | dbug(1,dprintf("info_res")); |
1820 | return FALSE; | 1820 | return false; |
1821 | } | 1821 | } |
1822 | 1822 | ||
1823 | byte alert_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * msg) | 1823 | byte alert_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * msg) |
@@ -1828,7 +1828,7 @@ byte alert_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, AP | |||
1828 | dbug(1,dprintf("alert_req")); | 1828 | dbug(1,dprintf("alert_req")); |
1829 | 1829 | ||
1830 | Info = _WRONG_IDENTIFIER; | 1830 | Info = _WRONG_IDENTIFIER; |
1831 | ret = FALSE; | 1831 | ret = false; |
1832 | if(plci) { | 1832 | if(plci) { |
1833 | Info = _ALERT_IGNORED; | 1833 | Info = _ALERT_IGNORED; |
1834 | if(plci->State!=INC_CON_ALERT) { | 1834 | if(plci->State!=INC_CON_ALERT) { |
@@ -1922,7 +1922,7 @@ byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
1922 | rplci->appl = appl; | 1922 | rplci->appl = appl; |
1923 | sig_req(rplci,S_SUPPORTED,0); | 1923 | sig_req(rplci,S_SUPPORTED,0); |
1924 | send_req(rplci); | 1924 | send_req(rplci); |
1925 | return FALSE; | 1925 | return false; |
1926 | break; | 1926 | break; |
1927 | 1927 | ||
1928 | case S_LISTEN: | 1928 | case S_LISTEN: |
@@ -1972,7 +1972,7 @@ byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
1972 | add_s(plci,CAI,&ss_parms[1]); | 1972 | add_s(plci,CAI,&ss_parms[1]); |
1973 | sig_req(plci,CALL_HOLD,0); | 1973 | sig_req(plci,CALL_HOLD,0); |
1974 | send_req(plci); | 1974 | send_req(plci); |
1975 | return FALSE; | 1975 | return false; |
1976 | } | 1976 | } |
1977 | else Info = 0x3010; /* wrong state */ | 1977 | else Info = 0x3010; /* wrong state */ |
1978 | break; | 1978 | break; |
@@ -1997,13 +1997,13 @@ byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
1997 | plci->internal_command = BLOCK_PLCI; | 1997 | plci->internal_command = BLOCK_PLCI; |
1998 | plci->command = 0; | 1998 | plci->command = 0; |
1999 | dbug(1,dprintf("Spoof")); | 1999 | dbug(1,dprintf("Spoof")); |
2000 | return FALSE; | 2000 | return false; |
2001 | } | 2001 | } |
2002 | else | 2002 | else |
2003 | { | 2003 | { |
2004 | sig_req(plci,CALL_RETRIEVE,0); | 2004 | sig_req(plci,CALL_RETRIEVE,0); |
2005 | send_req(plci); | 2005 | send_req(plci); |
2006 | return FALSE; | 2006 | return false; |
2007 | } | 2007 | } |
2008 | } | 2008 | } |
2009 | else Info = 0x3010; /* wrong state */ | 2009 | else Info = 0x3010; /* wrong state */ |
@@ -2123,7 +2123,7 @@ byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
2123 | add_p(plci,CAI,cai); | 2123 | add_p(plci,CAI,cai); |
2124 | sig_req(plci,S_SERVICE,0); | 2124 | sig_req(plci,S_SERVICE,0); |
2125 | send_req(plci); | 2125 | send_req(plci); |
2126 | return FALSE; | 2126 | return false; |
2127 | } | 2127 | } |
2128 | else Info = 0x3010; /* wrong state */ | 2128 | else Info = 0x3010; /* wrong state */ |
2129 | break; | 2129 | break; |
@@ -2265,7 +2265,7 @@ byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
2265 | add_p(rplci,CAI,cai); | 2265 | add_p(rplci,CAI,cai); |
2266 | sig_req(rplci,S_SERVICE,0); | 2266 | sig_req(rplci,S_SERVICE,0); |
2267 | send_req(rplci); | 2267 | send_req(rplci); |
2268 | return FALSE; | 2268 | return false; |
2269 | } | 2269 | } |
2270 | else | 2270 | else |
2271 | { | 2271 | { |
@@ -2291,14 +2291,14 @@ byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
2291 | ss_parms[3].info[3] = (byte)GET_WORD(&(ss_parms[2].info[0])); | 2291 | ss_parms[3].info[3] = (byte)GET_WORD(&(ss_parms[2].info[0])); |
2292 | plci->command = 0; | 2292 | plci->command = 0; |
2293 | plci->internal_command = CD_REQ_PEND; | 2293 | plci->internal_command = CD_REQ_PEND; |
2294 | appl->CDEnable = TRUE; | 2294 | appl->CDEnable = true; |
2295 | cai[0] = 1; | 2295 | cai[0] = 1; |
2296 | cai[1] = CALL_DEFLECTION; | 2296 | cai[1] = CALL_DEFLECTION; |
2297 | add_p(plci,CAI,cai); | 2297 | add_p(plci,CAI,cai); |
2298 | add_p(plci,CPN,ss_parms[3].info); | 2298 | add_p(plci,CPN,ss_parms[3].info); |
2299 | sig_req(plci,S_SERVICE,0); | 2299 | sig_req(plci,S_SERVICE,0); |
2300 | send_req(plci); | 2300 | send_req(plci); |
2301 | return FALSE; | 2301 | return false; |
2302 | break; | 2302 | break; |
2303 | 2303 | ||
2304 | case S_CALL_FORWARDING_START: | 2304 | case S_CALL_FORWARDING_START: |
@@ -2337,7 +2337,7 @@ byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
2337 | add_p(rplci,CPN,ss_parms[6].info); | 2337 | add_p(rplci,CPN,ss_parms[6].info); |
2338 | sig_req(rplci,S_SERVICE,0); | 2338 | sig_req(rplci,S_SERVICE,0); |
2339 | send_req(rplci); | 2339 | send_req(rplci); |
2340 | return FALSE; | 2340 | return false; |
2341 | break; | 2341 | break; |
2342 | 2342 | ||
2343 | case S_INTERROGATE_DIVERSION: | 2343 | case S_INTERROGATE_DIVERSION: |
@@ -2456,7 +2456,7 @@ byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
2456 | 2456 | ||
2457 | sig_req(rplci,S_SERVICE,0); | 2457 | sig_req(rplci,S_SERVICE,0); |
2458 | send_req(rplci); | 2458 | send_req(rplci); |
2459 | return FALSE; | 2459 | return false; |
2460 | break; | 2460 | break; |
2461 | 2461 | ||
2462 | case S_MWI_ACTIVATE: | 2462 | case S_MWI_ACTIVATE: |
@@ -2472,7 +2472,7 @@ byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
2472 | { | 2472 | { |
2473 | rplci = &a->plci[i-1]; | 2473 | rplci = &a->plci[i-1]; |
2474 | rplci->appl = appl; | 2474 | rplci->appl = appl; |
2475 | rplci->cr_enquiry=TRUE; | 2475 | rplci->cr_enquiry=true; |
2476 | add_p(rplci,CAI,"\x01\x80"); | 2476 | add_p(rplci,CAI,"\x01\x80"); |
2477 | add_p(rplci,UID,"\x06\x43\x61\x70\x69\x32\x30"); | 2477 | add_p(rplci,UID,"\x06\x43\x61\x70\x69\x32\x30"); |
2478 | sig_req(rplci,ASSIGN,DSIG_ID); | 2478 | sig_req(rplci,ASSIGN,DSIG_ID); |
@@ -2487,7 +2487,7 @@ byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
2487 | else | 2487 | else |
2488 | { | 2488 | { |
2489 | rplci = plci; | 2489 | rplci = plci; |
2490 | rplci->cr_enquiry=FALSE; | 2490 | rplci->cr_enquiry=false; |
2491 | } | 2491 | } |
2492 | 2492 | ||
2493 | rplci->command = 0; | 2493 | rplci->command = 0; |
@@ -2509,7 +2509,7 @@ byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
2509 | add_p(rplci,UID,ss_parms[10].info); /* Time */ | 2509 | add_p(rplci,UID,ss_parms[10].info); /* Time */ |
2510 | sig_req(rplci,S_SERVICE,0); | 2510 | sig_req(rplci,S_SERVICE,0); |
2511 | send_req(rplci); | 2511 | send_req(rplci); |
2512 | return FALSE; | 2512 | return false; |
2513 | 2513 | ||
2514 | case S_MWI_DEACTIVATE: | 2514 | case S_MWI_DEACTIVATE: |
2515 | if(api_parse(&parms->info[1],(word)parms->length,"wbwwss",ss_parms)) | 2515 | if(api_parse(&parms->info[1],(word)parms->length,"wbwwss",ss_parms)) |
@@ -2524,7 +2524,7 @@ byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
2524 | { | 2524 | { |
2525 | rplci = &a->plci[i-1]; | 2525 | rplci = &a->plci[i-1]; |
2526 | rplci->appl = appl; | 2526 | rplci->appl = appl; |
2527 | rplci->cr_enquiry=TRUE; | 2527 | rplci->cr_enquiry=true; |
2528 | add_p(rplci,CAI,"\x01\x80"); | 2528 | add_p(rplci,CAI,"\x01\x80"); |
2529 | add_p(rplci,UID,"\x06\x43\x61\x70\x69\x32\x30"); | 2529 | add_p(rplci,UID,"\x06\x43\x61\x70\x69\x32\x30"); |
2530 | sig_req(rplci,ASSIGN,DSIG_ID); | 2530 | sig_req(rplci,ASSIGN,DSIG_ID); |
@@ -2539,7 +2539,7 @@ byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
2539 | else | 2539 | else |
2540 | { | 2540 | { |
2541 | rplci = plci; | 2541 | rplci = plci; |
2542 | rplci->cr_enquiry=FALSE; | 2542 | rplci->cr_enquiry=false; |
2543 | } | 2543 | } |
2544 | 2544 | ||
2545 | rplci->command = 0; | 2545 | rplci->command = 0; |
@@ -2556,7 +2556,7 @@ byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
2556 | add_p(rplci,OAD,ss_parms[5].info); /* Controlling User Number */ | 2556 | add_p(rplci,OAD,ss_parms[5].info); /* Controlling User Number */ |
2557 | sig_req(rplci,S_SERVICE,0); | 2557 | sig_req(rplci,S_SERVICE,0); |
2558 | send_req(rplci); | 2558 | send_req(rplci); |
2559 | return FALSE; | 2559 | return false; |
2560 | 2560 | ||
2561 | default: | 2561 | default: |
2562 | Info = 0x300E; /* not supported */ | 2562 | Info = 0x300E; /* not supported */ |
@@ -2597,13 +2597,13 @@ byte facility_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
2597 | Id, | 2597 | Id, |
2598 | Number, | 2598 | Number, |
2599 | "wws",Info,selector,SSparms); | 2599 | "wws",Info,selector,SSparms); |
2600 | return FALSE; | 2600 | return false; |
2601 | } | 2601 | } |
2602 | 2602 | ||
2603 | byte facility_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * msg) | 2603 | byte facility_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * msg) |
2604 | { | 2604 | { |
2605 | dbug(1,dprintf("facility_res")); | 2605 | dbug(1,dprintf("facility_res")); |
2606 | return FALSE; | 2606 | return false; |
2607 | } | 2607 | } |
2608 | 2608 | ||
2609 | byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) | 2609 | byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) |
@@ -2649,7 +2649,7 @@ byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plc | |||
2649 | Id, | 2649 | Id, |
2650 | Number, | 2650 | Number, |
2651 | "w",Info); | 2651 | "w",Info); |
2652 | return FALSE; | 2652 | return false; |
2653 | } | 2653 | } |
2654 | plci->requested_options_conn = 0; | 2654 | plci->requested_options_conn = 0; |
2655 | 2655 | ||
@@ -2684,7 +2684,7 @@ byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plc | |||
2684 | || (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS)) | 2684 | || (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS)) |
2685 | { | 2685 | { |
2686 | len = (byte)(&(((T30_INFO *) 0)->universal_6)); | 2686 | len = (byte)(&(((T30_INFO *) 0)->universal_6)); |
2687 | fax_info_change = FALSE; | 2687 | fax_info_change = false; |
2688 | if (ncpi->length >= 4) | 2688 | if (ncpi->length >= 4) |
2689 | { | 2689 | { |
2690 | w = GET_WORD(&ncpi->info[3]); | 2690 | w = GET_WORD(&ncpi->info[3]); |
@@ -2693,7 +2693,7 @@ byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plc | |||
2693 | ((T30_INFO *)(plci->fax_connect_info_buffer))->resolution = | 2693 | ((T30_INFO *)(plci->fax_connect_info_buffer))->resolution = |
2694 | (byte)((((T30_INFO *)(plci->fax_connect_info_buffer))->resolution & ~T30_RESOLUTION_R8_0770_OR_200) | | 2694 | (byte)((((T30_INFO *)(plci->fax_connect_info_buffer))->resolution & ~T30_RESOLUTION_R8_0770_OR_200) | |
2695 | ((w & 0x0001) ? T30_RESOLUTION_R8_0770_OR_200 : 0)); | 2695 | ((w & 0x0001) ? T30_RESOLUTION_R8_0770_OR_200 : 0)); |
2696 | fax_info_change = TRUE; | 2696 | fax_info_change = true; |
2697 | } | 2697 | } |
2698 | fax_control_bits &= ~(T30_CONTROL_BIT_REQUEST_POLLING | T30_CONTROL_BIT_MORE_DOCUMENTS); | 2698 | fax_control_bits &= ~(T30_CONTROL_BIT_REQUEST_POLLING | T30_CONTROL_BIT_MORE_DOCUMENTS); |
2699 | if (w & 0x0002) /* Fax-polling request */ | 2699 | if (w & 0x0002) /* Fax-polling request */ |
@@ -2709,7 +2709,7 @@ byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plc | |||
2709 | if (((byte) w) != ((T30_INFO *)(plci->fax_connect_info_buffer))->data_format) | 2709 | if (((byte) w) != ((T30_INFO *)(plci->fax_connect_info_buffer))->data_format) |
2710 | { | 2710 | { |
2711 | ((T30_INFO *)(plci->fax_connect_info_buffer))->data_format = (byte) w; | 2711 | ((T30_INFO *)(plci->fax_connect_info_buffer))->data_format = (byte) w; |
2712 | fax_info_change = TRUE; | 2712 | fax_info_change = true; |
2713 | } | 2713 | } |
2714 | 2714 | ||
2715 | if ((a->man_profile.private_options & (1L << PRIVATE_FAX_SUB_SEP_PWD)) | 2715 | if ((a->man_profile.private_options & (1L << PRIVATE_FAX_SUB_SEP_PWD)) |
@@ -2781,13 +2781,13 @@ byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plc | |||
2781 | { | 2781 | { |
2782 | len = (byte)(&(((T30_INFO *) 0)->universal_6)); | 2782 | len = (byte)(&(((T30_INFO *) 0)->universal_6)); |
2783 | } | 2783 | } |
2784 | fax_info_change = TRUE; | 2784 | fax_info_change = true; |
2785 | 2785 | ||
2786 | } | 2786 | } |
2787 | if (fax_control_bits != GET_WORD(&((T30_INFO *)plci->fax_connect_info_buffer)->control_bits_low)) | 2787 | if (fax_control_bits != GET_WORD(&((T30_INFO *)plci->fax_connect_info_buffer)->control_bits_low)) |
2788 | { | 2788 | { |
2789 | PUT_WORD (&((T30_INFO *)plci->fax_connect_info_buffer)->control_bits_low, fax_control_bits); | 2789 | PUT_WORD (&((T30_INFO *)plci->fax_connect_info_buffer)->control_bits_low, fax_control_bits); |
2790 | fax_info_change = TRUE; | 2790 | fax_info_change = true; |
2791 | } | 2791 | } |
2792 | } | 2792 | } |
2793 | if (Info == GOOD) | 2793 | if (Info == GOOD) |
@@ -2798,12 +2798,12 @@ byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plc | |||
2798 | if (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS) | 2798 | if (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS) |
2799 | { | 2799 | { |
2800 | start_internal_command (Id, plci, fax_connect_info_command); | 2800 | start_internal_command (Id, plci, fax_connect_info_command); |
2801 | return FALSE; | 2801 | return false; |
2802 | } | 2802 | } |
2803 | else | 2803 | else |
2804 | { | 2804 | { |
2805 | start_internal_command (Id, plci, fax_adjust_b23_command); | 2805 | start_internal_command (Id, plci, fax_adjust_b23_command); |
2806 | return FALSE; | 2806 | return false; |
2807 | } | 2807 | } |
2808 | } | 2808 | } |
2809 | } | 2809 | } |
@@ -2820,7 +2820,7 @@ byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plc | |||
2820 | for (w = 0; w < ncpi->length; w++) | 2820 | for (w = 0; w < ncpi->length; w++) |
2821 | plci->internal_req_buffer[2+w] = ncpi->info[1+w]; | 2821 | plci->internal_req_buffer[2+w] = ncpi->info[1+w]; |
2822 | start_internal_command (Id, plci, rtp_connect_b3_req_command); | 2822 | start_internal_command (Id, plci, rtp_connect_b3_req_command); |
2823 | return FALSE; | 2823 | return false; |
2824 | } | 2824 | } |
2825 | 2825 | ||
2826 | if(!Info) | 2826 | if(!Info) |
@@ -2837,7 +2837,7 @@ byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plc | |||
2837 | Id, | 2837 | Id, |
2838 | Number, | 2838 | Number, |
2839 | "w",Info); | 2839 | "w",Info); |
2840 | return FALSE; | 2840 | return false; |
2841 | } | 2841 | } |
2842 | 2842 | ||
2843 | byte connect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) | 2843 | byte connect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) |
@@ -2909,7 +2909,7 @@ byte connect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plc | |||
2909 | plci->fax_connect_info_length = len; | 2909 | plci->fax_connect_info_length = len; |
2910 | ((T30_INFO *)(plci->fax_connect_info_buffer))->code = 0; | 2910 | ((T30_INFO *)(plci->fax_connect_info_buffer))->code = 0; |
2911 | start_internal_command (Id, plci, fax_connect_ack_command); | 2911 | start_internal_command (Id, plci, fax_connect_ack_command); |
2912 | return FALSE; | 2912 | return false; |
2913 | } | 2913 | } |
2914 | } | 2914 | } |
2915 | 2915 | ||
@@ -2932,7 +2932,7 @@ byte connect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plc | |||
2932 | for (w = 0; w < ncpi->length; w++) | 2932 | for (w = 0; w < ncpi->length; w++) |
2933 | plci->internal_req_buffer[2+w] = ncpi->info[1+w]; | 2933 | plci->internal_req_buffer[2+w] = ncpi->info[1+w]; |
2934 | start_internal_command (Id, plci, rtp_connect_b3_res_command); | 2934 | start_internal_command (Id, plci, rtp_connect_b3_res_command); |
2935 | return FALSE; | 2935 | return false; |
2936 | } | 2936 | } |
2937 | 2937 | ||
2938 | else | 2938 | else |
@@ -2945,14 +2945,14 @@ byte connect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plc | |||
2945 | sendf(appl,_CONNECT_B3_ACTIVE_I,Id,0,"s",""); | 2945 | sendf(appl,_CONNECT_B3_ACTIVE_I,Id,0,"s",""); |
2946 | if (plci->adjust_b_restore) | 2946 | if (plci->adjust_b_restore) |
2947 | { | 2947 | { |
2948 | plci->adjust_b_restore = FALSE; | 2948 | plci->adjust_b_restore = false; |
2949 | start_internal_command (Id, plci, adjust_b_restore); | 2949 | start_internal_command (Id, plci, adjust_b_restore); |
2950 | } | 2950 | } |
2951 | } | 2951 | } |
2952 | return 1; | 2952 | return 1; |
2953 | } | 2953 | } |
2954 | } | 2954 | } |
2955 | return FALSE; | 2955 | return false; |
2956 | } | 2956 | } |
2957 | 2957 | ||
2958 | byte connect_b3_a_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) | 2958 | byte connect_b3_a_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) |
@@ -2972,7 +2972,7 @@ byte connect_b3_a_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * p | |||
2972 | channel_xmit_xon (plci); | 2972 | channel_xmit_xon (plci); |
2973 | } | 2973 | } |
2974 | } | 2974 | } |
2975 | return FALSE; | 2975 | return false; |
2976 | } | 2976 | } |
2977 | 2977 | ||
2978 | byte disconnect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) | 2978 | byte disconnect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) |
@@ -3004,7 +3004,7 @@ byte disconnect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * | |||
3004 | { | 3004 | { |
3005 | plci->send_disc = (byte)ncci; | 3005 | plci->send_disc = (byte)ncci; |
3006 | plci->command = 0; | 3006 | plci->command = 0; |
3007 | return FALSE; | 3007 | return false; |
3008 | } | 3008 | } |
3009 | else | 3009 | else |
3010 | { | 3010 | { |
@@ -3028,7 +3028,7 @@ byte disconnect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * | |||
3028 | Id, | 3028 | Id, |
3029 | Number, | 3029 | Number, |
3030 | "w",Info); | 3030 | "w",Info); |
3031 | return FALSE; | 3031 | return false; |
3032 | } | 3032 | } |
3033 | 3033 | ||
3034 | byte disconnect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) | 3034 | byte disconnect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) |
@@ -3084,7 +3084,7 @@ byte disconnect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * | |||
3084 | } | 3084 | } |
3085 | } | 3085 | } |
3086 | } | 3086 | } |
3087 | return FALSE; | 3087 | return false; |
3088 | } | 3088 | } |
3089 | 3089 | ||
3090 | byte data_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) | 3090 | byte data_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) |
@@ -3140,7 +3140,7 @@ byte data_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
3140 | } | 3140 | } |
3141 | 3141 | ||
3142 | send_data(plci); | 3142 | send_data(plci); |
3143 | return FALSE; | 3143 | return false; |
3144 | } | 3144 | } |
3145 | } | 3145 | } |
3146 | if (appl) | 3146 | if (appl) |
@@ -3161,7 +3161,7 @@ byte data_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
3161 | Number, | 3161 | Number, |
3162 | "ww",GET_WORD(parms[2].info),Info); | 3162 | "ww",GET_WORD(parms[2].info),Info); |
3163 | } | 3163 | } |
3164 | return FALSE; | 3164 | return false; |
3165 | } | 3165 | } |
3166 | 3166 | ||
3167 | byte data_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) | 3167 | byte data_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) |
@@ -3194,7 +3194,7 @@ byte data_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
3194 | } | 3194 | } |
3195 | } | 3195 | } |
3196 | } | 3196 | } |
3197 | return FALSE; | 3197 | return false; |
3198 | } | 3198 | } |
3199 | 3199 | ||
3200 | byte reset_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) | 3200 | byte reset_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) |
@@ -3235,7 +3235,7 @@ byte reset_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
3235 | Id, | 3235 | Id, |
3236 | Number, | 3236 | Number, |
3237 | "w",Info); | 3237 | "w",Info); |
3238 | return FALSE; | 3238 | return false; |
3239 | } | 3239 | } |
3240 | 3240 | ||
3241 | byte reset_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) | 3241 | byte reset_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) |
@@ -3254,12 +3254,12 @@ byte reset_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
3254 | { | 3254 | { |
3255 | a->ncci_state[ncci] = CONNECTED; | 3255 | a->ncci_state[ncci] = CONNECTED; |
3256 | nl_req_ncci(plci,N_RESET_ACK,(byte)ncci); | 3256 | nl_req_ncci(plci,N_RESET_ACK,(byte)ncci); |
3257 | return TRUE; | 3257 | return true; |
3258 | } | 3258 | } |
3259 | break; | 3259 | break; |
3260 | } | 3260 | } |
3261 | } | 3261 | } |
3262 | return FALSE; | 3262 | return false; |
3263 | } | 3263 | } |
3264 | 3264 | ||
3265 | byte connect_b3_t90_a_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) | 3265 | byte connect_b3_t90_a_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) |
@@ -3292,7 +3292,7 @@ byte connect_b3_t90_a_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI | |||
3292 | return 1; | 3292 | return 1; |
3293 | } | 3293 | } |
3294 | } | 3294 | } |
3295 | return FALSE; | 3295 | return false; |
3296 | } | 3296 | } |
3297 | 3297 | ||
3298 | 3298 | ||
@@ -3378,7 +3378,7 @@ byte select_b_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
3378 | plci->internal_command = BLOCK_PLCI; /* lock other commands */ | 3378 | plci->internal_command = BLOCK_PLCI; /* lock other commands */ |
3379 | plci->command = 0; | 3379 | plci->command = 0; |
3380 | dbug(1,dprintf("continue if codec loaded")); | 3380 | dbug(1,dprintf("continue if codec loaded")); |
3381 | return FALSE; | 3381 | return false; |
3382 | } | 3382 | } |
3383 | } | 3383 | } |
3384 | } | 3384 | } |
@@ -3407,12 +3407,12 @@ byte select_b_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, | |||
3407 | else if (plci->call_dir & CALL_DIR_IN) | 3407 | else if (plci->call_dir & CALL_DIR_IN) |
3408 | plci->call_dir = CALL_DIR_IN | CALL_DIR_ANSWER; | 3408 | plci->call_dir = CALL_DIR_IN | CALL_DIR_ANSWER; |
3409 | start_internal_command (Id, plci, select_b_command); | 3409 | start_internal_command (Id, plci, select_b_command); |
3410 | return FALSE; | 3410 | return false; |
3411 | } | 3411 | } |
3412 | } | 3412 | } |
3413 | } | 3413 | } |
3414 | sendf(appl, _SELECT_B_REQ|CONFIRM, Id, Number, "w", Info); | 3414 | sendf(appl, _SELECT_B_REQ|CONFIRM, Id, Number, "w", Info); |
3415 | return FALSE; | 3415 | return false; |
3416 | } | 3416 | } |
3417 | 3417 | ||
3418 | byte manufacturer_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) | 3418 | byte manufacturer_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * plci, APPL * appl, API_PARSE * parms) |
@@ -3489,7 +3489,7 @@ byte manufacturer_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * p | |||
3489 | } | 3489 | } |
3490 | 3490 | ||
3491 | plci->State = LOCAL_CONNECT; | 3491 | plci->State = LOCAL_CONNECT; |
3492 | plci->manufacturer = TRUE; | 3492 | plci->manufacturer = true; |
3493 | plci->command = _MANUFACTURER_R; | 3493 | plci->command = _MANUFACTURER_R; |
3494 | plci->m_command = command; | 3494 | plci->m_command = command; |
3495 | plci->number = Number; | 3495 | plci->number = Number; |
@@ -3520,7 +3520,7 @@ byte manufacturer_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * p | |||
3520 | plci->internal_command = BLOCK_PLCI; /* reject other req meanwhile */ | 3520 | plci->internal_command = BLOCK_PLCI; /* reject other req meanwhile */ |
3521 | plci->command = 0; | 3521 | plci->command = 0; |
3522 | send_req(plci); | 3522 | send_req(plci); |
3523 | return FALSE; | 3523 | return false; |
3524 | } | 3524 | } |
3525 | if(dir==1) { | 3525 | if(dir==1) { |
3526 | sig_req(plci,CALL_REQ,0); | 3526 | sig_req(plci,CALL_REQ,0); |
@@ -3573,7 +3573,7 @@ byte manufacturer_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * p | |||
3573 | } | 3573 | } |
3574 | else if(req==LAW_REQ) | 3574 | else if(req==LAW_REQ) |
3575 | { | 3575 | { |
3576 | plci->cr_enquiry = TRUE; | 3576 | plci->cr_enquiry = true; |
3577 | } | 3577 | } |
3578 | add_ss(plci,FTY,&m_parms[1]); | 3578 | add_ss(plci,FTY,&m_parms[1]); |
3579 | sig_req(plci,req,0); | 3579 | sig_req(plci,req,0); |
@@ -3739,7 +3739,7 @@ byte manufacturer_req(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * p | |||
3739 | Id, | 3739 | Id, |
3740 | Number, | 3740 | Number, |
3741 | "dww",_DI_MANU_ID,command,Info); | 3741 | "dww",_DI_MANU_ID,command,Info); |
3742 | return FALSE; | 3742 | return false; |
3743 | } | 3743 | } |
3744 | 3744 | ||
3745 | 3745 | ||
@@ -3760,7 +3760,7 @@ byte manufacturer_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * p | |||
3760 | || (msg[1].length == 0) | 3760 | || (msg[1].length == 0) |
3761 | || (GET_DWORD(msg[0].info)!=_DI_MANU_ID)) | 3761 | || (GET_DWORD(msg[0].info)!=_DI_MANU_ID)) |
3762 | { | 3762 | { |
3763 | return FALSE; | 3763 | return false; |
3764 | } | 3764 | } |
3765 | indication = GET_WORD(msg[1].info); | 3765 | indication = GET_WORD(msg[1].info); |
3766 | switch (indication) | 3766 | switch (indication) |
@@ -3811,7 +3811,7 @@ byte manufacturer_res(dword Id, word Number, DIVA_CAPI_ADAPTER * a, PLCI * p | |||
3811 | break; | 3811 | break; |
3812 | 3812 | ||
3813 | } | 3813 | } |
3814 | return FALSE; | 3814 | return false; |
3815 | } | 3815 | } |
3816 | 3816 | ||
3817 | /*------------------------------------------------------------------*/ | 3817 | /*------------------------------------------------------------------*/ |
@@ -3908,14 +3908,14 @@ void callback(ENTITY * e) | |||
3908 | plci->nl_req = 0; | 3908 | plci->nl_req = 0; |
3909 | } | 3909 | } |
3910 | if (plci->nl_req) | 3910 | if (plci->nl_req) |
3911 | control_rc (plci, 0, rc, ch, 0, TRUE); | 3911 | control_rc (plci, 0, rc, ch, 0, true); |
3912 | else | 3912 | else |
3913 | { | 3913 | { |
3914 | if (req == N_XON) | 3914 | if (req == N_XON) |
3915 | { | 3915 | { |
3916 | channel_x_on (plci, ch); | 3916 | channel_x_on (plci, ch); |
3917 | if (plci->internal_command) | 3917 | if (plci->internal_command) |
3918 | control_rc (plci, req, rc, ch, 0, TRUE); | 3918 | control_rc (plci, req, rc, ch, 0, true); |
3919 | } | 3919 | } |
3920 | else | 3920 | else |
3921 | { | 3921 | { |
@@ -3931,21 +3931,21 @@ void callback(ENTITY * e) | |||
3931 | } | 3931 | } |
3932 | } | 3932 | } |
3933 | channel_xmit_xon (plci); | 3933 | channel_xmit_xon (plci); |
3934 | control_rc (plci, 0, rc, ch, global_req, TRUE); | 3934 | control_rc (plci, 0, rc, ch, global_req, true); |
3935 | } | 3935 | } |
3936 | else if (plci->data_sent) | 3936 | else if (plci->data_sent) |
3937 | { | 3937 | { |
3938 | channel_xmit_xon (plci); | 3938 | channel_xmit_xon (plci); |
3939 | plci->data_sent = FALSE; | 3939 | plci->data_sent = false; |
3940 | plci->NL.XNum = 1; | 3940 | plci->NL.XNum = 1; |
3941 | data_rc (plci, ch); | 3941 | data_rc (plci, ch); |
3942 | if (plci->internal_command) | 3942 | if (plci->internal_command) |
3943 | control_rc (plci, req, rc, ch, 0, TRUE); | 3943 | control_rc (plci, req, rc, ch, 0, true); |
3944 | } | 3944 | } |
3945 | else | 3945 | else |
3946 | { | 3946 | { |
3947 | channel_xmit_xon (plci); | 3947 | channel_xmit_xon (plci); |
3948 | control_rc (plci, req, rc, ch, 0, TRUE); | 3948 | control_rc (plci, req, rc, ch, 0, true); |
3949 | } | 3949 | } |
3950 | } | 3950 | } |
3951 | } | 3951 | } |
@@ -3974,12 +3974,12 @@ void callback(ENTITY * e) | |||
3974 | if (rc != ASSIGN_OK) | 3974 | if (rc != ASSIGN_OK) |
3975 | e->Id = 0; | 3975 | e->Id = 0; |
3976 | channel_xmit_xon (plci); | 3976 | channel_xmit_xon (plci); |
3977 | control_rc (plci, 0, rc, ch, global_req, FALSE); | 3977 | control_rc (plci, 0, rc, ch, global_req, false); |
3978 | } | 3978 | } |
3979 | else | 3979 | else |
3980 | { | 3980 | { |
3981 | channel_xmit_xon (plci); | 3981 | channel_xmit_xon (plci); |
3982 | control_rc (plci, req, rc, ch, 0, FALSE); | 3982 | control_rc (plci, req, rc, ch, 0, false); |
3983 | } | 3983 | } |
3984 | } | 3984 | } |
3985 | /* | 3985 | /* |
@@ -4065,8 +4065,8 @@ capi_callback_suffix: | |||
4065 | 4065 | ||
4066 | if (plci->li_notify_update) | 4066 | if (plci->li_notify_update) |
4067 | { | 4067 | { |
4068 | plci->li_notify_update = FALSE; | 4068 | plci->li_notify_update = false; |
4069 | mixer_notify_update (plci, FALSE); | 4069 | mixer_notify_update (plci, false); |
4070 | } | 4070 | } |
4071 | 4071 | ||
4072 | } | 4072 | } |
@@ -4428,7 +4428,7 @@ void control_rc(PLCI * plci, byte req, byte rc, byte ch, byte global_req, byte | |||
4428 | else | 4428 | else |
4429 | { | 4429 | { |
4430 | sendf(appl,_INFO_R|CONFIRM,Id&0xf,Number,"w",_WRONG_STATE); | 4430 | sendf(appl,_INFO_R|CONFIRM,Id&0xf,Number,"w",_WRONG_STATE); |
4431 | appl->NullCREnable = FALSE; | 4431 | appl->NullCREnable = false; |
4432 | plci_remove(plci); | 4432 | plci_remove(plci); |
4433 | } | 4433 | } |
4434 | } | 4434 | } |
@@ -4441,7 +4441,7 @@ void control_rc(PLCI * plci, byte req, byte rc, byte ch, byte global_req, byte | |||
4441 | else | 4441 | else |
4442 | { | 4442 | { |
4443 | sendf(appl,_INFO_R|CONFIRM,Id&0xf,Number,"w",_WRONG_STATE); | 4443 | sendf(appl,_INFO_R|CONFIRM,Id&0xf,Number,"w",_WRONG_STATE); |
4444 | appl->NullCREnable = FALSE; | 4444 | appl->NullCREnable = false; |
4445 | } | 4445 | } |
4446 | plci_remove(plci); | 4446 | plci_remove(plci); |
4447 | } | 4447 | } |
@@ -4862,7 +4862,7 @@ void sig_ind(PLCI * plci) | |||
4862 | byte CF_Ind[] = "\x09\x02\x00\x06\x00\x00\x00\x00\x00\x00"; | 4862 | byte CF_Ind[] = "\x09\x02\x00\x06\x00\x00\x00\x00\x00\x00"; |
4863 | byte Interr_Err_Ind[] = "\x0a\x02\x00\x07\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"; | 4863 | byte Interr_Err_Ind[] = "\x0a\x02\x00\x07\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"; |
4864 | byte CONF_Ind[] = "\x09\x16\x00\x06\x00\x00\0x00\0x00\0x00\0x00"; | 4864 | byte CONF_Ind[] = "\x09\x16\x00\x06\x00\x00\0x00\0x00\0x00\0x00"; |
4865 | byte force_mt_info = FALSE; | 4865 | byte force_mt_info = false; |
4866 | byte dir; | 4866 | byte dir; |
4867 | dword d; | 4867 | dword d; |
4868 | word w; | 4868 | word w; |
@@ -4933,7 +4933,7 @@ void sig_ind(PLCI * plci) | |||
4933 | { | 4933 | { |
4934 | if(plci->cr_enquiry && plci->appl) | 4934 | if(plci->cr_enquiry && plci->appl) |
4935 | { | 4935 | { |
4936 | plci->cr_enquiry = FALSE; | 4936 | plci->cr_enquiry = false; |
4937 | /* d = MANU_ID */ | 4937 | /* d = MANU_ID */ |
4938 | /* w = m_command */ | 4938 | /* w = m_command */ |
4939 | /* b = total length */ | 4939 | /* b = total length */ |
@@ -5158,7 +5158,7 @@ void sig_ind(PLCI * plci) | |||
5158 | if(application[i].CDEnable) | 5158 | if(application[i].CDEnable) |
5159 | { | 5159 | { |
5160 | if(application[i].Id) sendf(&application[i],_FACILITY_I,Id,0,"ws",3, SS_Ind); | 5160 | if(application[i].Id) sendf(&application[i],_FACILITY_I,Id,0,"ws",3, SS_Ind); |
5161 | application[i].CDEnable = FALSE; | 5161 | application[i].CDEnable = false; |
5162 | } | 5162 | } |
5163 | } | 5163 | } |
5164 | break; | 5164 | break; |
@@ -5375,7 +5375,7 @@ void sig_ind(PLCI * plci) | |||
5375 | if(application[i].CDEnable) | 5375 | if(application[i].CDEnable) |
5376 | { | 5376 | { |
5377 | if(application[i].Id) sendf(&application[i],_FACILITY_I,Id,0,"ws",3, SS_Ind); | 5377 | if(application[i].Id) sendf(&application[i],_FACILITY_I,Id,0,"ws",3, SS_Ind); |
5378 | application[i].CDEnable = FALSE; | 5378 | application[i].CDEnable = false; |
5379 | } | 5379 | } |
5380 | } | 5380 | } |
5381 | break; | 5381 | break; |
@@ -5730,7 +5730,7 @@ void sig_ind(PLCI * plci) | |||
5730 | plci, | 5730 | plci, |
5731 | Id, | 5731 | Id, |
5732 | parms, | 5732 | parms, |
5733 | SendMultiIE(plci,Id,multi_pi_parms, PI, 0x210, TRUE)); | 5733 | SendMultiIE(plci,Id,multi_pi_parms, PI, 0x210, true)); |
5734 | } | 5734 | } |
5735 | } | 5735 | } |
5736 | clear_c_ind_mask_bit (plci, MAX_APPL); | 5736 | clear_c_ind_mask_bit (plci, MAX_APPL); |
@@ -6117,38 +6117,38 @@ static void SendSetupInfo(APPL * appl, PLCI * plci, dword Id, byte * * par | |||
6117 | dbug(1,dprintf("CPN ")); | 6117 | dbug(1,dprintf("CPN ")); |
6118 | Info_Number = 0x0070; | 6118 | Info_Number = 0x0070; |
6119 | Info_Mask = 0x80; | 6119 | Info_Mask = 0x80; |
6120 | Info_Sent_Flag = TRUE; | 6120 | Info_Sent_Flag = true; |
6121 | break; | 6121 | break; |
6122 | case 8: /* display */ | 6122 | case 8: /* display */ |
6123 | dbug(1,dprintf("display(%d)",i)); | 6123 | dbug(1,dprintf("display(%d)",i)); |
6124 | Info_Number = 0x0028; | 6124 | Info_Number = 0x0028; |
6125 | Info_Mask = 0x04; | 6125 | Info_Mask = 0x04; |
6126 | Info_Sent_Flag = TRUE; | 6126 | Info_Sent_Flag = true; |
6127 | break; | 6127 | break; |
6128 | case 16: /* Channel Id */ | 6128 | case 16: /* Channel Id */ |
6129 | dbug(1,dprintf("CHI")); | 6129 | dbug(1,dprintf("CHI")); |
6130 | Info_Number = 0x0018; | 6130 | Info_Number = 0x0018; |
6131 | Info_Mask = 0x100; | 6131 | Info_Mask = 0x100; |
6132 | Info_Sent_Flag = TRUE; | 6132 | Info_Sent_Flag = true; |
6133 | mixer_set_bchannel_id (plci, Info_Element); | 6133 | mixer_set_bchannel_id (plci, Info_Element); |
6134 | break; | 6134 | break; |
6135 | case 19: /* Redirected Number */ | 6135 | case 19: /* Redirected Number */ |
6136 | dbug(1,dprintf("RDN")); | 6136 | dbug(1,dprintf("RDN")); |
6137 | Info_Number = 0x0074; | 6137 | Info_Number = 0x0074; |
6138 | Info_Mask = 0x400; | 6138 | Info_Mask = 0x400; |
6139 | Info_Sent_Flag = TRUE; | 6139 | Info_Sent_Flag = true; |
6140 | break; | 6140 | break; |
6141 | case 20: /* Redirected Number extended */ | 6141 | case 20: /* Redirected Number extended */ |
6142 | dbug(1,dprintf("RDX")); | 6142 | dbug(1,dprintf("RDX")); |
6143 | Info_Number = 0x0073; | 6143 | Info_Number = 0x0073; |
6144 | Info_Mask = 0x400; | 6144 | Info_Mask = 0x400; |
6145 | Info_Sent_Flag = TRUE; | 6145 | Info_Sent_Flag = true; |
6146 | break; | 6146 | break; |
6147 | case 22: /* Redirecing Number */ | 6147 | case 22: /* Redirecing Number */ |
6148 | dbug(1,dprintf("RIN")); | 6148 | dbug(1,dprintf("RIN")); |
6149 | Info_Number = 0x0076; | 6149 | Info_Number = 0x0076; |
6150 | Info_Mask = 0x400; | 6150 | Info_Mask = 0x400; |
6151 | Info_Sent_Flag = TRUE; | 6151 | Info_Sent_Flag = true; |
6152 | break; | 6152 | break; |
6153 | default: | 6153 | default: |
6154 | Info_Number = 0; | 6154 | Info_Number = 0; |
@@ -6312,7 +6312,7 @@ void SendInfo(PLCI * plci, dword Id, byte * * parms, byte iesent) | |||
6312 | && plci->adapter->Info_Mask[appl->Id-1] &Info_Mask) | 6312 | && plci->adapter->Info_Mask[appl->Id-1] &Info_Mask) |
6313 | { | 6313 | { |
6314 | dbug(1,dprintf("NCR_Ind")); | 6314 | dbug(1,dprintf("NCR_Ind")); |
6315 | iesent=TRUE; | 6315 | iesent=true; |
6316 | sendf(&application[j],_INFO_I,Id&0x0f,0,"wS",Info_Number,Info_Element); | 6316 | sendf(&application[j],_INFO_I,Id&0x0f,0,"wS",Info_Number,Info_Element); |
6317 | } | 6317 | } |
6318 | } | 6318 | } |
@@ -6330,7 +6330,7 @@ void SendInfo(PLCI * plci, dword Id, byte * * parms, byte iesent) | |||
6330 | if(test_c_ind_mask_bit (plci, j)) | 6330 | if(test_c_ind_mask_bit (plci, j)) |
6331 | { | 6331 | { |
6332 | dbug(1,dprintf("Ovl_Ind")); | 6332 | dbug(1,dprintf("Ovl_Ind")); |
6333 | iesent=TRUE; | 6333 | iesent=true; |
6334 | sendf(&application[j],_INFO_I,Id,0,"wS",Info_Number,Info_Element); | 6334 | sendf(&application[j],_INFO_I,Id,0,"wS",Info_Number,Info_Element); |
6335 | } | 6335 | } |
6336 | } | 6336 | } |
@@ -6340,7 +6340,7 @@ void SendInfo(PLCI * plci, dword Id, byte * * parms, byte iesent) | |||
6340 | && plci->adapter->Info_Mask[plci->appl->Id-1] &Info_Mask) | 6340 | && plci->adapter->Info_Mask[plci->appl->Id-1] &Info_Mask) |
6341 | { | 6341 | { |
6342 | dbug(1,dprintf("Std_Ind")); | 6342 | dbug(1,dprintf("Std_Ind")); |
6343 | iesent=TRUE; | 6343 | iesent=true; |
6344 | sendf(plci->appl,_INFO_I,Id,0,"wS",Info_Number,Info_Element); | 6344 | sendf(plci->appl,_INFO_I,Id,0,"wS",Info_Number,Info_Element); |
6345 | } | 6345 | } |
6346 | } | 6346 | } |
@@ -6391,7 +6391,7 @@ byte SendMultiIE(PLCI * plci, dword Id, byte * * parms, byte ie_type, dword | |||
6391 | && appl->Id | 6391 | && appl->Id |
6392 | && plci->adapter->Info_Mask[appl->Id-1] &Info_Mask) | 6392 | && plci->adapter->Info_Mask[appl->Id-1] &Info_Mask) |
6393 | { | 6393 | { |
6394 | iesent = TRUE; | 6394 | iesent = true; |
6395 | dbug(1,dprintf("Mlt_NCR_Ind")); | 6395 | dbug(1,dprintf("Mlt_NCR_Ind")); |
6396 | sendf(&application[j],_INFO_I,Id&0x0f,0,"wS",Info_Number,Info_Element); | 6396 | sendf(&application[j],_INFO_I,Id&0x0f,0,"wS",Info_Number,Info_Element); |
6397 | } | 6397 | } |
@@ -6403,7 +6403,7 @@ byte SendMultiIE(PLCI * plci, dword Id, byte * * parms, byte ie_type, dword | |||
6403 | { | 6403 | { |
6404 | if(test_c_ind_mask_bit (plci, j)) | 6404 | if(test_c_ind_mask_bit (plci, j)) |
6405 | { | 6405 | { |
6406 | iesent = TRUE; | 6406 | iesent = true; |
6407 | dbug(1,dprintf("Mlt_Ovl_Ind")); | 6407 | dbug(1,dprintf("Mlt_Ovl_Ind")); |
6408 | sendf(&application[j],_INFO_I,Id,0,"wS",Info_Number,Info_Element); | 6408 | sendf(&application[j],_INFO_I,Id,0,"wS",Info_Number,Info_Element); |
6409 | } | 6409 | } |
@@ -6412,7 +6412,7 @@ byte SendMultiIE(PLCI * plci, dword Id, byte * * parms, byte ie_type, dword | |||
6412 | else if(Info_Number | 6412 | else if(Info_Number |
6413 | && plci->adapter->Info_Mask[plci->appl->Id-1] &Info_Mask) | 6413 | && plci->adapter->Info_Mask[plci->appl->Id-1] &Info_Mask) |
6414 | { | 6414 | { |
6415 | iesent = TRUE; | 6415 | iesent = true; |
6416 | dbug(1,dprintf("Mlt_Std_Ind")); | 6416 | dbug(1,dprintf("Mlt_Std_Ind")); |
6417 | sendf(plci->appl,_INFO_I,Id,0,"wS",Info_Number,Info_Element); | 6417 | sendf(plci->appl,_INFO_I,Id,0,"wS",Info_Number,Info_Element); |
6418 | } | 6418 | } |
@@ -6812,7 +6812,7 @@ void nl_ind(PLCI * plci) | |||
6812 | } | 6812 | } |
6813 | if (((plci->NL.Ind & 0x0f) == N_DISC) || ((plci->NL.Ind & 0x0f) == N_DISC_ACK)) | 6813 | if (((plci->NL.Ind & 0x0f) == N_DISC) || ((plci->NL.Ind & 0x0f) == N_DISC_ACK)) |
6814 | { | 6814 | { |
6815 | if (((T30_INFO *)plci->NL.RBuffer->P)->code < sizeof(fax_info) / sizeof(fax_info[0])) | 6815 | if (((T30_INFO *)plci->NL.RBuffer->P)->code < ARRAY_SIZE(fax_info)) |
6816 | info = fax_info[((T30_INFO *)plci->NL.RBuffer->P)->code]; | 6816 | info = fax_info[((T30_INFO *)plci->NL.RBuffer->P)->code]; |
6817 | else | 6817 | else |
6818 | info = _FAX_PROTOCOL_ERROR; | 6818 | info = _FAX_PROTOCOL_ERROR; |
@@ -6887,7 +6887,7 @@ void nl_ind(PLCI * plci) | |||
6887 | (byte)(plci->ncpi_buffer[0] + 1), plci->ncpi_buffer); | 6887 | (byte)(plci->ncpi_buffer[0] + 1), plci->ncpi_buffer); |
6888 | plci->ncpi_state |= NCPI_NEGOTIATE_B3_SENT; | 6888 | plci->ncpi_state |= NCPI_NEGOTIATE_B3_SENT; |
6889 | if (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP) | 6889 | if (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP) |
6890 | fax_send_edata_ack = FALSE; | 6890 | fax_send_edata_ack = false; |
6891 | } | 6891 | } |
6892 | 6892 | ||
6893 | if (a->manufacturer_features & MANUFACTURER_FEATURE_FAX_PAPER_FORMATS) | 6893 | if (a->manufacturer_features & MANUFACTURER_FEATURE_FAX_PAPER_FORMATS) |
@@ -6928,7 +6928,7 @@ void nl_ind(PLCI * plci) | |||
6928 | sendf(plci->appl,_DISCONNECT_B3_I,Id,0,"wS",GOOD,plci->ncpi_buffer); | 6928 | sendf(plci->appl,_DISCONNECT_B3_I,Id,0,"wS",GOOD,plci->ncpi_buffer); |
6929 | a->ncci_state[ncci] = INC_DIS_PENDING; | 6929 | a->ncci_state[ncci] = INC_DIS_PENDING; |
6930 | plci->ncpi_state = 0; | 6930 | plci->ncpi_state = 0; |
6931 | fax_send_edata_ack = FALSE; | 6931 | fax_send_edata_ack = false; |
6932 | } | 6932 | } |
6933 | break; | 6933 | break; |
6934 | } | 6934 | } |
@@ -7025,7 +7025,7 @@ void nl_ind(PLCI * plci) | |||
7025 | } | 7025 | } |
7026 | if (plci->adjust_b_restore) | 7026 | if (plci->adjust_b_restore) |
7027 | { | 7027 | { |
7028 | plci->adjust_b_restore = FALSE; | 7028 | plci->adjust_b_restore = false; |
7029 | start_internal_command (Id, plci, adjust_b_restore); | 7029 | start_internal_command (Id, plci, adjust_b_restore); |
7030 | } | 7030 | } |
7031 | break; | 7031 | break; |
@@ -7041,7 +7041,7 @@ void nl_ind(PLCI * plci) | |||
7041 | next_internal_command (Id, plci); | 7041 | next_internal_command (Id, plci); |
7042 | } | 7042 | } |
7043 | ncci_state = a->ncci_state[ncci]; | 7043 | ncci_state = a->ncci_state[ncci]; |
7044 | ncci_remove (plci, ncci, FALSE); | 7044 | ncci_remove (plci, ncci, false); |
7045 | 7045 | ||
7046 | /* with N_DISC or N_DISC_ACK the IDI frees the respective */ | 7046 | /* with N_DISC or N_DISC_ACK the IDI frees the respective */ |
7047 | /* channel, so we cannot store the state in ncci_state! The */ | 7047 | /* channel, so we cannot store the state in ncci_state! The */ |
@@ -7288,18 +7288,18 @@ word get_plci(DIVA_CAPI_ADAPTER * a) | |||
7288 | plci->msg_in_read_pos = MSG_IN_QUEUE_SIZE; | 7288 | plci->msg_in_read_pos = MSG_IN_QUEUE_SIZE; |
7289 | plci->msg_in_wrap_pos = MSG_IN_QUEUE_SIZE; | 7289 | plci->msg_in_wrap_pos = MSG_IN_QUEUE_SIZE; |
7290 | 7290 | ||
7291 | plci->data_sent = FALSE; | 7291 | plci->data_sent = false; |
7292 | plci->send_disc = 0; | 7292 | plci->send_disc = 0; |
7293 | plci->sig_global_req = 0; | 7293 | plci->sig_global_req = 0; |
7294 | plci->sig_remove_id = 0; | 7294 | plci->sig_remove_id = 0; |
7295 | plci->nl_global_req = 0; | 7295 | plci->nl_global_req = 0; |
7296 | plci->nl_remove_id = 0; | 7296 | plci->nl_remove_id = 0; |
7297 | plci->adv_nl = 0; | 7297 | plci->adv_nl = 0; |
7298 | plci->manufacturer = FALSE; | 7298 | plci->manufacturer = false; |
7299 | plci->call_dir = CALL_DIR_OUT | CALL_DIR_ORIGINATE; | 7299 | plci->call_dir = CALL_DIR_OUT | CALL_DIR_ORIGINATE; |
7300 | plci->spoofed_msg = 0; | 7300 | plci->spoofed_msg = 0; |
7301 | plci->ptyState = 0; | 7301 | plci->ptyState = 0; |
7302 | plci->cr_enquiry = FALSE; | 7302 | plci->cr_enquiry = false; |
7303 | plci->hangup_flow_ctrl_timer = 0; | 7303 | plci->hangup_flow_ctrl_timer = 0; |
7304 | 7304 | ||
7305 | plci->ncci_ring_list = 0; | 7305 | plci->ncci_ring_list = 0; |
@@ -7972,7 +7972,7 @@ word add_b23(PLCI * plci, API_PARSE * bp) | |||
7972 | 7972 | ||
7973 | if(!bp->length && plci->tel) | 7973 | if(!bp->length && plci->tel) |
7974 | { | 7974 | { |
7975 | plci->adv_nl = TRUE; | 7975 | plci->adv_nl = true; |
7976 | dbug(1,dprintf("Default adv.Nl")); | 7976 | dbug(1,dprintf("Default adv.Nl")); |
7977 | add_p(plci,LLI,lli); | 7977 | add_p(plci,LLI,lli); |
7978 | plci->B2_prot = 1 /*XPARENT*/; | 7978 | plci->B2_prot = 1 /*XPARENT*/; |
@@ -8022,7 +8022,7 @@ word add_b23(PLCI * plci, API_PARSE * bp) | |||
8022 | { | 8022 | { |
8023 | if(GET_WORD(bp_parms[1].info)!=1 | 8023 | if(GET_WORD(bp_parms[1].info)!=1 |
8024 | || GET_WORD(bp_parms[2].info)!=0) return _B2_NOT_SUPPORTED; | 8024 | || GET_WORD(bp_parms[2].info)!=0) return _B2_NOT_SUPPORTED; |
8025 | plci->adv_nl = TRUE; | 8025 | plci->adv_nl = true; |
8026 | } | 8026 | } |
8027 | else if(plci->tel) return _B2_NOT_SUPPORTED; | 8027 | else if(plci->tel) return _B2_NOT_SUPPORTED; |
8028 | 8028 | ||
@@ -8840,7 +8840,7 @@ void send_data(PLCI * plci) | |||
8840 | plci->NL.X = plci->NData; | 8840 | plci->NL.X = plci->NData; |
8841 | plci->NL.ReqCh = a->ncci_ch[ncci]; | 8841 | plci->NL.ReqCh = a->ncci_ch[ncci]; |
8842 | dbug(1,dprintf("%x:DREQ(%x:%x)",a->Id,plci->NL.Id,plci->NL.Req)); | 8842 | dbug(1,dprintf("%x:DREQ(%x:%x)",a->Id,plci->NL.Id,plci->NL.Req)); |
8843 | plci->data_sent = TRUE; | 8843 | plci->data_sent = true; |
8844 | plci->data_sent_ptr = data->P; | 8844 | plci->data_sent_ptr = data->P; |
8845 | a->request(&plci->NL); | 8845 | a->request(&plci->NL); |
8846 | } | 8846 | } |
@@ -8995,10 +8995,10 @@ void IndParse(PLCI * plci, word * parms_id, byte ** parms, byte multiIEsize) | |||
8995 | byte ie_compare(byte * ie1, byte * ie2) | 8995 | byte ie_compare(byte * ie1, byte * ie2) |
8996 | { | 8996 | { |
8997 | word i; | 8997 | word i; |
8998 | if(!ie1 || ! ie2) return FALSE; | 8998 | if(!ie1 || ! ie2) return false; |
8999 | if(!ie1[0]) return FALSE; | 8999 | if(!ie1[0]) return false; |
9000 | for(i=0;i<(word)(ie1[0]+1);i++) if(ie1[i]!=ie2[i]) return FALSE; | 9000 | for(i=0;i<(word)(ie1[0]+1);i++) if(ie1[i]!=ie2[i]) return false; |
9001 | return TRUE; | 9001 | return true; |
9002 | } | 9002 | } |
9003 | 9003 | ||
9004 | word find_cip(DIVA_CAPI_ADAPTER * a, byte * bc, byte * hlc) | 9004 | word find_cip(DIVA_CAPI_ADAPTER * a, byte * bc, byte * hlc) |
@@ -9151,7 +9151,7 @@ word AdvCodecSupport(DIVA_CAPI_ADAPTER *a, PLCI *plci, APPL *appl, byte ho | |||
9151 | plci->tel=ADV_VOICE; | 9151 | plci->tel=ADV_VOICE; |
9152 | } | 9152 | } |
9153 | a->AdvSignalAppl = appl; | 9153 | a->AdvSignalAppl = appl; |
9154 | a->AdvCodecFLAG = TRUE; | 9154 | a->AdvCodecFLAG = true; |
9155 | a->AdvCodecPLCI = splci; | 9155 | a->AdvCodecPLCI = splci; |
9156 | add_p(splci,CAI,"\x01\x15"); | 9156 | add_p(splci,CAI,"\x01\x15"); |
9157 | add_p(splci,LLI,"\x01\x00"); | 9157 | add_p(splci,LLI,"\x01\x00"); |
@@ -9183,7 +9183,7 @@ word AdvCodecSupport(DIVA_CAPI_ADAPTER *a, PLCI *plci, APPL *appl, byte ho | |||
9183 | add_p(splci,UID,"\x06\x43\x61\x70\x69\x32\x30"); | 9183 | add_p(splci,UID,"\x06\x43\x61\x70\x69\x32\x30"); |
9184 | sig_req(splci,ASSIGN,0xC0); /* 0xc0 is the TEL_ID */ | 9184 | sig_req(splci,ASSIGN,0xC0); /* 0xc0 is the TEL_ID */ |
9185 | send_req(splci); | 9185 | send_req(splci); |
9186 | a->scom_appl_disable = TRUE; | 9186 | a->scom_appl_disable = true; |
9187 | } | 9187 | } |
9188 | else{ | 9188 | else{ |
9189 | return 0x2001; /* wrong state, no more plcis */ | 9189 | return 0x2001; /* wrong state, no more plcis */ |
@@ -9411,7 +9411,7 @@ word CapiRelease(word Id) | |||
9411 | } | 9411 | } |
9412 | if(a->AdvSignalAppl==this) | 9412 | if(a->AdvSignalAppl==this) |
9413 | { | 9413 | { |
9414 | this->NullCREnable = FALSE; | 9414 | this->NullCREnable = false; |
9415 | if (a->AdvCodecPLCI) | 9415 | if (a->AdvCodecPLCI) |
9416 | { | 9416 | { |
9417 | plci_remove(a->AdvCodecPLCI); | 9417 | plci_remove(a->AdvCodecPLCI); |
@@ -9433,7 +9433,7 @@ word CapiRelease(word Id) | |||
9433 | 9433 | ||
9434 | static word plci_remove_check(PLCI *plci) | 9434 | static word plci_remove_check(PLCI *plci) |
9435 | { | 9435 | { |
9436 | if(!plci) return TRUE; | 9436 | if(!plci) return true; |
9437 | if(!plci->NL.Id && c_ind_mask_empty (plci)) | 9437 | if(!plci->NL.Id && c_ind_mask_empty (plci)) |
9438 | { | 9438 | { |
9439 | if(plci->Sig.Id == 0xff) | 9439 | if(plci->Sig.Id == 0xff) |
@@ -9446,7 +9446,7 @@ static word plci_remove_check(PLCI *plci) | |||
9446 | { | 9446 | { |
9447 | CodecIdCheck(plci->adapter, plci); | 9447 | CodecIdCheck(plci->adapter, plci); |
9448 | clear_b1_config (plci); | 9448 | clear_b1_config (plci); |
9449 | ncci_remove (plci, 0, FALSE); | 9449 | ncci_remove (plci, 0, false); |
9450 | plci_free_msg_in_queue (plci); | 9450 | plci_free_msg_in_queue (plci); |
9451 | channel_flow_control_remove (plci); | 9451 | channel_flow_control_remove (plci); |
9452 | plci->Id = 0; | 9452 | plci->Id = 0; |
@@ -9456,10 +9456,10 @@ static word plci_remove_check(PLCI *plci) | |||
9456 | plci->notifiedcall = 0; | 9456 | plci->notifiedcall = 0; |
9457 | } | 9457 | } |
9458 | listen_check(plci->adapter); | 9458 | listen_check(plci->adapter); |
9459 | return TRUE; | 9459 | return true; |
9460 | } | 9460 | } |
9461 | } | 9461 | } |
9462 | return FALSE; | 9462 | return false; |
9463 | } | 9463 | } |
9464 | 9464 | ||
9465 | 9465 | ||
@@ -9564,7 +9564,7 @@ static struct | |||
9564 | 9564 | ||
9565 | }; | 9565 | }; |
9566 | 9566 | ||
9567 | #define DTMF_DIGIT_MAP_ENTRIES (sizeof(dtmf_digit_map) / sizeof(dtmf_digit_map[0])) | 9567 | #define DTMF_DIGIT_MAP_ENTRIES ARRAY_SIZE(dtmf_digit_map) |
9568 | 9568 | ||
9569 | 9569 | ||
9570 | static void dtmf_enable_receiver (PLCI *plci, byte enable_mask) | 9570 | static void dtmf_enable_receiver (PLCI *plci, byte enable_mask) |
@@ -9815,7 +9815,7 @@ static void dtmf_command (dword Id, PLCI *plci, byte Rc) | |||
9815 | } | 9815 | } |
9816 | plci->dtmf_rec_active &= ~mask; | 9816 | plci->dtmf_rec_active &= ~mask; |
9817 | plci->internal_command = DTMF_COMMAND_2; | 9817 | plci->internal_command = DTMF_COMMAND_2; |
9818 | dtmf_enable_receiver (plci, FALSE); | 9818 | dtmf_enable_receiver (plci, false); |
9819 | return; | 9819 | return; |
9820 | } | 9820 | } |
9821 | Rc = OK; | 9821 | Rc = OK; |
@@ -10020,7 +10020,7 @@ static byte dtmf_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI | |||
10020 | } | 10020 | } |
10021 | } | 10021 | } |
10022 | start_internal_command (Id, plci, dtmf_command); | 10022 | start_internal_command (Id, plci, dtmf_command); |
10023 | return (FALSE); | 10023 | return (false); |
10024 | 10024 | ||
10025 | 10025 | ||
10026 | case DTMF_SEND_TONE: | 10026 | case DTMF_SEND_TONE: |
@@ -10069,8 +10069,7 @@ static byte dtmf_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI | |||
10069 | PUT_WORD (&result[1], DTMF_INCORRECT_DIGIT); | 10069 | PUT_WORD (&result[1], DTMF_INCORRECT_DIGIT); |
10070 | break; | 10070 | break; |
10071 | } | 10071 | } |
10072 | if (plci->dtmf_send_requests >= | 10072 | if (plci->dtmf_send_requests >= ARRAY_SIZE(plci->dtmf_msg_number_queue)) |
10073 | sizeof(plci->dtmf_msg_number_queue) / sizeof(plci->dtmf_msg_number_queue[0])) | ||
10074 | { | 10073 | { |
10075 | dbug (1, dprintf ("[%06lx] %s,%d: DTMF request overrun", | 10074 | dbug (1, dprintf ("[%06lx] %s,%d: DTMF request overrun", |
10076 | UnMapId (Id), (char *)(FILE_), __LINE__)); | 10075 | UnMapId (Id), (char *)(FILE_), __LINE__)); |
@@ -10079,7 +10078,7 @@ static byte dtmf_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI | |||
10079 | } | 10078 | } |
10080 | api_save_msg (dtmf_parms, "wwws", &plci->saved_msg); | 10079 | api_save_msg (dtmf_parms, "wwws", &plci->saved_msg); |
10081 | start_internal_command (Id, plci, dtmf_command); | 10080 | start_internal_command (Id, plci, dtmf_command); |
10082 | return (FALSE); | 10081 | return (false); |
10083 | 10082 | ||
10084 | default: | 10083 | default: |
10085 | dbug (1, dprintf ("[%06lx] %s,%d: DTMF unknown request %04x", | 10084 | dbug (1, dprintf ("[%06lx] %s,%d: DTMF unknown request %04x", |
@@ -10090,7 +10089,7 @@ static byte dtmf_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI | |||
10090 | } | 10089 | } |
10091 | sendf (appl, _FACILITY_R | CONFIRM, Id & 0xffffL, Number, | 10090 | sendf (appl, _FACILITY_R | CONFIRM, Id & 0xffffL, Number, |
10092 | "wws", Info, SELECTOR_DTMF, result); | 10091 | "wws", Info, SELECTOR_DTMF, result); |
10093 | return (FALSE); | 10092 | return (false); |
10094 | } | 10093 | } |
10095 | 10094 | ||
10096 | 10095 | ||
@@ -10842,10 +10841,10 @@ static struct | |||
10842 | byte to_pc; | 10841 | byte to_pc; |
10843 | } xconnect_write_prog[] = | 10842 | } xconnect_write_prog[] = |
10844 | { | 10843 | { |
10845 | { LI_COEF_CH_CH, FALSE, FALSE }, | 10844 | { LI_COEF_CH_CH, false, false }, |
10846 | { LI_COEF_CH_PC, FALSE, TRUE }, | 10845 | { LI_COEF_CH_PC, false, true }, |
10847 | { LI_COEF_PC_CH, TRUE, FALSE }, | 10846 | { LI_COEF_PC_CH, true, false }, |
10848 | { LI_COEF_PC_PC, TRUE, TRUE } | 10847 | { LI_COEF_PC_PC, true, true } |
10849 | }; | 10848 | }; |
10850 | 10849 | ||
10851 | 10850 | ||
@@ -10916,7 +10915,7 @@ static byte xconnect_write_coefs_process (dword Id, PLCI *plci, byte Rc) | |||
10916 | { | 10915 | { |
10917 | dbug (1, dprintf ("[%06x] %s,%d: Channel id wiped out", | 10916 | dbug (1, dprintf ("[%06x] %s,%d: Channel id wiped out", |
10918 | UnMapId (Id), (char *)(FILE_), __LINE__)); | 10917 | UnMapId (Id), (char *)(FILE_), __LINE__)); |
10919 | return (TRUE); | 10918 | return (true); |
10920 | } | 10919 | } |
10921 | i = a->li_base + (plci->li_bchannel_id - 1); | 10920 | i = a->li_base + (plci->li_bchannel_id - 1); |
10922 | j = plci->li_write_channel; | 10921 | j = plci->li_write_channel; |
@@ -10927,7 +10926,7 @@ static byte xconnect_write_coefs_process (dword Id, PLCI *plci, byte Rc) | |||
10927 | { | 10926 | { |
10928 | dbug (1, dprintf ("[%06lx] %s,%d: LI write coefs failed %02x", | 10927 | dbug (1, dprintf ("[%06lx] %s,%d: LI write coefs failed %02x", |
10929 | UnMapId (Id), (char *)(FILE_), __LINE__, Rc)); | 10928 | UnMapId (Id), (char *)(FILE_), __LINE__, Rc)); |
10930 | return (FALSE); | 10929 | return (false); |
10931 | } | 10930 | } |
10932 | } | 10931 | } |
10933 | if (li_config_table[i].adapter->manufacturer_features & MANUFACTURER_FEATURE_XCONNECT) | 10932 | if (li_config_table[i].adapter->manufacturer_features & MANUFACTURER_FEATURE_XCONNECT) |
@@ -10969,7 +10968,7 @@ static byte xconnect_write_coefs_process (dword Id, PLCI *plci, byte Rc) | |||
10969 | { | 10968 | { |
10970 | plci->internal_command = plci->li_write_command; | 10969 | plci->internal_command = plci->li_write_command; |
10971 | if (plci_nl_busy (plci)) | 10970 | if (plci_nl_busy (plci)) |
10972 | return (TRUE); | 10971 | return (true); |
10973 | to_ch = (a->li_pri) ? plci->li_bchannel_id - 1 : 0; | 10972 | to_ch = (a->li_pri) ? plci->li_bchannel_id - 1 : 0; |
10974 | *(p++) = UDATA_REQUEST_XCONNECT_TO; | 10973 | *(p++) = UDATA_REQUEST_XCONNECT_TO; |
10975 | do | 10974 | do |
@@ -11018,9 +11017,9 @@ static byte xconnect_write_coefs_process (dword Id, PLCI *plci, byte Rc) | |||
11018 | li_config_table[i].coef_table[j] ^= xconnect_write_prog[n].mask << 4; | 11017 | li_config_table[i].coef_table[j] ^= xconnect_write_prog[n].mask << 4; |
11019 | } | 11018 | } |
11020 | n++; | 11019 | n++; |
11021 | } while ((n < sizeof(xconnect_write_prog) / sizeof(xconnect_write_prog[0])) | 11020 | } while ((n < ARRAY_SIZE(xconnect_write_prog)) |
11022 | && ((p - plci->internal_req_buffer) + 16 < INTERNAL_REQ_BUFFER_SIZE)); | 11021 | && ((p - plci->internal_req_buffer) + 16 < INTERNAL_REQ_BUFFER_SIZE)); |
11023 | if (n == sizeof(xconnect_write_prog) / sizeof(xconnect_write_prog[0])) | 11022 | if (n == ARRAY_SIZE(xconnect_write_prog)) |
11024 | { | 11023 | { |
11025 | do | 11024 | do |
11026 | { | 11025 | { |
@@ -11050,7 +11049,7 @@ static byte xconnect_write_coefs_process (dword Id, PLCI *plci, byte Rc) | |||
11050 | { | 11049 | { |
11051 | plci->internal_command = plci->li_write_command; | 11050 | plci->internal_command = plci->li_write_command; |
11052 | if (plci_nl_busy (plci)) | 11051 | if (plci_nl_busy (plci)) |
11053 | return (TRUE); | 11052 | return (true); |
11054 | if (a->li_pri) | 11053 | if (a->li_pri) |
11055 | { | 11054 | { |
11056 | *(p++) = UDATA_REQUEST_SET_MIXER_COEFS_PRI_SYNC; | 11055 | *(p++) = UDATA_REQUEST_SET_MIXER_COEFS_PRI_SYNC; |
@@ -11090,7 +11089,7 @@ static byte xconnect_write_coefs_process (dword Id, PLCI *plci, byte Rc) | |||
11090 | ch_map[j+1] = (byte)(j+1); | 11089 | ch_map[j+1] = (byte)(j+1); |
11091 | } | 11090 | } |
11092 | } | 11091 | } |
11093 | for (n = 0; n < sizeof(mixer_write_prog_bri) / sizeof(mixer_write_prog_bri[0]); n++) | 11092 | for (n = 0; n < ARRAY_SIZE(mixer_write_prog_bri); n++) |
11094 | { | 11093 | { |
11095 | i = a->li_base + ch_map[mixer_write_prog_bri[n].to_ch]; | 11094 | i = a->li_base + ch_map[mixer_write_prog_bri[n].to_ch]; |
11096 | j = a->li_base + ch_map[mixer_write_prog_bri[n].from_ch]; | 11095 | j = a->li_base + ch_map[mixer_write_prog_bri[n].from_ch]; |
@@ -11127,7 +11126,7 @@ static byte xconnect_write_coefs_process (dword Id, PLCI *plci, byte Rc) | |||
11127 | { | 11126 | { |
11128 | plci->internal_command = plci->li_write_command; | 11127 | plci->internal_command = plci->li_write_command; |
11129 | if (plci_nl_busy (plci)) | 11128 | if (plci_nl_busy (plci)) |
11130 | return (TRUE); | 11129 | return (true); |
11131 | if (j < a->li_base) | 11130 | if (j < a->li_base) |
11132 | j = a->li_base; | 11131 | j = a->li_base; |
11133 | if (a->li_pri) | 11132 | if (a->li_pri) |
@@ -11140,7 +11139,7 @@ static byte xconnect_write_coefs_process (dword Id, PLCI *plci, byte Rc) | |||
11140 | w |= MIXER_FEATURE_ENABLE_RX_DATA; | 11139 | w |= MIXER_FEATURE_ENABLE_RX_DATA; |
11141 | *(p++) = (byte) w; | 11140 | *(p++) = (byte) w; |
11142 | *(p++) = (byte)(w >> 8); | 11141 | *(p++) = (byte)(w >> 8); |
11143 | for (n = 0; n < sizeof(mixer_write_prog_pri) / sizeof(mixer_write_prog_pri[0]); n++) | 11142 | for (n = 0; n < ARRAY_SIZE(mixer_write_prog_pri); n++) |
11144 | { | 11143 | { |
11145 | *(p++) = (byte)((plci->li_bchannel_id - 1) | mixer_write_prog_pri[n].line_flags); | 11144 | *(p++) = (byte)((plci->li_bchannel_id - 1) | mixer_write_prog_pri[n].line_flags); |
11146 | for (j = a->li_base; j < a->li_base + MIXER_CHANNELS_PRI; j++) | 11145 | for (j = a->li_base; j < a->li_base + MIXER_CHANNELS_PRI; j++) |
@@ -11196,7 +11195,7 @@ static byte xconnect_write_coefs_process (dword Id, PLCI *plci, byte Rc) | |||
11196 | ch_map[j+1] = (byte)(j+1); | 11195 | ch_map[j+1] = (byte)(j+1); |
11197 | } | 11196 | } |
11198 | } | 11197 | } |
11199 | for (n = 0; n < sizeof(mixer_write_prog_bri) / sizeof(mixer_write_prog_bri[0]); n++) | 11198 | for (n = 0; n < ARRAY_SIZE(mixer_write_prog_bri); n++) |
11200 | { | 11199 | { |
11201 | i = a->li_base + ch_map[mixer_write_prog_bri[n].to_ch]; | 11200 | i = a->li_base + ch_map[mixer_write_prog_bri[n].to_ch]; |
11202 | j = a->li_base + ch_map[mixer_write_prog_bri[n].from_ch]; | 11201 | j = a->li_base + ch_map[mixer_write_prog_bri[n].from_ch]; |
@@ -11232,7 +11231,7 @@ static byte xconnect_write_coefs_process (dword Id, PLCI *plci, byte Rc) | |||
11232 | plci->NL.Req = plci->nl_req = (byte) N_UDATA; | 11231 | plci->NL.Req = plci->nl_req = (byte) N_UDATA; |
11233 | plci->adapter->request (&plci->NL); | 11232 | plci->adapter->request (&plci->NL); |
11234 | } | 11233 | } |
11235 | return (TRUE); | 11234 | return (true); |
11236 | } | 11235 | } |
11237 | 11236 | ||
11238 | 11237 | ||
@@ -11251,7 +11250,7 @@ static void mixer_notify_update (PLCI *plci, byte others) | |||
11251 | if (a->profile.Global_Options & GL_LINE_INTERCONNECT_SUPPORTED) | 11250 | if (a->profile.Global_Options & GL_LINE_INTERCONNECT_SUPPORTED) |
11252 | { | 11251 | { |
11253 | if (others) | 11252 | if (others) |
11254 | plci->li_notify_update = TRUE; | 11253 | plci->li_notify_update = true; |
11255 | i = 0; | 11254 | i = 0; |
11256 | do | 11255 | do |
11257 | { | 11256 | { |
@@ -11277,7 +11276,7 @@ static void mixer_notify_update (PLCI *plci, byte others) | |||
11277 | && (notify_plci->State) | 11276 | && (notify_plci->State) |
11278 | && notify_plci->NL.Id && !notify_plci->nl_remove_id) | 11277 | && notify_plci->NL.Id && !notify_plci->nl_remove_id) |
11279 | { | 11278 | { |
11280 | notify_plci->li_notify_update = TRUE; | 11279 | notify_plci->li_notify_update = true; |
11281 | ((CAPI_MSG *) msg)->header.length = 18; | 11280 | ((CAPI_MSG *) msg)->header.length = 18; |
11282 | ((CAPI_MSG *) msg)->header.appl_id = notify_plci->appl->Id; | 11281 | ((CAPI_MSG *) msg)->header.appl_id = notify_plci->appl->Id; |
11283 | ((CAPI_MSG *) msg)->header.command = _FACILITY_R; | 11282 | ((CAPI_MSG *) msg)->header.command = _FACILITY_R; |
@@ -11299,12 +11298,12 @@ static void mixer_notify_update (PLCI *plci, byte others) | |||
11299 | (char *)(FILE_), __LINE__, | 11298 | (char *)(FILE_), __LINE__, |
11300 | (dword)((notify_plci->Id << 8) | UnMapController (notify_plci->adapter->Id)), w)); | 11299 | (dword)((notify_plci->Id << 8) | UnMapController (notify_plci->adapter->Id)), w)); |
11301 | } | 11300 | } |
11302 | notify_plci->li_notify_update = FALSE; | 11301 | notify_plci->li_notify_update = false; |
11303 | } | 11302 | } |
11304 | } | 11303 | } |
11305 | } while (others && (notify_plci != NULL)); | 11304 | } while (others && (notify_plci != NULL)); |
11306 | if (others) | 11305 | if (others) |
11307 | plci->li_notify_update = FALSE; | 11306 | plci->li_notify_update = false; |
11308 | } | 11307 | } |
11309 | } | 11308 | } |
11310 | 11309 | ||
@@ -11318,7 +11317,7 @@ static void mixer_clear_config (PLCI *plci) | |||
11318 | (dword)((plci->Id << 8) | UnMapController (plci->adapter->Id)), | 11317 | (dword)((plci->Id << 8) | UnMapController (plci->adapter->Id)), |
11319 | (char *)(FILE_), __LINE__)); | 11318 | (char *)(FILE_), __LINE__)); |
11320 | 11319 | ||
11321 | plci->li_notify_update = FALSE; | 11320 | plci->li_notify_update = false; |
11322 | plci->li_plci_b_write_pos = 0; | 11321 | plci->li_plci_b_write_pos = 0; |
11323 | plci->li_plci_b_read_pos = 0; | 11322 | plci->li_plci_b_read_pos = 0; |
11324 | plci->li_plci_b_req_pos = 0; | 11323 | plci->li_plci_b_req_pos = 0; |
@@ -12159,7 +12158,7 @@ static byte mixer_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI | |||
12159 | plci_b = li_check_plci_b (Id, plci, plci_b_id, plci_b_write_pos, &result[8]); | 12158 | plci_b = li_check_plci_b (Id, plci, plci_b_id, plci_b_write_pos, &result[8]); |
12160 | if (plci_b == NULL) | 12159 | if (plci_b == NULL) |
12161 | break; | 12160 | break; |
12162 | li_update_connect (Id, a, plci, plci_b_id, TRUE, li_flags); | 12161 | li_update_connect (Id, a, plci, plci_b_id, true, li_flags); |
12163 | plci->li_plci_b_queue[plci_b_write_pos] = plci_b_id | LI_PLCI_B_LAST_FLAG; | 12162 | plci->li_plci_b_queue[plci_b_write_pos] = plci_b_id | LI_PLCI_B_LAST_FLAG; |
12164 | plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES-1) ? 0 : plci_b_write_pos + 1; | 12163 | plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES-1) ? 0 : plci_b_write_pos + 1; |
12165 | plci->li_plci_b_write_pos = plci_b_write_pos; | 12164 | plci->li_plci_b_write_pos = plci_b_write_pos; |
@@ -12188,7 +12187,7 @@ static byte mixer_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI | |||
12188 | plci_b_write_pos = plci->li_plci_b_write_pos; | 12187 | plci_b_write_pos = plci->li_plci_b_write_pos; |
12189 | participant_parms_pos = 0; | 12188 | participant_parms_pos = 0; |
12190 | result_pos = 7; | 12189 | result_pos = 7; |
12191 | li2_update_connect (Id, a, plci, UnMapId (Id), TRUE, li_flags); | 12190 | li2_update_connect (Id, a, plci, UnMapId (Id), true, li_flags); |
12192 | while (participant_parms_pos < li_req_parms[1].length) | 12191 | while (participant_parms_pos < li_req_parms[1].length) |
12193 | { | 12192 | { |
12194 | result[result_pos] = 6; | 12193 | result[result_pos] = 6; |
@@ -12224,7 +12223,7 @@ static byte mixer_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI | |||
12224 | plci_b = li2_check_plci_b (Id, plci, plci_b_id, plci_b_write_pos, &result[result_pos - 2]); | 12223 | plci_b = li2_check_plci_b (Id, plci, plci_b_id, plci_b_write_pos, &result[result_pos - 2]); |
12225 | if (plci_b != NULL) | 12224 | if (plci_b != NULL) |
12226 | { | 12225 | { |
12227 | li2_update_connect (Id, a, plci, plci_b_id, TRUE, li_flags); | 12226 | li2_update_connect (Id, a, plci, plci_b_id, true, li_flags); |
12228 | plci->li_plci_b_queue[plci_b_write_pos] = plci_b_id | | 12227 | plci->li_plci_b_queue[plci_b_write_pos] = plci_b_id | |
12229 | ((li_flags & (LI2_FLAG_INTERCONNECT_A_B | LI2_FLAG_INTERCONNECT_B_A | | 12228 | ((li_flags & (LI2_FLAG_INTERCONNECT_A_B | LI2_FLAG_INTERCONNECT_B_A | |
12230 | LI2_FLAG_PCCONNECT_A_B | LI2_FLAG_PCCONNECT_B_A)) ? 0 : LI_PLCI_B_DISC_FLAG); | 12229 | LI2_FLAG_PCCONNECT_A_B | LI2_FLAG_PCCONNECT_B_A)) ? 0 : LI_PLCI_B_DISC_FLAG); |
@@ -12249,13 +12248,13 @@ static byte mixer_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI | |||
12249 | } | 12248 | } |
12250 | mixer_calculate_coefs (a); | 12249 | mixer_calculate_coefs (a); |
12251 | plci->li_channel_bits = li_config_table[a->li_base + (plci->li_bchannel_id - 1)].channel; | 12250 | plci->li_channel_bits = li_config_table[a->li_base + (plci->li_bchannel_id - 1)].channel; |
12252 | mixer_notify_update (plci, TRUE); | 12251 | mixer_notify_update (plci, true); |
12253 | sendf (appl, _FACILITY_R | CONFIRM, Id & 0xffffL, Number, | 12252 | sendf (appl, _FACILITY_R | CONFIRM, Id & 0xffffL, Number, |
12254 | "wwS", Info, SELECTOR_LINE_INTERCONNECT, result); | 12253 | "wwS", Info, SELECTOR_LINE_INTERCONNECT, result); |
12255 | plci->command = 0; | 12254 | plci->command = 0; |
12256 | plci->li_cmd = GET_WORD (li_parms[0].info); | 12255 | plci->li_cmd = GET_WORD (li_parms[0].info); |
12257 | start_internal_command (Id, plci, mixer_command); | 12256 | start_internal_command (Id, plci, mixer_command); |
12258 | return (FALSE); | 12257 | return (false); |
12259 | 12258 | ||
12260 | case LI_REQ_DISCONNECT: | 12259 | case LI_REQ_DISCONNECT: |
12261 | if (li_parms[1].length == 4) | 12260 | if (li_parms[1].length == 4) |
@@ -12283,7 +12282,7 @@ static byte mixer_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI | |||
12283 | plci_b = li_check_plci_b (Id, plci, plci_b_id, plci_b_write_pos, &result[8]); | 12282 | plci_b = li_check_plci_b (Id, plci, plci_b_id, plci_b_write_pos, &result[8]); |
12284 | if (plci_b == NULL) | 12283 | if (plci_b == NULL) |
12285 | break; | 12284 | break; |
12286 | li_update_connect (Id, a, plci, plci_b_id, FALSE, 0); | 12285 | li_update_connect (Id, a, plci, plci_b_id, false, 0); |
12287 | plci->li_plci_b_queue[plci_b_write_pos] = plci_b_id | LI_PLCI_B_DISC_FLAG | LI_PLCI_B_LAST_FLAG; | 12286 | plci->li_plci_b_queue[plci_b_write_pos] = plci_b_id | LI_PLCI_B_DISC_FLAG | LI_PLCI_B_LAST_FLAG; |
12288 | plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES-1) ? 0 : plci_b_write_pos + 1; | 12287 | plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES-1) ? 0 : plci_b_write_pos + 1; |
12289 | plci->li_plci_b_write_pos = plci_b_write_pos; | 12288 | plci->li_plci_b_write_pos = plci_b_write_pos; |
@@ -12345,7 +12344,7 @@ static byte mixer_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI | |||
12345 | plci_b = li2_check_plci_b (Id, plci, plci_b_id, plci_b_write_pos, &result[result_pos - 2]); | 12344 | plci_b = li2_check_plci_b (Id, plci, plci_b_id, plci_b_write_pos, &result[result_pos - 2]); |
12346 | if (plci_b != NULL) | 12345 | if (plci_b != NULL) |
12347 | { | 12346 | { |
12348 | li2_update_connect (Id, a, plci, plci_b_id, FALSE, 0); | 12347 | li2_update_connect (Id, a, plci, plci_b_id, false, 0); |
12349 | plci->li_plci_b_queue[plci_b_write_pos] = plci_b_id | LI_PLCI_B_DISC_FLAG; | 12348 | plci->li_plci_b_queue[plci_b_write_pos] = plci_b_id | LI_PLCI_B_DISC_FLAG; |
12350 | plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES-1) ? 0 : plci_b_write_pos + 1; | 12349 | plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES-1) ? 0 : plci_b_write_pos + 1; |
12351 | } | 12350 | } |
@@ -12368,13 +12367,13 @@ static byte mixer_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI | |||
12368 | } | 12367 | } |
12369 | mixer_calculate_coefs (a); | 12368 | mixer_calculate_coefs (a); |
12370 | plci->li_channel_bits = li_config_table[a->li_base + (plci->li_bchannel_id - 1)].channel; | 12369 | plci->li_channel_bits = li_config_table[a->li_base + (plci->li_bchannel_id - 1)].channel; |
12371 | mixer_notify_update (plci, TRUE); | 12370 | mixer_notify_update (plci, true); |
12372 | sendf (appl, _FACILITY_R | CONFIRM, Id & 0xffffL, Number, | 12371 | sendf (appl, _FACILITY_R | CONFIRM, Id & 0xffffL, Number, |
12373 | "wwS", Info, SELECTOR_LINE_INTERCONNECT, result); | 12372 | "wwS", Info, SELECTOR_LINE_INTERCONNECT, result); |
12374 | plci->command = 0; | 12373 | plci->command = 0; |
12375 | plci->li_cmd = GET_WORD (li_parms[0].info); | 12374 | plci->li_cmd = GET_WORD (li_parms[0].info); |
12376 | start_internal_command (Id, plci, mixer_command); | 12375 | start_internal_command (Id, plci, mixer_command); |
12377 | return (FALSE); | 12376 | return (false); |
12378 | 12377 | ||
12379 | case LI_REQ_SILENT_UPDATE: | 12378 | case LI_REQ_SILENT_UPDATE: |
12380 | if (!plci || !plci->State | 12379 | if (!plci || !plci->State |
@@ -12384,7 +12383,7 @@ static byte mixer_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI | |||
12384 | { | 12383 | { |
12385 | dbug (1, dprintf ("[%06lx] %s,%d: Wrong state", | 12384 | dbug (1, dprintf ("[%06lx] %s,%d: Wrong state", |
12386 | UnMapId (Id), (char *)(FILE_), __LINE__)); | 12385 | UnMapId (Id), (char *)(FILE_), __LINE__)); |
12387 | return (FALSE); | 12386 | return (false); |
12388 | } | 12387 | } |
12389 | plci_b_write_pos = plci->li_plci_b_write_pos; | 12388 | plci_b_write_pos = plci->li_plci_b_write_pos; |
12390 | if (((plci->li_plci_b_read_pos > plci_b_write_pos) ? plci->li_plci_b_read_pos : | 12389 | if (((plci->li_plci_b_read_pos > plci_b_write_pos) ? plci->li_plci_b_read_pos : |
@@ -12392,7 +12391,7 @@ static byte mixer_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI | |||
12392 | { | 12391 | { |
12393 | dbug (1, dprintf ("[%06lx] %s,%d: LI request overrun", | 12392 | dbug (1, dprintf ("[%06lx] %s,%d: LI request overrun", |
12394 | UnMapId (Id), (char *)(FILE_), __LINE__)); | 12393 | UnMapId (Id), (char *)(FILE_), __LINE__)); |
12395 | return (FALSE); | 12394 | return (false); |
12396 | } | 12395 | } |
12397 | i = (plci_b_write_pos == 0) ? LI_PLCI_B_QUEUE_ENTRIES-1 : plci_b_write_pos - 1; | 12396 | i = (plci_b_write_pos == 0) ? LI_PLCI_B_QUEUE_ENTRIES-1 : plci_b_write_pos - 1; |
12398 | if ((plci_b_write_pos == plci->li_plci_b_read_pos) | 12397 | if ((plci_b_write_pos == plci->li_plci_b_read_pos) |
@@ -12408,7 +12407,7 @@ static byte mixer_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI | |||
12408 | plci->command = 0; | 12407 | plci->command = 0; |
12409 | plci->li_cmd = GET_WORD (li_parms[0].info); | 12408 | plci->li_cmd = GET_WORD (li_parms[0].info); |
12410 | start_internal_command (Id, plci, mixer_command); | 12409 | start_internal_command (Id, plci, mixer_command); |
12411 | return (FALSE); | 12410 | return (false); |
12412 | 12411 | ||
12413 | default: | 12412 | default: |
12414 | dbug (1, dprintf ("[%06lx] %s,%d: LI unknown request %04x", | 12413 | dbug (1, dprintf ("[%06lx] %s,%d: LI unknown request %04x", |
@@ -12418,7 +12417,7 @@ static byte mixer_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI | |||
12418 | } | 12417 | } |
12419 | sendf (appl, _FACILITY_R | CONFIRM, Id & 0xffffL, Number, | 12418 | sendf (appl, _FACILITY_R | CONFIRM, Id & 0xffffL, Number, |
12420 | "wwS", Info, SELECTOR_LINE_INTERCONNECT, result); | 12419 | "wwS", Info, SELECTOR_LINE_INTERCONNECT, result); |
12421 | return (FALSE); | 12420 | return (false); |
12422 | } | 12421 | } |
12423 | 12422 | ||
12424 | 12423 | ||
@@ -12523,7 +12522,7 @@ static void mixer_indication_xconnect_from (dword Id, PLCI *plci, byte *msg, | |||
12523 | if (!plci->internal_command) | 12522 | if (!plci->internal_command) |
12524 | next_internal_command (Id, plci); | 12523 | next_internal_command (Id, plci); |
12525 | } | 12524 | } |
12526 | mixer_notify_update (plci, TRUE); | 12525 | mixer_notify_update (plci, true); |
12527 | } | 12526 | } |
12528 | 12527 | ||
12529 | 12528 | ||
@@ -12547,12 +12546,12 @@ static byte mixer_notify_source_removed (PLCI *plci, dword plci_b_id) | |||
12547 | dbug (1, dprintf ("[%06lx] %s,%d: LI request overrun", | 12546 | dbug (1, dprintf ("[%06lx] %s,%d: LI request overrun", |
12548 | (dword)((plci->Id << 8) | UnMapController (plci->adapter->Id)), | 12547 | (dword)((plci->Id << 8) | UnMapController (plci->adapter->Id)), |
12549 | (char *)(FILE_), __LINE__)); | 12548 | (char *)(FILE_), __LINE__)); |
12550 | return (FALSE); | 12549 | return (false); |
12551 | } | 12550 | } |
12552 | plci->li_plci_b_queue[plci_b_write_pos] = plci_b_id | LI_PLCI_B_DISC_FLAG; | 12551 | plci->li_plci_b_queue[plci_b_write_pos] = plci_b_id | LI_PLCI_B_DISC_FLAG; |
12553 | plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES-1) ? 0 : plci_b_write_pos + 1; | 12552 | plci_b_write_pos = (plci_b_write_pos == LI_PLCI_B_QUEUE_ENTRIES-1) ? 0 : plci_b_write_pos + 1; |
12554 | plci->li_plci_b_write_pos = plci_b_write_pos; | 12553 | plci->li_plci_b_write_pos = plci_b_write_pos; |
12555 | return (TRUE); | 12554 | return (true); |
12556 | } | 12555 | } |
12557 | 12556 | ||
12558 | 12557 | ||
@@ -12596,7 +12595,7 @@ static void mixer_remove (PLCI *plci) | |||
12596 | } | 12595 | } |
12597 | mixer_clear_config (plci); | 12596 | mixer_clear_config (plci); |
12598 | mixer_calculate_coefs (a); | 12597 | mixer_calculate_coefs (a); |
12599 | mixer_notify_update (plci, TRUE); | 12598 | mixer_notify_update (plci, true); |
12600 | } | 12599 | } |
12601 | li_config_table[i].plci = NULL; | 12600 | li_config_table[i].plci = NULL; |
12602 | plci->li_bchannel_id = 0; | 12601 | plci->li_bchannel_id = 0; |
@@ -12883,29 +12882,29 @@ static byte ec_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI *p | |||
12883 | case EC_ENABLE_OPERATION: | 12882 | case EC_ENABLE_OPERATION: |
12884 | plci->ec_idi_options &= ~LEC_FREEZE_COEFFICIENTS; | 12883 | plci->ec_idi_options &= ~LEC_FREEZE_COEFFICIENTS; |
12885 | start_internal_command (Id, plci, ec_command); | 12884 | start_internal_command (Id, plci, ec_command); |
12886 | return (FALSE); | 12885 | return (false); |
12887 | 12886 | ||
12888 | case EC_DISABLE_OPERATION: | 12887 | case EC_DISABLE_OPERATION: |
12889 | plci->ec_idi_options = LEC_ENABLE_ECHO_CANCELLER | | 12888 | plci->ec_idi_options = LEC_ENABLE_ECHO_CANCELLER | |
12890 | LEC_MANUAL_DISABLE | LEC_ENABLE_NONLINEAR_PROCESSING | | 12889 | LEC_MANUAL_DISABLE | LEC_ENABLE_NONLINEAR_PROCESSING | |
12891 | LEC_RESET_COEFFICIENTS; | 12890 | LEC_RESET_COEFFICIENTS; |
12892 | start_internal_command (Id, plci, ec_command); | 12891 | start_internal_command (Id, plci, ec_command); |
12893 | return (FALSE); | 12892 | return (false); |
12894 | 12893 | ||
12895 | case EC_FREEZE_COEFFICIENTS: | 12894 | case EC_FREEZE_COEFFICIENTS: |
12896 | plci->ec_idi_options |= LEC_FREEZE_COEFFICIENTS; | 12895 | plci->ec_idi_options |= LEC_FREEZE_COEFFICIENTS; |
12897 | start_internal_command (Id, plci, ec_command); | 12896 | start_internal_command (Id, plci, ec_command); |
12898 | return (FALSE); | 12897 | return (false); |
12899 | 12898 | ||
12900 | case EC_RESUME_COEFFICIENT_UPDATE: | 12899 | case EC_RESUME_COEFFICIENT_UPDATE: |
12901 | plci->ec_idi_options &= ~LEC_FREEZE_COEFFICIENTS; | 12900 | plci->ec_idi_options &= ~LEC_FREEZE_COEFFICIENTS; |
12902 | start_internal_command (Id, plci, ec_command); | 12901 | start_internal_command (Id, plci, ec_command); |
12903 | return (FALSE); | 12902 | return (false); |
12904 | 12903 | ||
12905 | case EC_RESET_COEFFICIENTS: | 12904 | case EC_RESET_COEFFICIENTS: |
12906 | plci->ec_idi_options |= LEC_RESET_COEFFICIENTS; | 12905 | plci->ec_idi_options |= LEC_RESET_COEFFICIENTS; |
12907 | start_internal_command (Id, plci, ec_command); | 12906 | start_internal_command (Id, plci, ec_command); |
12908 | return (FALSE); | 12907 | return (false); |
12909 | 12908 | ||
12910 | default: | 12909 | default: |
12911 | dbug (1, dprintf ("[%06lx] %s,%d: EC unknown request %04x", | 12910 | dbug (1, dprintf ("[%06lx] %s,%d: EC unknown request %04x", |
@@ -12978,14 +12977,14 @@ static byte ec_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI *p | |||
12978 | case EC_ENABLE_OPERATION: | 12977 | case EC_ENABLE_OPERATION: |
12979 | plci->ec_idi_options &= ~LEC_FREEZE_COEFFICIENTS; | 12978 | plci->ec_idi_options &= ~LEC_FREEZE_COEFFICIENTS; |
12980 | start_internal_command (Id, plci, ec_command); | 12979 | start_internal_command (Id, plci, ec_command); |
12981 | return (FALSE); | 12980 | return (false); |
12982 | 12981 | ||
12983 | case EC_DISABLE_OPERATION: | 12982 | case EC_DISABLE_OPERATION: |
12984 | plci->ec_idi_options = LEC_ENABLE_ECHO_CANCELLER | | 12983 | plci->ec_idi_options = LEC_ENABLE_ECHO_CANCELLER | |
12985 | LEC_MANUAL_DISABLE | LEC_ENABLE_NONLINEAR_PROCESSING | | 12984 | LEC_MANUAL_DISABLE | LEC_ENABLE_NONLINEAR_PROCESSING | |
12986 | LEC_RESET_COEFFICIENTS; | 12985 | LEC_RESET_COEFFICIENTS; |
12987 | start_internal_command (Id, plci, ec_command); | 12986 | start_internal_command (Id, plci, ec_command); |
12988 | return (FALSE); | 12987 | return (false); |
12989 | 12988 | ||
12990 | default: | 12989 | default: |
12991 | dbug (1, dprintf ("[%06lx] %s,%d: EC unknown request %04x", | 12990 | dbug (1, dprintf ("[%06lx] %s,%d: EC unknown request %04x", |
@@ -12999,7 +12998,7 @@ static byte ec_request (dword Id, word Number, DIVA_CAPI_ADAPTER *a, PLCI *p | |||
12999 | sendf (appl, _FACILITY_R | CONFIRM, Id & 0xffffL, Number, | 12998 | sendf (appl, _FACILITY_R | CONFIRM, Id & 0xffffL, Number, |
13000 | "wws", Info, (appl->appl_flags & APPL_FLAG_PRIV_EC_SPEC) ? | 12999 | "wws", Info, (appl->appl_flags & APPL_FLAG_PRIV_EC_SPEC) ? |
13001 | PRIV_SELECTOR_ECHO_CANCELLER : SELECTOR_ECHO_CANCELLER, result); | 13000 | PRIV_SELECTOR_ECHO_CANCELLER : SELECTOR_ECHO_CANCELLER, result); |
13002 | return (FALSE); | 13001 | return (false); |
13003 | } | 13002 | } |
13004 | 13003 | ||
13005 | 13004 | ||
@@ -13178,7 +13177,7 @@ static void adv_voice_write_coefs (PLCI *plci, word write_command) | |||
13178 | ch_map[j] = (byte)(j + (plci->li_bchannel_id - 1)); | 13177 | ch_map[j] = (byte)(j + (plci->li_bchannel_id - 1)); |
13179 | ch_map[j+1] = (byte)(j + (2 - plci->li_bchannel_id)); | 13178 | ch_map[j+1] = (byte)(j + (2 - plci->li_bchannel_id)); |
13180 | } | 13179 | } |
13181 | for (n = 0; n < sizeof(mixer_write_prog_bri) / sizeof(mixer_write_prog_bri[0]); n++) | 13180 | for (n = 0; n < ARRAY_SIZE(mixer_write_prog_bri); n++) |
13182 | { | 13181 | { |
13183 | i = a->li_base + ch_map[mixer_write_prog_bri[n].to_ch]; | 13182 | i = a->li_base + ch_map[mixer_write_prog_bri[n].to_ch]; |
13184 | j = a->li_base + ch_map[mixer_write_prog_bri[n].from_ch]; | 13183 | j = a->li_base + ch_map[mixer_write_prog_bri[n].from_ch]; |
@@ -13563,7 +13562,7 @@ static void adjust_b_clear (PLCI *plci) | |||
13563 | (dword)((plci->Id << 8) | UnMapController (plci->adapter->Id)), | 13562 | (dword)((plci->Id << 8) | UnMapController (plci->adapter->Id)), |
13564 | (char *)(FILE_), __LINE__)); | 13563 | (char *)(FILE_), __LINE__)); |
13565 | 13564 | ||
13566 | plci->adjust_b_restore = FALSE; | 13565 | plci->adjust_b_restore = false; |
13567 | } | 13566 | } |
13568 | 13567 | ||
13569 | 13568 | ||
@@ -13832,7 +13831,7 @@ static word adjust_b_process (dword Id, PLCI *plci, byte Rc) | |||
13832 | } | 13831 | } |
13833 | if (plci->adjust_b_mode & ADJUST_B_MODE_USER_CONNECT) | 13832 | if (plci->adjust_b_mode & ADJUST_B_MODE_USER_CONNECT) |
13834 | { | 13833 | { |
13835 | plci->adjust_b_restore = TRUE; | 13834 | plci->adjust_b_restore = true; |
13836 | break; | 13835 | break; |
13837 | } | 13836 | } |
13838 | plci->adjust_b_state = ADJUST_B_CONNECT_1; | 13837 | plci->adjust_b_state = ADJUST_B_CONNECT_1; |
@@ -14603,7 +14602,7 @@ static void channel_request_xon (PLCI * plci, byte ch) { | |||
14603 | 14602 | ||
14604 | static void channel_xmit_extended_xon (PLCI * plci) { | 14603 | static void channel_xmit_extended_xon (PLCI * plci) { |
14605 | DIVA_CAPI_ADAPTER * a; | 14604 | DIVA_CAPI_ADAPTER * a; |
14606 | int max_ch = sizeof(a->ch_flow_control)/sizeof(a->ch_flow_control[0]); | 14605 | int max_ch = ARRAY_SIZE(a->ch_flow_control); |
14607 | int i, one_requested = 0; | 14606 | int i, one_requested = 0; |
14608 | 14607 | ||
14609 | if ((!plci) || (!plci->Id) || ((a = plci->adapter) == 0)) { | 14608 | if ((!plci) || (!plci->Id) || ((a = plci->adapter) == 0)) { |
@@ -14628,7 +14627,7 @@ static void channel_xmit_extended_xon (PLCI * plci) { | |||
14628 | Try to xmit next X_ON | 14627 | Try to xmit next X_ON |
14629 | */ | 14628 | */ |
14630 | static int find_channel_with_pending_x_on (DIVA_CAPI_ADAPTER * a, PLCI * plci) { | 14629 | static int find_channel_with_pending_x_on (DIVA_CAPI_ADAPTER * a, PLCI * plci) { |
14631 | int max_ch = sizeof(a->ch_flow_control)/sizeof(a->ch_flow_control[0]); | 14630 | int max_ch = ARRAY_SIZE(a->ch_flow_control); |
14632 | int i; | 14631 | int i; |
14633 | 14632 | ||
14634 | if (!(plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_XONOFF_FLOW_CONTROL)) { | 14633 | if (!(plci->adapter->manufacturer_features & MANUFACTURER_FEATURE_XONOFF_FLOW_CONTROL)) { |
@@ -14768,19 +14767,19 @@ static void group_optimization(DIVA_CAPI_ADAPTER * a, PLCI * plci) | |||
14768 | { | 14767 | { |
14769 | if(application[i].Id && a->CIP_Mask[i] ) | 14768 | if(application[i].Id && a->CIP_Mask[i] ) |
14770 | { | 14769 | { |
14771 | for(k=0,busy=FALSE; k<a->max_plci; k++) | 14770 | for(k=0,busy=false; k<a->max_plci; k++) |
14772 | { | 14771 | { |
14773 | if(a->plci[k].Id) | 14772 | if(a->plci[k].Id) |
14774 | { | 14773 | { |
14775 | auxplci = &a->plci[k]; | 14774 | auxplci = &a->plci[k]; |
14776 | if(auxplci->appl == &application[i]) /* application has a busy PLCI */ | 14775 | if(auxplci->appl == &application[i]) /* application has a busy PLCI */ |
14777 | { | 14776 | { |
14778 | busy = TRUE; | 14777 | busy = true; |
14779 | dbug(1,dprintf("Appl 0x%x is busy",i+1)); | 14778 | dbug(1,dprintf("Appl 0x%x is busy",i+1)); |
14780 | } | 14779 | } |
14781 | else if(test_c_ind_mask_bit (auxplci, i)) /* application has an incoming call pending */ | 14780 | else if(test_c_ind_mask_bit (auxplci, i)) /* application has an incoming call pending */ |
14782 | { | 14781 | { |
14783 | busy = TRUE; | 14782 | busy = true; |
14784 | dbug(1,dprintf("Appl 0x%x has inc. call pending",i+1)); | 14783 | dbug(1,dprintf("Appl 0x%x has inc. call pending",i+1)); |
14785 | } | 14784 | } |
14786 | } | 14785 | } |
@@ -14791,13 +14790,13 @@ static void group_optimization(DIVA_CAPI_ADAPTER * a, PLCI * plci) | |||
14791 | if(j==MAX_CIP_TYPES) /* all groups are in use but group still not found */ | 14790 | if(j==MAX_CIP_TYPES) /* all groups are in use but group still not found */ |
14792 | { /* the MAX_CIP_TYPES group enables all calls because of field overflow */ | 14791 | { /* the MAX_CIP_TYPES group enables all calls because of field overflow */ |
14793 | appl_number_group_type[i] = MAX_CIP_TYPES; | 14792 | appl_number_group_type[i] = MAX_CIP_TYPES; |
14794 | group_found=TRUE; | 14793 | group_found=true; |
14795 | dbug(1,dprintf("Field overflow appl 0x%x",i+1)); | 14794 | dbug(1,dprintf("Field overflow appl 0x%x",i+1)); |
14796 | } | 14795 | } |
14797 | else if( (info_mask_group[j]==a->CIP_Mask[i]) && (cip_mask_group[j]==a->Info_Mask[i]) ) | 14796 | else if( (info_mask_group[j]==a->CIP_Mask[i]) && (cip_mask_group[j]==a->Info_Mask[i]) ) |
14798 | { /* is group already present ? */ | 14797 | { /* is group already present ? */ |
14799 | appl_number_group_type[i] = j|0x80; /* store the group number for each application */ | 14798 | appl_number_group_type[i] = j|0x80; /* store the group number for each application */ |
14800 | group_found=TRUE; | 14799 | group_found=true; |
14801 | dbug(1,dprintf("Group 0x%x found with appl 0x%x, CIP=0x%lx",appl_number_group_type[i],i+1,info_mask_group[j])); | 14800 | dbug(1,dprintf("Group 0x%x found with appl 0x%x, CIP=0x%lx",appl_number_group_type[i],i+1,info_mask_group[j])); |
14802 | } | 14801 | } |
14803 | else if(!info_mask_group[j]) | 14802 | else if(!info_mask_group[j]) |
@@ -14805,7 +14804,7 @@ static void group_optimization(DIVA_CAPI_ADAPTER * a, PLCI * plci) | |||
14805 | appl_number_group_type[i] = j|0x80; /* store the group number for each application */ | 14804 | appl_number_group_type[i] = j|0x80; /* store the group number for each application */ |
14806 | info_mask_group[j] = a->CIP_Mask[i]; /* store the new CIP mask for the new group */ | 14805 | info_mask_group[j] = a->CIP_Mask[i]; /* store the new CIP mask for the new group */ |
14807 | cip_mask_group[j] = a->Info_Mask[i]; /* store the new Info_Mask for this new group */ | 14806 | cip_mask_group[j] = a->Info_Mask[i]; /* store the new Info_Mask for this new group */ |
14808 | group_found=TRUE; | 14807 | group_found=true; |
14809 | dbug(1,dprintf("New Group 0x%x established with appl 0x%x, CIP=0x%lx",appl_number_group_type[i],i+1,info_mask_group[j])); | 14808 | dbug(1,dprintf("New Group 0x%x established with appl 0x%x, CIP=0x%lx",appl_number_group_type[i],i+1,info_mask_group[j])); |
14810 | } | 14809 | } |
14811 | } | 14810 | } |
@@ -14860,7 +14859,7 @@ word CapiRegister(word id) | |||
14860 | } | 14859 | } |
14861 | } | 14860 | } |
14862 | 14861 | ||
14863 | if(appls_found) return TRUE; | 14862 | if(appls_found) return true; |
14864 | for(i=0; i<max_adapter; i++) /* scan all adapters... */ | 14863 | for(i=0; i<max_adapter; i++) /* scan all adapters... */ |
14865 | { | 14864 | { |
14866 | a = &adapter[i]; | 14865 | a = &adapter[i]; |
@@ -14889,7 +14888,7 @@ word CapiRegister(word id) | |||
14889 | } | 14888 | } |
14890 | } | 14889 | } |
14891 | } | 14890 | } |
14892 | return FALSE; | 14891 | return false; |
14893 | } | 14892 | } |
14894 | 14893 | ||
14895 | /*------------------------------------------------------------------*/ | 14894 | /*------------------------------------------------------------------*/ |
diff --git a/drivers/isdn/hardware/eicon/os_pri.c b/drivers/isdn/hardware/eicon/os_pri.c index a296a846f296..903356547b79 100644 --- a/drivers/isdn/hardware/eicon/os_pri.c +++ b/drivers/isdn/hardware/eicon/os_pri.c | |||
@@ -487,7 +487,7 @@ diva_pri_start_adapter(PISDN_ADAPTER IoAdapter, | |||
487 | } | 487 | } |
488 | DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); | 488 | DIVA_OS_MEM_DETACH_ADDRESS(IoAdapter, boot); |
489 | 489 | ||
490 | IoAdapter->Initialized = TRUE; | 490 | IoAdapter->Initialized = true; |
491 | 491 | ||
492 | /* | 492 | /* |
493 | Check Interrupt | 493 | Check Interrupt |
@@ -504,7 +504,7 @@ diva_pri_start_adapter(PISDN_ADAPTER IoAdapter, | |||
504 | if (!IoAdapter->IrqCount) { | 504 | if (!IoAdapter->IrqCount) { |
505 | DBG_ERR(("A: A(%d) interrupt test failed", | 505 | DBG_ERR(("A: A(%d) interrupt test failed", |
506 | IoAdapter->ANum)) | 506 | IoAdapter->ANum)) |
507 | IoAdapter->Initialized = FALSE; | 507 | IoAdapter->Initialized = false; |
508 | IoAdapter->stop(IoAdapter); | 508 | IoAdapter->stop(IoAdapter); |
509 | return (-1); | 509 | return (-1); |
510 | } | 510 | } |
diff --git a/drivers/isdn/hardware/eicon/platform.h b/drivers/isdn/hardware/eicon/platform.h index 2444811e0b38..ff09f07f440a 100644 --- a/drivers/isdn/hardware/eicon/platform.h +++ b/drivers/isdn/hardware/eicon/platform.h | |||
@@ -71,14 +71,6 @@ | |||
71 | #define qword u64 | 71 | #define qword u64 |
72 | #endif | 72 | #endif |
73 | 73 | ||
74 | #ifndef TRUE | ||
75 | #define TRUE 1 | ||
76 | #endif | ||
77 | |||
78 | #ifndef FALSE | ||
79 | #define FALSE 0 | ||
80 | #endif | ||
81 | |||
82 | #ifndef NULL | 74 | #ifndef NULL |
83 | #define NULL ((void *) 0) | 75 | #define NULL ((void *) 0) |
84 | #endif | 76 | #endif |
@@ -131,10 +123,6 @@ | |||
131 | #define DIVA_OS_MEM_DETACH_CONFIG(a, x) do { } while(0) | 123 | #define DIVA_OS_MEM_DETACH_CONFIG(a, x) do { } while(0) |
132 | #define DIVA_OS_MEM_DETACH_CONTROL(a, x) do { } while(0) | 124 | #define DIVA_OS_MEM_DETACH_CONTROL(a, x) do { } while(0) |
133 | 125 | ||
134 | #if !defined(DIM) | ||
135 | #define DIM(array) (sizeof (array)/sizeof ((array)[0])) | ||
136 | #endif | ||
137 | |||
138 | #define DIVA_INVALID_FILE_HANDLE ((dword)(-1)) | 126 | #define DIVA_INVALID_FILE_HANDLE ((dword)(-1)) |
139 | 127 | ||
140 | #define DIVAS_CONTAINING_RECORD(address, type, field) \ | 128 | #define DIVAS_CONTAINING_RECORD(address, type, field) \ |
diff --git a/drivers/isdn/hisax/Kconfig b/drivers/isdn/hisax/Kconfig index 34ab5f7dcabc..12d91fb9f8cb 100644 --- a/drivers/isdn/hisax/Kconfig +++ b/drivers/isdn/hisax/Kconfig | |||
@@ -340,8 +340,6 @@ config HISAX_HFC_SX | |||
340 | This enables HiSax support for the HFC-S+, HFC-SP and HFC-PCMCIA | 340 | This enables HiSax support for the HFC-S+, HFC-SP and HFC-PCMCIA |
341 | cards. This code is not finished yet. | 341 | cards. This code is not finished yet. |
342 | 342 | ||
343 | # bool ' TESTEMULATOR (EXPERIMENTAL)' CONFIG_HISAX_TESTEMU | ||
344 | |||
345 | config HISAX_ENTERNOW_PCI | 343 | config HISAX_ENTERNOW_PCI |
346 | bool "Formula-n enter:now PCI card" | 344 | bool "Formula-n enter:now PCI card" |
347 | depends on HISAX_NETJET && PCI && (BROKEN || !(SPARC || PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV)) | 345 | depends on HISAX_NETJET && PCI && (BROKEN || !(SPARC || PPC || PARISC || M68K || (MIPS && !CPU_LITTLE_ENDIAN) || FRV)) |
diff --git a/drivers/isdn/hisax/Makefile b/drivers/isdn/hisax/Makefile index 293e27789d54..c7a3794bdae4 100644 --- a/drivers/isdn/hisax/Makefile +++ b/drivers/isdn/hisax/Makefile | |||
@@ -60,5 +60,4 @@ hisax-$(CONFIG_HISAX_SCT_QUADRO) += bkm_a8.o isac.o arcofi.o hscx.o | |||
60 | hisax-$(CONFIG_HISAX_GAZEL) += gazel.o isac.o arcofi.o hscx.o | 60 | hisax-$(CONFIG_HISAX_GAZEL) += gazel.o isac.o arcofi.o hscx.o |
61 | hisax-$(CONFIG_HISAX_W6692) += w6692.o | 61 | hisax-$(CONFIG_HISAX_W6692) += w6692.o |
62 | hisax-$(CONFIG_HISAX_ENTERNOW_PCI) += enternow_pci.o amd7930_fn.o | 62 | hisax-$(CONFIG_HISAX_ENTERNOW_PCI) += enternow_pci.o amd7930_fn.o |
63 | #hisax-$(CONFIG_HISAX_TESTEMU) += testemu.o | ||
64 | 63 | ||
diff --git a/drivers/isdn/hisax/config.c b/drivers/isdn/hisax/config.c index 17ec0b70ba1d..da4196f21e0f 100644 --- a/drivers/isdn/hisax/config.c +++ b/drivers/isdn/hisax/config.c | |||
@@ -549,10 +549,6 @@ extern int setup_isurf(struct IsdnCard *card); | |||
549 | extern int setup_saphir(struct IsdnCard *card); | 549 | extern int setup_saphir(struct IsdnCard *card); |
550 | #endif | 550 | #endif |
551 | 551 | ||
552 | #if CARD_TESTEMU | ||
553 | extern int setup_testemu(struct IsdnCard *card); | ||
554 | #endif | ||
555 | |||
556 | #if CARD_BKM_A4T | 552 | #if CARD_BKM_A4T |
557 | extern int setup_bkm_a4t(struct IsdnCard *card); | 553 | extern int setup_bkm_a4t(struct IsdnCard *card); |
558 | #endif | 554 | #endif |
@@ -1061,11 +1057,6 @@ static int checkcard(int cardnr, char *id, int *busy_flag, struct module *lockow | |||
1061 | ret = setup_saphir(card); | 1057 | ret = setup_saphir(card); |
1062 | break; | 1058 | break; |
1063 | #endif | 1059 | #endif |
1064 | #if CARD_TESTEMU | ||
1065 | case ISDN_CTYPE_TESTEMU: | ||
1066 | ret = setup_testemu(card); | ||
1067 | break; | ||
1068 | #endif | ||
1069 | #if CARD_BKM_A4T | 1060 | #if CARD_BKM_A4T |
1070 | case ISDN_CTYPE_BKM_A4T: | 1061 | case ISDN_CTYPE_BKM_A4T: |
1071 | ret = setup_bkm_a4t(card); | 1062 | ret = setup_bkm_a4t(card); |
@@ -1881,7 +1872,7 @@ static struct pci_device_id hisax_pci_tbl[] __devinitdata = { | |||
1881 | {PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_DJINN_ITOO, PCI_ANY_ID, PCI_ANY_ID}, | 1872 | {PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_DJINN_ITOO, PCI_ANY_ID, PCI_ANY_ID}, |
1882 | {PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_OLITEC, PCI_ANY_ID, PCI_ANY_ID}, | 1873 | {PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_OLITEC, PCI_ANY_ID, PCI_ANY_ID}, |
1883 | #endif | 1874 | #endif |
1884 | #ifdef CONFIG_HISAX_QUADRO | 1875 | #ifdef CONFIG_HISAX_SCT_QUADRO |
1885 | {PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_ANY_ID, PCI_ANY_ID}, | 1876 | {PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_ANY_ID, PCI_ANY_ID}, |
1886 | #endif | 1877 | #endif |
1887 | #ifdef CONFIG_HISAX_NICCY | 1878 | #ifdef CONFIG_HISAX_NICCY |
diff --git a/drivers/isdn/hisax/elsa_ser.c b/drivers/isdn/hisax/elsa_ser.c index 0279fb323cb1..ae377e812775 100644 --- a/drivers/isdn/hisax/elsa_ser.c +++ b/drivers/isdn/hisax/elsa_ser.c | |||
@@ -58,7 +58,7 @@ static inline unsigned int serial_in(struct IsdnCardState *cs, int offset) | |||
58 | static inline unsigned int serial_inp(struct IsdnCardState *cs, int offset) | 58 | static inline unsigned int serial_inp(struct IsdnCardState *cs, int offset) |
59 | { | 59 | { |
60 | #ifdef SERIAL_DEBUG_REG | 60 | #ifdef SERIAL_DEBUG_REG |
61 | #ifdef CONFIG_SERIAL_NOPAUSE_IO | 61 | #ifdef ELSA_SERIAL_NOPAUSE_IO |
62 | u_int val = inb(cs->hw.elsa.base + 8 + offset); | 62 | u_int val = inb(cs->hw.elsa.base + 8 + offset); |
63 | debugl1(cs,"inp %s %02x",ModemIn[offset], val); | 63 | debugl1(cs,"inp %s %02x",ModemIn[offset], val); |
64 | #else | 64 | #else |
@@ -67,7 +67,7 @@ static inline unsigned int serial_inp(struct IsdnCardState *cs, int offset) | |||
67 | #endif | 67 | #endif |
68 | return(val); | 68 | return(val); |
69 | #else | 69 | #else |
70 | #ifdef CONFIG_SERIAL_NOPAUSE_IO | 70 | #ifdef ELSA_SERIAL_NOPAUSE_IO |
71 | return inb(cs->hw.elsa.base + 8 + offset); | 71 | return inb(cs->hw.elsa.base + 8 + offset); |
72 | #else | 72 | #else |
73 | return inb_p(cs->hw.elsa.base + 8 + offset); | 73 | return inb_p(cs->hw.elsa.base + 8 + offset); |
@@ -87,13 +87,13 @@ static inline void serial_outp(struct IsdnCardState *cs, int offset, | |||
87 | int value) | 87 | int value) |
88 | { | 88 | { |
89 | #ifdef SERIAL_DEBUG_REG | 89 | #ifdef SERIAL_DEBUG_REG |
90 | #ifdef CONFIG_SERIAL_NOPAUSE_IO | 90 | #ifdef ELSA_SERIAL_NOPAUSE_IO |
91 | debugl1(cs,"outp %s %02x",ModemOut[offset], value); | 91 | debugl1(cs,"outp %s %02x",ModemOut[offset], value); |
92 | #else | 92 | #else |
93 | debugl1(cs,"outP %s %02x",ModemOut[offset], value); | 93 | debugl1(cs,"outP %s %02x",ModemOut[offset], value); |
94 | #endif | 94 | #endif |
95 | #endif | 95 | #endif |
96 | #ifdef CONFIG_SERIAL_NOPAUSE_IO | 96 | #ifdef ELSA_SERIAL_NOPAUSE_IO |
97 | outb(value, cs->hw.elsa.base + 8 + offset); | 97 | outb(value, cs->hw.elsa.base + 8 + offset); |
98 | #else | 98 | #else |
99 | outb_p(value, cs->hw.elsa.base + 8 + offset); | 99 | outb_p(value, cs->hw.elsa.base + 8 + offset); |
diff --git a/drivers/isdn/hisax/hfc4s8s_l1.c b/drivers/isdn/hisax/hfc4s8s_l1.c index a2fa4ecb8c88..ab98e135bcbb 100644 --- a/drivers/isdn/hisax/hfc4s8s_l1.c +++ b/drivers/isdn/hisax/hfc4s8s_l1.c | |||
@@ -199,7 +199,7 @@ typedef struct _hfc4s8s_hw { | |||
199 | /***************************/ | 199 | /***************************/ |
200 | /* inline function defines */ | 200 | /* inline function defines */ |
201 | /***************************/ | 201 | /***************************/ |
202 | #ifdef CONFIG_HISAX_HFC4S8S_PCIMEM /* inline functions mempry mapped */ | 202 | #ifdef HISAX_HFC4S8S_PCIMEM /* inline functions memory mapped */ |
203 | 203 | ||
204 | /* memory write and dummy IO read to avoid PCI byte merge problems */ | 204 | /* memory write and dummy IO read to avoid PCI byte merge problems */ |
205 | #define Write_hfc8(a,b,c) {(*((volatile u_char *)(a->membase+b)) = c); inb(a->iobase+4);} | 205 | #define Write_hfc8(a,b,c) {(*((volatile u_char *)(a->membase+b)) = c); inb(a->iobase+4);} |
@@ -305,7 +305,7 @@ wait_busy(hfc4s8s_hw * a) | |||
305 | 305 | ||
306 | #define PCI_ENA_REGIO 0x01 | 306 | #define PCI_ENA_REGIO 0x01 |
307 | 307 | ||
308 | #endif /* CONFIG_HISAX_HFC4S8S_PCIMEM */ | 308 | #endif /* HISAX_HFC4S8S_PCIMEM */ |
309 | 309 | ||
310 | /******************************************************/ | 310 | /******************************************************/ |
311 | /* function to read critical counter registers that */ | 311 | /* function to read critical counter registers that */ |
@@ -724,12 +724,12 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech) | |||
724 | } else { | 724 | } else { |
725 | /* read errornous D frame */ | 725 | /* read errornous D frame */ |
726 | 726 | ||
727 | #ifndef CONFIG_HISAX_HFC4S8S_PCIMEM | 727 | #ifndef HISAX_HFC4S8S_PCIMEM |
728 | SetRegAddr(l1p->hw, A_FIFO_DATA0); | 728 | SetRegAddr(l1p->hw, A_FIFO_DATA0); |
729 | #endif | 729 | #endif |
730 | 730 | ||
731 | while (z1 >= 4) { | 731 | while (z1 >= 4) { |
732 | #ifdef CONFIG_HISAX_HFC4S8S_PCIMEM | 732 | #ifdef HISAX_HFC4S8S_PCIMEM |
733 | Read_hfc32(l1p->hw, A_FIFO_DATA0); | 733 | Read_hfc32(l1p->hw, A_FIFO_DATA0); |
734 | #else | 734 | #else |
735 | fRead_hfc32(l1p->hw); | 735 | fRead_hfc32(l1p->hw); |
@@ -738,7 +738,7 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech) | |||
738 | } | 738 | } |
739 | 739 | ||
740 | while (z1--) | 740 | while (z1--) |
741 | #ifdef CONFIG_HISAX_HFC4S8S_PCIMEM | 741 | #ifdef HISAX_HFC4S8S_PCIMEM |
742 | Read_hfc8(l1p->hw, A_FIFO_DATA0); | 742 | Read_hfc8(l1p->hw, A_FIFO_DATA0); |
743 | #else | 743 | #else |
744 | fRead_hfc8(l1p->hw); | 744 | fRead_hfc8(l1p->hw); |
@@ -752,12 +752,12 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech) | |||
752 | 752 | ||
753 | cp = skb->data; | 753 | cp = skb->data; |
754 | 754 | ||
755 | #ifndef CONFIG_HISAX_HFC4S8S_PCIMEM | 755 | #ifndef HISAX_HFC4S8S_PCIMEM |
756 | SetRegAddr(l1p->hw, A_FIFO_DATA0); | 756 | SetRegAddr(l1p->hw, A_FIFO_DATA0); |
757 | #endif | 757 | #endif |
758 | 758 | ||
759 | while (z1 >= 4) { | 759 | while (z1 >= 4) { |
760 | #ifdef CONFIG_HISAX_HFC4S8S_PCIMEM | 760 | #ifdef HISAX_HFC4S8S_PCIMEM |
761 | *((unsigned long *) cp) = | 761 | *((unsigned long *) cp) = |
762 | Read_hfc32(l1p->hw, A_FIFO_DATA0); | 762 | Read_hfc32(l1p->hw, A_FIFO_DATA0); |
763 | #else | 763 | #else |
@@ -768,7 +768,7 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech) | |||
768 | } | 768 | } |
769 | 769 | ||
770 | while (z1--) | 770 | while (z1--) |
771 | #ifdef CONFIG_HISAX_HFC4S8S_PCIMEM | 771 | #ifdef HISAX_HFC4S8S_PCIMEM |
772 | *cp++ = Read_hfc8(l1p->hw, A_FIFO_DATA0); | 772 | *cp++ = Read_hfc8(l1p->hw, A_FIFO_DATA0); |
773 | #else | 773 | #else |
774 | *cp++ = fRead_hfc8(l1p->hw); | 774 | *cp++ = fRead_hfc8(l1p->hw); |
@@ -858,12 +858,12 @@ rx_b_frame(struct hfc4s8s_btype *bch) | |||
858 | wait_busy(l1->hw); | 858 | wait_busy(l1->hw); |
859 | return; | 859 | return; |
860 | } | 860 | } |
861 | #ifndef CONFIG_HISAX_HFC4S8S_PCIMEM | 861 | #ifndef HISAX_HFC4S8S_PCIMEM |
862 | SetRegAddr(l1->hw, A_FIFO_DATA0); | 862 | SetRegAddr(l1->hw, A_FIFO_DATA0); |
863 | #endif | 863 | #endif |
864 | 864 | ||
865 | while (z1 >= 4) { | 865 | while (z1 >= 4) { |
866 | #ifdef CONFIG_HISAX_HFC4S8S_PCIMEM | 866 | #ifdef HISAX_HFC4S8S_PCIMEM |
867 | *((unsigned long *) bch->rx_ptr) = | 867 | *((unsigned long *) bch->rx_ptr) = |
868 | Read_hfc32(l1->hw, A_FIFO_DATA0); | 868 | Read_hfc32(l1->hw, A_FIFO_DATA0); |
869 | #else | 869 | #else |
@@ -875,7 +875,7 @@ rx_b_frame(struct hfc4s8s_btype *bch) | |||
875 | } | 875 | } |
876 | 876 | ||
877 | while (z1--) | 877 | while (z1--) |
878 | #ifdef CONFIG_HISAX_HFC4S8S_PCIMEM | 878 | #ifdef HISAX_HFC4S8S_PCIMEM |
879 | *(bch->rx_ptr++) = Read_hfc8(l1->hw, A_FIFO_DATA0); | 879 | *(bch->rx_ptr++) = Read_hfc8(l1->hw, A_FIFO_DATA0); |
880 | #else | 880 | #else |
881 | *(bch->rx_ptr++) = fRead_hfc8(l1->hw); | 881 | *(bch->rx_ptr++) = fRead_hfc8(l1->hw); |
@@ -939,12 +939,12 @@ tx_d_frame(struct hfc4s8s_l1 *l1p) | |||
939 | if ((skb = skb_dequeue(&l1p->d_tx_queue))) { | 939 | if ((skb = skb_dequeue(&l1p->d_tx_queue))) { |
940 | cp = skb->data; | 940 | cp = skb->data; |
941 | cnt = skb->len; | 941 | cnt = skb->len; |
942 | #ifndef CONFIG_HISAX_HFC4S8S_PCIMEM | 942 | #ifndef HISAX_HFC4S8S_PCIMEM |
943 | SetRegAddr(l1p->hw, A_FIFO_DATA0); | 943 | SetRegAddr(l1p->hw, A_FIFO_DATA0); |
944 | #endif | 944 | #endif |
945 | 945 | ||
946 | while (cnt >= 4) { | 946 | while (cnt >= 4) { |
947 | #ifdef CONFIG_HISAX_HFC4S8S_PCIMEM | 947 | #ifdef HISAX_HFC4S8S_PCIMEM |
948 | fWrite_hfc32(l1p->hw, A_FIFO_DATA0, | 948 | fWrite_hfc32(l1p->hw, A_FIFO_DATA0, |
949 | *(unsigned long *) cp); | 949 | *(unsigned long *) cp); |
950 | #else | 950 | #else |
@@ -955,7 +955,7 @@ tx_d_frame(struct hfc4s8s_l1 *l1p) | |||
955 | cnt -= 4; | 955 | cnt -= 4; |
956 | } | 956 | } |
957 | 957 | ||
958 | #ifdef CONFIG_HISAX_HFC4S8S_PCIMEM | 958 | #ifdef HISAX_HFC4S8S_PCIMEM |
959 | while (cnt--) | 959 | while (cnt--) |
960 | fWrite_hfc8(l1p->hw, A_FIFO_DATA0, *cp++); | 960 | fWrite_hfc8(l1p->hw, A_FIFO_DATA0, *cp++); |
961 | #else | 961 | #else |
@@ -1036,11 +1036,11 @@ tx_b_frame(struct hfc4s8s_btype *bch) | |||
1036 | cp = skb->data + bch->tx_cnt; | 1036 | cp = skb->data + bch->tx_cnt; |
1037 | bch->tx_cnt += cnt; | 1037 | bch->tx_cnt += cnt; |
1038 | 1038 | ||
1039 | #ifndef CONFIG_HISAX_HFC4S8S_PCIMEM | 1039 | #ifndef HISAX_HFC4S8S_PCIMEM |
1040 | SetRegAddr(l1->hw, A_FIFO_DATA0); | 1040 | SetRegAddr(l1->hw, A_FIFO_DATA0); |
1041 | #endif | 1041 | #endif |
1042 | while (cnt >= 4) { | 1042 | while (cnt >= 4) { |
1043 | #ifdef CONFIG_HISAX_HFC4S8S_PCIMEM | 1043 | #ifdef HISAX_HFC4S8S_PCIMEM |
1044 | fWrite_hfc32(l1->hw, A_FIFO_DATA0, | 1044 | fWrite_hfc32(l1->hw, A_FIFO_DATA0, |
1045 | *(unsigned long *) cp); | 1045 | *(unsigned long *) cp); |
1046 | #else | 1046 | #else |
@@ -1051,7 +1051,7 @@ tx_b_frame(struct hfc4s8s_btype *bch) | |||
1051 | } | 1051 | } |
1052 | 1052 | ||
1053 | while (cnt--) | 1053 | while (cnt--) |
1054 | #ifdef CONFIG_HISAX_HFC4S8S_PCIMEM | 1054 | #ifdef HISAX_HFC4S8S_PCIMEM |
1055 | fWrite_hfc8(l1->hw, A_FIFO_DATA0, *cp++); | 1055 | fWrite_hfc8(l1->hw, A_FIFO_DATA0, *cp++); |
1056 | #else | 1056 | #else |
1057 | fWrite_hfc8(l1->hw, *cp++); | 1057 | fWrite_hfc8(l1->hw, *cp++); |
@@ -1280,7 +1280,7 @@ hfc4s8s_interrupt(int intno, void *dev_id) | |||
1280 | if (!hw || !(hw->mr.r_irq_ctrl & M_GLOB_IRQ_EN)) | 1280 | if (!hw || !(hw->mr.r_irq_ctrl & M_GLOB_IRQ_EN)) |
1281 | return IRQ_NONE; | 1281 | return IRQ_NONE; |
1282 | 1282 | ||
1283 | #ifndef CONFIG_HISAX_HFC4S8S_PCIMEM | 1283 | #ifndef HISAX_HFC4S8S_PCIMEM |
1284 | /* read current selected regsister */ | 1284 | /* read current selected regsister */ |
1285 | old_ioreg = GetRegAddr(hw); | 1285 | old_ioreg = GetRegAddr(hw); |
1286 | #endif | 1286 | #endif |
@@ -1291,7 +1291,7 @@ hfc4s8s_interrupt(int intno, void *dev_id) | |||
1291 | if (! | 1291 | if (! |
1292 | (b = (Read_hfc8(hw, R_STATUS) & (M_MISC_IRQSTA | M_FR_IRQSTA))) | 1292 | (b = (Read_hfc8(hw, R_STATUS) & (M_MISC_IRQSTA | M_FR_IRQSTA))) |
1293 | && !hw->mr.r_irq_statech) { | 1293 | && !hw->mr.r_irq_statech) { |
1294 | #ifndef CONFIG_HISAX_HFC4S8S_PCIMEM | 1294 | #ifndef HISAX_HFC4S8S_PCIMEM |
1295 | SetRegAddr(hw, old_ioreg); | 1295 | SetRegAddr(hw, old_ioreg); |
1296 | #endif | 1296 | #endif |
1297 | return IRQ_NONE; | 1297 | return IRQ_NONE; |
@@ -1321,7 +1321,7 @@ hfc4s8s_interrupt(int intno, void *dev_id) | |||
1321 | /* queue the request to allow other cards to interrupt */ | 1321 | /* queue the request to allow other cards to interrupt */ |
1322 | schedule_work(&hw->tqueue); | 1322 | schedule_work(&hw->tqueue); |
1323 | 1323 | ||
1324 | #ifndef CONFIG_HISAX_HFC4S8S_PCIMEM | 1324 | #ifndef HISAX_HFC4S8S_PCIMEM |
1325 | SetRegAddr(hw, old_ioreg); | 1325 | SetRegAddr(hw, old_ioreg); |
1326 | #endif | 1326 | #endif |
1327 | return IRQ_HANDLED; | 1327 | return IRQ_HANDLED; |
@@ -1470,7 +1470,7 @@ static void | |||
1470 | release_pci_ports(hfc4s8s_hw * hw) | 1470 | release_pci_ports(hfc4s8s_hw * hw) |
1471 | { | 1471 | { |
1472 | pci_write_config_word(hw->pdev, PCI_COMMAND, 0); | 1472 | pci_write_config_word(hw->pdev, PCI_COMMAND, 0); |
1473 | #ifdef CONFIG_HISAX_HFC4S8S_PCIMEM | 1473 | #ifdef HISAX_HFC4S8S_PCIMEM |
1474 | if (hw->membase) | 1474 | if (hw->membase) |
1475 | iounmap((void *) hw->membase); | 1475 | iounmap((void *) hw->membase); |
1476 | #else | 1476 | #else |
@@ -1485,7 +1485,7 @@ release_pci_ports(hfc4s8s_hw * hw) | |||
1485 | static void | 1485 | static void |
1486 | enable_pci_ports(hfc4s8s_hw * hw) | 1486 | enable_pci_ports(hfc4s8s_hw * hw) |
1487 | { | 1487 | { |
1488 | #ifdef CONFIG_HISAX_HFC4S8S_PCIMEM | 1488 | #ifdef HISAX_HFC4S8S_PCIMEM |
1489 | pci_write_config_word(hw->pdev, PCI_COMMAND, PCI_ENA_MEMIO); | 1489 | pci_write_config_word(hw->pdev, PCI_COMMAND, PCI_ENA_MEMIO); |
1490 | #else | 1490 | #else |
1491 | pci_write_config_word(hw->pdev, PCI_COMMAND, PCI_ENA_REGIO); | 1491 | pci_write_config_word(hw->pdev, PCI_COMMAND, PCI_ENA_REGIO); |
@@ -1560,7 +1560,7 @@ setup_instance(hfc4s8s_hw * hw) | |||
1560 | hw->irq); | 1560 | hw->irq); |
1561 | goto out; | 1561 | goto out; |
1562 | } | 1562 | } |
1563 | #ifdef CONFIG_HISAX_HFC4S8S_PCIMEM | 1563 | #ifdef HISAX_HFC4S8S_PCIMEM |
1564 | printk(KERN_INFO | 1564 | printk(KERN_INFO |
1565 | "HFC-4S/8S: found PCI card at membase 0x%p, irq %d\n", | 1565 | "HFC-4S/8S: found PCI card at membase 0x%p, irq %d\n", |
1566 | hw->hw_membase, hw->irq); | 1566 | hw->hw_membase, hw->irq); |
@@ -1613,7 +1613,7 @@ hfc4s8s_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1613 | hw->irq = pdev->irq; | 1613 | hw->irq = pdev->irq; |
1614 | hw->iobase = pci_resource_start(pdev, 0); | 1614 | hw->iobase = pci_resource_start(pdev, 0); |
1615 | 1615 | ||
1616 | #ifdef CONFIG_HISAX_HFC4S8S_PCIMEM | 1616 | #ifdef HISAX_HFC4S8S_PCIMEM |
1617 | hw->hw_membase = (u_char *) pci_resource_start(pdev, 1); | 1617 | hw->hw_membase = (u_char *) pci_resource_start(pdev, 1); |
1618 | hw->membase = ioremap((ulong) hw->hw_membase, 256); | 1618 | hw->membase = ioremap((ulong) hw->hw_membase, 256); |
1619 | #else | 1619 | #else |
diff --git a/drivers/isdn/hisax/hfc_usb.c b/drivers/isdn/hisax/hfc_usb.c index 5a6989f23fcf..42bbae2a646c 100644 --- a/drivers/isdn/hisax/hfc_usb.c +++ b/drivers/isdn/hisax/hfc_usb.c | |||
@@ -183,7 +183,7 @@ typedef struct hfcusb_data { | |||
183 | int vend_idx; /* vendor found */ | 183 | int vend_idx; /* vendor found */ |
184 | int b_mode[2]; /* B-channel mode */ | 184 | int b_mode[2]; /* B-channel mode */ |
185 | int l1_activated; /* layer 1 activated */ | 185 | int l1_activated; /* layer 1 activated */ |
186 | int disc_flag; /* TRUE if device was disonnected to avoid some USB actions */ | 186 | int disc_flag; /* 'true' if device was disonnected to avoid some USB actions */ |
187 | int packet_size, iso_packet_size; | 187 | int packet_size, iso_packet_size; |
188 | 188 | ||
189 | /* control pipe background handling */ | 189 | /* control pipe background handling */ |
@@ -392,7 +392,7 @@ l1_timer_expire_t3(hfcusb_data * hfc) | |||
392 | DBG(ISDN_DBG, | 392 | DBG(ISDN_DBG, |
393 | "HFC-S USB: PH_DEACTIVATE | INDICATION sent (T3 expire)"); | 393 | "HFC-S USB: PH_DEACTIVATE | INDICATION sent (T3 expire)"); |
394 | #endif | 394 | #endif |
395 | hfc->l1_activated = FALSE; | 395 | hfc->l1_activated = false; |
396 | handle_led(hfc, LED_S0_OFF); | 396 | handle_led(hfc, LED_S0_OFF); |
397 | /* deactivate : */ | 397 | /* deactivate : */ |
398 | queue_control_request(hfc, HFCUSB_STATES, 0x10, 1); | 398 | queue_control_request(hfc, HFCUSB_STATES, 0x10, 1); |
@@ -411,7 +411,7 @@ l1_timer_expire_t4(hfcusb_data * hfc) | |||
411 | DBG(ISDN_DBG, | 411 | DBG(ISDN_DBG, |
412 | "HFC-S USB: PH_DEACTIVATE | INDICATION sent (T4 expire)"); | 412 | "HFC-S USB: PH_DEACTIVATE | INDICATION sent (T4 expire)"); |
413 | #endif | 413 | #endif |
414 | hfc->l1_activated = FALSE; | 414 | hfc->l1_activated = false; |
415 | handle_led(hfc, LED_S0_OFF); | 415 | handle_led(hfc, LED_S0_OFF); |
416 | } | 416 | } |
417 | 417 | ||
@@ -452,7 +452,7 @@ state_handler(hfcusb_data * hfc, __u8 state) | |||
452 | #ifdef CONFIG_HISAX_DEBUG | 452 | #ifdef CONFIG_HISAX_DEBUG |
453 | DBG(ISDN_DBG, "HFC-S USB: PH_ACTIVATE | INDICATION sent"); | 453 | DBG(ISDN_DBG, "HFC-S USB: PH_ACTIVATE | INDICATION sent"); |
454 | #endif | 454 | #endif |
455 | hfc->l1_activated = TRUE; | 455 | hfc->l1_activated = true; |
456 | handle_led(hfc, LED_S0_ON); | 456 | handle_led(hfc, LED_S0_ON); |
457 | } else if (state <= 3 /* && activated */ ) { | 457 | } else if (state <= 3 /* && activated */ ) { |
458 | if (old_state == 7 || old_state == 8) { | 458 | if (old_state == 7 || old_state == 8) { |
@@ -472,7 +472,7 @@ state_handler(hfcusb_data * hfc, __u8 state) | |||
472 | DBG(ISDN_DBG, | 472 | DBG(ISDN_DBG, |
473 | "HFC-S USB: PH_DEACTIVATE | INDICATION sent"); | 473 | "HFC-S USB: PH_DEACTIVATE | INDICATION sent"); |
474 | #endif | 474 | #endif |
475 | hfc->l1_activated = FALSE; | 475 | hfc->l1_activated = false; |
476 | handle_led(hfc, LED_S0_OFF); | 476 | handle_led(hfc, LED_S0_OFF); |
477 | } | 477 | } |
478 | } | 478 | } |
@@ -622,7 +622,7 @@ tx_iso_complete(struct urb *urb) | |||
622 | if (fifo->active && !status) { | 622 | if (fifo->active && !status) { |
623 | transp_mode = 0; | 623 | transp_mode = 0; |
624 | if (fifon < 4 && hfc->b_mode[fifon / 2] == L1_MODE_TRANS) | 624 | if (fifon < 4 && hfc->b_mode[fifon / 2] == L1_MODE_TRANS) |
625 | transp_mode = TRUE; | 625 | transp_mode = true; |
626 | 626 | ||
627 | /* is FifoFull-threshold set for our channel? */ | 627 | /* is FifoFull-threshold set for our channel? */ |
628 | threshbit = threshtable[fifon] & hfc->threshold_mask; | 628 | threshbit = threshtable[fifon] & hfc->threshold_mask; |
@@ -640,7 +640,7 @@ tx_iso_complete(struct urb *urb) | |||
640 | tx_iso_complete, urb->context); | 640 | tx_iso_complete, urb->context); |
641 | memset(context_iso_urb->buffer, 0, | 641 | memset(context_iso_urb->buffer, 0, |
642 | sizeof(context_iso_urb->buffer)); | 642 | sizeof(context_iso_urb->buffer)); |
643 | frame_complete = FALSE; | 643 | frame_complete = false; |
644 | /* Generate next Iso Packets */ | 644 | /* Generate next Iso Packets */ |
645 | for (k = 0; k < num_isoc_packets; ++k) { | 645 | for (k = 0; k < num_isoc_packets; ++k) { |
646 | if (fifo->skbuff) { | 646 | if (fifo->skbuff) { |
@@ -666,7 +666,7 @@ tx_iso_complete(struct urb *urb) | |||
666 | /* add 2 byte flags and 16bit CRC at end of ISDN frame */ | 666 | /* add 2 byte flags and 16bit CRC at end of ISDN frame */ |
667 | fifo->bit_line += 32; | 667 | fifo->bit_line += 32; |
668 | } | 668 | } |
669 | frame_complete = TRUE; | 669 | frame_complete = true; |
670 | } | 670 | } |
671 | 671 | ||
672 | memcpy(context_iso_urb->buffer + | 672 | memcpy(context_iso_urb->buffer + |
@@ -693,7 +693,7 @@ tx_iso_complete(struct urb *urb) | |||
693 | } | 693 | } |
694 | 694 | ||
695 | if (frame_complete) { | 695 | if (frame_complete) { |
696 | fifo->delete_flg = TRUE; | 696 | fifo->delete_flg = true; |
697 | fifo->hif->l1l2(fifo->hif, | 697 | fifo->hif->l1l2(fifo->hif, |
698 | PH_DATA | CONFIRM, | 698 | PH_DATA | CONFIRM, |
699 | (void *) (unsigned long) fifo->skbuff-> | 699 | (void *) (unsigned long) fifo->skbuff-> |
@@ -701,9 +701,9 @@ tx_iso_complete(struct urb *urb) | |||
701 | if (fifo->skbuff && fifo->delete_flg) { | 701 | if (fifo->skbuff && fifo->delete_flg) { |
702 | dev_kfree_skb_any(fifo->skbuff); | 702 | dev_kfree_skb_any(fifo->skbuff); |
703 | fifo->skbuff = NULL; | 703 | fifo->skbuff = NULL; |
704 | fifo->delete_flg = FALSE; | 704 | fifo->delete_flg = false; |
705 | } | 705 | } |
706 | frame_complete = FALSE; | 706 | frame_complete = false; |
707 | } | 707 | } |
708 | } | 708 | } |
709 | errcode = usb_submit_urb(urb, GFP_ATOMIC); | 709 | errcode = usb_submit_urb(urb, GFP_ATOMIC); |
@@ -837,7 +837,7 @@ collect_rx_frame(usb_fifo * fifo, __u8 * data, int len, int finish) | |||
837 | fifon = fifo->fifonum; | 837 | fifon = fifo->fifonum; |
838 | transp_mode = 0; | 838 | transp_mode = 0; |
839 | if (fifon < 4 && hfc->b_mode[fifon / 2] == L1_MODE_TRANS) | 839 | if (fifon < 4 && hfc->b_mode[fifon / 2] == L1_MODE_TRANS) |
840 | transp_mode = TRUE; | 840 | transp_mode = true; |
841 | 841 | ||
842 | if (!fifo->skbuff) { | 842 | if (!fifo->skbuff) { |
843 | fifo->skbuff = dev_alloc_skb(fifo->max_size + 3); | 843 | fifo->skbuff = dev_alloc_skb(fifo->max_size + 3); |
@@ -1176,7 +1176,7 @@ hfc_usb_l2l1(struct hisax_if *my_hisax_if, int pr, void *arg) | |||
1176 | if (fifo->skbuff && fifo->delete_flg) { | 1176 | if (fifo->skbuff && fifo->delete_flg) { |
1177 | dev_kfree_skb_any(fifo->skbuff); | 1177 | dev_kfree_skb_any(fifo->skbuff); |
1178 | fifo->skbuff = NULL; | 1178 | fifo->skbuff = NULL; |
1179 | fifo->delete_flg = FALSE; | 1179 | fifo->delete_flg = false; |
1180 | } | 1180 | } |
1181 | fifo->skbuff = arg; /* we have a new buffer */ | 1181 | fifo->skbuff = arg; /* we have a new buffer */ |
1182 | break; | 1182 | break; |
@@ -1262,8 +1262,8 @@ usb_init(hfcusb_data * hfc) | |||
1262 | hfc->b_mode[0] = L1_MODE_NULL; | 1262 | hfc->b_mode[0] = L1_MODE_NULL; |
1263 | hfc->b_mode[1] = L1_MODE_NULL; | 1263 | hfc->b_mode[1] = L1_MODE_NULL; |
1264 | 1264 | ||
1265 | hfc->l1_activated = FALSE; | 1265 | hfc->l1_activated = false; |
1266 | hfc->disc_flag = FALSE; | 1266 | hfc->disc_flag = false; |
1267 | hfc->led_state = 0; | 1267 | hfc->led_state = 0; |
1268 | hfc->led_new_data = 0; | 1268 | hfc->led_new_data = 0; |
1269 | hfc->old_led_state = 0; | 1269 | hfc->old_led_state = 0; |
@@ -1404,7 +1404,7 @@ hfc_usb_probe(struct usb_interface *intf, const struct usb_device_id *id) | |||
1404 | 1404 | ||
1405 | /* check for config EOL element */ | 1405 | /* check for config EOL element */ |
1406 | while (validconf[cfg_used][0]) { | 1406 | while (validconf[cfg_used][0]) { |
1407 | cfg_found = TRUE; | 1407 | cfg_found = true; |
1408 | vcf = validconf[cfg_used]; | 1408 | vcf = validconf[cfg_used]; |
1409 | /* first endpoint descriptor */ | 1409 | /* first endpoint descriptor */ |
1410 | ep = iface->endpoint; | 1410 | ep = iface->endpoint; |
@@ -1426,7 +1426,7 @@ hfc_usb_probe(struct usb_interface *intf, const struct usb_device_id *id) | |||
1426 | idx++; | 1426 | idx++; |
1427 | attr = ep->desc.bmAttributes; | 1427 | attr = ep->desc.bmAttributes; |
1428 | if (cmptbl[idx] == EP_NUL) { | 1428 | if (cmptbl[idx] == EP_NUL) { |
1429 | cfg_found = FALSE; | 1429 | cfg_found = false; |
1430 | } | 1430 | } |
1431 | if (attr == USB_ENDPOINT_XFER_INT | 1431 | if (attr == USB_ENDPOINT_XFER_INT |
1432 | && cmptbl[idx] == EP_INT) | 1432 | && cmptbl[idx] == EP_INT) |
@@ -1448,7 +1448,7 @@ hfc_usb_probe(struct usb_interface *intf, const struct usb_device_id *id) | |||
1448 | "HFC-S USB: Interrupt Endpoint interval < %d found - skipping config", | 1448 | "HFC-S USB: Interrupt Endpoint interval < %d found - skipping config", |
1449 | vcf[17]); | 1449 | vcf[17]); |
1450 | #endif | 1450 | #endif |
1451 | cfg_found = FALSE; | 1451 | cfg_found = false; |
1452 | } | 1452 | } |
1453 | ep++; | 1453 | ep++; |
1454 | } | 1454 | } |
@@ -1456,7 +1456,7 @@ hfc_usb_probe(struct usb_interface *intf, const struct usb_device_id *id) | |||
1456 | /* all entries must be EP_NOP or EP_NUL for a valid config */ | 1456 | /* all entries must be EP_NOP or EP_NUL for a valid config */ |
1457 | if (cmptbl[i] != EP_NOP | 1457 | if (cmptbl[i] != EP_NOP |
1458 | && cmptbl[i] != EP_NUL) | 1458 | && cmptbl[i] != EP_NUL) |
1459 | cfg_found = FALSE; | 1459 | cfg_found = false; |
1460 | } | 1460 | } |
1461 | if (cfg_found) { | 1461 | if (cfg_found) { |
1462 | if (cfg_used < small_match) { | 1462 | if (cfg_used < small_match) { |
@@ -1656,7 +1656,7 @@ hfc_usb_disconnect(struct usb_interface | |||
1656 | hfcusb_data *context = usb_get_intfdata(intf); | 1656 | hfcusb_data *context = usb_get_intfdata(intf); |
1657 | int i; | 1657 | int i; |
1658 | printk(KERN_INFO "HFC-S USB: device disconnect\n"); | 1658 | printk(KERN_INFO "HFC-S USB: device disconnect\n"); |
1659 | context->disc_flag = TRUE; | 1659 | context->disc_flag = true; |
1660 | usb_set_intfdata(intf, NULL); | 1660 | usb_set_intfdata(intf, NULL); |
1661 | if (!context) | 1661 | if (!context) |
1662 | return; | 1662 | return; |
diff --git a/drivers/isdn/hisax/hfc_usb.h b/drivers/isdn/hisax/hfc_usb.h index 6349367ed480..471f2354dfde 100644 --- a/drivers/isdn/hisax/hfc_usb.h +++ b/drivers/isdn/hisax/hfc_usb.h | |||
@@ -12,9 +12,6 @@ | |||
12 | 12 | ||
13 | #define VERBOSE_USB_DEBUG | 13 | #define VERBOSE_USB_DEBUG |
14 | 14 | ||
15 | #define TRUE 1 | ||
16 | #define FALSE 0 | ||
17 | |||
18 | 15 | ||
19 | /***********/ | 16 | /***********/ |
20 | /* defines */ | 17 | /* defines */ |
diff --git a/drivers/isdn/hisax/hisax.h b/drivers/isdn/hisax/hisax.h index 3f1137e34678..3cd8d5ba239b 100644 --- a/drivers/isdn/hisax/hisax.h +++ b/drivers/isdn/hisax/hisax.h | |||
@@ -795,19 +795,6 @@ struct w6692_hw { | |||
795 | struct timer_list timer; | 795 | struct timer_list timer; |
796 | }; | 796 | }; |
797 | 797 | ||
798 | #ifdef CONFIG_HISAX_TESTEMU | ||
799 | struct te_hw { | ||
800 | unsigned char *sfifo; | ||
801 | unsigned char *sfifo_w; | ||
802 | unsigned char *sfifo_r; | ||
803 | unsigned char *sfifo_e; | ||
804 | int sfifo_cnt; | ||
805 | unsigned int stat; | ||
806 | wait_queue_head_t rwaitq; | ||
807 | wait_queue_head_t swaitq; | ||
808 | }; | ||
809 | #endif | ||
810 | |||
811 | struct arcofi_msg { | 798 | struct arcofi_msg { |
812 | struct arcofi_msg *next; | 799 | struct arcofi_msg *next; |
813 | u_char receive; | 800 | u_char receive; |
@@ -916,9 +903,6 @@ struct IsdnCardState { | |||
916 | struct ix1_hw niccy; | 903 | struct ix1_hw niccy; |
917 | struct isurf_hw isurf; | 904 | struct isurf_hw isurf; |
918 | struct saphir_hw saphir; | 905 | struct saphir_hw saphir; |
919 | #ifdef CONFIG_HISAX_TESTEMU | ||
920 | struct te_hw te; | ||
921 | #endif | ||
922 | struct bkm_hw ax; | 906 | struct bkm_hw ax; |
923 | struct gazel_hw gazel; | 907 | struct gazel_hw gazel; |
924 | struct w6692_hw w6692; | 908 | struct w6692_hw w6692; |
@@ -1175,15 +1159,6 @@ struct IsdnCardState { | |||
1175 | #define CARD_HSTSAPHIR 0 | 1159 | #define CARD_HSTSAPHIR 0 |
1176 | #endif | 1160 | #endif |
1177 | 1161 | ||
1178 | #ifdef CONFIG_HISAX_TESTEMU | ||
1179 | #define CARD_TESTEMU 1 | ||
1180 | #define ISDN_CTYPE_TESTEMU 99 | ||
1181 | #undef ISDN_CTYPE_COUNT | ||
1182 | #define ISDN_CTYPE_COUNT ISDN_CTYPE_TESTEMU | ||
1183 | #else | ||
1184 | #define CARD_TESTEMU 0 | ||
1185 | #endif | ||
1186 | |||
1187 | #ifdef CONFIG_HISAX_BKM_A4T | 1162 | #ifdef CONFIG_HISAX_BKM_A4T |
1188 | #define CARD_BKM_A4T 1 | 1163 | #define CARD_BKM_A4T 1 |
1189 | #ifndef ISDN_CHIP_ISAC | 1164 | #ifndef ISDN_CHIP_ISAC |
diff --git a/drivers/isdn/hisax/isar.c b/drivers/isdn/hisax/isar.c index 6f1a6583b17d..9df9e3548cf1 100644 --- a/drivers/isdn/hisax/isar.c +++ b/drivers/isdn/hisax/isar.c | |||
@@ -431,7 +431,6 @@ reterror: | |||
431 | return(ret); | 431 | return(ret); |
432 | } | 432 | } |
433 | 433 | ||
434 | extern void BChannel_bh(struct BCState *); | ||
435 | #define B_LL_NOCARRIER 8 | 434 | #define B_LL_NOCARRIER 8 |
436 | #define B_LL_CONNECT 9 | 435 | #define B_LL_CONNECT 9 |
437 | #define B_LL_OK 10 | 436 | #define B_LL_OK 10 |
diff --git a/drivers/isdn/hisax/isdnl1.h b/drivers/isdn/hisax/isdnl1.h index 0e88cfabdf10..172ad4c8c961 100644 --- a/drivers/isdn/hisax/isdnl1.h +++ b/drivers/isdn/hisax/isdnl1.h | |||
@@ -21,12 +21,11 @@ | |||
21 | #define B_XMTBUFREADY 1 | 21 | #define B_XMTBUFREADY 1 |
22 | #define B_ACKPENDING 2 | 22 | #define B_ACKPENDING 2 |
23 | 23 | ||
24 | extern void debugl1(struct IsdnCardState *cs, char *fmt, ...); | 24 | void debugl1(struct IsdnCardState *cs, char *fmt, ...); |
25 | extern void DChannel_proc_xmt(struct IsdnCardState *cs); | 25 | void DChannel_proc_xmt(struct IsdnCardState *cs); |
26 | extern void DChannel_proc_rcv(struct IsdnCardState *cs); | 26 | void DChannel_proc_rcv(struct IsdnCardState *cs); |
27 | extern void l1_msg(struct IsdnCardState *cs, int pr, void *arg); | 27 | void l1_msg(struct IsdnCardState *cs, int pr, void *arg); |
28 | extern void l1_msg_b(struct PStack *st, int pr, void *arg); | 28 | void l1_msg_b(struct PStack *st, int pr, void *arg); |
29 | 29 | void Logl2Frame(struct IsdnCardState *cs, struct sk_buff *skb, char *buf, | |
30 | #ifdef L2FRAME_DEBUG | 30 | int dir); |
31 | extern void Logl2Frame(struct IsdnCardState *cs, struct sk_buff *skb, char *buf, int dir); | 31 | void BChannel_bh(struct work_struct *work); |
32 | #endif | ||
diff --git a/drivers/isdn/hisax/isdnl3.c b/drivers/isdn/hisax/isdnl3.c index 281fa27d9f00..935f23356fae 100644 --- a/drivers/isdn/hisax/isdnl3.c +++ b/drivers/isdn/hisax/isdnl3.c | |||
@@ -231,18 +231,6 @@ no_l3_proto_spec(struct PStack *st, isdn_ctrl *ic) | |||
231 | return(-1); | 231 | return(-1); |
232 | } | 232 | } |
233 | 233 | ||
234 | #ifdef CONFIG_HISAX_EURO | ||
235 | extern void setstack_dss1(struct PStack *st); | ||
236 | #endif | ||
237 | |||
238 | #ifdef CONFIG_HISAX_NI1 | ||
239 | extern void setstack_ni1(struct PStack *st); | ||
240 | #endif | ||
241 | |||
242 | #ifdef CONFIG_HISAX_1TR6 | ||
243 | extern void setstack_1tr6(struct PStack *st); | ||
244 | #endif | ||
245 | |||
246 | struct l3_process | 234 | struct l3_process |
247 | *getl3proc(struct PStack *st, int cr) | 235 | *getl3proc(struct PStack *st, int cr) |
248 | { | 236 | { |
diff --git a/drivers/isdn/hisax/isdnl3.h b/drivers/isdn/hisax/isdnl3.h index 1dbe0297a506..749498fe6c4b 100644 --- a/drivers/isdn/hisax/isdnl3.h +++ b/drivers/isdn/hisax/isdnl3.h | |||
@@ -25,13 +25,19 @@ struct stateentry { | |||
25 | 25 | ||
26 | #define l3_debug(st, fmt, args...) HiSax_putstatus(st->l1.hardware, "l3 ", fmt, ## args) | 26 | #define l3_debug(st, fmt, args...) HiSax_putstatus(st->l1.hardware, "l3 ", fmt, ## args) |
27 | 27 | ||
28 | extern void newl3state(struct l3_process *pc, int state); | 28 | struct PStack; |
29 | extern void L3InitTimer(struct l3_process *pc, struct L3Timer *t); | 29 | |
30 | extern void L3DelTimer(struct L3Timer *t); | 30 | void newl3state(struct l3_process *pc, int state); |
31 | extern int L3AddTimer(struct L3Timer *t, int millisec, int event); | 31 | void L3InitTimer(struct l3_process *pc, struct L3Timer *t); |
32 | extern void StopAllL3Timer(struct l3_process *pc); | 32 | void L3DelTimer(struct L3Timer *t); |
33 | extern struct sk_buff *l3_alloc_skb(int len); | 33 | int L3AddTimer(struct L3Timer *t, int millisec, int event); |
34 | extern struct l3_process *new_l3_process(struct PStack *st, int cr); | 34 | void StopAllL3Timer(struct l3_process *pc); |
35 | extern void release_l3_process(struct l3_process *p); | 35 | struct sk_buff *l3_alloc_skb(int len); |
36 | extern struct l3_process *getl3proc(struct PStack *st, int cr); | 36 | struct l3_process *new_l3_process(struct PStack *st, int cr); |
37 | extern void l3_msg(struct PStack *st, int pr, void *arg); | 37 | void release_l3_process(struct l3_process *p); |
38 | struct l3_process *getl3proc(struct PStack *st, int cr); | ||
39 | void l3_msg(struct PStack *st, int pr, void *arg); | ||
40 | void setstack_dss1(struct PStack *st); | ||
41 | void setstack_ni1(struct PStack *st); | ||
42 | void setstack_1tr6(struct PStack *st); | ||
43 | |||
diff --git a/drivers/isdn/hysdn/hysdn_procconf.c b/drivers/isdn/hysdn/hysdn_procconf.c index 94a935089119..dc477e0aab0e 100644 --- a/drivers/isdn/hysdn/hysdn_procconf.c +++ b/drivers/isdn/hysdn/hysdn_procconf.c | |||
@@ -367,7 +367,7 @@ hysdn_conf_close(struct inode *ino, struct file *filep) | |||
367 | /******************************************************/ | 367 | /******************************************************/ |
368 | /* table for conf filesystem functions defined above. */ | 368 | /* table for conf filesystem functions defined above. */ |
369 | /******************************************************/ | 369 | /******************************************************/ |
370 | static struct file_operations conf_fops = | 370 | static const struct file_operations conf_fops = |
371 | { | 371 | { |
372 | .llseek = no_llseek, | 372 | .llseek = no_llseek, |
373 | .read = hysdn_conf_read, | 373 | .read = hysdn_conf_read, |
diff --git a/drivers/isdn/hysdn/hysdn_proclog.c b/drivers/isdn/hysdn/hysdn_proclog.c index 375d956884d7..f7e83a86f444 100644 --- a/drivers/isdn/hysdn/hysdn_proclog.c +++ b/drivers/isdn/hysdn/hysdn_proclog.c | |||
@@ -383,7 +383,7 @@ hysdn_log_poll(struct file *file, poll_table * wait) | |||
383 | /**************************************************/ | 383 | /**************************************************/ |
384 | /* table for log filesystem functions defined above. */ | 384 | /* table for log filesystem functions defined above. */ |
385 | /**************************************************/ | 385 | /**************************************************/ |
386 | static struct file_operations log_fops = | 386 | static const struct file_operations log_fops = |
387 | { | 387 | { |
388 | .llseek = no_llseek, | 388 | .llseek = no_llseek, |
389 | .read = hysdn_log_read, | 389 | .read = hysdn_log_read, |
diff --git a/drivers/isdn/i4l/isdn_common.c b/drivers/isdn/i4l/isdn_common.c index 6a2ef0a87ed9..9c926e41b114 100644 --- a/drivers/isdn/i4l/isdn_common.c +++ b/drivers/isdn/i4l/isdn_common.c | |||
@@ -1822,7 +1822,7 @@ isdn_close(struct inode *ino, struct file *filep) | |||
1822 | return 0; | 1822 | return 0; |
1823 | } | 1823 | } |
1824 | 1824 | ||
1825 | static struct file_operations isdn_fops = | 1825 | static const struct file_operations isdn_fops = |
1826 | { | 1826 | { |
1827 | .owner = THIS_MODULE, | 1827 | .owner = THIS_MODULE, |
1828 | .llseek = no_llseek, | 1828 | .llseek = no_llseek, |
diff --git a/drivers/isdn/pcbit/drv.c b/drivers/isdn/pcbit/drv.c index 11c1b0b6e390..386c5ce64844 100644 --- a/drivers/isdn/pcbit/drv.c +++ b/drivers/isdn/pcbit/drv.c | |||
@@ -774,10 +774,6 @@ static void pcbit_logstat(struct pcbit_dev *dev, char *str) | |||
774 | dev->dev_if->statcallb(&ictl); | 774 | dev->dev_if->statcallb(&ictl); |
775 | } | 775 | } |
776 | 776 | ||
777 | extern char * isdn_state_table[]; | ||
778 | extern char * strisdnevent(unsigned short); | ||
779 | |||
780 | |||
781 | void pcbit_state_change(struct pcbit_dev * dev, struct pcbit_chan * chan, | 777 | void pcbit_state_change(struct pcbit_dev * dev, struct pcbit_chan * chan, |
782 | unsigned short i, unsigned short ev, unsigned short f) | 778 | unsigned short i, unsigned short ev, unsigned short f) |
783 | { | 779 | { |
diff --git a/drivers/isdn/pcbit/edss1.c b/drivers/isdn/pcbit/edss1.c index 93ca7de5670b..1ad8b07efd8b 100644 --- a/drivers/isdn/pcbit/edss1.c +++ b/drivers/isdn/pcbit/edss1.c | |||
@@ -35,12 +35,6 @@ | |||
35 | #include "callbacks.h" | 35 | #include "callbacks.h" |
36 | 36 | ||
37 | 37 | ||
38 | extern void pcbit_state_change(struct pcbit_dev *, struct pcbit_chan *, | ||
39 | unsigned short i, unsigned short ev, | ||
40 | unsigned short f); | ||
41 | |||
42 | extern struct pcbit_dev * dev_pcbit[MAX_PCBIT_CARDS]; | ||
43 | |||
44 | char * isdn_state_table[] = { | 38 | char * isdn_state_table[] = { |
45 | "Closed", | 39 | "Closed", |
46 | "Call initiated", | 40 | "Call initiated", |
diff --git a/drivers/isdn/pcbit/edss1.h b/drivers/isdn/pcbit/edss1.h index 6bb587005b86..0b64f97015d8 100644 --- a/drivers/isdn/pcbit/edss1.h +++ b/drivers/isdn/pcbit/edss1.h | |||
@@ -90,9 +90,12 @@ struct fsm_timer_entry { | |||
90 | unsigned long timeout; /* in seconds */ | 90 | unsigned long timeout; /* in seconds */ |
91 | }; | 91 | }; |
92 | 92 | ||
93 | extern char * isdn_state_table[]; | ||
94 | |||
95 | void pcbit_fsm_event(struct pcbit_dev *, struct pcbit_chan *, | ||
96 | unsigned short event, struct callb_data *); | ||
97 | char * strisdnevent(ushort ev); | ||
93 | 98 | ||
94 | extern void pcbit_fsm_event(struct pcbit_dev *, struct pcbit_chan *, | ||
95 | unsigned short event, struct callb_data *); | ||
96 | #endif | 99 | #endif |
97 | 100 | ||
98 | 101 | ||
diff --git a/drivers/isdn/pcbit/layer2.c b/drivers/isdn/pcbit/layer2.c index eafcce5e656a..58eee50c8e26 100644 --- a/drivers/isdn/pcbit/layer2.c +++ b/drivers/isdn/pcbit/layer2.c | |||
@@ -47,22 +47,6 @@ | |||
47 | #undef DEBUG_FRAG | 47 | #undef DEBUG_FRAG |
48 | 48 | ||
49 | 49 | ||
50 | |||
51 | /* | ||
52 | * task queue struct | ||
53 | */ | ||
54 | |||
55 | |||
56 | |||
57 | /* | ||
58 | * Layer 3 packet demultiplexer | ||
59 | * drv.c | ||
60 | */ | ||
61 | |||
62 | extern void pcbit_l3_receive(struct pcbit_dev *dev, ulong msg, | ||
63 | struct sk_buff *skb, | ||
64 | ushort hdr_len, ushort refnum); | ||
65 | |||
66 | /* | 50 | /* |
67 | * Prototypes | 51 | * Prototypes |
68 | */ | 52 | */ |
diff --git a/drivers/isdn/pcbit/module.c b/drivers/isdn/pcbit/module.c index 282073a35d6a..7b7b1777f09b 100644 --- a/drivers/isdn/pcbit/module.c +++ b/drivers/isdn/pcbit/module.c | |||
@@ -32,9 +32,6 @@ module_param_array(irq, int, NULL, 0); | |||
32 | static int num_boards; | 32 | static int num_boards; |
33 | struct pcbit_dev * dev_pcbit[MAX_PCBIT_CARDS]; | 33 | struct pcbit_dev * dev_pcbit[MAX_PCBIT_CARDS]; |
34 | 34 | ||
35 | extern void pcbit_terminate(int board); | ||
36 | extern int pcbit_init_dev(int board, int mem_base, int irq); | ||
37 | |||
38 | static int __init pcbit_init(void) | 35 | static int __init pcbit_init(void) |
39 | { | 36 | { |
40 | int board; | 37 | int board; |
diff --git a/drivers/isdn/pcbit/pcbit.h b/drivers/isdn/pcbit/pcbit.h index 19c18e88ff16..d76fffc88b82 100644 --- a/drivers/isdn/pcbit/pcbit.h +++ b/drivers/isdn/pcbit/pcbit.h | |||
@@ -166,6 +166,12 @@ struct pcbit_ioctl { | |||
166 | #define L2_RUNNING 5 | 166 | #define L2_RUNNING 5 |
167 | #define L2_ERROR 6 | 167 | #define L2_ERROR 6 |
168 | 168 | ||
169 | extern void pcbit_deliver(struct work_struct *work); | 169 | void pcbit_deliver(struct work_struct *work); |
170 | int pcbit_init_dev(int board, int mem_base, int irq); | ||
171 | void pcbit_terminate(int board); | ||
172 | void pcbit_l3_receive(struct pcbit_dev * dev, ulong msg, struct sk_buff * skb, | ||
173 | ushort hdr_len, ushort refnum); | ||
174 | void pcbit_state_change(struct pcbit_dev * dev, struct pcbit_chan * chan, | ||
175 | unsigned short i, unsigned short ev, unsigned short f); | ||
170 | 176 | ||
171 | #endif | 177 | #endif |
diff --git a/drivers/isdn/sc/card.h b/drivers/isdn/sc/card.h index 8e44928cdf1c..4fbfa825c3a2 100644 --- a/drivers/isdn/sc/card.h +++ b/drivers/isdn/sc/card.h | |||
@@ -26,7 +26,9 @@ | |||
26 | #include <linux/timer.h> | 26 | #include <linux/timer.h> |
27 | #include <linux/time.h> | 27 | #include <linux/time.h> |
28 | #include <linux/isdnif.h> | 28 | #include <linux/isdnif.h> |
29 | #include <linux/irqreturn.h> | ||
29 | #include "message.h" | 30 | #include "message.h" |
31 | #include "scioc.h" | ||
30 | 32 | ||
31 | /* | 33 | /* |
32 | * Amount of time to wait for a reset to complete | 34 | * Amount of time to wait for a reset to complete |
@@ -98,4 +100,32 @@ typedef struct { | |||
98 | spinlock_t lock; /* local lock */ | 100 | spinlock_t lock; /* local lock */ |
99 | } board; | 101 | } board; |
100 | 102 | ||
103 | |||
104 | extern board *sc_adapter[]; | ||
105 | extern int cinst; | ||
106 | |||
107 | void memcpy_toshmem(int card, void *dest, const void *src, size_t n); | ||
108 | void memcpy_fromshmem(int card, void *dest, const void *src, size_t n); | ||
109 | int get_card_from_id(int driver); | ||
110 | int indicate_status(int card, int event, ulong Channel, char *Data); | ||
111 | irqreturn_t interrupt_handler(int interrupt, void *cardptr); | ||
112 | int sndpkt(int devId, int channel, struct sk_buff *data); | ||
113 | void rcvpkt(int card, RspMessage *rcvmsg); | ||
114 | int command(isdn_ctrl *cmd); | ||
115 | int reset(int card); | ||
116 | int startproc(int card); | ||
117 | int send_and_receive(int card, unsigned int procid, unsigned char type, | ||
118 | unsigned char class, unsigned char code, | ||
119 | unsigned char link, unsigned char data_len, | ||
120 | unsigned char *data, RspMessage *mesgdata, int timeout); | ||
121 | void flushreadfifo (int card); | ||
122 | int sendmessage(int card, unsigned int procid, unsigned int type, | ||
123 | unsigned int class, unsigned int code, unsigned int link, | ||
124 | unsigned int data_len, unsigned int *data); | ||
125 | int receivemessage(int card, RspMessage *rspmsg); | ||
126 | int sc_ioctl(int card, scs_ioctl *data); | ||
127 | int setup_buffers(int card, int c); | ||
128 | void check_reset(unsigned long data); | ||
129 | void check_phystat(unsigned long data); | ||
130 | |||
101 | #endif /* CARD_H */ | 131 | #endif /* CARD_H */ |
diff --git a/drivers/isdn/sc/command.c b/drivers/isdn/sc/command.c index 04b8a58f03b5..b7bb7cbcf503 100644 --- a/drivers/isdn/sc/command.c +++ b/drivers/isdn/sc/command.c | |||
@@ -31,19 +31,6 @@ static int setl2(int card, unsigned long arg); | |||
31 | static int setl3(int card, unsigned long arg); | 31 | static int setl3(int card, unsigned long arg); |
32 | static int acceptb(int card, unsigned long channel); | 32 | static int acceptb(int card, unsigned long channel); |
33 | 33 | ||
34 | extern int cinst; | ||
35 | extern board *sc_adapter[]; | ||
36 | |||
37 | extern int sc_ioctl(int, scs_ioctl *); | ||
38 | extern int setup_buffers(int, int, unsigned int); | ||
39 | extern int indicate_status(int, int,ulong,char*); | ||
40 | extern void check_reset(unsigned long); | ||
41 | extern int send_and_receive(int, unsigned int, unsigned char, unsigned char, | ||
42 | unsigned char, unsigned char, unsigned char, unsigned char *, | ||
43 | RspMessage *, int); | ||
44 | extern int sendmessage(int, unsigned int, unsigned int, unsigned int, | ||
45 | unsigned int, unsigned int, unsigned int, unsigned int *); | ||
46 | |||
47 | #ifdef DEBUG | 34 | #ifdef DEBUG |
48 | /* | 35 | /* |
49 | * Translate command codes to strings | 36 | * Translate command codes to strings |
@@ -208,7 +195,7 @@ static int answer(int card, unsigned long channel) | |||
208 | return -ENODEV; | 195 | return -ENODEV; |
209 | } | 196 | } |
210 | 197 | ||
211 | if(setup_buffers(card, channel+1, BUFFER_SIZE)) { | 198 | if(setup_buffers(card, channel+1)) { |
212 | hangup(card, channel+1); | 199 | hangup(card, channel+1); |
213 | return -ENOBUFS; | 200 | return -ENOBUFS; |
214 | } | 201 | } |
@@ -297,7 +284,7 @@ static int acceptb(int card, unsigned long channel) | |||
297 | return -ENODEV; | 284 | return -ENODEV; |
298 | } | 285 | } |
299 | 286 | ||
300 | if(setup_buffers(card, channel+1, BUFFER_SIZE)) | 287 | if(setup_buffers(card, channel+1)) |
301 | { | 288 | { |
302 | hangup(card, channel+1); | 289 | hangup(card, channel+1); |
303 | return -ENOBUFS; | 290 | return -ENOBUFS; |
diff --git a/drivers/isdn/sc/event.c b/drivers/isdn/sc/event.c index 57367325ef04..498f4039ece2 100644 --- a/drivers/isdn/sc/event.c +++ b/drivers/isdn/sc/event.c | |||
@@ -20,9 +20,6 @@ | |||
20 | #include "message.h" | 20 | #include "message.h" |
21 | #include "card.h" | 21 | #include "card.h" |
22 | 22 | ||
23 | extern int cinst; | ||
24 | extern board *sc_adapter[]; | ||
25 | |||
26 | #ifdef DEBUG | 23 | #ifdef DEBUG |
27 | static char *events[] = { "ISDN_STAT_STAVAIL", | 24 | static char *events[] = { "ISDN_STAT_STAVAIL", |
28 | "ISDN_STAT_ICALL", | 25 | "ISDN_STAT_ICALL", |
diff --git a/drivers/isdn/sc/init.c b/drivers/isdn/sc/init.c index 150759a5cddf..0bf76344a0d5 100644 --- a/drivers/isdn/sc/init.c +++ b/drivers/isdn/sc/init.c | |||
@@ -35,12 +35,6 @@ module_param_array(irq, int, NULL, 0); | |||
35 | module_param_array(ram, int, NULL, 0); | 35 | module_param_array(ram, int, NULL, 0); |
36 | module_param(do_reset, bool, 0); | 36 | module_param(do_reset, bool, 0); |
37 | 37 | ||
38 | extern irqreturn_t interrupt_handler(int, void *); | ||
39 | extern int sndpkt(int, int, int, struct sk_buff *); | ||
40 | extern int command(isdn_ctrl *); | ||
41 | extern int indicate_status(int, int, ulong, char*); | ||
42 | extern int reset(int); | ||
43 | |||
44 | static int identify_board(unsigned long, unsigned int); | 38 | static int identify_board(unsigned long, unsigned int); |
45 | 39 | ||
46 | static int __init sc_init(void) | 40 | static int __init sc_init(void) |
diff --git a/drivers/isdn/sc/interrupt.c b/drivers/isdn/sc/interrupt.c index cd17de18cb76..bef7963cdd02 100644 --- a/drivers/isdn/sc/interrupt.c +++ b/drivers/isdn/sc/interrupt.c | |||
@@ -21,16 +21,6 @@ | |||
21 | #include "card.h" | 21 | #include "card.h" |
22 | #include <linux/interrupt.h> | 22 | #include <linux/interrupt.h> |
23 | 23 | ||
24 | extern int indicate_status(int, int, ulong, char *); | ||
25 | extern void check_phystat(unsigned long); | ||
26 | extern int receivemessage(int, RspMessage *); | ||
27 | extern int sendmessage(int, unsigned int, unsigned int, unsigned int, | ||
28 | unsigned int, unsigned int, unsigned int, unsigned int *); | ||
29 | extern void rcvpkt(int, RspMessage *); | ||
30 | |||
31 | extern int cinst; | ||
32 | extern board *sc_adapter[]; | ||
33 | |||
34 | static int get_card_from_irq(int irq) | 24 | static int get_card_from_irq(int irq) |
35 | { | 25 | { |
36 | int i; | 26 | int i; |
diff --git a/drivers/isdn/sc/ioctl.c b/drivers/isdn/sc/ioctl.c index 57c4ab96d136..7817d2244921 100644 --- a/drivers/isdn/sc/ioctl.c +++ b/drivers/isdn/sc/ioctl.c | |||
@@ -12,16 +12,6 @@ | |||
12 | #include "card.h" | 12 | #include "card.h" |
13 | #include "scioc.h" | 13 | #include "scioc.h" |
14 | 14 | ||
15 | extern int indicate_status(int, int, unsigned long, char *); | ||
16 | extern int startproc(int); | ||
17 | extern int reset(int); | ||
18 | extern int send_and_receive(int, unsigned int, unsigned char,unsigned char, | ||
19 | unsigned char,unsigned char, | ||
20 | unsigned char, unsigned char *, RspMessage *, int); | ||
21 | |||
22 | extern board *sc_adapter[]; | ||
23 | |||
24 | |||
25 | static int GetStatus(int card, boardInfo *); | 15 | static int GetStatus(int card, boardInfo *); |
26 | 16 | ||
27 | /* | 17 | /* |
diff --git a/drivers/isdn/sc/message.c b/drivers/isdn/sc/message.c index 0a0fe6b8039b..c5a307e3c496 100644 --- a/drivers/isdn/sc/message.c +++ b/drivers/isdn/sc/message.c | |||
@@ -22,16 +22,6 @@ | |||
22 | #include "message.h" | 22 | #include "message.h" |
23 | #include "card.h" | 23 | #include "card.h" |
24 | 24 | ||
25 | extern board *sc_adapter[]; | ||
26 | extern unsigned int cinst; | ||
27 | |||
28 | /* | ||
29 | * Obligatory function prototypes | ||
30 | */ | ||
31 | extern int indicate_status(int,ulong,char*); | ||
32 | extern int scm_command(isdn_ctrl *); | ||
33 | |||
34 | |||
35 | /* | 25 | /* |
36 | * receive a message from the board | 26 | * receive a message from the board |
37 | */ | 27 | */ |
diff --git a/drivers/isdn/sc/packet.c b/drivers/isdn/sc/packet.c index 1e04676b016b..92016a2608e9 100644 --- a/drivers/isdn/sc/packet.c +++ b/drivers/isdn/sc/packet.c | |||
@@ -20,16 +20,6 @@ | |||
20 | #include "message.h" | 20 | #include "message.h" |
21 | #include "card.h" | 21 | #include "card.h" |
22 | 22 | ||
23 | extern board *sc_adapter[]; | ||
24 | extern unsigned int cinst; | ||
25 | |||
26 | extern int get_card_from_id(int); | ||
27 | extern int indicate_status(int, int,ulong, char*); | ||
28 | extern void memcpy_toshmem(int, void *, const void *, size_t); | ||
29 | extern void memcpy_fromshmem(int, void *, const void *, size_t); | ||
30 | extern int sendmessage(int, unsigned int, unsigned int, unsigned int, | ||
31 | unsigned int, unsigned int, unsigned int, unsigned int *); | ||
32 | |||
33 | int sndpkt(int devId, int channel, struct sk_buff *data) | 23 | int sndpkt(int devId, int channel, struct sk_buff *data) |
34 | { | 24 | { |
35 | LLData ReqLnkWrite; | 25 | LLData ReqLnkWrite; |
diff --git a/drivers/isdn/sc/scioc.h b/drivers/isdn/sc/scioc.h index d08e650c7b6a..dfb107a6de44 100644 --- a/drivers/isdn/sc/scioc.h +++ b/drivers/isdn/sc/scioc.h | |||
@@ -1,3 +1,6 @@ | |||
1 | #ifndef __ISDN_SC_SCIOC_H__ | ||
2 | #define __ISDN_SC_SCIOC_H__ | ||
3 | |||
1 | /* | 4 | /* |
2 | * This software may be used and distributed according to the terms | 5 | * This software may be used and distributed according to the terms |
3 | * of the GNU General Public License, incorporated herein by reference. | 6 | * of the GNU General Public License, incorporated herein by reference. |
@@ -103,3 +106,6 @@ typedef struct { | |||
103 | POTInfo potsinfo; | 106 | POTInfo potsinfo; |
104 | } info; | 107 | } info; |
105 | } boardInfo; | 108 | } boardInfo; |
109 | |||
110 | #endif /* __ISDN_SC_SCIOC_H__ */ | ||
111 | |||
diff --git a/drivers/isdn/sc/shmem.c b/drivers/isdn/sc/shmem.c index 6f58862992db..034d41a61ae1 100644 --- a/drivers/isdn/sc/shmem.c +++ b/drivers/isdn/sc/shmem.c | |||
@@ -22,12 +22,6 @@ | |||
22 | #include "card.h" | 22 | #include "card.h" |
23 | 23 | ||
24 | /* | 24 | /* |
25 | * Main adapter array | ||
26 | */ | ||
27 | extern board *sc_adapter[]; | ||
28 | extern int cinst; | ||
29 | |||
30 | /* | ||
31 | * | 25 | * |
32 | */ | 26 | */ |
33 | void memcpy_toshmem(int card, void *dest, const void *src, size_t n) | 27 | void memcpy_toshmem(int card, void *dest, const void *src, size_t n) |
diff --git a/drivers/isdn/sc/timer.c b/drivers/isdn/sc/timer.c index f43282be0ada..cc1b8861be2a 100644 --- a/drivers/isdn/sc/timer.c +++ b/drivers/isdn/sc/timer.c | |||
@@ -20,14 +20,6 @@ | |||
20 | #include "message.h" | 20 | #include "message.h" |
21 | #include "card.h" | 21 | #include "card.h" |
22 | 22 | ||
23 | extern board *sc_adapter[]; | ||
24 | |||
25 | extern void flushreadfifo(int); | ||
26 | extern int startproc(int); | ||
27 | extern int indicate_status(int, int, unsigned long, char *); | ||
28 | extern int sendmessage(int, unsigned int, unsigned int, unsigned int, | ||
29 | unsigned int, unsigned int, unsigned int, unsigned int *); | ||
30 | |||
31 | 23 | ||
32 | /* | 24 | /* |
33 | * Write the proper values into the I/O ports following a reset | 25 | * Write the proper values into the I/O ports following a reset |
diff --git a/drivers/kvm/kvm.h b/drivers/kvm/kvm.h index 2db1ca4c6800..04574a9d4430 100644 --- a/drivers/kvm/kvm.h +++ b/drivers/kvm/kvm.h | |||
@@ -304,6 +304,7 @@ struct kvm { | |||
304 | int memory_config_version; | 304 | int memory_config_version; |
305 | int busy; | 305 | int busy; |
306 | unsigned long rmap_overflow; | 306 | unsigned long rmap_overflow; |
307 | struct list_head vm_list; | ||
307 | }; | 308 | }; |
308 | 309 | ||
309 | struct kvm_stat { | 310 | struct kvm_stat { |
@@ -340,6 +341,7 @@ struct kvm_arch_ops { | |||
340 | 341 | ||
341 | struct kvm_vcpu *(*vcpu_load)(struct kvm_vcpu *vcpu); | 342 | struct kvm_vcpu *(*vcpu_load)(struct kvm_vcpu *vcpu); |
342 | void (*vcpu_put)(struct kvm_vcpu *vcpu); | 343 | void (*vcpu_put)(struct kvm_vcpu *vcpu); |
344 | void (*vcpu_decache)(struct kvm_vcpu *vcpu); | ||
343 | 345 | ||
344 | int (*set_guest_debug)(struct kvm_vcpu *vcpu, | 346 | int (*set_guest_debug)(struct kvm_vcpu *vcpu, |
345 | struct kvm_debug_guest *dbg); | 347 | struct kvm_debug_guest *dbg); |
@@ -558,7 +560,7 @@ static inline void load_gs(u16 sel) | |||
558 | #ifndef load_ldt | 560 | #ifndef load_ldt |
559 | static inline void load_ldt(u16 sel) | 561 | static inline void load_ldt(u16 sel) |
560 | { | 562 | { |
561 | asm ("lldt %0" : : "g"(sel)); | 563 | asm ("lldt %0" : : "rm"(sel)); |
562 | } | 564 | } |
563 | #endif | 565 | #endif |
564 | 566 | ||
diff --git a/drivers/kvm/kvm_main.c b/drivers/kvm/kvm_main.c index 099f0afd394d..af866147ff25 100644 --- a/drivers/kvm/kvm_main.c +++ b/drivers/kvm/kvm_main.c | |||
@@ -34,6 +34,8 @@ | |||
34 | #include <linux/highmem.h> | 34 | #include <linux/highmem.h> |
35 | #include <linux/file.h> | 35 | #include <linux/file.h> |
36 | #include <asm/desc.h> | 36 | #include <asm/desc.h> |
37 | #include <linux/sysdev.h> | ||
38 | #include <linux/cpu.h> | ||
37 | 39 | ||
38 | #include "x86_emulate.h" | 40 | #include "x86_emulate.h" |
39 | #include "segment_descriptor.h" | 41 | #include "segment_descriptor.h" |
@@ -41,6 +43,9 @@ | |||
41 | MODULE_AUTHOR("Qumranet"); | 43 | MODULE_AUTHOR("Qumranet"); |
42 | MODULE_LICENSE("GPL"); | 44 | MODULE_LICENSE("GPL"); |
43 | 45 | ||
46 | static DEFINE_SPINLOCK(kvm_lock); | ||
47 | static LIST_HEAD(vm_list); | ||
48 | |||
44 | struct kvm_arch_ops *kvm_arch_ops; | 49 | struct kvm_arch_ops *kvm_arch_ops; |
45 | struct kvm_stat kvm_stat; | 50 | struct kvm_stat kvm_stat; |
46 | EXPORT_SYMBOL_GPL(kvm_stat); | 51 | EXPORT_SYMBOL_GPL(kvm_stat); |
@@ -230,9 +235,13 @@ static int kvm_dev_open(struct inode *inode, struct file *filp) | |||
230 | struct kvm_vcpu *vcpu = &kvm->vcpus[i]; | 235 | struct kvm_vcpu *vcpu = &kvm->vcpus[i]; |
231 | 236 | ||
232 | mutex_init(&vcpu->mutex); | 237 | mutex_init(&vcpu->mutex); |
238 | vcpu->cpu = -1; | ||
233 | vcpu->kvm = kvm; | 239 | vcpu->kvm = kvm; |
234 | vcpu->mmu.root_hpa = INVALID_PAGE; | 240 | vcpu->mmu.root_hpa = INVALID_PAGE; |
235 | INIT_LIST_HEAD(&vcpu->free_pages); | 241 | INIT_LIST_HEAD(&vcpu->free_pages); |
242 | spin_lock(&kvm_lock); | ||
243 | list_add(&kvm->vm_list, &vm_list); | ||
244 | spin_unlock(&kvm_lock); | ||
236 | } | 245 | } |
237 | filp->private_data = kvm; | 246 | filp->private_data = kvm; |
238 | return 0; | 247 | return 0; |
@@ -272,7 +281,9 @@ static void kvm_free_physmem(struct kvm *kvm) | |||
272 | 281 | ||
273 | static void kvm_free_vcpu(struct kvm_vcpu *vcpu) | 282 | static void kvm_free_vcpu(struct kvm_vcpu *vcpu) |
274 | { | 283 | { |
275 | vcpu_load(vcpu->kvm, vcpu_slot(vcpu)); | 284 | if (!vcpu_load(vcpu->kvm, vcpu_slot(vcpu))) |
285 | return; | ||
286 | |||
276 | kvm_mmu_destroy(vcpu); | 287 | kvm_mmu_destroy(vcpu); |
277 | vcpu_put(vcpu); | 288 | vcpu_put(vcpu); |
278 | kvm_arch_ops->vcpu_free(vcpu); | 289 | kvm_arch_ops->vcpu_free(vcpu); |
@@ -290,6 +301,9 @@ static int kvm_dev_release(struct inode *inode, struct file *filp) | |||
290 | { | 301 | { |
291 | struct kvm *kvm = filp->private_data; | 302 | struct kvm *kvm = filp->private_data; |
292 | 303 | ||
304 | spin_lock(&kvm_lock); | ||
305 | list_del(&kvm->vm_list); | ||
306 | spin_unlock(&kvm_lock); | ||
293 | kvm_free_vcpus(kvm); | 307 | kvm_free_vcpus(kvm); |
294 | kvm_free_physmem(kvm); | 308 | kvm_free_physmem(kvm); |
295 | kfree(kvm); | 309 | kfree(kvm); |
@@ -544,7 +558,6 @@ static int kvm_dev_ioctl_create_vcpu(struct kvm *kvm, int n) | |||
544 | FX_IMAGE_ALIGN); | 558 | FX_IMAGE_ALIGN); |
545 | vcpu->guest_fx_image = vcpu->host_fx_image + FX_IMAGE_SIZE; | 559 | vcpu->guest_fx_image = vcpu->host_fx_image + FX_IMAGE_SIZE; |
546 | 560 | ||
547 | vcpu->cpu = -1; /* First load will set up TR */ | ||
548 | r = kvm_arch_ops->vcpu_create(vcpu); | 561 | r = kvm_arch_ops->vcpu_create(vcpu); |
549 | if (r < 0) | 562 | if (r < 0) |
550 | goto out_free_vcpus; | 563 | goto out_free_vcpus; |
@@ -1360,6 +1373,9 @@ static int kvm_dev_ioctl_run(struct kvm *kvm, struct kvm_run *kvm_run) | |||
1360 | if (!vcpu) | 1373 | if (!vcpu) |
1361 | return -ENOENT; | 1374 | return -ENOENT; |
1362 | 1375 | ||
1376 | /* re-sync apic's tpr */ | ||
1377 | vcpu->cr8 = kvm_run->cr8; | ||
1378 | |||
1363 | if (kvm_run->emulated) { | 1379 | if (kvm_run->emulated) { |
1364 | kvm_arch_ops->skip_emulated_instruction(vcpu); | 1380 | kvm_arch_ops->skip_emulated_instruction(vcpu); |
1365 | kvm_run->emulated = 0; | 1381 | kvm_run->emulated = 0; |
@@ -2025,6 +2041,64 @@ static struct notifier_block kvm_reboot_notifier = { | |||
2025 | .priority = 0, | 2041 | .priority = 0, |
2026 | }; | 2042 | }; |
2027 | 2043 | ||
2044 | /* | ||
2045 | * Make sure that a cpu that is being hot-unplugged does not have any vcpus | ||
2046 | * cached on it. | ||
2047 | */ | ||
2048 | static void decache_vcpus_on_cpu(int cpu) | ||
2049 | { | ||
2050 | struct kvm *vm; | ||
2051 | struct kvm_vcpu *vcpu; | ||
2052 | int i; | ||
2053 | |||
2054 | spin_lock(&kvm_lock); | ||
2055 | list_for_each_entry(vm, &vm_list, vm_list) | ||
2056 | for (i = 0; i < KVM_MAX_VCPUS; ++i) { | ||
2057 | vcpu = &vm->vcpus[i]; | ||
2058 | /* | ||
2059 | * If the vcpu is locked, then it is running on some | ||
2060 | * other cpu and therefore it is not cached on the | ||
2061 | * cpu in question. | ||
2062 | * | ||
2063 | * If it's not locked, check the last cpu it executed | ||
2064 | * on. | ||
2065 | */ | ||
2066 | if (mutex_trylock(&vcpu->mutex)) { | ||
2067 | if (vcpu->cpu == cpu) { | ||
2068 | kvm_arch_ops->vcpu_decache(vcpu); | ||
2069 | vcpu->cpu = -1; | ||
2070 | } | ||
2071 | mutex_unlock(&vcpu->mutex); | ||
2072 | } | ||
2073 | } | ||
2074 | spin_unlock(&kvm_lock); | ||
2075 | } | ||
2076 | |||
2077 | static int kvm_cpu_hotplug(struct notifier_block *notifier, unsigned long val, | ||
2078 | void *v) | ||
2079 | { | ||
2080 | int cpu = (long)v; | ||
2081 | |||
2082 | switch (val) { | ||
2083 | case CPU_DEAD: | ||
2084 | case CPU_UP_CANCELED: | ||
2085 | decache_vcpus_on_cpu(cpu); | ||
2086 | smp_call_function_single(cpu, kvm_arch_ops->hardware_disable, | ||
2087 | NULL, 0, 1); | ||
2088 | break; | ||
2089 | case CPU_UP_PREPARE: | ||
2090 | smp_call_function_single(cpu, kvm_arch_ops->hardware_enable, | ||
2091 | NULL, 0, 1); | ||
2092 | break; | ||
2093 | } | ||
2094 | return NOTIFY_OK; | ||
2095 | } | ||
2096 | |||
2097 | static struct notifier_block kvm_cpu_notifier = { | ||
2098 | .notifier_call = kvm_cpu_hotplug, | ||
2099 | .priority = 20, /* must be > scheduler priority */ | ||
2100 | }; | ||
2101 | |||
2028 | static __init void kvm_init_debug(void) | 2102 | static __init void kvm_init_debug(void) |
2029 | { | 2103 | { |
2030 | struct kvm_stats_debugfs_item *p; | 2104 | struct kvm_stats_debugfs_item *p; |
@@ -2044,6 +2118,30 @@ static void kvm_exit_debug(void) | |||
2044 | debugfs_remove(debugfs_dir); | 2118 | debugfs_remove(debugfs_dir); |
2045 | } | 2119 | } |
2046 | 2120 | ||
2121 | static int kvm_suspend(struct sys_device *dev, pm_message_t state) | ||
2122 | { | ||
2123 | decache_vcpus_on_cpu(raw_smp_processor_id()); | ||
2124 | on_each_cpu(kvm_arch_ops->hardware_disable, 0, 0, 1); | ||
2125 | return 0; | ||
2126 | } | ||
2127 | |||
2128 | static int kvm_resume(struct sys_device *dev) | ||
2129 | { | ||
2130 | on_each_cpu(kvm_arch_ops->hardware_enable, 0, 0, 1); | ||
2131 | return 0; | ||
2132 | } | ||
2133 | |||
2134 | static struct sysdev_class kvm_sysdev_class = { | ||
2135 | set_kset_name("kvm"), | ||
2136 | .suspend = kvm_suspend, | ||
2137 | .resume = kvm_resume, | ||
2138 | }; | ||
2139 | |||
2140 | static struct sys_device kvm_sysdev = { | ||
2141 | .id = 0, | ||
2142 | .cls = &kvm_sysdev_class, | ||
2143 | }; | ||
2144 | |||
2047 | hpa_t bad_page_address; | 2145 | hpa_t bad_page_address; |
2048 | 2146 | ||
2049 | int kvm_init_arch(struct kvm_arch_ops *ops, struct module *module) | 2147 | int kvm_init_arch(struct kvm_arch_ops *ops, struct module *module) |
@@ -2071,8 +2169,19 @@ int kvm_init_arch(struct kvm_arch_ops *ops, struct module *module) | |||
2071 | return r; | 2169 | return r; |
2072 | 2170 | ||
2073 | on_each_cpu(kvm_arch_ops->hardware_enable, NULL, 0, 1); | 2171 | on_each_cpu(kvm_arch_ops->hardware_enable, NULL, 0, 1); |
2172 | r = register_cpu_notifier(&kvm_cpu_notifier); | ||
2173 | if (r) | ||
2174 | goto out_free_1; | ||
2074 | register_reboot_notifier(&kvm_reboot_notifier); | 2175 | register_reboot_notifier(&kvm_reboot_notifier); |
2075 | 2176 | ||
2177 | r = sysdev_class_register(&kvm_sysdev_class); | ||
2178 | if (r) | ||
2179 | goto out_free_2; | ||
2180 | |||
2181 | r = sysdev_register(&kvm_sysdev); | ||
2182 | if (r) | ||
2183 | goto out_free_3; | ||
2184 | |||
2076 | kvm_chardev_ops.owner = module; | 2185 | kvm_chardev_ops.owner = module; |
2077 | 2186 | ||
2078 | r = misc_register(&kvm_dev); | 2187 | r = misc_register(&kvm_dev); |
@@ -2084,7 +2193,13 @@ int kvm_init_arch(struct kvm_arch_ops *ops, struct module *module) | |||
2084 | return r; | 2193 | return r; |
2085 | 2194 | ||
2086 | out_free: | 2195 | out_free: |
2196 | sysdev_unregister(&kvm_sysdev); | ||
2197 | out_free_3: | ||
2198 | sysdev_class_unregister(&kvm_sysdev_class); | ||
2199 | out_free_2: | ||
2087 | unregister_reboot_notifier(&kvm_reboot_notifier); | 2200 | unregister_reboot_notifier(&kvm_reboot_notifier); |
2201 | unregister_cpu_notifier(&kvm_cpu_notifier); | ||
2202 | out_free_1: | ||
2088 | on_each_cpu(kvm_arch_ops->hardware_disable, NULL, 0, 1); | 2203 | on_each_cpu(kvm_arch_ops->hardware_disable, NULL, 0, 1); |
2089 | kvm_arch_ops->hardware_unsetup(); | 2204 | kvm_arch_ops->hardware_unsetup(); |
2090 | return r; | 2205 | return r; |
@@ -2093,8 +2208,10 @@ out_free: | |||
2093 | void kvm_exit_arch(void) | 2208 | void kvm_exit_arch(void) |
2094 | { | 2209 | { |
2095 | misc_deregister(&kvm_dev); | 2210 | misc_deregister(&kvm_dev); |
2096 | 2211 | sysdev_unregister(&kvm_sysdev); | |
2212 | sysdev_class_unregister(&kvm_sysdev_class); | ||
2097 | unregister_reboot_notifier(&kvm_reboot_notifier); | 2213 | unregister_reboot_notifier(&kvm_reboot_notifier); |
2214 | unregister_cpu_notifier(&kvm_cpu_notifier); | ||
2098 | on_each_cpu(kvm_arch_ops->hardware_disable, NULL, 0, 1); | 2215 | on_each_cpu(kvm_arch_ops->hardware_disable, NULL, 0, 1); |
2099 | kvm_arch_ops->hardware_unsetup(); | 2216 | kvm_arch_ops->hardware_unsetup(); |
2100 | kvm_arch_ops = NULL; | 2217 | kvm_arch_ops = NULL; |
diff --git a/drivers/kvm/paging_tmpl.h b/drivers/kvm/paging_tmpl.h index 149fa45fd9a5..b6b90e9e1301 100644 --- a/drivers/kvm/paging_tmpl.h +++ b/drivers/kvm/paging_tmpl.h | |||
@@ -443,31 +443,17 @@ static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr, | |||
443 | static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr) | 443 | static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr) |
444 | { | 444 | { |
445 | struct guest_walker walker; | 445 | struct guest_walker walker; |
446 | pt_element_t guest_pte; | 446 | gpa_t gpa = UNMAPPED_GVA; |
447 | gpa_t gpa; | 447 | int r; |
448 | |||
449 | FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0); | ||
450 | guest_pte = *walker.ptep; | ||
451 | FNAME(release_walker)(&walker); | ||
452 | |||
453 | if (!is_present_pte(guest_pte)) | ||
454 | return UNMAPPED_GVA; | ||
455 | |||
456 | if (walker.level == PT_DIRECTORY_LEVEL) { | ||
457 | ASSERT((guest_pte & PT_PAGE_SIZE_MASK)); | ||
458 | ASSERT(PTTYPE == 64 || is_pse(vcpu)); | ||
459 | 448 | ||
460 | gpa = (guest_pte & PT_DIR_BASE_ADDR_MASK) | (vaddr & | 449 | r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0); |
461 | (PT_LEVEL_MASK(PT_PAGE_TABLE_LEVEL) | ~PAGE_MASK)); | ||
462 | 450 | ||
463 | if (PTTYPE == 32 && is_cpuid_PSE36()) | 451 | if (r) { |
464 | gpa |= (guest_pte & PT32_DIR_PSE36_MASK) << | 452 | gpa = (gpa_t)walker.gfn << PAGE_SHIFT; |
465 | (32 - PT32_DIR_PSE36_SHIFT); | 453 | gpa |= vaddr & ~PAGE_MASK; |
466 | } else { | ||
467 | gpa = (guest_pte & PT_BASE_ADDR_MASK); | ||
468 | gpa |= (vaddr & ~PAGE_MASK); | ||
469 | } | 454 | } |
470 | 455 | ||
456 | FNAME(release_walker)(&walker); | ||
471 | return gpa; | 457 | return gpa; |
472 | } | 458 | } |
473 | 459 | ||
diff --git a/drivers/kvm/svm.c b/drivers/kvm/svm.c index 85f61dd1e936..83da4ea150a3 100644 --- a/drivers/kvm/svm.c +++ b/drivers/kvm/svm.c | |||
@@ -528,7 +528,13 @@ static void init_vmcb(struct vmcb *vmcb) | |||
528 | save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK | | 528 | save->cs.attrib = SVM_SELECTOR_READ_MASK | SVM_SELECTOR_P_MASK | |
529 | SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK; | 529 | SVM_SELECTOR_S_MASK | SVM_SELECTOR_CODE_MASK; |
530 | save->cs.limit = 0xffff; | 530 | save->cs.limit = 0xffff; |
531 | save->cs.base = 0xffff0000; | 531 | /* |
532 | * cs.base should really be 0xffff0000, but vmx can't handle that, so | ||
533 | * be consistent with it. | ||
534 | * | ||
535 | * Replace when we have real mode working for vmx. | ||
536 | */ | ||
537 | save->cs.base = 0xf0000; | ||
532 | 538 | ||
533 | save->gdtr.limit = 0xffff; | 539 | save->gdtr.limit = 0xffff; |
534 | save->idtr.limit = 0xffff; | 540 | save->idtr.limit = 0xffff; |
@@ -603,6 +609,10 @@ static void svm_vcpu_put(struct kvm_vcpu *vcpu) | |||
603 | put_cpu(); | 609 | put_cpu(); |
604 | } | 610 | } |
605 | 611 | ||
612 | static void svm_vcpu_decache(struct kvm_vcpu *vcpu) | ||
613 | { | ||
614 | } | ||
615 | |||
606 | static void svm_cache_regs(struct kvm_vcpu *vcpu) | 616 | static void svm_cache_regs(struct kvm_vcpu *vcpu) |
607 | { | 617 | { |
608 | vcpu->regs[VCPU_REGS_RAX] = vcpu->svm->vmcb->save.rax; | 618 | vcpu->regs[VCPU_REGS_RAX] = vcpu->svm->vmcb->save.rax; |
@@ -723,7 +733,7 @@ static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) | |||
723 | } | 733 | } |
724 | #endif | 734 | #endif |
725 | vcpu->svm->cr0 = cr0; | 735 | vcpu->svm->cr0 = cr0; |
726 | vcpu->svm->vmcb->save.cr0 = cr0 | CR0_PG_MASK; | 736 | vcpu->svm->vmcb->save.cr0 = cr0 | CR0_PG_MASK | CR0_WP_MASK; |
727 | vcpu->cr0 = cr0; | 737 | vcpu->cr0 = cr0; |
728 | } | 738 | } |
729 | 739 | ||
@@ -1671,6 +1681,7 @@ static struct kvm_arch_ops svm_arch_ops = { | |||
1671 | 1681 | ||
1672 | .vcpu_load = svm_vcpu_load, | 1682 | .vcpu_load = svm_vcpu_load, |
1673 | .vcpu_put = svm_vcpu_put, | 1683 | .vcpu_put = svm_vcpu_put, |
1684 | .vcpu_decache = svm_vcpu_decache, | ||
1674 | 1685 | ||
1675 | .set_guest_debug = svm_guest_debug, | 1686 | .set_guest_debug = svm_guest_debug, |
1676 | .get_msr = svm_get_msr, | 1687 | .get_msr = svm_get_msr, |
diff --git a/drivers/kvm/vmx.c b/drivers/kvm/vmx.c index 27e05a77e21a..1e640b899175 100644 --- a/drivers/kvm/vmx.c +++ b/drivers/kvm/vmx.c | |||
@@ -125,6 +125,15 @@ static void __vcpu_clear(void *arg) | |||
125 | per_cpu(current_vmcs, cpu) = NULL; | 125 | per_cpu(current_vmcs, cpu) = NULL; |
126 | } | 126 | } |
127 | 127 | ||
128 | static void vcpu_clear(struct kvm_vcpu *vcpu) | ||
129 | { | ||
130 | if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1) | ||
131 | smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1); | ||
132 | else | ||
133 | __vcpu_clear(vcpu); | ||
134 | vcpu->launched = 0; | ||
135 | } | ||
136 | |||
128 | static unsigned long vmcs_readl(unsigned long field) | 137 | static unsigned long vmcs_readl(unsigned long field) |
129 | { | 138 | { |
130 | unsigned long value; | 139 | unsigned long value; |
@@ -202,10 +211,8 @@ static struct kvm_vcpu *vmx_vcpu_load(struct kvm_vcpu *vcpu) | |||
202 | 211 | ||
203 | cpu = get_cpu(); | 212 | cpu = get_cpu(); |
204 | 213 | ||
205 | if (vcpu->cpu != cpu) { | 214 | if (vcpu->cpu != cpu) |
206 | smp_call_function(__vcpu_clear, vcpu, 0, 1); | 215 | vcpu_clear(vcpu); |
207 | vcpu->launched = 0; | ||
208 | } | ||
209 | 216 | ||
210 | if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) { | 217 | if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) { |
211 | u8 error; | 218 | u8 error; |
@@ -243,6 +250,11 @@ static void vmx_vcpu_put(struct kvm_vcpu *vcpu) | |||
243 | put_cpu(); | 250 | put_cpu(); |
244 | } | 251 | } |
245 | 252 | ||
253 | static void vmx_vcpu_decache(struct kvm_vcpu *vcpu) | ||
254 | { | ||
255 | vcpu_clear(vcpu); | ||
256 | } | ||
257 | |||
246 | static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu) | 258 | static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu) |
247 | { | 259 | { |
248 | return vmcs_readl(GUEST_RFLAGS); | 260 | return vmcs_readl(GUEST_RFLAGS); |
@@ -502,7 +514,7 @@ static __init int vmx_disabled_by_bios(void) | |||
502 | return (msr & 5) == 1; /* locked but not enabled */ | 514 | return (msr & 5) == 1; /* locked but not enabled */ |
503 | } | 515 | } |
504 | 516 | ||
505 | static __init void hardware_enable(void *garbage) | 517 | static void hardware_enable(void *garbage) |
506 | { | 518 | { |
507 | int cpu = raw_smp_processor_id(); | 519 | int cpu = raw_smp_processor_id(); |
508 | u64 phys_addr = __pa(per_cpu(vmxarea, cpu)); | 520 | u64 phys_addr = __pa(per_cpu(vmxarea, cpu)); |
@@ -1375,6 +1387,11 @@ static int handle_external_interrupt(struct kvm_vcpu *vcpu, | |||
1375 | return 1; | 1387 | return 1; |
1376 | } | 1388 | } |
1377 | 1389 | ||
1390 | static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run) | ||
1391 | { | ||
1392 | kvm_run->exit_reason = KVM_EXIT_SHUTDOWN; | ||
1393 | return 0; | ||
1394 | } | ||
1378 | 1395 | ||
1379 | static int get_io_count(struct kvm_vcpu *vcpu, u64 *count) | 1396 | static int get_io_count(struct kvm_vcpu *vcpu, u64 *count) |
1380 | { | 1397 | { |
@@ -1635,6 +1652,7 @@ static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu, | |||
1635 | struct kvm_run *kvm_run) = { | 1652 | struct kvm_run *kvm_run) = { |
1636 | [EXIT_REASON_EXCEPTION_NMI] = handle_exception, | 1653 | [EXIT_REASON_EXCEPTION_NMI] = handle_exception, |
1637 | [EXIT_REASON_EXTERNAL_INTERRUPT] = handle_external_interrupt, | 1654 | [EXIT_REASON_EXTERNAL_INTERRUPT] = handle_external_interrupt, |
1655 | [EXIT_REASON_TRIPLE_FAULT] = handle_triple_fault, | ||
1638 | [EXIT_REASON_IO_INSTRUCTION] = handle_io, | 1656 | [EXIT_REASON_IO_INSTRUCTION] = handle_io, |
1639 | [EXIT_REASON_CR_ACCESS] = handle_cr, | 1657 | [EXIT_REASON_CR_ACCESS] = handle_cr, |
1640 | [EXIT_REASON_DR_ACCESS] = handle_dr, | 1658 | [EXIT_REASON_DR_ACCESS] = handle_dr, |
@@ -1786,10 +1804,10 @@ again: | |||
1786 | "kvm_vmx_return: " | 1804 | "kvm_vmx_return: " |
1787 | /* Save guest registers, load host registers, keep flags */ | 1805 | /* Save guest registers, load host registers, keep flags */ |
1788 | #ifdef CONFIG_X86_64 | 1806 | #ifdef CONFIG_X86_64 |
1789 | "xchg %3, 0(%%rsp) \n\t" | 1807 | "xchg %3, (%%rsp) \n\t" |
1790 | "mov %%rax, %c[rax](%3) \n\t" | 1808 | "mov %%rax, %c[rax](%3) \n\t" |
1791 | "mov %%rbx, %c[rbx](%3) \n\t" | 1809 | "mov %%rbx, %c[rbx](%3) \n\t" |
1792 | "pushq 0(%%rsp); popq %c[rcx](%3) \n\t" | 1810 | "pushq (%%rsp); popq %c[rcx](%3) \n\t" |
1793 | "mov %%rdx, %c[rdx](%3) \n\t" | 1811 | "mov %%rdx, %c[rdx](%3) \n\t" |
1794 | "mov %%rsi, %c[rsi](%3) \n\t" | 1812 | "mov %%rsi, %c[rsi](%3) \n\t" |
1795 | "mov %%rdi, %c[rdi](%3) \n\t" | 1813 | "mov %%rdi, %c[rdi](%3) \n\t" |
@@ -1804,24 +1822,24 @@ again: | |||
1804 | "mov %%r15, %c[r15](%3) \n\t" | 1822 | "mov %%r15, %c[r15](%3) \n\t" |
1805 | "mov %%cr2, %%rax \n\t" | 1823 | "mov %%cr2, %%rax \n\t" |
1806 | "mov %%rax, %c[cr2](%3) \n\t" | 1824 | "mov %%rax, %c[cr2](%3) \n\t" |
1807 | "mov 0(%%rsp), %3 \n\t" | 1825 | "mov (%%rsp), %3 \n\t" |
1808 | 1826 | ||
1809 | "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;" | 1827 | "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;" |
1810 | "pop %%r11; pop %%r10; pop %%r9; pop %%r8;" | 1828 | "pop %%r11; pop %%r10; pop %%r9; pop %%r8;" |
1811 | "pop %%rbp; pop %%rdi; pop %%rsi;" | 1829 | "pop %%rbp; pop %%rdi; pop %%rsi;" |
1812 | "pop %%rdx; pop %%rbx; pop %%rax \n\t" | 1830 | "pop %%rdx; pop %%rbx; pop %%rax \n\t" |
1813 | #else | 1831 | #else |
1814 | "xchg %3, 0(%%esp) \n\t" | 1832 | "xchg %3, (%%esp) \n\t" |
1815 | "mov %%eax, %c[rax](%3) \n\t" | 1833 | "mov %%eax, %c[rax](%3) \n\t" |
1816 | "mov %%ebx, %c[rbx](%3) \n\t" | 1834 | "mov %%ebx, %c[rbx](%3) \n\t" |
1817 | "pushl 0(%%esp); popl %c[rcx](%3) \n\t" | 1835 | "pushl (%%esp); popl %c[rcx](%3) \n\t" |
1818 | "mov %%edx, %c[rdx](%3) \n\t" | 1836 | "mov %%edx, %c[rdx](%3) \n\t" |
1819 | "mov %%esi, %c[rsi](%3) \n\t" | 1837 | "mov %%esi, %c[rsi](%3) \n\t" |
1820 | "mov %%edi, %c[rdi](%3) \n\t" | 1838 | "mov %%edi, %c[rdi](%3) \n\t" |
1821 | "mov %%ebp, %c[rbp](%3) \n\t" | 1839 | "mov %%ebp, %c[rbp](%3) \n\t" |
1822 | "mov %%cr2, %%eax \n\t" | 1840 | "mov %%cr2, %%eax \n\t" |
1823 | "mov %%eax, %c[cr2](%3) \n\t" | 1841 | "mov %%eax, %c[cr2](%3) \n\t" |
1824 | "mov 0(%%esp), %3 \n\t" | 1842 | "mov (%%esp), %3 \n\t" |
1825 | 1843 | ||
1826 | "pop %%ecx; popa \n\t" | 1844 | "pop %%ecx; popa \n\t" |
1827 | #endif | 1845 | #endif |
@@ -1859,9 +1877,7 @@ again: | |||
1859 | fx_restore(vcpu->host_fx_image); | 1877 | fx_restore(vcpu->host_fx_image); |
1860 | vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0; | 1878 | vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0; |
1861 | 1879 | ||
1862 | #ifndef CONFIG_X86_64 | ||
1863 | asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS)); | 1880 | asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS)); |
1864 | #endif | ||
1865 | 1881 | ||
1866 | /* | 1882 | /* |
1867 | * Profile KVM exit RIPs: | 1883 | * Profile KVM exit RIPs: |
@@ -2012,6 +2028,7 @@ static struct kvm_arch_ops vmx_arch_ops = { | |||
2012 | 2028 | ||
2013 | .vcpu_load = vmx_vcpu_load, | 2029 | .vcpu_load = vmx_vcpu_load, |
2014 | .vcpu_put = vmx_vcpu_put, | 2030 | .vcpu_put = vmx_vcpu_put, |
2031 | .vcpu_decache = vmx_vcpu_decache, | ||
2015 | 2032 | ||
2016 | .set_guest_debug = set_guest_debug, | 2033 | .set_guest_debug = set_guest_debug, |
2017 | .get_msr = vmx_get_msr, | 2034 | .get_msr = vmx_get_msr, |
diff --git a/drivers/kvm/vmx.h b/drivers/kvm/vmx.h index 4c0ab151836a..d0dc93df411b 100644 --- a/drivers/kvm/vmx.h +++ b/drivers/kvm/vmx.h | |||
@@ -180,6 +180,7 @@ enum vmcs_field { | |||
180 | 180 | ||
181 | #define EXIT_REASON_EXCEPTION_NMI 0 | 181 | #define EXIT_REASON_EXCEPTION_NMI 0 |
182 | #define EXIT_REASON_EXTERNAL_INTERRUPT 1 | 182 | #define EXIT_REASON_EXTERNAL_INTERRUPT 1 |
183 | #define EXIT_REASON_TRIPLE_FAULT 2 | ||
183 | 184 | ||
184 | #define EXIT_REASON_PENDING_INTERRUPT 7 | 185 | #define EXIT_REASON_PENDING_INTERRUPT 7 |
185 | 186 | ||
diff --git a/drivers/macintosh/adb.c b/drivers/macintosh/adb.c index 7cec6de5e2b0..f729eebf771f 100644 --- a/drivers/macintosh/adb.c +++ b/drivers/macintosh/adb.c | |||
@@ -885,7 +885,7 @@ out: | |||
885 | return ret; | 885 | return ret; |
886 | } | 886 | } |
887 | 887 | ||
888 | static struct file_operations adb_fops = { | 888 | static const struct file_operations adb_fops = { |
889 | .owner = THIS_MODULE, | 889 | .owner = THIS_MODULE, |
890 | .llseek = no_llseek, | 890 | .llseek = no_llseek, |
891 | .read = adb_read, | 891 | .read = adb_read, |
diff --git a/drivers/macintosh/ans-lcd.c b/drivers/macintosh/ans-lcd.c index 2b8a6e821d44..cdd5a0f72e3c 100644 --- a/drivers/macintosh/ans-lcd.c +++ b/drivers/macintosh/ans-lcd.c | |||
@@ -121,7 +121,7 @@ anslcd_open( struct inode * inode, struct file * file ) | |||
121 | return 0; | 121 | return 0; |
122 | } | 122 | } |
123 | 123 | ||
124 | struct file_operations anslcd_fops = { | 124 | const struct file_operations anslcd_fops = { |
125 | .write = anslcd_write, | 125 | .write = anslcd_write, |
126 | .ioctl = anslcd_ioctl, | 126 | .ioctl = anslcd_ioctl, |
127 | .open = anslcd_open, | 127 | .open = anslcd_open, |
diff --git a/drivers/macintosh/apm_emu.c b/drivers/macintosh/apm_emu.c index 4300c628f8af..a6d50f4fabd7 100644 --- a/drivers/macintosh/apm_emu.c +++ b/drivers/macintosh/apm_emu.c | |||
@@ -501,7 +501,7 @@ static int apm_emu_get_info(char *buf, char **start, off_t fpos, int length) | |||
501 | return p - buf; | 501 | return p - buf; |
502 | } | 502 | } |
503 | 503 | ||
504 | static struct file_operations apm_bios_fops = { | 504 | static const struct file_operations apm_bios_fops = { |
505 | .owner = THIS_MODULE, | 505 | .owner = THIS_MODULE, |
506 | .read = do_read, | 506 | .read = do_read, |
507 | .poll = do_poll, | 507 | .poll = do_poll, |
diff --git a/drivers/macintosh/nvram.c b/drivers/macintosh/nvram.c index 30791875fc97..b195d753d2ed 100644 --- a/drivers/macintosh/nvram.c +++ b/drivers/macintosh/nvram.c | |||
@@ -100,7 +100,7 @@ static int nvram_ioctl(struct inode *inode, struct file *file, | |||
100 | return 0; | 100 | return 0; |
101 | } | 101 | } |
102 | 102 | ||
103 | struct file_operations nvram_fops = { | 103 | const struct file_operations nvram_fops = { |
104 | .owner = THIS_MODULE, | 104 | .owner = THIS_MODULE, |
105 | .llseek = nvram_llseek, | 105 | .llseek = nvram_llseek, |
106 | .read = read_nvram, | 106 | .read = read_nvram, |
diff --git a/drivers/macintosh/smu.c b/drivers/macintosh/smu.c index 6f30459b9385..3096836d8bd3 100644 --- a/drivers/macintosh/smu.c +++ b/drivers/macintosh/smu.c | |||
@@ -1277,7 +1277,7 @@ static int smu_release(struct inode *inode, struct file *file) | |||
1277 | } | 1277 | } |
1278 | 1278 | ||
1279 | 1279 | ||
1280 | static struct file_operations smu_device_fops = { | 1280 | static const struct file_operations smu_device_fops = { |
1281 | .llseek = no_llseek, | 1281 | .llseek = no_llseek, |
1282 | .read = smu_read, | 1282 | .read = smu_read, |
1283 | .write = smu_write, | 1283 | .write = smu_write, |
diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c index eb6653f69ce4..96bea4b62c43 100644 --- a/drivers/macintosh/via-pmu.c +++ b/drivers/macintosh/via-pmu.c | |||
@@ -2672,7 +2672,7 @@ pmu_ioctl(struct inode * inode, struct file *filp, | |||
2672 | return error; | 2672 | return error; |
2673 | } | 2673 | } |
2674 | 2674 | ||
2675 | static struct file_operations pmu_device_fops = { | 2675 | static const struct file_operations pmu_device_fops = { |
2676 | .read = pmu_read, | 2676 | .read = pmu_read, |
2677 | .write = pmu_write, | 2677 | .write = pmu_write, |
2678 | .poll = pmu_fpoll, | 2678 | .poll = pmu_fpoll, |
diff --git a/drivers/macintosh/via-pmu68k.c b/drivers/macintosh/via-pmu68k.c index 93e6ef9233f9..4f5b6fa196c5 100644 --- a/drivers/macintosh/via-pmu68k.c +++ b/drivers/macintosh/via-pmu68k.c | |||
@@ -1040,7 +1040,7 @@ static int pmu_ioctl(struct inode * inode, struct file *filp, | |||
1040 | return -EINVAL; | 1040 | return -EINVAL; |
1041 | } | 1041 | } |
1042 | 1042 | ||
1043 | static struct file_operations pmu_device_fops = { | 1043 | static const struct file_operations pmu_device_fops = { |
1044 | .read = pmu_read, | 1044 | .read = pmu_read, |
1045 | .write = pmu_write, | 1045 | .write = pmu_write, |
1046 | .ioctl = pmu_ioctl, | 1046 | .ioctl = pmu_ioctl, |
diff --git a/drivers/md/dm-ioctl.c b/drivers/md/dm-ioctl.c index cd6a184536a1..b441d82c338a 100644 --- a/drivers/md/dm-ioctl.c +++ b/drivers/md/dm-ioctl.c | |||
@@ -1473,7 +1473,7 @@ static int ctl_ioctl(struct inode *inode, struct file *file, | |||
1473 | return r; | 1473 | return r; |
1474 | } | 1474 | } |
1475 | 1475 | ||
1476 | static struct file_operations _ctl_fops = { | 1476 | static const struct file_operations _ctl_fops = { |
1477 | .ioctl = ctl_ioctl, | 1477 | .ioctl = ctl_ioctl, |
1478 | .owner = THIS_MODULE, | 1478 | .owner = THIS_MODULE, |
1479 | }; | 1479 | }; |
diff --git a/drivers/md/md.c b/drivers/md/md.c index e8807ea5377d..e85fa75a7912 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c | |||
@@ -4920,7 +4920,7 @@ static unsigned int mdstat_poll(struct file *filp, poll_table *wait) | |||
4920 | return mask; | 4920 | return mask; |
4921 | } | 4921 | } |
4922 | 4922 | ||
4923 | static struct file_operations md_seq_fops = { | 4923 | static const struct file_operations md_seq_fops = { |
4924 | .owner = THIS_MODULE, | 4924 | .owner = THIS_MODULE, |
4925 | .open = md_seq_open, | 4925 | .open = md_seq_open, |
4926 | .read = seq_read, | 4926 | .read = seq_read, |
diff --git a/drivers/media/common/saa7146_fops.c b/drivers/media/common/saa7146_fops.c index d867a6a9e430..b8dcfa165266 100644 --- a/drivers/media/common/saa7146_fops.c +++ b/drivers/media/common/saa7146_fops.c | |||
@@ -416,7 +416,7 @@ static ssize_t fops_write(struct file *file, const char __user *data, size_t cou | |||
416 | } | 416 | } |
417 | } | 417 | } |
418 | 418 | ||
419 | static struct file_operations video_fops = | 419 | static const struct file_operations video_fops = |
420 | { | 420 | { |
421 | .owner = THIS_MODULE, | 421 | .owner = THIS_MODULE, |
422 | .open = fops_open, | 422 | .open = fops_open, |
diff --git a/drivers/media/radio/dsbr100.c b/drivers/media/radio/dsbr100.c index db865a0667e5..df8d0520d1d1 100644 --- a/drivers/media/radio/dsbr100.c +++ b/drivers/media/radio/dsbr100.c | |||
@@ -144,7 +144,7 @@ struct dsbr100_device { | |||
144 | 144 | ||
145 | 145 | ||
146 | /* File system interface */ | 146 | /* File system interface */ |
147 | static struct file_operations usb_dsbr100_fops = { | 147 | static const struct file_operations usb_dsbr100_fops = { |
148 | .owner = THIS_MODULE, | 148 | .owner = THIS_MODULE, |
149 | .open = usb_dsbr100_open, | 149 | .open = usb_dsbr100_open, |
150 | .release = usb_dsbr100_close, | 150 | .release = usb_dsbr100_close, |
diff --git a/drivers/media/radio/miropcm20-radio.c b/drivers/media/radio/miropcm20-radio.c index c4312fa0e2f5..c7c9d1dc0690 100644 --- a/drivers/media/radio/miropcm20-radio.c +++ b/drivers/media/radio/miropcm20-radio.c | |||
@@ -216,7 +216,7 @@ static struct pcm20_device pcm20_unit = { | |||
216 | .muted = 1, | 216 | .muted = 1, |
217 | }; | 217 | }; |
218 | 218 | ||
219 | static struct file_operations pcm20_fops = { | 219 | static const struct file_operations pcm20_fops = { |
220 | .owner = THIS_MODULE, | 220 | .owner = THIS_MODULE, |
221 | .open = video_exclusive_open, | 221 | .open = video_exclusive_open, |
222 | .release = video_exclusive_release, | 222 | .release = video_exclusive_release, |
diff --git a/drivers/media/radio/miropcm20-rds.c b/drivers/media/radio/miropcm20-rds.c index c1b1db65e668..c93490ec96bb 100644 --- a/drivers/media/radio/miropcm20-rds.c +++ b/drivers/media/radio/miropcm20-rds.c | |||
@@ -105,7 +105,7 @@ static ssize_t rds_f_read(struct file *file, char __user *buffer, size_t length, | |||
105 | } | 105 | } |
106 | } | 106 | } |
107 | 107 | ||
108 | static struct file_operations rds_fops = { | 108 | static const struct file_operations rds_fops = { |
109 | .owner = THIS_MODULE, | 109 | .owner = THIS_MODULE, |
110 | .read = rds_f_read, | 110 | .read = rds_f_read, |
111 | .open = rds_f_open, | 111 | .open = rds_f_open, |
diff --git a/drivers/media/radio/radio-aimslab.c b/drivers/media/radio/radio-aimslab.c index 3368a89bfadb..b2e88ad28977 100644 --- a/drivers/media/radio/radio-aimslab.c +++ b/drivers/media/radio/radio-aimslab.c | |||
@@ -358,7 +358,7 @@ static int rt_ioctl(struct inode *inode, struct file *file, | |||
358 | 358 | ||
359 | static struct rt_device rtrack_unit; | 359 | static struct rt_device rtrack_unit; |
360 | 360 | ||
361 | static struct file_operations rtrack_fops = { | 361 | static const struct file_operations rtrack_fops = { |
362 | .owner = THIS_MODULE, | 362 | .owner = THIS_MODULE, |
363 | .open = video_exclusive_open, | 363 | .open = video_exclusive_open, |
364 | .release = video_exclusive_release, | 364 | .release = video_exclusive_release, |
diff --git a/drivers/media/radio/radio-aztech.c b/drivers/media/radio/radio-aztech.c index 3ba5fa8cf7e6..19d45cc940b5 100644 --- a/drivers/media/radio/radio-aztech.c +++ b/drivers/media/radio/radio-aztech.c | |||
@@ -314,7 +314,7 @@ static int az_ioctl(struct inode *inode, struct file *file, | |||
314 | 314 | ||
315 | static struct az_device aztech_unit; | 315 | static struct az_device aztech_unit; |
316 | 316 | ||
317 | static struct file_operations aztech_fops = { | 317 | static const struct file_operations aztech_fops = { |
318 | .owner = THIS_MODULE, | 318 | .owner = THIS_MODULE, |
319 | .open = video_exclusive_open, | 319 | .open = video_exclusive_open, |
320 | .release = video_exclusive_release, | 320 | .release = video_exclusive_release, |
diff --git a/drivers/media/radio/radio-cadet.c b/drivers/media/radio/radio-cadet.c index 69d4b7919c5a..8fbf0d8bd278 100644 --- a/drivers/media/radio/radio-cadet.c +++ b/drivers/media/radio/radio-cadet.c | |||
@@ -507,7 +507,7 @@ cadet_poll(struct file *file, struct poll_table_struct *wait) | |||
507 | } | 507 | } |
508 | 508 | ||
509 | 509 | ||
510 | static struct file_operations cadet_fops = { | 510 | static const struct file_operations cadet_fops = { |
511 | .owner = THIS_MODULE, | 511 | .owner = THIS_MODULE, |
512 | .open = cadet_open, | 512 | .open = cadet_open, |
513 | .release = cadet_release, | 513 | .release = cadet_release, |
diff --git a/drivers/media/radio/radio-gemtek-pci.c b/drivers/media/radio/radio-gemtek-pci.c index eb14106f66fa..05e5aa77025f 100644 --- a/drivers/media/radio/radio-gemtek-pci.c +++ b/drivers/media/radio/radio-gemtek-pci.c | |||
@@ -346,7 +346,7 @@ MODULE_DEVICE_TABLE( pci, gemtek_pci_id ); | |||
346 | 346 | ||
347 | static int mx = 1; | 347 | static int mx = 1; |
348 | 348 | ||
349 | static struct file_operations gemtek_pci_fops = { | 349 | static const struct file_operations gemtek_pci_fops = { |
350 | .owner = THIS_MODULE, | 350 | .owner = THIS_MODULE, |
351 | .open = video_exclusive_open, | 351 | .open = video_exclusive_open, |
352 | .release = video_exclusive_release, | 352 | .release = video_exclusive_release, |
diff --git a/drivers/media/radio/radio-gemtek.c b/drivers/media/radio/radio-gemtek.c index 730fe16126cb..36c4be6622c7 100644 --- a/drivers/media/radio/radio-gemtek.c +++ b/drivers/media/radio/radio-gemtek.c | |||
@@ -296,7 +296,7 @@ static int gemtek_ioctl(struct inode *inode, struct file *file, | |||
296 | 296 | ||
297 | static struct gemtek_device gemtek_unit; | 297 | static struct gemtek_device gemtek_unit; |
298 | 298 | ||
299 | static struct file_operations gemtek_fops = { | 299 | static const struct file_operations gemtek_fops = { |
300 | .owner = THIS_MODULE, | 300 | .owner = THIS_MODULE, |
301 | .open = video_exclusive_open, | 301 | .open = video_exclusive_open, |
302 | .release = video_exclusive_release, | 302 | .release = video_exclusive_release, |
diff --git a/drivers/media/radio/radio-maestro.c b/drivers/media/radio/radio-maestro.c index e8ce5f75cf12..9bba6eb10925 100644 --- a/drivers/media/radio/radio-maestro.c +++ b/drivers/media/radio/radio-maestro.c | |||
@@ -99,7 +99,7 @@ static struct pci_driver maestro_r_driver = { | |||
99 | .remove = __devexit_p(maestro_remove), | 99 | .remove = __devexit_p(maestro_remove), |
100 | }; | 100 | }; |
101 | 101 | ||
102 | static struct file_operations maestro_fops = { | 102 | static const struct file_operations maestro_fops = { |
103 | .owner = THIS_MODULE, | 103 | .owner = THIS_MODULE, |
104 | .open = video_exclusive_open, | 104 | .open = video_exclusive_open, |
105 | .release = video_exclusive_release, | 105 | .release = video_exclusive_release, |
diff --git a/drivers/media/radio/radio-maxiradio.c b/drivers/media/radio/radio-maxiradio.c index c2eeae7a10d0..00a2f31d2af3 100644 --- a/drivers/media/radio/radio-maxiradio.c +++ b/drivers/media/radio/radio-maxiradio.c | |||
@@ -91,7 +91,7 @@ module_param(radio_nr, int, 0); | |||
91 | static int radio_ioctl(struct inode *inode, struct file *file, | 91 | static int radio_ioctl(struct inode *inode, struct file *file, |
92 | unsigned int cmd, unsigned long arg); | 92 | unsigned int cmd, unsigned long arg); |
93 | 93 | ||
94 | static struct file_operations maxiradio_fops = { | 94 | static const struct file_operations maxiradio_fops = { |
95 | .owner = THIS_MODULE, | 95 | .owner = THIS_MODULE, |
96 | .open = video_exclusive_open, | 96 | .open = video_exclusive_open, |
97 | .release = video_exclusive_release, | 97 | .release = video_exclusive_release, |
diff --git a/drivers/media/radio/radio-rtrack2.c b/drivers/media/radio/radio-rtrack2.c index b9e98483e58d..f6683872251e 100644 --- a/drivers/media/radio/radio-rtrack2.c +++ b/drivers/media/radio/radio-rtrack2.c | |||
@@ -262,7 +262,7 @@ static int rt_ioctl(struct inode *inode, struct file *file, | |||
262 | 262 | ||
263 | static struct rt_device rtrack2_unit; | 263 | static struct rt_device rtrack2_unit; |
264 | 264 | ||
265 | static struct file_operations rtrack2_fops = { | 265 | static const struct file_operations rtrack2_fops = { |
266 | .owner = THIS_MODULE, | 266 | .owner = THIS_MODULE, |
267 | .open = video_exclusive_open, | 267 | .open = video_exclusive_open, |
268 | .release = video_exclusive_release, | 268 | .release = video_exclusive_release, |
diff --git a/drivers/media/radio/radio-sf16fmi.c b/drivers/media/radio/radio-sf16fmi.c index ecc854b4ba38..f4619e4dda4f 100644 --- a/drivers/media/radio/radio-sf16fmi.c +++ b/drivers/media/radio/radio-sf16fmi.c | |||
@@ -265,7 +265,7 @@ static int fmi_ioctl(struct inode *inode, struct file *file, | |||
265 | 265 | ||
266 | static struct fmi_device fmi_unit; | 266 | static struct fmi_device fmi_unit; |
267 | 267 | ||
268 | static struct file_operations fmi_fops = { | 268 | static const struct file_operations fmi_fops = { |
269 | .owner = THIS_MODULE, | 269 | .owner = THIS_MODULE, |
270 | .open = video_exclusive_open, | 270 | .open = video_exclusive_open, |
271 | .release = video_exclusive_release, | 271 | .release = video_exclusive_release, |
diff --git a/drivers/media/radio/radio-sf16fmr2.c b/drivers/media/radio/radio-sf16fmr2.c index 4444dce864a9..b96fafe1f9da 100644 --- a/drivers/media/radio/radio-sf16fmr2.c +++ b/drivers/media/radio/radio-sf16fmr2.c | |||
@@ -410,7 +410,7 @@ static int fmr2_ioctl(struct inode *inode, struct file *file, | |||
410 | 410 | ||
411 | static struct fmr2_device fmr2_unit; | 411 | static struct fmr2_device fmr2_unit; |
412 | 412 | ||
413 | static struct file_operations fmr2_fops = { | 413 | static const struct file_operations fmr2_fops = { |
414 | .owner = THIS_MODULE, | 414 | .owner = THIS_MODULE, |
415 | .open = video_exclusive_open, | 415 | .open = video_exclusive_open, |
416 | .release = video_exclusive_release, | 416 | .release = video_exclusive_release, |
diff --git a/drivers/media/radio/radio-terratec.c b/drivers/media/radio/radio-terratec.c index f539491a0d76..d59a27accb84 100644 --- a/drivers/media/radio/radio-terratec.c +++ b/drivers/media/radio/radio-terratec.c | |||
@@ -338,7 +338,7 @@ static int tt_ioctl(struct inode *inode, struct file *file, | |||
338 | 338 | ||
339 | static struct tt_device terratec_unit; | 339 | static struct tt_device terratec_unit; |
340 | 340 | ||
341 | static struct file_operations terratec_fops = { | 341 | static const struct file_operations terratec_fops = { |
342 | .owner = THIS_MODULE, | 342 | .owner = THIS_MODULE, |
343 | .open = video_exclusive_open, | 343 | .open = video_exclusive_open, |
344 | .release = video_exclusive_release, | 344 | .release = video_exclusive_release, |
diff --git a/drivers/media/radio/radio-trust.c b/drivers/media/radio/radio-trust.c index bb03ad5a2033..6d7f1e7116ea 100644 --- a/drivers/media/radio/radio-trust.c +++ b/drivers/media/radio/radio-trust.c | |||
@@ -325,7 +325,7 @@ static int tr_ioctl(struct inode *inode, struct file *file, | |||
325 | return video_usercopy(inode, file, cmd, arg, tr_do_ioctl); | 325 | return video_usercopy(inode, file, cmd, arg, tr_do_ioctl); |
326 | } | 326 | } |
327 | 327 | ||
328 | static struct file_operations trust_fops = { | 328 | static const struct file_operations trust_fops = { |
329 | .owner = THIS_MODULE, | 329 | .owner = THIS_MODULE, |
330 | .open = video_exclusive_open, | 330 | .open = video_exclusive_open, |
331 | .release = video_exclusive_release, | 331 | .release = video_exclusive_release, |
diff --git a/drivers/media/radio/radio-typhoon.c b/drivers/media/radio/radio-typhoon.c index 4a72b4d4e62a..3031fef178cb 100644 --- a/drivers/media/radio/radio-typhoon.c +++ b/drivers/media/radio/radio-typhoon.c | |||
@@ -318,7 +318,7 @@ static struct typhoon_device typhoon_unit = | |||
318 | .mutefreq = CONFIG_RADIO_TYPHOON_MUTEFREQ, | 318 | .mutefreq = CONFIG_RADIO_TYPHOON_MUTEFREQ, |
319 | }; | 319 | }; |
320 | 320 | ||
321 | static struct file_operations typhoon_fops = { | 321 | static const struct file_operations typhoon_fops = { |
322 | .owner = THIS_MODULE, | 322 | .owner = THIS_MODULE, |
323 | .open = video_exclusive_open, | 323 | .open = video_exclusive_open, |
324 | .release = video_exclusive_release, | 324 | .release = video_exclusive_release, |
diff --git a/drivers/media/radio/radio-zoltrix.c b/drivers/media/radio/radio-zoltrix.c index 671fe1b1e5bc..ec08491fb7c5 100644 --- a/drivers/media/radio/radio-zoltrix.c +++ b/drivers/media/radio/radio-zoltrix.c | |||
@@ -373,7 +373,7 @@ static int zol_ioctl(struct inode *inode, struct file *file, | |||
373 | 373 | ||
374 | static struct zol_device zoltrix_unit; | 374 | static struct zol_device zoltrix_unit; |
375 | 375 | ||
376 | static struct file_operations zoltrix_fops = | 376 | static const struct file_operations zoltrix_fops = |
377 | { | 377 | { |
378 | .owner = THIS_MODULE, | 378 | .owner = THIS_MODULE, |
379 | .open = video_exclusive_open, | 379 | .open = video_exclusive_open, |
diff --git a/drivers/media/video/arv.c b/drivers/media/video/arv.c index 4861799eb430..649f52f9ad27 100644 --- a/drivers/media/video/arv.c +++ b/drivers/media/video/arv.c | |||
@@ -742,7 +742,7 @@ void ar_release(struct video_device *vfd) | |||
742 | * Video4Linux Module functions | 742 | * Video4Linux Module functions |
743 | * | 743 | * |
744 | ****************************************************************************/ | 744 | ****************************************************************************/ |
745 | static struct file_operations ar_fops = { | 745 | static const struct file_operations ar_fops = { |
746 | .owner = THIS_MODULE, | 746 | .owner = THIS_MODULE, |
747 | .open = video_exclusive_open, | 747 | .open = video_exclusive_open, |
748 | .release = video_exclusive_release, | 748 | .release = video_exclusive_release, |
diff --git a/drivers/media/video/bt8xx/bttv-driver.c b/drivers/media/video/bt8xx/bttv-driver.c index ab8f970760f2..41fd09d7d11e 100644 --- a/drivers/media/video/bt8xx/bttv-driver.c +++ b/drivers/media/video/bt8xx/bttv-driver.c | |||
@@ -3174,7 +3174,7 @@ bttv_mmap(struct file *file, struct vm_area_struct *vma) | |||
3174 | return videobuf_mmap_mapper(bttv_queue(fh),vma); | 3174 | return videobuf_mmap_mapper(bttv_queue(fh),vma); |
3175 | } | 3175 | } |
3176 | 3176 | ||
3177 | static struct file_operations bttv_fops = | 3177 | static const struct file_operations bttv_fops = |
3178 | { | 3178 | { |
3179 | .owner = THIS_MODULE, | 3179 | .owner = THIS_MODULE, |
3180 | .open = bttv_open, | 3180 | .open = bttv_open, |
@@ -3332,7 +3332,7 @@ static unsigned int radio_poll(struct file *file, poll_table *wait) | |||
3332 | return cmd.result; | 3332 | return cmd.result; |
3333 | } | 3333 | } |
3334 | 3334 | ||
3335 | static struct file_operations radio_fops = | 3335 | static const struct file_operations radio_fops = |
3336 | { | 3336 | { |
3337 | .owner = THIS_MODULE, | 3337 | .owner = THIS_MODULE, |
3338 | .open = radio_open, | 3338 | .open = radio_open, |
diff --git a/drivers/media/video/bw-qcam.c b/drivers/media/video/bw-qcam.c index 7d0b6e59c6e2..7d47cbe6ad25 100644 --- a/drivers/media/video/bw-qcam.c +++ b/drivers/media/video/bw-qcam.c | |||
@@ -871,7 +871,7 @@ static ssize_t qcam_read(struct file *file, char __user *buf, | |||
871 | return len; | 871 | return len; |
872 | } | 872 | } |
873 | 873 | ||
874 | static struct file_operations qcam_fops = { | 874 | static const struct file_operations qcam_fops = { |
875 | .owner = THIS_MODULE, | 875 | .owner = THIS_MODULE, |
876 | .open = video_exclusive_open, | 876 | .open = video_exclusive_open, |
877 | .release = video_exclusive_release, | 877 | .release = video_exclusive_release, |
diff --git a/drivers/media/video/c-qcam.c b/drivers/media/video/c-qcam.c index a3989bd2f81b..925ff17efbbc 100644 --- a/drivers/media/video/c-qcam.c +++ b/drivers/media/video/c-qcam.c | |||
@@ -684,7 +684,7 @@ static ssize_t qcam_read(struct file *file, char __user *buf, | |||
684 | } | 684 | } |
685 | 685 | ||
686 | /* video device template */ | 686 | /* video device template */ |
687 | static struct file_operations qcam_fops = { | 687 | static const struct file_operations qcam_fops = { |
688 | .owner = THIS_MODULE, | 688 | .owner = THIS_MODULE, |
689 | .open = video_exclusive_open, | 689 | .open = video_exclusive_open, |
690 | .release = video_exclusive_release, | 690 | .release = video_exclusive_release, |
diff --git a/drivers/media/video/cafe_ccic.c b/drivers/media/video/cafe_ccic.c index 3083c8075d13..fb1410c6f864 100644 --- a/drivers/media/video/cafe_ccic.c +++ b/drivers/media/video/cafe_ccic.c | |||
@@ -1715,7 +1715,7 @@ static void cafe_v4l_dev_release(struct video_device *vd) | |||
1715 | * clone it for specific real devices. | 1715 | * clone it for specific real devices. |
1716 | */ | 1716 | */ |
1717 | 1717 | ||
1718 | static struct file_operations cafe_v4l_fops = { | 1718 | static const struct file_operations cafe_v4l_fops = { |
1719 | .owner = THIS_MODULE, | 1719 | .owner = THIS_MODULE, |
1720 | .open = cafe_v4l_open, | 1720 | .open = cafe_v4l_open, |
1721 | .release = cafe_v4l_release, | 1721 | .release = cafe_v4l_release, |
@@ -1969,7 +1969,7 @@ static ssize_t cafe_dfs_read_regs(struct file *file, | |||
1969 | s - cafe_debug_buf); | 1969 | s - cafe_debug_buf); |
1970 | } | 1970 | } |
1971 | 1971 | ||
1972 | static struct file_operations cafe_dfs_reg_ops = { | 1972 | static const struct file_operations cafe_dfs_reg_ops = { |
1973 | .owner = THIS_MODULE, | 1973 | .owner = THIS_MODULE, |
1974 | .read = cafe_dfs_read_regs, | 1974 | .read = cafe_dfs_read_regs, |
1975 | .open = cafe_dfs_open | 1975 | .open = cafe_dfs_open |
@@ -1995,7 +1995,7 @@ static ssize_t cafe_dfs_read_cam(struct file *file, | |||
1995 | s - cafe_debug_buf); | 1995 | s - cafe_debug_buf); |
1996 | } | 1996 | } |
1997 | 1997 | ||
1998 | static struct file_operations cafe_dfs_cam_ops = { | 1998 | static const struct file_operations cafe_dfs_cam_ops = { |
1999 | .owner = THIS_MODULE, | 1999 | .owner = THIS_MODULE, |
2000 | .read = cafe_dfs_read_cam, | 2000 | .read = cafe_dfs_read_cam, |
2001 | .open = cafe_dfs_open | 2001 | .open = cafe_dfs_open |
diff --git a/drivers/media/video/cpia.c b/drivers/media/video/cpia.c index 3b31a0dd2f0c..7e8d5ef58b61 100644 --- a/drivers/media/video/cpia.c +++ b/drivers/media/video/cpia.c | |||
@@ -3791,7 +3791,7 @@ static int cpia_mmap(struct file *file, struct vm_area_struct *vma) | |||
3791 | return 0; | 3791 | return 0; |
3792 | } | 3792 | } |
3793 | 3793 | ||
3794 | static struct file_operations cpia_fops = { | 3794 | static const struct file_operations cpia_fops = { |
3795 | .owner = THIS_MODULE, | 3795 | .owner = THIS_MODULE, |
3796 | .open = cpia_open, | 3796 | .open = cpia_open, |
3797 | .release = cpia_close, | 3797 | .release = cpia_close, |
diff --git a/drivers/media/video/cpia2/cpia2_v4l.c b/drivers/media/video/cpia2/cpia2_v4l.c index d09f49950f2a..1bda7ad9de11 100644 --- a/drivers/media/video/cpia2/cpia2_v4l.c +++ b/drivers/media/video/cpia2/cpia2_v4l.c | |||
@@ -1924,7 +1924,7 @@ static void reset_camera_struct_v4l(struct camera_data *cam) | |||
1924 | /*** | 1924 | /*** |
1925 | * The v4l video device structure initialized for this device | 1925 | * The v4l video device structure initialized for this device |
1926 | ***/ | 1926 | ***/ |
1927 | static struct file_operations fops_template = { | 1927 | static const struct file_operations fops_template = { |
1928 | .owner = THIS_MODULE, | 1928 | .owner = THIS_MODULE, |
1929 | .open = cpia2_open, | 1929 | .open = cpia2_open, |
1930 | .release = cpia2_close, | 1930 | .release = cpia2_close, |
diff --git a/drivers/media/video/cx88/cx88-blackbird.c b/drivers/media/video/cx88/cx88-blackbird.c index 0cf0360588e6..9a7a2996f20f 100644 --- a/drivers/media/video/cx88/cx88-blackbird.c +++ b/drivers/media/video/cx88/cx88-blackbird.c | |||
@@ -1051,7 +1051,7 @@ mpeg_mmap(struct file *file, struct vm_area_struct * vma) | |||
1051 | return videobuf_mmap_mapper(&fh->mpegq, vma); | 1051 | return videobuf_mmap_mapper(&fh->mpegq, vma); |
1052 | } | 1052 | } |
1053 | 1053 | ||
1054 | static struct file_operations mpeg_fops = | 1054 | static const struct file_operations mpeg_fops = |
1055 | { | 1055 | { |
1056 | .owner = THIS_MODULE, | 1056 | .owner = THIS_MODULE, |
1057 | .open = mpeg_open, | 1057 | .open = mpeg_open, |
diff --git a/drivers/media/video/cx88/cx88-video.c b/drivers/media/video/cx88/cx88-video.c index 8613378428fd..c86a7e06235b 100644 --- a/drivers/media/video/cx88/cx88-video.c +++ b/drivers/media/video/cx88/cx88-video.c | |||
@@ -1808,7 +1808,7 @@ static irqreturn_t cx8800_irq(int irq, void *dev_id) | |||
1808 | /* ----------------------------------------------------------- */ | 1808 | /* ----------------------------------------------------------- */ |
1809 | /* exported stuff */ | 1809 | /* exported stuff */ |
1810 | 1810 | ||
1811 | static struct file_operations video_fops = | 1811 | static const struct file_operations video_fops = |
1812 | { | 1812 | { |
1813 | .owner = THIS_MODULE, | 1813 | .owner = THIS_MODULE, |
1814 | .open = video_open, | 1814 | .open = video_open, |
@@ -1839,7 +1839,7 @@ static struct video_device cx8800_vbi_template = | |||
1839 | .minor = -1, | 1839 | .minor = -1, |
1840 | }; | 1840 | }; |
1841 | 1841 | ||
1842 | static struct file_operations radio_fops = | 1842 | static const struct file_operations radio_fops = |
1843 | { | 1843 | { |
1844 | .owner = THIS_MODULE, | 1844 | .owner = THIS_MODULE, |
1845 | .open = video_open, | 1845 | .open = video_open, |
diff --git a/drivers/media/video/dabusb.c b/drivers/media/video/dabusb.c index 917021fc2993..ff4b238090ac 100644 --- a/drivers/media/video/dabusb.c +++ b/drivers/media/video/dabusb.c | |||
@@ -696,7 +696,7 @@ static int dabusb_ioctl (struct inode *inode, struct file *file, unsigned int cm | |||
696 | return ret; | 696 | return ret; |
697 | } | 697 | } |
698 | 698 | ||
699 | static struct file_operations dabusb_fops = | 699 | static const struct file_operations dabusb_fops = |
700 | { | 700 | { |
701 | .owner = THIS_MODULE, | 701 | .owner = THIS_MODULE, |
702 | .llseek = no_llseek, | 702 | .llseek = no_llseek, |
diff --git a/drivers/media/video/em28xx/em28xx-video.c b/drivers/media/video/em28xx/em28xx-video.c index 36e72c207a8f..bec67609500f 100644 --- a/drivers/media/video/em28xx/em28xx-video.c +++ b/drivers/media/video/em28xx/em28xx-video.c | |||
@@ -1480,7 +1480,7 @@ static int em28xx_v4l2_ioctl(struct inode *inode, struct file *filp, | |||
1480 | return ret; | 1480 | return ret; |
1481 | } | 1481 | } |
1482 | 1482 | ||
1483 | static struct file_operations em28xx_v4l_fops = { | 1483 | static const struct file_operations em28xx_v4l_fops = { |
1484 | .owner = THIS_MODULE, | 1484 | .owner = THIS_MODULE, |
1485 | .open = em28xx_v4l2_open, | 1485 | .open = em28xx_v4l2_open, |
1486 | .release = em28xx_v4l2_close, | 1486 | .release = em28xx_v4l2_close, |
diff --git a/drivers/media/video/et61x251/et61x251_core.c b/drivers/media/video/et61x251/et61x251_core.c index 86e353b26b53..49792ae8c61c 100644 --- a/drivers/media/video/et61x251/et61x251_core.c +++ b/drivers/media/video/et61x251/et61x251_core.c | |||
@@ -2454,7 +2454,7 @@ static int et61x251_ioctl(struct inode* inode, struct file* filp, | |||
2454 | } | 2454 | } |
2455 | 2455 | ||
2456 | 2456 | ||
2457 | static struct file_operations et61x251_fops = { | 2457 | static const struct file_operations et61x251_fops = { |
2458 | .owner = THIS_MODULE, | 2458 | .owner = THIS_MODULE, |
2459 | .open = et61x251_open, | 2459 | .open = et61x251_open, |
2460 | .release = et61x251_release, | 2460 | .release = et61x251_release, |
diff --git a/drivers/media/video/meye.c b/drivers/media/video/meye.c index 616a35da191d..9528e10c2828 100644 --- a/drivers/media/video/meye.c +++ b/drivers/media/video/meye.c | |||
@@ -1748,7 +1748,7 @@ static int meye_mmap(struct file *file, struct vm_area_struct *vma) | |||
1748 | return 0; | 1748 | return 0; |
1749 | } | 1749 | } |
1750 | 1750 | ||
1751 | static struct file_operations meye_fops = { | 1751 | static const struct file_operations meye_fops = { |
1752 | .owner = THIS_MODULE, | 1752 | .owner = THIS_MODULE, |
1753 | .open = meye_open, | 1753 | .open = meye_open, |
1754 | .release = meye_release, | 1754 | .release = meye_release, |
diff --git a/drivers/media/video/ov511.c b/drivers/media/video/ov511.c index b4db2cbb5a84..e5edff1059a2 100644 --- a/drivers/media/video/ov511.c +++ b/drivers/media/video/ov511.c | |||
@@ -4653,7 +4653,7 @@ ov51x_v4l1_mmap(struct file *file, struct vm_area_struct *vma) | |||
4653 | return 0; | 4653 | return 0; |
4654 | } | 4654 | } |
4655 | 4655 | ||
4656 | static struct file_operations ov511_fops = { | 4656 | static const struct file_operations ov511_fops = { |
4657 | .owner = THIS_MODULE, | 4657 | .owner = THIS_MODULE, |
4658 | .open = ov51x_v4l1_open, | 4658 | .open = ov51x_v4l1_open, |
4659 | .release = ov51x_v4l1_close, | 4659 | .release = ov51x_v4l1_close, |
diff --git a/drivers/media/video/pms.c b/drivers/media/video/pms.c index 5d681fa8bcb1..d38d3dc4a012 100644 --- a/drivers/media/video/pms.c +++ b/drivers/media/video/pms.c | |||
@@ -881,7 +881,7 @@ static ssize_t pms_read(struct file *file, char __user *buf, | |||
881 | return len; | 881 | return len; |
882 | } | 882 | } |
883 | 883 | ||
884 | static struct file_operations pms_fops = { | 884 | static const struct file_operations pms_fops = { |
885 | .owner = THIS_MODULE, | 885 | .owner = THIS_MODULE, |
886 | .open = video_exclusive_open, | 886 | .open = video_exclusive_open, |
887 | .release = video_exclusive_release, | 887 | .release = video_exclusive_release, |
diff --git a/drivers/media/video/pvrusb2/pvrusb2-v4l2.c b/drivers/media/video/pvrusb2/pvrusb2-v4l2.c index bb40e9085977..6cf17080eb49 100644 --- a/drivers/media/video/pvrusb2/pvrusb2-v4l2.c +++ b/drivers/media/video/pvrusb2/pvrusb2-v4l2.c | |||
@@ -986,7 +986,7 @@ static unsigned int pvr2_v4l2_poll(struct file *file, poll_table *wait) | |||
986 | } | 986 | } |
987 | 987 | ||
988 | 988 | ||
989 | static struct file_operations vdev_fops = { | 989 | static const struct file_operations vdev_fops = { |
990 | .owner = THIS_MODULE, | 990 | .owner = THIS_MODULE, |
991 | .open = pvr2_v4l2_open, | 991 | .open = pvr2_v4l2_open, |
992 | .release = pvr2_v4l2_release, | 992 | .release = pvr2_v4l2_release, |
diff --git a/drivers/media/video/pwc/pwc-if.c b/drivers/media/video/pwc/pwc-if.c index a996aad79276..9825fd348108 100644 --- a/drivers/media/video/pwc/pwc-if.c +++ b/drivers/media/video/pwc/pwc-if.c | |||
@@ -152,7 +152,7 @@ static int pwc_video_ioctl(struct inode *inode, struct file *file, | |||
152 | unsigned int ioctlnr, unsigned long arg); | 152 | unsigned int ioctlnr, unsigned long arg); |
153 | static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma); | 153 | static int pwc_video_mmap(struct file *file, struct vm_area_struct *vma); |
154 | 154 | ||
155 | static struct file_operations pwc_fops = { | 155 | static const struct file_operations pwc_fops = { |
156 | .owner = THIS_MODULE, | 156 | .owner = THIS_MODULE, |
157 | .open = pwc_video_open, | 157 | .open = pwc_video_open, |
158 | .release = pwc_video_close, | 158 | .release = pwc_video_close, |
diff --git a/drivers/media/video/saa5246a.c b/drivers/media/video/saa5246a.c index 77bb940a1a4f..0b5d159895bf 100644 --- a/drivers/media/video/saa5246a.c +++ b/drivers/media/video/saa5246a.c | |||
@@ -817,7 +817,7 @@ static void __exit cleanup_saa_5246a (void) | |||
817 | module_init(init_saa_5246a); | 817 | module_init(init_saa_5246a); |
818 | module_exit(cleanup_saa_5246a); | 818 | module_exit(cleanup_saa_5246a); |
819 | 819 | ||
820 | static struct file_operations saa_fops = { | 820 | static const struct file_operations saa_fops = { |
821 | .owner = THIS_MODULE, | 821 | .owner = THIS_MODULE, |
822 | .open = saa5246a_open, | 822 | .open = saa5246a_open, |
823 | .release = saa5246a_release, | 823 | .release = saa5246a_release, |
diff --git a/drivers/media/video/saa5249.c b/drivers/media/video/saa5249.c index bb3fb4387f65..3e84737878a8 100644 --- a/drivers/media/video/saa5249.c +++ b/drivers/media/video/saa5249.c | |||
@@ -699,7 +699,7 @@ static void __exit cleanup_saa_5249 (void) | |||
699 | module_init(init_saa_5249); | 699 | module_init(init_saa_5249); |
700 | module_exit(cleanup_saa_5249); | 700 | module_exit(cleanup_saa_5249); |
701 | 701 | ||
702 | static struct file_operations saa_fops = { | 702 | static const struct file_operations saa_fops = { |
703 | .owner = THIS_MODULE, | 703 | .owner = THIS_MODULE, |
704 | .open = saa5249_open, | 704 | .open = saa5249_open, |
705 | .release = saa5249_release, | 705 | .release = saa5249_release, |
diff --git a/drivers/media/video/saa7134/saa7134-empress.c b/drivers/media/video/saa7134/saa7134-empress.c index daaae870a2c4..f521603482ca 100644 --- a/drivers/media/video/saa7134/saa7134-empress.c +++ b/drivers/media/video/saa7134/saa7134-empress.c | |||
@@ -319,7 +319,7 @@ static int ts_ioctl(struct inode *inode, struct file *file, | |||
319 | return video_usercopy(inode, file, cmd, arg, ts_do_ioctl); | 319 | return video_usercopy(inode, file, cmd, arg, ts_do_ioctl); |
320 | } | 320 | } |
321 | 321 | ||
322 | static struct file_operations ts_fops = | 322 | static const struct file_operations ts_fops = |
323 | { | 323 | { |
324 | .owner = THIS_MODULE, | 324 | .owner = THIS_MODULE, |
325 | .open = ts_open, | 325 | .open = ts_open, |
diff --git a/drivers/media/video/saa7134/saa7134-oss.c b/drivers/media/video/saa7134/saa7134-oss.c index bfcb860d14cc..72444f039e3d 100644 --- a/drivers/media/video/saa7134/saa7134-oss.c +++ b/drivers/media/video/saa7134/saa7134-oss.c | |||
@@ -563,7 +563,7 @@ static unsigned int dsp_poll(struct file *file, struct poll_table_struct *wait) | |||
563 | return mask; | 563 | return mask; |
564 | } | 564 | } |
565 | 565 | ||
566 | struct file_operations saa7134_dsp_fops = { | 566 | const struct file_operations saa7134_dsp_fops = { |
567 | .owner = THIS_MODULE, | 567 | .owner = THIS_MODULE, |
568 | .open = dsp_open, | 568 | .open = dsp_open, |
569 | .release = dsp_release, | 569 | .release = dsp_release, |
@@ -804,7 +804,7 @@ static int mixer_ioctl(struct inode *inode, struct file *file, | |||
804 | } | 804 | } |
805 | } | 805 | } |
806 | 806 | ||
807 | struct file_operations saa7134_mixer_fops = { | 807 | const struct file_operations saa7134_mixer_fops = { |
808 | .owner = THIS_MODULE, | 808 | .owner = THIS_MODULE, |
809 | .open = mixer_open, | 809 | .open = mixer_open, |
810 | .release = mixer_release, | 810 | .release = mixer_release, |
diff --git a/drivers/media/video/saa7134/saa7134-video.c b/drivers/media/video/saa7134/saa7134-video.c index 830617ea81cc..f2cb63053041 100644 --- a/drivers/media/video/saa7134/saa7134-video.c +++ b/drivers/media/video/saa7134/saa7134-video.c | |||
@@ -2336,7 +2336,7 @@ static int radio_ioctl(struct inode *inode, struct file *file, | |||
2336 | return video_usercopy(inode, file, cmd, arg, radio_do_ioctl); | 2336 | return video_usercopy(inode, file, cmd, arg, radio_do_ioctl); |
2337 | } | 2337 | } |
2338 | 2338 | ||
2339 | static struct file_operations video_fops = | 2339 | static const struct file_operations video_fops = |
2340 | { | 2340 | { |
2341 | .owner = THIS_MODULE, | 2341 | .owner = THIS_MODULE, |
2342 | .open = video_open, | 2342 | .open = video_open, |
@@ -2349,7 +2349,7 @@ static struct file_operations video_fops = | |||
2349 | .llseek = no_llseek, | 2349 | .llseek = no_llseek, |
2350 | }; | 2350 | }; |
2351 | 2351 | ||
2352 | static struct file_operations radio_fops = | 2352 | static const struct file_operations radio_fops = |
2353 | { | 2353 | { |
2354 | .owner = THIS_MODULE, | 2354 | .owner = THIS_MODULE, |
2355 | .open = video_open, | 2355 | .open = video_open, |
diff --git a/drivers/media/video/saa7134/saa7134.h b/drivers/media/video/saa7134/saa7134.h index e88ad7b40c47..88cd1297df13 100644 --- a/drivers/media/video/saa7134/saa7134.h +++ b/drivers/media/video/saa7134/saa7134.h | |||
@@ -683,8 +683,8 @@ int saa_dsp_writel(struct saa7134_dev *dev, int reg, u32 value); | |||
683 | /* ----------------------------------------------------------- */ | 683 | /* ----------------------------------------------------------- */ |
684 | /* saa7134-oss.c */ | 684 | /* saa7134-oss.c */ |
685 | 685 | ||
686 | extern struct file_operations saa7134_dsp_fops; | 686 | extern const struct file_operations saa7134_dsp_fops; |
687 | extern struct file_operations saa7134_mixer_fops; | 687 | extern const struct file_operations saa7134_mixer_fops; |
688 | 688 | ||
689 | int saa7134_oss_init1(struct saa7134_dev *dev); | 689 | int saa7134_oss_init1(struct saa7134_dev *dev); |
690 | int saa7134_oss_fini(struct saa7134_dev *dev); | 690 | int saa7134_oss_fini(struct saa7134_dev *dev); |
diff --git a/drivers/media/video/se401.c b/drivers/media/video/se401.c index 7aeec574d7ce..038448f5a978 100644 --- a/drivers/media/video/se401.c +++ b/drivers/media/video/se401.c | |||
@@ -1185,7 +1185,7 @@ static int se401_mmap(struct file *file, struct vm_area_struct *vma) | |||
1185 | return 0; | 1185 | return 0; |
1186 | } | 1186 | } |
1187 | 1187 | ||
1188 | static struct file_operations se401_fops = { | 1188 | static const struct file_operations se401_fops = { |
1189 | .owner = THIS_MODULE, | 1189 | .owner = THIS_MODULE, |
1190 | .open = se401_open, | 1190 | .open = se401_open, |
1191 | .release = se401_close, | 1191 | .release = se401_close, |
diff --git a/drivers/media/video/sn9c102/sn9c102_core.c b/drivers/media/video/sn9c102/sn9c102_core.c index 18458d46c0ff..04d4c8f28b89 100644 --- a/drivers/media/video/sn9c102/sn9c102_core.c +++ b/drivers/media/video/sn9c102/sn9c102_core.c | |||
@@ -2736,7 +2736,7 @@ static int sn9c102_ioctl(struct inode* inode, struct file* filp, | |||
2736 | 2736 | ||
2737 | /*****************************************************************************/ | 2737 | /*****************************************************************************/ |
2738 | 2738 | ||
2739 | static struct file_operations sn9c102_fops = { | 2739 | static const struct file_operations sn9c102_fops = { |
2740 | .owner = THIS_MODULE, | 2740 | .owner = THIS_MODULE, |
2741 | .open = sn9c102_open, | 2741 | .open = sn9c102_open, |
2742 | .release = sn9c102_release, | 2742 | .release = sn9c102_release, |
diff --git a/drivers/media/video/stradis.c b/drivers/media/video/stradis.c index 525d81288d55..3e736be5de84 100644 --- a/drivers/media/video/stradis.c +++ b/drivers/media/video/stradis.c | |||
@@ -1901,7 +1901,7 @@ static int saa_release(struct inode *inode, struct file *file) | |||
1901 | return 0; | 1901 | return 0; |
1902 | } | 1902 | } |
1903 | 1903 | ||
1904 | static struct file_operations saa_fops = { | 1904 | static const struct file_operations saa_fops = { |
1905 | .owner = THIS_MODULE, | 1905 | .owner = THIS_MODULE, |
1906 | .open = saa_open, | 1906 | .open = saa_open, |
1907 | .release = saa_release, | 1907 | .release = saa_release, |
diff --git a/drivers/media/video/stv680.c b/drivers/media/video/stv680.c index a1ec3aca3f91..bf3aa8d2d57e 100644 --- a/drivers/media/video/stv680.c +++ b/drivers/media/video/stv680.c | |||
@@ -1380,7 +1380,7 @@ static ssize_t stv680_read (struct file *file, char __user *buf, | |||
1380 | return realcount; | 1380 | return realcount; |
1381 | } /* stv680_read */ | 1381 | } /* stv680_read */ |
1382 | 1382 | ||
1383 | static struct file_operations stv680_fops = { | 1383 | static const struct file_operations stv680_fops = { |
1384 | .owner = THIS_MODULE, | 1384 | .owner = THIS_MODULE, |
1385 | .open = stv_open, | 1385 | .open = stv_open, |
1386 | .release = stv_close, | 1386 | .release = stv_close, |
diff --git a/drivers/media/video/tvmixer.c b/drivers/media/video/tvmixer.c index 1654576de10e..e2747bd373fd 100644 --- a/drivers/media/video/tvmixer.c +++ b/drivers/media/video/tvmixer.c | |||
@@ -228,7 +228,7 @@ static struct i2c_driver driver = { | |||
228 | .detach_client = tvmixer_clients, | 228 | .detach_client = tvmixer_clients, |
229 | }; | 229 | }; |
230 | 230 | ||
231 | static struct file_operations tvmixer_fops = { | 231 | static const struct file_operations tvmixer_fops = { |
232 | .owner = THIS_MODULE, | 232 | .owner = THIS_MODULE, |
233 | .llseek = no_llseek, | 233 | .llseek = no_llseek, |
234 | .ioctl = tvmixer_ioctl, | 234 | .ioctl = tvmixer_ioctl, |
diff --git a/drivers/media/video/usbvideo/usbvideo.c b/drivers/media/video/usbvideo/usbvideo.c index b560c9d7c516..d34d8c8b7376 100644 --- a/drivers/media/video/usbvideo/usbvideo.c +++ b/drivers/media/video/usbvideo/usbvideo.c | |||
@@ -945,7 +945,7 @@ static int usbvideo_find_struct(struct usbvideo *cams) | |||
945 | return rv; | 945 | return rv; |
946 | } | 946 | } |
947 | 947 | ||
948 | static struct file_operations usbvideo_fops = { | 948 | static const struct file_operations usbvideo_fops = { |
949 | .owner = THIS_MODULE, | 949 | .owner = THIS_MODULE, |
950 | .open = usbvideo_v4l_open, | 950 | .open = usbvideo_v4l_open, |
951 | .release =usbvideo_v4l_close, | 951 | .release =usbvideo_v4l_close, |
diff --git a/drivers/media/video/usbvideo/vicam.c b/drivers/media/video/usbvideo/vicam.c index 08f9559a6bfa..876fd2768242 100644 --- a/drivers/media/video/usbvideo/vicam.c +++ b/drivers/media/video/usbvideo/vicam.c | |||
@@ -1234,7 +1234,7 @@ static inline void vicam_create_proc_entry(struct vicam_camera *cam) { } | |||
1234 | static inline void vicam_destroy_proc_entry(void *ptr) { } | 1234 | static inline void vicam_destroy_proc_entry(void *ptr) { } |
1235 | #endif | 1235 | #endif |
1236 | 1236 | ||
1237 | static struct file_operations vicam_fops = { | 1237 | static const struct file_operations vicam_fops = { |
1238 | .owner = THIS_MODULE, | 1238 | .owner = THIS_MODULE, |
1239 | .open = vicam_open, | 1239 | .open = vicam_open, |
1240 | .release = vicam_close, | 1240 | .release = vicam_close, |
diff --git a/drivers/media/video/usbvision/usbvision-video.c b/drivers/media/video/usbvision/usbvision-video.c index bdd6301d2a47..4eb7330b96f8 100644 --- a/drivers/media/video/usbvision/usbvision-video.c +++ b/drivers/media/video/usbvision/usbvision-video.c | |||
@@ -1475,7 +1475,7 @@ static int usbvision_vbi_ioctl(struct inode *inode, struct file *file, | |||
1475 | // | 1475 | // |
1476 | 1476 | ||
1477 | // Video template | 1477 | // Video template |
1478 | static struct file_operations usbvision_fops = { | 1478 | static const struct file_operations usbvision_fops = { |
1479 | .owner = THIS_MODULE, | 1479 | .owner = THIS_MODULE, |
1480 | .open = usbvision_v4l2_open, | 1480 | .open = usbvision_v4l2_open, |
1481 | .release = usbvision_v4l2_close, | 1481 | .release = usbvision_v4l2_close, |
@@ -1496,7 +1496,7 @@ static struct video_device usbvision_video_template = { | |||
1496 | 1496 | ||
1497 | 1497 | ||
1498 | // Radio template | 1498 | // Radio template |
1499 | static struct file_operations usbvision_radio_fops = { | 1499 | static const struct file_operations usbvision_radio_fops = { |
1500 | .owner = THIS_MODULE, | 1500 | .owner = THIS_MODULE, |
1501 | .open = usbvision_radio_open, | 1501 | .open = usbvision_radio_open, |
1502 | .release = usbvision_radio_close, | 1502 | .release = usbvision_radio_close, |
@@ -1517,7 +1517,7 @@ static struct video_device usbvision_radio_template= | |||
1517 | 1517 | ||
1518 | 1518 | ||
1519 | // vbi template | 1519 | // vbi template |
1520 | static struct file_operations usbvision_vbi_fops = { | 1520 | static const struct file_operations usbvision_vbi_fops = { |
1521 | .owner = THIS_MODULE, | 1521 | .owner = THIS_MODULE, |
1522 | .open = usbvision_vbi_open, | 1522 | .open = usbvision_vbi_open, |
1523 | .release = usbvision_vbi_close, | 1523 | .release = usbvision_vbi_close, |
diff --git a/drivers/media/video/videodev.c b/drivers/media/video/videodev.c index 6a0e8ca72948..30c3822692fb 100644 --- a/drivers/media/video/videodev.c +++ b/drivers/media/video/videodev.c | |||
@@ -1561,7 +1561,7 @@ out: | |||
1561 | } | 1561 | } |
1562 | 1562 | ||
1563 | 1563 | ||
1564 | static struct file_operations video_fops; | 1564 | static const struct file_operations video_fops; |
1565 | 1565 | ||
1566 | /** | 1566 | /** |
1567 | * video_register_device - register video4linux devices | 1567 | * video_register_device - register video4linux devices |
@@ -1709,7 +1709,7 @@ void video_unregister_device(struct video_device *vfd) | |||
1709 | /* | 1709 | /* |
1710 | * Video fs operations | 1710 | * Video fs operations |
1711 | */ | 1711 | */ |
1712 | static struct file_operations video_fops= | 1712 | static const struct file_operations video_fops= |
1713 | { | 1713 | { |
1714 | .owner = THIS_MODULE, | 1714 | .owner = THIS_MODULE, |
1715 | .llseek = no_llseek, | 1715 | .llseek = no_llseek, |
diff --git a/drivers/media/video/vino.c b/drivers/media/video/vino.c index a373c142e742..0c658b74f2c4 100644 --- a/drivers/media/video/vino.c +++ b/drivers/media/video/vino.c | |||
@@ -4390,7 +4390,7 @@ static int vino_ioctl(struct inode *inode, struct file *file, | |||
4390 | // __initdata | 4390 | // __initdata |
4391 | static int vino_init_stage = 0; | 4391 | static int vino_init_stage = 0; |
4392 | 4392 | ||
4393 | static struct file_operations vino_fops = { | 4393 | static const struct file_operations vino_fops = { |
4394 | .owner = THIS_MODULE, | 4394 | .owner = THIS_MODULE, |
4395 | .open = vino_open, | 4395 | .open = vino_open, |
4396 | .release = vino_close, | 4396 | .release = vino_close, |
diff --git a/drivers/media/video/vivi.c b/drivers/media/video/vivi.c index d4cf55666731..cfb6b1f0402c 100644 --- a/drivers/media/video/vivi.c +++ b/drivers/media/video/vivi.c | |||
@@ -1292,7 +1292,7 @@ vivi_mmap(struct file *file, struct vm_area_struct * vma) | |||
1292 | return ret; | 1292 | return ret; |
1293 | } | 1293 | } |
1294 | 1294 | ||
1295 | static struct file_operations vivi_fops = { | 1295 | static const struct file_operations vivi_fops = { |
1296 | .owner = THIS_MODULE, | 1296 | .owner = THIS_MODULE, |
1297 | .open = vivi_open, | 1297 | .open = vivi_open, |
1298 | .release = vivi_release, | 1298 | .release = vivi_release, |
diff --git a/drivers/media/video/w9966.c b/drivers/media/video/w9966.c index 8d14f308f171..47366408637c 100644 --- a/drivers/media/video/w9966.c +++ b/drivers/media/video/w9966.c | |||
@@ -183,7 +183,7 @@ static int w9966_v4l_ioctl(struct inode *inode, struct file *file, | |||
183 | static ssize_t w9966_v4l_read(struct file *file, char __user *buf, | 183 | static ssize_t w9966_v4l_read(struct file *file, char __user *buf, |
184 | size_t count, loff_t *ppos); | 184 | size_t count, loff_t *ppos); |
185 | 185 | ||
186 | static struct file_operations w9966_fops = { | 186 | static const struct file_operations w9966_fops = { |
187 | .owner = THIS_MODULE, | 187 | .owner = THIS_MODULE, |
188 | .open = video_exclusive_open, | 188 | .open = video_exclusive_open, |
189 | .release = video_exclusive_release, | 189 | .release = video_exclusive_release, |
diff --git a/drivers/media/video/w9968cf.c b/drivers/media/video/w9968cf.c index 9f403af7b040..6e64af293be5 100644 --- a/drivers/media/video/w9968cf.c +++ b/drivers/media/video/w9968cf.c | |||
@@ -399,7 +399,7 @@ MODULE_PARM_DESC(specific_debug, | |||
399 | ****************************************************************************/ | 399 | ****************************************************************************/ |
400 | 400 | ||
401 | /* Video4linux interface */ | 401 | /* Video4linux interface */ |
402 | static struct file_operations w9968cf_fops; | 402 | static const struct file_operations w9968cf_fops; |
403 | static int w9968cf_open(struct inode*, struct file*); | 403 | static int w9968cf_open(struct inode*, struct file*); |
404 | static int w9968cf_release(struct inode*, struct file*); | 404 | static int w9968cf_release(struct inode*, struct file*); |
405 | static int w9968cf_mmap(struct file*, struct vm_area_struct*); | 405 | static int w9968cf_mmap(struct file*, struct vm_area_struct*); |
@@ -3466,7 +3466,7 @@ ioctl_fail: | |||
3466 | } | 3466 | } |
3467 | 3467 | ||
3468 | 3468 | ||
3469 | static struct file_operations w9968cf_fops = { | 3469 | static const struct file_operations w9968cf_fops = { |
3470 | .owner = THIS_MODULE, | 3470 | .owner = THIS_MODULE, |
3471 | .open = w9968cf_open, | 3471 | .open = w9968cf_open, |
3472 | .release = w9968cf_release, | 3472 | .release = w9968cf_release, |
diff --git a/drivers/media/video/zc0301/zc0301_core.c b/drivers/media/video/zc0301/zc0301_core.c index 52d0f759ee00..8da7f15f6290 100644 --- a/drivers/media/video/zc0301/zc0301_core.c +++ b/drivers/media/video/zc0301/zc0301_core.c | |||
@@ -1871,7 +1871,7 @@ static int zc0301_ioctl(struct inode* inode, struct file* filp, | |||
1871 | } | 1871 | } |
1872 | 1872 | ||
1873 | 1873 | ||
1874 | static struct file_operations zc0301_fops = { | 1874 | static const struct file_operations zc0301_fops = { |
1875 | .owner = THIS_MODULE, | 1875 | .owner = THIS_MODULE, |
1876 | .open = zc0301_open, | 1876 | .open = zc0301_open, |
1877 | .release = zc0301_release, | 1877 | .release = zc0301_release, |
diff --git a/drivers/media/video/zoran_driver.c b/drivers/media/video/zoran_driver.c index e10a9ee25fc5..074323733352 100644 --- a/drivers/media/video/zoran_driver.c +++ b/drivers/media/video/zoran_driver.c | |||
@@ -4679,7 +4679,7 @@ zoran_mmap (struct file *file, | |||
4679 | return 0; | 4679 | return 0; |
4680 | } | 4680 | } |
4681 | 4681 | ||
4682 | static struct file_operations zoran_fops = { | 4682 | static const struct file_operations zoran_fops = { |
4683 | .owner = THIS_MODULE, | 4683 | .owner = THIS_MODULE, |
4684 | .open = zoran_open, | 4684 | .open = zoran_open, |
4685 | .release = zoran_close, | 4685 | .release = zoran_close, |
diff --git a/drivers/media/video/zoran_procfs.c b/drivers/media/video/zoran_procfs.c index c374c76b3753..446ae8d5c3df 100644 --- a/drivers/media/video/zoran_procfs.c +++ b/drivers/media/video/zoran_procfs.c | |||
@@ -186,7 +186,7 @@ static ssize_t zoran_write(struct file *file, const char __user *buffer, | |||
186 | return count; | 186 | return count; |
187 | } | 187 | } |
188 | 188 | ||
189 | static struct file_operations zoran_operations = { | 189 | static const struct file_operations zoran_operations = { |
190 | .open = zoran_open, | 190 | .open = zoran_open, |
191 | .read = seq_read, | 191 | .read = seq_read, |
192 | .write = zoran_write, | 192 | .write = zoran_write, |
diff --git a/drivers/message/fusion/mptctl.c b/drivers/message/fusion/mptctl.c index b0b80428d110..9d0f30478e46 100644 --- a/drivers/message/fusion/mptctl.c +++ b/drivers/message/fusion/mptctl.c | |||
@@ -2662,7 +2662,7 @@ mptctl_hp_targetinfo(unsigned long arg) | |||
2662 | 2662 | ||
2663 | /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ | 2663 | /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ |
2664 | 2664 | ||
2665 | static struct file_operations mptctl_fops = { | 2665 | static const struct file_operations mptctl_fops = { |
2666 | .owner = THIS_MODULE, | 2666 | .owner = THIS_MODULE, |
2667 | .llseek = no_llseek, | 2667 | .llseek = no_llseek, |
2668 | .release = mptctl_release, | 2668 | .release = mptctl_release, |
diff --git a/drivers/message/i2o/i2o_config.c b/drivers/message/i2o/i2o_config.c index e33d446e7493..8ba275a12773 100644 --- a/drivers/message/i2o/i2o_config.c +++ b/drivers/message/i2o/i2o_config.c | |||
@@ -1111,7 +1111,7 @@ static int cfg_release(struct inode *inode, struct file *file) | |||
1111 | return 0; | 1111 | return 0; |
1112 | } | 1112 | } |
1113 | 1113 | ||
1114 | static struct file_operations config_fops = { | 1114 | static const struct file_operations config_fops = { |
1115 | .owner = THIS_MODULE, | 1115 | .owner = THIS_MODULE, |
1116 | .llseek = no_llseek, | 1116 | .llseek = no_llseek, |
1117 | .ioctl = i2o_cfg_ioctl, | 1117 | .ioctl = i2o_cfg_ioctl, |
diff --git a/drivers/message/i2o/i2o_proc.c b/drivers/message/i2o/i2o_proc.c index a61cb17c5c12..06892ac2286e 100644 --- a/drivers/message/i2o/i2o_proc.c +++ b/drivers/message/i2o/i2o_proc.c | |||
@@ -1703,133 +1703,133 @@ static int i2o_seq_open_dev_name(struct inode *inode, struct file *file) | |||
1703 | return single_open(file, i2o_seq_show_dev_name, PDE(inode)->data); | 1703 | return single_open(file, i2o_seq_show_dev_name, PDE(inode)->data); |
1704 | }; | 1704 | }; |
1705 | 1705 | ||
1706 | static struct file_operations i2o_seq_fops_lct = { | 1706 | static const struct file_operations i2o_seq_fops_lct = { |
1707 | .open = i2o_seq_open_lct, | 1707 | .open = i2o_seq_open_lct, |
1708 | .read = seq_read, | 1708 | .read = seq_read, |
1709 | .llseek = seq_lseek, | 1709 | .llseek = seq_lseek, |
1710 | .release = single_release, | 1710 | .release = single_release, |
1711 | }; | 1711 | }; |
1712 | 1712 | ||
1713 | static struct file_operations i2o_seq_fops_hrt = { | 1713 | static const struct file_operations i2o_seq_fops_hrt = { |
1714 | .open = i2o_seq_open_hrt, | 1714 | .open = i2o_seq_open_hrt, |
1715 | .read = seq_read, | 1715 | .read = seq_read, |
1716 | .llseek = seq_lseek, | 1716 | .llseek = seq_lseek, |
1717 | .release = single_release, | 1717 | .release = single_release, |
1718 | }; | 1718 | }; |
1719 | 1719 | ||
1720 | static struct file_operations i2o_seq_fops_status = { | 1720 | static const struct file_operations i2o_seq_fops_status = { |
1721 | .open = i2o_seq_open_status, | 1721 | .open = i2o_seq_open_status, |
1722 | .read = seq_read, | 1722 | .read = seq_read, |
1723 | .llseek = seq_lseek, | 1723 | .llseek = seq_lseek, |
1724 | .release = single_release, | 1724 | .release = single_release, |
1725 | }; | 1725 | }; |
1726 | 1726 | ||
1727 | static struct file_operations i2o_seq_fops_hw = { | 1727 | static const struct file_operations i2o_seq_fops_hw = { |
1728 | .open = i2o_seq_open_hw, | 1728 | .open = i2o_seq_open_hw, |
1729 | .read = seq_read, | 1729 | .read = seq_read, |
1730 | .llseek = seq_lseek, | 1730 | .llseek = seq_lseek, |
1731 | .release = single_release, | 1731 | .release = single_release, |
1732 | }; | 1732 | }; |
1733 | 1733 | ||
1734 | static struct file_operations i2o_seq_fops_ddm_table = { | 1734 | static const struct file_operations i2o_seq_fops_ddm_table = { |
1735 | .open = i2o_seq_open_ddm_table, | 1735 | .open = i2o_seq_open_ddm_table, |
1736 | .read = seq_read, | 1736 | .read = seq_read, |
1737 | .llseek = seq_lseek, | 1737 | .llseek = seq_lseek, |
1738 | .release = single_release, | 1738 | .release = single_release, |
1739 | }; | 1739 | }; |
1740 | 1740 | ||
1741 | static struct file_operations i2o_seq_fops_driver_store = { | 1741 | static const struct file_operations i2o_seq_fops_driver_store = { |
1742 | .open = i2o_seq_open_driver_store, | 1742 | .open = i2o_seq_open_driver_store, |
1743 | .read = seq_read, | 1743 | .read = seq_read, |
1744 | .llseek = seq_lseek, | 1744 | .llseek = seq_lseek, |
1745 | .release = single_release, | 1745 | .release = single_release, |
1746 | }; | 1746 | }; |
1747 | 1747 | ||
1748 | static struct file_operations i2o_seq_fops_drivers_stored = { | 1748 | static const struct file_operations i2o_seq_fops_drivers_stored = { |
1749 | .open = i2o_seq_open_drivers_stored, | 1749 | .open = i2o_seq_open_drivers_stored, |
1750 | .read = seq_read, | 1750 | .read = seq_read, |
1751 | .llseek = seq_lseek, | 1751 | .llseek = seq_lseek, |
1752 | .release = single_release, | 1752 | .release = single_release, |
1753 | }; | 1753 | }; |
1754 | 1754 | ||
1755 | static struct file_operations i2o_seq_fops_groups = { | 1755 | static const struct file_operations i2o_seq_fops_groups = { |
1756 | .open = i2o_seq_open_groups, | 1756 | .open = i2o_seq_open_groups, |
1757 | .read = seq_read, | 1757 | .read = seq_read, |
1758 | .llseek = seq_lseek, | 1758 | .llseek = seq_lseek, |
1759 | .release = single_release, | 1759 | .release = single_release, |
1760 | }; | 1760 | }; |
1761 | 1761 | ||
1762 | static struct file_operations i2o_seq_fops_phys_device = { | 1762 | static const struct file_operations i2o_seq_fops_phys_device = { |
1763 | .open = i2o_seq_open_phys_device, | 1763 | .open = i2o_seq_open_phys_device, |
1764 | .read = seq_read, | 1764 | .read = seq_read, |
1765 | .llseek = seq_lseek, | 1765 | .llseek = seq_lseek, |
1766 | .release = single_release, | 1766 | .release = single_release, |
1767 | }; | 1767 | }; |
1768 | 1768 | ||
1769 | static struct file_operations i2o_seq_fops_claimed = { | 1769 | static const struct file_operations i2o_seq_fops_claimed = { |
1770 | .open = i2o_seq_open_claimed, | 1770 | .open = i2o_seq_open_claimed, |
1771 | .read = seq_read, | 1771 | .read = seq_read, |
1772 | .llseek = seq_lseek, | 1772 | .llseek = seq_lseek, |
1773 | .release = single_release, | 1773 | .release = single_release, |
1774 | }; | 1774 | }; |
1775 | 1775 | ||
1776 | static struct file_operations i2o_seq_fops_users = { | 1776 | static const struct file_operations i2o_seq_fops_users = { |
1777 | .open = i2o_seq_open_users, | 1777 | .open = i2o_seq_open_users, |
1778 | .read = seq_read, | 1778 | .read = seq_read, |
1779 | .llseek = seq_lseek, | 1779 | .llseek = seq_lseek, |
1780 | .release = single_release, | 1780 | .release = single_release, |
1781 | }; | 1781 | }; |
1782 | 1782 | ||
1783 | static struct file_operations i2o_seq_fops_priv_msgs = { | 1783 | static const struct file_operations i2o_seq_fops_priv_msgs = { |
1784 | .open = i2o_seq_open_priv_msgs, | 1784 | .open = i2o_seq_open_priv_msgs, |
1785 | .read = seq_read, | 1785 | .read = seq_read, |
1786 | .llseek = seq_lseek, | 1786 | .llseek = seq_lseek, |
1787 | .release = single_release, | 1787 | .release = single_release, |
1788 | }; | 1788 | }; |
1789 | 1789 | ||
1790 | static struct file_operations i2o_seq_fops_authorized_users = { | 1790 | static const struct file_operations i2o_seq_fops_authorized_users = { |
1791 | .open = i2o_seq_open_authorized_users, | 1791 | .open = i2o_seq_open_authorized_users, |
1792 | .read = seq_read, | 1792 | .read = seq_read, |
1793 | .llseek = seq_lseek, | 1793 | .llseek = seq_lseek, |
1794 | .release = single_release, | 1794 | .release = single_release, |
1795 | }; | 1795 | }; |
1796 | 1796 | ||
1797 | static struct file_operations i2o_seq_fops_dev_name = { | 1797 | static const struct file_operations i2o_seq_fops_dev_name = { |
1798 | .open = i2o_seq_open_dev_name, | 1798 | .open = i2o_seq_open_dev_name, |
1799 | .read = seq_read, | 1799 | .read = seq_read, |
1800 | .llseek = seq_lseek, | 1800 | .llseek = seq_lseek, |
1801 | .release = single_release, | 1801 | .release = single_release, |
1802 | }; | 1802 | }; |
1803 | 1803 | ||
1804 | static struct file_operations i2o_seq_fops_dev_identity = { | 1804 | static const struct file_operations i2o_seq_fops_dev_identity = { |
1805 | .open = i2o_seq_open_dev_identity, | 1805 | .open = i2o_seq_open_dev_identity, |
1806 | .read = seq_read, | 1806 | .read = seq_read, |
1807 | .llseek = seq_lseek, | 1807 | .llseek = seq_lseek, |
1808 | .release = single_release, | 1808 | .release = single_release, |
1809 | }; | 1809 | }; |
1810 | 1810 | ||
1811 | static struct file_operations i2o_seq_fops_ddm_identity = { | 1811 | static const struct file_operations i2o_seq_fops_ddm_identity = { |
1812 | .open = i2o_seq_open_ddm_identity, | 1812 | .open = i2o_seq_open_ddm_identity, |
1813 | .read = seq_read, | 1813 | .read = seq_read, |
1814 | .llseek = seq_lseek, | 1814 | .llseek = seq_lseek, |
1815 | .release = single_release, | 1815 | .release = single_release, |
1816 | }; | 1816 | }; |
1817 | 1817 | ||
1818 | static struct file_operations i2o_seq_fops_uinfo = { | 1818 | static const struct file_operations i2o_seq_fops_uinfo = { |
1819 | .open = i2o_seq_open_uinfo, | 1819 | .open = i2o_seq_open_uinfo, |
1820 | .read = seq_read, | 1820 | .read = seq_read, |
1821 | .llseek = seq_lseek, | 1821 | .llseek = seq_lseek, |
1822 | .release = single_release, | 1822 | .release = single_release, |
1823 | }; | 1823 | }; |
1824 | 1824 | ||
1825 | static struct file_operations i2o_seq_fops_sgl_limits = { | 1825 | static const struct file_operations i2o_seq_fops_sgl_limits = { |
1826 | .open = i2o_seq_open_sgl_limits, | 1826 | .open = i2o_seq_open_sgl_limits, |
1827 | .read = seq_read, | 1827 | .read = seq_read, |
1828 | .llseek = seq_lseek, | 1828 | .llseek = seq_lseek, |
1829 | .release = single_release, | 1829 | .release = single_release, |
1830 | }; | 1830 | }; |
1831 | 1831 | ||
1832 | static struct file_operations i2o_seq_fops_sensors = { | 1832 | static const struct file_operations i2o_seq_fops_sensors = { |
1833 | .open = i2o_seq_open_sensors, | 1833 | .open = i2o_seq_open_sensors, |
1834 | .read = seq_read, | 1834 | .read = seq_read, |
1835 | .llseek = seq_lseek, | 1835 | .llseek = seq_lseek, |
diff --git a/drivers/misc/hdpuftrs/hdpu_cpustate.c b/drivers/misc/hdpuftrs/hdpu_cpustate.c index 11a801be71c8..ca86f113f36a 100644 --- a/drivers/misc/hdpuftrs/hdpu_cpustate.c +++ b/drivers/misc/hdpuftrs/hdpu_cpustate.c | |||
@@ -169,7 +169,7 @@ static struct platform_driver hdpu_cpustate_driver = { | |||
169 | /* | 169 | /* |
170 | * The various file operations we support. | 170 | * The various file operations we support. |
171 | */ | 171 | */ |
172 | static struct file_operations cpustate_fops = { | 172 | static const struct file_operations cpustate_fops = { |
173 | owner:THIS_MODULE, | 173 | owner:THIS_MODULE, |
174 | open:cpustate_open, | 174 | open:cpustate_open, |
175 | release:cpustate_release, | 175 | release:cpustate_release, |
diff --git a/drivers/misc/ibmasm/ibmasmfs.c b/drivers/misc/ibmasm/ibmasmfs.c index b99dc507de2e..c436d3de8b8b 100644 --- a/drivers/misc/ibmasm/ibmasmfs.c +++ b/drivers/misc/ibmasm/ibmasmfs.c | |||
@@ -156,7 +156,7 @@ static struct inode *ibmasmfs_make_inode(struct super_block *sb, int mode) | |||
156 | static struct dentry *ibmasmfs_create_file (struct super_block *sb, | 156 | static struct dentry *ibmasmfs_create_file (struct super_block *sb, |
157 | struct dentry *parent, | 157 | struct dentry *parent, |
158 | const char *name, | 158 | const char *name, |
159 | struct file_operations *fops, | 159 | const struct file_operations *fops, |
160 | void *data, | 160 | void *data, |
161 | int mode) | 161 | int mode) |
162 | { | 162 | { |
@@ -581,28 +581,28 @@ static ssize_t remote_settings_file_write(struct file *file, const char __user * | |||
581 | return count; | 581 | return count; |
582 | } | 582 | } |
583 | 583 | ||
584 | static struct file_operations command_fops = { | 584 | static const struct file_operations command_fops = { |
585 | .open = command_file_open, | 585 | .open = command_file_open, |
586 | .release = command_file_close, | 586 | .release = command_file_close, |
587 | .read = command_file_read, | 587 | .read = command_file_read, |
588 | .write = command_file_write, | 588 | .write = command_file_write, |
589 | }; | 589 | }; |
590 | 590 | ||
591 | static struct file_operations event_fops = { | 591 | static const struct file_operations event_fops = { |
592 | .open = event_file_open, | 592 | .open = event_file_open, |
593 | .release = event_file_close, | 593 | .release = event_file_close, |
594 | .read = event_file_read, | 594 | .read = event_file_read, |
595 | .write = event_file_write, | 595 | .write = event_file_write, |
596 | }; | 596 | }; |
597 | 597 | ||
598 | static struct file_operations r_heartbeat_fops = { | 598 | static const struct file_operations r_heartbeat_fops = { |
599 | .open = r_heartbeat_file_open, | 599 | .open = r_heartbeat_file_open, |
600 | .release = r_heartbeat_file_close, | 600 | .release = r_heartbeat_file_close, |
601 | .read = r_heartbeat_file_read, | 601 | .read = r_heartbeat_file_read, |
602 | .write = r_heartbeat_file_write, | 602 | .write = r_heartbeat_file_write, |
603 | }; | 603 | }; |
604 | 604 | ||
605 | static struct file_operations remote_settings_fops = { | 605 | static const struct file_operations remote_settings_fops = { |
606 | .open = remote_settings_file_open, | 606 | .open = remote_settings_file_open, |
607 | .release = remote_settings_file_close, | 607 | .release = remote_settings_file_close, |
608 | .read = remote_settings_file_read, | 608 | .read = remote_settings_file_read, |
diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c index 3013d0883b97..61a994ea8af1 100644 --- a/drivers/mtd/mtdchar.c +++ b/drivers/mtd/mtdchar.c | |||
@@ -759,7 +759,7 @@ static int mtd_ioctl(struct inode *inode, struct file *file, | |||
759 | return ret; | 759 | return ret; |
760 | } /* memory_ioctl */ | 760 | } /* memory_ioctl */ |
761 | 761 | ||
762 | static struct file_operations mtd_fops = { | 762 | static const struct file_operations mtd_fops = { |
763 | .owner = THIS_MODULE, | 763 | .owner = THIS_MODULE, |
764 | .llseek = mtd_lseek, | 764 | .llseek = mtd_lseek, |
765 | .read = mtd_read, | 765 | .read = mtd_read, |
diff --git a/drivers/net/arcnet/com20020.c b/drivers/net/arcnet/com20020.c index aa9dd8f11269..4218075c8aa3 100644 --- a/drivers/net/arcnet/com20020.c +++ b/drivers/net/arcnet/com20020.c | |||
@@ -338,7 +338,8 @@ static void com20020_set_mc_list(struct net_device *dev) | |||
338 | } | 338 | } |
339 | 339 | ||
340 | #if defined(CONFIG_ARCNET_COM20020_PCI_MODULE) || \ | 340 | #if defined(CONFIG_ARCNET_COM20020_PCI_MODULE) || \ |
341 | defined(CONFIG_ARCNET_COM20020_ISA_MODULE) | 341 | defined(CONFIG_ARCNET_COM20020_ISA_MODULE) || \ |
342 | defined(CONFIG_ARCNET_COM20020_CS_MODULE) | ||
342 | EXPORT_SYMBOL(com20020_check); | 343 | EXPORT_SYMBOL(com20020_check); |
343 | EXPORT_SYMBOL(com20020_found); | 344 | EXPORT_SYMBOL(com20020_found); |
344 | #endif | 345 | #endif |
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c index 8ce8fec615ba..61a6fa465d71 100644 --- a/drivers/net/bonding/bond_main.c +++ b/drivers/net/bonding/bond_main.c | |||
@@ -3120,7 +3120,7 @@ static int bond_info_open(struct inode *inode, struct file *file) | |||
3120 | return res; | 3120 | return res; |
3121 | } | 3121 | } |
3122 | 3122 | ||
3123 | static struct file_operations bond_info_fops = { | 3123 | static const struct file_operations bond_info_fops = { |
3124 | .owner = THIS_MODULE, | 3124 | .owner = THIS_MODULE, |
3125 | .open = bond_info_open, | 3125 | .open = bond_info_open, |
3126 | .read = seq_read, | 3126 | .read = seq_read, |
diff --git a/drivers/net/hamradio/bpqether.c b/drivers/net/hamradio/bpqether.c index 5b788d84011f..d2542697e298 100644 --- a/drivers/net/hamradio/bpqether.c +++ b/drivers/net/hamradio/bpqether.c | |||
@@ -459,7 +459,7 @@ static int bpq_info_open(struct inode *inode, struct file *file) | |||
459 | return seq_open(file, &bpq_seqops); | 459 | return seq_open(file, &bpq_seqops); |
460 | } | 460 | } |
461 | 461 | ||
462 | static struct file_operations bpq_info_fops = { | 462 | static const struct file_operations bpq_info_fops = { |
463 | .owner = THIS_MODULE, | 463 | .owner = THIS_MODULE, |
464 | .open = bpq_info_open, | 464 | .open = bpq_info_open, |
465 | .read = seq_read, | 465 | .read = seq_read, |
diff --git a/drivers/net/hamradio/scc.c b/drivers/net/hamradio/scc.c index 2ce047e9d262..6fdaad5a4577 100644 --- a/drivers/net/hamradio/scc.c +++ b/drivers/net/hamradio/scc.c | |||
@@ -2083,7 +2083,7 @@ static int scc_net_seq_open(struct inode *inode, struct file *file) | |||
2083 | return seq_open(file, &scc_net_seq_ops); | 2083 | return seq_open(file, &scc_net_seq_ops); |
2084 | } | 2084 | } |
2085 | 2085 | ||
2086 | static struct file_operations scc_net_seq_fops = { | 2086 | static const struct file_operations scc_net_seq_fops = { |
2087 | .owner = THIS_MODULE, | 2087 | .owner = THIS_MODULE, |
2088 | .open = scc_net_seq_open, | 2088 | .open = scc_net_seq_open, |
2089 | .read = seq_read, | 2089 | .read = seq_read, |
diff --git a/drivers/net/hamradio/yam.c b/drivers/net/hamradio/yam.c index 6d74f08720d5..08f27119a807 100644 --- a/drivers/net/hamradio/yam.c +++ b/drivers/net/hamradio/yam.c | |||
@@ -804,7 +804,7 @@ static int yam_info_open(struct inode *inode, struct file *file) | |||
804 | return seq_open(file, &yam_seqops); | 804 | return seq_open(file, &yam_seqops); |
805 | } | 805 | } |
806 | 806 | ||
807 | static struct file_operations yam_info_fops = { | 807 | static const struct file_operations yam_info_fops = { |
808 | .owner = THIS_MODULE, | 808 | .owner = THIS_MODULE, |
809 | .open = yam_info_open, | 809 | .open = yam_info_open, |
810 | .read = seq_read, | 810 | .read = seq_read, |
diff --git a/drivers/net/ibmveth.c b/drivers/net/ibmveth.c index 99343b5836b8..458db0538a9a 100644 --- a/drivers/net/ibmveth.c +++ b/drivers/net/ibmveth.c | |||
@@ -1156,7 +1156,7 @@ static int ibmveth_proc_open(struct inode *inode, struct file *file) | |||
1156 | return rc; | 1156 | return rc; |
1157 | } | 1157 | } |
1158 | 1158 | ||
1159 | static struct file_operations ibmveth_proc_fops = { | 1159 | static const struct file_operations ibmveth_proc_fops = { |
1160 | .owner = THIS_MODULE, | 1160 | .owner = THIS_MODULE, |
1161 | .open = ibmveth_proc_open, | 1161 | .open = ibmveth_proc_open, |
1162 | .read = seq_read, | 1162 | .read = seq_read, |
diff --git a/drivers/net/irda/vlsi_ir.c b/drivers/net/irda/vlsi_ir.c index e2b1af618450..3457e9d8b667 100644 --- a/drivers/net/irda/vlsi_ir.c +++ b/drivers/net/irda/vlsi_ir.c | |||
@@ -385,7 +385,7 @@ static int vlsi_seq_open(struct inode *inode, struct file *file) | |||
385 | return single_open(file, vlsi_seq_show, PDE(inode)->data); | 385 | return single_open(file, vlsi_seq_show, PDE(inode)->data); |
386 | } | 386 | } |
387 | 387 | ||
388 | static struct file_operations vlsi_proc_fops = { | 388 | static const struct file_operations vlsi_proc_fops = { |
389 | .owner = THIS_MODULE, | 389 | .owner = THIS_MODULE, |
390 | .open = vlsi_seq_open, | 390 | .open = vlsi_seq_open, |
391 | .read = seq_read, | 391 | .read = seq_read, |
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c index 0986f6c843e6..11b575f89856 100644 --- a/drivers/net/ppp_generic.c +++ b/drivers/net/ppp_generic.c | |||
@@ -834,7 +834,7 @@ static int ppp_unattached_ioctl(struct ppp_file *pf, struct file *file, | |||
834 | return err; | 834 | return err; |
835 | } | 835 | } |
836 | 836 | ||
837 | static struct file_operations ppp_device_fops = { | 837 | static const struct file_operations ppp_device_fops = { |
838 | .owner = THIS_MODULE, | 838 | .owner = THIS_MODULE, |
839 | .read = ppp_read, | 839 | .read = ppp_read, |
840 | .write = ppp_write, | 840 | .write = ppp_write, |
diff --git a/drivers/net/pppoe.c b/drivers/net/pppoe.c index 315d5c3fc66a..860bb0f60f68 100644 --- a/drivers/net/pppoe.c +++ b/drivers/net/pppoe.c | |||
@@ -1043,7 +1043,7 @@ static int pppoe_seq_open(struct inode *inode, struct file *file) | |||
1043 | return seq_open(file, &pppoe_seq_ops); | 1043 | return seq_open(file, &pppoe_seq_ops); |
1044 | } | 1044 | } |
1045 | 1045 | ||
1046 | static struct file_operations pppoe_seq_fops = { | 1046 | static const struct file_operations pppoe_seq_fops = { |
1047 | .owner = THIS_MODULE, | 1047 | .owner = THIS_MODULE, |
1048 | .open = pppoe_seq_open, | 1048 | .open = pppoe_seq_open, |
1049 | .read = seq_read, | 1049 | .read = seq_read, |
diff --git a/drivers/net/tun.c b/drivers/net/tun.c index 151a2e10e4f3..5643d1e84ed6 100644 --- a/drivers/net/tun.c +++ b/drivers/net/tun.c | |||
@@ -744,7 +744,7 @@ static int tun_chr_close(struct inode *inode, struct file *file) | |||
744 | return 0; | 744 | return 0; |
745 | } | 745 | } |
746 | 746 | ||
747 | static struct file_operations tun_fops = { | 747 | static const struct file_operations tun_fops = { |
748 | .owner = THIS_MODULE, | 748 | .owner = THIS_MODULE, |
749 | .llseek = no_llseek, | 749 | .llseek = no_llseek, |
750 | .read = do_sync_read, | 750 | .read = do_sync_read, |
diff --git a/drivers/net/wan/cosa.c b/drivers/net/wan/cosa.c index 6c7dfb50143f..e91b5a84a20a 100644 --- a/drivers/net/wan/cosa.c +++ b/drivers/net/wan/cosa.c | |||
@@ -311,7 +311,7 @@ static int cosa_chardev_ioctl(struct inode *inode, struct file *file, | |||
311 | static int cosa_fasync(struct inode *inode, struct file *file, int on); | 311 | static int cosa_fasync(struct inode *inode, struct file *file, int on); |
312 | #endif | 312 | #endif |
313 | 313 | ||
314 | static struct file_operations cosa_fops = { | 314 | static const struct file_operations cosa_fops = { |
315 | .owner = THIS_MODULE, | 315 | .owner = THIS_MODULE, |
316 | .llseek = no_llseek, | 316 | .llseek = no_llseek, |
317 | .read = cosa_read, | 317 | .read = cosa_read, |
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c index 44a22701da97..b08055abe83a 100644 --- a/drivers/net/wireless/airo.c +++ b/drivers/net/wireless/airo.c | |||
@@ -4430,53 +4430,53 @@ static int proc_BSSList_open( struct inode *inode, struct file *file ); | |||
4430 | static int proc_config_open( struct inode *inode, struct file *file ); | 4430 | static int proc_config_open( struct inode *inode, struct file *file ); |
4431 | static int proc_wepkey_open( struct inode *inode, struct file *file ); | 4431 | static int proc_wepkey_open( struct inode *inode, struct file *file ); |
4432 | 4432 | ||
4433 | static struct file_operations proc_statsdelta_ops = { | 4433 | static const struct file_operations proc_statsdelta_ops = { |
4434 | .read = proc_read, | 4434 | .read = proc_read, |
4435 | .open = proc_statsdelta_open, | 4435 | .open = proc_statsdelta_open, |
4436 | .release = proc_close | 4436 | .release = proc_close |
4437 | }; | 4437 | }; |
4438 | 4438 | ||
4439 | static struct file_operations proc_stats_ops = { | 4439 | static const struct file_operations proc_stats_ops = { |
4440 | .read = proc_read, | 4440 | .read = proc_read, |
4441 | .open = proc_stats_open, | 4441 | .open = proc_stats_open, |
4442 | .release = proc_close | 4442 | .release = proc_close |
4443 | }; | 4443 | }; |
4444 | 4444 | ||
4445 | static struct file_operations proc_status_ops = { | 4445 | static const struct file_operations proc_status_ops = { |
4446 | .read = proc_read, | 4446 | .read = proc_read, |
4447 | .open = proc_status_open, | 4447 | .open = proc_status_open, |
4448 | .release = proc_close | 4448 | .release = proc_close |
4449 | }; | 4449 | }; |
4450 | 4450 | ||
4451 | static struct file_operations proc_SSID_ops = { | 4451 | static const struct file_operations proc_SSID_ops = { |
4452 | .read = proc_read, | 4452 | .read = proc_read, |
4453 | .write = proc_write, | 4453 | .write = proc_write, |
4454 | .open = proc_SSID_open, | 4454 | .open = proc_SSID_open, |
4455 | .release = proc_close | 4455 | .release = proc_close |
4456 | }; | 4456 | }; |
4457 | 4457 | ||
4458 | static struct file_operations proc_BSSList_ops = { | 4458 | static const struct file_operations proc_BSSList_ops = { |
4459 | .read = proc_read, | 4459 | .read = proc_read, |
4460 | .write = proc_write, | 4460 | .write = proc_write, |
4461 | .open = proc_BSSList_open, | 4461 | .open = proc_BSSList_open, |
4462 | .release = proc_close | 4462 | .release = proc_close |
4463 | }; | 4463 | }; |
4464 | 4464 | ||
4465 | static struct file_operations proc_APList_ops = { | 4465 | static const struct file_operations proc_APList_ops = { |
4466 | .read = proc_read, | 4466 | .read = proc_read, |
4467 | .write = proc_write, | 4467 | .write = proc_write, |
4468 | .open = proc_APList_open, | 4468 | .open = proc_APList_open, |
4469 | .release = proc_close | 4469 | .release = proc_close |
4470 | }; | 4470 | }; |
4471 | 4471 | ||
4472 | static struct file_operations proc_config_ops = { | 4472 | static const struct file_operations proc_config_ops = { |
4473 | .read = proc_read, | 4473 | .read = proc_read, |
4474 | .write = proc_write, | 4474 | .write = proc_write, |
4475 | .open = proc_config_open, | 4475 | .open = proc_config_open, |
4476 | .release = proc_close | 4476 | .release = proc_close |
4477 | }; | 4477 | }; |
4478 | 4478 | ||
4479 | static struct file_operations proc_wepkey_ops = { | 4479 | static const struct file_operations proc_wepkey_ops = { |
4480 | .read = proc_read, | 4480 | .read = proc_read, |
4481 | .write = proc_write, | 4481 | .write = proc_write, |
4482 | .open = proc_wepkey_open, | 4482 | .open = proc_wepkey_open, |
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_debugfs.c b/drivers/net/wireless/bcm43xx/bcm43xx_debugfs.c index b9df06a06ea9..35dbe4554513 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx_debugfs.c +++ b/drivers/net/wireless/bcm43xx/bcm43xx_debugfs.c | |||
@@ -355,37 +355,37 @@ out_up: | |||
355 | #undef fappend | 355 | #undef fappend |
356 | 356 | ||
357 | 357 | ||
358 | static struct file_operations devinfo_fops = { | 358 | static const struct file_operations devinfo_fops = { |
359 | .read = devinfo_read_file, | 359 | .read = devinfo_read_file, |
360 | .write = write_file_dummy, | 360 | .write = write_file_dummy, |
361 | .open = open_file_generic, | 361 | .open = open_file_generic, |
362 | }; | 362 | }; |
363 | 363 | ||
364 | static struct file_operations spromdump_fops = { | 364 | static const struct file_operations spromdump_fops = { |
365 | .read = spromdump_read_file, | 365 | .read = spromdump_read_file, |
366 | .write = write_file_dummy, | 366 | .write = write_file_dummy, |
367 | .open = open_file_generic, | 367 | .open = open_file_generic, |
368 | }; | 368 | }; |
369 | 369 | ||
370 | static struct file_operations drvinfo_fops = { | 370 | static const struct file_operations drvinfo_fops = { |
371 | .read = drvinfo_read_file, | 371 | .read = drvinfo_read_file, |
372 | .write = write_file_dummy, | 372 | .write = write_file_dummy, |
373 | .open = open_file_generic, | 373 | .open = open_file_generic, |
374 | }; | 374 | }; |
375 | 375 | ||
376 | static struct file_operations tsf_fops = { | 376 | static const struct file_operations tsf_fops = { |
377 | .read = tsf_read_file, | 377 | .read = tsf_read_file, |
378 | .write = tsf_write_file, | 378 | .write = tsf_write_file, |
379 | .open = open_file_generic, | 379 | .open = open_file_generic, |
380 | }; | 380 | }; |
381 | 381 | ||
382 | static struct file_operations txstat_fops = { | 382 | static const struct file_operations txstat_fops = { |
383 | .read = txstat_read_file, | 383 | .read = txstat_read_file, |
384 | .write = write_file_dummy, | 384 | .write = write_file_dummy, |
385 | .open = open_file_generic, | 385 | .open = open_file_generic, |
386 | }; | 386 | }; |
387 | 387 | ||
388 | static struct file_operations restart_fops = { | 388 | static const struct file_operations restart_fops = { |
389 | .write = restart_write_file, | 389 | .write = restart_write_file, |
390 | .open = open_file_generic, | 390 | .open = open_file_generic, |
391 | }; | 391 | }; |
diff --git a/drivers/net/wireless/strip.c b/drivers/net/wireless/strip.c index ce3a8bac66ff..f5ce1c6063d8 100644 --- a/drivers/net/wireless/strip.c +++ b/drivers/net/wireless/strip.c | |||
@@ -1160,7 +1160,7 @@ static int strip_seq_open(struct inode *inode, struct file *file) | |||
1160 | return seq_open(file, &strip_seq_ops); | 1160 | return seq_open(file, &strip_seq_ops); |
1161 | } | 1161 | } |
1162 | 1162 | ||
1163 | static struct file_operations strip_seq_fops = { | 1163 | static const struct file_operations strip_seq_fops = { |
1164 | .owner = THIS_MODULE, | 1164 | .owner = THIS_MODULE, |
1165 | .open = strip_seq_open, | 1165 | .open = strip_seq_open, |
1166 | .read = seq_read, | 1166 | .read = seq_read, |
diff --git a/drivers/oprofile/event_buffer.c b/drivers/oprofile/event_buffer.c index 04d641714d34..00e937e9240e 100644 --- a/drivers/oprofile/event_buffer.c +++ b/drivers/oprofile/event_buffer.c | |||
@@ -181,7 +181,7 @@ out: | |||
181 | return retval; | 181 | return retval; |
182 | } | 182 | } |
183 | 183 | ||
184 | struct file_operations event_buffer_fops = { | 184 | const struct file_operations event_buffer_fops = { |
185 | .open = event_buffer_open, | 185 | .open = event_buffer_open, |
186 | .release = event_buffer_release, | 186 | .release = event_buffer_release, |
187 | .read = event_buffer_read, | 187 | .read = event_buffer_read, |
diff --git a/drivers/oprofile/event_buffer.h b/drivers/oprofile/event_buffer.h index 92416276e577..9b6a4ebd03e3 100644 --- a/drivers/oprofile/event_buffer.h +++ b/drivers/oprofile/event_buffer.h | |||
@@ -41,7 +41,7 @@ void wake_up_buffer_waiter(void); | |||
41 | /* add data to the event buffer */ | 41 | /* add data to the event buffer */ |
42 | void add_event_entry(unsigned long data); | 42 | void add_event_entry(unsigned long data); |
43 | 43 | ||
44 | extern struct file_operations event_buffer_fops; | 44 | extern const struct file_operations event_buffer_fops; |
45 | 45 | ||
46 | /* mutex between sync_cpu_buffers() and the | 46 | /* mutex between sync_cpu_buffers() and the |
47 | * file reading code. | 47 | * file reading code. |
diff --git a/drivers/oprofile/oprofile_files.c b/drivers/oprofile/oprofile_files.c index a72006c08f2b..ef953ba5ab6b 100644 --- a/drivers/oprofile/oprofile_files.c +++ b/drivers/oprofile/oprofile_files.c | |||
@@ -44,7 +44,7 @@ static ssize_t depth_write(struct file * file, char const __user * buf, size_t c | |||
44 | } | 44 | } |
45 | 45 | ||
46 | 46 | ||
47 | static struct file_operations depth_fops = { | 47 | static const struct file_operations depth_fops = { |
48 | .read = depth_read, | 48 | .read = depth_read, |
49 | .write = depth_write | 49 | .write = depth_write |
50 | }; | 50 | }; |
@@ -56,7 +56,7 @@ static ssize_t pointer_size_read(struct file * file, char __user * buf, size_t c | |||
56 | } | 56 | } |
57 | 57 | ||
58 | 58 | ||
59 | static struct file_operations pointer_size_fops = { | 59 | static const struct file_operations pointer_size_fops = { |
60 | .read = pointer_size_read, | 60 | .read = pointer_size_read, |
61 | }; | 61 | }; |
62 | 62 | ||
@@ -67,7 +67,7 @@ static ssize_t cpu_type_read(struct file * file, char __user * buf, size_t count | |||
67 | } | 67 | } |
68 | 68 | ||
69 | 69 | ||
70 | static struct file_operations cpu_type_fops = { | 70 | static const struct file_operations cpu_type_fops = { |
71 | .read = cpu_type_read, | 71 | .read = cpu_type_read, |
72 | }; | 72 | }; |
73 | 73 | ||
@@ -101,7 +101,7 @@ static ssize_t enable_write(struct file * file, char const __user * buf, size_t | |||
101 | } | 101 | } |
102 | 102 | ||
103 | 103 | ||
104 | static struct file_operations enable_fops = { | 104 | static const struct file_operations enable_fops = { |
105 | .read = enable_read, | 105 | .read = enable_read, |
106 | .write = enable_write, | 106 | .write = enable_write, |
107 | }; | 107 | }; |
@@ -114,7 +114,7 @@ static ssize_t dump_write(struct file * file, char const __user * buf, size_t co | |||
114 | } | 114 | } |
115 | 115 | ||
116 | 116 | ||
117 | static struct file_operations dump_fops = { | 117 | static const struct file_operations dump_fops = { |
118 | .write = dump_write, | 118 | .write = dump_write, |
119 | }; | 119 | }; |
120 | 120 | ||
diff --git a/drivers/oprofile/oprofilefs.c b/drivers/oprofile/oprofilefs.c index 5756401fb15b..6e67b42ca46d 100644 --- a/drivers/oprofile/oprofilefs.c +++ b/drivers/oprofile/oprofilefs.c | |||
@@ -115,14 +115,14 @@ static int default_open(struct inode * inode, struct file * filp) | |||
115 | } | 115 | } |
116 | 116 | ||
117 | 117 | ||
118 | static struct file_operations ulong_fops = { | 118 | static const struct file_operations ulong_fops = { |
119 | .read = ulong_read_file, | 119 | .read = ulong_read_file, |
120 | .write = ulong_write_file, | 120 | .write = ulong_write_file, |
121 | .open = default_open, | 121 | .open = default_open, |
122 | }; | 122 | }; |
123 | 123 | ||
124 | 124 | ||
125 | static struct file_operations ulong_ro_fops = { | 125 | static const struct file_operations ulong_ro_fops = { |
126 | .read = ulong_read_file, | 126 | .read = ulong_read_file, |
127 | .open = default_open, | 127 | .open = default_open, |
128 | }; | 128 | }; |
@@ -182,7 +182,7 @@ static ssize_t atomic_read_file(struct file * file, char __user * buf, size_t co | |||
182 | } | 182 | } |
183 | 183 | ||
184 | 184 | ||
185 | static struct file_operations atomic_ro_fops = { | 185 | static const struct file_operations atomic_ro_fops = { |
186 | .read = atomic_read_file, | 186 | .read = atomic_read_file, |
187 | .open = default_open, | 187 | .open = default_open, |
188 | }; | 188 | }; |
diff --git a/drivers/parisc/ccio-dma.c b/drivers/parisc/ccio-dma.c index fe3f5f5365c5..894fdb9d44c0 100644 --- a/drivers/parisc/ccio-dma.c +++ b/drivers/parisc/ccio-dma.c | |||
@@ -1091,7 +1091,7 @@ static int ccio_proc_info_open(struct inode *inode, struct file *file) | |||
1091 | return single_open(file, &ccio_proc_info, NULL); | 1091 | return single_open(file, &ccio_proc_info, NULL); |
1092 | } | 1092 | } |
1093 | 1093 | ||
1094 | static struct file_operations ccio_proc_info_fops = { | 1094 | static const struct file_operations ccio_proc_info_fops = { |
1095 | .owner = THIS_MODULE, | 1095 | .owner = THIS_MODULE, |
1096 | .open = ccio_proc_info_open, | 1096 | .open = ccio_proc_info_open, |
1097 | .read = seq_read, | 1097 | .read = seq_read, |
@@ -1127,7 +1127,7 @@ static int ccio_proc_bitmap_open(struct inode *inode, struct file *file) | |||
1127 | return single_open(file, &ccio_proc_bitmap_info, NULL); | 1127 | return single_open(file, &ccio_proc_bitmap_info, NULL); |
1128 | } | 1128 | } |
1129 | 1129 | ||
1130 | static struct file_operations ccio_proc_bitmap_fops = { | 1130 | static const struct file_operations ccio_proc_bitmap_fops = { |
1131 | .owner = THIS_MODULE, | 1131 | .owner = THIS_MODULE, |
1132 | .open = ccio_proc_bitmap_open, | 1132 | .open = ccio_proc_bitmap_open, |
1133 | .read = seq_read, | 1133 | .read = seq_read, |
diff --git a/drivers/parisc/eisa_eeprom.c b/drivers/parisc/eisa_eeprom.c index e13aafa70bf5..86e9c84a965e 100644 --- a/drivers/parisc/eisa_eeprom.c +++ b/drivers/parisc/eisa_eeprom.c | |||
@@ -97,7 +97,7 @@ static int eisa_eeprom_release(struct inode *inode, struct file *file) | |||
97 | /* | 97 | /* |
98 | * The various file operations we support. | 98 | * The various file operations we support. |
99 | */ | 99 | */ |
100 | static struct file_operations eisa_eeprom_fops = { | 100 | static const struct file_operations eisa_eeprom_fops = { |
101 | .owner = THIS_MODULE, | 101 | .owner = THIS_MODULE, |
102 | .llseek = eisa_eeprom_llseek, | 102 | .llseek = eisa_eeprom_llseek, |
103 | .read = eisa_eeprom_read, | 103 | .read = eisa_eeprom_read, |
diff --git a/drivers/parisc/sba_iommu.c b/drivers/parisc/sba_iommu.c index f1e7ccd5475b..76a29dadd519 100644 --- a/drivers/parisc/sba_iommu.c +++ b/drivers/parisc/sba_iommu.c | |||
@@ -1799,7 +1799,7 @@ sba_proc_open(struct inode *i, struct file *f) | |||
1799 | return single_open(f, &sba_proc_info, NULL); | 1799 | return single_open(f, &sba_proc_info, NULL); |
1800 | } | 1800 | } |
1801 | 1801 | ||
1802 | static struct file_operations sba_proc_fops = { | 1802 | static const struct file_operations sba_proc_fops = { |
1803 | .owner = THIS_MODULE, | 1803 | .owner = THIS_MODULE, |
1804 | .open = sba_proc_open, | 1804 | .open = sba_proc_open, |
1805 | .read = seq_read, | 1805 | .read = seq_read, |
@@ -1831,7 +1831,7 @@ sba_proc_bitmap_open(struct inode *i, struct file *f) | |||
1831 | return single_open(f, &sba_proc_bitmap_info, NULL); | 1831 | return single_open(f, &sba_proc_bitmap_info, NULL); |
1832 | } | 1832 | } |
1833 | 1833 | ||
1834 | static struct file_operations sba_proc_bitmap_fops = { | 1834 | static const struct file_operations sba_proc_bitmap_fops = { |
1835 | .owner = THIS_MODULE, | 1835 | .owner = THIS_MODULE, |
1836 | .open = sba_proc_bitmap_open, | 1836 | .open = sba_proc_bitmap_open, |
1837 | .read = seq_read, | 1837 | .read = seq_read, |
diff --git a/drivers/pci/hotplug/cpqphp_sysfs.c b/drivers/pci/hotplug/cpqphp_sysfs.c index 634f74d919d3..a13abf55d784 100644 --- a/drivers/pci/hotplug/cpqphp_sysfs.c +++ b/drivers/pci/hotplug/cpqphp_sysfs.c | |||
@@ -202,7 +202,7 @@ static int release(struct inode *inode, struct file *file) | |||
202 | return 0; | 202 | return 0; |
203 | } | 203 | } |
204 | 204 | ||
205 | static struct file_operations debug_ops = { | 205 | static const struct file_operations debug_ops = { |
206 | .owner = THIS_MODULE, | 206 | .owner = THIS_MODULE, |
207 | .open = open, | 207 | .open = open, |
208 | .llseek = lseek, | 208 | .llseek = lseek, |
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c index 4a6760a3b31f..ed87aa59f0b1 100644 --- a/drivers/pci/proc.c +++ b/drivers/pci/proc.c | |||
@@ -287,7 +287,7 @@ static int proc_bus_pci_release(struct inode *inode, struct file *file) | |||
287 | } | 287 | } |
288 | #endif /* HAVE_PCI_MMAP */ | 288 | #endif /* HAVE_PCI_MMAP */ |
289 | 289 | ||
290 | static struct file_operations proc_bus_pci_operations = { | 290 | static const struct file_operations proc_bus_pci_operations = { |
291 | .llseek = proc_bus_pci_lseek, | 291 | .llseek = proc_bus_pci_lseek, |
292 | .read = proc_bus_pci_read, | 292 | .read = proc_bus_pci_read, |
293 | .write = proc_bus_pci_write, | 293 | .write = proc_bus_pci_write, |
@@ -456,7 +456,7 @@ static int proc_bus_pci_dev_open(struct inode *inode, struct file *file) | |||
456 | { | 456 | { |
457 | return seq_open(file, &proc_bus_pci_devices_op); | 457 | return seq_open(file, &proc_bus_pci_devices_op); |
458 | } | 458 | } |
459 | static struct file_operations proc_bus_pci_dev_operations = { | 459 | static const struct file_operations proc_bus_pci_dev_operations = { |
460 | .open = proc_bus_pci_dev_open, | 460 | .open = proc_bus_pci_dev_open, |
461 | .read = seq_read, | 461 | .read = seq_read, |
462 | .llseek = seq_lseek, | 462 | .llseek = seq_lseek, |
diff --git a/drivers/pcmcia/pcmcia_ioctl.c b/drivers/pcmcia/pcmcia_ioctl.c index 88494149e910..27523c5f4dad 100644 --- a/drivers/pcmcia/pcmcia_ioctl.c +++ b/drivers/pcmcia/pcmcia_ioctl.c | |||
@@ -765,7 +765,7 @@ free_out: | |||
765 | 765 | ||
766 | /*====================================================================*/ | 766 | /*====================================================================*/ |
767 | 767 | ||
768 | static struct file_operations ds_fops = { | 768 | static const struct file_operations ds_fops = { |
769 | .owner = THIS_MODULE, | 769 | .owner = THIS_MODULE, |
770 | .open = ds_open, | 770 | .open = ds_open, |
771 | .release = ds_release, | 771 | .release = ds_release, |
diff --git a/drivers/pnp/isapnp/proc.c b/drivers/pnp/isapnp/proc.c index d21f3c1e72fc..40b724ebe23b 100644 --- a/drivers/pnp/isapnp/proc.c +++ b/drivers/pnp/isapnp/proc.c | |||
@@ -85,7 +85,7 @@ static ssize_t isapnp_proc_bus_read(struct file *file, char __user *buf, size_t | |||
85 | return nbytes; | 85 | return nbytes; |
86 | } | 86 | } |
87 | 87 | ||
88 | static struct file_operations isapnp_proc_bus_file_operations = | 88 | static const struct file_operations isapnp_proc_bus_file_operations = |
89 | { | 89 | { |
90 | .llseek = isapnp_proc_bus_lseek, | 90 | .llseek = isapnp_proc_bus_lseek, |
91 | .read = isapnp_proc_bus_read, | 91 | .read = isapnp_proc_bus_read, |
diff --git a/drivers/ps3/Makefile b/drivers/ps3/Makefile index d547cf50ca9d..96958c03cf61 100644 --- a/drivers/ps3/Makefile +++ b/drivers/ps3/Makefile | |||
@@ -1 +1,2 @@ | |||
1 | obj-$(CONFIG_PS3_VUART) += vuart.o | 1 | obj-$(CONFIG_PS3_VUART) += vuart.o |
2 | obj-$(CONFIG_PS3_PS3AV) += ps3av.o ps3av_cmd.o | ||
diff --git a/drivers/ps3/ps3av.c b/drivers/ps3/ps3av.c new file mode 100644 index 000000000000..1926b4d3e1f4 --- /dev/null +++ b/drivers/ps3/ps3av.c | |||
@@ -0,0 +1,974 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006 Sony Computer Entertainment Inc. | ||
3 | * Copyright 2006, 2007 Sony Corporation | ||
4 | * | ||
5 | * AV backend support for PS3 | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published | ||
9 | * by the Free Software Foundation; version 2 of the License. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, but | ||
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
14 | * General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along | ||
17 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | ||
19 | */ | ||
20 | |||
21 | #include <linux/module.h> | ||
22 | #include <linux/delay.h> | ||
23 | #include <linux/notifier.h> | ||
24 | #include <linux/reboot.h> | ||
25 | #include <linux/kernel.h> | ||
26 | #include <linux/ioctl.h> | ||
27 | #include <asm/lv1call.h> | ||
28 | #include <asm/ps3av.h> | ||
29 | #include <asm/ps3.h> | ||
30 | |||
31 | #include "vuart.h" | ||
32 | |||
33 | #define BUFSIZE 4096 /* vuart buf size */ | ||
34 | #define PS3AV_BUF_SIZE 512 /* max packet size */ | ||
35 | |||
36 | static int timeout = 5000; /* in msec ( 5 sec ) */ | ||
37 | module_param(timeout, int, 0644); | ||
38 | |||
39 | static struct ps3av ps3av; | ||
40 | |||
41 | static struct ps3_vuart_port_device ps3av_dev = { | ||
42 | .match_id = PS3_MATCH_ID_AV_SETTINGS | ||
43 | }; | ||
44 | |||
45 | /* color space */ | ||
46 | #define YUV444 PS3AV_CMD_VIDEO_CS_YUV444_8 | ||
47 | #define RGB8 PS3AV_CMD_VIDEO_CS_RGB_8 | ||
48 | /* format */ | ||
49 | #define XRGB PS3AV_CMD_VIDEO_FMT_X8R8G8B8 | ||
50 | /* aspect */ | ||
51 | #define A_N PS3AV_CMD_AV_ASPECT_4_3 | ||
52 | #define A_W PS3AV_CMD_AV_ASPECT_16_9 | ||
53 | static const struct avset_video_mode { | ||
54 | u32 cs; | ||
55 | u32 fmt; | ||
56 | u32 vid; | ||
57 | u32 aspect; | ||
58 | u32 x; | ||
59 | u32 y; | ||
60 | u32 interlace; | ||
61 | u32 freq; | ||
62 | } video_mode_table[] = { | ||
63 | { 0, }, /* auto */ | ||
64 | {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_480I, A_N, 720, 480, 1, 60}, | ||
65 | {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_480P, A_N, 720, 480, 0, 60}, | ||
66 | {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_720P_60HZ, A_N, 1280, 720, 0, 60}, | ||
67 | {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_1080I_60HZ, A_W, 1920, 1080, 1, 60}, | ||
68 | {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_1080P_60HZ, A_W, 1920, 1080, 0, 60}, | ||
69 | {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_576I, A_N, 720, 576, 1, 50}, | ||
70 | {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_576P, A_N, 720, 576, 0, 50}, | ||
71 | {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_720P_50HZ, A_N, 1280, 720, 0, 50}, | ||
72 | {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_1080I_50HZ, A_W, 1920, 1080, 1, 50}, | ||
73 | {YUV444, XRGB, PS3AV_CMD_VIDEO_VID_1080P_50HZ, A_W, 1920, 1080, 0, 50}, | ||
74 | { RGB8, XRGB, PS3AV_CMD_VIDEO_VID_WXGA, A_W, 1280, 768, 0, 60}, | ||
75 | { RGB8, XRGB, PS3AV_CMD_VIDEO_VID_SXGA, A_N, 1280, 1024, 0, 60}, | ||
76 | { RGB8, XRGB, PS3AV_CMD_VIDEO_VID_WUXGA, A_W, 1920, 1200, 0, 60}, | ||
77 | }; | ||
78 | |||
79 | /* supported CIDs */ | ||
80 | static u32 cmd_table[] = { | ||
81 | /* init */ | ||
82 | PS3AV_CID_AV_INIT, | ||
83 | PS3AV_CID_AV_FIN, | ||
84 | PS3AV_CID_VIDEO_INIT, | ||
85 | PS3AV_CID_AUDIO_INIT, | ||
86 | |||
87 | /* set */ | ||
88 | PS3AV_CID_AV_ENABLE_EVENT, | ||
89 | PS3AV_CID_AV_DISABLE_EVENT, | ||
90 | |||
91 | PS3AV_CID_AV_VIDEO_CS, | ||
92 | PS3AV_CID_AV_VIDEO_MUTE, | ||
93 | PS3AV_CID_AV_VIDEO_DISABLE_SIG, | ||
94 | PS3AV_CID_AV_AUDIO_PARAM, | ||
95 | PS3AV_CID_AV_AUDIO_MUTE, | ||
96 | PS3AV_CID_AV_HDMI_MODE, | ||
97 | PS3AV_CID_AV_TV_MUTE, | ||
98 | |||
99 | PS3AV_CID_VIDEO_MODE, | ||
100 | PS3AV_CID_VIDEO_FORMAT, | ||
101 | PS3AV_CID_VIDEO_PITCH, | ||
102 | |||
103 | PS3AV_CID_AUDIO_MODE, | ||
104 | PS3AV_CID_AUDIO_MUTE, | ||
105 | PS3AV_CID_AUDIO_ACTIVE, | ||
106 | PS3AV_CID_AUDIO_INACTIVE, | ||
107 | PS3AV_CID_AVB_PARAM, | ||
108 | |||
109 | /* get */ | ||
110 | PS3AV_CID_AV_GET_HW_CONF, | ||
111 | PS3AV_CID_AV_GET_MONITOR_INFO, | ||
112 | |||
113 | /* event */ | ||
114 | PS3AV_CID_EVENT_UNPLUGGED, | ||
115 | PS3AV_CID_EVENT_PLUGGED, | ||
116 | PS3AV_CID_EVENT_HDCP_DONE, | ||
117 | PS3AV_CID_EVENT_HDCP_FAIL, | ||
118 | PS3AV_CID_EVENT_HDCP_AUTH, | ||
119 | PS3AV_CID_EVENT_HDCP_ERROR, | ||
120 | |||
121 | 0 | ||
122 | }; | ||
123 | |||
124 | #define PS3AV_EVENT_CMD_MASK 0x10000000 | ||
125 | #define PS3AV_EVENT_ID_MASK 0x0000ffff | ||
126 | #define PS3AV_CID_MASK 0xffffffff | ||
127 | #define PS3AV_REPLY_BIT 0x80000000 | ||
128 | |||
129 | #define ps3av_event_get_port_id(cid) ((cid >> 16) & 0xff) | ||
130 | |||
131 | static u32 *ps3av_search_cmd_table(u32 cid, u32 mask) | ||
132 | { | ||
133 | u32 *table; | ||
134 | int i; | ||
135 | |||
136 | table = cmd_table; | ||
137 | for (i = 0;; table++, i++) { | ||
138 | if ((*table & mask) == (cid & mask)) | ||
139 | break; | ||
140 | if (*table == 0) | ||
141 | return NULL; | ||
142 | } | ||
143 | return table; | ||
144 | } | ||
145 | |||
146 | static int ps3av_parse_event_packet(const struct ps3av_reply_hdr *hdr) | ||
147 | { | ||
148 | u32 *table; | ||
149 | |||
150 | if (hdr->cid & PS3AV_EVENT_CMD_MASK) { | ||
151 | table = ps3av_search_cmd_table(hdr->cid, PS3AV_EVENT_CMD_MASK); | ||
152 | if (table) | ||
153 | dev_dbg(&ps3av_dev.core, | ||
154 | "recv event packet cid:%08x port:0x%x size:%d\n", | ||
155 | hdr->cid, ps3av_event_get_port_id(hdr->cid), | ||
156 | hdr->size); | ||
157 | else | ||
158 | printk(KERN_ERR | ||
159 | "%s: failed event packet, cid:%08x size:%d\n", | ||
160 | __FUNCTION__, hdr->cid, hdr->size); | ||
161 | return 1; /* receive event packet */ | ||
162 | } | ||
163 | return 0; | ||
164 | } | ||
165 | |||
166 | static int ps3av_send_cmd_pkt(const struct ps3av_send_hdr *send_buf, | ||
167 | struct ps3av_reply_hdr *recv_buf, int write_len, | ||
168 | int read_len) | ||
169 | { | ||
170 | int res; | ||
171 | u32 cmd; | ||
172 | int event; | ||
173 | |||
174 | if (!ps3av.available) | ||
175 | return -ENODEV; | ||
176 | |||
177 | /* send pkt */ | ||
178 | res = ps3av_vuart_write(ps3av.dev, send_buf, write_len); | ||
179 | if (res < 0) { | ||
180 | dev_dbg(&ps3av_dev.core, | ||
181 | "%s: ps3av_vuart_write() failed (result=%d)\n", | ||
182 | __FUNCTION__, res); | ||
183 | return res; | ||
184 | } | ||
185 | |||
186 | /* recv pkt */ | ||
187 | cmd = send_buf->cid; | ||
188 | do { | ||
189 | /* read header */ | ||
190 | res = ps3av_vuart_read(ps3av.dev, recv_buf, PS3AV_HDR_SIZE, | ||
191 | timeout); | ||
192 | if (res != PS3AV_HDR_SIZE) { | ||
193 | dev_dbg(&ps3av_dev.core, | ||
194 | "%s: ps3av_vuart_read() failed (result=%d)\n", | ||
195 | __FUNCTION__, res); | ||
196 | return res; | ||
197 | } | ||
198 | |||
199 | /* read body */ | ||
200 | res = ps3av_vuart_read(ps3av.dev, &recv_buf->cid, | ||
201 | recv_buf->size, timeout); | ||
202 | if (res < 0) { | ||
203 | dev_dbg(&ps3av_dev.core, | ||
204 | "%s: ps3av_vuart_read() failed (result=%d)\n", | ||
205 | __FUNCTION__, res); | ||
206 | return res; | ||
207 | } | ||
208 | res += PS3AV_HDR_SIZE; /* total len */ | ||
209 | event = ps3av_parse_event_packet(recv_buf); | ||
210 | /* ret > 0 event packet */ | ||
211 | } while (event); | ||
212 | |||
213 | if ((cmd | PS3AV_REPLY_BIT) != recv_buf->cid) { | ||
214 | dev_dbg(&ps3av_dev.core, "%s: reply err (result=%x)\n", | ||
215 | __FUNCTION__, recv_buf->cid); | ||
216 | return -EINVAL; | ||
217 | } | ||
218 | |||
219 | return 0; | ||
220 | } | ||
221 | |||
222 | static int ps3av_process_reply_packet(struct ps3av_send_hdr *cmd_buf, | ||
223 | const struct ps3av_reply_hdr *recv_buf, | ||
224 | int user_buf_size) | ||
225 | { | ||
226 | int return_len; | ||
227 | |||
228 | if (recv_buf->version != PS3AV_VERSION) { | ||
229 | dev_dbg(&ps3av_dev.core, "reply_packet invalid version:%x\n", | ||
230 | recv_buf->version); | ||
231 | return -EFAULT; | ||
232 | } | ||
233 | return_len = recv_buf->size + PS3AV_HDR_SIZE; | ||
234 | if (return_len > user_buf_size) | ||
235 | return_len = user_buf_size; | ||
236 | memcpy(cmd_buf, recv_buf, return_len); | ||
237 | return 0; /* success */ | ||
238 | } | ||
239 | |||
240 | void ps3av_set_hdr(u32 cid, u16 size, struct ps3av_send_hdr *hdr) | ||
241 | { | ||
242 | hdr->version = PS3AV_VERSION; | ||
243 | hdr->size = size - PS3AV_HDR_SIZE; | ||
244 | hdr->cid = cid; | ||
245 | } | ||
246 | |||
247 | int ps3av_do_pkt(u32 cid, u16 send_len, size_t usr_buf_size, | ||
248 | struct ps3av_send_hdr *buf) | ||
249 | { | ||
250 | int res = 0; | ||
251 | union { | ||
252 | struct ps3av_reply_hdr reply_hdr; | ||
253 | u8 raw[PS3AV_BUF_SIZE]; | ||
254 | } recv_buf; | ||
255 | |||
256 | u32 *table; | ||
257 | |||
258 | BUG_ON(!ps3av.available); | ||
259 | |||
260 | if (down_interruptible(&ps3av.sem)) | ||
261 | return -ERESTARTSYS; | ||
262 | |||
263 | table = ps3av_search_cmd_table(cid, PS3AV_CID_MASK); | ||
264 | BUG_ON(!table); | ||
265 | BUG_ON(send_len < PS3AV_HDR_SIZE); | ||
266 | BUG_ON(usr_buf_size < send_len); | ||
267 | BUG_ON(usr_buf_size > PS3AV_BUF_SIZE); | ||
268 | |||
269 | /* create header */ | ||
270 | ps3av_set_hdr(cid, send_len, buf); | ||
271 | |||
272 | /* send packet via vuart */ | ||
273 | res = ps3av_send_cmd_pkt(buf, &recv_buf.reply_hdr, send_len, | ||
274 | usr_buf_size); | ||
275 | if (res < 0) { | ||
276 | printk(KERN_ERR | ||
277 | "%s: ps3av_send_cmd_pkt() failed (result=%d)\n", | ||
278 | __FUNCTION__, res); | ||
279 | goto err; | ||
280 | } | ||
281 | |||
282 | /* process reply packet */ | ||
283 | res = ps3av_process_reply_packet(buf, &recv_buf.reply_hdr, | ||
284 | usr_buf_size); | ||
285 | if (res < 0) { | ||
286 | printk(KERN_ERR "%s: put_return_status() failed (result=%d)\n", | ||
287 | __FUNCTION__, res); | ||
288 | goto err; | ||
289 | } | ||
290 | |||
291 | up(&ps3av.sem); | ||
292 | return 0; | ||
293 | |||
294 | err: | ||
295 | up(&ps3av.sem); | ||
296 | printk(KERN_ERR "%s: failed cid:%x res:%d\n", __FUNCTION__, cid, res); | ||
297 | return res; | ||
298 | } | ||
299 | |||
300 | static int ps3av_set_av_video_mute(u32 mute) | ||
301 | { | ||
302 | int i, num_of_av_port, res; | ||
303 | |||
304 | num_of_av_port = ps3av.av_hw_conf.num_of_hdmi + | ||
305 | ps3av.av_hw_conf.num_of_avmulti; | ||
306 | /* video mute on */ | ||
307 | for (i = 0; i < num_of_av_port; i++) { | ||
308 | res = ps3av_cmd_av_video_mute(1, &ps3av.av_port[i], mute); | ||
309 | if (res < 0) | ||
310 | return -1; | ||
311 | } | ||
312 | |||
313 | return 0; | ||
314 | } | ||
315 | |||
316 | static int ps3av_set_video_disable_sig(void) | ||
317 | { | ||
318 | int i, num_of_hdmi_port, num_of_av_port, res; | ||
319 | |||
320 | num_of_hdmi_port = ps3av.av_hw_conf.num_of_hdmi; | ||
321 | num_of_av_port = ps3av.av_hw_conf.num_of_hdmi + | ||
322 | ps3av.av_hw_conf.num_of_avmulti; | ||
323 | |||
324 | /* tv mute */ | ||
325 | for (i = 0; i < num_of_hdmi_port; i++) { | ||
326 | res = ps3av_cmd_av_tv_mute(ps3av.av_port[i], | ||
327 | PS3AV_CMD_MUTE_ON); | ||
328 | if (res < 0) | ||
329 | return -1; | ||
330 | } | ||
331 | msleep(100); | ||
332 | |||
333 | /* video mute on */ | ||
334 | for (i = 0; i < num_of_av_port; i++) { | ||
335 | res = ps3av_cmd_av_video_disable_sig(ps3av.av_port[i]); | ||
336 | if (res < 0) | ||
337 | return -1; | ||
338 | if (i < num_of_hdmi_port) { | ||
339 | res = ps3av_cmd_av_tv_mute(ps3av.av_port[i], | ||
340 | PS3AV_CMD_MUTE_OFF); | ||
341 | if (res < 0) | ||
342 | return -1; | ||
343 | } | ||
344 | } | ||
345 | msleep(300); | ||
346 | |||
347 | return 0; | ||
348 | } | ||
349 | |||
350 | static int ps3av_set_audio_mute(u32 mute) | ||
351 | { | ||
352 | int i, num_of_av_port, num_of_opt_port, res; | ||
353 | |||
354 | num_of_av_port = ps3av.av_hw_conf.num_of_hdmi + | ||
355 | ps3av.av_hw_conf.num_of_avmulti; | ||
356 | num_of_opt_port = ps3av.av_hw_conf.num_of_spdif; | ||
357 | |||
358 | for (i = 0; i < num_of_av_port; i++) { | ||
359 | res = ps3av_cmd_av_audio_mute(1, &ps3av.av_port[i], mute); | ||
360 | if (res < 0) | ||
361 | return -1; | ||
362 | } | ||
363 | for (i = 0; i < num_of_opt_port; i++) { | ||
364 | res = ps3av_cmd_audio_mute(1, &ps3av.opt_port[i], mute); | ||
365 | if (res < 0) | ||
366 | return -1; | ||
367 | } | ||
368 | |||
369 | return 0; | ||
370 | } | ||
371 | |||
372 | int ps3av_set_audio_mode(u32 ch, u32 fs, u32 word_bits, u32 format, u32 source) | ||
373 | { | ||
374 | struct ps3av_pkt_avb_param avb_param; | ||
375 | int i, num_of_audio, vid, res; | ||
376 | struct ps3av_pkt_audio_mode audio_mode; | ||
377 | u32 len = 0; | ||
378 | |||
379 | num_of_audio = ps3av.av_hw_conf.num_of_hdmi + | ||
380 | ps3av.av_hw_conf.num_of_avmulti + | ||
381 | ps3av.av_hw_conf.num_of_spdif; | ||
382 | |||
383 | avb_param.num_of_video_pkt = 0; | ||
384 | avb_param.num_of_audio_pkt = PS3AV_AVB_NUM_AUDIO; /* always 0 */ | ||
385 | avb_param.num_of_av_video_pkt = 0; | ||
386 | avb_param.num_of_av_audio_pkt = ps3av.av_hw_conf.num_of_hdmi; | ||
387 | |||
388 | vid = video_mode_table[ps3av.ps3av_mode].vid; | ||
389 | |||
390 | /* audio mute */ | ||
391 | ps3av_set_audio_mute(PS3AV_CMD_MUTE_ON); | ||
392 | |||
393 | /* audio inactive */ | ||
394 | res = ps3av_cmd_audio_active(0, ps3av.audio_port); | ||
395 | if (res < 0) | ||
396 | dev_dbg(&ps3av_dev.core, | ||
397 | "ps3av_cmd_audio_active OFF failed\n"); | ||
398 | |||
399 | /* audio_pkt */ | ||
400 | for (i = 0; i < num_of_audio; i++) { | ||
401 | ps3av_cmd_set_audio_mode(&audio_mode, ps3av.av_port[i], ch, fs, | ||
402 | word_bits, format, source); | ||
403 | if (i < ps3av.av_hw_conf.num_of_hdmi) { | ||
404 | /* hdmi only */ | ||
405 | len += ps3av_cmd_set_av_audio_param(&avb_param.buf[len], | ||
406 | ps3av.av_port[i], | ||
407 | &audio_mode, vid); | ||
408 | } | ||
409 | /* audio_mode pkt should be sent separately */ | ||
410 | res = ps3av_cmd_audio_mode(&audio_mode); | ||
411 | if (res < 0) | ||
412 | dev_dbg(&ps3av_dev.core, | ||
413 | "ps3av_cmd_audio_mode failed, port:%x\n", i); | ||
414 | } | ||
415 | |||
416 | /* send command using avb pkt */ | ||
417 | len += offsetof(struct ps3av_pkt_avb_param, buf); | ||
418 | res = ps3av_cmd_avb_param(&avb_param, len); | ||
419 | if (res < 0) | ||
420 | dev_dbg(&ps3av_dev.core, "ps3av_cmd_avb_param failed\n"); | ||
421 | |||
422 | /* audio mute */ | ||
423 | ps3av_set_audio_mute(PS3AV_CMD_MUTE_OFF); | ||
424 | |||
425 | /* audio active */ | ||
426 | res = ps3av_cmd_audio_active(1, ps3av.audio_port); | ||
427 | if (res < 0) | ||
428 | dev_dbg(&ps3av_dev.core, "ps3av_cmd_audio_active ON failed\n"); | ||
429 | |||
430 | return 0; | ||
431 | } | ||
432 | |||
433 | EXPORT_SYMBOL_GPL(ps3av_set_audio_mode); | ||
434 | |||
435 | static int ps3av_set_videomode(void) | ||
436 | { | ||
437 | /* av video mute */ | ||
438 | ps3av_set_av_video_mute(PS3AV_CMD_MUTE_ON); | ||
439 | |||
440 | /* wake up ps3avd to do the actual video mode setting */ | ||
441 | up(&ps3av.ping); | ||
442 | |||
443 | return 0; | ||
444 | } | ||
445 | |||
446 | static void ps3av_set_videomode_cont(u32 id, u32 old_id) | ||
447 | { | ||
448 | struct ps3av_pkt_avb_param avb_param; | ||
449 | int i; | ||
450 | u32 len = 0, av_video_cs; | ||
451 | const struct avset_video_mode *video_mode; | ||
452 | int res; | ||
453 | |||
454 | video_mode = &video_mode_table[id & PS3AV_MODE_MASK]; | ||
455 | |||
456 | avb_param.num_of_video_pkt = PS3AV_AVB_NUM_VIDEO; /* num of head */ | ||
457 | avb_param.num_of_audio_pkt = 0; | ||
458 | avb_param.num_of_av_video_pkt = ps3av.av_hw_conf.num_of_hdmi + | ||
459 | ps3av.av_hw_conf.num_of_avmulti; | ||
460 | avb_param.num_of_av_audio_pkt = 0; | ||
461 | |||
462 | /* video signal off */ | ||
463 | ps3av_set_video_disable_sig(); | ||
464 | |||
465 | /* Retail PS3 product doesn't support this */ | ||
466 | if (id & PS3AV_MODE_HDCP_OFF) { | ||
467 | res = ps3av_cmd_av_hdmi_mode(PS3AV_CMD_AV_HDMI_HDCP_OFF); | ||
468 | if (res == PS3AV_STATUS_UNSUPPORTED_HDMI_MODE) | ||
469 | dev_dbg(&ps3av_dev.core, "Not supported\n"); | ||
470 | else if (res) | ||
471 | dev_dbg(&ps3av_dev.core, | ||
472 | "ps3av_cmd_av_hdmi_mode failed\n"); | ||
473 | } else if (old_id & PS3AV_MODE_HDCP_OFF) { | ||
474 | res = ps3av_cmd_av_hdmi_mode(PS3AV_CMD_AV_HDMI_MODE_NORMAL); | ||
475 | if (res < 0 && res != PS3AV_STATUS_UNSUPPORTED_HDMI_MODE) | ||
476 | dev_dbg(&ps3av_dev.core, | ||
477 | "ps3av_cmd_av_hdmi_mode failed\n"); | ||
478 | } | ||
479 | |||
480 | /* video_pkt */ | ||
481 | for (i = 0; i < avb_param.num_of_video_pkt; i++) | ||
482 | len += ps3av_cmd_set_video_mode(&avb_param.buf[len], | ||
483 | ps3av.head[i], video_mode->vid, | ||
484 | video_mode->fmt, id); | ||
485 | /* av_video_pkt */ | ||
486 | for (i = 0; i < avb_param.num_of_av_video_pkt; i++) { | ||
487 | if (id & PS3AV_MODE_DVI || id & PS3AV_MODE_RGB) | ||
488 | av_video_cs = RGB8; | ||
489 | else | ||
490 | av_video_cs = video_mode->cs; | ||
491 | #ifndef PS3AV_HDMI_YUV | ||
492 | if (ps3av.av_port[i] == PS3AV_CMD_AVPORT_HDMI_0 || | ||
493 | ps3av.av_port[i] == PS3AV_CMD_AVPORT_HDMI_1) | ||
494 | av_video_cs = RGB8; /* use RGB for HDMI */ | ||
495 | #endif | ||
496 | len += ps3av_cmd_set_av_video_cs(&avb_param.buf[len], | ||
497 | ps3av.av_port[i], | ||
498 | video_mode->vid, av_video_cs, | ||
499 | video_mode->aspect, id); | ||
500 | } | ||
501 | /* send command using avb pkt */ | ||
502 | len += offsetof(struct ps3av_pkt_avb_param, buf); | ||
503 | res = ps3av_cmd_avb_param(&avb_param, len); | ||
504 | if (res == PS3AV_STATUS_NO_SYNC_HEAD) | ||
505 | printk(KERN_WARNING | ||
506 | "%s: Command failed. Please try your request again. \n", | ||
507 | __FUNCTION__); | ||
508 | else if (res) | ||
509 | dev_dbg(&ps3av_dev.core, "ps3av_cmd_avb_param failed\n"); | ||
510 | |||
511 | msleep(1500); | ||
512 | /* av video mute */ | ||
513 | ps3av_set_av_video_mute(PS3AV_CMD_MUTE_OFF); | ||
514 | } | ||
515 | |||
516 | static int ps3avd(void *p) | ||
517 | { | ||
518 | struct ps3av *info = p; | ||
519 | |||
520 | daemonize("ps3avd"); | ||
521 | while (1) { | ||
522 | down(&info->ping); | ||
523 | ps3av_set_videomode_cont(info->ps3av_mode, | ||
524 | info->ps3av_mode_old); | ||
525 | up(&info->pong); | ||
526 | } | ||
527 | return 0; | ||
528 | } | ||
529 | |||
530 | static int ps3av_vid2table_id(int vid) | ||
531 | { | ||
532 | int i; | ||
533 | |||
534 | for (i = 1; i < ARRAY_SIZE(video_mode_table); i++) | ||
535 | if (video_mode_table[i].vid == vid) | ||
536 | return i; | ||
537 | return -1; | ||
538 | } | ||
539 | |||
540 | static int ps3av_resbit2vid(u32 res_50, u32 res_60) | ||
541 | { | ||
542 | int vid = -1; | ||
543 | |||
544 | if (res_50 > res_60) { /* if res_50 == res_60, res_60 will be used */ | ||
545 | if (res_50 & PS3AV_RESBIT_1920x1080P) | ||
546 | vid = PS3AV_CMD_VIDEO_VID_1080P_50HZ; | ||
547 | else if (res_50 & PS3AV_RESBIT_1920x1080I) | ||
548 | vid = PS3AV_CMD_VIDEO_VID_1080I_50HZ; | ||
549 | else if (res_50 & PS3AV_RESBIT_1280x720P) | ||
550 | vid = PS3AV_CMD_VIDEO_VID_720P_50HZ; | ||
551 | else if (res_50 & PS3AV_RESBIT_720x576P) | ||
552 | vid = PS3AV_CMD_VIDEO_VID_576P; | ||
553 | else | ||
554 | vid = -1; | ||
555 | } else { | ||
556 | if (res_60 & PS3AV_RESBIT_1920x1080P) | ||
557 | vid = PS3AV_CMD_VIDEO_VID_1080P_60HZ; | ||
558 | else if (res_60 & PS3AV_RESBIT_1920x1080I) | ||
559 | vid = PS3AV_CMD_VIDEO_VID_1080I_60HZ; | ||
560 | else if (res_60 & PS3AV_RESBIT_1280x720P) | ||
561 | vid = PS3AV_CMD_VIDEO_VID_720P_60HZ; | ||
562 | else if (res_60 & PS3AV_RESBIT_720x480P) | ||
563 | vid = PS3AV_CMD_VIDEO_VID_480P; | ||
564 | else | ||
565 | vid = -1; | ||
566 | } | ||
567 | return vid; | ||
568 | } | ||
569 | |||
570 | static int ps3av_hdmi_get_vid(struct ps3av_info_monitor *info) | ||
571 | { | ||
572 | u32 res_50, res_60; | ||
573 | int vid = -1; | ||
574 | |||
575 | if (info->monitor_type != PS3AV_MONITOR_TYPE_HDMI) | ||
576 | return -1; | ||
577 | |||
578 | /* check native resolution */ | ||
579 | res_50 = info->res_50.native & PS3AV_RES_MASK_50; | ||
580 | res_60 = info->res_60.native & PS3AV_RES_MASK_60; | ||
581 | if (res_50 || res_60) { | ||
582 | vid = ps3av_resbit2vid(res_50, res_60); | ||
583 | return vid; | ||
584 | } | ||
585 | |||
586 | /* check resolution */ | ||
587 | res_50 = info->res_50.res_bits & PS3AV_RES_MASK_50; | ||
588 | res_60 = info->res_60.res_bits & PS3AV_RES_MASK_60; | ||
589 | if (res_50 || res_60) { | ||
590 | vid = ps3av_resbit2vid(res_50, res_60); | ||
591 | return vid; | ||
592 | } | ||
593 | |||
594 | if (ps3av.region & PS3AV_REGION_60) | ||
595 | vid = PS3AV_DEFAULT_HDMI_VID_REG_60; | ||
596 | else | ||
597 | vid = PS3AV_DEFAULT_HDMI_VID_REG_50; | ||
598 | return vid; | ||
599 | } | ||
600 | |||
601 | static int ps3av_auto_videomode(struct ps3av_pkt_av_get_hw_conf *av_hw_conf, | ||
602 | int boot) | ||
603 | { | ||
604 | int i, res, vid = -1, dvi = 0, rgb = 0; | ||
605 | struct ps3av_pkt_av_get_monitor_info monitor_info; | ||
606 | struct ps3av_info_monitor *info; | ||
607 | |||
608 | /* get vid for hdmi */ | ||
609 | for (i = 0; i < av_hw_conf->num_of_hdmi; i++) { | ||
610 | res = ps3av_cmd_video_get_monitor_info(&monitor_info, | ||
611 | PS3AV_CMD_AVPORT_HDMI_0 + | ||
612 | i); | ||
613 | if (res < 0) | ||
614 | return -1; | ||
615 | |||
616 | ps3av_cmd_av_monitor_info_dump(&monitor_info); | ||
617 | info = &monitor_info.info; | ||
618 | /* check DVI */ | ||
619 | if (info->monitor_type == PS3AV_MONITOR_TYPE_DVI) { | ||
620 | dvi = PS3AV_MODE_DVI; | ||
621 | break; | ||
622 | } | ||
623 | /* check HDMI */ | ||
624 | vid = ps3av_hdmi_get_vid(info); | ||
625 | if (vid != -1) { | ||
626 | /* got valid vid */ | ||
627 | break; | ||
628 | } | ||
629 | } | ||
630 | |||
631 | if (dvi) { | ||
632 | /* DVI mode */ | ||
633 | vid = PS3AV_DEFAULT_DVI_VID; | ||
634 | } else if (vid == -1) { | ||
635 | /* no HDMI interface or HDMI is off */ | ||
636 | if (ps3av.region & PS3AV_REGION_60) | ||
637 | vid = PS3AV_DEFAULT_AVMULTI_VID_REG_60; | ||
638 | else | ||
639 | vid = PS3AV_DEFAULT_AVMULTI_VID_REG_50; | ||
640 | if (ps3av.region & PS3AV_REGION_RGB) | ||
641 | rgb = PS3AV_MODE_RGB; | ||
642 | } else if (boot) { | ||
643 | /* HDMI: using DEFAULT HDMI_VID while booting up */ | ||
644 | info = &monitor_info.info; | ||
645 | if (ps3av.region & PS3AV_REGION_60) { | ||
646 | if (info->res_60.res_bits & PS3AV_RESBIT_720x480P) | ||
647 | vid = PS3AV_DEFAULT_HDMI_VID_REG_60; | ||
648 | else if (info->res_50.res_bits & PS3AV_RESBIT_720x576P) | ||
649 | vid = PS3AV_DEFAULT_HDMI_VID_REG_50; | ||
650 | else { | ||
651 | /* default */ | ||
652 | vid = PS3AV_DEFAULT_HDMI_VID_REG_60; | ||
653 | } | ||
654 | } else { | ||
655 | if (info->res_50.res_bits & PS3AV_RESBIT_720x576P) | ||
656 | vid = PS3AV_DEFAULT_HDMI_VID_REG_50; | ||
657 | else if (info->res_60.res_bits & PS3AV_RESBIT_720x480P) | ||
658 | vid = PS3AV_DEFAULT_HDMI_VID_REG_60; | ||
659 | else { | ||
660 | /* default */ | ||
661 | vid = PS3AV_DEFAULT_HDMI_VID_REG_50; | ||
662 | } | ||
663 | } | ||
664 | } | ||
665 | |||
666 | return (ps3av_vid2table_id(vid) | dvi | rgb); | ||
667 | } | ||
668 | |||
669 | static int ps3av_get_hw_conf(struct ps3av *ps3av) | ||
670 | { | ||
671 | int i, j, k, res; | ||
672 | |||
673 | /* get av_hw_conf */ | ||
674 | res = ps3av_cmd_av_get_hw_conf(&ps3av->av_hw_conf); | ||
675 | if (res < 0) | ||
676 | return -1; | ||
677 | |||
678 | ps3av_cmd_av_hw_conf_dump(&ps3av->av_hw_conf); | ||
679 | |||
680 | for (i = 0; i < PS3AV_HEAD_MAX; i++) | ||
681 | ps3av->head[i] = PS3AV_CMD_VIDEO_HEAD_A + i; | ||
682 | for (i = 0; i < PS3AV_OPT_PORT_MAX; i++) | ||
683 | ps3av->opt_port[i] = PS3AV_CMD_AVPORT_SPDIF_0 + i; | ||
684 | for (i = 0; i < ps3av->av_hw_conf.num_of_hdmi; i++) | ||
685 | ps3av->av_port[i] = PS3AV_CMD_AVPORT_HDMI_0 + i; | ||
686 | for (j = 0; j < ps3av->av_hw_conf.num_of_avmulti; j++) | ||
687 | ps3av->av_port[i + j] = PS3AV_CMD_AVPORT_AVMULTI_0 + j; | ||
688 | for (k = 0; k < ps3av->av_hw_conf.num_of_spdif; k++) | ||
689 | ps3av->av_port[i + j + k] = PS3AV_CMD_AVPORT_SPDIF_0 + k; | ||
690 | |||
691 | /* set all audio port */ | ||
692 | ps3av->audio_port = PS3AV_CMD_AUDIO_PORT_HDMI_0 | ||
693 | | PS3AV_CMD_AUDIO_PORT_HDMI_1 | ||
694 | | PS3AV_CMD_AUDIO_PORT_AVMULTI_0 | ||
695 | | PS3AV_CMD_AUDIO_PORT_SPDIF_0 | PS3AV_CMD_AUDIO_PORT_SPDIF_1; | ||
696 | |||
697 | return 0; | ||
698 | } | ||
699 | |||
700 | /* set mode using id */ | ||
701 | int ps3av_set_video_mode(u32 id, int boot) | ||
702 | { | ||
703 | int size; | ||
704 | u32 option; | ||
705 | |||
706 | size = ARRAY_SIZE(video_mode_table); | ||
707 | if ((id & PS3AV_MODE_MASK) > size - 1 || id < 0) { | ||
708 | dev_dbg(&ps3av_dev.core, "%s: error id :%d\n", __FUNCTION__, | ||
709 | id); | ||
710 | return -EINVAL; | ||
711 | } | ||
712 | |||
713 | /* auto mode */ | ||
714 | option = id & ~PS3AV_MODE_MASK; | ||
715 | if ((id & PS3AV_MODE_MASK) == 0) { | ||
716 | id = ps3av_auto_videomode(&ps3av.av_hw_conf, boot); | ||
717 | if (id < 1) { | ||
718 | printk(KERN_ERR "%s: invalid id :%d\n", __FUNCTION__, | ||
719 | id); | ||
720 | return -EINVAL; | ||
721 | } | ||
722 | id |= option; | ||
723 | } | ||
724 | |||
725 | /* set videomode */ | ||
726 | down(&ps3av.pong); | ||
727 | ps3av.ps3av_mode_old = ps3av.ps3av_mode; | ||
728 | ps3av.ps3av_mode = id; | ||
729 | if (ps3av_set_videomode()) | ||
730 | ps3av.ps3av_mode = ps3av.ps3av_mode_old; | ||
731 | |||
732 | return 0; | ||
733 | } | ||
734 | |||
735 | EXPORT_SYMBOL_GPL(ps3av_set_video_mode); | ||
736 | |||
737 | int ps3av_set_mode(u32 id, int boot) | ||
738 | { | ||
739 | int res; | ||
740 | |||
741 | res = ps3av_set_video_mode(id, boot); | ||
742 | if (res) | ||
743 | return res; | ||
744 | |||
745 | res = ps3av_set_audio_mode(PS3AV_CMD_AUDIO_NUM_OF_CH_2, | ||
746 | PS3AV_CMD_AUDIO_FS_48K, | ||
747 | PS3AV_CMD_AUDIO_WORD_BITS_16, | ||
748 | PS3AV_CMD_AUDIO_FORMAT_PCM, | ||
749 | PS3AV_CMD_AUDIO_SOURCE_SERIAL); | ||
750 | if (res) | ||
751 | return res; | ||
752 | |||
753 | return 0; | ||
754 | } | ||
755 | |||
756 | EXPORT_SYMBOL_GPL(ps3av_set_mode); | ||
757 | |||
758 | int ps3av_get_mode(void) | ||
759 | { | ||
760 | return ps3av.ps3av_mode; | ||
761 | } | ||
762 | |||
763 | EXPORT_SYMBOL_GPL(ps3av_get_mode); | ||
764 | |||
765 | int ps3av_get_scanmode(int id) | ||
766 | { | ||
767 | int size; | ||
768 | |||
769 | id = id & PS3AV_MODE_MASK; | ||
770 | size = ARRAY_SIZE(video_mode_table); | ||
771 | if (id > size - 1 || id < 0) { | ||
772 | printk(KERN_ERR "%s: invalid mode %d\n", __FUNCTION__, id); | ||
773 | return -EINVAL; | ||
774 | } | ||
775 | return video_mode_table[id].interlace; | ||
776 | } | ||
777 | |||
778 | EXPORT_SYMBOL_GPL(ps3av_get_scanmode); | ||
779 | |||
780 | int ps3av_get_refresh_rate(int id) | ||
781 | { | ||
782 | int size; | ||
783 | |||
784 | id = id & PS3AV_MODE_MASK; | ||
785 | size = ARRAY_SIZE(video_mode_table); | ||
786 | if (id > size - 1 || id < 0) { | ||
787 | printk(KERN_ERR "%s: invalid mode %d\n", __FUNCTION__, id); | ||
788 | return -EINVAL; | ||
789 | } | ||
790 | return video_mode_table[id].freq; | ||
791 | } | ||
792 | |||
793 | EXPORT_SYMBOL_GPL(ps3av_get_refresh_rate); | ||
794 | |||
795 | /* get resolution by video_mode */ | ||
796 | int ps3av_video_mode2res(u32 id, u32 *xres, u32 *yres) | ||
797 | { | ||
798 | int size; | ||
799 | |||
800 | id = id & PS3AV_MODE_MASK; | ||
801 | size = ARRAY_SIZE(video_mode_table); | ||
802 | if (id > size - 1 || id < 0) { | ||
803 | printk(KERN_ERR "%s: invalid mode %d\n", __FUNCTION__, id); | ||
804 | return -EINVAL; | ||
805 | } | ||
806 | *xres = video_mode_table[id].x; | ||
807 | *yres = video_mode_table[id].y; | ||
808 | return 0; | ||
809 | } | ||
810 | |||
811 | EXPORT_SYMBOL_GPL(ps3av_video_mode2res); | ||
812 | |||
813 | /* mute */ | ||
814 | int ps3av_video_mute(int mute) | ||
815 | { | ||
816 | return ps3av_set_av_video_mute(mute ? PS3AV_CMD_MUTE_ON | ||
817 | : PS3AV_CMD_MUTE_OFF); | ||
818 | } | ||
819 | |||
820 | EXPORT_SYMBOL_GPL(ps3av_video_mute); | ||
821 | |||
822 | int ps3av_audio_mute(int mute) | ||
823 | { | ||
824 | return ps3av_set_audio_mute(mute ? PS3AV_CMD_MUTE_ON | ||
825 | : PS3AV_CMD_MUTE_OFF); | ||
826 | } | ||
827 | |||
828 | EXPORT_SYMBOL_GPL(ps3av_audio_mute); | ||
829 | |||
830 | int ps3av_dev_open(void) | ||
831 | { | ||
832 | int status = 0; | ||
833 | |||
834 | mutex_lock(&ps3av.mutex); | ||
835 | if (!ps3av.open_count++) { | ||
836 | status = lv1_gpu_open(0); | ||
837 | if (status) { | ||
838 | printk(KERN_ERR "%s: lv1_gpu_open failed %d\n", | ||
839 | __FUNCTION__, status); | ||
840 | ps3av.open_count--; | ||
841 | } | ||
842 | } | ||
843 | mutex_unlock(&ps3av.mutex); | ||
844 | |||
845 | return status; | ||
846 | } | ||
847 | |||
848 | EXPORT_SYMBOL_GPL(ps3av_dev_open); | ||
849 | |||
850 | int ps3av_dev_close(void) | ||
851 | { | ||
852 | int status = 0; | ||
853 | |||
854 | mutex_lock(&ps3av.mutex); | ||
855 | if (ps3av.open_count <= 0) { | ||
856 | printk(KERN_ERR "%s: GPU already closed\n", __FUNCTION__); | ||
857 | status = -1; | ||
858 | } else if (!--ps3av.open_count) { | ||
859 | status = lv1_gpu_close(); | ||
860 | if (status) | ||
861 | printk(KERN_WARNING "%s: lv1_gpu_close failed %d\n", | ||
862 | __FUNCTION__, status); | ||
863 | } | ||
864 | mutex_unlock(&ps3av.mutex); | ||
865 | |||
866 | return status; | ||
867 | } | ||
868 | |||
869 | EXPORT_SYMBOL_GPL(ps3av_dev_close); | ||
870 | |||
871 | static int ps3av_probe(struct ps3_vuart_port_device *dev) | ||
872 | { | ||
873 | int res; | ||
874 | u32 id; | ||
875 | |||
876 | dev_dbg(&ps3av_dev.core, "init ...\n"); | ||
877 | dev_dbg(&ps3av_dev.core, " timeout=%d\n", timeout); | ||
878 | |||
879 | memset(&ps3av, 0, sizeof(ps3av)); | ||
880 | |||
881 | init_MUTEX(&ps3av.sem); | ||
882 | init_MUTEX_LOCKED(&ps3av.ping); | ||
883 | init_MUTEX(&ps3av.pong); | ||
884 | mutex_init(&ps3av.mutex); | ||
885 | ps3av.ps3av_mode = 0; | ||
886 | ps3av.dev = dev; | ||
887 | kernel_thread(ps3avd, &ps3av, CLONE_KERNEL); | ||
888 | |||
889 | ps3av.available = 1; | ||
890 | switch (ps3_os_area_get_av_multi_out()) { | ||
891 | case PS3_PARAM_AV_MULTI_OUT_NTSC: | ||
892 | ps3av.region = PS3AV_REGION_60; | ||
893 | break; | ||
894 | case PS3_PARAM_AV_MULTI_OUT_PAL_YCBCR: | ||
895 | case PS3_PARAM_AV_MULTI_OUT_SECAM: | ||
896 | ps3av.region = PS3AV_REGION_50; | ||
897 | break; | ||
898 | case PS3_PARAM_AV_MULTI_OUT_PAL_RGB: | ||
899 | ps3av.region = PS3AV_REGION_50 | PS3AV_REGION_RGB; | ||
900 | break; | ||
901 | default: | ||
902 | ps3av.region = PS3AV_REGION_60; | ||
903 | break; | ||
904 | } | ||
905 | |||
906 | /* init avsetting modules */ | ||
907 | res = ps3av_cmd_init(); | ||
908 | if (res < 0) | ||
909 | printk(KERN_ERR "%s: ps3av_cmd_init failed %d\n", __FUNCTION__, | ||
910 | res); | ||
911 | |||
912 | ps3av_get_hw_conf(&ps3av); | ||
913 | id = ps3av_auto_videomode(&ps3av.av_hw_conf, 1); | ||
914 | mutex_lock(&ps3av.mutex); | ||
915 | ps3av.ps3av_mode = id; | ||
916 | mutex_unlock(&ps3av.mutex); | ||
917 | |||
918 | dev_dbg(&ps3av_dev.core, "init...done\n"); | ||
919 | |||
920 | return 0; | ||
921 | } | ||
922 | |||
923 | static int ps3av_remove(struct ps3_vuart_port_device *dev) | ||
924 | { | ||
925 | if (ps3av.available) { | ||
926 | ps3av_cmd_fin(); | ||
927 | ps3av.available = 0; | ||
928 | } | ||
929 | |||
930 | return 0; | ||
931 | } | ||
932 | |||
933 | static void ps3av_shutdown(struct ps3_vuart_port_device *dev) | ||
934 | { | ||
935 | ps3av_remove(dev); | ||
936 | } | ||
937 | |||
938 | static struct ps3_vuart_port_driver ps3av_driver = { | ||
939 | .match_id = PS3_MATCH_ID_AV_SETTINGS, | ||
940 | .core = { | ||
941 | .name = "ps3_av", | ||
942 | }, | ||
943 | .probe = ps3av_probe, | ||
944 | .remove = ps3av_remove, | ||
945 | .shutdown = ps3av_shutdown, | ||
946 | }; | ||
947 | |||
948 | static int ps3av_module_init(void) | ||
949 | { | ||
950 | int error = ps3_vuart_port_driver_register(&ps3av_driver); | ||
951 | if (error) { | ||
952 | printk(KERN_ERR | ||
953 | "%s: ps3_vuart_port_driver_register failed %d\n", | ||
954 | __FUNCTION__, error); | ||
955 | return error; | ||
956 | } | ||
957 | |||
958 | error = ps3_vuart_port_device_register(&ps3av_dev); | ||
959 | if (error) | ||
960 | printk(KERN_ERR | ||
961 | "%s: ps3_vuart_port_device_register failed %d\n", | ||
962 | __FUNCTION__, error); | ||
963 | |||
964 | return error; | ||
965 | } | ||
966 | |||
967 | static void __exit ps3av_module_exit(void) | ||
968 | { | ||
969 | device_unregister(&ps3av_dev.core); | ||
970 | ps3_vuart_port_driver_unregister(&ps3av_driver); | ||
971 | } | ||
972 | |||
973 | subsys_initcall(ps3av_module_init); | ||
974 | module_exit(ps3av_module_exit); | ||
diff --git a/drivers/ps3/ps3av_cmd.c b/drivers/ps3/ps3av_cmd.c new file mode 100644 index 000000000000..21c97c80aa2e --- /dev/null +++ b/drivers/ps3/ps3av_cmd.c | |||
@@ -0,0 +1,1020 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006 Sony Computer Entertainment Inc. | ||
3 | * Copyright 2006, 2007 Sony Corporation | ||
4 | * | ||
5 | * AV backend support for PS3 | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published | ||
9 | * by the Free Software Foundation; version 2 of the License. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, but | ||
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
14 | * General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along | ||
17 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
18 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | ||
19 | */ | ||
20 | |||
21 | #include <linux/module.h> | ||
22 | #include <linux/kernel.h> | ||
23 | #include <linux/delay.h> | ||
24 | #include <asm/ps3av.h> | ||
25 | #include <asm/ps3fb.h> | ||
26 | #include <asm/ps3.h> | ||
27 | |||
28 | #include "vuart.h" | ||
29 | |||
30 | static const struct video_fmt { | ||
31 | u32 format; | ||
32 | u32 order; | ||
33 | } ps3av_video_fmt_table[] = { | ||
34 | { PS3AV_CMD_VIDEO_FORMAT_ARGB_8BIT, PS3AV_CMD_VIDEO_ORDER_RGB }, | ||
35 | { PS3AV_CMD_VIDEO_FORMAT_ARGB_8BIT, PS3AV_CMD_VIDEO_ORDER_BGR }, | ||
36 | }; | ||
37 | |||
38 | static const struct { | ||
39 | int cs; | ||
40 | u32 av; | ||
41 | u32 bl; | ||
42 | } ps3av_cs_video2av_table[] = { | ||
43 | { | ||
44 | .cs = PS3AV_CMD_VIDEO_CS_RGB_8, | ||
45 | .av = PS3AV_CMD_AV_CS_RGB_8, | ||
46 | .bl = PS3AV_CMD_AV_CS_8 | ||
47 | }, { | ||
48 | .cs = PS3AV_CMD_VIDEO_CS_RGB_10, | ||
49 | .av = PS3AV_CMD_AV_CS_RGB_8, | ||
50 | .bl = PS3AV_CMD_AV_CS_8 | ||
51 | }, { | ||
52 | .cs = PS3AV_CMD_VIDEO_CS_RGB_12, | ||
53 | .av = PS3AV_CMD_AV_CS_RGB_8, | ||
54 | .bl = PS3AV_CMD_AV_CS_8 | ||
55 | }, { | ||
56 | .cs = PS3AV_CMD_VIDEO_CS_YUV444_8, | ||
57 | .av = PS3AV_CMD_AV_CS_YUV444_8, | ||
58 | .bl = PS3AV_CMD_AV_CS_8 | ||
59 | }, { | ||
60 | .cs = PS3AV_CMD_VIDEO_CS_YUV444_10, | ||
61 | .av = PS3AV_CMD_AV_CS_YUV444_8, | ||
62 | .bl = PS3AV_CMD_AV_CS_10 | ||
63 | }, { | ||
64 | .cs = PS3AV_CMD_VIDEO_CS_YUV444_12, | ||
65 | .av = PS3AV_CMD_AV_CS_YUV444_8, | ||
66 | .bl = PS3AV_CMD_AV_CS_10 | ||
67 | }, { | ||
68 | .cs = PS3AV_CMD_VIDEO_CS_YUV422_8, | ||
69 | .av = PS3AV_CMD_AV_CS_YUV422_8, | ||
70 | .bl = PS3AV_CMD_AV_CS_10 | ||
71 | }, { | ||
72 | .cs = PS3AV_CMD_VIDEO_CS_YUV422_10, | ||
73 | .av = PS3AV_CMD_AV_CS_YUV422_8, | ||
74 | .bl = PS3AV_CMD_AV_CS_10 | ||
75 | }, { | ||
76 | .cs = PS3AV_CMD_VIDEO_CS_YUV422_12, | ||
77 | .av = PS3AV_CMD_AV_CS_YUV422_8, | ||
78 | .bl = PS3AV_CMD_AV_CS_12 | ||
79 | }, { | ||
80 | .cs = PS3AV_CMD_VIDEO_CS_XVYCC_8, | ||
81 | .av = PS3AV_CMD_AV_CS_XVYCC_8, | ||
82 | .bl = PS3AV_CMD_AV_CS_12 | ||
83 | }, { | ||
84 | .cs = PS3AV_CMD_VIDEO_CS_XVYCC_10, | ||
85 | .av = PS3AV_CMD_AV_CS_XVYCC_8, | ||
86 | .bl = PS3AV_CMD_AV_CS_12 | ||
87 | }, { | ||
88 | .cs = PS3AV_CMD_VIDEO_CS_XVYCC_12, | ||
89 | .av = PS3AV_CMD_AV_CS_XVYCC_8, | ||
90 | .bl = PS3AV_CMD_AV_CS_12 | ||
91 | } | ||
92 | }; | ||
93 | |||
94 | static u32 ps3av_cs_video2av(int cs) | ||
95 | { | ||
96 | unsigned int i; | ||
97 | |||
98 | for (i = 0; i < ARRAY_SIZE(ps3av_cs_video2av_table); i++) | ||
99 | if (ps3av_cs_video2av_table[i].cs == cs) | ||
100 | return ps3av_cs_video2av_table[i].av; | ||
101 | |||
102 | return PS3AV_CMD_AV_CS_RGB_8; | ||
103 | } | ||
104 | |||
105 | static u32 ps3av_cs_video2av_bitlen(int cs) | ||
106 | { | ||
107 | unsigned int i; | ||
108 | |||
109 | for (i = 0; i < ARRAY_SIZE(ps3av_cs_video2av_table); i++) | ||
110 | if (ps3av_cs_video2av_table[i].cs == cs) | ||
111 | return ps3av_cs_video2av_table[i].bl; | ||
112 | |||
113 | return PS3AV_CMD_AV_CS_8; | ||
114 | } | ||
115 | |||
116 | static const struct { | ||
117 | int vid; | ||
118 | u32 av; | ||
119 | } ps3av_vid_video2av_table[] = { | ||
120 | { PS3AV_CMD_VIDEO_VID_480I, PS3AV_CMD_AV_VID_480I }, | ||
121 | { PS3AV_CMD_VIDEO_VID_480P, PS3AV_CMD_AV_VID_480P }, | ||
122 | { PS3AV_CMD_VIDEO_VID_576I, PS3AV_CMD_AV_VID_576I }, | ||
123 | { PS3AV_CMD_VIDEO_VID_576P, PS3AV_CMD_AV_VID_576P }, | ||
124 | { PS3AV_CMD_VIDEO_VID_1080I_60HZ, PS3AV_CMD_AV_VID_1080I_60HZ }, | ||
125 | { PS3AV_CMD_VIDEO_VID_720P_60HZ, PS3AV_CMD_AV_VID_720P_60HZ }, | ||
126 | { PS3AV_CMD_VIDEO_VID_1080P_60HZ, PS3AV_CMD_AV_VID_1080P_60HZ }, | ||
127 | { PS3AV_CMD_VIDEO_VID_1080I_50HZ, PS3AV_CMD_AV_VID_1080I_50HZ }, | ||
128 | { PS3AV_CMD_VIDEO_VID_720P_50HZ, PS3AV_CMD_AV_VID_720P_50HZ }, | ||
129 | { PS3AV_CMD_VIDEO_VID_1080P_50HZ, PS3AV_CMD_AV_VID_1080P_50HZ }, | ||
130 | { PS3AV_CMD_VIDEO_VID_WXGA, PS3AV_CMD_AV_VID_WXGA }, | ||
131 | { PS3AV_CMD_VIDEO_VID_SXGA, PS3AV_CMD_AV_VID_SXGA }, | ||
132 | { PS3AV_CMD_VIDEO_VID_WUXGA, PS3AV_CMD_AV_VID_WUXGA } | ||
133 | }; | ||
134 | |||
135 | static u32 ps3av_vid_video2av(int vid) | ||
136 | { | ||
137 | unsigned int i; | ||
138 | |||
139 | for (i = 0; i < ARRAY_SIZE(ps3av_vid_video2av_table); i++) | ||
140 | if (ps3av_vid_video2av_table[i].vid == vid) | ||
141 | return ps3av_vid_video2av_table[i].av; | ||
142 | |||
143 | return PS3AV_CMD_AV_VID_480P; | ||
144 | } | ||
145 | |||
146 | int ps3av_cmd_init(void) | ||
147 | { | ||
148 | int res; | ||
149 | struct ps3av_pkt_av_init av_init; | ||
150 | struct ps3av_pkt_video_init video_init; | ||
151 | struct ps3av_pkt_audio_init audio_init; | ||
152 | |||
153 | /* video init */ | ||
154 | memset(&video_init, 0, sizeof(video_init)); | ||
155 | |||
156 | res = ps3av_do_pkt(PS3AV_CID_VIDEO_INIT, sizeof(video_init.send_hdr), | ||
157 | sizeof(video_init), &video_init.send_hdr); | ||
158 | if (res < 0) | ||
159 | return res; | ||
160 | |||
161 | res = get_status(&video_init); | ||
162 | if (res) { | ||
163 | printk(KERN_ERR "PS3AV_CID_VIDEO_INIT: failed %x\n", res); | ||
164 | return res; | ||
165 | } | ||
166 | |||
167 | /* audio init */ | ||
168 | memset(&audio_init, 0, sizeof(audio_init)); | ||
169 | |||
170 | res = ps3av_do_pkt(PS3AV_CID_AUDIO_INIT, sizeof(audio_init.send_hdr), | ||
171 | sizeof(audio_init), &audio_init.send_hdr); | ||
172 | if (res < 0) | ||
173 | return res; | ||
174 | |||
175 | res = get_status(&audio_init); | ||
176 | if (res) { | ||
177 | printk(KERN_ERR "PS3AV_CID_AUDIO_INIT: failed %x\n", res); | ||
178 | return res; | ||
179 | } | ||
180 | |||
181 | /* av init */ | ||
182 | memset(&av_init, 0, sizeof(av_init)); | ||
183 | av_init.event_bit = 0; | ||
184 | |||
185 | res = ps3av_do_pkt(PS3AV_CID_AV_INIT, sizeof(av_init), sizeof(av_init), | ||
186 | &av_init.send_hdr); | ||
187 | if (res < 0) | ||
188 | return res; | ||
189 | |||
190 | res = get_status(&av_init); | ||
191 | if (res) | ||
192 | printk(KERN_ERR "PS3AV_CID_AV_INIT: failed %x\n", res); | ||
193 | |||
194 | return res; | ||
195 | } | ||
196 | |||
197 | int ps3av_cmd_fin(void) | ||
198 | { | ||
199 | int res; | ||
200 | struct ps3av_pkt_av_fin av_fin; | ||
201 | |||
202 | memset(&av_fin, 0, sizeof(av_fin)); | ||
203 | |||
204 | res = ps3av_do_pkt(PS3AV_CID_AV_FIN, sizeof(av_fin.send_hdr), | ||
205 | sizeof(av_fin), &av_fin.send_hdr); | ||
206 | if (res < 0) | ||
207 | return res; | ||
208 | |||
209 | res = get_status(&av_fin); | ||
210 | if (res) | ||
211 | printk(KERN_ERR "PS3AV_CID_AV_FIN: failed %x\n", res); | ||
212 | |||
213 | return res; | ||
214 | } | ||
215 | |||
216 | int ps3av_cmd_av_video_mute(int num_of_port, u32 *port, u32 mute) | ||
217 | { | ||
218 | int i, send_len, res; | ||
219 | struct ps3av_pkt_av_video_mute av_video_mute; | ||
220 | |||
221 | if (num_of_port > PS3AV_MUTE_PORT_MAX) | ||
222 | return -EINVAL; | ||
223 | |||
224 | memset(&av_video_mute, 0, sizeof(av_video_mute)); | ||
225 | for (i = 0; i < num_of_port; i++) { | ||
226 | av_video_mute.mute[i].avport = port[i]; | ||
227 | av_video_mute.mute[i].mute = mute; | ||
228 | } | ||
229 | |||
230 | send_len = sizeof(av_video_mute.send_hdr) + | ||
231 | sizeof(struct ps3av_av_mute) * num_of_port; | ||
232 | res = ps3av_do_pkt(PS3AV_CID_AV_VIDEO_MUTE, send_len, | ||
233 | sizeof(av_video_mute), &av_video_mute.send_hdr); | ||
234 | if (res < 0) | ||
235 | return res; | ||
236 | |||
237 | res = get_status(&av_video_mute); | ||
238 | if (res) | ||
239 | printk(KERN_ERR "PS3AV_CID_AV_VIDEO_MUTE: failed %x\n", res); | ||
240 | |||
241 | return res; | ||
242 | } | ||
243 | |||
244 | int ps3av_cmd_av_video_disable_sig(u32 port) | ||
245 | { | ||
246 | int res; | ||
247 | struct ps3av_pkt_av_video_disable_sig av_video_sig; | ||
248 | |||
249 | memset(&av_video_sig, 0, sizeof(av_video_sig)); | ||
250 | av_video_sig.avport = port; | ||
251 | |||
252 | res = ps3av_do_pkt(PS3AV_CID_AV_VIDEO_DISABLE_SIG, | ||
253 | sizeof(av_video_sig), sizeof(av_video_sig), | ||
254 | &av_video_sig.send_hdr); | ||
255 | if (res < 0) | ||
256 | return res; | ||
257 | |||
258 | res = get_status(&av_video_sig); | ||
259 | if (res) | ||
260 | printk(KERN_ERR | ||
261 | "PS3AV_CID_AV_VIDEO_DISABLE_SIG: failed %x port:%x\n", | ||
262 | res, port); | ||
263 | |||
264 | return res; | ||
265 | } | ||
266 | |||
267 | int ps3av_cmd_av_tv_mute(u32 avport, u32 mute) | ||
268 | { | ||
269 | int res; | ||
270 | struct ps3av_pkt_av_tv_mute tv_mute; | ||
271 | |||
272 | memset(&tv_mute, 0, sizeof(tv_mute)); | ||
273 | tv_mute.avport = avport; | ||
274 | tv_mute.mute = mute; | ||
275 | |||
276 | res = ps3av_do_pkt(PS3AV_CID_AV_TV_MUTE, sizeof(tv_mute), | ||
277 | sizeof(tv_mute), &tv_mute.send_hdr); | ||
278 | if (res < 0) | ||
279 | return res; | ||
280 | |||
281 | res = get_status(&tv_mute); | ||
282 | if (res) | ||
283 | printk(KERN_ERR "PS3AV_CID_AV_TV_MUTE: failed %x port:%x\n", | ||
284 | res, avport); | ||
285 | |||
286 | return res; | ||
287 | } | ||
288 | |||
289 | int ps3av_cmd_enable_event(void) | ||
290 | { | ||
291 | int res; | ||
292 | struct ps3av_pkt_av_event av_event; | ||
293 | |||
294 | memset(&av_event, 0, sizeof(av_event)); | ||
295 | av_event.event_bit = PS3AV_CMD_EVENT_BIT_UNPLUGGED | | ||
296 | PS3AV_CMD_EVENT_BIT_PLUGGED | PS3AV_CMD_EVENT_BIT_HDCP_DONE; | ||
297 | |||
298 | res = ps3av_do_pkt(PS3AV_CID_AV_ENABLE_EVENT, sizeof(av_event), | ||
299 | sizeof(av_event), &av_event.send_hdr); | ||
300 | if (res < 0) | ||
301 | return res; | ||
302 | |||
303 | res = get_status(&av_event); | ||
304 | if (res) | ||
305 | printk(KERN_ERR "PS3AV_CID_AV_ENABLE_EVENT: failed %x\n", res); | ||
306 | |||
307 | return res; | ||
308 | } | ||
309 | |||
310 | int ps3av_cmd_av_hdmi_mode(u8 mode) | ||
311 | { | ||
312 | int res; | ||
313 | struct ps3av_pkt_av_hdmi_mode hdmi_mode; | ||
314 | |||
315 | memset(&hdmi_mode, 0, sizeof(hdmi_mode)); | ||
316 | hdmi_mode.mode = mode; | ||
317 | |||
318 | res = ps3av_do_pkt(PS3AV_CID_AV_HDMI_MODE, sizeof(hdmi_mode), | ||
319 | sizeof(hdmi_mode), &hdmi_mode.send_hdr); | ||
320 | if (res < 0) | ||
321 | return res; | ||
322 | |||
323 | res = get_status(&hdmi_mode); | ||
324 | if (res && res != PS3AV_STATUS_UNSUPPORTED_HDMI_MODE) | ||
325 | printk(KERN_ERR "PS3AV_CID_AV_HDMI_MODE: failed %x\n", res); | ||
326 | |||
327 | return res; | ||
328 | } | ||
329 | |||
330 | u32 ps3av_cmd_set_av_video_cs(void *p, u32 avport, int video_vid, int cs_out, | ||
331 | int aspect, u32 id) | ||
332 | { | ||
333 | struct ps3av_pkt_av_video_cs *av_video_cs; | ||
334 | |||
335 | av_video_cs = (struct ps3av_pkt_av_video_cs *)p; | ||
336 | if (video_vid == -1) | ||
337 | video_vid = PS3AV_CMD_VIDEO_VID_720P_60HZ; | ||
338 | if (cs_out == -1) | ||
339 | cs_out = PS3AV_CMD_VIDEO_CS_YUV444_8; | ||
340 | if (aspect == -1) | ||
341 | aspect = 0; | ||
342 | |||
343 | memset(av_video_cs, 0, sizeof(*av_video_cs)); | ||
344 | ps3av_set_hdr(PS3AV_CID_AV_VIDEO_CS, sizeof(*av_video_cs), | ||
345 | &av_video_cs->send_hdr); | ||
346 | av_video_cs->avport = avport; | ||
347 | /* should be same as video_mode.resolution */ | ||
348 | av_video_cs->av_vid = ps3av_vid_video2av(video_vid); | ||
349 | av_video_cs->av_cs_out = ps3av_cs_video2av(cs_out); | ||
350 | /* should be same as video_mode.video_cs_out */ | ||
351 | av_video_cs->av_cs_in = ps3av_cs_video2av(PS3AV_CMD_VIDEO_CS_RGB_8); | ||
352 | av_video_cs->bitlen_out = ps3av_cs_video2av_bitlen(cs_out); | ||
353 | av_video_cs->aspect = aspect; | ||
354 | if (id & PS3AV_MODE_DITHER) { | ||
355 | av_video_cs->dither = PS3AV_CMD_AV_DITHER_ON | ||
356 | | PS3AV_CMD_AV_DITHER_8BIT; | ||
357 | } else { | ||
358 | /* default off */ | ||
359 | av_video_cs->dither = PS3AV_CMD_AV_DITHER_OFF; | ||
360 | } | ||
361 | |||
362 | return sizeof(*av_video_cs); | ||
363 | } | ||
364 | |||
365 | u32 ps3av_cmd_set_video_mode(void *p, u32 head, int video_vid, int video_fmt, | ||
366 | u32 id) | ||
367 | { | ||
368 | struct ps3av_pkt_video_mode *video_mode; | ||
369 | u32 x, y; | ||
370 | |||
371 | video_mode = (struct ps3av_pkt_video_mode *)p; | ||
372 | if (video_vid == -1) | ||
373 | video_vid = PS3AV_CMD_VIDEO_VID_720P_60HZ; | ||
374 | if (video_fmt == -1) | ||
375 | video_fmt = PS3AV_CMD_VIDEO_FMT_X8R8G8B8; | ||
376 | |||
377 | if (ps3av_video_mode2res(id, &x, &y)) | ||
378 | return 0; | ||
379 | |||
380 | /* video mode */ | ||
381 | memset(video_mode, 0, sizeof(*video_mode)); | ||
382 | ps3av_set_hdr(PS3AV_CID_VIDEO_MODE, sizeof(*video_mode), | ||
383 | &video_mode->send_hdr); | ||
384 | video_mode->video_head = head; | ||
385 | if (video_vid == PS3AV_CMD_VIDEO_VID_480I | ||
386 | && head == PS3AV_CMD_VIDEO_HEAD_B) | ||
387 | video_mode->video_vid = PS3AV_CMD_VIDEO_VID_480I_A; | ||
388 | else | ||
389 | video_mode->video_vid = video_vid; | ||
390 | video_mode->width = (u16) x; | ||
391 | video_mode->height = (u16) y; | ||
392 | video_mode->pitch = video_mode->width * 4; /* line_length */ | ||
393 | video_mode->video_out_format = PS3AV_CMD_VIDEO_OUT_FORMAT_RGB_12BIT; | ||
394 | video_mode->video_format = ps3av_video_fmt_table[video_fmt].format; | ||
395 | video_mode->video_order = ps3av_video_fmt_table[video_fmt].order; | ||
396 | |||
397 | pr_debug("%s: video_mode:vid:%x width:%d height:%d pitch:%d out_format:%d format:%x order:%x\n", | ||
398 | __FUNCTION__, video_vid, video_mode->width, video_mode->height, | ||
399 | video_mode->pitch, video_mode->video_out_format, | ||
400 | video_mode->video_format, video_mode->video_order); | ||
401 | return sizeof(*video_mode); | ||
402 | } | ||
403 | |||
404 | int ps3av_cmd_video_format_black(u32 head, u32 video_fmt, u32 mute) | ||
405 | { | ||
406 | int res; | ||
407 | struct ps3av_pkt_video_format video_format; | ||
408 | |||
409 | memset(&video_format, 0, sizeof(video_format)); | ||
410 | video_format.video_head = head; | ||
411 | if (mute != PS3AV_CMD_MUTE_OFF) | ||
412 | video_format.video_format = PS3AV_CMD_VIDEO_FORMAT_BLACK; | ||
413 | else | ||
414 | video_format.video_format = | ||
415 | ps3av_video_fmt_table[video_fmt].format; | ||
416 | video_format.video_order = ps3av_video_fmt_table[video_fmt].order; | ||
417 | |||
418 | res = ps3av_do_pkt(PS3AV_CID_VIDEO_FORMAT, sizeof(video_format), | ||
419 | sizeof(video_format), &video_format.send_hdr); | ||
420 | if (res < 0) | ||
421 | return res; | ||
422 | |||
423 | res = get_status(&video_format); | ||
424 | if (res) | ||
425 | printk(KERN_ERR "PS3AV_CID_VIDEO_FORMAT: failed %x\n", res); | ||
426 | |||
427 | return res; | ||
428 | } | ||
429 | |||
430 | |||
431 | int ps3av_cmd_av_audio_mute(int num_of_port, u32 *port, u32 mute) | ||
432 | { | ||
433 | int i, res; | ||
434 | struct ps3av_pkt_av_audio_mute av_audio_mute; | ||
435 | |||
436 | if (num_of_port > PS3AV_MUTE_PORT_MAX) | ||
437 | return -EINVAL; | ||
438 | |||
439 | /* audio mute */ | ||
440 | memset(&av_audio_mute, 0, sizeof(av_audio_mute)); | ||
441 | for (i = 0; i < num_of_port; i++) { | ||
442 | av_audio_mute.mute[i].avport = port[i]; | ||
443 | av_audio_mute.mute[i].mute = mute; | ||
444 | } | ||
445 | |||
446 | res = ps3av_do_pkt(PS3AV_CID_AV_AUDIO_MUTE, | ||
447 | sizeof(av_audio_mute.send_hdr) + | ||
448 | sizeof(struct ps3av_av_mute) * num_of_port, | ||
449 | sizeof(av_audio_mute), &av_audio_mute.send_hdr); | ||
450 | if (res < 0) | ||
451 | return res; | ||
452 | |||
453 | res = get_status(&av_audio_mute); | ||
454 | if (res) | ||
455 | printk(KERN_ERR "PS3AV_CID_AV_AUDIO_MUTE: failed %x\n", res); | ||
456 | |||
457 | return res; | ||
458 | } | ||
459 | |||
460 | static const struct { | ||
461 | u32 fs; | ||
462 | u8 mclk; | ||
463 | } ps3av_cnv_mclk_table[] = { | ||
464 | { PS3AV_CMD_AUDIO_FS_44K, PS3AV_CMD_AV_MCLK_512 }, | ||
465 | { PS3AV_CMD_AUDIO_FS_48K, PS3AV_CMD_AV_MCLK_512 }, | ||
466 | { PS3AV_CMD_AUDIO_FS_88K, PS3AV_CMD_AV_MCLK_256 }, | ||
467 | { PS3AV_CMD_AUDIO_FS_96K, PS3AV_CMD_AV_MCLK_256 }, | ||
468 | { PS3AV_CMD_AUDIO_FS_176K, PS3AV_CMD_AV_MCLK_128 }, | ||
469 | { PS3AV_CMD_AUDIO_FS_192K, PS3AV_CMD_AV_MCLK_128 } | ||
470 | }; | ||
471 | |||
472 | static u8 ps3av_cnv_mclk(u32 fs) | ||
473 | { | ||
474 | unsigned int i; | ||
475 | |||
476 | for (i = 0; i < ARRAY_SIZE(ps3av_cnv_mclk_table); i++) | ||
477 | if (ps3av_cnv_mclk_table[i].fs == fs) | ||
478 | return ps3av_cnv_mclk_table[i].mclk; | ||
479 | |||
480 | printk(KERN_ERR "%s failed, fs:%x\n", __FUNCTION__, fs); | ||
481 | return 0; | ||
482 | } | ||
483 | |||
484 | #define BASE PS3AV_CMD_AUDIO_FS_44K | ||
485 | |||
486 | static const u32 ps3av_ns_table[][5] = { | ||
487 | /* D1, D2, D3, D4, D5 */ | ||
488 | [PS3AV_CMD_AUDIO_FS_44K-BASE] { 6272, 6272, 17836, 17836, 8918 }, | ||
489 | [PS3AV_CMD_AUDIO_FS_48K-BASE] { 6144, 6144, 11648, 11648, 5824 }, | ||
490 | [PS3AV_CMD_AUDIO_FS_88K-BASE] { 12544, 12544, 35672, 35672, 17836 }, | ||
491 | [PS3AV_CMD_AUDIO_FS_96K-BASE] { 12288, 12288, 23296, 23296, 11648 }, | ||
492 | [PS3AV_CMD_AUDIO_FS_176K-BASE] { 25088, 25088, 71344, 71344, 35672 }, | ||
493 | [PS3AV_CMD_AUDIO_FS_192K-BASE] { 24576, 24576, 46592, 46592, 23296 } | ||
494 | }; | ||
495 | |||
496 | static void ps3av_cnv_ns(u8 *ns, u32 fs, u32 video_vid) | ||
497 | { | ||
498 | u32 av_vid, ns_val; | ||
499 | u8 *p = ns; | ||
500 | int d; | ||
501 | |||
502 | d = ns_val = 0; | ||
503 | av_vid = ps3av_vid_video2av(video_vid); | ||
504 | switch (av_vid) { | ||
505 | case PS3AV_CMD_AV_VID_480I: | ||
506 | case PS3AV_CMD_AV_VID_576I: | ||
507 | d = 0; | ||
508 | break; | ||
509 | case PS3AV_CMD_AV_VID_480P: | ||
510 | case PS3AV_CMD_AV_VID_576P: | ||
511 | d = 1; | ||
512 | break; | ||
513 | case PS3AV_CMD_AV_VID_1080I_60HZ: | ||
514 | case PS3AV_CMD_AV_VID_1080I_50HZ: | ||
515 | d = 2; | ||
516 | break; | ||
517 | case PS3AV_CMD_AV_VID_720P_60HZ: | ||
518 | case PS3AV_CMD_AV_VID_720P_50HZ: | ||
519 | d = 3; | ||
520 | break; | ||
521 | case PS3AV_CMD_AV_VID_1080P_60HZ: | ||
522 | case PS3AV_CMD_AV_VID_1080P_50HZ: | ||
523 | case PS3AV_CMD_AV_VID_WXGA: | ||
524 | case PS3AV_CMD_AV_VID_SXGA: | ||
525 | case PS3AV_CMD_AV_VID_WUXGA: | ||
526 | d = 4; | ||
527 | break; | ||
528 | default: | ||
529 | printk(KERN_ERR "%s failed, vid:%x\n", __FUNCTION__, | ||
530 | video_vid); | ||
531 | break; | ||
532 | } | ||
533 | |||
534 | if (fs < PS3AV_CMD_AUDIO_FS_44K || fs > PS3AV_CMD_AUDIO_FS_192K) | ||
535 | printk(KERN_ERR "%s failed, fs:%x\n", __FUNCTION__, fs); | ||
536 | else | ||
537 | ns_val = ps3av_ns_table[PS3AV_CMD_AUDIO_FS_44K-BASE][d]; | ||
538 | |||
539 | *p++ = ns_val & 0x000000FF; | ||
540 | *p++ = (ns_val & 0x0000FF00) >> 8; | ||
541 | *p = (ns_val & 0x00FF0000) >> 16; | ||
542 | } | ||
543 | |||
544 | #undef BASE | ||
545 | |||
546 | static u8 ps3av_cnv_enable(u32 source, u8 *enable) | ||
547 | { | ||
548 | u8 *p, ret = 0; | ||
549 | |||
550 | if (source == PS3AV_CMD_AUDIO_SOURCE_SPDIF) { | ||
551 | ret = 0x03; | ||
552 | } else if (source == PS3AV_CMD_AUDIO_SOURCE_SERIAL) { | ||
553 | p = enable; | ||
554 | ret = ((p[0] << 4) + (p[1] << 5) + (p[2] << 6) + (p[3] << 7)) | | ||
555 | 0x01; | ||
556 | } else | ||
557 | printk(KERN_ERR "%s failed, source:%x\n", __FUNCTION__, | ||
558 | source); | ||
559 | return ret; | ||
560 | } | ||
561 | |||
562 | static u8 ps3av_cnv_fifomap(u8 *map) | ||
563 | { | ||
564 | u8 *p, ret = 0; | ||
565 | |||
566 | p = map; | ||
567 | ret = p[0] + (p[1] << 2) + (p[2] << 4) + (p[3] << 6); | ||
568 | return ret; | ||
569 | } | ||
570 | |||
571 | static u8 ps3av_cnv_inputlen(u32 word_bits) | ||
572 | { | ||
573 | u8 ret = 0; | ||
574 | |||
575 | switch (word_bits) { | ||
576 | case PS3AV_CMD_AUDIO_WORD_BITS_16: | ||
577 | ret = PS3AV_CMD_AV_INPUTLEN_16; | ||
578 | break; | ||
579 | case PS3AV_CMD_AUDIO_WORD_BITS_20: | ||
580 | ret = PS3AV_CMD_AV_INPUTLEN_20; | ||
581 | break; | ||
582 | case PS3AV_CMD_AUDIO_WORD_BITS_24: | ||
583 | ret = PS3AV_CMD_AV_INPUTLEN_24; | ||
584 | break; | ||
585 | default: | ||
586 | printk(KERN_ERR "%s failed, word_bits:%x\n", __FUNCTION__, | ||
587 | word_bits); | ||
588 | break; | ||
589 | } | ||
590 | return ret; | ||
591 | } | ||
592 | |||
593 | static u8 ps3av_cnv_layout(u32 num_of_ch) | ||
594 | { | ||
595 | if (num_of_ch > PS3AV_CMD_AUDIO_NUM_OF_CH_8) { | ||
596 | printk(KERN_ERR "%s failed, num_of_ch:%x\n", __FUNCTION__, | ||
597 | num_of_ch); | ||
598 | return 0; | ||
599 | } | ||
600 | |||
601 | return num_of_ch == PS3AV_CMD_AUDIO_NUM_OF_CH_2 ? 0x0 : 0x1; | ||
602 | } | ||
603 | |||
604 | static void ps3av_cnv_info(struct ps3av_audio_info_frame *info, | ||
605 | const struct ps3av_pkt_audio_mode *mode) | ||
606 | { | ||
607 | info->pb1.cc = mode->audio_num_of_ch + 1; /* CH2:0x01 --- CH8:0x07 */ | ||
608 | info->pb1.ct = 0; | ||
609 | info->pb2.sf = 0; | ||
610 | info->pb2.ss = 0; | ||
611 | |||
612 | info->pb3 = 0; /* check mode->audio_format ?? */ | ||
613 | info->pb4 = mode->audio_layout; | ||
614 | info->pb5.dm = mode->audio_downmix; | ||
615 | info->pb5.lsv = mode->audio_downmix_level; | ||
616 | } | ||
617 | |||
618 | static void ps3av_cnv_chstat(u8 *chstat, u8 *cs_info) | ||
619 | { | ||
620 | memcpy(chstat, cs_info, 5); | ||
621 | } | ||
622 | |||
623 | u32 ps3av_cmd_set_av_audio_param(void *p, u32 port, | ||
624 | const struct ps3av_pkt_audio_mode *audio_mode, | ||
625 | u32 video_vid) | ||
626 | { | ||
627 | struct ps3av_pkt_av_audio_param *param; | ||
628 | |||
629 | param = (struct ps3av_pkt_av_audio_param *)p; | ||
630 | |||
631 | memset(param, 0, sizeof(*param)); | ||
632 | ps3av_set_hdr(PS3AV_CID_AV_AUDIO_PARAM, sizeof(*param), | ||
633 | ¶m->send_hdr); | ||
634 | |||
635 | param->avport = port; | ||
636 | param->mclk = ps3av_cnv_mclk(audio_mode->audio_fs) | 0x80; | ||
637 | ps3av_cnv_ns(param->ns, audio_mode->audio_fs, video_vid); | ||
638 | param->enable = ps3av_cnv_enable(audio_mode->audio_source, | ||
639 | audio_mode->audio_enable); | ||
640 | param->swaplr = 0x09; | ||
641 | param->fifomap = ps3av_cnv_fifomap(audio_mode->audio_map); | ||
642 | param->inputctrl = 0x49; | ||
643 | param->inputlen = ps3av_cnv_inputlen(audio_mode->audio_word_bits); | ||
644 | param->layout = ps3av_cnv_layout(audio_mode->audio_num_of_ch); | ||
645 | ps3av_cnv_info(¶m->info, audio_mode); | ||
646 | ps3av_cnv_chstat(param->chstat, audio_mode->audio_cs_info); | ||
647 | |||
648 | return sizeof(*param); | ||
649 | } | ||
650 | |||
651 | /* default cs val */ | ||
652 | static const u8 ps3av_mode_cs_info[] = { | ||
653 | 0x00, 0x09, 0x00, 0x02, 0x01, 0x00, 0x00, 0x00 | ||
654 | }; | ||
655 | |||
656 | #define CS_44 0x00 | ||
657 | #define CS_48 0x02 | ||
658 | #define CS_88 0x08 | ||
659 | #define CS_96 0x0a | ||
660 | #define CS_176 0x0c | ||
661 | #define CS_192 0x0e | ||
662 | #define CS_MASK 0x0f | ||
663 | #define CS_BIT 0x40 | ||
664 | |||
665 | void ps3av_cmd_set_audio_mode(struct ps3av_pkt_audio_mode *audio, u32 avport, | ||
666 | u32 ch, u32 fs, u32 word_bits, u32 format, | ||
667 | u32 source) | ||
668 | { | ||
669 | int spdif_through, spdif_bitstream; | ||
670 | int i; | ||
671 | |||
672 | if (!(ch | fs | format | word_bits | source)) { | ||
673 | ch = PS3AV_CMD_AUDIO_NUM_OF_CH_2; | ||
674 | fs = PS3AV_CMD_AUDIO_FS_48K; | ||
675 | word_bits = PS3AV_CMD_AUDIO_WORD_BITS_16; | ||
676 | format = PS3AV_CMD_AUDIO_FORMAT_PCM; | ||
677 | source = PS3AV_CMD_AUDIO_SOURCE_SERIAL; | ||
678 | } | ||
679 | spdif_through = spdif_bitstream = 0; /* XXX not supported */ | ||
680 | |||
681 | /* audio mode */ | ||
682 | memset(audio, 0, sizeof(*audio)); | ||
683 | ps3av_set_hdr(PS3AV_CID_AUDIO_MODE, sizeof(*audio), &audio->send_hdr); | ||
684 | |||
685 | audio->avport = (u8) avport; | ||
686 | audio->mask = 0x0FFF; /* XXX set all */ | ||
687 | audio->audio_num_of_ch = ch; | ||
688 | audio->audio_fs = fs; | ||
689 | audio->audio_word_bits = word_bits; | ||
690 | audio->audio_format = format; | ||
691 | audio->audio_source = source; | ||
692 | |||
693 | switch (ch) { | ||
694 | case PS3AV_CMD_AUDIO_NUM_OF_CH_8: | ||
695 | audio->audio_enable[3] = 1; | ||
696 | /* fall through */ | ||
697 | case PS3AV_CMD_AUDIO_NUM_OF_CH_6: | ||
698 | audio->audio_enable[2] = 1; | ||
699 | audio->audio_enable[1] = 1; | ||
700 | /* fall through */ | ||
701 | case PS3AV_CMD_AUDIO_NUM_OF_CH_2: | ||
702 | default: | ||
703 | audio->audio_enable[0] = 1; | ||
704 | } | ||
705 | |||
706 | /* audio swap L/R */ | ||
707 | for (i = 0; i < 4; i++) | ||
708 | audio->audio_swap[i] = PS3AV_CMD_AUDIO_SWAP_0; /* no swap */ | ||
709 | |||
710 | /* audio serial input mapping */ | ||
711 | audio->audio_map[0] = PS3AV_CMD_AUDIO_MAP_OUTPUT_0; | ||
712 | audio->audio_map[1] = PS3AV_CMD_AUDIO_MAP_OUTPUT_1; | ||
713 | audio->audio_map[2] = PS3AV_CMD_AUDIO_MAP_OUTPUT_2; | ||
714 | audio->audio_map[3] = PS3AV_CMD_AUDIO_MAP_OUTPUT_3; | ||
715 | |||
716 | /* audio speaker layout */ | ||
717 | if (avport == PS3AV_CMD_AVPORT_HDMI_0 || | ||
718 | avport == PS3AV_CMD_AVPORT_HDMI_1) { | ||
719 | switch (ch) { | ||
720 | case PS3AV_CMD_AUDIO_NUM_OF_CH_8: | ||
721 | audio->audio_layout = PS3AV_CMD_AUDIO_LAYOUT_8CH; | ||
722 | break; | ||
723 | case PS3AV_CMD_AUDIO_NUM_OF_CH_6: | ||
724 | audio->audio_layout = PS3AV_CMD_AUDIO_LAYOUT_6CH; | ||
725 | break; | ||
726 | case PS3AV_CMD_AUDIO_NUM_OF_CH_2: | ||
727 | default: | ||
728 | audio->audio_layout = PS3AV_CMD_AUDIO_LAYOUT_2CH; | ||
729 | break; | ||
730 | } | ||
731 | } else { | ||
732 | audio->audio_layout = PS3AV_CMD_AUDIO_LAYOUT_2CH; | ||
733 | } | ||
734 | |||
735 | /* audio downmix permission */ | ||
736 | audio->audio_downmix = PS3AV_CMD_AUDIO_DOWNMIX_PERMITTED; | ||
737 | /* audio downmix level shift (0:0dB to 15:15dB) */ | ||
738 | audio->audio_downmix_level = 0; /* 0dB */ | ||
739 | |||
740 | /* set ch status */ | ||
741 | for (i = 0; i < 8; i++) | ||
742 | audio->audio_cs_info[i] = ps3av_mode_cs_info[i]; | ||
743 | |||
744 | switch (fs) { | ||
745 | case PS3AV_CMD_AUDIO_FS_44K: | ||
746 | audio->audio_cs_info[3] &= ~CS_MASK; | ||
747 | audio->audio_cs_info[3] |= CS_44; | ||
748 | break; | ||
749 | case PS3AV_CMD_AUDIO_FS_88K: | ||
750 | audio->audio_cs_info[3] &= ~CS_MASK; | ||
751 | audio->audio_cs_info[3] |= CS_88; | ||
752 | break; | ||
753 | case PS3AV_CMD_AUDIO_FS_96K: | ||
754 | audio->audio_cs_info[3] &= ~CS_MASK; | ||
755 | audio->audio_cs_info[3] |= CS_96; | ||
756 | break; | ||
757 | case PS3AV_CMD_AUDIO_FS_176K: | ||
758 | audio->audio_cs_info[3] &= ~CS_MASK; | ||
759 | audio->audio_cs_info[3] |= CS_176; | ||
760 | break; | ||
761 | case PS3AV_CMD_AUDIO_FS_192K: | ||
762 | audio->audio_cs_info[3] &= ~CS_MASK; | ||
763 | audio->audio_cs_info[3] |= CS_192; | ||
764 | break; | ||
765 | default: | ||
766 | break; | ||
767 | } | ||
768 | |||
769 | /* pass through setting */ | ||
770 | if (spdif_through && | ||
771 | (avport == PS3AV_CMD_AVPORT_SPDIF_0 || | ||
772 | avport == PS3AV_CMD_AVPORT_SPDIF_1)) { | ||
773 | audio->audio_word_bits = PS3AV_CMD_AUDIO_WORD_BITS_16; | ||
774 | audio->audio_source = PS3AV_CMD_AUDIO_SOURCE_SPDIF; | ||
775 | if (spdif_bitstream) { | ||
776 | audio->audio_format = PS3AV_CMD_AUDIO_FORMAT_BITSTREAM; | ||
777 | audio->audio_cs_info[0] |= CS_BIT; | ||
778 | } | ||
779 | } | ||
780 | } | ||
781 | |||
782 | int ps3av_cmd_audio_mode(struct ps3av_pkt_audio_mode *audio_mode) | ||
783 | { | ||
784 | int res; | ||
785 | |||
786 | res = ps3av_do_pkt(PS3AV_CID_AUDIO_MODE, sizeof(*audio_mode), | ||
787 | sizeof(*audio_mode), &audio_mode->send_hdr); | ||
788 | if (res < 0) | ||
789 | return res; | ||
790 | |||
791 | res = get_status(audio_mode); | ||
792 | if (res) | ||
793 | printk(KERN_ERR "PS3AV_CID_AUDIO_MODE: failed %x\n", res); | ||
794 | |||
795 | return res; | ||
796 | } | ||
797 | |||
798 | int ps3av_cmd_audio_mute(int num_of_port, u32 *port, u32 mute) | ||
799 | { | ||
800 | int i, res; | ||
801 | struct ps3av_pkt_audio_mute audio_mute; | ||
802 | |||
803 | if (num_of_port > PS3AV_OPT_PORT_MAX) | ||
804 | return -EINVAL; | ||
805 | |||
806 | /* audio mute */ | ||
807 | memset(&audio_mute, 0, sizeof(audio_mute)); | ||
808 | for (i = 0; i < num_of_port; i++) { | ||
809 | audio_mute.mute[i].avport = port[i]; | ||
810 | audio_mute.mute[i].mute = mute; | ||
811 | } | ||
812 | |||
813 | res = ps3av_do_pkt(PS3AV_CID_AUDIO_MUTE, | ||
814 | sizeof(audio_mute.send_hdr) + | ||
815 | sizeof(struct ps3av_audio_mute) * num_of_port, | ||
816 | sizeof(audio_mute), &audio_mute.send_hdr); | ||
817 | if (res < 0) | ||
818 | return res; | ||
819 | |||
820 | res = get_status(&audio_mute); | ||
821 | if (res) | ||
822 | printk(KERN_ERR "PS3AV_CID_AUDIO_MUTE: failed %x\n", res); | ||
823 | |||
824 | return res; | ||
825 | } | ||
826 | |||
827 | int ps3av_cmd_audio_active(int active, u32 port) | ||
828 | { | ||
829 | int res; | ||
830 | struct ps3av_pkt_audio_active audio_active; | ||
831 | u32 cid; | ||
832 | |||
833 | /* audio active */ | ||
834 | memset(&audio_active, 0, sizeof(audio_active)); | ||
835 | audio_active.audio_port = port; | ||
836 | cid = active ? PS3AV_CID_AUDIO_ACTIVE : PS3AV_CID_AUDIO_INACTIVE; | ||
837 | |||
838 | res = ps3av_do_pkt(cid, sizeof(audio_active), sizeof(audio_active), | ||
839 | &audio_active.send_hdr); | ||
840 | if (res < 0) | ||
841 | return res; | ||
842 | |||
843 | res = get_status(&audio_active); | ||
844 | if (res) | ||
845 | printk(KERN_ERR "PS3AV_CID_AUDIO_ACTIVE:%x failed %x\n", cid, | ||
846 | res); | ||
847 | |||
848 | return res; | ||
849 | } | ||
850 | |||
851 | int ps3av_cmd_avb_param(struct ps3av_pkt_avb_param *avb, u32 send_len) | ||
852 | { | ||
853 | int res; | ||
854 | |||
855 | ps3fb_flip_ctl(0); /* flip off */ | ||
856 | |||
857 | /* avb packet */ | ||
858 | res = ps3av_do_pkt(PS3AV_CID_AVB_PARAM, send_len, sizeof(*avb), | ||
859 | &avb->send_hdr); | ||
860 | if (res < 0) | ||
861 | goto out; | ||
862 | |||
863 | res = get_status(avb); | ||
864 | if (res) | ||
865 | pr_debug("%s: PS3AV_CID_AVB_PARAM: failed %x\n", __FUNCTION__, | ||
866 | res); | ||
867 | |||
868 | out: | ||
869 | ps3fb_flip_ctl(1); /* flip on */ | ||
870 | return res; | ||
871 | } | ||
872 | |||
873 | int ps3av_cmd_av_get_hw_conf(struct ps3av_pkt_av_get_hw_conf *hw_conf) | ||
874 | { | ||
875 | int res; | ||
876 | |||
877 | memset(hw_conf, 0, sizeof(*hw_conf)); | ||
878 | |||
879 | res = ps3av_do_pkt(PS3AV_CID_AV_GET_HW_CONF, sizeof(hw_conf->send_hdr), | ||
880 | sizeof(*hw_conf), &hw_conf->send_hdr); | ||
881 | if (res < 0) | ||
882 | return res; | ||
883 | |||
884 | res = get_status(hw_conf); | ||
885 | if (res) | ||
886 | printk(KERN_ERR "PS3AV_CID_AV_GET_HW_CONF: failed %x\n", res); | ||
887 | |||
888 | return res; | ||
889 | } | ||
890 | |||
891 | int ps3av_cmd_video_get_monitor_info(struct ps3av_pkt_av_get_monitor_info *info, | ||
892 | u32 avport) | ||
893 | { | ||
894 | int res; | ||
895 | |||
896 | memset(info, 0, sizeof(*info)); | ||
897 | info->avport = avport; | ||
898 | |||
899 | res = ps3av_do_pkt(PS3AV_CID_AV_GET_MONITOR_INFO, | ||
900 | sizeof(info->send_hdr) + sizeof(info->avport) + | ||
901 | sizeof(info->reserved), | ||
902 | sizeof(*info), &info->send_hdr); | ||
903 | if (res < 0) | ||
904 | return res; | ||
905 | |||
906 | res = get_status(info); | ||
907 | if (res) | ||
908 | printk(KERN_ERR "PS3AV_CID_AV_GET_MONITOR_INFO: failed %x\n", | ||
909 | res); | ||
910 | |||
911 | return res; | ||
912 | } | ||
913 | |||
914 | #ifdef PS3AV_DEBUG | ||
915 | void ps3av_cmd_av_hw_conf_dump(const struct ps3av_pkt_av_get_hw_conf *hw_conf) | ||
916 | { | ||
917 | printk("av_h_conf:num of hdmi:%d\n", hw_conf->num_of_hdmi); | ||
918 | printk("av_h_conf:num of avmulti:%d\n", hw_conf->num_of_avmulti); | ||
919 | printk("av_h_conf:num of spdif:%d\n", hw_conf->num_of_spdif); | ||
920 | } | ||
921 | |||
922 | void ps3av_cmd_av_monitor_info_dump(const struct ps3av_pkt_av_get_monitor_info *monitor_info) | ||
923 | { | ||
924 | const struct ps3av_info_monitor *info = &monitor_info->info; | ||
925 | const struct ps3av_info_audio *audio = info->audio; | ||
926 | int i; | ||
927 | |||
928 | printk("Monitor Info: size%d\n", monitor_info->send_hdr.size); | ||
929 | |||
930 | printk("avport:%02x\n", info->avport); | ||
931 | printk("monitor_id:"); | ||
932 | for (i = 0; i < 10; i++) | ||
933 | printk("%02x ", info->monitor_id[i]); | ||
934 | printk("\nmonitor_type:%02x\n", info->monitor_type); | ||
935 | printk("monitor_name:"); | ||
936 | for (i = 0; i < 16; i++) | ||
937 | printk("%c", info->monitor_name[i]); | ||
938 | |||
939 | /* resolution */ | ||
940 | printk("\nresolution_60: bits:%08x native:%08x\n", | ||
941 | info->res_60.res_bits, info->res_60.native); | ||
942 | printk("resolution_50: bits:%08x native:%08x\n", | ||
943 | info->res_50.res_bits, info->res_50.native); | ||
944 | printk("resolution_other: bits:%08x native:%08x\n", | ||
945 | info->res_other.res_bits, info->res_other.native); | ||
946 | printk("resolution_vesa: bits:%08x native:%08x\n", | ||
947 | info->res_vesa.res_bits, info->res_vesa.native); | ||
948 | |||
949 | /* color space */ | ||
950 | printk("color space rgb:%02x\n", info->cs.rgb); | ||
951 | printk("color space yuv444:%02x\n", info->cs.yuv444); | ||
952 | printk("color space yuv422:%02x\n", info->cs.yuv422); | ||
953 | |||
954 | /* color info */ | ||
955 | printk("color info red:X %04x Y %04x\n", | ||
956 | info->color.red_x, info->color.red_y); | ||
957 | printk("color info green:X %04x Y %04x\n", | ||
958 | info->color.green_x, info->color.green_y); | ||
959 | printk("color info blue:X %04x Y %04x\n", | ||
960 | info->color.blue_x, info->color.blue_y); | ||
961 | printk("color info white:X %04x Y %04x\n", | ||
962 | info->color.white_x, info->color.white_y); | ||
963 | printk("color info gamma: %08x\n", info->color.gamma); | ||
964 | |||
965 | /* other info */ | ||
966 | printk("supported_AI:%02x\n", info->supported_ai); | ||
967 | printk("speaker_info:%02x\n", info->speaker_info); | ||
968 | printk("num of audio:%02x\n", info->num_of_audio_block); | ||
969 | |||
970 | /* audio block */ | ||
971 | for (i = 0; i < info->num_of_audio_block; i++) { | ||
972 | printk("audio[%d] type:%02x max_ch:%02x fs:%02x sbit:%02x\n", | ||
973 | i, audio->type, audio->max_num_of_ch, audio->fs, | ||
974 | audio->sbit); | ||
975 | audio++; | ||
976 | } | ||
977 | } | ||
978 | #endif /* PS3AV_DEBUG */ | ||
979 | |||
980 | #define PS3AV_AV_LAYOUT_0 (PS3AV_CMD_AV_LAYOUT_32 \ | ||
981 | | PS3AV_CMD_AV_LAYOUT_44 \ | ||
982 | | PS3AV_CMD_AV_LAYOUT_48) | ||
983 | |||
984 | #define PS3AV_AV_LAYOUT_1 (PS3AV_AV_LAYOUT_0 \ | ||
985 | | PS3AV_CMD_AV_LAYOUT_88 \ | ||
986 | | PS3AV_CMD_AV_LAYOUT_96 \ | ||
987 | | PS3AV_CMD_AV_LAYOUT_176 \ | ||
988 | | PS3AV_CMD_AV_LAYOUT_192) | ||
989 | |||
990 | /************************* vuart ***************************/ | ||
991 | |||
992 | #define POLLING_INTERVAL 25 /* in msec */ | ||
993 | |||
994 | int ps3av_vuart_write(struct ps3_vuart_port_device *dev, const void *buf, | ||
995 | unsigned long size) | ||
996 | { | ||
997 | int error = ps3_vuart_write(dev, buf, size); | ||
998 | return error ? error : size; | ||
999 | } | ||
1000 | |||
1001 | int ps3av_vuart_read(struct ps3_vuart_port_device *dev, void *buf, | ||
1002 | unsigned long size, int timeout) | ||
1003 | { | ||
1004 | int error; | ||
1005 | int loopcnt = 0; | ||
1006 | |||
1007 | timeout = (timeout + POLLING_INTERVAL - 1) / POLLING_INTERVAL; | ||
1008 | while (loopcnt++ <= timeout) { | ||
1009 | error = ps3_vuart_read(dev, buf, size); | ||
1010 | if (!error) | ||
1011 | return size; | ||
1012 | if (error != -EAGAIN) { | ||
1013 | printk(KERN_ERR "%s: ps3_vuart_read failed %d\n", | ||
1014 | __FUNCTION__, error); | ||
1015 | return error; | ||
1016 | } | ||
1017 | msleep(POLLING_INTERVAL); | ||
1018 | } | ||
1019 | return -EWOULDBLOCK; | ||
1020 | } | ||
diff --git a/drivers/ps3/vuart.c b/drivers/ps3/vuart.c index a72da8f651f8..ef8fd4c30875 100644 --- a/drivers/ps3/vuart.c +++ b/drivers/ps3/vuart.c | |||
@@ -867,6 +867,22 @@ static int ps3_vuart_remove(struct device *_dev) | |||
867 | return 0; | 867 | return 0; |
868 | } | 868 | } |
869 | 869 | ||
870 | static void ps3_vuart_shutdown(struct device *_dev) | ||
871 | { | ||
872 | struct ps3_vuart_port_device *dev = to_ps3_vuart_port_device(_dev); | ||
873 | struct ps3_vuart_port_driver *drv = | ||
874 | to_ps3_vuart_port_driver(_dev->driver); | ||
875 | |||
876 | dev_dbg(&dev->core, "%s:%d: %s\n", __func__, __LINE__, | ||
877 | dev->core.bus_id); | ||
878 | |||
879 | if (drv->shutdown) | ||
880 | drv->shutdown(dev); | ||
881 | else | ||
882 | dev_dbg(&dev->core, "%s:%d: %s no shutdown method\n", __func__, | ||
883 | __LINE__, dev->core.bus_id); | ||
884 | } | ||
885 | |||
870 | /** | 886 | /** |
871 | * ps3_vuart - The vuart instance. | 887 | * ps3_vuart - The vuart instance. |
872 | * | 888 | * |
@@ -878,6 +894,7 @@ struct bus_type ps3_vuart = { | |||
878 | .match = ps3_vuart_match, | 894 | .match = ps3_vuart_match, |
879 | .probe = ps3_vuart_probe, | 895 | .probe = ps3_vuart_probe, |
880 | .remove = ps3_vuart_remove, | 896 | .remove = ps3_vuart_remove, |
897 | .shutdown = ps3_vuart_shutdown, | ||
881 | }; | 898 | }; |
882 | 899 | ||
883 | int __init ps3_vuart_init(void) | 900 | int __init ps3_vuart_init(void) |
diff --git a/drivers/ps3/vuart.h b/drivers/ps3/vuart.h index 11c421cf7a03..2cbf728a3a0b 100644 --- a/drivers/ps3/vuart.h +++ b/drivers/ps3/vuart.h | |||
@@ -30,6 +30,7 @@ struct ps3_vuart_port_driver { | |||
30 | struct device_driver core; | 30 | struct device_driver core; |
31 | int (*probe)(struct ps3_vuart_port_device *); | 31 | int (*probe)(struct ps3_vuart_port_device *); |
32 | int (*remove)(struct ps3_vuart_port_device *); | 32 | int (*remove)(struct ps3_vuart_port_device *); |
33 | void (*shutdown)(struct ps3_vuart_port_device *); | ||
33 | int (*tx_event)(struct ps3_vuart_port_device *dev); | 34 | int (*tx_event)(struct ps3_vuart_port_device *dev); |
34 | int (*rx_event)(struct ps3_vuart_port_device *dev); | 35 | int (*rx_event)(struct ps3_vuart_port_device *dev); |
35 | int (*disconnect_event)(struct ps3_vuart_port_device *dev); | 36 | int (*disconnect_event)(struct ps3_vuart_port_device *dev); |
diff --git a/drivers/rtc/rtc-dev.c b/drivers/rtc/rtc-dev.c index 82f2ac87ccd4..137330b8636b 100644 --- a/drivers/rtc/rtc-dev.c +++ b/drivers/rtc/rtc-dev.c | |||
@@ -384,7 +384,7 @@ static int rtc_dev_fasync(int fd, struct file *file, int on) | |||
384 | return fasync_helper(fd, file, on, &rtc->async_queue); | 384 | return fasync_helper(fd, file, on, &rtc->async_queue); |
385 | } | 385 | } |
386 | 386 | ||
387 | static struct file_operations rtc_dev_fops = { | 387 | static const struct file_operations rtc_dev_fops = { |
388 | .owner = THIS_MODULE, | 388 | .owner = THIS_MODULE, |
389 | .llseek = no_llseek, | 389 | .llseek = no_llseek, |
390 | .read = rtc_dev_read, | 390 | .read = rtc_dev_read, |
diff --git a/drivers/rtc/rtc-ds1553.c b/drivers/rtc/rtc-ds1553.c index 001eb1123a65..e27176c0e18f 100644 --- a/drivers/rtc/rtc-ds1553.c +++ b/drivers/rtc/rtc-ds1553.c | |||
@@ -297,7 +297,7 @@ static struct bin_attribute ds1553_nvram_attr = { | |||
297 | .write = ds1553_nvram_write, | 297 | .write = ds1553_nvram_write, |
298 | }; | 298 | }; |
299 | 299 | ||
300 | static int __init ds1553_rtc_probe(struct platform_device *pdev) | 300 | static int __devinit ds1553_rtc_probe(struct platform_device *pdev) |
301 | { | 301 | { |
302 | struct rtc_device *rtc; | 302 | struct rtc_device *rtc; |
303 | struct resource *res; | 303 | struct resource *res; |
diff --git a/drivers/rtc/rtc-ds1742.c b/drivers/rtc/rtc-ds1742.c index 17633bfa8480..d68288b389dc 100644 --- a/drivers/rtc/rtc-ds1742.c +++ b/drivers/rtc/rtc-ds1742.c | |||
@@ -165,7 +165,7 @@ static struct bin_attribute ds1742_nvram_attr = { | |||
165 | .write = ds1742_nvram_write, | 165 | .write = ds1742_nvram_write, |
166 | }; | 166 | }; |
167 | 167 | ||
168 | static int __init ds1742_rtc_probe(struct platform_device *pdev) | 168 | static int __devinit ds1742_rtc_probe(struct platform_device *pdev) |
169 | { | 169 | { |
170 | struct rtc_device *rtc; | 170 | struct rtc_device *rtc; |
171 | struct resource *res; | 171 | struct resource *res; |
diff --git a/drivers/rtc/rtc-proc.c b/drivers/rtc/rtc-proc.c index c272afd62173..1bd624fc685c 100644 --- a/drivers/rtc/rtc-proc.c +++ b/drivers/rtc/rtc-proc.c | |||
@@ -96,7 +96,7 @@ static int rtc_proc_release(struct inode *inode, struct file *file) | |||
96 | return res; | 96 | return res; |
97 | } | 97 | } |
98 | 98 | ||
99 | static struct file_operations rtc_proc_fops = { | 99 | static const struct file_operations rtc_proc_fops = { |
100 | .open = rtc_proc_open, | 100 | .open = rtc_proc_open, |
101 | .read = seq_read, | 101 | .read = seq_read, |
102 | .llseek = seq_lseek, | 102 | .llseek = seq_lseek, |
diff --git a/drivers/rtc/rtc-sysfs.c b/drivers/rtc/rtc-sysfs.c index 2ddd0cf07140..899ab8c514fa 100644 --- a/drivers/rtc/rtc-sysfs.c +++ b/drivers/rtc/rtc-sysfs.c | |||
@@ -78,6 +78,92 @@ static struct attribute_group rtc_attr_group = { | |||
78 | .attrs = rtc_attrs, | 78 | .attrs = rtc_attrs, |
79 | }; | 79 | }; |
80 | 80 | ||
81 | |||
82 | static ssize_t | ||
83 | rtc_sysfs_show_wakealarm(struct class_device *dev, char *buf) | ||
84 | { | ||
85 | ssize_t retval; | ||
86 | unsigned long alarm; | ||
87 | struct rtc_wkalrm alm; | ||
88 | |||
89 | /* Don't show disabled alarms; but the RTC could leave the | ||
90 | * alarm enabled after it's already triggered. Alarms are | ||
91 | * conceptually one-shot, even though some common hardware | ||
92 | * (PCs) doesn't actually work that way. | ||
93 | * | ||
94 | * REVISIT maybe we should require RTC implementations to | ||
95 | * disable the RTC alarm after it triggers, for uniformity. | ||
96 | */ | ||
97 | retval = rtc_read_alarm(dev, &alm); | ||
98 | if (retval == 0 && alm.enabled) { | ||
99 | rtc_tm_to_time(&alm.time, &alarm); | ||
100 | retval = sprintf(buf, "%lu\n", alarm); | ||
101 | } | ||
102 | |||
103 | return retval; | ||
104 | } | ||
105 | |||
106 | static ssize_t | ||
107 | rtc_sysfs_set_wakealarm(struct class_device *dev, const char *buf, size_t n) | ||
108 | { | ||
109 | ssize_t retval; | ||
110 | unsigned long now, alarm; | ||
111 | struct rtc_wkalrm alm; | ||
112 | |||
113 | /* Only request alarms that trigger in the future. Disable them | ||
114 | * by writing another time, e.g. 0 meaning Jan 1 1970 UTC. | ||
115 | */ | ||
116 | retval = rtc_read_time(dev, &alm.time); | ||
117 | if (retval < 0) | ||
118 | return retval; | ||
119 | rtc_tm_to_time(&alm.time, &now); | ||
120 | |||
121 | alarm = simple_strtoul(buf, NULL, 0); | ||
122 | if (alarm > now) { | ||
123 | /* Avoid accidentally clobbering active alarms; we can't | ||
124 | * entirely prevent that here, without even the minimal | ||
125 | * locking from the /dev/rtcN api. | ||
126 | */ | ||
127 | retval = rtc_read_alarm(dev, &alm); | ||
128 | if (retval < 0) | ||
129 | return retval; | ||
130 | if (alm.enabled) | ||
131 | return -EBUSY; | ||
132 | |||
133 | alm.enabled = 1; | ||
134 | } else { | ||
135 | alm.enabled = 0; | ||
136 | |||
137 | /* Provide a valid future alarm time. Linux isn't EFI, | ||
138 | * this time won't be ignored when disabling the alarm. | ||
139 | */ | ||
140 | alarm = now + 300; | ||
141 | } | ||
142 | rtc_time_to_tm(alarm, &alm.time); | ||
143 | |||
144 | retval = rtc_set_alarm(dev, &alm); | ||
145 | return (retval < 0) ? retval : n; | ||
146 | } | ||
147 | static const CLASS_DEVICE_ATTR(wakealarm, S_IRUGO | S_IWUSR, | ||
148 | rtc_sysfs_show_wakealarm, rtc_sysfs_set_wakealarm); | ||
149 | |||
150 | |||
151 | /* The reason to trigger an alarm with no process watching it (via sysfs) | ||
152 | * is its side effect: waking from a system state like suspend-to-RAM or | ||
153 | * suspend-to-disk. So: no attribute unless that side effect is possible. | ||
154 | * (Userspace may disable that mechanism later.) | ||
155 | */ | ||
156 | static inline int rtc_does_wakealarm(struct class_device *class_dev) | ||
157 | { | ||
158 | struct rtc_device *rtc; | ||
159 | |||
160 | if (!device_can_wakeup(class_dev->dev)) | ||
161 | return 0; | ||
162 | rtc = to_rtc_device(class_dev); | ||
163 | return rtc->ops->set_alarm != NULL; | ||
164 | } | ||
165 | |||
166 | |||
81 | static int rtc_sysfs_add_device(struct class_device *class_dev, | 167 | static int rtc_sysfs_add_device(struct class_device *class_dev, |
82 | struct class_interface *class_intf) | 168 | struct class_interface *class_intf) |
83 | { | 169 | { |
@@ -87,8 +173,18 @@ static int rtc_sysfs_add_device(struct class_device *class_dev, | |||
87 | 173 | ||
88 | err = sysfs_create_group(&class_dev->kobj, &rtc_attr_group); | 174 | err = sysfs_create_group(&class_dev->kobj, &rtc_attr_group); |
89 | if (err) | 175 | if (err) |
90 | dev_err(class_dev->dev, | 176 | dev_err(class_dev->dev, "failed to create %s\n", |
91 | "failed to create sysfs attributes\n"); | 177 | "sysfs attributes"); |
178 | else if (rtc_does_wakealarm(class_dev)) { | ||
179 | /* not all RTCs support both alarms and wakeup */ | ||
180 | err = class_device_create_file(class_dev, | ||
181 | &class_device_attr_wakealarm); | ||
182 | if (err) { | ||
183 | dev_err(class_dev->dev, "failed to create %s\n", | ||
184 | "alarm attribute"); | ||
185 | sysfs_remove_group(&class_dev->kobj, &rtc_attr_group); | ||
186 | } | ||
187 | } | ||
92 | 188 | ||
93 | return err; | 189 | return err; |
94 | } | 190 | } |
@@ -96,6 +192,9 @@ static int rtc_sysfs_add_device(struct class_device *class_dev, | |||
96 | static void rtc_sysfs_remove_device(struct class_device *class_dev, | 192 | static void rtc_sysfs_remove_device(struct class_device *class_dev, |
97 | struct class_interface *class_intf) | 193 | struct class_interface *class_intf) |
98 | { | 194 | { |
195 | if (rtc_does_wakealarm(class_dev)) | ||
196 | class_device_remove_file(class_dev, | ||
197 | &class_device_attr_wakealarm); | ||
99 | sysfs_remove_group(&class_dev->kobj, &rtc_attr_group); | 198 | sysfs_remove_group(&class_dev->kobj, &rtc_attr_group); |
100 | } | 199 | } |
101 | 200 | ||
diff --git a/drivers/s390/block/dasd_eer.c b/drivers/s390/block/dasd_eer.c index 6cedc914077e..4b8a95fba1e5 100644 --- a/drivers/s390/block/dasd_eer.c +++ b/drivers/s390/block/dasd_eer.c | |||
@@ -650,7 +650,7 @@ static unsigned int dasd_eer_poll(struct file *filp, poll_table *ptable) | |||
650 | return mask; | 650 | return mask; |
651 | } | 651 | } |
652 | 652 | ||
653 | static struct file_operations dasd_eer_fops = { | 653 | static const struct file_operations dasd_eer_fops = { |
654 | .open = &dasd_eer_open, | 654 | .open = &dasd_eer_open, |
655 | .release = &dasd_eer_close, | 655 | .release = &dasd_eer_close, |
656 | .read = &dasd_eer_read, | 656 | .read = &dasd_eer_read, |
diff --git a/drivers/s390/block/dasd_proc.c b/drivers/s390/block/dasd_proc.c index 8b7e11815d70..8b3b0f4a157c 100644 --- a/drivers/s390/block/dasd_proc.c +++ b/drivers/s390/block/dasd_proc.c | |||
@@ -147,7 +147,7 @@ static int dasd_devices_open(struct inode *inode, struct file *file) | |||
147 | return seq_open(file, &dasd_devices_seq_ops); | 147 | return seq_open(file, &dasd_devices_seq_ops); |
148 | } | 148 | } |
149 | 149 | ||
150 | static struct file_operations dasd_devices_file_ops = { | 150 | static const struct file_operations dasd_devices_file_ops = { |
151 | .open = dasd_devices_open, | 151 | .open = dasd_devices_open, |
152 | .read = seq_read, | 152 | .read = seq_read, |
153 | .llseek = seq_lseek, | 153 | .llseek = seq_lseek, |
diff --git a/drivers/s390/char/fs3270.c b/drivers/s390/char/fs3270.c index e1a746269c4c..ef36f2132aa4 100644 --- a/drivers/s390/char/fs3270.c +++ b/drivers/s390/char/fs3270.c | |||
@@ -493,7 +493,7 @@ fs3270_close(struct inode *inode, struct file *filp) | |||
493 | return 0; | 493 | return 0; |
494 | } | 494 | } |
495 | 495 | ||
496 | static struct file_operations fs3270_fops = { | 496 | static const struct file_operations fs3270_fops = { |
497 | .owner = THIS_MODULE, /* owner */ | 497 | .owner = THIS_MODULE, /* owner */ |
498 | .read = fs3270_read, /* read */ | 498 | .read = fs3270_read, /* read */ |
499 | .write = fs3270_write, /* write */ | 499 | .write = fs3270_write, /* write */ |
diff --git a/drivers/s390/char/monreader.c b/drivers/s390/char/monreader.c index 3a1a958fb5f2..8df7b1323c05 100644 --- a/drivers/s390/char/monreader.c +++ b/drivers/s390/char/monreader.c | |||
@@ -547,7 +547,7 @@ static unsigned int mon_poll(struct file *filp, struct poll_table_struct *p) | |||
547 | return 0; | 547 | return 0; |
548 | } | 548 | } |
549 | 549 | ||
550 | static struct file_operations mon_fops = { | 550 | static const struct file_operations mon_fops = { |
551 | .owner = THIS_MODULE, | 551 | .owner = THIS_MODULE, |
552 | .open = &mon_open, | 552 | .open = &mon_open, |
553 | .release = &mon_close, | 553 | .release = &mon_close, |
diff --git a/drivers/s390/char/monwriter.c b/drivers/s390/char/monwriter.c index 9e451acc6491..268598ef3efe 100644 --- a/drivers/s390/char/monwriter.c +++ b/drivers/s390/char/monwriter.c | |||
@@ -255,7 +255,7 @@ out_error: | |||
255 | return rc; | 255 | return rc; |
256 | } | 256 | } |
257 | 257 | ||
258 | static struct file_operations monwrite_fops = { | 258 | static const struct file_operations monwrite_fops = { |
259 | .owner = THIS_MODULE, | 259 | .owner = THIS_MODULE, |
260 | .open = &monwrite_open, | 260 | .open = &monwrite_open, |
261 | .release = &monwrite_close, | 261 | .release = &monwrite_close, |
diff --git a/drivers/s390/char/tape_char.c b/drivers/s390/char/tape_char.c index 9faea04e11e9..b830a8cbef78 100644 --- a/drivers/s390/char/tape_char.c +++ b/drivers/s390/char/tape_char.c | |||
@@ -39,7 +39,7 @@ static int tapechar_ioctl(struct inode *, struct file *, unsigned int, | |||
39 | static long tapechar_compat_ioctl(struct file *, unsigned int, | 39 | static long tapechar_compat_ioctl(struct file *, unsigned int, |
40 | unsigned long); | 40 | unsigned long); |
41 | 41 | ||
42 | static struct file_operations tape_fops = | 42 | static const struct file_operations tape_fops = |
43 | { | 43 | { |
44 | .owner = THIS_MODULE, | 44 | .owner = THIS_MODULE, |
45 | .read = tapechar_read, | 45 | .read = tapechar_read, |
diff --git a/drivers/s390/char/tape_class.c b/drivers/s390/char/tape_class.c index 56b87618b100..2e0d29730b67 100644 --- a/drivers/s390/char/tape_class.c +++ b/drivers/s390/char/tape_class.c | |||
@@ -36,7 +36,7 @@ static struct class *tape_class; | |||
36 | struct tape_class_device *register_tape_dev( | 36 | struct tape_class_device *register_tape_dev( |
37 | struct device * device, | 37 | struct device * device, |
38 | dev_t dev, | 38 | dev_t dev, |
39 | struct file_operations *fops, | 39 | const struct file_operations *fops, |
40 | char * device_name, | 40 | char * device_name, |
41 | char * mode_name) | 41 | char * mode_name) |
42 | { | 42 | { |
diff --git a/drivers/s390/char/tape_class.h b/drivers/s390/char/tape_class.h index 3d0ca054cdee..a8bd9b47fad6 100644 --- a/drivers/s390/char/tape_class.h +++ b/drivers/s390/char/tape_class.h | |||
@@ -52,7 +52,7 @@ struct tape_class_device { | |||
52 | struct tape_class_device *register_tape_dev( | 52 | struct tape_class_device *register_tape_dev( |
53 | struct device * device, | 53 | struct device * device, |
54 | dev_t dev, | 54 | dev_t dev, |
55 | struct file_operations *fops, | 55 | const struct file_operations *fops, |
56 | char * device_name, | 56 | char * device_name, |
57 | char * node_name | 57 | char * node_name |
58 | ); | 58 | ); |
diff --git a/drivers/s390/char/tape_proc.c b/drivers/s390/char/tape_proc.c index 655d375ab22b..cea49f001f89 100644 --- a/drivers/s390/char/tape_proc.c +++ b/drivers/s390/char/tape_proc.c | |||
@@ -109,7 +109,7 @@ static int tape_proc_open(struct inode *inode, struct file *file) | |||
109 | return seq_open(file, &tape_proc_seq); | 109 | return seq_open(file, &tape_proc_seq); |
110 | } | 110 | } |
111 | 111 | ||
112 | static struct file_operations tape_proc_ops = | 112 | static const struct file_operations tape_proc_ops = |
113 | { | 113 | { |
114 | .open = tape_proc_open, | 114 | .open = tape_proc_open, |
115 | .read = seq_read, | 115 | .read = seq_read, |
diff --git a/drivers/s390/char/vmcp.c b/drivers/s390/char/vmcp.c index a420cd099041..fce3dac5cb3e 100644 --- a/drivers/s390/char/vmcp.c +++ b/drivers/s390/char/vmcp.c | |||
@@ -173,7 +173,7 @@ static long vmcp_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
173 | } | 173 | } |
174 | } | 174 | } |
175 | 175 | ||
176 | static struct file_operations vmcp_fops = { | 176 | static const struct file_operations vmcp_fops = { |
177 | .owner = THIS_MODULE, | 177 | .owner = THIS_MODULE, |
178 | .open = &vmcp_open, | 178 | .open = &vmcp_open, |
179 | .release = &vmcp_release, | 179 | .release = &vmcp_release, |
diff --git a/drivers/s390/char/vmlogrdr.c b/drivers/s390/char/vmlogrdr.c index 8432a76b961e..b87d3b019936 100644 --- a/drivers/s390/char/vmlogrdr.c +++ b/drivers/s390/char/vmlogrdr.c | |||
@@ -88,7 +88,7 @@ static int vmlogrdr_release(struct inode *, struct file *); | |||
88 | static ssize_t vmlogrdr_read (struct file *filp, char __user *data, | 88 | static ssize_t vmlogrdr_read (struct file *filp, char __user *data, |
89 | size_t count, loff_t * ppos); | 89 | size_t count, loff_t * ppos); |
90 | 90 | ||
91 | static struct file_operations vmlogrdr_fops = { | 91 | static const struct file_operations vmlogrdr_fops = { |
92 | .owner = THIS_MODULE, | 92 | .owner = THIS_MODULE, |
93 | .open = vmlogrdr_open, | 93 | .open = vmlogrdr_open, |
94 | .release = vmlogrdr_release, | 94 | .release = vmlogrdr_release, |
diff --git a/drivers/s390/char/vmwatchdog.c b/drivers/s390/char/vmwatchdog.c index 4b868f72fe89..680b9b58b80e 100644 --- a/drivers/s390/char/vmwatchdog.c +++ b/drivers/s390/char/vmwatchdog.c | |||
@@ -228,7 +228,7 @@ static ssize_t vmwdt_write(struct file *f, const char __user *buf, | |||
228 | return count; | 228 | return count; |
229 | } | 229 | } |
230 | 230 | ||
231 | static struct file_operations vmwdt_fops = { | 231 | static const struct file_operations vmwdt_fops = { |
232 | .open = &vmwdt_open, | 232 | .open = &vmwdt_open, |
233 | .release = &vmwdt_close, | 233 | .release = &vmwdt_close, |
234 | .ioctl = &vmwdt_ioctl, | 234 | .ioctl = &vmwdt_ioctl, |
diff --git a/drivers/s390/cio/blacklist.c b/drivers/s390/cio/blacklist.c index aa65df4dfced..ec0404874fad 100644 --- a/drivers/s390/cio/blacklist.c +++ b/drivers/s390/cio/blacklist.c | |||
@@ -364,7 +364,7 @@ cio_ignore_proc_open(struct inode *inode, struct file *file) | |||
364 | return seq_open(file, &cio_ignore_proc_seq_ops); | 364 | return seq_open(file, &cio_ignore_proc_seq_ops); |
365 | } | 365 | } |
366 | 366 | ||
367 | static struct file_operations cio_ignore_proc_fops = { | 367 | static const struct file_operations cio_ignore_proc_fops = { |
368 | .open = cio_ignore_proc_open, | 368 | .open = cio_ignore_proc_open, |
369 | .read = seq_read, | 369 | .read = seq_read, |
370 | .llseek = seq_lseek, | 370 | .llseek = seq_lseek, |
diff --git a/drivers/s390/crypto/zcrypt_api.c b/drivers/s390/crypto/zcrypt_api.c index 2c785148d21e..99761391f340 100644 --- a/drivers/s390/crypto/zcrypt_api.c +++ b/drivers/s390/crypto/zcrypt_api.c | |||
@@ -807,7 +807,7 @@ static long zcrypt_compat_ioctl(struct file *filp, unsigned int cmd, | |||
807 | /** | 807 | /** |
808 | * Misc device file operations. | 808 | * Misc device file operations. |
809 | */ | 809 | */ |
810 | static struct file_operations zcrypt_fops = { | 810 | static const struct file_operations zcrypt_fops = { |
811 | .owner = THIS_MODULE, | 811 | .owner = THIS_MODULE, |
812 | .read = zcrypt_read, | 812 | .read = zcrypt_read, |
813 | .write = zcrypt_write, | 813 | .write = zcrypt_write, |
diff --git a/drivers/s390/net/qeth_proc.c b/drivers/s390/net/qeth_proc.c index faa768e59257..81f805cc5ee7 100644 --- a/drivers/s390/net/qeth_proc.c +++ b/drivers/s390/net/qeth_proc.c | |||
@@ -161,7 +161,7 @@ qeth_procfile_open(struct inode *inode, struct file *file) | |||
161 | return seq_open(file, &qeth_procfile_seq_ops); | 161 | return seq_open(file, &qeth_procfile_seq_ops); |
162 | } | 162 | } |
163 | 163 | ||
164 | static struct file_operations qeth_procfile_fops = { | 164 | static const struct file_operations qeth_procfile_fops = { |
165 | .owner = THIS_MODULE, | 165 | .owner = THIS_MODULE, |
166 | .open = qeth_procfile_open, | 166 | .open = qeth_procfile_open, |
167 | .read = seq_read, | 167 | .read = seq_read, |
@@ -273,7 +273,7 @@ qeth_perf_procfile_open(struct inode *inode, struct file *file) | |||
273 | return seq_open(file, &qeth_perf_procfile_seq_ops); | 273 | return seq_open(file, &qeth_perf_procfile_seq_ops); |
274 | } | 274 | } |
275 | 275 | ||
276 | static struct file_operations qeth_perf_procfile_fops = { | 276 | static const struct file_operations qeth_perf_procfile_fops = { |
277 | .owner = THIS_MODULE, | 277 | .owner = THIS_MODULE, |
278 | .open = qeth_perf_procfile_open, | 278 | .open = qeth_perf_procfile_open, |
279 | .read = seq_read, | 279 | .read = seq_read, |
diff --git a/drivers/s390/scsi/zfcp_aux.c b/drivers/s390/scsi/zfcp_aux.c index 39a885266790..1f9554e08013 100644 --- a/drivers/s390/scsi/zfcp_aux.c +++ b/drivers/s390/scsi/zfcp_aux.c | |||
@@ -60,7 +60,7 @@ static long zfcp_cfdc_dev_ioctl(struct file *, unsigned int, unsigned long); | |||
60 | _IOWR(ZFCP_CFDC_IOC_MAGIC, 0, struct zfcp_cfdc_sense_data) | 60 | _IOWR(ZFCP_CFDC_IOC_MAGIC, 0, struct zfcp_cfdc_sense_data) |
61 | 61 | ||
62 | 62 | ||
63 | static struct file_operations zfcp_cfdc_fops = { | 63 | static const struct file_operations zfcp_cfdc_fops = { |
64 | .unlocked_ioctl = zfcp_cfdc_dev_ioctl, | 64 | .unlocked_ioctl = zfcp_cfdc_dev_ioctl, |
65 | #ifdef CONFIG_COMPAT | 65 | #ifdef CONFIG_COMPAT |
66 | .compat_ioctl = zfcp_cfdc_dev_ioctl | 66 | .compat_ioctl = zfcp_cfdc_dev_ioctl |
diff --git a/drivers/sbus/char/bpp.c b/drivers/sbus/char/bpp.c index ac7d1258efee..a39ee80c9715 100644 --- a/drivers/sbus/char/bpp.c +++ b/drivers/sbus/char/bpp.c | |||
@@ -846,7 +846,7 @@ static int bpp_ioctl(struct inode *inode, struct file *f, unsigned int cmd, | |||
846 | return errno; | 846 | return errno; |
847 | } | 847 | } |
848 | 848 | ||
849 | static struct file_operations bpp_fops = { | 849 | static const struct file_operations bpp_fops = { |
850 | .owner = THIS_MODULE, | 850 | .owner = THIS_MODULE, |
851 | .read = bpp_read, | 851 | .read = bpp_read, |
852 | .write = bpp_write, | 852 | .write = bpp_write, |
diff --git a/drivers/sbus/char/cpwatchdog.c b/drivers/sbus/char/cpwatchdog.c index ad1c7db96cb4..0cfd1e4c032c 100644 --- a/drivers/sbus/char/cpwatchdog.c +++ b/drivers/sbus/char/cpwatchdog.c | |||
@@ -459,7 +459,7 @@ static irqreturn_t wd_interrupt(int irq, void *dev_id) | |||
459 | return IRQ_HANDLED; | 459 | return IRQ_HANDLED; |
460 | } | 460 | } |
461 | 461 | ||
462 | static struct file_operations wd_fops = { | 462 | static const struct file_operations wd_fops = { |
463 | .owner = THIS_MODULE, | 463 | .owner = THIS_MODULE, |
464 | .ioctl = wd_ioctl, | 464 | .ioctl = wd_ioctl, |
465 | .compat_ioctl = wd_compat_ioctl, | 465 | .compat_ioctl = wd_compat_ioctl, |
diff --git a/drivers/sbus/char/display7seg.c b/drivers/sbus/char/display7seg.c index a4909e0c7f83..2d14a29effe4 100644 --- a/drivers/sbus/char/display7seg.c +++ b/drivers/sbus/char/display7seg.c | |||
@@ -166,7 +166,7 @@ static long d7s_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
166 | return error; | 166 | return error; |
167 | } | 167 | } |
168 | 168 | ||
169 | static struct file_operations d7s_fops = { | 169 | static const struct file_operations d7s_fops = { |
170 | .owner = THIS_MODULE, | 170 | .owner = THIS_MODULE, |
171 | .unlocked_ioctl = d7s_ioctl, | 171 | .unlocked_ioctl = d7s_ioctl, |
172 | .compat_ioctl = d7s_ioctl, | 172 | .compat_ioctl = d7s_ioctl, |
diff --git a/drivers/sbus/char/envctrl.c b/drivers/sbus/char/envctrl.c index fff4660cdf96..2cea4f5d2084 100644 --- a/drivers/sbus/char/envctrl.c +++ b/drivers/sbus/char/envctrl.c | |||
@@ -705,7 +705,7 @@ envctrl_release(struct inode *inode, struct file *file) | |||
705 | return 0; | 705 | return 0; |
706 | } | 706 | } |
707 | 707 | ||
708 | static struct file_operations envctrl_fops = { | 708 | static const struct file_operations envctrl_fops = { |
709 | .owner = THIS_MODULE, | 709 | .owner = THIS_MODULE, |
710 | .read = envctrl_read, | 710 | .read = envctrl_read, |
711 | .unlocked_ioctl = envctrl_ioctl, | 711 | .unlocked_ioctl = envctrl_ioctl, |
diff --git a/drivers/sbus/char/flash.c b/drivers/sbus/char/flash.c index fa2418f7ad39..6e99507aeb12 100644 --- a/drivers/sbus/char/flash.c +++ b/drivers/sbus/char/flash.c | |||
@@ -142,7 +142,7 @@ flash_release(struct inode *inode, struct file *file) | |||
142 | return 0; | 142 | return 0; |
143 | } | 143 | } |
144 | 144 | ||
145 | static struct file_operations flash_fops = { | 145 | static const struct file_operations flash_fops = { |
146 | /* no write to the Flash, use mmap | 146 | /* no write to the Flash, use mmap |
147 | * and play flash dependent tricks. | 147 | * and play flash dependent tricks. |
148 | */ | 148 | */ |
diff --git a/drivers/sbus/char/jsflash.c b/drivers/sbus/char/jsflash.c index 14631ac11bc7..512857a23169 100644 --- a/drivers/sbus/char/jsflash.c +++ b/drivers/sbus/char/jsflash.c | |||
@@ -431,7 +431,7 @@ static int jsf_release(struct inode *inode, struct file *file) | |||
431 | return 0; | 431 | return 0; |
432 | } | 432 | } |
433 | 433 | ||
434 | static struct file_operations jsf_fops = { | 434 | static const struct file_operations jsf_fops = { |
435 | .owner = THIS_MODULE, | 435 | .owner = THIS_MODULE, |
436 | .llseek = jsf_lseek, | 436 | .llseek = jsf_lseek, |
437 | .read = jsf_read, | 437 | .read = jsf_read, |
diff --git a/drivers/sbus/char/openprom.c b/drivers/sbus/char/openprom.c index 4e2a0e2dcc2e..e8776230782b 100644 --- a/drivers/sbus/char/openprom.c +++ b/drivers/sbus/char/openprom.c | |||
@@ -704,7 +704,7 @@ static int openprom_release(struct inode * inode, struct file * file) | |||
704 | return 0; | 704 | return 0; |
705 | } | 705 | } |
706 | 706 | ||
707 | static struct file_operations openprom_fops = { | 707 | static const struct file_operations openprom_fops = { |
708 | .owner = THIS_MODULE, | 708 | .owner = THIS_MODULE, |
709 | .llseek = no_llseek, | 709 | .llseek = no_llseek, |
710 | .ioctl = openprom_ioctl, | 710 | .ioctl = openprom_ioctl, |
diff --git a/drivers/sbus/char/riowatchdog.c b/drivers/sbus/char/riowatchdog.c index 2a9cc8204429..a2fc6b8c1334 100644 --- a/drivers/sbus/char/riowatchdog.c +++ b/drivers/sbus/char/riowatchdog.c | |||
@@ -193,7 +193,7 @@ static ssize_t riowd_write(struct file *file, const char __user *buf, size_t cou | |||
193 | return 0; | 193 | return 0; |
194 | } | 194 | } |
195 | 195 | ||
196 | static struct file_operations riowd_fops = { | 196 | static const struct file_operations riowd_fops = { |
197 | .owner = THIS_MODULE, | 197 | .owner = THIS_MODULE, |
198 | .ioctl = riowd_ioctl, | 198 | .ioctl = riowd_ioctl, |
199 | .open = riowd_open, | 199 | .open = riowd_open, |
diff --git a/drivers/sbus/char/rtc.c b/drivers/sbus/char/rtc.c index 9b988baf0b51..94d185829119 100644 --- a/drivers/sbus/char/rtc.c +++ b/drivers/sbus/char/rtc.c | |||
@@ -233,7 +233,7 @@ static int rtc_release(struct inode *inode, struct file *file) | |||
233 | return 0; | 233 | return 0; |
234 | } | 234 | } |
235 | 235 | ||
236 | static struct file_operations rtc_fops = { | 236 | static const struct file_operations rtc_fops = { |
237 | .owner = THIS_MODULE, | 237 | .owner = THIS_MODULE, |
238 | .llseek = no_llseek, | 238 | .llseek = no_llseek, |
239 | .ioctl = rtc_ioctl, | 239 | .ioctl = rtc_ioctl, |
diff --git a/drivers/sbus/char/uctrl.c b/drivers/sbus/char/uctrl.c index b30372f17f1c..4d1a505e9e74 100644 --- a/drivers/sbus/char/uctrl.c +++ b/drivers/sbus/char/uctrl.c | |||
@@ -224,7 +224,7 @@ static irqreturn_t uctrl_interrupt(int irq, void *dev_id) | |||
224 | return IRQ_HANDLED; | 224 | return IRQ_HANDLED; |
225 | } | 225 | } |
226 | 226 | ||
227 | static struct file_operations uctrl_fops = { | 227 | static const struct file_operations uctrl_fops = { |
228 | .owner = THIS_MODULE, | 228 | .owner = THIS_MODULE, |
229 | .llseek = no_llseek, | 229 | .llseek = no_llseek, |
230 | .ioctl = uctrl_ioctl, | 230 | .ioctl = uctrl_ioctl, |
diff --git a/drivers/sbus/char/vfc_dev.c b/drivers/sbus/char/vfc_dev.c index 386e7de0b7e3..37a04a0cecfa 100644 --- a/drivers/sbus/char/vfc_dev.c +++ b/drivers/sbus/char/vfc_dev.c | |||
@@ -44,7 +44,7 @@ | |||
44 | #include "vfc.h" | 44 | #include "vfc.h" |
45 | #include <asm/vfc_ioctls.h> | 45 | #include <asm/vfc_ioctls.h> |
46 | 46 | ||
47 | static struct file_operations vfc_fops; | 47 | static const struct file_operations vfc_fops; |
48 | struct vfc_dev **vfc_dev_lst; | 48 | struct vfc_dev **vfc_dev_lst; |
49 | static char vfcstr[]="vfc"; | 49 | static char vfcstr[]="vfc"; |
50 | static unsigned char saa9051_init_array[VFC_SAA9051_NR] = { | 50 | static unsigned char saa9051_init_array[VFC_SAA9051_NR] = { |
@@ -633,7 +633,7 @@ static int vfc_mmap(struct file *file, struct vm_area_struct *vma) | |||
633 | } | 633 | } |
634 | 634 | ||
635 | 635 | ||
636 | static struct file_operations vfc_fops = { | 636 | static const struct file_operations vfc_fops = { |
637 | .owner = THIS_MODULE, | 637 | .owner = THIS_MODULE, |
638 | .llseek = no_llseek, | 638 | .llseek = no_llseek, |
639 | .ioctl = vfc_ioctl, | 639 | .ioctl = vfc_ioctl, |
diff --git a/drivers/scsi/3w-9xxx.c b/drivers/scsi/3w-9xxx.c index b091a0fc4eb0..eb766c3af1c8 100644 --- a/drivers/scsi/3w-9xxx.c +++ b/drivers/scsi/3w-9xxx.c | |||
@@ -197,7 +197,7 @@ static struct class_device_attribute *twa_host_attrs[] = { | |||
197 | }; | 197 | }; |
198 | 198 | ||
199 | /* File operations struct for character device */ | 199 | /* File operations struct for character device */ |
200 | static struct file_operations twa_fops = { | 200 | static const struct file_operations twa_fops = { |
201 | .owner = THIS_MODULE, | 201 | .owner = THIS_MODULE, |
202 | .ioctl = twa_chrdev_ioctl, | 202 | .ioctl = twa_chrdev_ioctl, |
203 | .open = twa_chrdev_open, | 203 | .open = twa_chrdev_open, |
diff --git a/drivers/scsi/3w-xxxx.c b/drivers/scsi/3w-xxxx.c index e1b44d6c0c32..bf5d63e1beee 100644 --- a/drivers/scsi/3w-xxxx.c +++ b/drivers/scsi/3w-xxxx.c | |||
@@ -1040,7 +1040,7 @@ static int tw_chrdev_open(struct inode *inode, struct file *file) | |||
1040 | } /* End tw_chrdev_open() */ | 1040 | } /* End tw_chrdev_open() */ |
1041 | 1041 | ||
1042 | /* File operations struct for character device */ | 1042 | /* File operations struct for character device */ |
1043 | static struct file_operations tw_fops = { | 1043 | static const struct file_operations tw_fops = { |
1044 | .owner = THIS_MODULE, | 1044 | .owner = THIS_MODULE, |
1045 | .ioctl = tw_chrdev_ioctl, | 1045 | .ioctl = tw_chrdev_ioctl, |
1046 | .open = tw_chrdev_open, | 1046 | .open = tw_chrdev_open, |
diff --git a/drivers/scsi/aacraid/linit.c b/drivers/scsi/aacraid/linit.c index a9734e08fe28..0f948c2fb609 100644 --- a/drivers/scsi/aacraid/linit.c +++ b/drivers/scsi/aacraid/linit.c | |||
@@ -774,7 +774,7 @@ static struct class_device_attribute *aac_attrs[] = { | |||
774 | }; | 774 | }; |
775 | 775 | ||
776 | 776 | ||
777 | static struct file_operations aac_cfg_fops = { | 777 | static const struct file_operations aac_cfg_fops = { |
778 | .owner = THIS_MODULE, | 778 | .owner = THIS_MODULE, |
779 | .ioctl = aac_cfg_ioctl, | 779 | .ioctl = aac_cfg_ioctl, |
780 | #ifdef CONFIG_COMPAT | 780 | #ifdef CONFIG_COMPAT |
diff --git a/drivers/scsi/ch.c b/drivers/scsi/ch.c index f6caa4307768..d02759f13469 100644 --- a/drivers/scsi/ch.c +++ b/drivers/scsi/ch.c | |||
@@ -129,7 +129,7 @@ static struct scsi_driver ch_template = | |||
129 | }, | 129 | }, |
130 | }; | 130 | }; |
131 | 131 | ||
132 | static struct file_operations changer_fops = | 132 | static const struct file_operations changer_fops = |
133 | { | 133 | { |
134 | .owner = THIS_MODULE, | 134 | .owner = THIS_MODULE, |
135 | .open = ch_open, | 135 | .open = ch_open, |
diff --git a/drivers/scsi/dpt_i2o.c b/drivers/scsi/dpt_i2o.c index 365db537a28d..cd36e81b2d93 100644 --- a/drivers/scsi/dpt_i2o.c +++ b/drivers/scsi/dpt_i2o.c | |||
@@ -116,7 +116,7 @@ static int sys_tbl_len = 0; | |||
116 | static adpt_hba* hba_chain = NULL; | 116 | static adpt_hba* hba_chain = NULL; |
117 | static int hba_count = 0; | 117 | static int hba_count = 0; |
118 | 118 | ||
119 | static struct file_operations adpt_fops = { | 119 | static const struct file_operations adpt_fops = { |
120 | .ioctl = adpt_ioctl, | 120 | .ioctl = adpt_ioctl, |
121 | .open = adpt_open, | 121 | .open = adpt_open, |
122 | .release = adpt_close | 122 | .release = adpt_close |
diff --git a/drivers/scsi/gdth.c b/drivers/scsi/gdth.c index 4c698a71f66f..a1992928e671 100644 --- a/drivers/scsi/gdth.c +++ b/drivers/scsi/gdth.c | |||
@@ -687,7 +687,7 @@ MODULE_AUTHOR("Achim Leubner"); | |||
687 | MODULE_LICENSE("GPL"); | 687 | MODULE_LICENSE("GPL"); |
688 | 688 | ||
689 | /* ioctl interface */ | 689 | /* ioctl interface */ |
690 | static struct file_operations gdth_fops = { | 690 | static const struct file_operations gdth_fops = { |
691 | .ioctl = gdth_ioctl, | 691 | .ioctl = gdth_ioctl, |
692 | .open = gdth_open, | 692 | .open = gdth_open, |
693 | .release = gdth_close, | 693 | .release = gdth_close, |
diff --git a/drivers/scsi/megaraid.c b/drivers/scsi/megaraid.c index 77d9d3804ccf..808a1b8c4043 100644 --- a/drivers/scsi/megaraid.c +++ b/drivers/scsi/megaraid.c | |||
@@ -92,7 +92,7 @@ static struct mega_hbas mega_hbas[MAX_CONTROLLERS]; | |||
92 | /* | 92 | /* |
93 | * The File Operations structure for the serial/ioctl interface of the driver | 93 | * The File Operations structure for the serial/ioctl interface of the driver |
94 | */ | 94 | */ |
95 | static struct file_operations megadev_fops = { | 95 | static const struct file_operations megadev_fops = { |
96 | .owner = THIS_MODULE, | 96 | .owner = THIS_MODULE, |
97 | .ioctl = megadev_ioctl, | 97 | .ioctl = megadev_ioctl, |
98 | .open = megadev_open, | 98 | .open = megadev_open, |
diff --git a/drivers/scsi/megaraid/megaraid_mm.c b/drivers/scsi/megaraid/megaraid_mm.c index c1ff20c4747d..f33a678f0897 100644 --- a/drivers/scsi/megaraid/megaraid_mm.c +++ b/drivers/scsi/megaraid/megaraid_mm.c | |||
@@ -67,7 +67,7 @@ static struct list_head adapters_list_g; | |||
67 | 67 | ||
68 | static wait_queue_head_t wait_q; | 68 | static wait_queue_head_t wait_q; |
69 | 69 | ||
70 | static struct file_operations lsi_fops = { | 70 | static const struct file_operations lsi_fops = { |
71 | .open = mraid_mm_open, | 71 | .open = mraid_mm_open, |
72 | .ioctl = mraid_mm_ioctl, | 72 | .ioctl = mraid_mm_ioctl, |
73 | #ifdef CONFIG_COMPAT | 73 | #ifdef CONFIG_COMPAT |
diff --git a/drivers/scsi/megaraid/megaraid_sas.c b/drivers/scsi/megaraid/megaraid_sas.c index b5bdd0d7a8bf..15e24fcc84f3 100644 --- a/drivers/scsi/megaraid/megaraid_sas.c +++ b/drivers/scsi/megaraid/megaraid_sas.c | |||
@@ -2913,7 +2913,7 @@ megasas_mgmt_compat_ioctl(struct file *file, unsigned int cmd, | |||
2913 | /* | 2913 | /* |
2914 | * File operations structure for management interface | 2914 | * File operations structure for management interface |
2915 | */ | 2915 | */ |
2916 | static struct file_operations megasas_mgmt_fops = { | 2916 | static const struct file_operations megasas_mgmt_fops = { |
2917 | .owner = THIS_MODULE, | 2917 | .owner = THIS_MODULE, |
2918 | .open = megasas_mgmt_open, | 2918 | .open = megasas_mgmt_open, |
2919 | .release = megasas_mgmt_release, | 2919 | .release = megasas_mgmt_release, |
diff --git a/drivers/scsi/osst.c b/drivers/scsi/osst.c index bd6bbf61adb8..9668b73872c7 100644 --- a/drivers/scsi/osst.c +++ b/drivers/scsi/osst.c | |||
@@ -5522,7 +5522,7 @@ __setup("osst=", osst_setup); | |||
5522 | 5522 | ||
5523 | #endif | 5523 | #endif |
5524 | 5524 | ||
5525 | static struct file_operations osst_fops = { | 5525 | static const struct file_operations osst_fops = { |
5526 | .owner = THIS_MODULE, | 5526 | .owner = THIS_MODULE, |
5527 | .read = osst_read, | 5527 | .read = osst_read, |
5528 | .write = osst_write, | 5528 | .write = osst_write, |
diff --git a/drivers/scsi/scsi_proc.c b/drivers/scsi/scsi_proc.c index 524a5f7a5193..69d6e9b198c4 100644 --- a/drivers/scsi/scsi_proc.c +++ b/drivers/scsi/scsi_proc.c | |||
@@ -308,7 +308,7 @@ static int proc_scsi_open(struct inode *inode, struct file *file) | |||
308 | return single_open(file, proc_scsi_show, NULL); | 308 | return single_open(file, proc_scsi_show, NULL); |
309 | } | 309 | } |
310 | 310 | ||
311 | static struct file_operations proc_scsi_operations = { | 311 | static const struct file_operations proc_scsi_operations = { |
312 | .open = proc_scsi_open, | 312 | .open = proc_scsi_open, |
313 | .read = seq_read, | 313 | .read = seq_read, |
314 | .write = proc_scsi_write, | 314 | .write = proc_scsi_write, |
diff --git a/drivers/scsi/scsi_tgt_if.c b/drivers/scsi/scsi_tgt_if.c index 37bbfbdb870f..f2344ab8deff 100644 --- a/drivers/scsi/scsi_tgt_if.c +++ b/drivers/scsi/scsi_tgt_if.c | |||
@@ -280,7 +280,7 @@ static int tgt_open(struct inode *inode, struct file *file) | |||
280 | return 0; | 280 | return 0; |
281 | } | 281 | } |
282 | 282 | ||
283 | static struct file_operations tgt_fops = { | 283 | static const struct file_operations tgt_fops = { |
284 | .owner = THIS_MODULE, | 284 | .owner = THIS_MODULE, |
285 | .open = tgt_open, | 285 | .open = tgt_open, |
286 | .poll = tgt_poll, | 286 | .poll = tgt_poll, |
diff --git a/drivers/scsi/st.c b/drivers/scsi/st.c index 16e279be4a3e..3d2e02381e92 100644 --- a/drivers/scsi/st.c +++ b/drivers/scsi/st.c | |||
@@ -3864,7 +3864,7 @@ __setup("st=", st_setup); | |||
3864 | 3864 | ||
3865 | #endif | 3865 | #endif |
3866 | 3866 | ||
3867 | static struct file_operations st_fops = | 3867 | static const struct file_operations st_fops = |
3868 | { | 3868 | { |
3869 | .owner = THIS_MODULE, | 3869 | .owner = THIS_MODULE, |
3870 | .read = st_read, | 3870 | .read = st_read, |
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c index 881f886b91c6..df45a7ac773f 100644 --- a/drivers/serial/atmel_serial.c +++ b/drivers/serial/atmel_serial.c | |||
@@ -73,35 +73,35 @@ | |||
73 | 73 | ||
74 | #define ATMEL_ISR_PASS_LIMIT 256 | 74 | #define ATMEL_ISR_PASS_LIMIT 256 |
75 | 75 | ||
76 | #define UART_PUT_CR(port,v) writel(v, (port)->membase + ATMEL_US_CR) | 76 | #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR) |
77 | #define UART_GET_MR(port) readl((port)->membase + ATMEL_US_MR) | 77 | #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR) |
78 | #define UART_PUT_MR(port,v) writel(v, (port)->membase + ATMEL_US_MR) | 78 | #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR) |
79 | #define UART_PUT_IER(port,v) writel(v, (port)->membase + ATMEL_US_IER) | 79 | #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER) |
80 | #define UART_PUT_IDR(port,v) writel(v, (port)->membase + ATMEL_US_IDR) | 80 | #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR) |
81 | #define UART_GET_IMR(port) readl((port)->membase + ATMEL_US_IMR) | 81 | #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR) |
82 | #define UART_GET_CSR(port) readl((port)->membase + ATMEL_US_CSR) | 82 | #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR) |
83 | #define UART_GET_CHAR(port) readl((port)->membase + ATMEL_US_RHR) | 83 | #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR) |
84 | #define UART_PUT_CHAR(port,v) writel(v, (port)->membase + ATMEL_US_THR) | 84 | #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR) |
85 | #define UART_GET_BRGR(port) readl((port)->membase + ATMEL_US_BRGR) | 85 | #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR) |
86 | #define UART_PUT_BRGR(port,v) writel(v, (port)->membase + ATMEL_US_BRGR) | 86 | #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR) |
87 | #define UART_PUT_RTOR(port,v) writel(v, (port)->membase + ATMEL_US_RTOR) | 87 | #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR) |
88 | 88 | ||
89 | // #define UART_GET_CR(port) readl((port)->membase + ATMEL_US_CR) // is write-only | 89 | // #define UART_GET_CR(port) __raw_readl((port)->membase + ATMEL_US_CR) // is write-only |
90 | 90 | ||
91 | /* PDC registers */ | 91 | /* PDC registers */ |
92 | #define UART_PUT_PTCR(port,v) writel(v, (port)->membase + ATMEL_PDC_PTCR) | 92 | #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR) |
93 | #define UART_GET_PTSR(port) readl((port)->membase + ATMEL_PDC_PTSR) | 93 | #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR) |
94 | 94 | ||
95 | #define UART_PUT_RPR(port,v) writel(v, (port)->membase + ATMEL_PDC_RPR) | 95 | #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR) |
96 | #define UART_GET_RPR(port) readl((port)->membase + ATMEL_PDC_RPR) | 96 | #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR) |
97 | #define UART_PUT_RCR(port,v) writel(v, (port)->membase + ATMEL_PDC_RCR) | 97 | #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR) |
98 | #define UART_PUT_RNPR(port,v) writel(v, (port)->membase + ATMEL_PDC_RNPR) | 98 | #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR) |
99 | #define UART_PUT_RNCR(port,v) writel(v, (port)->membase + ATMEL_PDC_RNCR) | 99 | #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR) |
100 | 100 | ||
101 | #define UART_PUT_TPR(port,v) writel(v, (port)->membase + ATMEL_PDC_TPR) | 101 | #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR) |
102 | #define UART_PUT_TCR(port,v) writel(v, (port)->membase + ATMEL_PDC_TCR) | 102 | #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR) |
103 | //#define UART_PUT_TNPR(port,v) writel(v, (port)->membase + ATMEL_PDC_TNPR) | 103 | //#define UART_PUT_TNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNPR) |
104 | //#define UART_PUT_TNCR(port,v) writel(v, (port)->membase + ATMEL_PDC_TNCR) | 104 | //#define UART_PUT_TNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNCR) |
105 | 105 | ||
106 | static int (*atmel_open_hook)(struct uart_port *); | 106 | static int (*atmel_open_hook)(struct uart_port *); |
107 | static void (*atmel_close_hook)(struct uart_port *); | 107 | static void (*atmel_close_hook)(struct uart_port *); |
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index d895a1adb428..9052f4c3493b 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig | |||
@@ -75,6 +75,13 @@ config SPI_BUTTERFLY | |||
75 | inexpensive battery powered microcontroller evaluation board. | 75 | inexpensive battery powered microcontroller evaluation board. |
76 | This same cable can be used to flash new firmware. | 76 | This same cable can be used to flash new firmware. |
77 | 77 | ||
78 | config SPI_IMX | ||
79 | tristate "Freescale iMX SPI controller" | ||
80 | depends on SPI_MASTER && ARCH_IMX && EXPERIMENTAL | ||
81 | help | ||
82 | This enables using the Freescale iMX SPI controller in master | ||
83 | mode. | ||
84 | |||
78 | config SPI_MPC83xx | 85 | config SPI_MPC83xx |
79 | tristate "Freescale MPC83xx SPI controller" | 86 | tristate "Freescale MPC83xx SPI controller" |
80 | depends on SPI_MASTER && PPC_83xx && EXPERIMENTAL | 87 | depends on SPI_MASTER && PPC_83xx && EXPERIMENTAL |
@@ -87,6 +94,14 @@ config SPI_MPC83xx | |||
87 | family of PowerPC processors. The MPC83xx uses a simple set of shift | 94 | family of PowerPC processors. The MPC83xx uses a simple set of shift |
88 | registers for data (opposed to the CPM based descriptor model). | 95 | registers for data (opposed to the CPM based descriptor model). |
89 | 96 | ||
97 | config SPI_OMAP_UWIRE | ||
98 | tristate "OMAP1 MicroWire" | ||
99 | depends on SPI_MASTER && ARCH_OMAP1 | ||
100 | select SPI_BITBANG | ||
101 | help | ||
102 | This hooks up to the MicroWire controller on OMAP1 chips. | ||
103 | |||
104 | |||
90 | config SPI_PXA2XX | 105 | config SPI_PXA2XX |
91 | tristate "PXA2xx SSP SPI master" | 106 | tristate "PXA2xx SSP SPI master" |
92 | depends on SPI_MASTER && ARCH_PXA && EXPERIMENTAL | 107 | depends on SPI_MASTER && ARCH_PXA && EXPERIMENTAL |
@@ -95,6 +110,12 @@ config SPI_PXA2XX | |||
95 | The driver can be configured to use any SSP port and additional | 110 | The driver can be configured to use any SSP port and additional |
96 | documentation can be found a Documentation/spi/pxa2xx. | 111 | documentation can be found a Documentation/spi/pxa2xx. |
97 | 112 | ||
113 | config SPI_S3C24XX | ||
114 | tristate "Samsung S3C24XX series SPI" | ||
115 | depends on SPI_MASTER && ARCH_S3C2410 && EXPERIMENTAL | ||
116 | help | ||
117 | SPI driver for Samsung S3C24XX series ARM SoCs | ||
118 | |||
98 | config SPI_S3C24XX_GPIO | 119 | config SPI_S3C24XX_GPIO |
99 | tristate "Samsung S3C24XX series SPI by GPIO" | 120 | tristate "Samsung S3C24XX series SPI by GPIO" |
100 | depends on SPI_MASTER && ARCH_S3C2410 && SPI_BITBANG && EXPERIMENTAL | 121 | depends on SPI_MASTER && ARCH_S3C2410 && SPI_BITBANG && EXPERIMENTAL |
@@ -107,13 +128,6 @@ config SPI_S3C24XX_GPIO | |||
107 | # Add new SPI master controllers in alphabetical order above this line | 128 | # Add new SPI master controllers in alphabetical order above this line |
108 | # | 129 | # |
109 | 130 | ||
110 | |||
111 | config SPI_S3C24XX | ||
112 | tristate "Samsung S3C24XX series SPI" | ||
113 | depends on SPI_MASTER && ARCH_S3C2410 && EXPERIMENTAL | ||
114 | help | ||
115 | SPI driver for Samsung S3C24XX series ARM SoCs | ||
116 | |||
117 | # | 131 | # |
118 | # There are lots of SPI device types, with sensors and memory | 132 | # There are lots of SPI device types, with sensors and memory |
119 | # being probably the most widely used ones. | 133 | # being probably the most widely used ones. |
@@ -121,6 +135,16 @@ config SPI_S3C24XX | |||
121 | comment "SPI Protocol Masters" | 135 | comment "SPI Protocol Masters" |
122 | depends on SPI_MASTER | 136 | depends on SPI_MASTER |
123 | 137 | ||
138 | config SPI_AT25 | ||
139 | tristate "SPI EEPROMs from most vendors" | ||
140 | depends on SPI_MASTER && SYSFS | ||
141 | help | ||
142 | Enable this driver to get read/write support to most SPI EEPROMs, | ||
143 | after you configure the board init code to know about each eeprom | ||
144 | on your target board. | ||
145 | |||
146 | This driver can also be built as a module. If so, the module | ||
147 | will be called at25. | ||
124 | 148 | ||
125 | # | 149 | # |
126 | # Add new SPI protocol masters in alphabetical order above this line | 150 | # Add new SPI protocol masters in alphabetical order above this line |
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 8f4cb67997b3..bf271fe4e536 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile | |||
@@ -13,13 +13,16 @@ obj-$(CONFIG_SPI_MASTER) += spi.o | |||
13 | # SPI master controller drivers (bus) | 13 | # SPI master controller drivers (bus) |
14 | obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o | 14 | obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o |
15 | obj-$(CONFIG_SPI_BUTTERFLY) += spi_butterfly.o | 15 | obj-$(CONFIG_SPI_BUTTERFLY) += spi_butterfly.o |
16 | obj-$(CONFIG_SPI_IMX) += spi_imx.o | ||
16 | obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o | 17 | obj-$(CONFIG_SPI_PXA2XX) += pxa2xx_spi.o |
18 | obj-$(CONFIG_SPI_OMAP_UWIRE) += omap_uwire.o | ||
17 | obj-$(CONFIG_SPI_MPC83xx) += spi_mpc83xx.o | 19 | obj-$(CONFIG_SPI_MPC83xx) += spi_mpc83xx.o |
18 | obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o | 20 | obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o |
19 | obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o | 21 | obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o |
20 | # ... add above this line ... | 22 | # ... add above this line ... |
21 | 23 | ||
22 | # SPI protocol drivers (device/link on bus) | 24 | # SPI protocol drivers (device/link on bus) |
25 | obj-$(CONFIG_SPI_AT25) += at25.o | ||
23 | # ... add above this line ... | 26 | # ... add above this line ... |
24 | 27 | ||
25 | # SPI slave controller drivers (upstream link) | 28 | # SPI slave controller drivers (upstream link) |
diff --git a/drivers/spi/at25.c b/drivers/spi/at25.c new file mode 100644 index 000000000000..48e4f48e779f --- /dev/null +++ b/drivers/spi/at25.c | |||
@@ -0,0 +1,381 @@ | |||
1 | /* | ||
2 | * at25.c -- support most SPI EEPROMs, such as Atmel AT25 models | ||
3 | * | ||
4 | * Copyright (C) 2006 David Brownell | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/slab.h> | ||
16 | #include <linux/delay.h> | ||
17 | #include <linux/device.h> | ||
18 | #include <linux/sched.h> | ||
19 | |||
20 | #include <linux/spi/spi.h> | ||
21 | #include <linux/spi/eeprom.h> | ||
22 | |||
23 | |||
24 | struct at25_data { | ||
25 | struct spi_device *spi; | ||
26 | struct mutex lock; | ||
27 | struct spi_eeprom chip; | ||
28 | struct bin_attribute bin; | ||
29 | unsigned addrlen; | ||
30 | }; | ||
31 | |||
32 | #define AT25_WREN 0x06 /* latch the write enable */ | ||
33 | #define AT25_WRDI 0x04 /* reset the write enable */ | ||
34 | #define AT25_RDSR 0x05 /* read status register */ | ||
35 | #define AT25_WRSR 0x01 /* write status register */ | ||
36 | #define AT25_READ 0x03 /* read byte(s) */ | ||
37 | #define AT25_WRITE 0x02 /* write byte(s)/sector */ | ||
38 | |||
39 | #define AT25_SR_nRDY 0x01 /* nRDY = write-in-progress */ | ||
40 | #define AT25_SR_WEN 0x02 /* write enable (latched) */ | ||
41 | #define AT25_SR_BP0 0x04 /* BP for software writeprotect */ | ||
42 | #define AT25_SR_BP1 0x08 | ||
43 | #define AT25_SR_WPEN 0x80 /* writeprotect enable */ | ||
44 | |||
45 | |||
46 | #define EE_MAXADDRLEN 3 /* 24 bit addresses, up to 2 MBytes */ | ||
47 | |||
48 | /* Specs often allow 5 msec for a page write, sometimes 20 msec; | ||
49 | * it's important to recover from write timeouts. | ||
50 | */ | ||
51 | #define EE_TIMEOUT 25 | ||
52 | |||
53 | /*-------------------------------------------------------------------------*/ | ||
54 | |||
55 | #define io_limit PAGE_SIZE /* bytes */ | ||
56 | |||
57 | static ssize_t | ||
58 | at25_ee_read( | ||
59 | struct at25_data *at25, | ||
60 | char *buf, | ||
61 | unsigned offset, | ||
62 | size_t count | ||
63 | ) | ||
64 | { | ||
65 | u8 command[EE_MAXADDRLEN + 1]; | ||
66 | u8 *cp; | ||
67 | ssize_t status; | ||
68 | struct spi_transfer t[2]; | ||
69 | struct spi_message m; | ||
70 | |||
71 | cp = command; | ||
72 | *cp++ = AT25_READ; | ||
73 | |||
74 | /* 8/16/24-bit address is written MSB first */ | ||
75 | switch (at25->addrlen) { | ||
76 | default: /* case 3 */ | ||
77 | *cp++ = offset >> 16; | ||
78 | case 2: | ||
79 | *cp++ = offset >> 8; | ||
80 | case 1: | ||
81 | case 0: /* can't happen: for better codegen */ | ||
82 | *cp++ = offset >> 0; | ||
83 | } | ||
84 | |||
85 | spi_message_init(&m); | ||
86 | memset(t, 0, sizeof t); | ||
87 | |||
88 | t[0].tx_buf = command; | ||
89 | t[0].len = at25->addrlen + 1; | ||
90 | spi_message_add_tail(&t[0], &m); | ||
91 | |||
92 | t[1].rx_buf = buf; | ||
93 | t[1].len = count; | ||
94 | spi_message_add_tail(&t[1], &m); | ||
95 | |||
96 | mutex_lock(&at25->lock); | ||
97 | |||
98 | /* Read it all at once. | ||
99 | * | ||
100 | * REVISIT that's potentially a problem with large chips, if | ||
101 | * other devices on the bus need to be accessed regularly or | ||
102 | * this chip is clocked very slowly | ||
103 | */ | ||
104 | status = spi_sync(at25->spi, &m); | ||
105 | dev_dbg(&at25->spi->dev, | ||
106 | "read %Zd bytes at %d --> %d\n", | ||
107 | count, offset, (int) status); | ||
108 | |||
109 | mutex_unlock(&at25->lock); | ||
110 | return status ? status : count; | ||
111 | } | ||
112 | |||
113 | static ssize_t | ||
114 | at25_bin_read(struct kobject *kobj, char *buf, loff_t off, size_t count) | ||
115 | { | ||
116 | struct device *dev; | ||
117 | struct at25_data *at25; | ||
118 | |||
119 | dev = container_of(kobj, struct device, kobj); | ||
120 | at25 = dev_get_drvdata(dev); | ||
121 | |||
122 | if (unlikely(off >= at25->bin.size)) | ||
123 | return 0; | ||
124 | if ((off + count) > at25->bin.size) | ||
125 | count = at25->bin.size - off; | ||
126 | if (unlikely(!count)) | ||
127 | return count; | ||
128 | |||
129 | return at25_ee_read(at25, buf, off, count); | ||
130 | } | ||
131 | |||
132 | |||
133 | static ssize_t | ||
134 | at25_ee_write(struct at25_data *at25, char *buf, loff_t off, size_t count) | ||
135 | { | ||
136 | ssize_t status = 0; | ||
137 | unsigned written = 0; | ||
138 | unsigned buf_size; | ||
139 | u8 *bounce; | ||
140 | |||
141 | /* Temp buffer starts with command and address */ | ||
142 | buf_size = at25->chip.page_size; | ||
143 | if (buf_size > io_limit) | ||
144 | buf_size = io_limit; | ||
145 | bounce = kmalloc(buf_size + at25->addrlen + 1, GFP_KERNEL); | ||
146 | if (!bounce) | ||
147 | return -ENOMEM; | ||
148 | |||
149 | /* For write, rollover is within the page ... so we write at | ||
150 | * most one page, then manually roll over to the next page. | ||
151 | */ | ||
152 | bounce[0] = AT25_WRITE; | ||
153 | mutex_lock(&at25->lock); | ||
154 | do { | ||
155 | unsigned long timeout, retries; | ||
156 | unsigned segment; | ||
157 | unsigned offset = (unsigned) off; | ||
158 | u8 *cp = bounce + 1; | ||
159 | |||
160 | *cp = AT25_WREN; | ||
161 | status = spi_write(at25->spi, cp, 1); | ||
162 | if (status < 0) { | ||
163 | dev_dbg(&at25->spi->dev, "WREN --> %d\n", | ||
164 | (int) status); | ||
165 | break; | ||
166 | } | ||
167 | |||
168 | /* 8/16/24-bit address is written MSB first */ | ||
169 | switch (at25->addrlen) { | ||
170 | default: /* case 3 */ | ||
171 | *cp++ = offset >> 16; | ||
172 | case 2: | ||
173 | *cp++ = offset >> 8; | ||
174 | case 1: | ||
175 | case 0: /* can't happen: for better codegen */ | ||
176 | *cp++ = offset >> 0; | ||
177 | } | ||
178 | |||
179 | /* Write as much of a page as we can */ | ||
180 | segment = buf_size - (offset % buf_size); | ||
181 | if (segment > count) | ||
182 | segment = count; | ||
183 | memcpy(cp, buf, segment); | ||
184 | status = spi_write(at25->spi, bounce, | ||
185 | segment + at25->addrlen + 1); | ||
186 | dev_dbg(&at25->spi->dev, | ||
187 | "write %u bytes at %u --> %d\n", | ||
188 | segment, offset, (int) status); | ||
189 | if (status < 0) | ||
190 | break; | ||
191 | |||
192 | /* REVISIT this should detect (or prevent) failed writes | ||
193 | * to readonly sections of the EEPROM... | ||
194 | */ | ||
195 | |||
196 | /* Wait for non-busy status */ | ||
197 | timeout = jiffies + msecs_to_jiffies(EE_TIMEOUT); | ||
198 | retries = 0; | ||
199 | do { | ||
200 | int sr; | ||
201 | |||
202 | sr = spi_w8r8(at25->spi, AT25_RDSR); | ||
203 | if (sr < 0 || (sr & AT25_SR_nRDY)) { | ||
204 | dev_dbg(&at25->spi->dev, | ||
205 | "rdsr --> %d (%02x)\n", sr, sr); | ||
206 | /* at HZ=100, this is sloooow */ | ||
207 | msleep(1); | ||
208 | continue; | ||
209 | } | ||
210 | if (!(sr & AT25_SR_nRDY)) | ||
211 | break; | ||
212 | } while (retries++ < 3 || time_before_eq(jiffies, timeout)); | ||
213 | |||
214 | if (time_after(jiffies, timeout)) { | ||
215 | dev_err(&at25->spi->dev, | ||
216 | "write %d bytes offset %d, " | ||
217 | "timeout after %u msecs\n", | ||
218 | segment, offset, | ||
219 | jiffies_to_msecs(jiffies - | ||
220 | (timeout - EE_TIMEOUT))); | ||
221 | status = -ETIMEDOUT; | ||
222 | break; | ||
223 | } | ||
224 | |||
225 | off += segment; | ||
226 | buf += segment; | ||
227 | count -= segment; | ||
228 | written += segment; | ||
229 | |||
230 | } while (count > 0); | ||
231 | |||
232 | mutex_unlock(&at25->lock); | ||
233 | |||
234 | kfree(bounce); | ||
235 | return written ? written : status; | ||
236 | } | ||
237 | |||
238 | static ssize_t | ||
239 | at25_bin_write(struct kobject *kobj, char *buf, loff_t off, size_t count) | ||
240 | { | ||
241 | struct device *dev; | ||
242 | struct at25_data *at25; | ||
243 | |||
244 | dev = container_of(kobj, struct device, kobj); | ||
245 | at25 = dev_get_drvdata(dev); | ||
246 | |||
247 | if (unlikely(off >= at25->bin.size)) | ||
248 | return -EFBIG; | ||
249 | if ((off + count) > at25->bin.size) | ||
250 | count = at25->bin.size - off; | ||
251 | if (unlikely(!count)) | ||
252 | return count; | ||
253 | |||
254 | return at25_ee_write(at25, buf, off, count); | ||
255 | } | ||
256 | |||
257 | /*-------------------------------------------------------------------------*/ | ||
258 | |||
259 | static int at25_probe(struct spi_device *spi) | ||
260 | { | ||
261 | struct at25_data *at25 = NULL; | ||
262 | const struct spi_eeprom *chip; | ||
263 | int err; | ||
264 | int sr; | ||
265 | int addrlen; | ||
266 | |||
267 | /* Chip description */ | ||
268 | chip = spi->dev.platform_data; | ||
269 | if (!chip) { | ||
270 | dev_dbg(&spi->dev, "no chip description\n"); | ||
271 | err = -ENODEV; | ||
272 | goto fail; | ||
273 | } | ||
274 | |||
275 | /* For now we only support 8/16/24 bit addressing */ | ||
276 | if (chip->flags & EE_ADDR1) | ||
277 | addrlen = 1; | ||
278 | else if (chip->flags & EE_ADDR2) | ||
279 | addrlen = 2; | ||
280 | else if (chip->flags & EE_ADDR3) | ||
281 | addrlen = 3; | ||
282 | else { | ||
283 | dev_dbg(&spi->dev, "unsupported address type\n"); | ||
284 | err = -EINVAL; | ||
285 | goto fail; | ||
286 | } | ||
287 | |||
288 | /* Ping the chip ... the status register is pretty portable, | ||
289 | * unlike probing manufacturer IDs. We do expect that system | ||
290 | * firmware didn't write it in the past few milliseconds! | ||
291 | */ | ||
292 | sr = spi_w8r8(spi, AT25_RDSR); | ||
293 | if (sr < 0 || sr & AT25_SR_nRDY) { | ||
294 | dev_dbg(&at25->spi->dev, "rdsr --> %d (%02x)\n", sr, sr); | ||
295 | err = -ENXIO; | ||
296 | goto fail; | ||
297 | } | ||
298 | |||
299 | if (!(at25 = kzalloc(sizeof *at25, GFP_KERNEL))) { | ||
300 | err = -ENOMEM; | ||
301 | goto fail; | ||
302 | } | ||
303 | |||
304 | mutex_init(&at25->lock); | ||
305 | at25->chip = *chip; | ||
306 | at25->spi = spi_dev_get(spi); | ||
307 | dev_set_drvdata(&spi->dev, at25); | ||
308 | at25->addrlen = addrlen; | ||
309 | |||
310 | /* Export the EEPROM bytes through sysfs, since that's convenient. | ||
311 | * Default to root-only access to the data; EEPROMs often hold data | ||
312 | * that's sensitive for read and/or write, like ethernet addresses, | ||
313 | * security codes, board-specific manufacturing calibrations, etc. | ||
314 | */ | ||
315 | at25->bin.attr.name = "eeprom"; | ||
316 | at25->bin.attr.mode = S_IRUSR; | ||
317 | at25->bin.attr.owner = THIS_MODULE; | ||
318 | at25->bin.read = at25_bin_read; | ||
319 | |||
320 | at25->bin.size = at25->chip.byte_len; | ||
321 | if (!(chip->flags & EE_READONLY)) { | ||
322 | at25->bin.write = at25_bin_write; | ||
323 | at25->bin.attr.mode |= S_IWUSR; | ||
324 | } | ||
325 | |||
326 | err = sysfs_create_bin_file(&spi->dev.kobj, &at25->bin); | ||
327 | if (err) | ||
328 | goto fail; | ||
329 | |||
330 | dev_info(&spi->dev, "%Zd %s %s eeprom%s, pagesize %u\n", | ||
331 | (at25->bin.size < 1024) | ||
332 | ? at25->bin.size | ||
333 | : (at25->bin.size / 1024), | ||
334 | (at25->bin.size < 1024) ? "Byte" : "KByte", | ||
335 | at25->chip.name, | ||
336 | (chip->flags & EE_READONLY) ? " (readonly)" : "", | ||
337 | at25->chip.page_size); | ||
338 | return 0; | ||
339 | fail: | ||
340 | dev_dbg(&spi->dev, "probe err %d\n", err); | ||
341 | kfree(at25); | ||
342 | return err; | ||
343 | } | ||
344 | |||
345 | static int __devexit at25_remove(struct spi_device *spi) | ||
346 | { | ||
347 | struct at25_data *at25; | ||
348 | |||
349 | at25 = dev_get_drvdata(&spi->dev); | ||
350 | sysfs_remove_bin_file(&spi->dev.kobj, &at25->bin); | ||
351 | kfree(at25); | ||
352 | return 0; | ||
353 | } | ||
354 | |||
355 | /*-------------------------------------------------------------------------*/ | ||
356 | |||
357 | static struct spi_driver at25_driver = { | ||
358 | .driver = { | ||
359 | .name = "at25", | ||
360 | .owner = THIS_MODULE, | ||
361 | }, | ||
362 | .probe = at25_probe, | ||
363 | .remove = __devexit_p(at25_remove), | ||
364 | }; | ||
365 | |||
366 | static int __init at25_init(void) | ||
367 | { | ||
368 | return spi_register_driver(&at25_driver); | ||
369 | } | ||
370 | module_init(at25_init); | ||
371 | |||
372 | static void __exit at25_exit(void) | ||
373 | { | ||
374 | spi_unregister_driver(&at25_driver); | ||
375 | } | ||
376 | module_exit(at25_exit); | ||
377 | |||
378 | MODULE_DESCRIPTION("Driver for most SPI EEPROMs"); | ||
379 | MODULE_AUTHOR("David Brownell"); | ||
380 | MODULE_LICENSE("GPL"); | ||
381 | |||
diff --git a/drivers/spi/omap_uwire.c b/drivers/spi/omap_uwire.c new file mode 100644 index 000000000000..366af4959a0f --- /dev/null +++ b/drivers/spi/omap_uwire.c | |||
@@ -0,0 +1,572 @@ | |||
1 | /* | ||
2 | * omap_uwire.c -- MicroWire interface driver for OMAP | ||
3 | * | ||
4 | * Copyright 2003 MontaVista Software Inc. <source@mvista.com> | ||
5 | * | ||
6 | * Ported to 2.6 OMAP uwire interface. | ||
7 | * Copyright (C) 2004 Texas Instruments. | ||
8 | * | ||
9 | * Generalization patches by Juha Yrjola <juha.yrjola@nokia.com> | ||
10 | * | ||
11 | * Copyright (C) 2005 David Brownell (ported to 2.6 SPI interface) | ||
12 | * Copyright (C) 2006 Nokia | ||
13 | * | ||
14 | * Many updates by Imre Deak <imre.deak@nokia.com> | ||
15 | * | ||
16 | * This program is free software; you can redistribute it and/or modify it | ||
17 | * under the terms of the GNU General Public License as published by the | ||
18 | * Free Software Foundation; either version 2 of the License, or (at your | ||
19 | * option) any later version. | ||
20 | * | ||
21 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED | ||
22 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
23 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | ||
24 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
26 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
27 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
28 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
30 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
31 | * | ||
32 | * You should have received a copy of the GNU General Public License along | ||
33 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
34 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
35 | */ | ||
36 | #include <linux/kernel.h> | ||
37 | #include <linux/init.h> | ||
38 | #include <linux/delay.h> | ||
39 | #include <linux/platform_device.h> | ||
40 | #include <linux/workqueue.h> | ||
41 | #include <linux/interrupt.h> | ||
42 | #include <linux/err.h> | ||
43 | #include <linux/clk.h> | ||
44 | |||
45 | #include <linux/spi/spi.h> | ||
46 | #include <linux/spi/spi_bitbang.h> | ||
47 | |||
48 | #include <asm/system.h> | ||
49 | #include <asm/irq.h> | ||
50 | #include <asm/hardware.h> | ||
51 | #include <asm/io.h> | ||
52 | #include <asm/mach-types.h> | ||
53 | |||
54 | #include <asm/arch/mux.h> | ||
55 | #include <asm/arch/omap730.h> /* OMAP730_IO_CONF registers */ | ||
56 | |||
57 | |||
58 | /* FIXME address is now a platform device resource, | ||
59 | * and irqs should show there too... | ||
60 | */ | ||
61 | #define UWIRE_BASE_PHYS 0xFFFB3000 | ||
62 | #define UWIRE_BASE ((void *__iomem)IO_ADDRESS(UWIRE_BASE_PHYS)) | ||
63 | |||
64 | /* uWire Registers: */ | ||
65 | #define UWIRE_IO_SIZE 0x20 | ||
66 | #define UWIRE_TDR 0x00 | ||
67 | #define UWIRE_RDR 0x00 | ||
68 | #define UWIRE_CSR 0x01 | ||
69 | #define UWIRE_SR1 0x02 | ||
70 | #define UWIRE_SR2 0x03 | ||
71 | #define UWIRE_SR3 0x04 | ||
72 | #define UWIRE_SR4 0x05 | ||
73 | #define UWIRE_SR5 0x06 | ||
74 | |||
75 | /* CSR bits */ | ||
76 | #define RDRB (1 << 15) | ||
77 | #define CSRB (1 << 14) | ||
78 | #define START (1 << 13) | ||
79 | #define CS_CMD (1 << 12) | ||
80 | |||
81 | /* SR1 or SR2 bits */ | ||
82 | #define UWIRE_READ_FALLING_EDGE 0x0001 | ||
83 | #define UWIRE_READ_RISING_EDGE 0x0000 | ||
84 | #define UWIRE_WRITE_FALLING_EDGE 0x0000 | ||
85 | #define UWIRE_WRITE_RISING_EDGE 0x0002 | ||
86 | #define UWIRE_CS_ACTIVE_LOW 0x0000 | ||
87 | #define UWIRE_CS_ACTIVE_HIGH 0x0004 | ||
88 | #define UWIRE_FREQ_DIV_2 0x0000 | ||
89 | #define UWIRE_FREQ_DIV_4 0x0008 | ||
90 | #define UWIRE_FREQ_DIV_8 0x0010 | ||
91 | #define UWIRE_CHK_READY 0x0020 | ||
92 | #define UWIRE_CLK_INVERTED 0x0040 | ||
93 | |||
94 | |||
95 | struct uwire_spi { | ||
96 | struct spi_bitbang bitbang; | ||
97 | struct clk *ck; | ||
98 | }; | ||
99 | |||
100 | struct uwire_state { | ||
101 | unsigned bits_per_word; | ||
102 | unsigned div1_idx; | ||
103 | }; | ||
104 | |||
105 | /* REVISIT compile time constant for idx_shift? */ | ||
106 | static unsigned int uwire_idx_shift; | ||
107 | |||
108 | static inline void uwire_write_reg(int idx, u16 val) | ||
109 | { | ||
110 | __raw_writew(val, UWIRE_BASE + (idx << uwire_idx_shift)); | ||
111 | } | ||
112 | |||
113 | static inline u16 uwire_read_reg(int idx) | ||
114 | { | ||
115 | return __raw_readw(UWIRE_BASE + (idx << uwire_idx_shift)); | ||
116 | } | ||
117 | |||
118 | static inline void omap_uwire_configure_mode(u8 cs, unsigned long flags) | ||
119 | { | ||
120 | u16 w, val = 0; | ||
121 | int shift, reg; | ||
122 | |||
123 | if (flags & UWIRE_CLK_INVERTED) | ||
124 | val ^= 0x03; | ||
125 | val = flags & 0x3f; | ||
126 | if (cs & 1) | ||
127 | shift = 6; | ||
128 | else | ||
129 | shift = 0; | ||
130 | if (cs <= 1) | ||
131 | reg = UWIRE_SR1; | ||
132 | else | ||
133 | reg = UWIRE_SR2; | ||
134 | |||
135 | w = uwire_read_reg(reg); | ||
136 | w &= ~(0x3f << shift); | ||
137 | w |= val << shift; | ||
138 | uwire_write_reg(reg, w); | ||
139 | } | ||
140 | |||
141 | static int wait_uwire_csr_flag(u16 mask, u16 val, int might_not_catch) | ||
142 | { | ||
143 | u16 w; | ||
144 | int c = 0; | ||
145 | unsigned long max_jiffies = jiffies + HZ; | ||
146 | |||
147 | for (;;) { | ||
148 | w = uwire_read_reg(UWIRE_CSR); | ||
149 | if ((w & mask) == val) | ||
150 | break; | ||
151 | if (time_after(jiffies, max_jiffies)) { | ||
152 | printk(KERN_ERR "%s: timeout. reg=%#06x " | ||
153 | "mask=%#06x val=%#06x\n", | ||
154 | __FUNCTION__, w, mask, val); | ||
155 | return -1; | ||
156 | } | ||
157 | c++; | ||
158 | if (might_not_catch && c > 64) | ||
159 | break; | ||
160 | } | ||
161 | return 0; | ||
162 | } | ||
163 | |||
164 | static void uwire_set_clk1_div(int div1_idx) | ||
165 | { | ||
166 | u16 w; | ||
167 | |||
168 | w = uwire_read_reg(UWIRE_SR3); | ||
169 | w &= ~(0x03 << 1); | ||
170 | w |= div1_idx << 1; | ||
171 | uwire_write_reg(UWIRE_SR3, w); | ||
172 | } | ||
173 | |||
174 | static void uwire_chipselect(struct spi_device *spi, int value) | ||
175 | { | ||
176 | struct uwire_state *ust = spi->controller_state; | ||
177 | u16 w; | ||
178 | int old_cs; | ||
179 | |||
180 | |||
181 | BUG_ON(wait_uwire_csr_flag(CSRB, 0, 0)); | ||
182 | |||
183 | w = uwire_read_reg(UWIRE_CSR); | ||
184 | old_cs = (w >> 10) & 0x03; | ||
185 | if (value == BITBANG_CS_INACTIVE || old_cs != spi->chip_select) { | ||
186 | /* Deselect this CS, or the previous CS */ | ||
187 | w &= ~CS_CMD; | ||
188 | uwire_write_reg(UWIRE_CSR, w); | ||
189 | } | ||
190 | /* activate specfied chipselect */ | ||
191 | if (value == BITBANG_CS_ACTIVE) { | ||
192 | uwire_set_clk1_div(ust->div1_idx); | ||
193 | /* invert clock? */ | ||
194 | if (spi->mode & SPI_CPOL) | ||
195 | uwire_write_reg(UWIRE_SR4, 1); | ||
196 | else | ||
197 | uwire_write_reg(UWIRE_SR4, 0); | ||
198 | |||
199 | w = spi->chip_select << 10; | ||
200 | w |= CS_CMD; | ||
201 | uwire_write_reg(UWIRE_CSR, w); | ||
202 | } | ||
203 | } | ||
204 | |||
205 | static int uwire_txrx(struct spi_device *spi, struct spi_transfer *t) | ||
206 | { | ||
207 | struct uwire_state *ust = spi->controller_state; | ||
208 | unsigned len = t->len; | ||
209 | unsigned bits = ust->bits_per_word; | ||
210 | unsigned bytes; | ||
211 | u16 val, w; | ||
212 | int status = 0;; | ||
213 | |||
214 | if (!t->tx_buf && !t->rx_buf) | ||
215 | return 0; | ||
216 | |||
217 | /* Microwire doesn't read and write concurrently */ | ||
218 | if (t->tx_buf && t->rx_buf) | ||
219 | return -EPERM; | ||
220 | |||
221 | w = spi->chip_select << 10; | ||
222 | w |= CS_CMD; | ||
223 | |||
224 | if (t->tx_buf) { | ||
225 | const u8 *buf = t->tx_buf; | ||
226 | |||
227 | /* NOTE: DMA could be used for TX transfers */ | ||
228 | |||
229 | /* write one or two bytes at a time */ | ||
230 | while (len >= 1) { | ||
231 | /* tx bit 15 is first sent; we byteswap multibyte words | ||
232 | * (msb-first) on the way out from memory. | ||
233 | */ | ||
234 | val = *buf++; | ||
235 | if (bits > 8) { | ||
236 | bytes = 2; | ||
237 | val |= *buf++ << 8; | ||
238 | } else | ||
239 | bytes = 1; | ||
240 | val <<= 16 - bits; | ||
241 | |||
242 | #ifdef VERBOSE | ||
243 | pr_debug("%s: write-%d =%04x\n", | ||
244 | spi->dev.bus_id, bits, val); | ||
245 | #endif | ||
246 | if (wait_uwire_csr_flag(CSRB, 0, 0)) | ||
247 | goto eio; | ||
248 | |||
249 | uwire_write_reg(UWIRE_TDR, val); | ||
250 | |||
251 | /* start write */ | ||
252 | val = START | w | (bits << 5); | ||
253 | |||
254 | uwire_write_reg(UWIRE_CSR, val); | ||
255 | len -= bytes; | ||
256 | |||
257 | /* Wait till write actually starts. | ||
258 | * This is needed with MPU clock 60+ MHz. | ||
259 | * REVISIT: we may not have time to catch it... | ||
260 | */ | ||
261 | if (wait_uwire_csr_flag(CSRB, CSRB, 1)) | ||
262 | goto eio; | ||
263 | |||
264 | status += bytes; | ||
265 | } | ||
266 | |||
267 | /* REVISIT: save this for later to get more i/o overlap */ | ||
268 | if (wait_uwire_csr_flag(CSRB, 0, 0)) | ||
269 | goto eio; | ||
270 | |||
271 | } else if (t->rx_buf) { | ||
272 | u8 *buf = t->rx_buf; | ||
273 | |||
274 | /* read one or two bytes at a time */ | ||
275 | while (len) { | ||
276 | if (bits > 8) { | ||
277 | bytes = 2; | ||
278 | } else | ||
279 | bytes = 1; | ||
280 | |||
281 | /* start read */ | ||
282 | val = START | w | (bits << 0); | ||
283 | uwire_write_reg(UWIRE_CSR, val); | ||
284 | len -= bytes; | ||
285 | |||
286 | /* Wait till read actually starts */ | ||
287 | (void) wait_uwire_csr_flag(CSRB, CSRB, 1); | ||
288 | |||
289 | if (wait_uwire_csr_flag(RDRB | CSRB, | ||
290 | RDRB, 0)) | ||
291 | goto eio; | ||
292 | |||
293 | /* rx bit 0 is last received; multibyte words will | ||
294 | * be properly byteswapped on the way to memory. | ||
295 | */ | ||
296 | val = uwire_read_reg(UWIRE_RDR); | ||
297 | val &= (1 << bits) - 1; | ||
298 | *buf++ = (u8) val; | ||
299 | if (bytes == 2) | ||
300 | *buf++ = val >> 8; | ||
301 | status += bytes; | ||
302 | #ifdef VERBOSE | ||
303 | pr_debug("%s: read-%d =%04x\n", | ||
304 | spi->dev.bus_id, bits, val); | ||
305 | #endif | ||
306 | |||
307 | } | ||
308 | } | ||
309 | return status; | ||
310 | eio: | ||
311 | return -EIO; | ||
312 | } | ||
313 | |||
314 | static int uwire_setup_transfer(struct spi_device *spi, struct spi_transfer *t) | ||
315 | { | ||
316 | struct uwire_state *ust = spi->controller_state; | ||
317 | struct uwire_spi *uwire; | ||
318 | unsigned flags = 0; | ||
319 | unsigned bits; | ||
320 | unsigned hz; | ||
321 | unsigned long rate; | ||
322 | int div1_idx; | ||
323 | int div1; | ||
324 | int div2; | ||
325 | int status; | ||
326 | |||
327 | uwire = spi_master_get_devdata(spi->master); | ||
328 | |||
329 | if (spi->chip_select > 3) { | ||
330 | pr_debug("%s: cs%d?\n", spi->dev.bus_id, spi->chip_select); | ||
331 | status = -ENODEV; | ||
332 | goto done; | ||
333 | } | ||
334 | |||
335 | bits = spi->bits_per_word; | ||
336 | if (t != NULL && t->bits_per_word) | ||
337 | bits = t->bits_per_word; | ||
338 | if (!bits) | ||
339 | bits = 8; | ||
340 | |||
341 | if (bits > 16) { | ||
342 | pr_debug("%s: wordsize %d?\n", spi->dev.bus_id, bits); | ||
343 | status = -ENODEV; | ||
344 | goto done; | ||
345 | } | ||
346 | ust->bits_per_word = bits; | ||
347 | |||
348 | /* mode 0..3, clock inverted separately; | ||
349 | * standard nCS signaling; | ||
350 | * don't treat DI=high as "not ready" | ||
351 | */ | ||
352 | if (spi->mode & SPI_CS_HIGH) | ||
353 | flags |= UWIRE_CS_ACTIVE_HIGH; | ||
354 | |||
355 | if (spi->mode & SPI_CPOL) | ||
356 | flags |= UWIRE_CLK_INVERTED; | ||
357 | |||
358 | switch (spi->mode & (SPI_CPOL | SPI_CPHA)) { | ||
359 | case SPI_MODE_0: | ||
360 | case SPI_MODE_3: | ||
361 | flags |= UWIRE_WRITE_RISING_EDGE | UWIRE_READ_FALLING_EDGE; | ||
362 | break; | ||
363 | case SPI_MODE_1: | ||
364 | case SPI_MODE_2: | ||
365 | flags |= UWIRE_WRITE_FALLING_EDGE | UWIRE_READ_RISING_EDGE; | ||
366 | break; | ||
367 | } | ||
368 | |||
369 | /* assume it's already enabled */ | ||
370 | rate = clk_get_rate(uwire->ck); | ||
371 | |||
372 | hz = spi->max_speed_hz; | ||
373 | if (t != NULL && t->speed_hz) | ||
374 | hz = t->speed_hz; | ||
375 | |||
376 | if (!hz) { | ||
377 | pr_debug("%s: zero speed?\n", spi->dev.bus_id); | ||
378 | status = -EINVAL; | ||
379 | goto done; | ||
380 | } | ||
381 | |||
382 | /* F_INT = mpu_xor_clk / DIV1 */ | ||
383 | for (div1_idx = 0; div1_idx < 4; div1_idx++) { | ||
384 | switch (div1_idx) { | ||
385 | case 0: | ||
386 | div1 = 2; | ||
387 | break; | ||
388 | case 1: | ||
389 | div1 = 4; | ||
390 | break; | ||
391 | case 2: | ||
392 | div1 = 7; | ||
393 | break; | ||
394 | default: | ||
395 | case 3: | ||
396 | div1 = 10; | ||
397 | break; | ||
398 | } | ||
399 | div2 = (rate / div1 + hz - 1) / hz; | ||
400 | if (div2 <= 8) | ||
401 | break; | ||
402 | } | ||
403 | if (div1_idx == 4) { | ||
404 | pr_debug("%s: lowest clock %ld, need %d\n", | ||
405 | spi->dev.bus_id, rate / 10 / 8, hz); | ||
406 | status = -EDOM; | ||
407 | goto done; | ||
408 | } | ||
409 | |||
410 | /* we have to cache this and reset in uwire_chipselect as this is a | ||
411 | * global parameter and another uwire device can change it under | ||
412 | * us */ | ||
413 | ust->div1_idx = div1_idx; | ||
414 | uwire_set_clk1_div(div1_idx); | ||
415 | |||
416 | rate /= div1; | ||
417 | |||
418 | switch (div2) { | ||
419 | case 0: | ||
420 | case 1: | ||
421 | case 2: | ||
422 | flags |= UWIRE_FREQ_DIV_2; | ||
423 | rate /= 2; | ||
424 | break; | ||
425 | case 3: | ||
426 | case 4: | ||
427 | flags |= UWIRE_FREQ_DIV_4; | ||
428 | rate /= 4; | ||
429 | break; | ||
430 | case 5: | ||
431 | case 6: | ||
432 | case 7: | ||
433 | case 8: | ||
434 | flags |= UWIRE_FREQ_DIV_8; | ||
435 | rate /= 8; | ||
436 | break; | ||
437 | } | ||
438 | omap_uwire_configure_mode(spi->chip_select, flags); | ||
439 | pr_debug("%s: uwire flags %02x, armxor %lu KHz, SCK %lu KHz\n", | ||
440 | __FUNCTION__, flags, | ||
441 | clk_get_rate(uwire->ck) / 1000, | ||
442 | rate / 1000); | ||
443 | status = 0; | ||
444 | done: | ||
445 | return status; | ||
446 | } | ||
447 | |||
448 | static int uwire_setup(struct spi_device *spi) | ||
449 | { | ||
450 | struct uwire_state *ust = spi->controller_state; | ||
451 | |||
452 | if (ust == NULL) { | ||
453 | ust = kzalloc(sizeof(*ust), GFP_KERNEL); | ||
454 | if (ust == NULL) | ||
455 | return -ENOMEM; | ||
456 | spi->controller_state = ust; | ||
457 | } | ||
458 | |||
459 | return uwire_setup_transfer(spi, NULL); | ||
460 | } | ||
461 | |||
462 | static void uwire_cleanup(const struct spi_device *spi) | ||
463 | { | ||
464 | kfree(spi->controller_state); | ||
465 | } | ||
466 | |||
467 | static void uwire_off(struct uwire_spi *uwire) | ||
468 | { | ||
469 | uwire_write_reg(UWIRE_SR3, 0); | ||
470 | clk_disable(uwire->ck); | ||
471 | clk_put(uwire->ck); | ||
472 | spi_master_put(uwire->bitbang.master); | ||
473 | } | ||
474 | |||
475 | static int uwire_probe(struct platform_device *pdev) | ||
476 | { | ||
477 | struct spi_master *master; | ||
478 | struct uwire_spi *uwire; | ||
479 | int status; | ||
480 | |||
481 | master = spi_alloc_master(&pdev->dev, sizeof *uwire); | ||
482 | if (!master) | ||
483 | return -ENODEV; | ||
484 | |||
485 | uwire = spi_master_get_devdata(master); | ||
486 | dev_set_drvdata(&pdev->dev, uwire); | ||
487 | |||
488 | uwire->ck = clk_get(&pdev->dev, "armxor_ck"); | ||
489 | if (!uwire->ck || IS_ERR(uwire->ck)) { | ||
490 | dev_dbg(&pdev->dev, "no mpu_xor_clk ?\n"); | ||
491 | spi_master_put(master); | ||
492 | return -ENODEV; | ||
493 | } | ||
494 | clk_enable(uwire->ck); | ||
495 | |||
496 | if (cpu_is_omap730()) | ||
497 | uwire_idx_shift = 1; | ||
498 | else | ||
499 | uwire_idx_shift = 2; | ||
500 | |||
501 | uwire_write_reg(UWIRE_SR3, 1); | ||
502 | |||
503 | master->bus_num = 2; /* "official" */ | ||
504 | master->num_chipselect = 4; | ||
505 | master->setup = uwire_setup; | ||
506 | master->cleanup = uwire_cleanup; | ||
507 | |||
508 | uwire->bitbang.master = master; | ||
509 | uwire->bitbang.chipselect = uwire_chipselect; | ||
510 | uwire->bitbang.setup_transfer = uwire_setup_transfer; | ||
511 | uwire->bitbang.txrx_bufs = uwire_txrx; | ||
512 | |||
513 | status = spi_bitbang_start(&uwire->bitbang); | ||
514 | if (status < 0) | ||
515 | uwire_off(uwire); | ||
516 | return status; | ||
517 | } | ||
518 | |||
519 | static int uwire_remove(struct platform_device *pdev) | ||
520 | { | ||
521 | struct uwire_spi *uwire = dev_get_drvdata(&pdev->dev); | ||
522 | int status; | ||
523 | |||
524 | // FIXME remove all child devices, somewhere ... | ||
525 | |||
526 | status = spi_bitbang_stop(&uwire->bitbang); | ||
527 | uwire_off(uwire); | ||
528 | return status; | ||
529 | } | ||
530 | |||
531 | static struct platform_driver uwire_driver = { | ||
532 | .driver = { | ||
533 | .name = "omap_uwire", | ||
534 | .bus = &platform_bus_type, | ||
535 | .owner = THIS_MODULE, | ||
536 | }, | ||
537 | .probe = uwire_probe, | ||
538 | .remove = uwire_remove, | ||
539 | // suspend ... unuse ck | ||
540 | // resume ... use ck | ||
541 | }; | ||
542 | |||
543 | static int __init omap_uwire_init(void) | ||
544 | { | ||
545 | /* FIXME move these into the relevant board init code. also, include | ||
546 | * H3 support; it uses tsc2101 like H2 (on a different chipselect). | ||
547 | */ | ||
548 | |||
549 | if (machine_is_omap_h2()) { | ||
550 | /* defaults: W21 SDO, U18 SDI, V19 SCL */ | ||
551 | omap_cfg_reg(N14_1610_UWIRE_CS0); | ||
552 | omap_cfg_reg(N15_1610_UWIRE_CS1); | ||
553 | } | ||
554 | if (machine_is_omap_perseus2()) { | ||
555 | /* configure pins: MPU_UW_nSCS1, MPU_UW_SDO, MPU_UW_SCLK */ | ||
556 | int val = omap_readl(OMAP730_IO_CONF_9) & ~0x00EEE000; | ||
557 | omap_writel(val | 0x00AAA000, OMAP730_IO_CONF_9); | ||
558 | } | ||
559 | |||
560 | return platform_driver_register(&uwire_driver); | ||
561 | } | ||
562 | |||
563 | static void __exit omap_uwire_exit(void) | ||
564 | { | ||
565 | platform_driver_unregister(&uwire_driver); | ||
566 | } | ||
567 | |||
568 | subsys_initcall(omap_uwire_init); | ||
569 | module_exit(omap_uwire_exit); | ||
570 | |||
571 | MODULE_LICENSE("GPL"); | ||
572 | |||
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c index 8b41f9cc2560..9f2c887ffa04 100644 --- a/drivers/spi/pxa2xx_spi.c +++ b/drivers/spi/pxa2xx_spi.c | |||
@@ -1214,9 +1214,9 @@ static int setup(struct spi_device *spi) | |||
1214 | return 0; | 1214 | return 0; |
1215 | } | 1215 | } |
1216 | 1216 | ||
1217 | static void cleanup(const struct spi_device *spi) | 1217 | static void cleanup(struct spi_device *spi) |
1218 | { | 1218 | { |
1219 | struct chip_data *chip = spi_get_ctldata((struct spi_device *)spi); | 1219 | struct chip_data *chip = spi_get_ctldata(spi); |
1220 | 1220 | ||
1221 | kfree(chip); | 1221 | kfree(chip); |
1222 | } | 1222 | } |
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 6307428d2c94..2328128728be 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c | |||
@@ -32,7 +32,7 @@ | |||
32 | */ | 32 | */ |
33 | static void spidev_release(struct device *dev) | 33 | static void spidev_release(struct device *dev) |
34 | { | 34 | { |
35 | const struct spi_device *spi = to_spi_device(dev); | 35 | struct spi_device *spi = to_spi_device(dev); |
36 | 36 | ||
37 | /* spi masters may cleanup for released devices */ | 37 | /* spi masters may cleanup for released devices */ |
38 | if (spi->master->cleanup) | 38 | if (spi->master->cleanup) |
diff --git a/drivers/spi/spi_bitbang.c b/drivers/spi/spi_bitbang.c index 57289b61d0be..24a330d82395 100644 --- a/drivers/spi/spi_bitbang.c +++ b/drivers/spi/spi_bitbang.c | |||
@@ -210,7 +210,7 @@ int spi_bitbang_setup(struct spi_device *spi) | |||
210 | if (!cs->txrx_word) | 210 | if (!cs->txrx_word) |
211 | return -EINVAL; | 211 | return -EINVAL; |
212 | 212 | ||
213 | retval = spi_bitbang_setup_transfer(spi, NULL); | 213 | retval = bitbang->setup_transfer(spi, NULL); |
214 | if (retval < 0) | 214 | if (retval < 0) |
215 | return retval; | 215 | return retval; |
216 | 216 | ||
@@ -238,7 +238,7 @@ EXPORT_SYMBOL_GPL(spi_bitbang_setup); | |||
238 | /** | 238 | /** |
239 | * spi_bitbang_cleanup - default cleanup for per-word I/O loops | 239 | * spi_bitbang_cleanup - default cleanup for per-word I/O loops |
240 | */ | 240 | */ |
241 | void spi_bitbang_cleanup(const struct spi_device *spi) | 241 | void spi_bitbang_cleanup(struct spi_device *spi) |
242 | { | 242 | { |
243 | kfree(spi->controller_state); | 243 | kfree(spi->controller_state); |
244 | } | 244 | } |
@@ -442,9 +442,10 @@ EXPORT_SYMBOL_GPL(spi_bitbang_transfer); | |||
442 | * hardware that basically exposes a shift register) or per-spi_transfer | 442 | * hardware that basically exposes a shift register) or per-spi_transfer |
443 | * (which takes better advantage of hardware like fifos or DMA engines). | 443 | * (which takes better advantage of hardware like fifos or DMA engines). |
444 | * | 444 | * |
445 | * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup and | 445 | * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup, |
446 | * spi_bitbang_cleanup to handle those spi master methods. Those methods are | 446 | * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi |
447 | * the defaults if the bitbang->txrx_bufs routine isn't initialized. | 447 | * master methods. Those methods are the defaults if the bitbang->txrx_bufs |
448 | * routine isn't initialized. | ||
448 | * | 449 | * |
449 | * This routine registers the spi_master, which will process requests in a | 450 | * This routine registers the spi_master, which will process requests in a |
450 | * dedicated task, keeping IRQs unblocked most of the time. To stop | 451 | * dedicated task, keeping IRQs unblocked most of the time. To stop |
diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c new file mode 100644 index 000000000000..6ccf8a12a21d --- /dev/null +++ b/drivers/spi/spi_imx.c | |||
@@ -0,0 +1,1769 @@ | |||
1 | /* | ||
2 | * drivers/spi/spi_imx.c | ||
3 | * | ||
4 | * Copyright (C) 2006 SWAPP | ||
5 | * Andrea Paterniani <a.paterniani@swapp-eng.it> | ||
6 | * | ||
7 | * Initial version inspired by: | ||
8 | * linux-2.6.17-rc3-mm1/drivers/spi/pxa2xx_spi.c | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | */ | ||
20 | |||
21 | #include <linux/init.h> | ||
22 | #include <linux/module.h> | ||
23 | #include <linux/device.h> | ||
24 | #include <linux/ioport.h> | ||
25 | #include <linux/errno.h> | ||
26 | #include <linux/interrupt.h> | ||
27 | #include <linux/platform_device.h> | ||
28 | #include <linux/dma-mapping.h> | ||
29 | #include <linux/spi/spi.h> | ||
30 | #include <linux/workqueue.h> | ||
31 | #include <linux/delay.h> | ||
32 | |||
33 | #include <asm/io.h> | ||
34 | #include <asm/irq.h> | ||
35 | #include <asm/hardware.h> | ||
36 | #include <asm/delay.h> | ||
37 | |||
38 | #include <asm/arch/hardware.h> | ||
39 | #include <asm/arch/imx-dma.h> | ||
40 | #include <asm/arch/spi_imx.h> | ||
41 | |||
42 | /*-------------------------------------------------------------------------*/ | ||
43 | /* SPI Registers offsets from peripheral base address */ | ||
44 | #define SPI_RXDATA (0x00) | ||
45 | #define SPI_TXDATA (0x04) | ||
46 | #define SPI_CONTROL (0x08) | ||
47 | #define SPI_INT_STATUS (0x0C) | ||
48 | #define SPI_TEST (0x10) | ||
49 | #define SPI_PERIOD (0x14) | ||
50 | #define SPI_DMA (0x18) | ||
51 | #define SPI_RESET (0x1C) | ||
52 | |||
53 | /* SPI Control Register Bit Fields & Masks */ | ||
54 | #define SPI_CONTROL_BITCOUNT_MASK (0xF) /* Bit Count Mask */ | ||
55 | #define SPI_CONTROL_BITCOUNT(n) (((n) - 1) & SPI_CONTROL_BITCOUNT_MASK) | ||
56 | #define SPI_CONTROL_POL (0x1 << 4) /* Clock Polarity Mask */ | ||
57 | #define SPI_CONTROL_POL_ACT_HIGH (0x0 << 4) /* Active high pol. (0=idle) */ | ||
58 | #define SPI_CONTROL_POL_ACT_LOW (0x1 << 4) /* Active low pol. (1=idle) */ | ||
59 | #define SPI_CONTROL_PHA (0x1 << 5) /* Clock Phase Mask */ | ||
60 | #define SPI_CONTROL_PHA_0 (0x0 << 5) /* Clock Phase 0 */ | ||
61 | #define SPI_CONTROL_PHA_1 (0x1 << 5) /* Clock Phase 1 */ | ||
62 | #define SPI_CONTROL_SSCTL (0x1 << 6) /* /SS Waveform Select Mask */ | ||
63 | #define SPI_CONTROL_SSCTL_0 (0x0 << 6) /* Master: /SS stays low between SPI burst | ||
64 | Slave: RXFIFO advanced by BIT_COUNT */ | ||
65 | #define SPI_CONTROL_SSCTL_1 (0x1 << 6) /* Master: /SS insert pulse between SPI burst | ||
66 | Slave: RXFIFO advanced by /SS rising edge */ | ||
67 | #define SPI_CONTROL_SSPOL (0x1 << 7) /* /SS Polarity Select Mask */ | ||
68 | #define SPI_CONTROL_SSPOL_ACT_LOW (0x0 << 7) /* /SS Active low */ | ||
69 | #define SPI_CONTROL_SSPOL_ACT_HIGH (0x1 << 7) /* /SS Active high */ | ||
70 | #define SPI_CONTROL_XCH (0x1 << 8) /* Exchange */ | ||
71 | #define SPI_CONTROL_SPIEN (0x1 << 9) /* SPI Module Enable */ | ||
72 | #define SPI_CONTROL_MODE (0x1 << 10) /* SPI Mode Select Mask */ | ||
73 | #define SPI_CONTROL_MODE_SLAVE (0x0 << 10) /* SPI Mode Slave */ | ||
74 | #define SPI_CONTROL_MODE_MASTER (0x1 << 10) /* SPI Mode Master */ | ||
75 | #define SPI_CONTROL_DRCTL (0x3 << 11) /* /SPI_RDY Control Mask */ | ||
76 | #define SPI_CONTROL_DRCTL_0 (0x0 << 11) /* Ignore /SPI_RDY */ | ||
77 | #define SPI_CONTROL_DRCTL_1 (0x1 << 11) /* /SPI_RDY falling edge triggers input */ | ||
78 | #define SPI_CONTROL_DRCTL_2 (0x2 << 11) /* /SPI_RDY active low level triggers input */ | ||
79 | #define SPI_CONTROL_DATARATE (0x7 << 13) /* Data Rate Mask */ | ||
80 | #define SPI_PERCLK2_DIV_MIN (0) /* PERCLK2:4 */ | ||
81 | #define SPI_PERCLK2_DIV_MAX (7) /* PERCLK2:512 */ | ||
82 | #define SPI_CONTROL_DATARATE_MIN (SPI_PERCLK2_DIV_MAX << 13) | ||
83 | #define SPI_CONTROL_DATARATE_MAX (SPI_PERCLK2_DIV_MIN << 13) | ||
84 | #define SPI_CONTROL_DATARATE_BAD (SPI_CONTROL_DATARATE_MIN + 1) | ||
85 | |||
86 | /* SPI Interrupt/Status Register Bit Fields & Masks */ | ||
87 | #define SPI_STATUS_TE (0x1 << 0) /* TXFIFO Empty Status */ | ||
88 | #define SPI_STATUS_TH (0x1 << 1) /* TXFIFO Half Status */ | ||
89 | #define SPI_STATUS_TF (0x1 << 2) /* TXFIFO Full Status */ | ||
90 | #define SPI_STATUS_RR (0x1 << 3) /* RXFIFO Data Ready Status */ | ||
91 | #define SPI_STATUS_RH (0x1 << 4) /* RXFIFO Half Status */ | ||
92 | #define SPI_STATUS_RF (0x1 << 5) /* RXFIFO Full Status */ | ||
93 | #define SPI_STATUS_RO (0x1 << 6) /* RXFIFO Overflow */ | ||
94 | #define SPI_STATUS_BO (0x1 << 7) /* Bit Count Overflow */ | ||
95 | #define SPI_STATUS (0xFF) /* SPI Status Mask */ | ||
96 | #define SPI_INTEN_TE (0x1 << 8) /* TXFIFO Empty Interrupt Enable */ | ||
97 | #define SPI_INTEN_TH (0x1 << 9) /* TXFIFO Half Interrupt Enable */ | ||
98 | #define SPI_INTEN_TF (0x1 << 10) /* TXFIFO Full Interrupt Enable */ | ||
99 | #define SPI_INTEN_RE (0x1 << 11) /* RXFIFO Data Ready Interrupt Enable */ | ||
100 | #define SPI_INTEN_RH (0x1 << 12) /* RXFIFO Half Interrupt Enable */ | ||
101 | #define SPI_INTEN_RF (0x1 << 13) /* RXFIFO Full Interrupt Enable */ | ||
102 | #define SPI_INTEN_RO (0x1 << 14) /* RXFIFO Overflow Interrupt Enable */ | ||
103 | #define SPI_INTEN_BO (0x1 << 15) /* Bit Count Overflow Interrupt Enable */ | ||
104 | #define SPI_INTEN (0xFF << 8) /* SPI Interrupt Enable Mask */ | ||
105 | |||
106 | /* SPI Test Register Bit Fields & Masks */ | ||
107 | #define SPI_TEST_TXCNT (0xF << 0) /* TXFIFO Counter */ | ||
108 | #define SPI_TEST_RXCNT_LSB (4) /* RXFIFO Counter LSB */ | ||
109 | #define SPI_TEST_RXCNT (0xF << 4) /* RXFIFO Counter */ | ||
110 | #define SPI_TEST_SSTATUS (0xF << 8) /* State Machine Status */ | ||
111 | #define SPI_TEST_LBC (0x1 << 14) /* Loop Back Control */ | ||
112 | |||
113 | /* SPI Period Register Bit Fields & Masks */ | ||
114 | #define SPI_PERIOD_WAIT (0x7FFF << 0) /* Wait Between Transactions */ | ||
115 | #define SPI_PERIOD_MAX_WAIT (0x7FFF) /* Max Wait Between | ||
116 | Transactions */ | ||
117 | #define SPI_PERIOD_CSRC (0x1 << 15) /* Period Clock Source Mask */ | ||
118 | #define SPI_PERIOD_CSRC_BCLK (0x0 << 15) /* Period Clock Source is | ||
119 | Bit Clock */ | ||
120 | #define SPI_PERIOD_CSRC_32768 (0x1 << 15) /* Period Clock Source is | ||
121 | 32.768 KHz Clock */ | ||
122 | |||
123 | /* SPI DMA Register Bit Fields & Masks */ | ||
124 | #define SPI_DMA_RHDMA (0xF << 4) /* RXFIFO Half Status */ | ||
125 | #define SPI_DMA_RFDMA (0x1 << 5) /* RXFIFO Full Status */ | ||
126 | #define SPI_DMA_TEDMA (0x1 << 6) /* TXFIFO Empty Status */ | ||
127 | #define SPI_DMA_THDMA (0x1 << 7) /* TXFIFO Half Status */ | ||
128 | #define SPI_DMA_RHDEN (0x1 << 12) /* RXFIFO Half DMA Request Enable */ | ||
129 | #define SPI_DMA_RFDEN (0x1 << 13) /* RXFIFO Full DMA Request Enable */ | ||
130 | #define SPI_DMA_TEDEN (0x1 << 14) /* TXFIFO Empty DMA Request Enable */ | ||
131 | #define SPI_DMA_THDEN (0x1 << 15) /* TXFIFO Half DMA Request Enable */ | ||
132 | |||
133 | /* SPI Soft Reset Register Bit Fields & Masks */ | ||
134 | #define SPI_RESET_START (0x1) /* Start */ | ||
135 | |||
136 | /* Default SPI configuration values */ | ||
137 | #define SPI_DEFAULT_CONTROL \ | ||
138 | ( \ | ||
139 | SPI_CONTROL_BITCOUNT(16) | \ | ||
140 | SPI_CONTROL_POL_ACT_HIGH | \ | ||
141 | SPI_CONTROL_PHA_0 | \ | ||
142 | SPI_CONTROL_SPIEN | \ | ||
143 | SPI_CONTROL_SSCTL_1 | \ | ||
144 | SPI_CONTROL_MODE_MASTER | \ | ||
145 | SPI_CONTROL_DRCTL_0 | \ | ||
146 | SPI_CONTROL_DATARATE_MIN \ | ||
147 | ) | ||
148 | #define SPI_DEFAULT_ENABLE_LOOPBACK (0) | ||
149 | #define SPI_DEFAULT_ENABLE_DMA (0) | ||
150 | #define SPI_DEFAULT_PERIOD_WAIT (8) | ||
151 | /*-------------------------------------------------------------------------*/ | ||
152 | |||
153 | |||
154 | /*-------------------------------------------------------------------------*/ | ||
155 | /* TX/RX SPI FIFO size */ | ||
156 | #define SPI_FIFO_DEPTH (8) | ||
157 | #define SPI_FIFO_BYTE_WIDTH (2) | ||
158 | #define SPI_FIFO_OVERFLOW_MARGIN (2) | ||
159 | |||
160 | /* DMA burst lenght for half full/empty request trigger */ | ||
161 | #define SPI_DMA_BLR (SPI_FIFO_DEPTH * SPI_FIFO_BYTE_WIDTH / 2) | ||
162 | |||
163 | /* Dummy char output to achieve reads. | ||
164 | Choosing something different from all zeroes may help pattern recogition | ||
165 | for oscilloscope analysis, but may break some drivers. */ | ||
166 | #define SPI_DUMMY_u8 0 | ||
167 | #define SPI_DUMMY_u16 ((SPI_DUMMY_u8 << 8) | SPI_DUMMY_u8) | ||
168 | #define SPI_DUMMY_u32 ((SPI_DUMMY_u16 << 16) | SPI_DUMMY_u16) | ||
169 | |||
170 | /** | ||
171 | * Macro to change a u32 field: | ||
172 | * @r : register to edit | ||
173 | * @m : bit mask | ||
174 | * @v : new value for the field correctly bit-alligned | ||
175 | */ | ||
176 | #define u32_EDIT(r, m, v) r = (r & ~(m)) | (v) | ||
177 | |||
178 | /* Message state */ | ||
179 | #define START_STATE ((void*)0) | ||
180 | #define RUNNING_STATE ((void*)1) | ||
181 | #define DONE_STATE ((void*)2) | ||
182 | #define ERROR_STATE ((void*)-1) | ||
183 | |||
184 | /* Queue state */ | ||
185 | #define QUEUE_RUNNING (0) | ||
186 | #define QUEUE_STOPPED (1) | ||
187 | |||
188 | #define IS_DMA_ALIGNED(x) (((u32)(x) & 0x03) == 0) | ||
189 | /*-------------------------------------------------------------------------*/ | ||
190 | |||
191 | |||
192 | /*-------------------------------------------------------------------------*/ | ||
193 | /* Driver data structs */ | ||
194 | |||
195 | /* Context */ | ||
196 | struct driver_data { | ||
197 | /* Driver model hookup */ | ||
198 | struct platform_device *pdev; | ||
199 | |||
200 | /* SPI framework hookup */ | ||
201 | struct spi_master *master; | ||
202 | |||
203 | /* IMX hookup */ | ||
204 | struct spi_imx_master *master_info; | ||
205 | |||
206 | /* Memory resources and SPI regs virtual address */ | ||
207 | struct resource *ioarea; | ||
208 | void __iomem *regs; | ||
209 | |||
210 | /* SPI RX_DATA physical address */ | ||
211 | dma_addr_t rd_data_phys; | ||
212 | |||
213 | /* Driver message queue */ | ||
214 | struct workqueue_struct *workqueue; | ||
215 | struct work_struct work; | ||
216 | spinlock_t lock; | ||
217 | struct list_head queue; | ||
218 | int busy; | ||
219 | int run; | ||
220 | |||
221 | /* Message Transfer pump */ | ||
222 | struct tasklet_struct pump_transfers; | ||
223 | |||
224 | /* Current message, transfer and state */ | ||
225 | struct spi_message *cur_msg; | ||
226 | struct spi_transfer *cur_transfer; | ||
227 | struct chip_data *cur_chip; | ||
228 | |||
229 | /* Rd / Wr buffers pointers */ | ||
230 | size_t len; | ||
231 | void *tx; | ||
232 | void *tx_end; | ||
233 | void *rx; | ||
234 | void *rx_end; | ||
235 | |||
236 | u8 rd_only; | ||
237 | u8 n_bytes; | ||
238 | int cs_change; | ||
239 | |||
240 | /* Function pointers */ | ||
241 | irqreturn_t (*transfer_handler)(struct driver_data *drv_data); | ||
242 | void (*cs_control)(u32 command); | ||
243 | |||
244 | /* DMA setup */ | ||
245 | int rx_channel; | ||
246 | int tx_channel; | ||
247 | dma_addr_t rx_dma; | ||
248 | dma_addr_t tx_dma; | ||
249 | int rx_dma_needs_unmap; | ||
250 | int tx_dma_needs_unmap; | ||
251 | size_t tx_map_len; | ||
252 | u32 dummy_dma_buf ____cacheline_aligned; | ||
253 | }; | ||
254 | |||
255 | /* Runtime state */ | ||
256 | struct chip_data { | ||
257 | u32 control; | ||
258 | u32 period; | ||
259 | u32 test; | ||
260 | |||
261 | u8 enable_dma:1; | ||
262 | u8 bits_per_word; | ||
263 | u8 n_bytes; | ||
264 | u32 max_speed_hz; | ||
265 | |||
266 | void (*cs_control)(u32 command); | ||
267 | }; | ||
268 | /*-------------------------------------------------------------------------*/ | ||
269 | |||
270 | |||
271 | static void pump_messages(struct work_struct *work); | ||
272 | |||
273 | static int flush(struct driver_data *drv_data) | ||
274 | { | ||
275 | unsigned long limit = loops_per_jiffy << 1; | ||
276 | void __iomem *regs = drv_data->regs; | ||
277 | volatile u32 d; | ||
278 | |||
279 | dev_dbg(&drv_data->pdev->dev, "flush\n"); | ||
280 | do { | ||
281 | while (readl(regs + SPI_INT_STATUS) & SPI_STATUS_RR) | ||
282 | d = readl(regs + SPI_RXDATA); | ||
283 | } while ((readl(regs + SPI_CONTROL) & SPI_CONTROL_XCH) && limit--); | ||
284 | |||
285 | return limit; | ||
286 | } | ||
287 | |||
288 | static void restore_state(struct driver_data *drv_data) | ||
289 | { | ||
290 | void __iomem *regs = drv_data->regs; | ||
291 | struct chip_data *chip = drv_data->cur_chip; | ||
292 | |||
293 | /* Load chip registers */ | ||
294 | dev_dbg(&drv_data->pdev->dev, | ||
295 | "restore_state\n" | ||
296 | " test = 0x%08X\n" | ||
297 | " control = 0x%08X\n", | ||
298 | chip->test, | ||
299 | chip->control); | ||
300 | writel(chip->test, regs + SPI_TEST); | ||
301 | writel(chip->period, regs + SPI_PERIOD); | ||
302 | writel(0, regs + SPI_INT_STATUS); | ||
303 | writel(chip->control, regs + SPI_CONTROL); | ||
304 | } | ||
305 | |||
306 | static void null_cs_control(u32 command) | ||
307 | { | ||
308 | } | ||
309 | |||
310 | static inline u32 data_to_write(struct driver_data *drv_data) | ||
311 | { | ||
312 | return ((u32)(drv_data->tx_end - drv_data->tx)) / drv_data->n_bytes; | ||
313 | } | ||
314 | |||
315 | static inline u32 data_to_read(struct driver_data *drv_data) | ||
316 | { | ||
317 | return ((u32)(drv_data->rx_end - drv_data->rx)) / drv_data->n_bytes; | ||
318 | } | ||
319 | |||
320 | static int write(struct driver_data *drv_data) | ||
321 | { | ||
322 | void __iomem *regs = drv_data->regs; | ||
323 | void *tx = drv_data->tx; | ||
324 | void *tx_end = drv_data->tx_end; | ||
325 | u8 n_bytes = drv_data->n_bytes; | ||
326 | u32 remaining_writes; | ||
327 | u32 fifo_avail_space; | ||
328 | u32 n; | ||
329 | u16 d; | ||
330 | |||
331 | /* Compute how many fifo writes to do */ | ||
332 | remaining_writes = (u32)(tx_end - tx) / n_bytes; | ||
333 | fifo_avail_space = SPI_FIFO_DEPTH - | ||
334 | (readl(regs + SPI_TEST) & SPI_TEST_TXCNT); | ||
335 | if (drv_data->rx && (fifo_avail_space > SPI_FIFO_OVERFLOW_MARGIN)) | ||
336 | /* Fix misunderstood receive overflow */ | ||
337 | fifo_avail_space -= SPI_FIFO_OVERFLOW_MARGIN; | ||
338 | n = min(remaining_writes, fifo_avail_space); | ||
339 | |||
340 | dev_dbg(&drv_data->pdev->dev, | ||
341 | "write type %s\n" | ||
342 | " remaining writes = %d\n" | ||
343 | " fifo avail space = %d\n" | ||
344 | " fifo writes = %d\n", | ||
345 | (n_bytes == 1) ? "u8" : "u16", | ||
346 | remaining_writes, | ||
347 | fifo_avail_space, | ||
348 | n); | ||
349 | |||
350 | if (n > 0) { | ||
351 | /* Fill SPI TXFIFO */ | ||
352 | if (drv_data->rd_only) { | ||
353 | tx += n * n_bytes; | ||
354 | while (n--) | ||
355 | writel(SPI_DUMMY_u16, regs + SPI_TXDATA); | ||
356 | } else { | ||
357 | if (n_bytes == 1) { | ||
358 | while (n--) { | ||
359 | d = *(u8*)tx; | ||
360 | writel(d, regs + SPI_TXDATA); | ||
361 | tx += 1; | ||
362 | } | ||
363 | } else { | ||
364 | while (n--) { | ||
365 | d = *(u16*)tx; | ||
366 | writel(d, regs + SPI_TXDATA); | ||
367 | tx += 2; | ||
368 | } | ||
369 | } | ||
370 | } | ||
371 | |||
372 | /* Trigger transfer */ | ||
373 | writel(readl(regs + SPI_CONTROL) | SPI_CONTROL_XCH, | ||
374 | regs + SPI_CONTROL); | ||
375 | |||
376 | /* Update tx pointer */ | ||
377 | drv_data->tx = tx; | ||
378 | } | ||
379 | |||
380 | return (tx >= tx_end); | ||
381 | } | ||
382 | |||
383 | static int read(struct driver_data *drv_data) | ||
384 | { | ||
385 | void __iomem *regs = drv_data->regs; | ||
386 | void *rx = drv_data->rx; | ||
387 | void *rx_end = drv_data->rx_end; | ||
388 | u8 n_bytes = drv_data->n_bytes; | ||
389 | u32 remaining_reads; | ||
390 | u32 fifo_rxcnt; | ||
391 | u32 n; | ||
392 | u16 d; | ||
393 | |||
394 | /* Compute how many fifo reads to do */ | ||
395 | remaining_reads = (u32)(rx_end - rx) / n_bytes; | ||
396 | fifo_rxcnt = (readl(regs + SPI_TEST) & SPI_TEST_RXCNT) >> | ||
397 | SPI_TEST_RXCNT_LSB; | ||
398 | n = min(remaining_reads, fifo_rxcnt); | ||
399 | |||
400 | dev_dbg(&drv_data->pdev->dev, | ||
401 | "read type %s\n" | ||
402 | " remaining reads = %d\n" | ||
403 | " fifo rx count = %d\n" | ||
404 | " fifo reads = %d\n", | ||
405 | (n_bytes == 1) ? "u8" : "u16", | ||
406 | remaining_reads, | ||
407 | fifo_rxcnt, | ||
408 | n); | ||
409 | |||
410 | if (n > 0) { | ||
411 | /* Read SPI RXFIFO */ | ||
412 | if (n_bytes == 1) { | ||
413 | while (n--) { | ||
414 | d = readl(regs + SPI_RXDATA); | ||
415 | *((u8*)rx) = d; | ||
416 | rx += 1; | ||
417 | } | ||
418 | } else { | ||
419 | while (n--) { | ||
420 | d = readl(regs + SPI_RXDATA); | ||
421 | *((u16*)rx) = d; | ||
422 | rx += 2; | ||
423 | } | ||
424 | } | ||
425 | |||
426 | /* Update rx pointer */ | ||
427 | drv_data->rx = rx; | ||
428 | } | ||
429 | |||
430 | return (rx >= rx_end); | ||
431 | } | ||
432 | |||
433 | static void *next_transfer(struct driver_data *drv_data) | ||
434 | { | ||
435 | struct spi_message *msg = drv_data->cur_msg; | ||
436 | struct spi_transfer *trans = drv_data->cur_transfer; | ||
437 | |||
438 | /* Move to next transfer */ | ||
439 | if (trans->transfer_list.next != &msg->transfers) { | ||
440 | drv_data->cur_transfer = | ||
441 | list_entry(trans->transfer_list.next, | ||
442 | struct spi_transfer, | ||
443 | transfer_list); | ||
444 | return RUNNING_STATE; | ||
445 | } | ||
446 | |||
447 | return DONE_STATE; | ||
448 | } | ||
449 | |||
450 | static int map_dma_buffers(struct driver_data *drv_data) | ||
451 | { | ||
452 | struct spi_message *msg; | ||
453 | struct device *dev; | ||
454 | void *buf; | ||
455 | |||
456 | drv_data->rx_dma_needs_unmap = 0; | ||
457 | drv_data->tx_dma_needs_unmap = 0; | ||
458 | |||
459 | if (!drv_data->master_info->enable_dma || | ||
460 | !drv_data->cur_chip->enable_dma) | ||
461 | return -1; | ||
462 | |||
463 | msg = drv_data->cur_msg; | ||
464 | dev = &msg->spi->dev; | ||
465 | if (msg->is_dma_mapped) { | ||
466 | if (drv_data->tx_dma) | ||
467 | /* The caller provided at least dma and cpu virtual | ||
468 | address for write; pump_transfers() will consider the | ||
469 | transfer as write only if cpu rx virtual address is | ||
470 | NULL */ | ||
471 | return 0; | ||
472 | |||
473 | if (drv_data->rx_dma) { | ||
474 | /* The caller provided dma and cpu virtual address to | ||
475 | performe read only transfer --> | ||
476 | use drv_data->dummy_dma_buf for dummy writes to | ||
477 | achive reads */ | ||
478 | buf = &drv_data->dummy_dma_buf; | ||
479 | drv_data->tx_map_len = sizeof(drv_data->dummy_dma_buf); | ||
480 | drv_data->tx_dma = dma_map_single(dev, | ||
481 | buf, | ||
482 | drv_data->tx_map_len, | ||
483 | DMA_TO_DEVICE); | ||
484 | if (dma_mapping_error(drv_data->tx_dma)) | ||
485 | return -1; | ||
486 | |||
487 | drv_data->tx_dma_needs_unmap = 1; | ||
488 | |||
489 | /* Flags transfer as rd_only for pump_transfers() DMA | ||
490 | regs programming (should be redundant) */ | ||
491 | drv_data->tx = NULL; | ||
492 | |||
493 | return 0; | ||
494 | } | ||
495 | } | ||
496 | |||
497 | if (!IS_DMA_ALIGNED(drv_data->rx) || !IS_DMA_ALIGNED(drv_data->tx)) | ||
498 | return -1; | ||
499 | |||
500 | /* NULL rx means write-only transfer and no map needed | ||
501 | since rx DMA will not be used */ | ||
502 | if (drv_data->rx) { | ||
503 | buf = drv_data->rx; | ||
504 | drv_data->rx_dma = dma_map_single( | ||
505 | dev, | ||
506 | buf, | ||
507 | drv_data->len, | ||
508 | DMA_FROM_DEVICE); | ||
509 | if (dma_mapping_error(drv_data->rx_dma)) | ||
510 | return -1; | ||
511 | drv_data->rx_dma_needs_unmap = 1; | ||
512 | } | ||
513 | |||
514 | if (drv_data->tx == NULL) { | ||
515 | /* Read only message --> use drv_data->dummy_dma_buf for dummy | ||
516 | writes to achive reads */ | ||
517 | buf = &drv_data->dummy_dma_buf; | ||
518 | drv_data->tx_map_len = sizeof(drv_data->dummy_dma_buf); | ||
519 | } else { | ||
520 | buf = drv_data->tx; | ||
521 | drv_data->tx_map_len = drv_data->len; | ||
522 | } | ||
523 | drv_data->tx_dma = dma_map_single(dev, | ||
524 | buf, | ||
525 | drv_data->tx_map_len, | ||
526 | DMA_TO_DEVICE); | ||
527 | if (dma_mapping_error(drv_data->tx_dma)) { | ||
528 | if (drv_data->rx_dma) { | ||
529 | dma_unmap_single(dev, | ||
530 | drv_data->rx_dma, | ||
531 | drv_data->len, | ||
532 | DMA_FROM_DEVICE); | ||
533 | drv_data->rx_dma_needs_unmap = 0; | ||
534 | } | ||
535 | return -1; | ||
536 | } | ||
537 | drv_data->tx_dma_needs_unmap = 1; | ||
538 | |||
539 | return 0; | ||
540 | } | ||
541 | |||
542 | static void unmap_dma_buffers(struct driver_data *drv_data) | ||
543 | { | ||
544 | struct spi_message *msg = drv_data->cur_msg; | ||
545 | struct device *dev = &msg->spi->dev; | ||
546 | |||
547 | if (drv_data->rx_dma_needs_unmap) { | ||
548 | dma_unmap_single(dev, | ||
549 | drv_data->rx_dma, | ||
550 | drv_data->len, | ||
551 | DMA_FROM_DEVICE); | ||
552 | drv_data->rx_dma_needs_unmap = 0; | ||
553 | } | ||
554 | if (drv_data->tx_dma_needs_unmap) { | ||
555 | dma_unmap_single(dev, | ||
556 | drv_data->tx_dma, | ||
557 | drv_data->tx_map_len, | ||
558 | DMA_TO_DEVICE); | ||
559 | drv_data->tx_dma_needs_unmap = 0; | ||
560 | } | ||
561 | } | ||
562 | |||
563 | /* Caller already set message->status (dma is already blocked) */ | ||
564 | static void giveback(struct spi_message *message, struct driver_data *drv_data) | ||
565 | { | ||
566 | void __iomem *regs = drv_data->regs; | ||
567 | |||
568 | /* Bring SPI to sleep; restore_state() and pump_transfer() | ||
569 | will do new setup */ | ||
570 | writel(0, regs + SPI_INT_STATUS); | ||
571 | writel(0, regs + SPI_DMA); | ||
572 | |||
573 | drv_data->cs_control(SPI_CS_DEASSERT); | ||
574 | |||
575 | message->state = NULL; | ||
576 | if (message->complete) | ||
577 | message->complete(message->context); | ||
578 | |||
579 | drv_data->cur_msg = NULL; | ||
580 | drv_data->cur_transfer = NULL; | ||
581 | drv_data->cur_chip = NULL; | ||
582 | queue_work(drv_data->workqueue, &drv_data->work); | ||
583 | } | ||
584 | |||
585 | static void dma_err_handler(int channel, void *data, int errcode) | ||
586 | { | ||
587 | struct driver_data *drv_data = data; | ||
588 | struct spi_message *msg = drv_data->cur_msg; | ||
589 | |||
590 | dev_dbg(&drv_data->pdev->dev, "dma_err_handler\n"); | ||
591 | |||
592 | /* Disable both rx and tx dma channels */ | ||
593 | imx_dma_disable(drv_data->rx_channel); | ||
594 | imx_dma_disable(drv_data->tx_channel); | ||
595 | |||
596 | if (flush(drv_data) == 0) | ||
597 | dev_err(&drv_data->pdev->dev, | ||
598 | "dma_err_handler - flush failed\n"); | ||
599 | |||
600 | unmap_dma_buffers(drv_data); | ||
601 | |||
602 | msg->state = ERROR_STATE; | ||
603 | tasklet_schedule(&drv_data->pump_transfers); | ||
604 | } | ||
605 | |||
606 | static void dma_tx_handler(int channel, void *data) | ||
607 | { | ||
608 | struct driver_data *drv_data = data; | ||
609 | |||
610 | dev_dbg(&drv_data->pdev->dev, "dma_tx_handler\n"); | ||
611 | |||
612 | imx_dma_disable(channel); | ||
613 | |||
614 | /* Now waits for TX FIFO empty */ | ||
615 | writel(readl(drv_data->regs + SPI_INT_STATUS) | SPI_INTEN_TE, | ||
616 | drv_data->regs + SPI_INT_STATUS); | ||
617 | } | ||
618 | |||
619 | static irqreturn_t dma_transfer(struct driver_data *drv_data) | ||
620 | { | ||
621 | u32 status; | ||
622 | struct spi_message *msg = drv_data->cur_msg; | ||
623 | void __iomem *regs = drv_data->regs; | ||
624 | unsigned long limit; | ||
625 | |||
626 | status = readl(regs + SPI_INT_STATUS); | ||
627 | |||
628 | if ((status & SPI_INTEN_RO) && (status & SPI_STATUS_RO)) { | ||
629 | writel(status & ~SPI_INTEN, regs + SPI_INT_STATUS); | ||
630 | |||
631 | imx_dma_disable(drv_data->rx_channel); | ||
632 | unmap_dma_buffers(drv_data); | ||
633 | |||
634 | if (flush(drv_data) == 0) | ||
635 | dev_err(&drv_data->pdev->dev, | ||
636 | "dma_transfer - flush failed\n"); | ||
637 | |||
638 | dev_warn(&drv_data->pdev->dev, | ||
639 | "dma_transfer - fifo overun\n"); | ||
640 | |||
641 | msg->state = ERROR_STATE; | ||
642 | tasklet_schedule(&drv_data->pump_transfers); | ||
643 | |||
644 | return IRQ_HANDLED; | ||
645 | } | ||
646 | |||
647 | if (status & SPI_STATUS_TE) { | ||
648 | writel(status & ~SPI_INTEN_TE, regs + SPI_INT_STATUS); | ||
649 | |||
650 | if (drv_data->rx) { | ||
651 | /* Wait end of transfer before read trailing data */ | ||
652 | limit = loops_per_jiffy << 1; | ||
653 | while ((readl(regs + SPI_CONTROL) & SPI_CONTROL_XCH) && | ||
654 | limit--); | ||
655 | |||
656 | if (limit == 0) | ||
657 | dev_err(&drv_data->pdev->dev, | ||
658 | "dma_transfer - end of tx failed\n"); | ||
659 | else | ||
660 | dev_dbg(&drv_data->pdev->dev, | ||
661 | "dma_transfer - end of tx\n"); | ||
662 | |||
663 | imx_dma_disable(drv_data->rx_channel); | ||
664 | unmap_dma_buffers(drv_data); | ||
665 | |||
666 | /* Calculate number of trailing data and read them */ | ||
667 | dev_dbg(&drv_data->pdev->dev, | ||
668 | "dma_transfer - test = 0x%08X\n", | ||
669 | readl(regs + SPI_TEST)); | ||
670 | drv_data->rx = drv_data->rx_end - | ||
671 | ((readl(regs + SPI_TEST) & | ||
672 | SPI_TEST_RXCNT) >> | ||
673 | SPI_TEST_RXCNT_LSB)*drv_data->n_bytes; | ||
674 | read(drv_data); | ||
675 | } else { | ||
676 | /* Write only transfer */ | ||
677 | unmap_dma_buffers(drv_data); | ||
678 | |||
679 | if (flush(drv_data) == 0) | ||
680 | dev_err(&drv_data->pdev->dev, | ||
681 | "dma_transfer - flush failed\n"); | ||
682 | } | ||
683 | |||
684 | /* End of transfer, update total byte transfered */ | ||
685 | msg->actual_length += drv_data->len; | ||
686 | |||
687 | /* Release chip select if requested, transfer delays are | ||
688 | handled in pump_transfers() */ | ||
689 | if (drv_data->cs_change) | ||
690 | drv_data->cs_control(SPI_CS_DEASSERT); | ||
691 | |||
692 | /* Move to next transfer */ | ||
693 | msg->state = next_transfer(drv_data); | ||
694 | |||
695 | /* Schedule transfer tasklet */ | ||
696 | tasklet_schedule(&drv_data->pump_transfers); | ||
697 | |||
698 | return IRQ_HANDLED; | ||
699 | } | ||
700 | |||
701 | /* Opps problem detected */ | ||
702 | return IRQ_NONE; | ||
703 | } | ||
704 | |||
705 | static irqreturn_t interrupt_wronly_transfer(struct driver_data *drv_data) | ||
706 | { | ||
707 | struct spi_message *msg = drv_data->cur_msg; | ||
708 | void __iomem *regs = drv_data->regs; | ||
709 | u32 status; | ||
710 | irqreturn_t handled = IRQ_NONE; | ||
711 | |||
712 | status = readl(regs + SPI_INT_STATUS); | ||
713 | |||
714 | while (status & SPI_STATUS_TH) { | ||
715 | dev_dbg(&drv_data->pdev->dev, | ||
716 | "interrupt_wronly_transfer - status = 0x%08X\n", status); | ||
717 | |||
718 | /* Pump data */ | ||
719 | if (write(drv_data)) { | ||
720 | writel(readl(regs + SPI_INT_STATUS) & ~SPI_INTEN, | ||
721 | regs + SPI_INT_STATUS); | ||
722 | |||
723 | dev_dbg(&drv_data->pdev->dev, | ||
724 | "interrupt_wronly_transfer - end of tx\n"); | ||
725 | |||
726 | if (flush(drv_data) == 0) | ||
727 | dev_err(&drv_data->pdev->dev, | ||
728 | "interrupt_wronly_transfer - " | ||
729 | "flush failed\n"); | ||
730 | |||
731 | /* End of transfer, update total byte transfered */ | ||
732 | msg->actual_length += drv_data->len; | ||
733 | |||
734 | /* Release chip select if requested, transfer delays are | ||
735 | handled in pump_transfers */ | ||
736 | if (drv_data->cs_change) | ||
737 | drv_data->cs_control(SPI_CS_DEASSERT); | ||
738 | |||
739 | /* Move to next transfer */ | ||
740 | msg->state = next_transfer(drv_data); | ||
741 | |||
742 | /* Schedule transfer tasklet */ | ||
743 | tasklet_schedule(&drv_data->pump_transfers); | ||
744 | |||
745 | return IRQ_HANDLED; | ||
746 | } | ||
747 | |||
748 | status = readl(regs + SPI_INT_STATUS); | ||
749 | |||
750 | /* We did something */ | ||
751 | handled = IRQ_HANDLED; | ||
752 | } | ||
753 | |||
754 | return handled; | ||
755 | } | ||
756 | |||
757 | static irqreturn_t interrupt_transfer(struct driver_data *drv_data) | ||
758 | { | ||
759 | struct spi_message *msg = drv_data->cur_msg; | ||
760 | void __iomem *regs = drv_data->regs; | ||
761 | u32 status; | ||
762 | irqreturn_t handled = IRQ_NONE; | ||
763 | unsigned long limit; | ||
764 | |||
765 | status = readl(regs + SPI_INT_STATUS); | ||
766 | |||
767 | while (status & (SPI_STATUS_TH | SPI_STATUS_RO)) { | ||
768 | dev_dbg(&drv_data->pdev->dev, | ||
769 | "interrupt_transfer - status = 0x%08X\n", status); | ||
770 | |||
771 | if (status & SPI_STATUS_RO) { | ||
772 | writel(readl(regs + SPI_INT_STATUS) & ~SPI_INTEN, | ||
773 | regs + SPI_INT_STATUS); | ||
774 | |||
775 | dev_warn(&drv_data->pdev->dev, | ||
776 | "interrupt_transfer - fifo overun\n" | ||
777 | " data not yet written = %d\n" | ||
778 | " data not yet read = %d\n", | ||
779 | data_to_write(drv_data), | ||
780 | data_to_read(drv_data)); | ||
781 | |||
782 | if (flush(drv_data) == 0) | ||
783 | dev_err(&drv_data->pdev->dev, | ||
784 | "interrupt_transfer - flush failed\n"); | ||
785 | |||
786 | msg->state = ERROR_STATE; | ||
787 | tasklet_schedule(&drv_data->pump_transfers); | ||
788 | |||
789 | return IRQ_HANDLED; | ||
790 | } | ||
791 | |||
792 | /* Pump data */ | ||
793 | read(drv_data); | ||
794 | if (write(drv_data)) { | ||
795 | writel(readl(regs + SPI_INT_STATUS) & ~SPI_INTEN, | ||
796 | regs + SPI_INT_STATUS); | ||
797 | |||
798 | dev_dbg(&drv_data->pdev->dev, | ||
799 | "interrupt_transfer - end of tx\n"); | ||
800 | |||
801 | /* Read trailing bytes */ | ||
802 | limit = loops_per_jiffy << 1; | ||
803 | while ((read(drv_data) == 0) && limit--); | ||
804 | |||
805 | if (limit == 0) | ||
806 | dev_err(&drv_data->pdev->dev, | ||
807 | "interrupt_transfer - " | ||
808 | "trailing byte read failed\n"); | ||
809 | else | ||
810 | dev_dbg(&drv_data->pdev->dev, | ||
811 | "interrupt_transfer - end of rx\n"); | ||
812 | |||
813 | /* End of transfer, update total byte transfered */ | ||
814 | msg->actual_length += drv_data->len; | ||
815 | |||
816 | /* Release chip select if requested, transfer delays are | ||
817 | handled in pump_transfers */ | ||
818 | if (drv_data->cs_change) | ||
819 | drv_data->cs_control(SPI_CS_DEASSERT); | ||
820 | |||
821 | /* Move to next transfer */ | ||
822 | msg->state = next_transfer(drv_data); | ||
823 | |||
824 | /* Schedule transfer tasklet */ | ||
825 | tasklet_schedule(&drv_data->pump_transfers); | ||
826 | |||
827 | return IRQ_HANDLED; | ||
828 | } | ||
829 | |||
830 | status = readl(regs + SPI_INT_STATUS); | ||
831 | |||
832 | /* We did something */ | ||
833 | handled = IRQ_HANDLED; | ||
834 | } | ||
835 | |||
836 | return handled; | ||
837 | } | ||
838 | |||
839 | static irqreturn_t spi_int(int irq, void *dev_id) | ||
840 | { | ||
841 | struct driver_data *drv_data = (struct driver_data *)dev_id; | ||
842 | |||
843 | if (!drv_data->cur_msg) { | ||
844 | dev_err(&drv_data->pdev->dev, | ||
845 | "spi_int - bad message state\n"); | ||
846 | /* Never fail */ | ||
847 | return IRQ_HANDLED; | ||
848 | } | ||
849 | |||
850 | return drv_data->transfer_handler(drv_data); | ||
851 | } | ||
852 | |||
853 | static inline u32 spi_speed_hz(u32 data_rate) | ||
854 | { | ||
855 | return imx_get_perclk2() / (4 << ((data_rate) >> 13)); | ||
856 | } | ||
857 | |||
858 | static u32 spi_data_rate(u32 speed_hz) | ||
859 | { | ||
860 | u32 div; | ||
861 | u32 quantized_hz = imx_get_perclk2() >> 2; | ||
862 | |||
863 | for (div = SPI_PERCLK2_DIV_MIN; | ||
864 | div <= SPI_PERCLK2_DIV_MAX; | ||
865 | div++, quantized_hz >>= 1) { | ||
866 | if (quantized_hz <= speed_hz) | ||
867 | /* Max available speed LEQ required speed */ | ||
868 | return div << 13; | ||
869 | } | ||
870 | return SPI_CONTROL_DATARATE_BAD; | ||
871 | } | ||
872 | |||
873 | static void pump_transfers(unsigned long data) | ||
874 | { | ||
875 | struct driver_data *drv_data = (struct driver_data *)data; | ||
876 | struct spi_message *message; | ||
877 | struct spi_transfer *transfer, *previous; | ||
878 | struct chip_data *chip; | ||
879 | void __iomem *regs; | ||
880 | u32 tmp, control; | ||
881 | |||
882 | dev_dbg(&drv_data->pdev->dev, "pump_transfer\n"); | ||
883 | |||
884 | message = drv_data->cur_msg; | ||
885 | |||
886 | /* Handle for abort */ | ||
887 | if (message->state == ERROR_STATE) { | ||
888 | message->status = -EIO; | ||
889 | giveback(message, drv_data); | ||
890 | return; | ||
891 | } | ||
892 | |||
893 | /* Handle end of message */ | ||
894 | if (message->state == DONE_STATE) { | ||
895 | message->status = 0; | ||
896 | giveback(message, drv_data); | ||
897 | return; | ||
898 | } | ||
899 | |||
900 | chip = drv_data->cur_chip; | ||
901 | |||
902 | /* Delay if requested at end of transfer*/ | ||
903 | transfer = drv_data->cur_transfer; | ||
904 | if (message->state == RUNNING_STATE) { | ||
905 | previous = list_entry(transfer->transfer_list.prev, | ||
906 | struct spi_transfer, | ||
907 | transfer_list); | ||
908 | if (previous->delay_usecs) | ||
909 | udelay(previous->delay_usecs); | ||
910 | } else { | ||
911 | /* START_STATE */ | ||
912 | message->state = RUNNING_STATE; | ||
913 | drv_data->cs_control = chip->cs_control; | ||
914 | } | ||
915 | |||
916 | transfer = drv_data->cur_transfer; | ||
917 | drv_data->tx = (void *)transfer->tx_buf; | ||
918 | drv_data->tx_end = drv_data->tx + transfer->len; | ||
919 | drv_data->rx = transfer->rx_buf; | ||
920 | drv_data->rx_end = drv_data->rx + transfer->len; | ||
921 | drv_data->rx_dma = transfer->rx_dma; | ||
922 | drv_data->tx_dma = transfer->tx_dma; | ||
923 | drv_data->len = transfer->len; | ||
924 | drv_data->cs_change = transfer->cs_change; | ||
925 | drv_data->rd_only = (drv_data->tx == NULL); | ||
926 | |||
927 | regs = drv_data->regs; | ||
928 | control = readl(regs + SPI_CONTROL); | ||
929 | |||
930 | /* Bits per word setup */ | ||
931 | tmp = transfer->bits_per_word; | ||
932 | if (tmp == 0) { | ||
933 | /* Use device setup */ | ||
934 | tmp = chip->bits_per_word; | ||
935 | drv_data->n_bytes = chip->n_bytes; | ||
936 | } else | ||
937 | /* Use per-transfer setup */ | ||
938 | drv_data->n_bytes = (tmp <= 8) ? 1 : 2; | ||
939 | u32_EDIT(control, SPI_CONTROL_BITCOUNT_MASK, tmp - 1); | ||
940 | |||
941 | /* Speed setup (surely valid because already checked) */ | ||
942 | tmp = transfer->speed_hz; | ||
943 | if (tmp == 0) | ||
944 | tmp = chip->max_speed_hz; | ||
945 | tmp = spi_data_rate(tmp); | ||
946 | u32_EDIT(control, SPI_CONTROL_DATARATE, tmp); | ||
947 | |||
948 | writel(control, regs + SPI_CONTROL); | ||
949 | |||
950 | /* Assert device chip-select */ | ||
951 | drv_data->cs_control(SPI_CS_ASSERT); | ||
952 | |||
953 | /* DMA cannot read/write SPI FIFOs other than 16 bits at a time; hence | ||
954 | if bits_per_word is less or equal 8 PIO transfers are performed. | ||
955 | Moreover DMA is convinient for transfer length bigger than FIFOs | ||
956 | byte size. */ | ||
957 | if ((drv_data->n_bytes == 2) && | ||
958 | (drv_data->len > SPI_FIFO_DEPTH*SPI_FIFO_BYTE_WIDTH) && | ||
959 | (map_dma_buffers(drv_data) == 0)) { | ||
960 | dev_dbg(&drv_data->pdev->dev, | ||
961 | "pump dma transfer\n" | ||
962 | " tx = %p\n" | ||
963 | " tx_dma = %08X\n" | ||
964 | " rx = %p\n" | ||
965 | " rx_dma = %08X\n" | ||
966 | " len = %d\n", | ||
967 | drv_data->tx, | ||
968 | (unsigned int)drv_data->tx_dma, | ||
969 | drv_data->rx, | ||
970 | (unsigned int)drv_data->rx_dma, | ||
971 | drv_data->len); | ||
972 | |||
973 | /* Ensure we have the correct interrupt handler */ | ||
974 | drv_data->transfer_handler = dma_transfer; | ||
975 | |||
976 | /* Trigger transfer */ | ||
977 | writel(readl(regs + SPI_CONTROL) | SPI_CONTROL_XCH, | ||
978 | regs + SPI_CONTROL); | ||
979 | |||
980 | /* Setup tx DMA */ | ||
981 | if (drv_data->tx) | ||
982 | /* Linear source address */ | ||
983 | CCR(drv_data->tx_channel) = | ||
984 | CCR_DMOD_FIFO | | ||
985 | CCR_SMOD_LINEAR | | ||
986 | CCR_SSIZ_32 | CCR_DSIZ_16 | | ||
987 | CCR_REN; | ||
988 | else | ||
989 | /* Read only transfer -> fixed source address for | ||
990 | dummy write to achive read */ | ||
991 | CCR(drv_data->tx_channel) = | ||
992 | CCR_DMOD_FIFO | | ||
993 | CCR_SMOD_FIFO | | ||
994 | CCR_SSIZ_32 | CCR_DSIZ_16 | | ||
995 | CCR_REN; | ||
996 | |||
997 | imx_dma_setup_single( | ||
998 | drv_data->tx_channel, | ||
999 | drv_data->tx_dma, | ||
1000 | drv_data->len, | ||
1001 | drv_data->rd_data_phys + 4, | ||
1002 | DMA_MODE_WRITE); | ||
1003 | |||
1004 | if (drv_data->rx) { | ||
1005 | /* Setup rx DMA for linear destination address */ | ||
1006 | CCR(drv_data->rx_channel) = | ||
1007 | CCR_DMOD_LINEAR | | ||
1008 | CCR_SMOD_FIFO | | ||
1009 | CCR_DSIZ_32 | CCR_SSIZ_16 | | ||
1010 | CCR_REN; | ||
1011 | imx_dma_setup_single( | ||
1012 | drv_data->rx_channel, | ||
1013 | drv_data->rx_dma, | ||
1014 | drv_data->len, | ||
1015 | drv_data->rd_data_phys, | ||
1016 | DMA_MODE_READ); | ||
1017 | imx_dma_enable(drv_data->rx_channel); | ||
1018 | |||
1019 | /* Enable SPI interrupt */ | ||
1020 | writel(SPI_INTEN_RO, regs + SPI_INT_STATUS); | ||
1021 | |||
1022 | /* Set SPI to request DMA service on both | ||
1023 | Rx and Tx half fifo watermark */ | ||
1024 | writel(SPI_DMA_RHDEN | SPI_DMA_THDEN, regs + SPI_DMA); | ||
1025 | } else | ||
1026 | /* Write only access -> set SPI to request DMA | ||
1027 | service on Tx half fifo watermark */ | ||
1028 | writel(SPI_DMA_THDEN, regs + SPI_DMA); | ||
1029 | |||
1030 | imx_dma_enable(drv_data->tx_channel); | ||
1031 | } else { | ||
1032 | dev_dbg(&drv_data->pdev->dev, | ||
1033 | "pump pio transfer\n" | ||
1034 | " tx = %p\n" | ||
1035 | " rx = %p\n" | ||
1036 | " len = %d\n", | ||
1037 | drv_data->tx, | ||
1038 | drv_data->rx, | ||
1039 | drv_data->len); | ||
1040 | |||
1041 | /* Ensure we have the correct interrupt handler */ | ||
1042 | if (drv_data->rx) | ||
1043 | drv_data->transfer_handler = interrupt_transfer; | ||
1044 | else | ||
1045 | drv_data->transfer_handler = interrupt_wronly_transfer; | ||
1046 | |||
1047 | /* Enable SPI interrupt */ | ||
1048 | if (drv_data->rx) | ||
1049 | writel(SPI_INTEN_TH | SPI_INTEN_RO, | ||
1050 | regs + SPI_INT_STATUS); | ||
1051 | else | ||
1052 | writel(SPI_INTEN_TH, regs + SPI_INT_STATUS); | ||
1053 | } | ||
1054 | } | ||
1055 | |||
1056 | static void pump_messages(struct work_struct *work) | ||
1057 | { | ||
1058 | struct driver_data *drv_data = | ||
1059 | container_of(work, struct driver_data, work); | ||
1060 | unsigned long flags; | ||
1061 | |||
1062 | /* Lock queue and check for queue work */ | ||
1063 | spin_lock_irqsave(&drv_data->lock, flags); | ||
1064 | if (list_empty(&drv_data->queue) || drv_data->run == QUEUE_STOPPED) { | ||
1065 | drv_data->busy = 0; | ||
1066 | spin_unlock_irqrestore(&drv_data->lock, flags); | ||
1067 | return; | ||
1068 | } | ||
1069 | |||
1070 | /* Make sure we are not already running a message */ | ||
1071 | if (drv_data->cur_msg) { | ||
1072 | spin_unlock_irqrestore(&drv_data->lock, flags); | ||
1073 | return; | ||
1074 | } | ||
1075 | |||
1076 | /* Extract head of queue */ | ||
1077 | drv_data->cur_msg = list_entry(drv_data->queue.next, | ||
1078 | struct spi_message, queue); | ||
1079 | list_del_init(&drv_data->cur_msg->queue); | ||
1080 | drv_data->busy = 1; | ||
1081 | spin_unlock_irqrestore(&drv_data->lock, flags); | ||
1082 | |||
1083 | /* Initial message state */ | ||
1084 | drv_data->cur_msg->state = START_STATE; | ||
1085 | drv_data->cur_transfer = list_entry(drv_data->cur_msg->transfers.next, | ||
1086 | struct spi_transfer, | ||
1087 | transfer_list); | ||
1088 | |||
1089 | /* Setup the SPI using the per chip configuration */ | ||
1090 | drv_data->cur_chip = spi_get_ctldata(drv_data->cur_msg->spi); | ||
1091 | restore_state(drv_data); | ||
1092 | |||
1093 | /* Mark as busy and launch transfers */ | ||
1094 | tasklet_schedule(&drv_data->pump_transfers); | ||
1095 | } | ||
1096 | |||
1097 | static int transfer(struct spi_device *spi, struct spi_message *msg) | ||
1098 | { | ||
1099 | struct driver_data *drv_data = spi_master_get_devdata(spi->master); | ||
1100 | u32 min_speed_hz, max_speed_hz, tmp; | ||
1101 | struct spi_transfer *trans; | ||
1102 | unsigned long flags; | ||
1103 | |||
1104 | msg->actual_length = 0; | ||
1105 | |||
1106 | /* Per transfer setup check */ | ||
1107 | min_speed_hz = spi_speed_hz(SPI_CONTROL_DATARATE_MIN); | ||
1108 | max_speed_hz = spi->max_speed_hz; | ||
1109 | list_for_each_entry(trans, &msg->transfers, transfer_list) { | ||
1110 | tmp = trans->bits_per_word; | ||
1111 | if (tmp > 16) { | ||
1112 | dev_err(&drv_data->pdev->dev, | ||
1113 | "message rejected : " | ||
1114 | "invalid transfer bits_per_word (%d bits)\n", | ||
1115 | tmp); | ||
1116 | goto msg_rejected; | ||
1117 | } | ||
1118 | tmp = trans->speed_hz; | ||
1119 | if (tmp) { | ||
1120 | if (tmp < min_speed_hz) { | ||
1121 | dev_err(&drv_data->pdev->dev, | ||
1122 | "message rejected : " | ||
1123 | "device min speed (%d Hz) exceeds " | ||
1124 | "required transfer speed (%d Hz)\n", | ||
1125 | min_speed_hz, | ||
1126 | tmp); | ||
1127 | goto msg_rejected; | ||
1128 | } else if (tmp > max_speed_hz) { | ||
1129 | dev_err(&drv_data->pdev->dev, | ||
1130 | "message rejected : " | ||
1131 | "transfer speed (%d Hz) exceeds " | ||
1132 | "device max speed (%d Hz)\n", | ||
1133 | tmp, | ||
1134 | max_speed_hz); | ||
1135 | goto msg_rejected; | ||
1136 | } | ||
1137 | } | ||
1138 | } | ||
1139 | |||
1140 | /* Message accepted */ | ||
1141 | msg->status = -EINPROGRESS; | ||
1142 | msg->state = START_STATE; | ||
1143 | |||
1144 | spin_lock_irqsave(&drv_data->lock, flags); | ||
1145 | if (drv_data->run == QUEUE_STOPPED) { | ||
1146 | spin_unlock_irqrestore(&drv_data->lock, flags); | ||
1147 | return -ESHUTDOWN; | ||
1148 | } | ||
1149 | |||
1150 | list_add_tail(&msg->queue, &drv_data->queue); | ||
1151 | if (drv_data->run == QUEUE_RUNNING && !drv_data->busy) | ||
1152 | queue_work(drv_data->workqueue, &drv_data->work); | ||
1153 | |||
1154 | spin_unlock_irqrestore(&drv_data->lock, flags); | ||
1155 | return 0; | ||
1156 | |||
1157 | msg_rejected: | ||
1158 | /* Message rejected and not queued */ | ||
1159 | msg->status = -EINVAL; | ||
1160 | msg->state = ERROR_STATE; | ||
1161 | if (msg->complete) | ||
1162 | msg->complete(msg->context); | ||
1163 | return -EINVAL; | ||
1164 | } | ||
1165 | |||
1166 | /* On first setup bad values must free chip_data memory since will cause | ||
1167 | spi_new_device to fail. Bad value setup from protocol driver are simply not | ||
1168 | applied and notified to the calling driver. */ | ||
1169 | static int setup(struct spi_device *spi) | ||
1170 | { | ||
1171 | struct spi_imx_chip *chip_info; | ||
1172 | struct chip_data *chip; | ||
1173 | int first_setup = 0; | ||
1174 | u32 tmp; | ||
1175 | int status = 0; | ||
1176 | |||
1177 | /* Get controller data */ | ||
1178 | chip_info = spi->controller_data; | ||
1179 | |||
1180 | /* Get controller_state */ | ||
1181 | chip = spi_get_ctldata(spi); | ||
1182 | if (chip == NULL) { | ||
1183 | first_setup = 1; | ||
1184 | |||
1185 | chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL); | ||
1186 | if (!chip) { | ||
1187 | dev_err(&spi->dev, | ||
1188 | "setup - cannot allocate controller state"); | ||
1189 | return -ENOMEM; | ||
1190 | } | ||
1191 | chip->control = SPI_DEFAULT_CONTROL; | ||
1192 | |||
1193 | if (chip_info == NULL) { | ||
1194 | /* spi_board_info.controller_data not is supplied */ | ||
1195 | chip_info = kzalloc(sizeof(struct spi_imx_chip), | ||
1196 | GFP_KERNEL); | ||
1197 | if (!chip_info) { | ||
1198 | dev_err(&spi->dev, | ||
1199 | "setup - " | ||
1200 | "cannot allocate controller data"); | ||
1201 | status = -ENOMEM; | ||
1202 | goto err_first_setup; | ||
1203 | } | ||
1204 | /* Set controller data default value */ | ||
1205 | chip_info->enable_loopback = | ||
1206 | SPI_DEFAULT_ENABLE_LOOPBACK; | ||
1207 | chip_info->enable_dma = SPI_DEFAULT_ENABLE_DMA; | ||
1208 | chip_info->ins_ss_pulse = 1; | ||
1209 | chip_info->bclk_wait = SPI_DEFAULT_PERIOD_WAIT; | ||
1210 | chip_info->cs_control = null_cs_control; | ||
1211 | } | ||
1212 | } | ||
1213 | |||
1214 | /* Now set controller state based on controller data */ | ||
1215 | |||
1216 | if (first_setup) { | ||
1217 | /* SPI loopback */ | ||
1218 | if (chip_info->enable_loopback) | ||
1219 | chip->test = SPI_TEST_LBC; | ||
1220 | else | ||
1221 | chip->test = 0; | ||
1222 | |||
1223 | /* SPI dma driven */ | ||
1224 | chip->enable_dma = chip_info->enable_dma; | ||
1225 | |||
1226 | /* SPI /SS pulse between spi burst */ | ||
1227 | if (chip_info->ins_ss_pulse) | ||
1228 | u32_EDIT(chip->control, | ||
1229 | SPI_CONTROL_SSCTL, SPI_CONTROL_SSCTL_1); | ||
1230 | else | ||
1231 | u32_EDIT(chip->control, | ||
1232 | SPI_CONTROL_SSCTL, SPI_CONTROL_SSCTL_0); | ||
1233 | |||
1234 | /* SPI bclk waits between each bits_per_word spi burst */ | ||
1235 | if (chip_info->bclk_wait > SPI_PERIOD_MAX_WAIT) { | ||
1236 | dev_err(&spi->dev, | ||
1237 | "setup - " | ||
1238 | "bclk_wait exceeds max allowed (%d)\n", | ||
1239 | SPI_PERIOD_MAX_WAIT); | ||
1240 | goto err_first_setup; | ||
1241 | } | ||
1242 | chip->period = SPI_PERIOD_CSRC_BCLK | | ||
1243 | (chip_info->bclk_wait & SPI_PERIOD_WAIT); | ||
1244 | } | ||
1245 | |||
1246 | /* SPI mode */ | ||
1247 | tmp = spi->mode; | ||
1248 | if (tmp & SPI_LSB_FIRST) { | ||
1249 | status = -EINVAL; | ||
1250 | if (first_setup) { | ||
1251 | dev_err(&spi->dev, | ||
1252 | "setup - " | ||
1253 | "HW doesn't support LSB first transfer\n"); | ||
1254 | goto err_first_setup; | ||
1255 | } else { | ||
1256 | dev_err(&spi->dev, | ||
1257 | "setup - " | ||
1258 | "HW doesn't support LSB first transfer, " | ||
1259 | "default to MSB first\n"); | ||
1260 | spi->mode &= ~SPI_LSB_FIRST; | ||
1261 | } | ||
1262 | } | ||
1263 | if (tmp & SPI_CS_HIGH) { | ||
1264 | u32_EDIT(chip->control, | ||
1265 | SPI_CONTROL_SSPOL, SPI_CONTROL_SSPOL_ACT_HIGH); | ||
1266 | } | ||
1267 | switch (tmp & SPI_MODE_3) { | ||
1268 | case SPI_MODE_0: | ||
1269 | tmp = 0; | ||
1270 | break; | ||
1271 | case SPI_MODE_1: | ||
1272 | tmp = SPI_CONTROL_PHA_1; | ||
1273 | break; | ||
1274 | case SPI_MODE_2: | ||
1275 | tmp = SPI_CONTROL_POL_ACT_LOW; | ||
1276 | break; | ||
1277 | default: | ||
1278 | /* SPI_MODE_3 */ | ||
1279 | tmp = SPI_CONTROL_PHA_1 | SPI_CONTROL_POL_ACT_LOW; | ||
1280 | break; | ||
1281 | } | ||
1282 | u32_EDIT(chip->control, SPI_CONTROL_POL | SPI_CONTROL_PHA, tmp); | ||
1283 | |||
1284 | /* SPI word width */ | ||
1285 | tmp = spi->bits_per_word; | ||
1286 | if (tmp == 0) { | ||
1287 | tmp = 8; | ||
1288 | spi->bits_per_word = 8; | ||
1289 | } else if (tmp > 16) { | ||
1290 | status = -EINVAL; | ||
1291 | dev_err(&spi->dev, | ||
1292 | "setup - " | ||
1293 | "invalid bits_per_word (%d)\n", | ||
1294 | tmp); | ||
1295 | if (first_setup) | ||
1296 | goto err_first_setup; | ||
1297 | else { | ||
1298 | /* Undo setup using chip as backup copy */ | ||
1299 | tmp = chip->bits_per_word; | ||
1300 | spi->bits_per_word = tmp; | ||
1301 | } | ||
1302 | } | ||
1303 | chip->bits_per_word = tmp; | ||
1304 | u32_EDIT(chip->control, SPI_CONTROL_BITCOUNT_MASK, tmp - 1); | ||
1305 | chip->n_bytes = (tmp <= 8) ? 1 : 2; | ||
1306 | |||
1307 | /* SPI datarate */ | ||
1308 | tmp = spi_data_rate(spi->max_speed_hz); | ||
1309 | if (tmp == SPI_CONTROL_DATARATE_BAD) { | ||
1310 | status = -EINVAL; | ||
1311 | dev_err(&spi->dev, | ||
1312 | "setup - " | ||
1313 | "HW min speed (%d Hz) exceeds required " | ||
1314 | "max speed (%d Hz)\n", | ||
1315 | spi_speed_hz(SPI_CONTROL_DATARATE_MIN), | ||
1316 | spi->max_speed_hz); | ||
1317 | if (first_setup) | ||
1318 | goto err_first_setup; | ||
1319 | else | ||
1320 | /* Undo setup using chip as backup copy */ | ||
1321 | spi->max_speed_hz = chip->max_speed_hz; | ||
1322 | } else { | ||
1323 | u32_EDIT(chip->control, SPI_CONTROL_DATARATE, tmp); | ||
1324 | /* Actual rounded max_speed_hz */ | ||
1325 | tmp = spi_speed_hz(tmp); | ||
1326 | spi->max_speed_hz = tmp; | ||
1327 | chip->max_speed_hz = tmp; | ||
1328 | } | ||
1329 | |||
1330 | /* SPI chip-select management */ | ||
1331 | if (chip_info->cs_control) | ||
1332 | chip->cs_control = chip_info->cs_control; | ||
1333 | else | ||
1334 | chip->cs_control = null_cs_control; | ||
1335 | |||
1336 | /* Save controller_state */ | ||
1337 | spi_set_ctldata(spi, chip); | ||
1338 | |||
1339 | /* Summary */ | ||
1340 | dev_dbg(&spi->dev, | ||
1341 | "setup succeded\n" | ||
1342 | " loopback enable = %s\n" | ||
1343 | " dma enable = %s\n" | ||
1344 | " insert /ss pulse = %s\n" | ||
1345 | " period wait = %d\n" | ||
1346 | " mode = %d\n" | ||
1347 | " bits per word = %d\n" | ||
1348 | " min speed = %d Hz\n" | ||
1349 | " rounded max speed = %d Hz\n", | ||
1350 | chip->test & SPI_TEST_LBC ? "Yes" : "No", | ||
1351 | chip->enable_dma ? "Yes" : "No", | ||
1352 | chip->control & SPI_CONTROL_SSCTL ? "Yes" : "No", | ||
1353 | chip->period & SPI_PERIOD_WAIT, | ||
1354 | spi->mode, | ||
1355 | spi->bits_per_word, | ||
1356 | spi_speed_hz(SPI_CONTROL_DATARATE_MIN), | ||
1357 | spi->max_speed_hz); | ||
1358 | |||
1359 | err_first_setup: | ||
1360 | kfree(chip); | ||
1361 | return status; | ||
1362 | } | ||
1363 | |||
1364 | static void cleanup(const struct spi_device *spi) | ||
1365 | { | ||
1366 | struct chip_data *chip = spi_get_ctldata((struct spi_device *)spi); | ||
1367 | kfree(chip); | ||
1368 | } | ||
1369 | |||
1370 | static int init_queue(struct driver_data *drv_data) | ||
1371 | { | ||
1372 | INIT_LIST_HEAD(&drv_data->queue); | ||
1373 | spin_lock_init(&drv_data->lock); | ||
1374 | |||
1375 | drv_data->run = QUEUE_STOPPED; | ||
1376 | drv_data->busy = 0; | ||
1377 | |||
1378 | tasklet_init(&drv_data->pump_transfers, | ||
1379 | pump_transfers, (unsigned long)drv_data); | ||
1380 | |||
1381 | INIT_WORK(&drv_data->work, pump_messages); | ||
1382 | drv_data->workqueue = create_singlethread_workqueue( | ||
1383 | drv_data->master->cdev.dev->bus_id); | ||
1384 | if (drv_data->workqueue == NULL) | ||
1385 | return -EBUSY; | ||
1386 | |||
1387 | return 0; | ||
1388 | } | ||
1389 | |||
1390 | static int start_queue(struct driver_data *drv_data) | ||
1391 | { | ||
1392 | unsigned long flags; | ||
1393 | |||
1394 | spin_lock_irqsave(&drv_data->lock, flags); | ||
1395 | |||
1396 | if (drv_data->run == QUEUE_RUNNING || drv_data->busy) { | ||
1397 | spin_unlock_irqrestore(&drv_data->lock, flags); | ||
1398 | return -EBUSY; | ||
1399 | } | ||
1400 | |||
1401 | drv_data->run = QUEUE_RUNNING; | ||
1402 | drv_data->cur_msg = NULL; | ||
1403 | drv_data->cur_transfer = NULL; | ||
1404 | drv_data->cur_chip = NULL; | ||
1405 | spin_unlock_irqrestore(&drv_data->lock, flags); | ||
1406 | |||
1407 | queue_work(drv_data->workqueue, &drv_data->work); | ||
1408 | |||
1409 | return 0; | ||
1410 | } | ||
1411 | |||
1412 | static int stop_queue(struct driver_data *drv_data) | ||
1413 | { | ||
1414 | unsigned long flags; | ||
1415 | unsigned limit = 500; | ||
1416 | int status = 0; | ||
1417 | |||
1418 | spin_lock_irqsave(&drv_data->lock, flags); | ||
1419 | |||
1420 | /* This is a bit lame, but is optimized for the common execution path. | ||
1421 | * A wait_queue on the drv_data->busy could be used, but then the common | ||
1422 | * execution path (pump_messages) would be required to call wake_up or | ||
1423 | * friends on every SPI message. Do this instead */ | ||
1424 | drv_data->run = QUEUE_STOPPED; | ||
1425 | while (!list_empty(&drv_data->queue) && drv_data->busy && limit--) { | ||
1426 | spin_unlock_irqrestore(&drv_data->lock, flags); | ||
1427 | msleep(10); | ||
1428 | spin_lock_irqsave(&drv_data->lock, flags); | ||
1429 | } | ||
1430 | |||
1431 | if (!list_empty(&drv_data->queue) || drv_data->busy) | ||
1432 | status = -EBUSY; | ||
1433 | |||
1434 | spin_unlock_irqrestore(&drv_data->lock, flags); | ||
1435 | |||
1436 | return status; | ||
1437 | } | ||
1438 | |||
1439 | static int destroy_queue(struct driver_data *drv_data) | ||
1440 | { | ||
1441 | int status; | ||
1442 | |||
1443 | status = stop_queue(drv_data); | ||
1444 | if (status != 0) | ||
1445 | return status; | ||
1446 | |||
1447 | if (drv_data->workqueue) | ||
1448 | destroy_workqueue(drv_data->workqueue); | ||
1449 | |||
1450 | return 0; | ||
1451 | } | ||
1452 | |||
1453 | static int spi_imx_probe(struct platform_device *pdev) | ||
1454 | { | ||
1455 | struct device *dev = &pdev->dev; | ||
1456 | struct spi_imx_master *platform_info; | ||
1457 | struct spi_master *master; | ||
1458 | struct driver_data *drv_data = NULL; | ||
1459 | struct resource *res; | ||
1460 | int irq, status = 0; | ||
1461 | |||
1462 | platform_info = dev->platform_data; | ||
1463 | if (platform_info == NULL) { | ||
1464 | dev_err(&pdev->dev, "probe - no platform data supplied\n"); | ||
1465 | status = -ENODEV; | ||
1466 | goto err_no_pdata; | ||
1467 | } | ||
1468 | |||
1469 | /* Allocate master with space for drv_data */ | ||
1470 | master = spi_alloc_master(dev, sizeof(struct driver_data)); | ||
1471 | if (!master) { | ||
1472 | dev_err(&pdev->dev, "probe - cannot alloc spi_master\n"); | ||
1473 | status = -ENOMEM; | ||
1474 | goto err_no_mem; | ||
1475 | } | ||
1476 | drv_data = spi_master_get_devdata(master); | ||
1477 | drv_data->master = master; | ||
1478 | drv_data->master_info = platform_info; | ||
1479 | drv_data->pdev = pdev; | ||
1480 | |||
1481 | master->bus_num = pdev->id; | ||
1482 | master->num_chipselect = platform_info->num_chipselect; | ||
1483 | master->cleanup = cleanup; | ||
1484 | master->setup = setup; | ||
1485 | master->transfer = transfer; | ||
1486 | |||
1487 | drv_data->dummy_dma_buf = SPI_DUMMY_u32; | ||
1488 | |||
1489 | /* Find and map resources */ | ||
1490 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
1491 | if (!res) { | ||
1492 | dev_err(&pdev->dev, "probe - MEM resources not defined\n"); | ||
1493 | status = -ENODEV; | ||
1494 | goto err_no_iores; | ||
1495 | } | ||
1496 | drv_data->ioarea = request_mem_region(res->start, | ||
1497 | res->end - res->start + 1, | ||
1498 | pdev->name); | ||
1499 | if (drv_data->ioarea == NULL) { | ||
1500 | dev_err(&pdev->dev, "probe - cannot reserve region\n"); | ||
1501 | status = -ENXIO; | ||
1502 | goto err_no_iores; | ||
1503 | } | ||
1504 | drv_data->regs = ioremap(res->start, res->end - res->start + 1); | ||
1505 | if (drv_data->regs == NULL) { | ||
1506 | dev_err(&pdev->dev, "probe - cannot map IO\n"); | ||
1507 | status = -ENXIO; | ||
1508 | goto err_no_iomap; | ||
1509 | } | ||
1510 | drv_data->rd_data_phys = (dma_addr_t)res->start; | ||
1511 | |||
1512 | /* Attach to IRQ */ | ||
1513 | irq = platform_get_irq(pdev, 0); | ||
1514 | if (irq < 0) { | ||
1515 | dev_err(&pdev->dev, "probe - IRQ resource not defined\n"); | ||
1516 | status = -ENODEV; | ||
1517 | goto err_no_irqres; | ||
1518 | } | ||
1519 | status = request_irq(irq, spi_int, IRQF_DISABLED, dev->bus_id, drv_data); | ||
1520 | if (status < 0) { | ||
1521 | dev_err(&pdev->dev, "probe - cannot get IRQ (%d)\n", status); | ||
1522 | goto err_no_irqres; | ||
1523 | } | ||
1524 | |||
1525 | /* Setup DMA if requested */ | ||
1526 | drv_data->tx_channel = -1; | ||
1527 | drv_data->rx_channel = -1; | ||
1528 | if (platform_info->enable_dma) { | ||
1529 | /* Get rx DMA channel */ | ||
1530 | status = imx_dma_request_by_prio(&drv_data->rx_channel, | ||
1531 | "spi_imx_rx", DMA_PRIO_HIGH); | ||
1532 | if (status < 0) { | ||
1533 | dev_err(dev, | ||
1534 | "probe - problem (%d) requesting rx channel\n", | ||
1535 | status); | ||
1536 | goto err_no_rxdma; | ||
1537 | } else | ||
1538 | imx_dma_setup_handlers(drv_data->rx_channel, NULL, | ||
1539 | dma_err_handler, drv_data); | ||
1540 | |||
1541 | /* Get tx DMA channel */ | ||
1542 | status = imx_dma_request_by_prio(&drv_data->tx_channel, | ||
1543 | "spi_imx_tx", DMA_PRIO_MEDIUM); | ||
1544 | if (status < 0) { | ||
1545 | dev_err(dev, | ||
1546 | "probe - problem (%d) requesting tx channel\n", | ||
1547 | status); | ||
1548 | imx_dma_free(drv_data->rx_channel); | ||
1549 | goto err_no_txdma; | ||
1550 | } else | ||
1551 | imx_dma_setup_handlers(drv_data->tx_channel, | ||
1552 | dma_tx_handler, dma_err_handler, | ||
1553 | drv_data); | ||
1554 | |||
1555 | /* Set request source and burst length for allocated channels */ | ||
1556 | switch (drv_data->pdev->id) { | ||
1557 | case 1: | ||
1558 | /* Using SPI1 */ | ||
1559 | RSSR(drv_data->rx_channel) = DMA_REQ_SPI1_R; | ||
1560 | RSSR(drv_data->tx_channel) = DMA_REQ_SPI1_T; | ||
1561 | break; | ||
1562 | case 2: | ||
1563 | /* Using SPI2 */ | ||
1564 | RSSR(drv_data->rx_channel) = DMA_REQ_SPI2_R; | ||
1565 | RSSR(drv_data->tx_channel) = DMA_REQ_SPI2_T; | ||
1566 | break; | ||
1567 | default: | ||
1568 | dev_err(dev, "probe - bad SPI Id\n"); | ||
1569 | imx_dma_free(drv_data->rx_channel); | ||
1570 | imx_dma_free(drv_data->tx_channel); | ||
1571 | status = -ENODEV; | ||
1572 | goto err_no_devid; | ||
1573 | } | ||
1574 | BLR(drv_data->rx_channel) = SPI_DMA_BLR; | ||
1575 | BLR(drv_data->tx_channel) = SPI_DMA_BLR; | ||
1576 | } | ||
1577 | |||
1578 | /* Load default SPI configuration */ | ||
1579 | writel(SPI_RESET_START, drv_data->regs + SPI_RESET); | ||
1580 | writel(0, drv_data->regs + SPI_RESET); | ||
1581 | writel(SPI_DEFAULT_CONTROL, drv_data->regs + SPI_CONTROL); | ||
1582 | |||
1583 | /* Initial and start queue */ | ||
1584 | status = init_queue(drv_data); | ||
1585 | if (status != 0) { | ||
1586 | dev_err(&pdev->dev, "probe - problem initializing queue\n"); | ||
1587 | goto err_init_queue; | ||
1588 | } | ||
1589 | status = start_queue(drv_data); | ||
1590 | if (status != 0) { | ||
1591 | dev_err(&pdev->dev, "probe - problem starting queue\n"); | ||
1592 | goto err_start_queue; | ||
1593 | } | ||
1594 | |||
1595 | /* Register with the SPI framework */ | ||
1596 | platform_set_drvdata(pdev, drv_data); | ||
1597 | status = spi_register_master(master); | ||
1598 | if (status != 0) { | ||
1599 | dev_err(&pdev->dev, "probe - problem registering spi master\n"); | ||
1600 | goto err_spi_register; | ||
1601 | } | ||
1602 | |||
1603 | dev_dbg(dev, "probe succeded\n"); | ||
1604 | return 0; | ||
1605 | |||
1606 | err_init_queue: | ||
1607 | err_start_queue: | ||
1608 | err_spi_register: | ||
1609 | destroy_queue(drv_data); | ||
1610 | |||
1611 | err_no_rxdma: | ||
1612 | err_no_txdma: | ||
1613 | err_no_devid: | ||
1614 | free_irq(irq, drv_data); | ||
1615 | |||
1616 | err_no_irqres: | ||
1617 | iounmap(drv_data->regs); | ||
1618 | |||
1619 | err_no_iomap: | ||
1620 | release_resource(drv_data->ioarea); | ||
1621 | kfree(drv_data->ioarea); | ||
1622 | |||
1623 | err_no_iores: | ||
1624 | spi_master_put(master); | ||
1625 | |||
1626 | err_no_pdata: | ||
1627 | err_no_mem: | ||
1628 | return status; | ||
1629 | } | ||
1630 | |||
1631 | static int __devexit spi_imx_remove(struct platform_device *pdev) | ||
1632 | { | ||
1633 | struct driver_data *drv_data = platform_get_drvdata(pdev); | ||
1634 | int irq; | ||
1635 | int status = 0; | ||
1636 | |||
1637 | if (!drv_data) | ||
1638 | return 0; | ||
1639 | |||
1640 | tasklet_kill(&drv_data->pump_transfers); | ||
1641 | |||
1642 | /* Remove the queue */ | ||
1643 | status = destroy_queue(drv_data); | ||
1644 | if (status != 0) { | ||
1645 | dev_err(&pdev->dev, "queue remove failed (%d)\n", status); | ||
1646 | return status; | ||
1647 | } | ||
1648 | |||
1649 | /* Reset SPI */ | ||
1650 | writel(SPI_RESET_START, drv_data->regs + SPI_RESET); | ||
1651 | writel(0, drv_data->regs + SPI_RESET); | ||
1652 | |||
1653 | /* Release DMA */ | ||
1654 | if (drv_data->master_info->enable_dma) { | ||
1655 | RSSR(drv_data->rx_channel) = 0; | ||
1656 | RSSR(drv_data->tx_channel) = 0; | ||
1657 | imx_dma_free(drv_data->tx_channel); | ||
1658 | imx_dma_free(drv_data->rx_channel); | ||
1659 | } | ||
1660 | |||
1661 | /* Release IRQ */ | ||
1662 | irq = platform_get_irq(pdev, 0); | ||
1663 | if (irq >= 0) | ||
1664 | free_irq(irq, drv_data); | ||
1665 | |||
1666 | /* Release map resources */ | ||
1667 | iounmap(drv_data->regs); | ||
1668 | release_resource(drv_data->ioarea); | ||
1669 | kfree(drv_data->ioarea); | ||
1670 | |||
1671 | /* Disconnect from the SPI framework */ | ||
1672 | spi_unregister_master(drv_data->master); | ||
1673 | spi_master_put(drv_data->master); | ||
1674 | |||
1675 | /* Prevent double remove */ | ||
1676 | platform_set_drvdata(pdev, NULL); | ||
1677 | |||
1678 | dev_dbg(&pdev->dev, "remove succeded\n"); | ||
1679 | |||
1680 | return 0; | ||
1681 | } | ||
1682 | |||
1683 | static void spi_imx_shutdown(struct platform_device *pdev) | ||
1684 | { | ||
1685 | struct driver_data *drv_data = platform_get_drvdata(pdev); | ||
1686 | |||
1687 | /* Reset SPI */ | ||
1688 | writel(SPI_RESET_START, drv_data->regs + SPI_RESET); | ||
1689 | writel(0, drv_data->regs + SPI_RESET); | ||
1690 | |||
1691 | dev_dbg(&pdev->dev, "shutdown succeded\n"); | ||
1692 | } | ||
1693 | |||
1694 | #ifdef CONFIG_PM | ||
1695 | static int suspend_devices(struct device *dev, void *pm_message) | ||
1696 | { | ||
1697 | pm_message_t *state = pm_message; | ||
1698 | |||
1699 | if (dev->power.power_state.event != state->event) { | ||
1700 | dev_warn(dev, "pm state does not match request\n"); | ||
1701 | return -1; | ||
1702 | } | ||
1703 | |||
1704 | return 0; | ||
1705 | } | ||
1706 | |||
1707 | static int spi_imx_suspend(struct platform_device *pdev, pm_message_t state) | ||
1708 | { | ||
1709 | struct driver_data *drv_data = platform_get_drvdata(pdev); | ||
1710 | int status = 0; | ||
1711 | |||
1712 | status = stop_queue(drv_data); | ||
1713 | if (status != 0) { | ||
1714 | dev_warn(&pdev->dev, "suspend cannot stop queue\n"); | ||
1715 | return status; | ||
1716 | } | ||
1717 | |||
1718 | dev_dbg(&pdev->dev, "suspended\n"); | ||
1719 | |||
1720 | return 0; | ||
1721 | } | ||
1722 | |||
1723 | static int spi_imx_resume(struct platform_device *pdev) | ||
1724 | { | ||
1725 | struct driver_data *drv_data = platform_get_drvdata(pdev); | ||
1726 | int status = 0; | ||
1727 | |||
1728 | /* Start the queue running */ | ||
1729 | status = start_queue(drv_data); | ||
1730 | if (status != 0) | ||
1731 | dev_err(&pdev->dev, "problem starting queue (%d)\n", status); | ||
1732 | else | ||
1733 | dev_dbg(&pdev->dev, "resumed\n"); | ||
1734 | |||
1735 | return status; | ||
1736 | } | ||
1737 | #else | ||
1738 | #define spi_imx_suspend NULL | ||
1739 | #define spi_imx_resume NULL | ||
1740 | #endif /* CONFIG_PM */ | ||
1741 | |||
1742 | static struct platform_driver driver = { | ||
1743 | .driver = { | ||
1744 | .name = "imx-spi", | ||
1745 | .bus = &platform_bus_type, | ||
1746 | .owner = THIS_MODULE, | ||
1747 | }, | ||
1748 | .probe = spi_imx_probe, | ||
1749 | .remove = __devexit_p(spi_imx_remove), | ||
1750 | .shutdown = spi_imx_shutdown, | ||
1751 | .suspend = spi_imx_suspend, | ||
1752 | .resume = spi_imx_resume, | ||
1753 | }; | ||
1754 | |||
1755 | static int __init spi_imx_init(void) | ||
1756 | { | ||
1757 | return platform_driver_register(&driver); | ||
1758 | } | ||
1759 | module_init(spi_imx_init); | ||
1760 | |||
1761 | static void __exit spi_imx_exit(void) | ||
1762 | { | ||
1763 | platform_driver_unregister(&driver); | ||
1764 | } | ||
1765 | module_exit(spi_imx_exit); | ||
1766 | |||
1767 | MODULE_AUTHOR("Andrea Paterniani, <a.paterniani@swapp-eng.it>"); | ||
1768 | MODULE_DESCRIPTION("iMX SPI Contoller Driver"); | ||
1769 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/telephony/ixj.c b/drivers/telephony/ixj.c index df4cc1fb5f68..71cb64e41a1b 100644 --- a/drivers/telephony/ixj.c +++ b/drivers/telephony/ixj.c | |||
@@ -648,9 +648,9 @@ static inline BYTE SLIC_GetState(IXJ *j) | |||
648 | return j->pld_slicr.bits.state; | 648 | return j->pld_slicr.bits.state; |
649 | } | 649 | } |
650 | 650 | ||
651 | static BOOL SLIC_SetState(BYTE byState, IXJ *j) | 651 | static bool SLIC_SetState(BYTE byState, IXJ *j) |
652 | { | 652 | { |
653 | BOOL fRetVal = FALSE; | 653 | bool fRetVal = false; |
654 | 654 | ||
655 | if (j->cardtype == QTI_PHONECARD) { | 655 | if (j->cardtype == QTI_PHONECARD) { |
656 | if (j->flags.pcmciasct) { | 656 | if (j->flags.pcmciasct) { |
@@ -659,14 +659,14 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j) | |||
659 | case PLD_SLIC_STATE_OC: | 659 | case PLD_SLIC_STATE_OC: |
660 | j->pslic.bits.powerdown = 1; | 660 | j->pslic.bits.powerdown = 1; |
661 | j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0; | 661 | j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0; |
662 | fRetVal = TRUE; | 662 | fRetVal = true; |
663 | break; | 663 | break; |
664 | case PLD_SLIC_STATE_RINGING: | 664 | case PLD_SLIC_STATE_RINGING: |
665 | if (j->readers || j->writers) { | 665 | if (j->readers || j->writers) { |
666 | j->pslic.bits.powerdown = 0; | 666 | j->pslic.bits.powerdown = 0; |
667 | j->pslic.bits.ring0 = 1; | 667 | j->pslic.bits.ring0 = 1; |
668 | j->pslic.bits.ring1 = 0; | 668 | j->pslic.bits.ring1 = 0; |
669 | fRetVal = TRUE; | 669 | fRetVal = true; |
670 | } | 670 | } |
671 | break; | 671 | break; |
672 | case PLD_SLIC_STATE_OHT: /* On-hook transmit */ | 672 | case PLD_SLIC_STATE_OHT: /* On-hook transmit */ |
@@ -679,14 +679,14 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j) | |||
679 | j->pslic.bits.powerdown = 1; | 679 | j->pslic.bits.powerdown = 1; |
680 | } | 680 | } |
681 | j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0; | 681 | j->pslic.bits.ring0 = j->pslic.bits.ring1 = 0; |
682 | fRetVal = TRUE; | 682 | fRetVal = true; |
683 | break; | 683 | break; |
684 | case PLD_SLIC_STATE_APR: /* Active polarity reversal */ | 684 | case PLD_SLIC_STATE_APR: /* Active polarity reversal */ |
685 | 685 | ||
686 | case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */ | 686 | case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */ |
687 | 687 | ||
688 | default: | 688 | default: |
689 | fRetVal = FALSE; | 689 | fRetVal = false; |
690 | break; | 690 | break; |
691 | } | 691 | } |
692 | j->psccr.bits.dev = 3; | 692 | j->psccr.bits.dev = 3; |
@@ -703,7 +703,7 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j) | |||
703 | j->pld_slicw.bits.c3 = 0; | 703 | j->pld_slicw.bits.c3 = 0; |
704 | j->pld_slicw.bits.b2en = 0; | 704 | j->pld_slicw.bits.b2en = 0; |
705 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); | 705 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); |
706 | fRetVal = TRUE; | 706 | fRetVal = true; |
707 | break; | 707 | break; |
708 | case PLD_SLIC_STATE_RINGING: | 708 | case PLD_SLIC_STATE_RINGING: |
709 | j->pld_slicw.bits.c1 = 1; | 709 | j->pld_slicw.bits.c1 = 1; |
@@ -711,7 +711,7 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j) | |||
711 | j->pld_slicw.bits.c3 = 0; | 711 | j->pld_slicw.bits.c3 = 0; |
712 | j->pld_slicw.bits.b2en = 1; | 712 | j->pld_slicw.bits.b2en = 1; |
713 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); | 713 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); |
714 | fRetVal = TRUE; | 714 | fRetVal = true; |
715 | break; | 715 | break; |
716 | case PLD_SLIC_STATE_ACTIVE: | 716 | case PLD_SLIC_STATE_ACTIVE: |
717 | j->pld_slicw.bits.c1 = 0; | 717 | j->pld_slicw.bits.c1 = 0; |
@@ -719,7 +719,7 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j) | |||
719 | j->pld_slicw.bits.c3 = 0; | 719 | j->pld_slicw.bits.c3 = 0; |
720 | j->pld_slicw.bits.b2en = 0; | 720 | j->pld_slicw.bits.b2en = 0; |
721 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); | 721 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); |
722 | fRetVal = TRUE; | 722 | fRetVal = true; |
723 | break; | 723 | break; |
724 | case PLD_SLIC_STATE_OHT: /* On-hook transmit */ | 724 | case PLD_SLIC_STATE_OHT: /* On-hook transmit */ |
725 | 725 | ||
@@ -728,7 +728,7 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j) | |||
728 | j->pld_slicw.bits.c3 = 0; | 728 | j->pld_slicw.bits.c3 = 0; |
729 | j->pld_slicw.bits.b2en = 0; | 729 | j->pld_slicw.bits.b2en = 0; |
730 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); | 730 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); |
731 | fRetVal = TRUE; | 731 | fRetVal = true; |
732 | break; | 732 | break; |
733 | case PLD_SLIC_STATE_TIPOPEN: | 733 | case PLD_SLIC_STATE_TIPOPEN: |
734 | j->pld_slicw.bits.c1 = 0; | 734 | j->pld_slicw.bits.c1 = 0; |
@@ -736,7 +736,7 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j) | |||
736 | j->pld_slicw.bits.c3 = 1; | 736 | j->pld_slicw.bits.c3 = 1; |
737 | j->pld_slicw.bits.b2en = 0; | 737 | j->pld_slicw.bits.b2en = 0; |
738 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); | 738 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); |
739 | fRetVal = TRUE; | 739 | fRetVal = true; |
740 | break; | 740 | break; |
741 | case PLD_SLIC_STATE_STANDBY: | 741 | case PLD_SLIC_STATE_STANDBY: |
742 | j->pld_slicw.bits.c1 = 1; | 742 | j->pld_slicw.bits.c1 = 1; |
@@ -744,7 +744,7 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j) | |||
744 | j->pld_slicw.bits.c3 = 1; | 744 | j->pld_slicw.bits.c3 = 1; |
745 | j->pld_slicw.bits.b2en = 1; | 745 | j->pld_slicw.bits.b2en = 1; |
746 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); | 746 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); |
747 | fRetVal = TRUE; | 747 | fRetVal = true; |
748 | break; | 748 | break; |
749 | case PLD_SLIC_STATE_APR: /* Active polarity reversal */ | 749 | case PLD_SLIC_STATE_APR: /* Active polarity reversal */ |
750 | 750 | ||
@@ -753,7 +753,7 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j) | |||
753 | j->pld_slicw.bits.c3 = 1; | 753 | j->pld_slicw.bits.c3 = 1; |
754 | j->pld_slicw.bits.b2en = 0; | 754 | j->pld_slicw.bits.b2en = 0; |
755 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); | 755 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); |
756 | fRetVal = TRUE; | 756 | fRetVal = true; |
757 | break; | 757 | break; |
758 | case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */ | 758 | case PLD_SLIC_STATE_OHTPR: /* OHT polarity reversal */ |
759 | 759 | ||
@@ -762,10 +762,10 @@ static BOOL SLIC_SetState(BYTE byState, IXJ *j) | |||
762 | j->pld_slicw.bits.c3 = 1; | 762 | j->pld_slicw.bits.c3 = 1; |
763 | j->pld_slicw.bits.b2en = 0; | 763 | j->pld_slicw.bits.b2en = 0; |
764 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); | 764 | outb_p(j->pld_slicw.byte, j->XILINXbase + 0x01); |
765 | fRetVal = TRUE; | 765 | fRetVal = true; |
766 | break; | 766 | break; |
767 | default: | 767 | default: |
768 | fRetVal = FALSE; | 768 | fRetVal = false; |
769 | break; | 769 | break; |
770 | } | 770 | } |
771 | } | 771 | } |
@@ -4969,7 +4969,8 @@ static int ixj_daa_cid_read(IXJ *j) | |||
4969 | { | 4969 | { |
4970 | int i; | 4970 | int i; |
4971 | BYTES bytes; | 4971 | BYTES bytes; |
4972 | char CID[ALISDAA_CALLERID_SIZE], mContinue; | 4972 | char CID[ALISDAA_CALLERID_SIZE]; |
4973 | bool mContinue; | ||
4973 | char *pIn, *pOut; | 4974 | char *pIn, *pOut; |
4974 | 4975 | ||
4975 | if (!SCI_Prepare(j)) | 4976 | if (!SCI_Prepare(j)) |
@@ -5013,7 +5014,7 @@ static int ixj_daa_cid_read(IXJ *j) | |||
5013 | 5014 | ||
5014 | pIn = CID; | 5015 | pIn = CID; |
5015 | pOut = j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID; | 5016 | pOut = j->m_DAAShadowRegs.CAO_REGS.CAO.CallerID; |
5016 | mContinue = 1; | 5017 | mContinue = true; |
5017 | while (mContinue) { | 5018 | while (mContinue) { |
5018 | if ((pIn[1] & 0x03) == 0x01) { | 5019 | if ((pIn[1] & 0x03) == 0x01) { |
5019 | pOut[0] = pIn[0]; | 5020 | pOut[0] = pIn[0]; |
@@ -5027,7 +5028,7 @@ static int ixj_daa_cid_read(IXJ *j) | |||
5027 | if ((pIn[4] & 0xc0) == 0x40) { | 5028 | if ((pIn[4] & 0xc0) == 0x40) { |
5028 | pOut[3] = ((pIn[4] & 0x3f) << 2) | ((pIn[3] & 0xc0) >> 6); | 5029 | pOut[3] = ((pIn[4] & 0x3f) << 2) | ((pIn[3] & 0xc0) >> 6); |
5029 | } else { | 5030 | } else { |
5030 | mContinue = FALSE; | 5031 | mContinue = false; |
5031 | } | 5032 | } |
5032 | pIn += 5, pOut += 4; | 5033 | pIn += 5, pOut += 4; |
5033 | } | 5034 | } |
@@ -6662,7 +6663,7 @@ static int ixj_fasync(int fd, struct file *file_p, int mode) | |||
6662 | return fasync_helper(fd, file_p, mode, &j->async_queue); | 6663 | return fasync_helper(fd, file_p, mode, &j->async_queue); |
6663 | } | 6664 | } |
6664 | 6665 | ||
6665 | static struct file_operations ixj_fops = | 6666 | static const struct file_operations ixj_fops = |
6666 | { | 6667 | { |
6667 | .owner = THIS_MODULE, | 6668 | .owner = THIS_MODULE, |
6668 | .read = ixj_enhanced_read, | 6669 | .read = ixj_enhanced_read, |
@@ -7498,7 +7499,7 @@ static BYTE PCIEE_ReadBit(WORD wEEPROMAddress, BYTE lastLCC) | |||
7498 | return ((inb(wEEPROMAddress) >> 3) & 1); | 7499 | return ((inb(wEEPROMAddress) >> 3) & 1); |
7499 | } | 7500 | } |
7500 | 7501 | ||
7501 | static BOOL PCIEE_ReadWord(WORD wAddress, WORD wLoc, WORD * pwResult) | 7502 | static bool PCIEE_ReadWord(WORD wAddress, WORD wLoc, WORD * pwResult) |
7502 | { | 7503 | { |
7503 | BYTE lastLCC; | 7504 | BYTE lastLCC; |
7504 | WORD wEEPROMAddress = wAddress + 3; | 7505 | WORD wEEPROMAddress = wAddress + 3; |
diff --git a/drivers/telephony/ixj.h b/drivers/telephony/ixj.h index 8d69bcdc29c9..4c32a43b7914 100644 --- a/drivers/telephony/ixj.h +++ b/drivers/telephony/ixj.h | |||
@@ -48,15 +48,11 @@ | |||
48 | typedef __u16 WORD; | 48 | typedef __u16 WORD; |
49 | typedef __u32 DWORD; | 49 | typedef __u32 DWORD; |
50 | typedef __u8 BYTE; | 50 | typedef __u8 BYTE; |
51 | typedef __u8 BOOL; | ||
52 | 51 | ||
53 | #ifndef IXJMAX | 52 | #ifndef IXJMAX |
54 | #define IXJMAX 16 | 53 | #define IXJMAX 16 |
55 | #endif | 54 | #endif |
56 | 55 | ||
57 | #define TRUE 1 | ||
58 | #define FALSE 0 | ||
59 | |||
60 | /****************************************************************************** | 56 | /****************************************************************************** |
61 | * | 57 | * |
62 | * This structure when unioned with the structures below makes simple byte | 58 | * This structure when unioned with the structures below makes simple byte |
diff --git a/drivers/telephony/phonedev.c b/drivers/telephony/phonedev.c index e41f49afd0f4..4d8c2a5b3297 100644 --- a/drivers/telephony/phonedev.c +++ b/drivers/telephony/phonedev.c | |||
@@ -127,7 +127,7 @@ void phone_unregister_device(struct phone_device *pfd) | |||
127 | } | 127 | } |
128 | 128 | ||
129 | 129 | ||
130 | static struct file_operations phone_fops = | 130 | static const struct file_operations phone_fops = |
131 | { | 131 | { |
132 | .owner = THIS_MODULE, | 132 | .owner = THIS_MODULE, |
133 | .open = phone_open, | 133 | .open = phone_open, |
diff --git a/drivers/usb/misc/adutux.c b/drivers/usb/misc/adutux.c index af2934e016a7..75bfab95ab3c 100644 --- a/drivers/usb/misc/adutux.c +++ b/drivers/usb/misc/adutux.c | |||
@@ -644,7 +644,7 @@ exit: | |||
644 | } | 644 | } |
645 | 645 | ||
646 | /* file operations needed when we register this driver */ | 646 | /* file operations needed when we register this driver */ |
647 | static struct file_operations adu_fops = { | 647 | static const struct file_operations adu_fops = { |
648 | .owner = THIS_MODULE, | 648 | .owner = THIS_MODULE, |
649 | .read = adu_read, | 649 | .read = adu_read, |
650 | .write = adu_write, | 650 | .write = adu_write, |
diff --git a/drivers/usb/misc/appledisplay.c b/drivers/usb/misc/appledisplay.c index a7932a72d298..32f0e3a5b022 100644 --- a/drivers/usb/misc/appledisplay.c +++ b/drivers/usb/misc/appledisplay.c | |||
@@ -281,8 +281,8 @@ static int appledisplay_probe(struct usb_interface *iface, | |||
281 | /* Register backlight device */ | 281 | /* Register backlight device */ |
282 | snprintf(bl_name, sizeof(bl_name), "appledisplay%d", | 282 | snprintf(bl_name, sizeof(bl_name), "appledisplay%d", |
283 | atomic_inc_return(&count_displays) - 1); | 283 | atomic_inc_return(&count_displays) - 1); |
284 | pdata->bd = backlight_device_register(bl_name, NULL, NULL, | 284 | pdata->bd = backlight_device_register(bl_name, NULL, |
285 | &appledisplay_bl_data); | 285 | pdata, &appledisplay_bl_data); |
286 | if (IS_ERR(pdata->bd)) { | 286 | if (IS_ERR(pdata->bd)) { |
287 | err("appledisplay: Backlight registration failed"); | 287 | err("appledisplay: Backlight registration failed"); |
288 | goto error; | 288 | goto error; |
diff --git a/drivers/usb/misc/ftdi-elan.c b/drivers/usb/misc/ftdi-elan.c index 41c0161abdb9..0c1d66ddb812 100644 --- a/drivers/usb/misc/ftdi-elan.c +++ b/drivers/usb/misc/ftdi-elan.c | |||
@@ -1209,7 +1209,7 @@ error_1: | |||
1209 | return retval; | 1209 | return retval; |
1210 | } | 1210 | } |
1211 | 1211 | ||
1212 | static struct file_operations ftdi_elan_fops = { | 1212 | static const struct file_operations ftdi_elan_fops = { |
1213 | .owner = THIS_MODULE, | 1213 | .owner = THIS_MODULE, |
1214 | .llseek = no_llseek, | 1214 | .llseek = no_llseek, |
1215 | .ioctl = ftdi_elan_ioctl, | 1215 | .ioctl = ftdi_elan_ioctl, |
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 45fe65d8d7a0..8874cf2fd279 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig | |||
@@ -85,6 +85,14 @@ config FB_CFB_IMAGEBLIT | |||
85 | blitting. This is used by drivers that don't provide their own | 85 | blitting. This is used by drivers that don't provide their own |
86 | (accelerated) version. | 86 | (accelerated) version. |
87 | 87 | ||
88 | config FB_SVGALIB | ||
89 | tristate | ||
90 | depends on FB | ||
91 | default n | ||
92 | ---help--- | ||
93 | Common utility functions useful to fbdev drivers of VGA-based | ||
94 | cards. | ||
95 | |||
88 | config FB_MACMODES | 96 | config FB_MACMODES |
89 | tristate | 97 | tristate |
90 | depends on FB | 98 | depends on FB |
@@ -346,42 +354,6 @@ config FB_AMIGA_AGA | |||
346 | and CD32. If you intend to run Linux on any of these systems, say Y; | 354 | and CD32. If you intend to run Linux on any of these systems, say Y; |
347 | otherwise say N. | 355 | otherwise say N. |
348 | 356 | ||
349 | config FB_CYBER | ||
350 | tristate "Amiga CyberVision 64 support" | ||
351 | depends on FB && ZORRO && BROKEN | ||
352 | select FB_CFB_FILLRECT | ||
353 | select FB_CFB_COPYAREA | ||
354 | select FB_CFB_IMAGEBLIT | ||
355 | help | ||
356 | This enables support for the Cybervision 64 graphics card from | ||
357 | Phase5. Please note that its use is not all that intuitive (i.e. if | ||
358 | you have any questions, be sure to ask!). Say N unless you have a | ||
359 | Cybervision 64 or plan to get one before you next recompile the | ||
360 | kernel. Please note that this driver DOES NOT support the | ||
361 | Cybervision 64/3D card, as they use incompatible video chips. | ||
362 | |||
363 | config FB_VIRGE | ||
364 | bool "Amiga CyberVision 64/3D support " | ||
365 | depends on (FB = y) && ZORRO && BROKEN | ||
366 | select FB_CFB_FILLRECT | ||
367 | select FB_CFB_COPYAREA | ||
368 | select FB_CFB_IMAGEBLIT | ||
369 | help | ||
370 | This enables support for the Cybervision 64/3D graphics card from | ||
371 | Phase5. Please note that its use is not all that intuitive (i.e. if | ||
372 | you have any questions, be sure to ask!). Say N unless you have a | ||
373 | Cybervision 64/3D or plan to get one before you next recompile the | ||
374 | kernel. Please note that this driver DOES NOT support the older | ||
375 | Cybervision 64 card, as they use incompatible video chips. | ||
376 | |||
377 | config FB_RETINAZ3 | ||
378 | tristate "Amiga Retina Z3 support" | ||
379 | depends on (FB = y) && ZORRO && BROKEN | ||
380 | help | ||
381 | This enables support for the Retina Z3 graphics card. Say N unless | ||
382 | you have a Retina Z3 or plan to get one before you next recompile | ||
383 | the kernel. | ||
384 | |||
385 | config FB_FM2 | 357 | config FB_FM2 |
386 | bool "Amiga FrameMaster II/Rainbow II support" | 358 | bool "Amiga FrameMaster II/Rainbow II support" |
387 | depends on (FB = y) && ZORRO | 359 | depends on (FB = y) && ZORRO |
@@ -617,10 +589,6 @@ config FB_GBE_MEM | |||
617 | This is the amount of memory reserved for the framebuffer, | 589 | This is the amount of memory reserved for the framebuffer, |
618 | which can be any value between 1MB and 8MB. | 590 | which can be any value between 1MB and 8MB. |
619 | 591 | ||
620 | config FB_SUN3 | ||
621 | bool "Sun3 framebuffer support" | ||
622 | depends on (FB = y) && (SUN3 || SUN3X) && BROKEN | ||
623 | |||
624 | config FB_SBUS | 592 | config FB_SBUS |
625 | bool "SBUS and UPA framebuffers" | 593 | bool "SBUS and UPA framebuffers" |
626 | depends on (FB = y) && SPARC | 594 | depends on (FB = y) && SPARC |
@@ -629,7 +597,7 @@ config FB_SBUS | |||
629 | 597 | ||
630 | config FB_BW2 | 598 | config FB_BW2 |
631 | bool "BWtwo support" | 599 | bool "BWtwo support" |
632 | depends on (FB = y) && (SPARC && FB_SBUS || (SUN3 || SUN3X) && FB_SUN3) | 600 | depends on (FB = y) && (SPARC && FB_SBUS) |
633 | select FB_CFB_FILLRECT | 601 | select FB_CFB_FILLRECT |
634 | select FB_CFB_COPYAREA | 602 | select FB_CFB_COPYAREA |
635 | select FB_CFB_IMAGEBLIT | 603 | select FB_CFB_IMAGEBLIT |
@@ -638,7 +606,7 @@ config FB_BW2 | |||
638 | 606 | ||
639 | config FB_CG3 | 607 | config FB_CG3 |
640 | bool "CGthree support" | 608 | bool "CGthree support" |
641 | depends on (FB = y) && (SPARC && FB_SBUS || (SUN3 || SUN3X) && FB_SUN3) | 609 | depends on (FB = y) && (SPARC && FB_SBUS) |
642 | select FB_CFB_FILLRECT | 610 | select FB_CFB_FILLRECT |
643 | select FB_CFB_COPYAREA | 611 | select FB_CFB_COPYAREA |
644 | select FB_CFB_IMAGEBLIT | 612 | select FB_CFB_IMAGEBLIT |
@@ -647,7 +615,7 @@ config FB_CG3 | |||
647 | 615 | ||
648 | config FB_CG6 | 616 | config FB_CG6 |
649 | bool "CGsix (GX,TurboGX) support" | 617 | bool "CGsix (GX,TurboGX) support" |
650 | depends on (FB = y) && (SPARC && FB_SBUS || (SUN3 || SUN3X) && FB_SUN3) | 618 | depends on (FB = y) && (SPARC && FB_SBUS) |
651 | select FB_CFB_COPYAREA | 619 | select FB_CFB_COPYAREA |
652 | select FB_CFB_IMAGEBLIT | 620 | select FB_CFB_IMAGEBLIT |
653 | help | 621 | help |
@@ -1141,11 +1109,16 @@ config FB_ATY_BACKLIGHT | |||
1141 | help | 1109 | help |
1142 | Say Y here if you want to control the backlight of your display. | 1110 | Say Y here if you want to control the backlight of your display. |
1143 | 1111 | ||
1144 | config FB_S3TRIO | 1112 | config FB_S3 |
1145 | bool "S3 Trio display support" | 1113 | tristate "S3 Trio/Virge support" |
1146 | depends on (FB = y) && PPC && BROKEN | 1114 | depends on FB && PCI |
1147 | help | 1115 | select FB_CFB_FILLRECT |
1148 | If you have a S3 Trio say Y. Say N for S3 Virge. | 1116 | select FB_CFB_COPYAREA |
1117 | select FB_CFB_IMAGEBLIT | ||
1118 | select FB_TILEBLITTING | ||
1119 | select FB_SVGALIB | ||
1120 | ---help--- | ||
1121 | Driver for graphics boards with S3 Trio / S3 Virge chip. | ||
1149 | 1122 | ||
1150 | config FB_SAVAGE | 1123 | config FB_SAVAGE |
1151 | tristate "S3 Savage support" | 1124 | tristate "S3 Savage support" |
@@ -1625,6 +1598,26 @@ config FB_IBM_GXT4500 | |||
1625 | Say Y here to enable support for the IBM GXT4500P display | 1598 | Say Y here to enable support for the IBM GXT4500P display |
1626 | adaptor, found on some IBM System P (pSeries) machines. | 1599 | adaptor, found on some IBM System P (pSeries) machines. |
1627 | 1600 | ||
1601 | config FB_PS3 | ||
1602 | bool "PS3 GPU framebuffer driver" | ||
1603 | depends on FB && PPC_PS3 | ||
1604 | select PS3_PS3AV | ||
1605 | select FB_CFB_FILLRECT | ||
1606 | select FB_CFB_COPYAREA | ||
1607 | select FB_CFB_IMAGEBLIT | ||
1608 | ---help--- | ||
1609 | Include support for the virtual frame buffer in the PS3 platform. | ||
1610 | |||
1611 | config FB_PS3_DEFAULT_SIZE_M | ||
1612 | int "PS3 default frame buffer size (in MiB)" | ||
1613 | depends on FB_PS3 | ||
1614 | default 18 | ||
1615 | ---help--- | ||
1616 | This is the default size (in MiB) of the virtual frame buffer in | ||
1617 | the PS3. | ||
1618 | The default value can be overridden on the kernel command line | ||
1619 | using the "ps3fb" option (e.g. "ps3fb=9M"); | ||
1620 | |||
1628 | config FB_VIRTUAL | 1621 | config FB_VIRTUAL |
1629 | tristate "Virtual Frame Buffer support (ONLY FOR TESTING!)" | 1622 | tristate "Virtual Frame Buffer support (ONLY FOR TESTING!)" |
1630 | depends on FB | 1623 | depends on FB |
diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 309a26dd164a..6801edff36d9 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile | |||
@@ -17,15 +17,14 @@ obj-$(CONFIG_SYSFS) += backlight/ | |||
17 | obj-$(CONFIG_FB_CFB_FILLRECT) += cfbfillrect.o | 17 | obj-$(CONFIG_FB_CFB_FILLRECT) += cfbfillrect.o |
18 | obj-$(CONFIG_FB_CFB_COPYAREA) += cfbcopyarea.o | 18 | obj-$(CONFIG_FB_CFB_COPYAREA) += cfbcopyarea.o |
19 | obj-$(CONFIG_FB_CFB_IMAGEBLIT) += cfbimgblt.o | 19 | obj-$(CONFIG_FB_CFB_IMAGEBLIT) += cfbimgblt.o |
20 | obj-$(CONFIG_FB_SVGALIB) += svgalib.o | ||
20 | obj-$(CONFIG_FB_MACMODES) += macmodes.o | 21 | obj-$(CONFIG_FB_MACMODES) += macmodes.o |
21 | obj-$(CONFIG_FB_DDC) += fb_ddc.o | 22 | obj-$(CONFIG_FB_DDC) += fb_ddc.o |
22 | 23 | ||
23 | # Hardware specific drivers go first | 24 | # Hardware specific drivers go first |
24 | obj-$(CONFIG_FB_RETINAZ3) += retz3fb.o | ||
25 | obj-$(CONFIG_FB_AMIGA) += amifb.o c2p.o | 25 | obj-$(CONFIG_FB_AMIGA) += amifb.o c2p.o |
26 | obj-$(CONFIG_FB_ARC) += arcfb.o | 26 | obj-$(CONFIG_FB_ARC) += arcfb.o |
27 | obj-$(CONFIG_FB_CLPS711X) += clps711xfb.o | 27 | obj-$(CONFIG_FB_CLPS711X) += clps711xfb.o |
28 | obj-$(CONFIG_FB_CYBER) += cyberfb.o | ||
29 | obj-$(CONFIG_FB_CYBER2000) += cyber2000fb.o | 28 | obj-$(CONFIG_FB_CYBER2000) += cyber2000fb.o |
30 | obj-$(CONFIG_FB_PM2) += pm2fb.o | 29 | obj-$(CONFIG_FB_PM2) += pm2fb.o |
31 | obj-$(CONFIG_FB_PM3) += pm3fb.o | 30 | obj-$(CONFIG_FB_PM3) += pm3fb.o |
@@ -43,17 +42,16 @@ obj-$(CONFIG_FB_GEODE) += geode/ | |||
43 | obj-$(CONFIG_FB_MBX) += mbx/ | 42 | obj-$(CONFIG_FB_MBX) += mbx/ |
44 | obj-$(CONFIG_FB_I810) += vgastate.o | 43 | obj-$(CONFIG_FB_I810) += vgastate.o |
45 | obj-$(CONFIG_FB_NEOMAGIC) += neofb.o vgastate.o | 44 | obj-$(CONFIG_FB_NEOMAGIC) += neofb.o vgastate.o |
46 | obj-$(CONFIG_FB_VIRGE) += virgefb.o | ||
47 | obj-$(CONFIG_FB_3DFX) += tdfxfb.o | 45 | obj-$(CONFIG_FB_3DFX) += tdfxfb.o |
48 | obj-$(CONFIG_FB_CONTROL) += controlfb.o | 46 | obj-$(CONFIG_FB_CONTROL) += controlfb.o |
49 | obj-$(CONFIG_FB_PLATINUM) += platinumfb.o | 47 | obj-$(CONFIG_FB_PLATINUM) += platinumfb.o |
50 | obj-$(CONFIG_FB_VALKYRIE) += valkyriefb.o | 48 | obj-$(CONFIG_FB_VALKYRIE) += valkyriefb.o |
51 | obj-$(CONFIG_FB_CT65550) += chipsfb.o | 49 | obj-$(CONFIG_FB_CT65550) += chipsfb.o |
52 | obj-$(CONFIG_FB_IMSTT) += imsttfb.o | 50 | obj-$(CONFIG_FB_IMSTT) += imsttfb.o |
53 | obj-$(CONFIG_FB_S3TRIO) += S3triofb.o | ||
54 | obj-$(CONFIG_FB_FM2) += fm2fb.o | 51 | obj-$(CONFIG_FB_FM2) += fm2fb.o |
55 | obj-$(CONFIG_FB_CYBLA) += cyblafb.o | 52 | obj-$(CONFIG_FB_CYBLA) += cyblafb.o |
56 | obj-$(CONFIG_FB_TRIDENT) += tridentfb.o | 53 | obj-$(CONFIG_FB_TRIDENT) += tridentfb.o |
54 | obj-$(CONFIG_FB_S3) += s3fb.o vgastate.o | ||
57 | obj-$(CONFIG_FB_STI) += stifb.o | 55 | obj-$(CONFIG_FB_STI) += stifb.o |
58 | obj-$(CONFIG_FB_FFB) += ffb.o sbuslib.o | 56 | obj-$(CONFIG_FB_FFB) += ffb.o sbuslib.o |
59 | obj-$(CONFIG_FB_CG6) += cg6.o sbuslib.o | 57 | obj-$(CONFIG_FB_CG6) += cg6.o sbuslib.o |
@@ -75,7 +73,6 @@ obj-$(CONFIG_FB_TGA) += tgafb.o | |||
75 | obj-$(CONFIG_FB_HP300) += hpfb.o | 73 | obj-$(CONFIG_FB_HP300) += hpfb.o |
76 | obj-$(CONFIG_FB_G364) += g364fb.o | 74 | obj-$(CONFIG_FB_G364) += g364fb.o |
77 | obj-$(CONFIG_FB_SA1100) += sa1100fb.o | 75 | obj-$(CONFIG_FB_SA1100) += sa1100fb.o |
78 | obj-$(CONFIG_FB_SUN3) += sun3fb.o | ||
79 | obj-$(CONFIG_FB_HIT) += hitfb.o | 76 | obj-$(CONFIG_FB_HIT) += hitfb.o |
80 | obj-$(CONFIG_FB_EPSON1355) += epson1355fb.o | 77 | obj-$(CONFIG_FB_EPSON1355) += epson1355fb.o |
81 | obj-$(CONFIG_FB_PVR2) += pvr2fb.o | 78 | obj-$(CONFIG_FB_PVR2) += pvr2fb.o |
@@ -100,6 +97,7 @@ obj-$(CONFIG_FB_S3C2410) += s3c2410fb.o | |||
100 | obj-$(CONFIG_FB_PNX4008_DUM) += pnx4008/ | 97 | obj-$(CONFIG_FB_PNX4008_DUM) += pnx4008/ |
101 | obj-$(CONFIG_FB_PNX4008_DUM_RGB) += pnx4008/ | 98 | obj-$(CONFIG_FB_PNX4008_DUM_RGB) += pnx4008/ |
102 | obj-$(CONFIG_FB_IBM_GXT4500) += gxt4500.o | 99 | obj-$(CONFIG_FB_IBM_GXT4500) += gxt4500.o |
100 | obj-$(CONFIG_FB_PS3) += ps3fb.o | ||
103 | 101 | ||
104 | # Platform or fallback drivers go here | 102 | # Platform or fallback drivers go here |
105 | obj-$(CONFIG_FB_VESA) += vesafb.o | 103 | obj-$(CONFIG_FB_VESA) += vesafb.o |
diff --git a/drivers/video/S3triofb.c b/drivers/video/S3triofb.c deleted file mode 100644 index b3717c8f1bc2..000000000000 --- a/drivers/video/S3triofb.c +++ /dev/null | |||
@@ -1,790 +0,0 @@ | |||
1 | /* | ||
2 | * linux/drivers/video/S3Triofb.c -- Open Firmware based frame buffer device | ||
3 | * | ||
4 | * Copyright (C) 1997 Peter De Schrijver | ||
5 | * | ||
6 | * This driver is partly based on the PowerMac console driver: | ||
7 | * | ||
8 | * Copyright (C) 1996 Paul Mackerras | ||
9 | * | ||
10 | * and on the Open Firmware based frame buffer device: | ||
11 | * | ||
12 | * Copyright (C) 1997 Geert Uytterhoeven | ||
13 | * | ||
14 | * This file is subject to the terms and conditions of the GNU General Public | ||
15 | * License. See the file COPYING in the main directory of this archive for | ||
16 | * more details. | ||
17 | */ | ||
18 | |||
19 | /* | ||
20 | Bugs : + OF dependencies should be removed. | ||
21 | + This driver should be merged with the CyberVision driver. The | ||
22 | CyberVision is a Zorro III implementation of the S3Trio64 chip. | ||
23 | |||
24 | */ | ||
25 | |||
26 | #include <linux/kernel.h> | ||
27 | #include <linux/module.h> | ||
28 | #include <linux/errno.h> | ||
29 | #include <linux/string.h> | ||
30 | #include <linux/mm.h> | ||
31 | #include <linux/slab.h> | ||
32 | #include <linux/vmalloc.h> | ||
33 | #include <linux/delay.h> | ||
34 | #include <linux/interrupt.h> | ||
35 | #include <linux/fb.h> | ||
36 | #include <linux/init.h> | ||
37 | #include <linux/selection.h> | ||
38 | #include <asm/io.h> | ||
39 | #include <asm/prom.h> | ||
40 | #include <asm/pci-bridge.h> | ||
41 | #include <linux/pci.h> | ||
42 | |||
43 | #include <video/fbcon.h> | ||
44 | #include <video/fbcon-cfb8.h> | ||
45 | #include <video/s3blit.h> | ||
46 | |||
47 | |||
48 | #define mem_in8(addr) in_8((void *)(addr)) | ||
49 | #define mem_in16(addr) in_le16((void *)(addr)) | ||
50 | #define mem_in32(addr) in_le32((void *)(addr)) | ||
51 | |||
52 | #define mem_out8(val, addr) out_8((void *)(addr), val) | ||
53 | #define mem_out16(val, addr) out_le16((void *)(addr), val) | ||
54 | #define mem_out32(val, addr) out_le32((void *)(addr), val) | ||
55 | |||
56 | #define IO_OUT16VAL(v, r) (((v) << 8) | (r)) | ||
57 | |||
58 | static struct display disp; | ||
59 | static struct fb_info fb_info; | ||
60 | static struct { u_char red, green, blue, pad; } palette[256]; | ||
61 | static char s3trio_name[16] = "S3Trio "; | ||
62 | static char *s3trio_base; | ||
63 | |||
64 | static struct fb_fix_screeninfo fb_fix; | ||
65 | static struct fb_var_screeninfo fb_var = { 0, }; | ||
66 | |||
67 | |||
68 | /* | ||
69 | * Interface used by the world | ||
70 | */ | ||
71 | |||
72 | static void __init s3triofb_of_init(struct device_node *dp); | ||
73 | static int s3trio_get_fix(struct fb_fix_screeninfo *fix, int con, | ||
74 | struct fb_info *info); | ||
75 | static int s3trio_get_var(struct fb_var_screeninfo *var, int con, | ||
76 | struct fb_info *info); | ||
77 | static int s3trio_set_var(struct fb_var_screeninfo *var, int con, | ||
78 | struct fb_info *info); | ||
79 | static int s3trio_get_cmap(struct fb_cmap *cmap, int kspc, int con, | ||
80 | struct fb_info *info); | ||
81 | static int s3trio_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | ||
82 | u_int transp, struct fb_info *info); | ||
83 | static int s3trio_pan_display(struct fb_var_screeninfo *var, int con, | ||
84 | struct fb_info *info); | ||
85 | static void s3triofb_blank(int blank, struct fb_info *info); | ||
86 | |||
87 | /* | ||
88 | * Interface to the low level console driver | ||
89 | */ | ||
90 | |||
91 | int s3triofb_init(void); | ||
92 | static int s3triofbcon_switch(int con, struct fb_info *info); | ||
93 | static int s3triofbcon_updatevar(int con, struct fb_info *info); | ||
94 | |||
95 | /* | ||
96 | * Text console acceleration | ||
97 | */ | ||
98 | |||
99 | #ifdef FBCON_HAS_CFB8 | ||
100 | static struct display_switch fbcon_trio8; | ||
101 | #endif | ||
102 | |||
103 | /* | ||
104 | * Accelerated Functions used by the low level console driver | ||
105 | */ | ||
106 | |||
107 | static void Trio_WaitQueue(u_short fifo); | ||
108 | static void Trio_WaitBlit(void); | ||
109 | static void Trio_BitBLT(u_short curx, u_short cury, u_short destx, | ||
110 | u_short desty, u_short width, u_short height, | ||
111 | u_short mode); | ||
112 | static void Trio_RectFill(u_short x, u_short y, u_short width, u_short height, | ||
113 | u_short mode, u_short color); | ||
114 | static void Trio_MoveCursor(u_short x, u_short y); | ||
115 | |||
116 | |||
117 | /* | ||
118 | * Internal routines | ||
119 | */ | ||
120 | |||
121 | static int s3trio_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, | ||
122 | u_int *transp, struct fb_info *info); | ||
123 | |||
124 | static struct fb_ops s3trio_ops = { | ||
125 | .owner = THIS_MODULE, | ||
126 | .fb_get_fix = s3trio_get_fix, | ||
127 | .fb_get_var = s3trio_get_var, | ||
128 | .fb_set_var = s3trio_set_var, | ||
129 | .fb_get_cmap = s3trio_get_cmap, | ||
130 | .fb_set_cmap = gen_set_cmap, | ||
131 | .fb_setcolreg = s3trio_setcolreg, | ||
132 | .fb_pan_display =s3trio_pan_display, | ||
133 | .fb_blank = s3triofb_blank, | ||
134 | }; | ||
135 | |||
136 | /* | ||
137 | * Get the Fixed Part of the Display | ||
138 | */ | ||
139 | |||
140 | static int s3trio_get_fix(struct fb_fix_screeninfo *fix, int con, | ||
141 | struct fb_info *info) | ||
142 | { | ||
143 | memcpy(fix, &fb_fix, sizeof(fb_fix)); | ||
144 | return 0; | ||
145 | } | ||
146 | |||
147 | |||
148 | /* | ||
149 | * Get the User Defined Part of the Display | ||
150 | */ | ||
151 | |||
152 | static int s3trio_get_var(struct fb_var_screeninfo *var, int con, | ||
153 | struct fb_info *info) | ||
154 | { | ||
155 | memcpy(var, &fb_var, sizeof(fb_var)); | ||
156 | return 0; | ||
157 | } | ||
158 | |||
159 | |||
160 | /* | ||
161 | * Set the User Defined Part of the Display | ||
162 | */ | ||
163 | |||
164 | static int s3trio_set_var(struct fb_var_screeninfo *var, int con, | ||
165 | struct fb_info *info) | ||
166 | { | ||
167 | if (var->xres > fb_var.xres || var->yres > fb_var.yres || | ||
168 | var->bits_per_pixel > fb_var.bits_per_pixel ) | ||
169 | /* || var->nonstd || var->vmode != FB_VMODE_NONINTERLACED) */ | ||
170 | return -EINVAL; | ||
171 | if (var->xres_virtual > fb_var.xres_virtual) { | ||
172 | outw(IO_OUT16VAL((var->xres_virtual /8) & 0xff, 0x13), 0x3d4); | ||
173 | outw(IO_OUT16VAL(((var->xres_virtual /8 ) & 0x300) >> 3, 0x51), 0x3d4); | ||
174 | fb_var.xres_virtual = var->xres_virtual; | ||
175 | fb_fix.line_length = var->xres_virtual; | ||
176 | } | ||
177 | fb_var.yres_virtual = var->yres_virtual; | ||
178 | memcpy(var, &fb_var, sizeof(fb_var)); | ||
179 | return 0; | ||
180 | } | ||
181 | |||
182 | |||
183 | /* | ||
184 | * Pan or Wrap the Display | ||
185 | * | ||
186 | * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag | ||
187 | */ | ||
188 | |||
189 | static int s3trio_pan_display(struct fb_var_screeninfo *var, int con, | ||
190 | struct fb_info *info) | ||
191 | { | ||
192 | unsigned int base; | ||
193 | |||
194 | if (var->xoffset > (var->xres_virtual - var->xres)) | ||
195 | return -EINVAL; | ||
196 | if (var->yoffset > (var->yres_virtual - var->yres)) | ||
197 | return -EINVAL; | ||
198 | |||
199 | fb_var.xoffset = var->xoffset; | ||
200 | fb_var.yoffset = var->yoffset; | ||
201 | |||
202 | base = var->yoffset * fb_fix.line_length + var->xoffset; | ||
203 | |||
204 | outw(IO_OUT16VAL((base >> 8) & 0xff, 0x0c),0x03D4); | ||
205 | outw(IO_OUT16VAL(base & 0xff, 0x0d),0x03D4); | ||
206 | outw(IO_OUT16VAL((base >> 16) & 0xf, 0x69),0x03D4); | ||
207 | return 0; | ||
208 | } | ||
209 | |||
210 | |||
211 | /* | ||
212 | * Get the Colormap | ||
213 | */ | ||
214 | |||
215 | static int s3trio_get_cmap(struct fb_cmap *cmap, int kspc, int con, | ||
216 | struct fb_info *info) | ||
217 | { | ||
218 | if (con == info->currcon) /* current console? */ | ||
219 | return fb_get_cmap(cmap, kspc, s3trio_getcolreg, info); | ||
220 | else if (fb_display[con].cmap.len) /* non default colormap? */ | ||
221 | fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2); | ||
222 | else | ||
223 | fb_copy_cmap(fb_default_cmap(1 << fb_display[con].var.bits_per_pixel), | ||
224 | cmap, kspc ? 0 : 2); | ||
225 | return 0; | ||
226 | } | ||
227 | |||
228 | int __init s3triofb_init(void) | ||
229 | { | ||
230 | struct device_node *dp; | ||
231 | |||
232 | dp = find_devices("S3Trio"); | ||
233 | if (dp != 0) | ||
234 | s3triofb_of_init(dp); | ||
235 | return 0; | ||
236 | } | ||
237 | |||
238 | void __init s3trio_resetaccel(void){ | ||
239 | |||
240 | |||
241 | #define EC01_ENH_ENB 0x0005 | ||
242 | #define EC01_LAW_ENB 0x0010 | ||
243 | #define EC01_MMIO_ENB 0x0020 | ||
244 | |||
245 | #define EC00_RESET 0x8000 | ||
246 | #define EC00_ENABLE 0x4000 | ||
247 | #define MF_MULT_MISC 0xE000 | ||
248 | #define SRC_FOREGROUND 0x0020 | ||
249 | #define SRC_BACKGROUND 0x0000 | ||
250 | #define MIX_SRC 0x0007 | ||
251 | #define MF_T_CLIP 0x1000 | ||
252 | #define MF_L_CLIP 0x2000 | ||
253 | #define MF_B_CLIP 0x3000 | ||
254 | #define MF_R_CLIP 0x4000 | ||
255 | #define MF_PIX_CONTROL 0xA000 | ||
256 | #define MFA_SRC_FOREGR_MIX 0x0000 | ||
257 | #define MF_PIX_CONTROL 0xA000 | ||
258 | |||
259 | outw(EC00_RESET, 0x42e8); | ||
260 | inw( 0x42e8); | ||
261 | outw(EC00_ENABLE, 0x42e8); | ||
262 | inw( 0x42e8); | ||
263 | outw(EC01_ENH_ENB | EC01_LAW_ENB, | ||
264 | 0x4ae8); | ||
265 | outw(MF_MULT_MISC, 0xbee8); /* 16 bit I/O registers */ | ||
266 | |||
267 | /* Now set some basic accelerator registers */ | ||
268 | Trio_WaitQueue(0x0400); | ||
269 | outw(SRC_FOREGROUND | MIX_SRC, 0xbae8); | ||
270 | outw(SRC_BACKGROUND | MIX_SRC, 0xb6e8);/* direct color*/ | ||
271 | outw(MF_T_CLIP | 0, 0xbee8 ); /* clip virtual area */ | ||
272 | outw(MF_L_CLIP | 0, 0xbee8 ); | ||
273 | outw(MF_R_CLIP | (640 - 1), 0xbee8); | ||
274 | outw(MF_B_CLIP | (480 - 1), 0xbee8); | ||
275 | Trio_WaitQueue(0x0400); | ||
276 | outw(0xffff, 0xaae8); /* Enable all planes */ | ||
277 | outw(0xffff, 0xaae8); /* Enable all planes */ | ||
278 | outw( MF_PIX_CONTROL | MFA_SRC_FOREGR_MIX, 0xbee8); | ||
279 | } | ||
280 | |||
281 | int __init s3trio_init(struct device_node *dp){ | ||
282 | |||
283 | u_char bus, dev; | ||
284 | unsigned int t32; | ||
285 | unsigned short cmd; | ||
286 | |||
287 | pci_device_loc(dp,&bus,&dev); | ||
288 | pcibios_read_config_dword(bus, dev, PCI_VENDOR_ID, &t32); | ||
289 | if(t32 == (PCI_DEVICE_ID_S3_TRIO << 16) + PCI_VENDOR_ID_S3) { | ||
290 | pcibios_read_config_dword(bus, dev, PCI_BASE_ADDRESS_0, &t32); | ||
291 | pcibios_read_config_dword(bus, dev, PCI_BASE_ADDRESS_1, &t32); | ||
292 | pcibios_read_config_word(bus, dev, PCI_COMMAND,&cmd); | ||
293 | |||
294 | pcibios_write_config_word(bus, dev, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY); | ||
295 | |||
296 | pcibios_write_config_dword(bus, dev, PCI_BASE_ADDRESS_0,0xffffffff); | ||
297 | pcibios_read_config_dword(bus, dev, PCI_BASE_ADDRESS_0, &t32); | ||
298 | |||
299 | /* This is a gross hack as OF only maps enough memory for the framebuffer and | ||
300 | we want to use MMIO too. We should find out which chunk of address space | ||
301 | we can use here */ | ||
302 | pcibios_write_config_dword(bus,dev,PCI_BASE_ADDRESS_0,0xc6000000); | ||
303 | |||
304 | /* unlock s3 */ | ||
305 | |||
306 | outb(0x01, 0x3C3); | ||
307 | |||
308 | outb(inb(0x03CC) | 1, 0x3c2); | ||
309 | |||
310 | outw(IO_OUT16VAL(0x48, 0x38),0x03D4); | ||
311 | outw(IO_OUT16VAL(0xA0, 0x39),0x03D4); | ||
312 | outb(0x33,0x3d4); | ||
313 | outw(IO_OUT16VAL((inb(0x3d5) & ~(0x2 | 0x10 | 0x40)) | | ||
314 | 0x20, 0x33), 0x3d4); | ||
315 | |||
316 | outw(IO_OUT16VAL(0x6, 0x8), 0x3c4); | ||
317 | |||
318 | /* switch to MMIO only mode */ | ||
319 | |||
320 | outb(0x58, 0x3d4); | ||
321 | outw(IO_OUT16VAL(inb(0x3d5) | 3 | 0x10, 0x58), 0x3d4); | ||
322 | outw(IO_OUT16VAL(8, 0x53), 0x3d4); | ||
323 | |||
324 | /* switch off I/O accesses */ | ||
325 | |||
326 | #if 0 | ||
327 | pcibios_write_config_word(bus, dev, PCI_COMMAND, | ||
328 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY); | ||
329 | #endif | ||
330 | return 1; | ||
331 | } | ||
332 | |||
333 | return 0; | ||
334 | } | ||
335 | |||
336 | |||
337 | /* | ||
338 | * Initialisation | ||
339 | * We heavily rely on OF for the moment. This needs fixing. | ||
340 | */ | ||
341 | |||
342 | static void __init s3triofb_of_init(struct device_node *dp) | ||
343 | { | ||
344 | int i, *pp, len; | ||
345 | unsigned long address, size; | ||
346 | u_long *CursorBase; | ||
347 | |||
348 | strncat(s3trio_name, dp->name, sizeof(s3trio_name)); | ||
349 | s3trio_name[sizeof(s3trio_name)-1] = '\0'; | ||
350 | strcpy(fb_fix.id, s3trio_name); | ||
351 | |||
352 | if((pp = get_property(dp, "vendor-id", &len)) != NULL | ||
353 | && *pp!=PCI_VENDOR_ID_S3) { | ||
354 | printk("%s: can't find S3 Trio board\n", dp->full_name); | ||
355 | return; | ||
356 | } | ||
357 | |||
358 | if((pp = get_property(dp, "device-id", &len)) != NULL | ||
359 | && *pp!=PCI_DEVICE_ID_S3_TRIO) { | ||
360 | printk("%s: can't find S3 Trio board\n", dp->full_name); | ||
361 | return; | ||
362 | } | ||
363 | |||
364 | if ((pp = get_property(dp, "depth", &len)) != NULL | ||
365 | && len == sizeof(int) && *pp != 8) { | ||
366 | printk("%s: can't use depth = %d\n", dp->full_name, *pp); | ||
367 | return; | ||
368 | } | ||
369 | if ((pp = get_property(dp, "width", &len)) != NULL | ||
370 | && len == sizeof(int)) | ||
371 | fb_var.xres = fb_var.xres_virtual = *pp; | ||
372 | if ((pp = get_property(dp, "height", &len)) != NULL | ||
373 | && len == sizeof(int)) | ||
374 | fb_var.yres = fb_var.yres_virtual = *pp; | ||
375 | if ((pp = get_property(dp, "linebytes", &len)) != NULL | ||
376 | && len == sizeof(int)) | ||
377 | fb_fix.line_length = *pp; | ||
378 | else | ||
379 | fb_fix.line_length = fb_var.xres_virtual; | ||
380 | fb_fix.smem_len = fb_fix.line_length*fb_var.yres; | ||
381 | |||
382 | address = 0xc6000000; | ||
383 | size = 64*1024*1024; | ||
384 | if (!request_mem_region(address, size, "S3triofb")) | ||
385 | return; | ||
386 | |||
387 | s3trio_init(dp); | ||
388 | s3trio_base = ioremap(address, size); | ||
389 | fb_fix.smem_start = address; | ||
390 | fb_fix.type = FB_TYPE_PACKED_PIXELS; | ||
391 | fb_fix.type_aux = 0; | ||
392 | fb_fix.accel = FB_ACCEL_S3_TRIO64; | ||
393 | fb_fix.mmio_start = address+0x1000000; | ||
394 | fb_fix.mmio_len = 0x1000000; | ||
395 | |||
396 | fb_fix.xpanstep = 1; | ||
397 | fb_fix.ypanstep = 1; | ||
398 | |||
399 | s3trio_resetaccel(); | ||
400 | |||
401 | mem_out8(0x30, s3trio_base+0x1008000 + 0x03D4); | ||
402 | mem_out8(0x2d, s3trio_base+0x1008000 + 0x03D4); | ||
403 | mem_out8(0x2e, s3trio_base+0x1008000 + 0x03D4); | ||
404 | |||
405 | mem_out8(0x50, s3trio_base+0x1008000 + 0x03D4); | ||
406 | |||
407 | /* disable HW cursor */ | ||
408 | |||
409 | mem_out8(0x39, s3trio_base+0x1008000 + 0x03D4); | ||
410 | mem_out8(0xa0, s3trio_base+0x1008000 + 0x03D5); | ||
411 | |||
412 | mem_out8(0x45, s3trio_base+0x1008000 + 0x03D4); | ||
413 | mem_out8(0, s3trio_base+0x1008000 + 0x03D5); | ||
414 | |||
415 | mem_out8(0x4e, s3trio_base+0x1008000 + 0x03D4); | ||
416 | mem_out8(0, s3trio_base+0x1008000 + 0x03D5); | ||
417 | |||
418 | mem_out8(0x4f, s3trio_base+0x1008000 + 0x03D4); | ||
419 | mem_out8(0, s3trio_base+0x1008000 + 0x03D5); | ||
420 | |||
421 | /* init HW cursor */ | ||
422 | |||
423 | CursorBase = (u_long *)(s3trio_base + 2*1024*1024 - 0x400); | ||
424 | for (i = 0; i < 8; i++) { | ||
425 | *(CursorBase +(i*4)) = 0xffffff00; | ||
426 | *(CursorBase+1+(i*4)) = 0xffff0000; | ||
427 | *(CursorBase+2+(i*4)) = 0xffff0000; | ||
428 | *(CursorBase+3+(i*4)) = 0xffff0000; | ||
429 | } | ||
430 | for (i = 8; i < 64; i++) { | ||
431 | *(CursorBase +(i*4)) = 0xffff0000; | ||
432 | *(CursorBase+1+(i*4)) = 0xffff0000; | ||
433 | *(CursorBase+2+(i*4)) = 0xffff0000; | ||
434 | *(CursorBase+3+(i*4)) = 0xffff0000; | ||
435 | } | ||
436 | |||
437 | |||
438 | mem_out8(0x4c, s3trio_base+0x1008000 + 0x03D4); | ||
439 | mem_out8(((2*1024 - 1)&0xf00)>>8, s3trio_base+0x1008000 + 0x03D5); | ||
440 | |||
441 | mem_out8(0x4d, s3trio_base+0x1008000 + 0x03D4); | ||
442 | mem_out8((2*1024 - 1) & 0xff, s3trio_base+0x1008000 + 0x03D5); | ||
443 | |||
444 | mem_out8(0x45, s3trio_base+0x1008000 + 0x03D4); | ||
445 | mem_in8(s3trio_base+0x1008000 + 0x03D4); | ||
446 | |||
447 | mem_out8(0x4a, s3trio_base+0x1008000 + 0x03D4); | ||
448 | mem_out8(0x80, s3trio_base+0x1008000 + 0x03D5); | ||
449 | mem_out8(0x80, s3trio_base+0x1008000 + 0x03D5); | ||
450 | mem_out8(0x80, s3trio_base+0x1008000 + 0x03D5); | ||
451 | |||
452 | mem_out8(0x4b, s3trio_base+0x1008000 + 0x03D4); | ||
453 | mem_out8(0x00, s3trio_base+0x1008000 + 0x03D5); | ||
454 | mem_out8(0x00, s3trio_base+0x1008000 + 0x03D5); | ||
455 | mem_out8(0x00, s3trio_base+0x1008000 + 0x03D5); | ||
456 | |||
457 | mem_out8(0x45, s3trio_base+0x1008000 + 0x03D4); | ||
458 | mem_out8(0, s3trio_base+0x1008000 + 0x03D5); | ||
459 | |||
460 | /* setup default color table */ | ||
461 | |||
462 | for(i = 0; i < 16; i++) { | ||
463 | int j = color_table[i]; | ||
464 | palette[i].red=default_red[j]; | ||
465 | palette[i].green=default_grn[j]; | ||
466 | palette[i].blue=default_blu[j]; | ||
467 | } | ||
468 | |||
469 | s3trio_setcolreg(255, 56, 100, 160, 0, NULL /* not used */); | ||
470 | s3trio_setcolreg(254, 0, 0, 0, 0, NULL /* not used */); | ||
471 | memset((char *)s3trio_base, 0, 640*480); | ||
472 | |||
473 | #if 0 | ||
474 | Trio_RectFill(0, 0, 90, 90, 7, 1); | ||
475 | #endif | ||
476 | |||
477 | fb_fix.visual = FB_VISUAL_PSEUDOCOLOR ; | ||
478 | fb_var.xoffset = fb_var.yoffset = 0; | ||
479 | fb_var.bits_per_pixel = 8; | ||
480 | fb_var.grayscale = 0; | ||
481 | fb_var.red.offset = fb_var.green.offset = fb_var.blue.offset = 0; | ||
482 | fb_var.red.length = fb_var.green.length = fb_var.blue.length = 8; | ||
483 | fb_var.red.msb_right = fb_var.green.msb_right = fb_var.blue.msb_right = 0; | ||
484 | fb_var.transp.offset = fb_var.transp.length = fb_var.transp.msb_right = 0; | ||
485 | fb_var.nonstd = 0; | ||
486 | fb_var.activate = 0; | ||
487 | fb_var.height = fb_var.width = -1; | ||
488 | fb_var.accel_flags = FB_ACCELF_TEXT; | ||
489 | #warning FIXME: always obey fb_var.accel_flags | ||
490 | fb_var.pixclock = 1; | ||
491 | fb_var.left_margin = fb_var.right_margin = 0; | ||
492 | fb_var.upper_margin = fb_var.lower_margin = 0; | ||
493 | fb_var.hsync_len = fb_var.vsync_len = 0; | ||
494 | fb_var.sync = 0; | ||
495 | fb_var.vmode = FB_VMODE_NONINTERLACED; | ||
496 | |||
497 | disp.var = fb_var; | ||
498 | disp.cmap.start = 0; | ||
499 | disp.cmap.len = 0; | ||
500 | disp.cmap.red = disp.cmap.green = disp.cmap.blue = disp.cmap.transp = NULL; | ||
501 | disp.visual = fb_fix.visual; | ||
502 | disp.type = fb_fix.type; | ||
503 | disp.type_aux = fb_fix.type_aux; | ||
504 | disp.ypanstep = 0; | ||
505 | disp.ywrapstep = 0; | ||
506 | disp.line_length = fb_fix.line_length; | ||
507 | disp.can_soft_blank = 1; | ||
508 | disp.inverse = 0; | ||
509 | #ifdef FBCON_HAS_CFB8 | ||
510 | if (fb_var.accel_flags & FB_ACCELF_TEXT) | ||
511 | disp.dispsw = &fbcon_trio8; | ||
512 | else | ||
513 | disp.dispsw = &fbcon_cfb8; | ||
514 | #else | ||
515 | disp.dispsw = &fbcon_dummy; | ||
516 | #endif | ||
517 | disp.scrollmode = fb_var.accel_flags & FB_ACCELF_TEXT ? 0 : SCROLL_YREDRAW; | ||
518 | |||
519 | strcpy(fb_info.modename, "Trio64 "); | ||
520 | strncat(fb_info.modename, dp->full_name, sizeof(fb_info.modename)); | ||
521 | fb_info.currcon = -1; | ||
522 | fb_info.fbops = &s3trio_ops; | ||
523 | fb_info.screen_base = s3trio_base; | ||
524 | #if 0 | ||
525 | fb_info.fbvar_num = 1; | ||
526 | fb_info.fbvar = &fb_var; | ||
527 | #endif | ||
528 | fb_info.disp = &disp; | ||
529 | fb_info.fontname[0] = '\0'; | ||
530 | fb_info.changevar = NULL; | ||
531 | fb_info.switch_con = &s3triofbcon_switch; | ||
532 | fb_info.updatevar = &s3triofbcon_updatevar; | ||
533 | #if 0 | ||
534 | fb_info.setcmap = &s3triofbcon_setcmap; | ||
535 | #endif | ||
536 | |||
537 | fb_info.flags = FBINFO_FLAG_DEFAULT; | ||
538 | if (register_framebuffer(&fb_info) < 0) { | ||
539 | iounmap(fb_info.screen_base); | ||
540 | fb_info.screen_base = NULL; | ||
541 | return; | ||
542 | } | ||
543 | |||
544 | printk("fb%d: S3 Trio frame buffer device on %s\n", | ||
545 | fb_info.node, dp->full_name); | ||
546 | } | ||
547 | |||
548 | |||
549 | static int s3triofbcon_switch(int con, struct fb_info *info) | ||
550 | { | ||
551 | /* Do we have to save the colormap? */ | ||
552 | if (fb_display[info->currcon].cmap.len) | ||
553 | fb_get_cmap(&fb_display[info->currcon].cmap, 1, s3trio_getcolreg, info); | ||
554 | |||
555 | info->currcon = con; | ||
556 | /* Install new colormap */ | ||
557 | do_install_cmap(con,info); | ||
558 | return 0; | ||
559 | } | ||
560 | |||
561 | /* | ||
562 | * Update the `var' structure (called by fbcon.c) | ||
563 | */ | ||
564 | |||
565 | static int s3triofbcon_updatevar(int con, struct fb_info *info) | ||
566 | { | ||
567 | /* Nothing */ | ||
568 | return 0; | ||
569 | } | ||
570 | |||
571 | /* | ||
572 | * Blank the display. | ||
573 | */ | ||
574 | |||
575 | static int s3triofb_blank(int blank, struct fb_info *info) | ||
576 | { | ||
577 | unsigned char x; | ||
578 | |||
579 | mem_out8(0x1, s3trio_base+0x1008000 + 0x03c4); | ||
580 | x = mem_in8(s3trio_base+0x1008000 + 0x03c5); | ||
581 | mem_out8((x & (~0x20)) | (blank << 5), s3trio_base+0x1008000 + 0x03c5); | ||
582 | return 0; | ||
583 | } | ||
584 | |||
585 | /* | ||
586 | * Read a single color register and split it into | ||
587 | * colors/transparent. Return != 0 for invalid regno. | ||
588 | */ | ||
589 | |||
590 | static int s3trio_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, | ||
591 | u_int *transp, struct fb_info *info) | ||
592 | { | ||
593 | if (regno > 255) | ||
594 | return 1; | ||
595 | *red = (palette[regno].red << 8) | palette[regno].red; | ||
596 | *green = (palette[regno].green << 8) | palette[regno].green; | ||
597 | *blue = (palette[regno].blue << 8) | palette[regno].blue; | ||
598 | *transp = 0; | ||
599 | return 0; | ||
600 | } | ||
601 | |||
602 | |||
603 | /* | ||
604 | * Set a single color register. Return != 0 for invalid regno. | ||
605 | */ | ||
606 | |||
607 | static int s3trio_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | ||
608 | u_int transp, struct fb_info *info) | ||
609 | { | ||
610 | if (regno > 255) | ||
611 | return 1; | ||
612 | |||
613 | red >>= 8; | ||
614 | green >>= 8; | ||
615 | blue >>= 8; | ||
616 | palette[regno].red = red; | ||
617 | palette[regno].green = green; | ||
618 | palette[regno].blue = blue; | ||
619 | |||
620 | mem_out8(regno,s3trio_base+0x1008000 + 0x3c8); | ||
621 | mem_out8((red & 0xff) >> 2,s3trio_base+0x1008000 + 0x3c9); | ||
622 | mem_out8((green & 0xff) >> 2,s3trio_base+0x1008000 + 0x3c9); | ||
623 | mem_out8((blue & 0xff) >> 2,s3trio_base+0x1008000 + 0x3c9); | ||
624 | |||
625 | return 0; | ||
626 | } | ||
627 | |||
628 | static void Trio_WaitQueue(u_short fifo) { | ||
629 | |||
630 | u_short status; | ||
631 | |||
632 | do | ||
633 | { | ||
634 | status = mem_in16(s3trio_base + 0x1000000 + 0x9AE8); | ||
635 | } while (!(status & fifo)); | ||
636 | |||
637 | } | ||
638 | |||
639 | static void Trio_WaitBlit(void) { | ||
640 | |||
641 | u_short status; | ||
642 | |||
643 | do | ||
644 | { | ||
645 | status = mem_in16(s3trio_base + 0x1000000 + 0x9AE8); | ||
646 | } while (status & 0x200); | ||
647 | |||
648 | } | ||
649 | |||
650 | static void Trio_BitBLT(u_short curx, u_short cury, u_short destx, | ||
651 | u_short desty, u_short width, u_short height, | ||
652 | u_short mode) { | ||
653 | |||
654 | u_short blitcmd = 0xc011; | ||
655 | |||
656 | /* Set drawing direction */ | ||
657 | /* -Y, X maj, -X (default) */ | ||
658 | |||
659 | if (curx > destx) | ||
660 | blitcmd |= 0x0020; /* Drawing direction +X */ | ||
661 | else { | ||
662 | curx += (width - 1); | ||
663 | destx += (width - 1); | ||
664 | } | ||
665 | |||
666 | if (cury > desty) | ||
667 | blitcmd |= 0x0080; /* Drawing direction +Y */ | ||
668 | else { | ||
669 | cury += (height - 1); | ||
670 | desty += (height - 1); | ||
671 | } | ||
672 | |||
673 | Trio_WaitQueue(0x0400); | ||
674 | |||
675 | outw(0xa000, 0xBEE8); | ||
676 | outw(0x60 | mode, 0xBAE8); | ||
677 | |||
678 | outw(curx, 0x86E8); | ||
679 | outw(cury, 0x82E8); | ||
680 | |||
681 | outw(destx, 0x8EE8); | ||
682 | outw(desty, 0x8AE8); | ||
683 | |||
684 | outw(height - 1, 0xBEE8); | ||
685 | outw(width - 1, 0x96E8); | ||
686 | |||
687 | outw(blitcmd, 0x9AE8); | ||
688 | |||
689 | } | ||
690 | |||
691 | static void Trio_RectFill(u_short x, u_short y, u_short width, u_short height, | ||
692 | u_short mode, u_short color) { | ||
693 | |||
694 | u_short blitcmd = 0x40b1; | ||
695 | |||
696 | Trio_WaitQueue(0x0400); | ||
697 | |||
698 | outw(0xa000, 0xBEE8); | ||
699 | outw((0x20 | mode), 0xBAE8); | ||
700 | outw(0xe000, 0xBEE8); | ||
701 | outw(color, 0xA6E8); | ||
702 | outw(x, 0x86E8); | ||
703 | outw(y, 0x82E8); | ||
704 | outw((height - 1), 0xBEE8); | ||
705 | outw((width - 1), 0x96E8); | ||
706 | outw(blitcmd, 0x9AE8); | ||
707 | |||
708 | } | ||
709 | |||
710 | |||
711 | static void Trio_MoveCursor(u_short x, u_short y) { | ||
712 | |||
713 | mem_out8(0x39, s3trio_base + 0x1008000 + 0x3d4); | ||
714 | mem_out8(0xa0, s3trio_base + 0x1008000 + 0x3d5); | ||
715 | |||
716 | mem_out8(0x46, s3trio_base + 0x1008000 + 0x3d4); | ||
717 | mem_out8((x & 0x0700) >> 8, s3trio_base + 0x1008000 + 0x3d5); | ||
718 | mem_out8(0x47, s3trio_base + 0x1008000 + 0x3d4); | ||
719 | mem_out8(x & 0x00ff, s3trio_base + 0x1008000 + 0x3d5); | ||
720 | |||
721 | mem_out8(0x48, s3trio_base + 0x1008000 + 0x3d4); | ||
722 | mem_out8((y & 0x0700) >> 8, s3trio_base + 0x1008000 + 0x3d5); | ||
723 | mem_out8(0x49, s3trio_base + 0x1008000 + 0x3d4); | ||
724 | mem_out8(y & 0x00ff, s3trio_base + 0x1008000 + 0x3d5); | ||
725 | |||
726 | } | ||
727 | |||
728 | |||
729 | /* | ||
730 | * Text console acceleration | ||
731 | */ | ||
732 | |||
733 | #ifdef FBCON_HAS_CFB8 | ||
734 | static void fbcon_trio8_bmove(struct display *p, int sy, int sx, int dy, | ||
735 | int dx, int height, int width) | ||
736 | { | ||
737 | sx *= 8; dx *= 8; width *= 8; | ||
738 | Trio_BitBLT((u_short)sx, (u_short)(sy*fontheight(p)), (u_short)dx, | ||
739 | (u_short)(dy*fontheight(p)), (u_short)width, | ||
740 | (u_short)(height*fontheight(p)), (u_short)S3_NEW); | ||
741 | } | ||
742 | |||
743 | static void fbcon_trio8_clear(struct vc_data *conp, struct display *p, int sy, | ||
744 | int sx, int height, int width) | ||
745 | { | ||
746 | unsigned char bg; | ||
747 | |||
748 | sx *= 8; width *= 8; | ||
749 | bg = attr_bgcol_ec(p,conp); | ||
750 | Trio_RectFill((u_short)sx, | ||
751 | (u_short)(sy*fontheight(p)), | ||
752 | (u_short)width, | ||
753 | (u_short)(height*fontheight(p)), | ||
754 | (u_short)S3_NEW, | ||
755 | (u_short)bg); | ||
756 | } | ||
757 | |||
758 | static void fbcon_trio8_putc(struct vc_data *conp, struct display *p, int c, | ||
759 | int yy, int xx) | ||
760 | { | ||
761 | Trio_WaitBlit(); | ||
762 | fbcon_cfb8_putc(conp, p, c, yy, xx); | ||
763 | } | ||
764 | |||
765 | static void fbcon_trio8_putcs(struct vc_data *conp, struct display *p, | ||
766 | const unsigned short *s, int count, int yy, int xx) | ||
767 | { | ||
768 | Trio_WaitBlit(); | ||
769 | fbcon_cfb8_putcs(conp, p, s, count, yy, xx); | ||
770 | } | ||
771 | |||
772 | static void fbcon_trio8_revc(struct display *p, int xx, int yy) | ||
773 | { | ||
774 | Trio_WaitBlit(); | ||
775 | fbcon_cfb8_revc(p, xx, yy); | ||
776 | } | ||
777 | |||
778 | static struct display_switch fbcon_trio8 = { | ||
779 | .setup = fbcon_cfb8_setup, | ||
780 | .bmove = fbcon_trio8_bmove, | ||
781 | .clear = fbcon_trio8_clear, | ||
782 | .putc = fbcon_trio8_putc, | ||
783 | .putcs = fbcon_trio8_putcs, | ||
784 | .revc = fbcon_trio8_revc, | ||
785 | .clear_margins = fbcon_cfb8_clear_margins, | ||
786 | .fontwidthmask = FONTWIDTH(8) | ||
787 | }; | ||
788 | #endif | ||
789 | |||
790 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/video/aty/atyfb_base.c b/drivers/video/aty/atyfb_base.c index f2ebdd880085..301612cef354 100644 --- a/drivers/video/aty/atyfb_base.c +++ b/drivers/video/aty/atyfb_base.c | |||
@@ -2566,7 +2566,7 @@ static int __devinit aty_init(struct fb_info *info) | |||
2566 | info->fix.smem_len == 0x80000 ? 'K' : 'M', ramname, xtal, par->pll_limits.pll_max, | 2566 | info->fix.smem_len == 0x80000 ? 'K' : 'M', ramname, xtal, par->pll_limits.pll_max, |
2567 | par->pll_limits.mclk, par->pll_limits.xclk); | 2567 | par->pll_limits.mclk, par->pll_limits.xclk); |
2568 | 2568 | ||
2569 | #if defined(DEBUG) && defined(CONFIG_ATY_CT) | 2569 | #if defined(DEBUG) && defined(CONFIG_FB_ATY_CT) |
2570 | if (M64_HAS(INTEGRATED)) { | 2570 | if (M64_HAS(INTEGRATED)) { |
2571 | int i; | 2571 | int i; |
2572 | printk("debug atyfb: BUS_CNTL DAC_CNTL MEM_CNTL EXT_MEM_CNTL CRTC_GEN_CNTL " | 2572 | printk("debug atyfb: BUS_CNTL DAC_CNTL MEM_CNTL EXT_MEM_CNTL CRTC_GEN_CNTL " |
@@ -2957,8 +2957,6 @@ extern void (*prom_palette) (int); | |||
2957 | static int __devinit atyfb_setup_sparc(struct pci_dev *pdev, | 2957 | static int __devinit atyfb_setup_sparc(struct pci_dev *pdev, |
2958 | struct fb_info *info, unsigned long addr) | 2958 | struct fb_info *info, unsigned long addr) |
2959 | { | 2959 | { |
2960 | extern int con_is_present(void); | ||
2961 | |||
2962 | struct atyfb_par *par = info->par; | 2960 | struct atyfb_par *par = info->par; |
2963 | struct pcidev_cookie *pcp; | 2961 | struct pcidev_cookie *pcp; |
2964 | char prop[128]; | 2962 | char prop[128]; |
diff --git a/drivers/video/au1100fb.c b/drivers/video/au1100fb.c index ef5c16f7f5a6..80a81eccad36 100644 --- a/drivers/video/au1100fb.c +++ b/drivers/video/au1100fb.c | |||
@@ -468,11 +468,10 @@ int au1100fb_drv_probe(struct device *dev) | |||
468 | return -EINVAL; | 468 | return -EINVAL; |
469 | 469 | ||
470 | /* Allocate new device private */ | 470 | /* Allocate new device private */ |
471 | if (!(fbdev = kmalloc(sizeof(struct au1100fb_device), GFP_KERNEL))) { | 471 | if (!(fbdev = kzalloc(sizeof(struct au1100fb_device), GFP_KERNEL))) { |
472 | print_err("fail to allocate device private record"); | 472 | print_err("fail to allocate device private record"); |
473 | return -ENOMEM; | 473 | return -ENOMEM; |
474 | } | 474 | } |
475 | memset((void*)fbdev, 0, sizeof(struct au1100fb_device)); | ||
476 | 475 | ||
477 | fbdev->panel = &known_lcd_panels[drv_info.panel_idx]; | 476 | fbdev->panel = &known_lcd_panels[drv_info.panel_idx]; |
478 | 477 | ||
@@ -549,10 +548,9 @@ int au1100fb_drv_probe(struct device *dev) | |||
549 | fbdev->info.fbops = &au1100fb_ops; | 548 | fbdev->info.fbops = &au1100fb_ops; |
550 | fbdev->info.fix = au1100fb_fix; | 549 | fbdev->info.fix = au1100fb_fix; |
551 | 550 | ||
552 | if (!(fbdev->info.pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL))) { | 551 | if (!(fbdev->info.pseudo_palette = kzalloc(sizeof(u32) * 16, GFP_KERNEL))) { |
553 | return -ENOMEM; | 552 | return -ENOMEM; |
554 | } | 553 | } |
555 | memset(fbdev->info.pseudo_palette, 0, sizeof(u32) * 16); | ||
556 | 554 | ||
557 | if (fb_alloc_cmap(&fbdev->info.cmap, AU1100_LCD_NBR_PALETTE_ENTRIES, 0) < 0) { | 555 | if (fb_alloc_cmap(&fbdev->info.cmap, AU1100_LCD_NBR_PALETTE_ENTRIES, 0) < 0) { |
558 | print_err("Fail to allocate colormap (%d entries)", | 556 | print_err("Fail to allocate colormap (%d entries)", |
diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c index 31f476a64790..ce5ac268074e 100644 --- a/drivers/video/console/fbcon.c +++ b/drivers/video/console/fbcon.c | |||
@@ -2071,7 +2071,7 @@ static int fbcon_resize(struct vc_data *vc, unsigned int width, | |||
2071 | y_diff = info->var.yres - var.yres; | 2071 | y_diff = info->var.yres - var.yres; |
2072 | if (x_diff < 0 || x_diff > virt_fw || | 2072 | if (x_diff < 0 || x_diff > virt_fw || |
2073 | y_diff < 0 || y_diff > virt_fh) { | 2073 | y_diff < 0 || y_diff > virt_fh) { |
2074 | struct fb_videomode *mode; | 2074 | const struct fb_videomode *mode; |
2075 | 2075 | ||
2076 | DPRINTK("attempting resize %ix%i\n", var.xres, var.yres); | 2076 | DPRINTK("attempting resize %ix%i\n", var.xres, var.yres); |
2077 | mode = fb_find_best_mode(&var, &info->modelist); | 2077 | mode = fb_find_best_mode(&var, &info->modelist); |
@@ -2975,7 +2975,7 @@ static void fbcon_new_modelist(struct fb_info *info) | |||
2975 | int i; | 2975 | int i; |
2976 | struct vc_data *vc; | 2976 | struct vc_data *vc; |
2977 | struct fb_var_screeninfo var; | 2977 | struct fb_var_screeninfo var; |
2978 | struct fb_videomode *mode; | 2978 | const struct fb_videomode *mode; |
2979 | 2979 | ||
2980 | for (i = first_fb_vc; i <= last_fb_vc; i++) { | 2980 | for (i = first_fb_vc; i <= last_fb_vc; i++) { |
2981 | if (registered_fb[con2fb_map[i]] != info) | 2981 | if (registered_fb[con2fb_map[i]] != info) |
diff --git a/drivers/video/console/fbcon.h b/drivers/video/console/fbcon.h index b9386d168c04..71f24e00fcd0 100644 --- a/drivers/video/console/fbcon.h +++ b/drivers/video/console/fbcon.h | |||
@@ -48,7 +48,7 @@ struct display { | |||
48 | struct fb_bitfield green; | 48 | struct fb_bitfield green; |
49 | struct fb_bitfield blue; | 49 | struct fb_bitfield blue; |
50 | struct fb_bitfield transp; | 50 | struct fb_bitfield transp; |
51 | struct fb_videomode *mode; | 51 | const struct fb_videomode *mode; |
52 | }; | 52 | }; |
53 | 53 | ||
54 | struct fbcon_ops { | 54 | struct fbcon_ops { |
diff --git a/drivers/video/controlfb.c b/drivers/video/controlfb.c index 04c6d928189b..fd60dba294da 100644 --- a/drivers/video/controlfb.c +++ b/drivers/video/controlfb.c | |||
@@ -696,11 +696,10 @@ static int __init control_of_init(struct device_node *dp) | |||
696 | printk(KERN_ERR "can't get 2 addresses for control\n"); | 696 | printk(KERN_ERR "can't get 2 addresses for control\n"); |
697 | return -ENXIO; | 697 | return -ENXIO; |
698 | } | 698 | } |
699 | p = kmalloc(sizeof(*p), GFP_KERNEL); | 699 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
700 | if (p == 0) | 700 | if (p == 0) |
701 | return -ENXIO; | 701 | return -ENXIO; |
702 | control_fb = p; /* save it for cleanups */ | 702 | control_fb = p; /* save it for cleanups */ |
703 | memset(p, 0, sizeof(*p)); | ||
704 | 703 | ||
705 | /* Map in frame buffer and registers */ | 704 | /* Map in frame buffer and registers */ |
706 | p->fb_orig_base = fb_res.start; | 705 | p->fb_orig_base = fb_res.start; |
diff --git a/drivers/video/cyber2000fb.c b/drivers/video/cyber2000fb.c index aae6d9c26e88..7a6eeda5ae9a 100644 --- a/drivers/video/cyber2000fb.c +++ b/drivers/video/cyber2000fb.c | |||
@@ -1539,16 +1539,21 @@ static int cyberpro_pci_enable_mmio(struct cfb_info *cfb) | |||
1539 | /* | 1539 | /* |
1540 | * Allow the CyberPro to accept PCI burst accesses | 1540 | * Allow the CyberPro to accept PCI burst accesses |
1541 | */ | 1541 | */ |
1542 | val = cyber2000_grphr(EXT_BUS_CTL, cfb); | 1542 | if (cfb->id == ID_CYBERPRO_2010) { |
1543 | if (!(val & EXT_BUS_CTL_PCIBURST_WRITE)) { | 1543 | printk(KERN_INFO "%s: NOT enabling PCI bursts\n", cfb->fb.fix.id); |
1544 | printk(KERN_INFO "%s: enabling PCI bursts\n", cfb->fb.fix.id); | 1544 | } else { |
1545 | val = cyber2000_grphr(EXT_BUS_CTL, cfb); | ||
1546 | if (!(val & EXT_BUS_CTL_PCIBURST_WRITE)) { | ||
1547 | printk(KERN_INFO "%s: enabling PCI bursts\n", | ||
1548 | cfb->fb.fix.id); | ||
1545 | 1549 | ||
1546 | val |= EXT_BUS_CTL_PCIBURST_WRITE; | 1550 | val |= EXT_BUS_CTL_PCIBURST_WRITE; |
1547 | 1551 | ||
1548 | if (cfb->id == ID_CYBERPRO_5000) | 1552 | if (cfb->id == ID_CYBERPRO_5000) |
1549 | val |= EXT_BUS_CTL_PCIBURST_READ; | 1553 | val |= EXT_BUS_CTL_PCIBURST_READ; |
1550 | 1554 | ||
1551 | cyber2000_grphw(EXT_BUS_CTL, val, cfb); | 1555 | cyber2000_grphw(EXT_BUS_CTL, val, cfb); |
1556 | } | ||
1552 | } | 1557 | } |
1553 | 1558 | ||
1554 | return 0; | 1559 | return 0; |
diff --git a/drivers/video/cyberfb.c b/drivers/video/cyberfb.c deleted file mode 100644 index 0b8d5b121152..000000000000 --- a/drivers/video/cyberfb.c +++ /dev/null | |||
@@ -1,2295 +0,0 @@ | |||
1 | /* | ||
2 | * linux/drivers/video/cyberfb.c -- CyberVision64 frame buffer device | ||
3 | * $Id: cyberfb.c,v 1.6 1998/09/11 04:54:58 abair Exp $ | ||
4 | * | ||
5 | * Copyright (C) 1998 Alan Bair | ||
6 | * | ||
7 | * This file is based on two CyberVision64 frame buffer device drivers | ||
8 | * | ||
9 | * The second CyberVision64 frame buffer device (cvision.c cvision_core.c): | ||
10 | * | ||
11 | * Copyright (c) 1997 Antonio Santos | ||
12 | * | ||
13 | * Released as a patch to 2.1.35, but never included in the source tree. | ||
14 | * This is based on work from the NetBSD CyberVision64 frame buffer driver | ||
15 | * and support files (grf_cv.c, grf_cvreg.h, ite_cv.c): | ||
16 | * Permission to use the source of this driver was obtained from the | ||
17 | * author Michael Teske by Alan Bair. | ||
18 | * | ||
19 | * Copyright (c) 1995 Michael Teske | ||
20 | * | ||
21 | * The first CyberVision64 frame buffer device (cyberfb.c): | ||
22 | * | ||
23 | * Copyright (C) 1996 Martin Apel | ||
24 | * Geert Uytterhoeven | ||
25 | * | ||
26 | * Which is based on the Amiga frame buffer device (amifb.c): | ||
27 | * | ||
28 | * Copyright (C) 1995 Geert Uytterhoeven | ||
29 | * | ||
30 | * | ||
31 | * History: | ||
32 | * - 22 Dec 95: Original version by Martin Apel | ||
33 | * - 05 Jan 96: Geert: integration into the current source tree | ||
34 | * - 01 Aug 98: Alan: Merge in code from cvision.c and cvision_core.c | ||
35 | * $Log: cyberfb.c,v $ | ||
36 | * Revision 1.6 1998/09/11 04:54:58 abair | ||
37 | * Update for 2.1.120 change in include file location. | ||
38 | * Clean up for public release. | ||
39 | * | ||
40 | * Revision 1.5 1998/09/03 04:27:13 abair | ||
41 | * Move cv64_load_video_mode to cyber_set_video so a new video mode is install | ||
42 | * with each change of the 'var' data. | ||
43 | * | ||
44 | * Revision 1.4 1998/09/01 00:31:17 abair | ||
45 | * Put in a set of default 8,16,24 bpp modes and map cyber8,16 to them. | ||
46 | * Update operations with 'par' to handle a more complete set of parameter | ||
47 | * values for encode/decode process. | ||
48 | * | ||
49 | * Revision 1.3 1998/08/31 21:31:33 abair | ||
50 | * Swap 800x490 for 640x480 video mode and more cleanup. | ||
51 | * Abandon idea to resurrect "custom" mode setting via kernel opts, | ||
52 | * instead work on making use of fbset program to do this. | ||
53 | * | ||
54 | * Revision 1.2 1998/08/31 06:17:08 abair | ||
55 | * Make updates for changes in cyberfb.c released in 2.1.119 | ||
56 | * and do some cleanup of the code. | ||
57 | * | ||
58 | * Revision 1.1 1998/08/29 18:38:31 abair | ||
59 | * Initial revision | ||
60 | * | ||
61 | * Revision 1.3 1998/08/17 06:21:53 abair | ||
62 | * Remove more redundant code after merging in cvision_core.c | ||
63 | * Set blanking by colormap to pale red to detect this vs trying to | ||
64 | * use video blanking. More formating to Linux code style. | ||
65 | * | ||
66 | * Revision 1.2 1998/08/15 17:51:37 abair | ||
67 | * Added cvision_core.c code from 2.1.35 patches. | ||
68 | * Changed to compile correctly and switch to using initialization | ||
69 | * code. Added debugging and dropping of duplicate code. | ||
70 | * | ||
71 | * | ||
72 | * | ||
73 | * This file is subject to the terms and conditions of the GNU General Public | ||
74 | * License. See the file COPYING in the main directory of this archive | ||
75 | * for more details. | ||
76 | */ | ||
77 | |||
78 | |||
79 | #include <linux/module.h> | ||
80 | #include <linux/kernel.h> | ||
81 | #include <linux/errno.h> | ||
82 | #include <linux/string.h> | ||
83 | #include <linux/mm.h> | ||
84 | #include <linux/slab.h> | ||
85 | #include <linux/delay.h> | ||
86 | #include <linux/zorro.h> | ||
87 | #include <linux/fb.h> | ||
88 | #include <linux/init.h> | ||
89 | #include <asm/uaccess.h> | ||
90 | #include <asm/system.h> | ||
91 | #include <asm/irq.h> | ||
92 | #include <asm/pgtable.h> | ||
93 | #include <asm/amigahw.h> | ||
94 | #include <asm/io.h> | ||
95 | |||
96 | #include "cyberfb.h" | ||
97 | #include <video/fbcon.h> | ||
98 | #include <video/fbcon-cfb8.h> | ||
99 | #include <video/fbcon-cfb16.h> | ||
100 | |||
101 | /*#define CYBERFBDEBUG*/ | ||
102 | #ifdef CYBERFBDEBUG | ||
103 | #define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) | ||
104 | static void cv64_dump(void); | ||
105 | #else | ||
106 | #define DPRINTK(fmt, args...) | ||
107 | #endif | ||
108 | |||
109 | #define wb_64(regs,reg,dat) (*(((volatile unsigned char *)regs) + reg) = dat) | ||
110 | #define rb_64(regs, reg) (*(((volatile unsigned char *)regs) + reg)) | ||
111 | |||
112 | struct cyberfb_par { | ||
113 | struct fb_var_screeninfo var; | ||
114 | __u32 type; | ||
115 | __u32 type_aux; | ||
116 | __u32 visual; | ||
117 | __u32 line_length; | ||
118 | }; | ||
119 | |||
120 | static struct cyberfb_par current_par; | ||
121 | |||
122 | static int current_par_valid = 0; | ||
123 | |||
124 | static struct display disp; | ||
125 | static struct fb_info fb_info; | ||
126 | |||
127 | |||
128 | /* | ||
129 | * Frame Buffer Name | ||
130 | */ | ||
131 | |||
132 | static char cyberfb_name[16] = "Cybervision"; | ||
133 | |||
134 | |||
135 | /* | ||
136 | * CyberVision Graphics Board | ||
137 | */ | ||
138 | |||
139 | static unsigned char Cyber_colour_table [256][3]; | ||
140 | static unsigned long CyberSize; | ||
141 | static volatile unsigned char *CyberBase; | ||
142 | static volatile unsigned char *CyberMem; | ||
143 | static volatile unsigned char *CyberRegs; | ||
144 | static unsigned long CyberMem_phys; | ||
145 | static unsigned long CyberRegs_phys; | ||
146 | |||
147 | /* | ||
148 | * Predefined Video Modes | ||
149 | */ | ||
150 | |||
151 | static struct { | ||
152 | const char *name; | ||
153 | struct fb_var_screeninfo var; | ||
154 | } cyberfb_predefined[] __initdata = { | ||
155 | { "640x480-8", { /* Default 8 BPP mode (cyber8) */ | ||
156 | 640, 480, 640, 480, 0, 0, 8, 0, | ||
157 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
158 | 0, 0, -1, -1, FB_ACCELF_TEXT, 39722, 40, 24, 32, 11, 96, 2, | ||
159 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | ||
160 | FB_VMODE_NONINTERLACED | ||
161 | }}, | ||
162 | { "640x480-16", { /* Default 16 BPP mode (cyber16) */ | ||
163 | 640, 480, 640, 480, 0, 0, 16, 0, | ||
164 | {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, | ||
165 | 0, 0, -1, -1, FB_ACCELF_TEXT, 39722, 40, 24, 32, 11, 96, 2, | ||
166 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | ||
167 | FB_VMODE_NONINTERLACED | ||
168 | }}, | ||
169 | { "640x480-24", { /* Default 24 BPP mode */ | ||
170 | 640, 480, 640, 480, 0, 0, 24, 0, | ||
171 | {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
172 | 0, 0, -1, -1, FB_ACCELF_TEXT, 39722, 40, 24, 32, 11, 96, 2, | ||
173 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | ||
174 | FB_VMODE_NONINTERLACED | ||
175 | }}, | ||
176 | { "800x490-8", { /* Cybervision 8 bpp */ | ||
177 | /* NO Acceleration */ | ||
178 | 800, 490, 800, 490, 0, 0, 8, 0, | ||
179 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
180 | 0, 0, -1, -1, FB_ACCEL_NONE, 33333, 80, 24, 23, 1, 56, 8, | ||
181 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | ||
182 | FB_VMODE_NONINTERLACED | ||
183 | }}, | ||
184 | /* I can't test these with my monitor, but I suspect they will | ||
185 | * be OK, since Antonio Santos indicated he had tested them in | ||
186 | * his system. | ||
187 | */ | ||
188 | { "800x600-8", { /* Cybervision 8 bpp */ | ||
189 | 800, 600, 800, 600, 0, 0, 8, 0, | ||
190 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
191 | 0, 0, -1, -1, FB_ACCELF_TEXT, 27778, 64, 24, 22, 1, 72, 2, | ||
192 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | ||
193 | FB_VMODE_NONINTERLACED | ||
194 | }}, | ||
195 | { "1024x768-8", { /* Cybervision 8 bpp */ | ||
196 | 1024, 768, 1024, 768, 0, 0, 8, 0, | ||
197 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
198 | 0, 0, -1, -1, FB_ACCELF_TEXT, 16667, 224, 72, 60, 12, 168, 4, | ||
199 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | ||
200 | FB_VMODE_NONINTERLACED | ||
201 | }}, | ||
202 | { "1152x886-8", { /* Cybervision 8 bpp */ | ||
203 | 1152, 886, 1152, 886, 0, 0, 8, 0, | ||
204 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
205 | 0, 0, -1, -1, FB_ACCELF_TEXT, 15873, 184, 40, 24, 1, 56, 16, | ||
206 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | ||
207 | FB_VMODE_NONINTERLACED | ||
208 | }}, | ||
209 | { "1280x1024-8", { /* Cybervision 8 bpp */ | ||
210 | 1280, 1024, 1280, 1024, 0, 0, 8, 0, | ||
211 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
212 | 0, 0, -1, -1, FB_ACCELF_TEXT, 16667, 256, 48, 50, 12, 72, 4, | ||
213 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, | ||
214 | FB_VMODE_INTERLACED | ||
215 | }} | ||
216 | }; | ||
217 | |||
218 | #define NUM_TOTAL_MODES ARRAY_SIZE(cyberfb_predefined) | ||
219 | |||
220 | static int Cyberfb_inverse = 0; | ||
221 | |||
222 | /* | ||
223 | * Some default modes | ||
224 | */ | ||
225 | |||
226 | #define CYBER8_DEFMODE (0) | ||
227 | #define CYBER16_DEFMODE (1) | ||
228 | |||
229 | static struct fb_var_screeninfo cyberfb_default; | ||
230 | static int cyberfb_usermode __initdata = 0; | ||
231 | |||
232 | /* | ||
233 | * Interface used by the world | ||
234 | */ | ||
235 | |||
236 | int cyberfb_setup(char *options); | ||
237 | |||
238 | static int cyberfb_get_fix(struct fb_fix_screeninfo *fix, int con, | ||
239 | struct fb_info *info); | ||
240 | static int cyberfb_get_var(struct fb_var_screeninfo *var, int con, | ||
241 | struct fb_info *info); | ||
242 | static int cyberfb_set_var(struct fb_var_screeninfo *var, int con, | ||
243 | struct fb_info *info); | ||
244 | static int cyberfb_get_cmap(struct fb_cmap *cmap, int kspc, int con, | ||
245 | struct fb_info *info); | ||
246 | static int cyberfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | ||
247 | u_int transp, struct fb_info *info); | ||
248 | static int cyberfb_blank(int blank, struct fb_info *info); | ||
249 | |||
250 | /* | ||
251 | * Interface to the low level console driver | ||
252 | */ | ||
253 | |||
254 | int cyberfb_init(void); | ||
255 | static int Cyberfb_switch(int con, struct fb_info *info); | ||
256 | static int Cyberfb_updatevar(int con, struct fb_info *info); | ||
257 | |||
258 | /* | ||
259 | * Text console acceleration | ||
260 | */ | ||
261 | |||
262 | #ifdef FBCON_HAS_CFB8 | ||
263 | static struct display_switch fbcon_cyber8; | ||
264 | #endif | ||
265 | |||
266 | /* | ||
267 | * Accelerated Functions used by the low level console driver | ||
268 | */ | ||
269 | |||
270 | static void Cyber_WaitQueue(u_short fifo); | ||
271 | static void Cyber_WaitBlit(void); | ||
272 | static void Cyber_BitBLT(u_short curx, u_short cury, u_short destx, | ||
273 | u_short desty, u_short width, u_short height, | ||
274 | u_short mode); | ||
275 | static void Cyber_RectFill(u_short x, u_short y, u_short width, u_short height, | ||
276 | u_short mode, u_short color); | ||
277 | #if 0 | ||
278 | static void Cyber_MoveCursor(u_short x, u_short y); | ||
279 | #endif | ||
280 | |||
281 | /* | ||
282 | * Hardware Specific Routines | ||
283 | */ | ||
284 | |||
285 | static int Cyber_init(void); | ||
286 | static int Cyber_encode_fix(struct fb_fix_screeninfo *fix, | ||
287 | struct cyberfb_par *par); | ||
288 | static int Cyber_decode_var(struct fb_var_screeninfo *var, | ||
289 | struct cyberfb_par *par); | ||
290 | static int Cyber_encode_var(struct fb_var_screeninfo *var, | ||
291 | struct cyberfb_par *par); | ||
292 | static int Cyber_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, | ||
293 | u_int *transp, struct fb_info *info); | ||
294 | |||
295 | /* | ||
296 | * Internal routines | ||
297 | */ | ||
298 | |||
299 | static void cyberfb_get_par(struct cyberfb_par *par); | ||
300 | static void cyberfb_set_par(struct cyberfb_par *par); | ||
301 | static int do_fb_set_var(struct fb_var_screeninfo *var, int isactive); | ||
302 | static void cyberfb_set_disp(int con, struct fb_info *info); | ||
303 | static int get_video_mode(const char *name); | ||
304 | |||
305 | /* For cvision_core.c */ | ||
306 | static unsigned short cv64_compute_clock(unsigned long); | ||
307 | static int cv_has_4mb (volatile unsigned char *); | ||
308 | static void cv64_board_init (void); | ||
309 | static void cv64_load_video_mode (struct fb_var_screeninfo *); | ||
310 | |||
311 | |||
312 | /* -------------------- Hardware specific routines ------------------------- */ | ||
313 | |||
314 | |||
315 | /* | ||
316 | * Initialization | ||
317 | * | ||
318 | * Set the default video mode for this chipset. If a video mode was | ||
319 | * specified on the command line, it will override the default mode. | ||
320 | */ | ||
321 | |||
322 | static int Cyber_init(void) | ||
323 | { | ||
324 | volatile unsigned char *regs = CyberRegs; | ||
325 | volatile unsigned long *CursorBase; | ||
326 | int i; | ||
327 | DPRINTK("ENTER\n"); | ||
328 | |||
329 | /* Init local cmap as greyscale levels */ | ||
330 | for (i = 0; i < 256; i++) { | ||
331 | Cyber_colour_table [i][0] = i; | ||
332 | Cyber_colour_table [i][1] = i; | ||
333 | Cyber_colour_table [i][2] = i; | ||
334 | } | ||
335 | |||
336 | /* Initialize the board and determine fbmem size */ | ||
337 | cv64_board_init(); | ||
338 | #ifdef CYBERFBDEBUG | ||
339 | DPRINTK("Register state after initing board\n"); | ||
340 | cv64_dump(); | ||
341 | #endif | ||
342 | /* Clear framebuffer memory */ | ||
343 | DPRINTK("Clear framebuffer memory\n"); | ||
344 | memset ((char *)CyberMem, 0, CyberSize); | ||
345 | |||
346 | /* Disable hardware cursor */ | ||
347 | DPRINTK("Disable HW cursor\n"); | ||
348 | wb_64(regs, S3_CRTC_ADR, S3_REG_LOCK2); | ||
349 | wb_64(regs, S3_CRTC_DATA, 0xa0); | ||
350 | wb_64(regs, S3_CRTC_ADR, S3_HGC_MODE); | ||
351 | wb_64(regs, S3_CRTC_DATA, 0x00); | ||
352 | wb_64(regs, S3_CRTC_ADR, S3_HWGC_DX); | ||
353 | wb_64(regs, S3_CRTC_DATA, 0x00); | ||
354 | wb_64(regs, S3_CRTC_ADR, S3_HWGC_DY); | ||
355 | wb_64(regs, S3_CRTC_DATA, 0x00); | ||
356 | |||
357 | /* Initialize hardware cursor */ | ||
358 | DPRINTK("Init HW cursor\n"); | ||
359 | CursorBase = (u_long *)((char *)(CyberMem) + CyberSize - 0x400); | ||
360 | for (i=0; i < 8; i++) | ||
361 | { | ||
362 | *(CursorBase +(i*4)) = 0xffffff00; | ||
363 | *(CursorBase+1+(i*4)) = 0xffff0000; | ||
364 | *(CursorBase+2+(i*4)) = 0xffff0000; | ||
365 | *(CursorBase+3+(i*4)) = 0xffff0000; | ||
366 | } | ||
367 | for (i=8; i < 64; i++) | ||
368 | { | ||
369 | *(CursorBase +(i*4)) = 0xffff0000; | ||
370 | *(CursorBase+1+(i*4)) = 0xffff0000; | ||
371 | *(CursorBase+2+(i*4)) = 0xffff0000; | ||
372 | *(CursorBase+3+(i*4)) = 0xffff0000; | ||
373 | } | ||
374 | |||
375 | cyberfb_setcolreg (255, 56<<8, 100<<8, 160<<8, 0, NULL /* unused */); | ||
376 | cyberfb_setcolreg (254, 0, 0, 0, 0, NULL /* unused */); | ||
377 | |||
378 | DPRINTK("EXIT\n"); | ||
379 | return 0; | ||
380 | } | ||
381 | |||
382 | |||
383 | /* | ||
384 | * This function should fill in the `fix' structure based on the | ||
385 | * values in the `par' structure. | ||
386 | */ | ||
387 | |||
388 | static int Cyber_encode_fix(struct fb_fix_screeninfo *fix, | ||
389 | struct cyberfb_par *par) | ||
390 | { | ||
391 | DPRINTK("ENTER\n"); | ||
392 | memset(fix, 0, sizeof(struct fb_fix_screeninfo)); | ||
393 | strcpy(fix->id, cyberfb_name); | ||
394 | fix->smem_start = CyberMem_phys; | ||
395 | fix->smem_len = CyberSize; | ||
396 | fix->mmio_start = CyberRegs_phys; | ||
397 | fix->mmio_len = 0x10000; | ||
398 | |||
399 | fix->type = FB_TYPE_PACKED_PIXELS; | ||
400 | fix->type_aux = 0; | ||
401 | if (par->var.bits_per_pixel == 15 || par->var.bits_per_pixel == 16 || | ||
402 | par->var.bits_per_pixel == 24 || par->var.bits_per_pixel == 32) { | ||
403 | fix->visual = FB_VISUAL_DIRECTCOLOR; | ||
404 | } else { | ||
405 | fix->visual = FB_VISUAL_PSEUDOCOLOR; | ||
406 | } | ||
407 | |||
408 | fix->xpanstep = 0; | ||
409 | fix->ypanstep = 0; | ||
410 | fix->ywrapstep = 0; | ||
411 | fix->line_length = 0; | ||
412 | fix->accel = FB_ACCEL_S3_TRIO64; | ||
413 | |||
414 | DPRINTK("EXIT\n"); | ||
415 | return(0); | ||
416 | } | ||
417 | |||
418 | |||
419 | /* | ||
420 | * Fill the `par' structure based on the values in `var'. | ||
421 | * TODO: Verify and adjust values, return -EINVAL if bad. | ||
422 | */ | ||
423 | |||
424 | static int Cyber_decode_var(struct fb_var_screeninfo *var, | ||
425 | struct cyberfb_par *par) | ||
426 | { | ||
427 | DPRINTK("ENTER\n"); | ||
428 | par->var.xres = var->xres; | ||
429 | par->var.yres = var->yres; | ||
430 | par->var.xres_virtual = var->xres_virtual; | ||
431 | par->var.yres_virtual = var->yres_virtual; | ||
432 | par->var.xoffset = var->xoffset; | ||
433 | par->var.yoffset = var->yoffset; | ||
434 | par->var.bits_per_pixel = var->bits_per_pixel; | ||
435 | par->var.grayscale = var->grayscale; | ||
436 | par->var.red = var->red; | ||
437 | par->var.green = var->green; | ||
438 | par->var.blue = var->blue; | ||
439 | par->var.transp = var->transp; | ||
440 | par->var.nonstd = var->nonstd; | ||
441 | par->var.activate = var->activate; | ||
442 | par->var.height = var->height; | ||
443 | par->var.width = var->width; | ||
444 | if (var->accel_flags & FB_ACCELF_TEXT) { | ||
445 | par->var.accel_flags = FB_ACCELF_TEXT; | ||
446 | } else { | ||
447 | par->var.accel_flags = 0; | ||
448 | } | ||
449 | par->var.pixclock = var->pixclock; | ||
450 | par->var.left_margin = var->left_margin; | ||
451 | par->var.right_margin = var->right_margin; | ||
452 | par->var.upper_margin = var->upper_margin; | ||
453 | par->var.lower_margin = var->lower_margin; | ||
454 | par->var.hsync_len = var->hsync_len; | ||
455 | par->var.vsync_len = var->vsync_len; | ||
456 | par->var.sync = var->sync; | ||
457 | par->var.vmode = var->vmode; | ||
458 | DPRINTK("EXIT\n"); | ||
459 | return(0); | ||
460 | } | ||
461 | |||
462 | /* | ||
463 | * Fill the `var' structure based on the values in `par' and maybe | ||
464 | * other values read out of the hardware. | ||
465 | */ | ||
466 | |||
467 | static int Cyber_encode_var(struct fb_var_screeninfo *var, | ||
468 | struct cyberfb_par *par) | ||
469 | { | ||
470 | DPRINTK("ENTER\n"); | ||
471 | var->xres = par->var.xres; | ||
472 | var->yres = par->var.yres; | ||
473 | var->xres_virtual = par->var.xres_virtual; | ||
474 | var->yres_virtual = par->var.yres_virtual; | ||
475 | var->xoffset = par->var.xoffset; | ||
476 | var->yoffset = par->var.yoffset; | ||
477 | |||
478 | var->bits_per_pixel = par->var.bits_per_pixel; | ||
479 | var->grayscale = par->var.grayscale; | ||
480 | |||
481 | var->red = par->var.red; | ||
482 | var->green = par->var.green; | ||
483 | var->blue = par->var.blue; | ||
484 | var->transp = par->var.transp; | ||
485 | |||
486 | var->nonstd = par->var.nonstd; | ||
487 | var->activate = par->var.activate; | ||
488 | |||
489 | var->height = par->var.height; | ||
490 | var->width = par->var.width; | ||
491 | |||
492 | var->accel_flags = par->var.accel_flags; | ||
493 | |||
494 | var->pixclock = par->var.pixclock; | ||
495 | var->left_margin = par->var.left_margin; | ||
496 | var->right_margin = par->var.right_margin; | ||
497 | var->upper_margin = par->var.upper_margin; | ||
498 | var->lower_margin = par->var.lower_margin; | ||
499 | var->hsync_len = par->var.hsync_len; | ||
500 | var->vsync_len = par->var.vsync_len; | ||
501 | var->sync = par->var.sync; | ||
502 | var->vmode = par->var.vmode; | ||
503 | |||
504 | DPRINTK("EXIT\n"); | ||
505 | return(0); | ||
506 | } | ||
507 | |||
508 | |||
509 | /* | ||
510 | * Set a single color register. Return != 0 for invalid regno. | ||
511 | */ | ||
512 | |||
513 | static int cyberfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | ||
514 | u_int transp, struct fb_info *info) | ||
515 | { | ||
516 | volatile unsigned char *regs = CyberRegs; | ||
517 | |||
518 | /*DPRINTK("ENTER\n");*/ | ||
519 | if (regno > 255) { | ||
520 | DPRINTK("EXIT - Register # > 255\n"); | ||
521 | return (1); | ||
522 | } | ||
523 | |||
524 | wb_64(regs, 0x3c8, (unsigned char) regno); | ||
525 | |||
526 | red >>= 10; | ||
527 | green >>= 10; | ||
528 | blue >>= 10; | ||
529 | |||
530 | Cyber_colour_table [regno][0] = red; | ||
531 | Cyber_colour_table [regno][1] = green; | ||
532 | Cyber_colour_table [regno][2] = blue; | ||
533 | |||
534 | wb_64(regs, 0x3c9, red); | ||
535 | wb_64(regs, 0x3c9, green); | ||
536 | wb_64(regs, 0x3c9, blue); | ||
537 | |||
538 | /*DPRINTK("EXIT\n");*/ | ||
539 | return (0); | ||
540 | } | ||
541 | |||
542 | |||
543 | /* | ||
544 | * Read a single color register and split it into | ||
545 | * colors/transparent. Return != 0 for invalid regno. | ||
546 | */ | ||
547 | |||
548 | static int Cyber_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, | ||
549 | u_int *transp, struct fb_info *info) | ||
550 | { | ||
551 | int t; | ||
552 | |||
553 | /*DPRINTK("ENTER\n");*/ | ||
554 | if (regno > 255) { | ||
555 | DPRINTK("EXIT - Register # > 255\n"); | ||
556 | return (1); | ||
557 | } | ||
558 | /* ARB This shifting & oring seems VERY strange */ | ||
559 | t = Cyber_colour_table [regno][0]; | ||
560 | *red = (t<<10) | (t<<4) | (t>>2); | ||
561 | t = Cyber_colour_table [regno][1]; | ||
562 | *green = (t<<10) | (t<<4) | (t>>2); | ||
563 | t = Cyber_colour_table [regno][2]; | ||
564 | *blue = (t<<10) | (t<<4) | (t>>2); | ||
565 | *transp = 0; | ||
566 | /*DPRINTK("EXIT\n");*/ | ||
567 | return (0); | ||
568 | } | ||
569 | |||
570 | |||
571 | /* | ||
572 | * (Un)Blank the screen | ||
573 | * blank: 1 = zero fb cmap | ||
574 | * 0 = restore fb cmap from local cmap | ||
575 | */ | ||
576 | static int cyberfb_blank(int blank, struct fb_info *info) | ||
577 | { | ||
578 | volatile unsigned char *regs = CyberRegs; | ||
579 | int i; | ||
580 | |||
581 | DPRINTK("ENTER\n"); | ||
582 | #if 0 | ||
583 | /* Blank by turning gfx off */ | ||
584 | gfx_on_off (1, regs); | ||
585 | #else | ||
586 | if (blank) { | ||
587 | for (i = 0; i < 256; i++) { | ||
588 | wb_64(regs, 0x3c8, (unsigned char) i); | ||
589 | /* ARB Pale red to detect this blanking method */ | ||
590 | wb_64(regs, 0x3c9, 48); | ||
591 | wb_64(regs, 0x3c9, 0); | ||
592 | wb_64(regs, 0x3c9, 0); | ||
593 | } | ||
594 | } else { | ||
595 | for (i = 0; i < 256; i++) { | ||
596 | wb_64(regs, 0x3c8, (unsigned char) i); | ||
597 | wb_64(regs, 0x3c9, Cyber_colour_table[i][0]); | ||
598 | wb_64(regs, 0x3c9, Cyber_colour_table[i][1]); | ||
599 | wb_64(regs, 0x3c9, Cyber_colour_table[i][2]); | ||
600 | } | ||
601 | } | ||
602 | #endif | ||
603 | DPRINTK("EXIT\n"); | ||
604 | return 0; | ||
605 | } | ||
606 | |||
607 | |||
608 | /************************************************************** | ||
609 | * We are waiting for "fifo" FIFO-slots empty | ||
610 | */ | ||
611 | static void Cyber_WaitQueue (u_short fifo) | ||
612 | { | ||
613 | unsigned short status; | ||
614 | |||
615 | DPRINTK("ENTER\n"); | ||
616 | do { | ||
617 | status = *((u_short volatile *)(CyberRegs + S3_GP_STAT)); | ||
618 | } while (status & fifo); | ||
619 | DPRINTK("EXIT\n"); | ||
620 | } | ||
621 | |||
622 | /************************************************************** | ||
623 | * We are waiting for Hardware (Graphics Engine) not busy | ||
624 | */ | ||
625 | static void Cyber_WaitBlit (void) | ||
626 | { | ||
627 | unsigned short status; | ||
628 | |||
629 | DPRINTK("ENTER\n"); | ||
630 | do { | ||
631 | status = *((u_short volatile *)(CyberRegs + S3_GP_STAT)); | ||
632 | } while (status & S3_HDW_BUSY); | ||
633 | DPRINTK("EXIT\n"); | ||
634 | } | ||
635 | |||
636 | /************************************************************** | ||
637 | * BitBLT - Through the Plane | ||
638 | */ | ||
639 | static void Cyber_BitBLT (u_short curx, u_short cury, u_short destx, | ||
640 | u_short desty, u_short width, u_short height, | ||
641 | u_short mode) | ||
642 | { | ||
643 | volatile unsigned char *regs = CyberRegs; | ||
644 | u_short blitcmd = S3_BITBLT; | ||
645 | |||
646 | DPRINTK("ENTER\n"); | ||
647 | /* Set drawing direction */ | ||
648 | /* -Y, X maj, -X (default) */ | ||
649 | if (curx > destx) { | ||
650 | blitcmd |= 0x0020; /* Drawing direction +X */ | ||
651 | } else { | ||
652 | curx += (width - 1); | ||
653 | destx += (width - 1); | ||
654 | } | ||
655 | |||
656 | if (cury > desty) { | ||
657 | blitcmd |= 0x0080; /* Drawing direction +Y */ | ||
658 | } else { | ||
659 | cury += (height - 1); | ||
660 | desty += (height - 1); | ||
661 | } | ||
662 | |||
663 | Cyber_WaitQueue (0x8000); | ||
664 | |||
665 | *((u_short volatile *)(regs + S3_PIXEL_CNTL)) = 0xa000; | ||
666 | *((u_short volatile *)(regs + S3_FRGD_MIX)) = (0x0060 | mode); | ||
667 | |||
668 | *((u_short volatile *)(regs + S3_CUR_X)) = curx; | ||
669 | *((u_short volatile *)(regs + S3_CUR_Y)) = cury; | ||
670 | |||
671 | *((u_short volatile *)(regs + S3_DESTX_DIASTP)) = destx; | ||
672 | *((u_short volatile *)(regs + S3_DESTY_AXSTP)) = desty; | ||
673 | |||
674 | *((u_short volatile *)(regs + S3_MIN_AXIS_PCNT)) = height - 1; | ||
675 | *((u_short volatile *)(regs + S3_MAJ_AXIS_PCNT)) = width - 1; | ||
676 | |||
677 | *((u_short volatile *)(regs + S3_CMD)) = blitcmd; | ||
678 | DPRINTK("EXIT\n"); | ||
679 | } | ||
680 | |||
681 | /************************************************************** | ||
682 | * Rectangle Fill Solid | ||
683 | */ | ||
684 | static void Cyber_RectFill (u_short x, u_short y, u_short width, | ||
685 | u_short height, u_short mode, u_short color) | ||
686 | { | ||
687 | volatile unsigned char *regs = CyberRegs; | ||
688 | u_short blitcmd = S3_FILLEDRECT; | ||
689 | |||
690 | DPRINTK("ENTER\n"); | ||
691 | Cyber_WaitQueue (0x8000); | ||
692 | |||
693 | *((u_short volatile *)(regs + S3_PIXEL_CNTL)) = 0xa000; | ||
694 | *((u_short volatile *)(regs + S3_FRGD_MIX)) = (0x0020 | mode); | ||
695 | |||
696 | *((u_short volatile *)(regs + S3_MULT_MISC)) = 0xe000; | ||
697 | *((u_short volatile *)(regs + S3_FRGD_COLOR)) = color; | ||
698 | |||
699 | *((u_short volatile *)(regs + S3_CUR_X)) = x; | ||
700 | *((u_short volatile *)(regs + S3_CUR_Y)) = y; | ||
701 | |||
702 | *((u_short volatile *)(regs + S3_MIN_AXIS_PCNT)) = height - 1; | ||
703 | *((u_short volatile *)(regs + S3_MAJ_AXIS_PCNT)) = width - 1; | ||
704 | |||
705 | *((u_short volatile *)(regs + S3_CMD)) = blitcmd; | ||
706 | DPRINTK("EXIT\n"); | ||
707 | } | ||
708 | |||
709 | |||
710 | #if 0 | ||
711 | /************************************************************** | ||
712 | * Move cursor to x, y | ||
713 | */ | ||
714 | static void Cyber_MoveCursor (u_short x, u_short y) | ||
715 | { | ||
716 | volatile unsigned char *regs = CyberRegs; | ||
717 | DPRINTK("ENTER\n"); | ||
718 | *(regs + S3_CRTC_ADR) = 0x39; | ||
719 | *(regs + S3_CRTC_DATA) = 0xa0; | ||
720 | |||
721 | *(regs + S3_CRTC_ADR) = S3_HWGC_ORGX_H; | ||
722 | *(regs + S3_CRTC_DATA) = (char)((x & 0x0700) >> 8); | ||
723 | *(regs + S3_CRTC_ADR) = S3_HWGC_ORGX_L; | ||
724 | *(regs + S3_CRTC_DATA) = (char)(x & 0x00ff); | ||
725 | |||
726 | *(regs + S3_CRTC_ADR) = S3_HWGC_ORGY_H; | ||
727 | *(regs + S3_CRTC_DATA) = (char)((y & 0x0700) >> 8); | ||
728 | *(regs + S3_CRTC_ADR) = S3_HWGC_ORGY_L; | ||
729 | *(regs + S3_CRTC_DATA) = (char)(y & 0x00ff); | ||
730 | DPRINTK("EXIT\n"); | ||
731 | } | ||
732 | #endif | ||
733 | |||
734 | |||
735 | /* -------------------- Generic routines ---------------------------------- */ | ||
736 | |||
737 | |||
738 | /* | ||
739 | * Fill the hardware's `par' structure. | ||
740 | */ | ||
741 | |||
742 | static void cyberfb_get_par(struct cyberfb_par *par) | ||
743 | { | ||
744 | DPRINTK("ENTER\n"); | ||
745 | if (current_par_valid) { | ||
746 | *par = current_par; | ||
747 | } else { | ||
748 | Cyber_decode_var(&cyberfb_default, par); | ||
749 | } | ||
750 | DPRINTK("EXIT\n"); | ||
751 | } | ||
752 | |||
753 | |||
754 | static void cyberfb_set_par(struct cyberfb_par *par) | ||
755 | { | ||
756 | DPRINTK("ENTER\n"); | ||
757 | current_par = *par; | ||
758 | current_par_valid = 1; | ||
759 | DPRINTK("EXIT\n"); | ||
760 | } | ||
761 | |||
762 | |||
763 | static void cyber_set_video(struct fb_var_screeninfo *var) | ||
764 | { | ||
765 | |||
766 | /* Load the video mode defined by the 'var' data */ | ||
767 | cv64_load_video_mode (var); | ||
768 | #ifdef CYBERFBDEBUG | ||
769 | DPRINTK("Register state after loading video mode\n"); | ||
770 | cv64_dump(); | ||
771 | #endif | ||
772 | } | ||
773 | |||
774 | |||
775 | static int do_fb_set_var(struct fb_var_screeninfo *var, int isactive) | ||
776 | { | ||
777 | int err, activate; | ||
778 | struct cyberfb_par par; | ||
779 | |||
780 | DPRINTK("ENTER\n"); | ||
781 | if ((err = Cyber_decode_var(var, &par))) { | ||
782 | DPRINTK("EXIT - decode_var failed\n"); | ||
783 | return(err); | ||
784 | } | ||
785 | activate = var->activate; | ||
786 | if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW && isactive) | ||
787 | cyberfb_set_par(&par); | ||
788 | Cyber_encode_var(var, &par); | ||
789 | var->activate = activate; | ||
790 | |||
791 | cyber_set_video(var); | ||
792 | DPRINTK("EXIT\n"); | ||
793 | return 0; | ||
794 | } | ||
795 | |||
796 | /* | ||
797 | * Get the Fixed Part of the Display | ||
798 | */ | ||
799 | |||
800 | static int cyberfb_get_fix(struct fb_fix_screeninfo *fix, int con, | ||
801 | struct fb_info *info) | ||
802 | { | ||
803 | struct cyberfb_par par; | ||
804 | int error = 0; | ||
805 | |||
806 | DPRINTK("ENTER\n"); | ||
807 | if (con == -1) { | ||
808 | cyberfb_get_par(&par); | ||
809 | } else { | ||
810 | error = Cyber_decode_var(&fb_display[con].var, &par); | ||
811 | } | ||
812 | DPRINTK("EXIT\n"); | ||
813 | return(error ? error : Cyber_encode_fix(fix, &par)); | ||
814 | } | ||
815 | |||
816 | |||
817 | /* | ||
818 | * Get the User Defined Part of the Display | ||
819 | */ | ||
820 | |||
821 | static int cyberfb_get_var(struct fb_var_screeninfo *var, int con, | ||
822 | struct fb_info *info) | ||
823 | { | ||
824 | struct cyberfb_par par; | ||
825 | int error = 0; | ||
826 | |||
827 | DPRINTK("ENTER\n"); | ||
828 | if (con == -1) { | ||
829 | cyberfb_get_par(&par); | ||
830 | error = Cyber_encode_var(var, &par); | ||
831 | disp.var = *var; /* ++Andre: don't know if this is the right place */ | ||
832 | } else { | ||
833 | *var = fb_display[con].var; | ||
834 | } | ||
835 | |||
836 | DPRINTK("EXIT\n"); | ||
837 | return(error); | ||
838 | } | ||
839 | |||
840 | |||
841 | static void cyberfb_set_disp(int con, struct fb_info *info) | ||
842 | { | ||
843 | struct fb_fix_screeninfo fix; | ||
844 | struct display *display; | ||
845 | |||
846 | DPRINTK("ENTER\n"); | ||
847 | if (con >= 0) | ||
848 | display = &fb_display[con]; | ||
849 | else | ||
850 | display = &disp; /* used during initialization */ | ||
851 | |||
852 | cyberfb_get_fix(&fix, con, info); | ||
853 | if (con == -1) | ||
854 | con = 0; | ||
855 | display->visual = fix.visual; | ||
856 | display->type = fix.type; | ||
857 | display->type_aux = fix.type_aux; | ||
858 | display->ypanstep = fix.ypanstep; | ||
859 | display->ywrapstep = fix.ywrapstep; | ||
860 | display->can_soft_blank = 1; | ||
861 | display->inverse = Cyberfb_inverse; | ||
862 | switch (display->var.bits_per_pixel) { | ||
863 | #ifdef FBCON_HAS_CFB8 | ||
864 | case 8: | ||
865 | if (display->var.accel_flags & FB_ACCELF_TEXT) { | ||
866 | display->dispsw = &fbcon_cyber8; | ||
867 | #warning FIXME: We should reinit the graphics engine here | ||
868 | } else | ||
869 | display->dispsw = &fbcon_cfb8; | ||
870 | break; | ||
871 | #endif | ||
872 | #ifdef FBCON_HAS_CFB16 | ||
873 | case 16: | ||
874 | display->dispsw = &fbcon_cfb16; | ||
875 | break; | ||
876 | #endif | ||
877 | default: | ||
878 | display->dispsw = NULL; | ||
879 | break; | ||
880 | } | ||
881 | DPRINTK("EXIT\n"); | ||
882 | } | ||
883 | |||
884 | |||
885 | /* | ||
886 | * Set the User Defined Part of the Display | ||
887 | */ | ||
888 | |||
889 | static int cyberfb_set_var(struct fb_var_screeninfo *var, int con, | ||
890 | struct fb_info *info) | ||
891 | { | ||
892 | int err, oldxres, oldyres, oldvxres, oldvyres, oldbpp, oldaccel; | ||
893 | |||
894 | DPRINTK("ENTER\n"); | ||
895 | if ((err = do_fb_set_var(var, con == info->currcon))) { | ||
896 | DPRINTK("EXIT - do_fb_set_var failed\n"); | ||
897 | return(err); | ||
898 | } | ||
899 | if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) { | ||
900 | oldxres = fb_display[con].var.xres; | ||
901 | oldyres = fb_display[con].var.yres; | ||
902 | oldvxres = fb_display[con].var.xres_virtual; | ||
903 | oldvyres = fb_display[con].var.yres_virtual; | ||
904 | oldbpp = fb_display[con].var.bits_per_pixel; | ||
905 | oldaccel = fb_display[con].var.accel_flags; | ||
906 | fb_display[con].var = *var; | ||
907 | if (oldxres != var->xres || oldyres != var->yres || | ||
908 | oldvxres != var->xres_virtual || | ||
909 | oldvyres != var->yres_virtual || | ||
910 | oldbpp != var->bits_per_pixel || | ||
911 | oldaccel != var->accel_flags) { | ||
912 | cyberfb_set_disp(con, info); | ||
913 | (*fb_info.changevar)(con); | ||
914 | fb_alloc_cmap(&fb_display[con].cmap, 0, 0); | ||
915 | do_install_cmap(con, info); | ||
916 | } | ||
917 | } | ||
918 | var->activate = 0; | ||
919 | DPRINTK("EXIT\n"); | ||
920 | return(0); | ||
921 | } | ||
922 | |||
923 | |||
924 | /* | ||
925 | * Get the Colormap | ||
926 | */ | ||
927 | |||
928 | static int cyberfb_get_cmap(struct fb_cmap *cmap, int kspc, int con, | ||
929 | struct fb_info *info) | ||
930 | { | ||
931 | DPRINTK("ENTER\n"); | ||
932 | if (con == info->currcon) { /* current console? */ | ||
933 | DPRINTK("EXIT - console is current console\n"); | ||
934 | return(fb_get_cmap(cmap, kspc, Cyber_getcolreg, info)); | ||
935 | } else if (fb_display[con].cmap.len) { /* non default colormap? */ | ||
936 | DPRINTK("Use console cmap\n"); | ||
937 | fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2); | ||
938 | } else { | ||
939 | DPRINTK("Use default cmap\n"); | ||
940 | fb_copy_cmap(fb_default_cmap(1<<fb_display[con].var.bits_per_pixel), | ||
941 | cmap, kspc ? 0 : 2); | ||
942 | } | ||
943 | DPRINTK("EXIT\n"); | ||
944 | return(0); | ||
945 | } | ||
946 | |||
947 | static struct fb_ops cyberfb_ops = { | ||
948 | .owner = THIS_MODULE, | ||
949 | .fb_get_fix = cyberfb_get_fix, | ||
950 | .fb_get_var = cyberfb_get_var, | ||
951 | .fb_set_var = cyberfb_set_var, | ||
952 | .fb_get_cmap = cyberfb_get_cmap, | ||
953 | .fb_set_cmap = gen_set_cmap, | ||
954 | .fb_setcolreg = cyberfb_setcolreg, | ||
955 | .fb_blank = cyberfb_blank, | ||
956 | }; | ||
957 | |||
958 | int __init cyberfb_setup(char *options) | ||
959 | { | ||
960 | char *this_opt; | ||
961 | DPRINTK("ENTER\n"); | ||
962 | |||
963 | fb_info.fontname[0] = '\0'; | ||
964 | |||
965 | if (!options || !*options) { | ||
966 | DPRINTK("EXIT - no options\n"); | ||
967 | return 0; | ||
968 | } | ||
969 | |||
970 | while ((this_opt = strsep(&options, ",")) != NULL) { | ||
971 | if (!*this_opt) | ||
972 | continue; | ||
973 | if (!strcmp(this_opt, "inverse")) { | ||
974 | Cyberfb_inverse = 1; | ||
975 | fb_invert_cmaps(); | ||
976 | } else if (!strncmp(this_opt, "font:", 5)) { | ||
977 | strcpy(fb_info.fontname, this_opt+5); | ||
978 | } else if (!strcmp (this_opt, "cyber8")) { | ||
979 | cyberfb_default = cyberfb_predefined[CYBER8_DEFMODE].var; | ||
980 | cyberfb_usermode = 1; | ||
981 | } else if (!strcmp (this_opt, "cyber16")) { | ||
982 | cyberfb_default = cyberfb_predefined[CYBER16_DEFMODE].var; | ||
983 | cyberfb_usermode = 1; | ||
984 | } else get_video_mode(this_opt); | ||
985 | } | ||
986 | |||
987 | DPRINTK("default mode: xres=%d, yres=%d, bpp=%d\n", | ||
988 | cyberfb_default.xres, | ||
989 | cyberfb_default.yres, | ||
990 | cyberfb_default.bits_per_pixel); | ||
991 | DPRINTK("EXIT\n"); | ||
992 | return 0; | ||
993 | } | ||
994 | |||
995 | /* | ||
996 | * Initialization | ||
997 | */ | ||
998 | |||
999 | int __init cyberfb_init(void) | ||
1000 | { | ||
1001 | unsigned long board_addr, board_size; | ||
1002 | struct cyberfb_par par; | ||
1003 | struct zorro_dev *z = NULL; | ||
1004 | DPRINTK("ENTER\n"); | ||
1005 | |||
1006 | while ((z = zorro_find_device(ZORRO_PROD_PHASE5_CYBERVISION64, z))) { | ||
1007 | board_addr = z->resource.start; | ||
1008 | board_size = z->resource.end-z->resource.start+1; | ||
1009 | CyberMem_phys = board_addr + 0x01400000; | ||
1010 | CyberRegs_phys = CyberMem_phys + 0x00c00000; | ||
1011 | if (!request_mem_region(CyberRegs_phys, 0x10000, "S3 Trio64")) | ||
1012 | continue; | ||
1013 | if (!request_mem_region(CyberMem_phys, 0x400000, "RAM")) { | ||
1014 | release_mem_region(CyberRegs_phys, 0x10000); | ||
1015 | continue; | ||
1016 | } | ||
1017 | DPRINTK("board_addr=%08lx\n", board_addr); | ||
1018 | DPRINTK("board_size=%08lx\n", board_size); | ||
1019 | |||
1020 | CyberBase = ioremap(board_addr, board_size); | ||
1021 | CyberRegs = CyberBase + 0x02000000; | ||
1022 | CyberMem = CyberBase + 0x01400000; | ||
1023 | DPRINTK("CyberBase=%08lx CyberRegs=%08lx CyberMem=%08lx\n", | ||
1024 | CyberBase, (long unsigned int)CyberRegs, CyberMem); | ||
1025 | |||
1026 | #ifdef CYBERFBDEBUG | ||
1027 | DPRINTK("Register state just after mapping memory\n"); | ||
1028 | cv64_dump(); | ||
1029 | #endif | ||
1030 | |||
1031 | strcpy(fb_info.modename, cyberfb_name); | ||
1032 | fb_info.changevar = NULL; | ||
1033 | fb_info.fbops = &cyberfb_ops; | ||
1034 | fb_info.screen_base = (unsigned char *)CyberMem; | ||
1035 | fb_info.disp = &disp; | ||
1036 | fb_info.currcon = -1; | ||
1037 | fb_info.switch_con = &Cyberfb_switch; | ||
1038 | fb_info.updatevar = &Cyberfb_updatevar; | ||
1039 | |||
1040 | Cyber_init(); | ||
1041 | /* ++Andre: set cyberfb default mode */ | ||
1042 | if (!cyberfb_usermode) { | ||
1043 | cyberfb_default = cyberfb_predefined[CYBER8_DEFMODE].var; | ||
1044 | DPRINTK("Use default cyber8 mode\n"); | ||
1045 | } | ||
1046 | Cyber_decode_var(&cyberfb_default, &par); | ||
1047 | Cyber_encode_var(&cyberfb_default, &par); | ||
1048 | |||
1049 | do_fb_set_var(&cyberfb_default, 1); | ||
1050 | cyberfb_get_var(&fb_display[0].var, -1, &fb_info); | ||
1051 | cyberfb_set_disp(-1, &fb_info); | ||
1052 | do_install_cmap(0, &fb_info); | ||
1053 | |||
1054 | if (register_framebuffer(&fb_info) < 0) { | ||
1055 | DPRINTK("EXIT - register_framebuffer failed\n"); | ||
1056 | if (CyberBase) | ||
1057 | iounmap(CyberBase); | ||
1058 | release_mem_region(CyberMem_phys, 0x400000); | ||
1059 | release_mem_region(CyberRegs_phys, 0x10000); | ||
1060 | return -EINVAL; | ||
1061 | } | ||
1062 | |||
1063 | printk("fb%d: %s frame buffer device, using %ldK of video memory\n", | ||
1064 | fb_info.node, fb_info.modename, CyberSize>>10); | ||
1065 | |||
1066 | /* TODO: This driver cannot be unloaded yet */ | ||
1067 | DPRINTK("EXIT\n"); | ||
1068 | return 0; | ||
1069 | } | ||
1070 | return -ENXIO; | ||
1071 | } | ||
1072 | |||
1073 | |||
1074 | static int Cyberfb_switch(int con, struct fb_info *info) | ||
1075 | { | ||
1076 | DPRINTK("ENTER\n"); | ||
1077 | /* Do we have to save the colormap? */ | ||
1078 | if (fb_display[info->currcon].cmap.len) { | ||
1079 | fb_get_cmap(&fb_display[info->currcon].cmap, 1, Cyber_getcolreg, | ||
1080 | info); | ||
1081 | } | ||
1082 | |||
1083 | do_fb_set_var(&fb_display[con].var, 1); | ||
1084 | info->currcon = con; | ||
1085 | /* Install new colormap */ | ||
1086 | do_install_cmap(con, info); | ||
1087 | DPRINTK("EXIT\n"); | ||
1088 | return(0); | ||
1089 | } | ||
1090 | |||
1091 | |||
1092 | /* | ||
1093 | * Update the `var' structure (called by fbcon.c) | ||
1094 | * | ||
1095 | * This call looks only at yoffset and the FB_VMODE_YWRAP flag in `var'. | ||
1096 | * Since it's called by a kernel driver, no range checking is done. | ||
1097 | */ | ||
1098 | |||
1099 | static int Cyberfb_updatevar(int con, struct fb_info *info) | ||
1100 | { | ||
1101 | DPRINTK("Enter - Exit\n"); | ||
1102 | return(0); | ||
1103 | } | ||
1104 | |||
1105 | |||
1106 | /* | ||
1107 | * Get a Video Mode | ||
1108 | */ | ||
1109 | |||
1110 | static int __init get_video_mode(const char *name) | ||
1111 | { | ||
1112 | int i; | ||
1113 | |||
1114 | DPRINTK("ENTER\n"); | ||
1115 | for (i = 0; i < NUM_TOTAL_MODES; i++) { | ||
1116 | if (!strcmp(name, cyberfb_predefined[i].name)) { | ||
1117 | cyberfb_default = cyberfb_predefined[i].var; | ||
1118 | cyberfb_usermode = 1; | ||
1119 | DPRINTK("EXIT - Matched predefined mode\n"); | ||
1120 | return(i); | ||
1121 | } | ||
1122 | } | ||
1123 | return(0); | ||
1124 | } | ||
1125 | |||
1126 | |||
1127 | /* | ||
1128 | * Text console acceleration | ||
1129 | */ | ||
1130 | |||
1131 | #ifdef FBCON_HAS_CFB8 | ||
1132 | static void fbcon_cyber8_bmove(struct display *p, int sy, int sx, int dy, | ||
1133 | int dx, int height, int width) | ||
1134 | { | ||
1135 | DPRINTK("ENTER\n"); | ||
1136 | sx *= 8; dx *= 8; width *= 8; | ||
1137 | Cyber_BitBLT((u_short)sx, (u_short)(sy*fontheight(p)), (u_short)dx, | ||
1138 | (u_short)(dy*fontheight(p)), (u_short)width, | ||
1139 | (u_short)(height*fontheight(p)), (u_short)S3_NEW); | ||
1140 | DPRINTK("EXIT\n"); | ||
1141 | } | ||
1142 | |||
1143 | static void fbcon_cyber8_clear(struct vc_data *conp, struct display *p, int sy, | ||
1144 | int sx, int height, int width) | ||
1145 | { | ||
1146 | unsigned char bg; | ||
1147 | |||
1148 | DPRINTK("ENTER\n"); | ||
1149 | sx *= 8; width *= 8; | ||
1150 | bg = attr_bgcol_ec(p,conp); | ||
1151 | Cyber_RectFill((u_short)sx, | ||
1152 | (u_short)(sy*fontheight(p)), | ||
1153 | (u_short)width, | ||
1154 | (u_short)(height*fontheight(p)), | ||
1155 | (u_short)S3_NEW, | ||
1156 | (u_short)bg); | ||
1157 | DPRINTK("EXIT\n"); | ||
1158 | } | ||
1159 | |||
1160 | static void fbcon_cyber8_putc(struct vc_data *conp, struct display *p, int c, | ||
1161 | int yy, int xx) | ||
1162 | { | ||
1163 | DPRINTK("ENTER\n"); | ||
1164 | Cyber_WaitBlit(); | ||
1165 | fbcon_cfb8_putc(conp, p, c, yy, xx); | ||
1166 | DPRINTK("EXIT\n"); | ||
1167 | } | ||
1168 | |||
1169 | static void fbcon_cyber8_putcs(struct vc_data *conp, struct display *p, | ||
1170 | const unsigned short *s, int count, | ||
1171 | int yy, int xx) | ||
1172 | { | ||
1173 | DPRINTK("ENTER\n"); | ||
1174 | Cyber_WaitBlit(); | ||
1175 | fbcon_cfb8_putcs(conp, p, s, count, yy, xx); | ||
1176 | DPRINTK("EXIT\n"); | ||
1177 | } | ||
1178 | |||
1179 | static void fbcon_cyber8_revc(struct display *p, int xx, int yy) | ||
1180 | { | ||
1181 | DPRINTK("ENTER\n"); | ||
1182 | Cyber_WaitBlit(); | ||
1183 | fbcon_cfb8_revc(p, xx, yy); | ||
1184 | DPRINTK("EXIT\n"); | ||
1185 | } | ||
1186 | |||
1187 | static struct display_switch fbcon_cyber8 = { | ||
1188 | .setup = fbcon_cfb8_setup, | ||
1189 | .bmove = fbcon_cyber8_bmove, | ||
1190 | .clear = fbcon_cyber8_clear, | ||
1191 | .putc = fbcon_cyber8_putc, | ||
1192 | .putcs = fbcon_cyber8_putcs, | ||
1193 | .revc = fbcon_cyber8_revc, | ||
1194 | .clear_margins =fbcon_cfb8_clear_margins, | ||
1195 | .fontwidthmask =FONTWIDTH(8) | ||
1196 | }; | ||
1197 | #endif | ||
1198 | |||
1199 | |||
1200 | #ifdef MODULE | ||
1201 | MODULE_LICENSE("GPL"); | ||
1202 | |||
1203 | int init_module(void) | ||
1204 | { | ||
1205 | return cyberfb_init(); | ||
1206 | } | ||
1207 | #endif /* MODULE */ | ||
1208 | |||
1209 | /* | ||
1210 | * | ||
1211 | * Low level initialization routines for the CyberVision64 graphics card | ||
1212 | * | ||
1213 | * Most of the following code is from cvision_core.c | ||
1214 | * | ||
1215 | */ | ||
1216 | |||
1217 | #define MAXPIXELCLOCK 135000000 /* safety */ | ||
1218 | |||
1219 | #ifdef CV_AGGRESSIVE_TIMING | ||
1220 | long cv64_memclk = 55000000; | ||
1221 | #else | ||
1222 | long cv64_memclk = 50000000; | ||
1223 | #endif | ||
1224 | |||
1225 | /*********************/ | ||
1226 | |||
1227 | static unsigned char clocks[]={ | ||
1228 | 0x13, 0x61, 0x6b, 0x6d, 0x51, 0x69, 0x54, 0x69, | ||
1229 | 0x4f, 0x68, 0x6b, 0x6b, 0x18, 0x61, 0x7b, 0x6c, | ||
1230 | 0x51, 0x67, 0x24, 0x62, 0x56, 0x67, 0x77, 0x6a, | ||
1231 | 0x1d, 0x61, 0x53, 0x66, 0x6b, 0x68, 0x79, 0x69, | ||
1232 | 0x7c, 0x69, 0x7f, 0x69, 0x22, 0x61, 0x54, 0x65, | ||
1233 | 0x56, 0x65, 0x58, 0x65, 0x67, 0x66, 0x41, 0x63, | ||
1234 | 0x27, 0x61, 0x13, 0x41, 0x37, 0x62, 0x6b, 0x4d, | ||
1235 | 0x23, 0x43, 0x51, 0x49, 0x79, 0x66, 0x54, 0x49, | ||
1236 | 0x7d, 0x66, 0x34, 0x56, 0x4f, 0x63, 0x1f, 0x42, | ||
1237 | 0x6b, 0x4b, 0x7e, 0x4d, 0x18, 0x41, 0x2a, 0x43, | ||
1238 | 0x7b, 0x4c, 0x74, 0x4b, 0x51, 0x47, 0x65, 0x49, | ||
1239 | 0x24, 0x42, 0x68, 0x49, 0x56, 0x47, 0x75, 0x4a, | ||
1240 | 0x77, 0x4a, 0x31, 0x43, 0x1d, 0x41, 0x71, 0x49, | ||
1241 | 0x53, 0x46, 0x29, 0x42, 0x6b, 0x48, 0x1f, 0x41, | ||
1242 | 0x79, 0x49, 0x6f, 0x48, 0x7c, 0x49, 0x38, 0x43, | ||
1243 | 0x7f, 0x49, 0x5d, 0x46, 0x22, 0x41, 0x53, 0x45, | ||
1244 | 0x54, 0x45, 0x55, 0x45, 0x56, 0x45, 0x57, 0x45, | ||
1245 | 0x58, 0x45, 0x25, 0x41, 0x67, 0x46, 0x5b, 0x45, | ||
1246 | 0x41, 0x43, 0x78, 0x47, 0x27, 0x41, 0x51, 0x44, | ||
1247 | 0x13, 0x21, 0x7d, 0x47, 0x37, 0x42, 0x71, 0x46, | ||
1248 | 0x6b, 0x2d, 0x14, 0x21, 0x23, 0x23, 0x7d, 0x2f, | ||
1249 | 0x51, 0x29, 0x61, 0x2b, 0x79, 0x46, 0x1d, 0x22, | ||
1250 | 0x54, 0x29, 0x45, 0x27, 0x7d, 0x46, 0x7f, 0x46, | ||
1251 | 0x4f, 0x43, 0x2f, 0x41, 0x1f, 0x22, 0x6a, 0x2b, | ||
1252 | 0x6b, 0x2b, 0x5b, 0x29, 0x7e, 0x2d, 0x65, 0x44, | ||
1253 | 0x18, 0x21, 0x5e, 0x29, 0x2a, 0x23, 0x45, 0x26, | ||
1254 | 0x7b, 0x2c, 0x19, 0x21, 0x74, 0x2b, 0x75, 0x2b, | ||
1255 | 0x51, 0x27, 0x3f, 0x25, 0x65, 0x29, 0x40, 0x25, | ||
1256 | 0x24, 0x22, 0x41, 0x25, 0x68, 0x29, 0x42, 0x25, | ||
1257 | 0x56, 0x27, 0x7e, 0x2b, 0x75, 0x2a, 0x1c, 0x21, | ||
1258 | 0x77, 0x2a, 0x4f, 0x26, 0x31, 0x23, 0x6f, 0x29, | ||
1259 | 0x1d, 0x21, 0x32, 0x23, 0x71, 0x29, 0x72, 0x29, | ||
1260 | 0x53, 0x26, 0x69, 0x28, 0x29, 0x22, 0x75, 0x29, | ||
1261 | 0x6b, 0x28, 0x1f, 0x21, 0x1f, 0x21, 0x6d, 0x28, | ||
1262 | 0x79, 0x29, 0x2b, 0x22, 0x6f, 0x28, 0x59, 0x26, | ||
1263 | 0x7c, 0x29, 0x7d, 0x29, 0x38, 0x23, 0x21, 0x21, | ||
1264 | 0x7f, 0x29, 0x39, 0x23, 0x5d, 0x26, 0x75, 0x28, | ||
1265 | 0x22, 0x21, 0x77, 0x28, 0x53, 0x25, 0x6c, 0x27, | ||
1266 | 0x54, 0x25, 0x61, 0x26, 0x55, 0x25, 0x30, 0x22, | ||
1267 | 0x56, 0x25, 0x63, 0x26, 0x57, 0x25, 0x71, 0x27, | ||
1268 | 0x58, 0x25, 0x7f, 0x28, 0x25, 0x21, 0x74, 0x27, | ||
1269 | 0x67, 0x26, 0x40, 0x23, 0x5b, 0x25, 0x26, 0x21, | ||
1270 | 0x41, 0x23, 0x34, 0x22, 0x78, 0x27, 0x6b, 0x26, | ||
1271 | 0x27, 0x21, 0x35, 0x22, 0x51, 0x24, 0x7b, 0x27, | ||
1272 | 0x13, 0x1, 0x13, 0x1, 0x7d, 0x27, 0x4c, 0x9, | ||
1273 | 0x37, 0x22, 0x5b, 0xb, 0x71, 0x26, 0x5c, 0xb, | ||
1274 | 0x6b, 0xd, 0x47, 0x23, 0x14, 0x1, 0x4f, 0x9, | ||
1275 | 0x23, 0x3, 0x75, 0x26, 0x7d, 0xf, 0x1c, 0x2, | ||
1276 | 0x51, 0x9, 0x59, 0x24, 0x61, 0xb, 0x69, 0x25, | ||
1277 | 0x79, 0x26, 0x34, 0x5, 0x1d, 0x2, 0x6b, 0x25, | ||
1278 | 0x54, 0x9, 0x35, 0x5, 0x45, 0x7, 0x6d, 0x25, | ||
1279 | 0x7d, 0x26, 0x16, 0x1, 0x7f, 0x26, 0x77, 0xd, | ||
1280 | 0x4f, 0x23, 0x78, 0xd, 0x2f, 0x21, 0x27, 0x3, | ||
1281 | 0x1f, 0x2, 0x59, 0x9, 0x6a, 0xb, 0x73, 0x25, | ||
1282 | 0x6b, 0xb, 0x63, 0x24, 0x5b, 0x9, 0x20, 0x2, | ||
1283 | 0x7e, 0xd, 0x4b, 0x7, 0x65, 0x24, 0x43, 0x22, | ||
1284 | 0x18, 0x1, 0x6f, 0xb, 0x5e, 0x9, 0x70, 0xb, | ||
1285 | 0x2a, 0x3, 0x33, 0x4, 0x45, 0x6, 0x60, 0x9, | ||
1286 | 0x7b, 0xc, 0x19, 0x1, 0x19, 0x1, 0x7d, 0xc, | ||
1287 | 0x74, 0xb, 0x50, 0x7, 0x75, 0xb, 0x63, 0x9, | ||
1288 | 0x51, 0x7, 0x23, 0x2, 0x3f, 0x5, 0x1a, 0x1, | ||
1289 | 0x65, 0x9, 0x2d, 0x3, 0x40, 0x5, 0x0, 0x0, | ||
1290 | }; | ||
1291 | |||
1292 | /* Console colors */ | ||
1293 | unsigned char cvconscolors[16][3] = { /* background, foreground, hilite */ | ||
1294 | /* R G B */ | ||
1295 | {0x30, 0x30, 0x30}, | ||
1296 | {0x00, 0x00, 0x00}, | ||
1297 | {0x80, 0x00, 0x00}, | ||
1298 | {0x00, 0x80, 0x00}, | ||
1299 | {0x00, 0x00, 0x80}, | ||
1300 | {0x80, 0x80, 0x00}, | ||
1301 | {0x00, 0x80, 0x80}, | ||
1302 | {0x80, 0x00, 0x80}, | ||
1303 | {0xff, 0xff, 0xff}, | ||
1304 | {0x40, 0x40, 0x40}, | ||
1305 | {0xff, 0x00, 0x00}, | ||
1306 | {0x00, 0xff, 0x00}, | ||
1307 | {0x00, 0x00, 0xff}, | ||
1308 | {0xff, 0xff, 0x00}, | ||
1309 | {0x00, 0xff, 0xff}, | ||
1310 | {0x00, 0x00, 0xff} | ||
1311 | }; | ||
1312 | |||
1313 | /* -------------------- Hardware specific routines ------------------------- */ | ||
1314 | |||
1315 | /* Read Attribute Controller Register=idx */ | ||
1316 | inline unsigned char RAttr (volatile unsigned char *regs, short idx) | ||
1317 | { | ||
1318 | wb_64 (regs, ACT_ADDRESS_W, idx); | ||
1319 | mb(); | ||
1320 | udelay(100); | ||
1321 | return (rb_64(regs, ACT_ADDRESS_R)); | ||
1322 | } | ||
1323 | |||
1324 | /* Read Sequencer Register=idx */ | ||
1325 | inline unsigned char RSeq (volatile unsigned char *regs, short idx) | ||
1326 | { | ||
1327 | wb_64 (regs, SEQ_ADDRESS, idx); | ||
1328 | mb(); | ||
1329 | return (rb_64(regs, SEQ_ADDRESS_R)); | ||
1330 | } | ||
1331 | |||
1332 | /* Read CRT Controller Register=idx */ | ||
1333 | inline unsigned char RCrt (volatile unsigned char *regs, short idx) | ||
1334 | { | ||
1335 | wb_64 (regs, CRT_ADDRESS, idx); | ||
1336 | mb(); | ||
1337 | return (rb_64(regs, CRT_ADDRESS_R)); | ||
1338 | } | ||
1339 | |||
1340 | /* Read Graphics Controller Register=idx */ | ||
1341 | inline unsigned char RGfx (volatile unsigned char *regs, short idx) | ||
1342 | { | ||
1343 | wb_64 (regs, GCT_ADDRESS, idx); | ||
1344 | mb(); | ||
1345 | return (rb_64(regs, GCT_ADDRESS_R)); | ||
1346 | } | ||
1347 | |||
1348 | /* | ||
1349 | * Special wakeup/passthrough registers on graphics boards | ||
1350 | */ | ||
1351 | |||
1352 | inline void cv64_write_port (unsigned short bits, | ||
1353 | volatile unsigned char *base) | ||
1354 | { | ||
1355 | volatile unsigned char *addr; | ||
1356 | static unsigned char cvportbits = 0; /* Mirror port bits here */ | ||
1357 | DPRINTK("ENTER\n"); | ||
1358 | |||
1359 | addr = base + 0x40001; | ||
1360 | if (bits & 0x8000) { | ||
1361 | cvportbits |= bits & 0xff; /* Set bits */ | ||
1362 | DPRINTK("Set bits: %04x\n", bits); | ||
1363 | } else { | ||
1364 | bits = bits & 0xff; | ||
1365 | bits = (~bits) & 0xff; | ||
1366 | cvportbits &= bits; /* Clear bits */ | ||
1367 | DPRINTK("Clear bits: %04x\n", bits); | ||
1368 | } | ||
1369 | |||
1370 | *addr = cvportbits; | ||
1371 | DPRINTK("EXIT\n"); | ||
1372 | } | ||
1373 | |||
1374 | /* | ||
1375 | * Monitor switch on CyberVision board | ||
1376 | * | ||
1377 | * toggle: | ||
1378 | * 0 = CyberVision Signal | ||
1379 | * 1 = Amiga Signal | ||
1380 | * board = board addr | ||
1381 | * | ||
1382 | */ | ||
1383 | inline void cvscreen (int toggle, volatile unsigned char *board) | ||
1384 | { | ||
1385 | DPRINTK("ENTER\n"); | ||
1386 | if (toggle == 1) { | ||
1387 | DPRINTK("Show Amiga video\n"); | ||
1388 | cv64_write_port (0x10, board); | ||
1389 | } else { | ||
1390 | DPRINTK("Show CyberVision video\n"); | ||
1391 | cv64_write_port (0x8010, board); | ||
1392 | } | ||
1393 | DPRINTK("EXIT\n"); | ||
1394 | } | ||
1395 | |||
1396 | /* Control screen display */ | ||
1397 | /* toggle: 0 = on, 1 = off */ | ||
1398 | /* board = registerbase */ | ||
1399 | inline void gfx_on_off(int toggle, volatile unsigned char *regs) | ||
1400 | { | ||
1401 | int r; | ||
1402 | DPRINTK("ENTER\n"); | ||
1403 | |||
1404 | toggle &= 0x1; | ||
1405 | toggle = toggle << 5; | ||
1406 | DPRINTK("Turn display %s\n", (toggle ? "off" : "on")); | ||
1407 | |||
1408 | r = (int) RSeq(regs, SEQ_ID_CLOCKING_MODE); | ||
1409 | r &= 0xdf; /* Set bit 5 to 0 */ | ||
1410 | |||
1411 | WSeq (regs, SEQ_ID_CLOCKING_MODE, r | toggle); | ||
1412 | DPRINTK("EXIT\n"); | ||
1413 | } | ||
1414 | |||
1415 | /* | ||
1416 | * Computes M, N, and R values from | ||
1417 | * given input frequency. It uses a table of | ||
1418 | * precomputed values, to keep CPU time low. | ||
1419 | * | ||
1420 | * The return value consist of: | ||
1421 | * lower byte: Bits 4-0: N Divider Value | ||
1422 | * Bits 5-6: R Value for e.g. SR10 or SR12 | ||
1423 | * higher byte: Bits 0-6: M divider value for e.g. SR11 or SR13 | ||
1424 | */ | ||
1425 | static unsigned short cv64_compute_clock(unsigned long freq) | ||
1426 | { | ||
1427 | static unsigned char *mnr, *save; /* M, N + R vals */ | ||
1428 | unsigned long work_freq, r; | ||
1429 | unsigned short erg; | ||
1430 | long diff, d2; | ||
1431 | |||
1432 | DPRINTK("ENTER\n"); | ||
1433 | if (freq < 12500000 || freq > MAXPIXELCLOCK) { | ||
1434 | printk("CV64 driver: Illegal clock frequency %ld, using 25MHz\n", | ||
1435 | freq); | ||
1436 | freq = 25000000; | ||
1437 | } | ||
1438 | DPRINTK("Freq = %ld\n", freq); | ||
1439 | mnr = clocks; /* there the vals are stored */ | ||
1440 | d2 = 0x7fffffff; | ||
1441 | |||
1442 | while (*mnr) { /* mnr vals are 0-terminated */ | ||
1443 | work_freq = (0x37EE * (mnr[0] + 2)) / ((mnr[1] & 0x1F) + 2); | ||
1444 | |||
1445 | r = (mnr[1] >> 5) & 0x03; | ||
1446 | if (r != 0) { | ||
1447 | work_freq = work_freq >> r; /* r is the freq divider */ | ||
1448 | } | ||
1449 | |||
1450 | work_freq *= 0x3E8; /* 2nd part of OSC */ | ||
1451 | |||
1452 | diff = abs(freq - work_freq); | ||
1453 | |||
1454 | if (d2 >= diff) { | ||
1455 | d2 = diff; | ||
1456 | /* In save are the vals for minimal diff */ | ||
1457 | save = mnr; | ||
1458 | } | ||
1459 | mnr += 2; | ||
1460 | } | ||
1461 | erg = *((unsigned short *)save); | ||
1462 | |||
1463 | DPRINTK("EXIT\n"); | ||
1464 | return (erg); | ||
1465 | } | ||
1466 | |||
1467 | static int cv_has_4mb (volatile unsigned char *fb) | ||
1468 | { | ||
1469 | volatile unsigned long *tr, *tw; | ||
1470 | DPRINTK("ENTER\n"); | ||
1471 | |||
1472 | /* write patterns in memory and test if they can be read */ | ||
1473 | tw = (volatile unsigned long *) fb; | ||
1474 | tr = (volatile unsigned long *) (fb + 0x02000000); | ||
1475 | |||
1476 | *tw = 0x87654321; | ||
1477 | |||
1478 | if (*tr != 0x87654321) { | ||
1479 | DPRINTK("EXIT - <4MB\n"); | ||
1480 | return (0); | ||
1481 | } | ||
1482 | |||
1483 | /* upper memory region */ | ||
1484 | tw = (volatile unsigned long *) (fb + 0x00200000); | ||
1485 | tr = (volatile unsigned long *) (fb + 0x02200000); | ||
1486 | |||
1487 | *tw = 0x87654321; | ||
1488 | |||
1489 | if (*tr != 0x87654321) { | ||
1490 | DPRINTK("EXIT - <4MB\n"); | ||
1491 | return (0); | ||
1492 | } | ||
1493 | |||
1494 | *tw = 0xAAAAAAAA; | ||
1495 | |||
1496 | if (*tr != 0xAAAAAAAA) { | ||
1497 | DPRINTK("EXIT - <4MB\n"); | ||
1498 | return (0); | ||
1499 | } | ||
1500 | |||
1501 | *tw = 0x55555555; | ||
1502 | |||
1503 | if (*tr != 0x55555555) { | ||
1504 | DPRINTK("EXIT - <4MB\n"); | ||
1505 | return (0); | ||
1506 | } | ||
1507 | |||
1508 | DPRINTK("EXIT\n"); | ||
1509 | return (1); | ||
1510 | } | ||
1511 | |||
1512 | static void cv64_board_init (void) | ||
1513 | { | ||
1514 | volatile unsigned char *regs = CyberRegs; | ||
1515 | int i; | ||
1516 | unsigned int clockpar; | ||
1517 | unsigned char test; | ||
1518 | |||
1519 | DPRINTK("ENTER\n"); | ||
1520 | |||
1521 | /* | ||
1522 | * Special CyberVision 64 board operations | ||
1523 | */ | ||
1524 | /* Reset board */ | ||
1525 | for (i = 0; i < 6; i++) { | ||
1526 | cv64_write_port (0xff, CyberBase); | ||
1527 | } | ||
1528 | /* Return to operational mode */ | ||
1529 | cv64_write_port (0x8004, CyberBase); | ||
1530 | |||
1531 | /* | ||
1532 | * Generic (?) S3 chip wakeup | ||
1533 | */ | ||
1534 | /* Disable I/O & memory decoders, video in setup mode */ | ||
1535 | wb_64 (regs, SREG_VIDEO_SUBS_ENABLE, 0x10); | ||
1536 | /* Video responds to cmds, addrs & data */ | ||
1537 | wb_64 (regs, SREG_OPTION_SELECT, 0x1); | ||
1538 | /* Enable I/O & memory decoders, video in operational mode */ | ||
1539 | wb_64 (regs, SREG_VIDEO_SUBS_ENABLE, 0x8); | ||
1540 | /* VGA color emulation, enable cpu access to display mem */ | ||
1541 | wb_64 (regs, GREG_MISC_OUTPUT_W, 0x03); | ||
1542 | /* Unlock S3 VGA regs */ | ||
1543 | WCrt (regs, CRT_ID_REGISTER_LOCK_1, 0x48); | ||
1544 | /* Unlock system control & extension registers */ | ||
1545 | WCrt (regs, CRT_ID_REGISTER_LOCK_2, 0xA5); | ||
1546 | /* GRF - Enable interrupts */ | ||
1547 | /* Enable enhanced regs access, Ready cntl 0 wait states */ | ||
1548 | test = RCrt (regs, CRT_ID_SYSTEM_CONFIG); | ||
1549 | test = test | 0x01; /* enable enhanced register access */ | ||
1550 | test = test & 0xEF; /* clear bit 4, 0 wait state */ | ||
1551 | WCrt (regs, CRT_ID_SYSTEM_CONFIG, test); | ||
1552 | /* | ||
1553 | * bit 0=1: Enable enhaced mode functions | ||
1554 | * bit 2=0: Enhanced mode 8+ bits/pixel | ||
1555 | * bit 4=1: Enable linear addressing | ||
1556 | * bit 5=1: Enable MMIO | ||
1557 | */ | ||
1558 | wb_64 (regs, ECR_ADV_FUNC_CNTL, 0x31); | ||
1559 | /* | ||
1560 | * bit 0=1: Color emulation | ||
1561 | * bit 1=1: Enable CPU access to display memory | ||
1562 | * bit 5=1: Select high 64K memory page | ||
1563 | */ | ||
1564 | /* GRF - 0xE3 */ | ||
1565 | wb_64 (regs, GREG_MISC_OUTPUT_W, 0x23); | ||
1566 | |||
1567 | /* Cpu base addr */ | ||
1568 | WCrt (regs, CRT_ID_EXT_SYS_CNTL_4, 0x0); | ||
1569 | |||
1570 | /* Reset. This does nothing on Trio, but standard VGA practice */ | ||
1571 | /* WSeq (CyberRegs, SEQ_ID_RESET, 0x03); */ | ||
1572 | /* Character clocks 8 dots wide */ | ||
1573 | WSeq (regs, SEQ_ID_CLOCKING_MODE, 0x01); | ||
1574 | /* Enable cpu write to all color planes */ | ||
1575 | WSeq (regs, SEQ_ID_MAP_MASK, 0x0F); | ||
1576 | /* Font table in 1st 8k of plane 2, font A=B disables swtich */ | ||
1577 | WSeq (regs, SEQ_ID_CHAR_MAP_SELECT, 0x0); | ||
1578 | /* Allow mem access to 256kb */ | ||
1579 | WSeq (regs, SEQ_ID_MEMORY_MODE, 0x2); | ||
1580 | /* Unlock S3 extensions to VGA Sequencer regs */ | ||
1581 | WSeq (regs, SEQ_ID_UNLOCK_EXT, 0x6); | ||
1582 | |||
1583 | /* Enable 4MB fast page mode */ | ||
1584 | test = RSeq (regs, SEQ_ID_BUS_REQ_CNTL); | ||
1585 | test = test | 1 << 6; | ||
1586 | WSeq (regs, SEQ_ID_BUS_REQ_CNTL, test); | ||
1587 | |||
1588 | /* Faster LUT write: 1 DCLK LUT write cycle, RAMDAC clk doubled */ | ||
1589 | WSeq (regs, SEQ_ID_RAMDAC_CNTL, 0xC0); | ||
1590 | |||
1591 | /* Clear immediate clock load bit */ | ||
1592 | test = RSeq (regs, SEQ_ID_CLKSYN_CNTL_2); | ||
1593 | test = test & 0xDF; | ||
1594 | /* If > 55MHz, enable 2 cycle memory write */ | ||
1595 | if (cv64_memclk >= 55000000) { | ||
1596 | test |= 0x80; | ||
1597 | } | ||
1598 | WSeq (regs, SEQ_ID_CLKSYN_CNTL_2, test); | ||
1599 | |||
1600 | /* Set MCLK value */ | ||
1601 | clockpar = cv64_compute_clock (cv64_memclk); | ||
1602 | test = (clockpar & 0xFF00) >> 8; | ||
1603 | WSeq (regs, SEQ_ID_MCLK_HI, test); | ||
1604 | test = clockpar & 0xFF; | ||
1605 | WSeq (regs, SEQ_ID_MCLK_LO, test); | ||
1606 | |||
1607 | /* Chip rev specific: Not in my Trio manual!!! */ | ||
1608 | if (RCrt (regs, CRT_ID_REVISION) == 0x10) | ||
1609 | WSeq (regs, SEQ_ID_MORE_MAGIC, test); | ||
1610 | |||
1611 | /* We now load an 25 MHz, 31kHz, 640x480 standard VGA Mode. */ | ||
1612 | |||
1613 | /* Set DCLK value */ | ||
1614 | WSeq (regs, SEQ_ID_DCLK_HI, 0x13); | ||
1615 | WSeq (regs, SEQ_ID_DCLK_LO, 0x41); | ||
1616 | |||
1617 | /* Load DCLK (and MCLK?) immediately */ | ||
1618 | test = RSeq (regs, SEQ_ID_CLKSYN_CNTL_2); | ||
1619 | test = test | 0x22; | ||
1620 | WSeq (regs, SEQ_ID_CLKSYN_CNTL_2, test); | ||
1621 | |||
1622 | /* Enable loading of DCLK */ | ||
1623 | test = rb_64(regs, GREG_MISC_OUTPUT_R); | ||
1624 | test = test | 0x0C; | ||
1625 | wb_64 (regs, GREG_MISC_OUTPUT_W, test); | ||
1626 | |||
1627 | /* Turn off immediate xCLK load */ | ||
1628 | WSeq (regs, SEQ_ID_CLKSYN_CNTL_2, 0x2); | ||
1629 | |||
1630 | /* Horizontal character clock counts */ | ||
1631 | /* 8 LSB of 9 bits = total line - 5 */ | ||
1632 | WCrt (regs, CRT_ID_HOR_TOTAL, 0x5F); | ||
1633 | /* Active display line */ | ||
1634 | WCrt (regs, CRT_ID_HOR_DISP_ENA_END, 0x4F); | ||
1635 | /* Blank assertion start */ | ||
1636 | WCrt (regs, CRT_ID_START_HOR_BLANK, 0x50); | ||
1637 | /* Blank assertion end */ | ||
1638 | WCrt (regs, CRT_ID_END_HOR_BLANK, 0x82); | ||
1639 | /* HSYNC assertion start */ | ||
1640 | WCrt (regs, CRT_ID_START_HOR_RETR, 0x54); | ||
1641 | /* HSYNC assertion end */ | ||
1642 | WCrt (regs, CRT_ID_END_HOR_RETR, 0x80); | ||
1643 | WCrt (regs, CRT_ID_VER_TOTAL, 0xBF); | ||
1644 | WCrt (regs, CRT_ID_OVERFLOW, 0x1F); | ||
1645 | WCrt (regs, CRT_ID_PRESET_ROW_SCAN, 0x0); | ||
1646 | WCrt (regs, CRT_ID_MAX_SCAN_LINE, 0x40); | ||
1647 | WCrt (regs, CRT_ID_CURSOR_START, 0x00); | ||
1648 | WCrt (regs, CRT_ID_CURSOR_END, 0x00); | ||
1649 | WCrt (regs, CRT_ID_START_ADDR_HIGH, 0x00); | ||
1650 | WCrt (regs, CRT_ID_START_ADDR_LOW, 0x00); | ||
1651 | WCrt (regs, CRT_ID_CURSOR_LOC_HIGH, 0x00); | ||
1652 | WCrt (regs, CRT_ID_CURSOR_LOC_LOW, 0x00); | ||
1653 | WCrt (regs, CRT_ID_START_VER_RETR, 0x9C); | ||
1654 | WCrt (regs, CRT_ID_END_VER_RETR, 0x0E); | ||
1655 | WCrt (regs, CRT_ID_VER_DISP_ENA_END, 0x8F); | ||
1656 | WCrt (regs, CRT_ID_SCREEN_OFFSET, 0x50); | ||
1657 | WCrt (regs, CRT_ID_UNDERLINE_LOC, 0x00); | ||
1658 | WCrt (regs, CRT_ID_START_VER_BLANK, 0x96); | ||
1659 | WCrt (regs, CRT_ID_END_VER_BLANK, 0xB9); | ||
1660 | WCrt (regs, CRT_ID_MODE_CONTROL, 0xE3); | ||
1661 | WCrt (regs, CRT_ID_LINE_COMPARE, 0xFF); | ||
1662 | WCrt (regs, CRT_ID_BACKWAD_COMP_3, 0x10); /* FIFO enabled */ | ||
1663 | WCrt (regs, CRT_ID_MISC_1, 0x35); | ||
1664 | WCrt (regs, CRT_ID_DISPLAY_FIFO, 0x5A); | ||
1665 | WCrt (regs, CRT_ID_EXT_MEM_CNTL_2, 0x70); | ||
1666 | WCrt (regs, CRT_ID_LAW_POS_LO, 0x40); | ||
1667 | WCrt (regs, CRT_ID_EXT_MEM_CNTL_3, 0xFF); | ||
1668 | |||
1669 | WGfx (regs, GCT_ID_SET_RESET, 0x0); | ||
1670 | WGfx (regs, GCT_ID_ENABLE_SET_RESET, 0x0); | ||
1671 | WGfx (regs, GCT_ID_COLOR_COMPARE, 0x0); | ||
1672 | WGfx (regs, GCT_ID_DATA_ROTATE, 0x0); | ||
1673 | WGfx (regs, GCT_ID_READ_MAP_SELECT, 0x0); | ||
1674 | WGfx (regs, GCT_ID_GRAPHICS_MODE, 0x40); | ||
1675 | WGfx (regs, GCT_ID_MISC, 0x01); | ||
1676 | WGfx (regs, GCT_ID_COLOR_XCARE, 0x0F); | ||
1677 | WGfx (regs, GCT_ID_BITMASK, 0xFF); | ||
1678 | |||
1679 | /* Colors for text mode */ | ||
1680 | for (i = 0; i < 0xf; i++) | ||
1681 | WAttr (regs, i, i); | ||
1682 | |||
1683 | WAttr (regs, ACT_ID_ATTR_MODE_CNTL, 0x41); | ||
1684 | WAttr (regs, ACT_ID_OVERSCAN_COLOR, 0x01); | ||
1685 | WAttr (regs, ACT_ID_COLOR_PLANE_ENA, 0x0F); | ||
1686 | WAttr (regs, ACT_ID_HOR_PEL_PANNING, 0x0); | ||
1687 | WAttr (regs, ACT_ID_COLOR_SELECT, 0x0); | ||
1688 | |||
1689 | wb_64 (regs, VDAC_MASK, 0xFF); | ||
1690 | |||
1691 | *((unsigned long *) (regs + ECR_FRGD_COLOR)) = 0xFF; | ||
1692 | *((unsigned long *) (regs + ECR_BKGD_COLOR)) = 0; | ||
1693 | |||
1694 | /* Colors initially set to grayscale */ | ||
1695 | |||
1696 | wb_64 (regs, VDAC_ADDRESS_W, 0); | ||
1697 | for (i = 255; i >= 0; i--) { | ||
1698 | wb_64(regs, VDAC_DATA, i); | ||
1699 | wb_64(regs, VDAC_DATA, i); | ||
1700 | wb_64(regs, VDAC_DATA, i); | ||
1701 | } | ||
1702 | |||
1703 | /* GFx hardware cursor off */ | ||
1704 | WCrt (regs, CRT_ID_HWGC_MODE, 0x00); | ||
1705 | |||
1706 | /* Set first to 4MB, so test will work */ | ||
1707 | WCrt (regs, CRT_ID_LAW_CNTL, 0x13); | ||
1708 | /* Find "correct" size of fbmem of Z3 board */ | ||
1709 | if (cv_has_4mb (CyberMem)) { | ||
1710 | CyberSize = 1024 * 1024 * 4; | ||
1711 | WCrt (regs, CRT_ID_LAW_CNTL, 0x13); | ||
1712 | DPRINTK("4MB board\n"); | ||
1713 | } else { | ||
1714 | CyberSize = 1024 * 1024 * 2; | ||
1715 | WCrt (regs, CRT_ID_LAW_CNTL, 0x12); | ||
1716 | DPRINTK("2MB board\n"); | ||
1717 | } | ||
1718 | |||
1719 | /* Initialize graphics engine */ | ||
1720 | Cyber_WaitBlit(); | ||
1721 | vgaw16 (regs, ECR_FRGD_MIX, 0x27); | ||
1722 | vgaw16 (regs, ECR_BKGD_MIX, 0x07); | ||
1723 | vgaw16 (regs, ECR_READ_REG_DATA, 0x1000); | ||
1724 | udelay(200); | ||
1725 | vgaw16 (regs, ECR_READ_REG_DATA, 0x2000); | ||
1726 | Cyber_WaitBlit(); | ||
1727 | vgaw16 (regs, ECR_READ_REG_DATA, 0x3FFF); | ||
1728 | Cyber_WaitBlit(); | ||
1729 | udelay(200); | ||
1730 | vgaw16 (regs, ECR_READ_REG_DATA, 0x4FFF); | ||
1731 | Cyber_WaitBlit(); | ||
1732 | vgaw16 (regs, ECR_BITPLANE_WRITE_MASK, ~0); | ||
1733 | Cyber_WaitBlit(); | ||
1734 | vgaw16 (regs, ECR_READ_REG_DATA, 0xE000); | ||
1735 | vgaw16 (regs, ECR_CURRENT_Y_POS2, 0x00); | ||
1736 | vgaw16 (regs, ECR_CURRENT_X_POS2, 0x00); | ||
1737 | vgaw16 (regs, ECR_READ_REG_DATA, 0xA000); | ||
1738 | vgaw16 (regs, ECR_DEST_Y__AX_STEP, 0x00); | ||
1739 | vgaw16 (regs, ECR_DEST_Y2__AX_STEP2, 0x00); | ||
1740 | vgaw16 (regs, ECR_DEST_X__DIA_STEP, 0x00); | ||
1741 | vgaw16 (regs, ECR_DEST_X2__DIA_STEP2, 0x00); | ||
1742 | vgaw16 (regs, ECR_SHORT_STROKE, 0x00); | ||
1743 | vgaw16 (regs, ECR_DRAW_CMD, 0x01); | ||
1744 | |||
1745 | Cyber_WaitBlit(); | ||
1746 | |||
1747 | vgaw16 (regs, ECR_READ_REG_DATA, 0x4FFF); | ||
1748 | vgaw16 (regs, ECR_BKGD_COLOR, 0x01); | ||
1749 | vgaw16 (regs, ECR_FRGD_COLOR, 0x00); | ||
1750 | |||
1751 | |||
1752 | /* Enable video display (set bit 5) */ | ||
1753 | /* ARB - Would also seem to write to AR13. | ||
1754 | * May want to use parts of WAttr to set JUST bit 5 | ||
1755 | */ | ||
1756 | WAttr (regs, 0x33, 0); | ||
1757 | |||
1758 | /* GRF - function code ended here */ | ||
1759 | |||
1760 | /* Turn gfx on again */ | ||
1761 | gfx_on_off (0, regs); | ||
1762 | |||
1763 | /* Pass-through */ | ||
1764 | cvscreen (0, CyberBase); | ||
1765 | |||
1766 | DPRINTK("EXIT\n"); | ||
1767 | } | ||
1768 | |||
1769 | static void cv64_load_video_mode (struct fb_var_screeninfo *video_mode) | ||
1770 | { | ||
1771 | volatile unsigned char *regs = CyberRegs; | ||
1772 | int fx, fy; | ||
1773 | unsigned short mnr; | ||
1774 | unsigned short HT, HDE, HBS, HBE, HSS, HSE, VDE, VBS, VBE, VSS, VSE, VT; | ||
1775 | char LACE, DBLSCAN, TEXT, CONSOLE; | ||
1776 | int cr50, sr15, sr18, clock_mode, test; | ||
1777 | int m, n; | ||
1778 | int tfillm, temptym; | ||
1779 | int hmul; | ||
1780 | |||
1781 | /* ---------------- */ | ||
1782 | int xres, hfront, hsync, hback; | ||
1783 | int yres, vfront, vsync, vback; | ||
1784 | int bpp; | ||
1785 | #if 0 | ||
1786 | float freq_f; | ||
1787 | #endif | ||
1788 | long freq; | ||
1789 | /* ---------------- */ | ||
1790 | |||
1791 | DPRINTK("ENTER\n"); | ||
1792 | TEXT = 0; /* if depth == 4 */ | ||
1793 | CONSOLE = 0; /* mode num == 255 (console) */ | ||
1794 | fx = fy = 8; /* force 8x8 font */ | ||
1795 | |||
1796 | /* GRF - Disable interrupts */ | ||
1797 | |||
1798 | gfx_on_off (1, regs); | ||
1799 | |||
1800 | switch (video_mode->bits_per_pixel) { | ||
1801 | case 15: | ||
1802 | case 16: | ||
1803 | hmul = 2; | ||
1804 | break; | ||
1805 | |||
1806 | default: | ||
1807 | hmul = 1; | ||
1808 | break; | ||
1809 | } | ||
1810 | |||
1811 | bpp = video_mode->bits_per_pixel; | ||
1812 | xres = video_mode->xres; | ||
1813 | hfront = video_mode->right_margin; | ||
1814 | hsync = video_mode->hsync_len; | ||
1815 | hback = video_mode->left_margin; | ||
1816 | |||
1817 | LACE = 0; | ||
1818 | DBLSCAN = 0; | ||
1819 | |||
1820 | if (video_mode->vmode & FB_VMODE_DOUBLE) { | ||
1821 | yres = video_mode->yres * 2; | ||
1822 | vfront = video_mode->lower_margin * 2; | ||
1823 | vsync = video_mode->vsync_len * 2; | ||
1824 | vback = video_mode->upper_margin * 2; | ||
1825 | DBLSCAN = 1; | ||
1826 | } else if (video_mode->vmode & FB_VMODE_INTERLACED) { | ||
1827 | yres = (video_mode->yres + 1) / 2; | ||
1828 | vfront = (video_mode->lower_margin + 1) / 2; | ||
1829 | vsync = (video_mode->vsync_len + 1) / 2; | ||
1830 | vback = (video_mode->upper_margin + 1) / 2; | ||
1831 | LACE = 1; | ||
1832 | } else { | ||
1833 | yres = video_mode->yres; | ||
1834 | vfront = video_mode->lower_margin; | ||
1835 | vsync = video_mode->vsync_len; | ||
1836 | vback = video_mode->upper_margin; | ||
1837 | } | ||
1838 | |||
1839 | /* ARB Dropping custom setup method from cvision.c */ | ||
1840 | #if 0 | ||
1841 | if (cvision_custom_mode) { | ||
1842 | HBS = hbs / 8 * hmul; | ||
1843 | HBE = hbe / 8 * hmul; | ||
1844 | HSS = hss / 8 * hmul; | ||
1845 | HSE = hse / 8 * hmul; | ||
1846 | HT = ht / 8 * hmul - 5; | ||
1847 | |||
1848 | VBS = vbs - 1; | ||
1849 | VSS = vss; | ||
1850 | VSE = vse; | ||
1851 | VBE = vbe; | ||
1852 | VT = vt - 2; | ||
1853 | } else { | ||
1854 | #else | ||
1855 | { | ||
1856 | #endif | ||
1857 | HBS = hmul * (xres / 8); | ||
1858 | HBE = hmul * ((xres/8) + (hfront/8) + (hsync/8) + (hback/8) - 2); | ||
1859 | HSS = hmul * ((xres/8) + (hfront/8) + 2); | ||
1860 | HSE = hmul * ((xres/8) + (hfront/8) + (hsync/8) + 1); | ||
1861 | HT = hmul * ((xres/8) + (hfront/8) + (hsync/8) + (hback/8)); | ||
1862 | |||
1863 | VBS = yres; | ||
1864 | VBE = yres + vfront + vsync + vback - 2; | ||
1865 | VSS = yres + vfront - 1; | ||
1866 | VSE = yres + vfront + vsync - 1; | ||
1867 | VT = yres + vfront + vsync + vback - 2; | ||
1868 | } | ||
1869 | |||
1870 | wb_64 (regs, ECR_ADV_FUNC_CNTL, (TEXT ? 0x00 : 0x31)); | ||
1871 | |||
1872 | if (TEXT) | ||
1873 | HDE = ((video_mode->xres + fx - 1) / fx) - 1; | ||
1874 | else | ||
1875 | HDE = (video_mode->xres + 3) * hmul / 8 - 1; | ||
1876 | |||
1877 | VDE = video_mode->yres - 1; | ||
1878 | |||
1879 | WCrt (regs, CRT_ID_HWGC_MODE, 0x00); | ||
1880 | WCrt (regs, CRT_ID_EXT_DAC_CNTL, 0x00); | ||
1881 | |||
1882 | WSeq (regs, SEQ_ID_MEMORY_MODE, | ||
1883 | (TEXT || (video_mode->bits_per_pixel == 1)) ? 0x06 : 0x0e); | ||
1884 | WGfx (regs, GCT_ID_READ_MAP_SELECT, 0x00); | ||
1885 | WSeq (regs, SEQ_ID_MAP_MASK, | ||
1886 | (video_mode->bits_per_pixel == 1) ? 0x01 : 0xFF); | ||
1887 | WSeq (regs, SEQ_ID_CHAR_MAP_SELECT, 0x00); | ||
1888 | |||
1889 | /* cv64_compute_clock accepts arguments in Hz */ | ||
1890 | /* pixclock is in ps ... convert to Hz */ | ||
1891 | |||
1892 | #if 0 | ||
1893 | freq_f = (1.0 / (float) video_mode->pixclock) * 1000000000; | ||
1894 | freq = ((long) freq_f) * 1000; | ||
1895 | #else | ||
1896 | /* freq = (long) ((long long)1000000000000 / (long long) video_mode->pixclock); | ||
1897 | */ | ||
1898 | freq = (1000000000 / video_mode->pixclock) * 1000; | ||
1899 | #endif | ||
1900 | |||
1901 | mnr = cv64_compute_clock (freq); | ||
1902 | WSeq (regs, SEQ_ID_DCLK_HI, ((mnr & 0xFF00) >> 8)); | ||
1903 | WSeq (regs, SEQ_ID_DCLK_LO, (mnr & 0xFF)); | ||
1904 | |||
1905 | /* Load display parameters into board */ | ||
1906 | WCrt (regs, CRT_ID_EXT_HOR_OVF, | ||
1907 | ((HT & 0x100) ? 0x01 : 0x00) | | ||
1908 | ((HDE & 0x100) ? 0x02 : 0x00) | | ||
1909 | ((HBS & 0x100) ? 0x04 : 0x00) | | ||
1910 | /* ((HBE & 0x40) ? 0x08 : 0x00) | */ | ||
1911 | ((HSS & 0x100) ? 0x10 : 0x00) | | ||
1912 | /* ((HSE & 0x20) ? 0x20 : 0x00) | */ | ||
1913 | (((HT-5) & 0x100) ? 0x40 : 0x00) | ||
1914 | ); | ||
1915 | |||
1916 | WCrt (regs, CRT_ID_EXT_VER_OVF, | ||
1917 | 0x40 | | ||
1918 | ((VT & 0x400) ? 0x01 : 0x00) | | ||
1919 | ((VDE & 0x400) ? 0x02 : 0x00) | | ||
1920 | ((VBS & 0x400) ? 0x04 : 0x00) | | ||
1921 | ((VSS & 0x400) ? 0x10 : 0x00) | ||
1922 | ); | ||
1923 | |||
1924 | WCrt (regs, CRT_ID_HOR_TOTAL, HT); | ||
1925 | WCrt (regs, CRT_ID_DISPLAY_FIFO, HT - 5); | ||
1926 | WCrt (regs, CRT_ID_HOR_DISP_ENA_END, ((HDE >= HBS) ? (HBS - 1) : HDE)); | ||
1927 | WCrt (regs, CRT_ID_START_HOR_BLANK, HBS); | ||
1928 | WCrt (regs, CRT_ID_END_HOR_BLANK, ((HBE & 0x1F) | 0x80)); | ||
1929 | WCrt (regs, CRT_ID_START_HOR_RETR, HSS); | ||
1930 | WCrt (regs, CRT_ID_END_HOR_RETR, | ||
1931 | (HSE & 0x1F) | | ||
1932 | ((HBE & 0x20) ? 0x80 : 0x00) | ||
1933 | ); | ||
1934 | WCrt (regs, CRT_ID_VER_TOTAL, VT); | ||
1935 | WCrt (regs, CRT_ID_OVERFLOW, | ||
1936 | 0x10 | | ||
1937 | ((VT & 0x100) ? 0x01 : 0x00) | | ||
1938 | ((VDE & 0x100) ? 0x02 : 0x00) | | ||
1939 | ((VSS & 0x100) ? 0x04 : 0x00) | | ||
1940 | ((VBS & 0x100) ? 0x08 : 0x00) | | ||
1941 | ((VT & 0x200) ? 0x20 : 0x00) | | ||
1942 | ((VDE & 0x200) ? 0x40 : 0x00) | | ||
1943 | ((VSS & 0x200) ? 0x80 : 0x00) | ||
1944 | ); | ||
1945 | WCrt (regs, CRT_ID_MAX_SCAN_LINE, | ||
1946 | 0x40 | | ||
1947 | (DBLSCAN ? 0x80 : 0x00) | | ||
1948 | ((VBS & 0x200) ? 0x20 : 0x00) | | ||
1949 | (TEXT ? ((fy - 1) & 0x1F) : 0x00) | ||
1950 | ); | ||
1951 | |||
1952 | WCrt (regs, CRT_ID_MODE_CONTROL, 0xE3); | ||
1953 | |||
1954 | /* Text cursor */ | ||
1955 | |||
1956 | if (TEXT) { | ||
1957 | #if 1 | ||
1958 | WCrt (regs, CRT_ID_CURSOR_START, (fy & 0x1f) - 2); | ||
1959 | WCrt (regs, CRT_ID_CURSOR_END, (fy & 0x1F) - 1); | ||
1960 | #else | ||
1961 | WCrt (regs, CRT_ID_CURSOR_START, 0x00); | ||
1962 | WCrt (regs, CRT_ID_CURSOR_END, fy & 0x1F); | ||
1963 | #endif | ||
1964 | WCrt (regs, CRT_ID_UNDERLINE_LOC, (fy - 1) & 0x1F); | ||
1965 | WCrt (regs, CRT_ID_CURSOR_LOC_HIGH, 0x00); | ||
1966 | WCrt (regs, CRT_ID_CURSOR_LOC_LOW, 0x00); | ||
1967 | } | ||
1968 | |||
1969 | WCrt (regs, CRT_ID_START_ADDR_HIGH, 0x00); | ||
1970 | WCrt (regs, CRT_ID_START_ADDR_LOW, 0x00); | ||
1971 | WCrt (regs, CRT_ID_START_VER_RETR, VSS); | ||
1972 | WCrt (regs, CRT_ID_END_VER_RETR, (VSE & 0x0F)); | ||
1973 | WCrt (regs, CRT_ID_VER_DISP_ENA_END, VDE); | ||
1974 | WCrt (regs, CRT_ID_START_VER_BLANK, VBS); | ||
1975 | WCrt (regs, CRT_ID_END_VER_BLANK, VBE); | ||
1976 | WCrt (regs, CRT_ID_LINE_COMPARE, 0xFF); | ||
1977 | WCrt (regs, CRT_ID_LACE_RETR_START, HT / 2); | ||
1978 | WCrt (regs, CRT_ID_LACE_CONTROL, (LACE ? 0x20 : 0x00)); | ||
1979 | WGfx (regs, GCT_ID_GRAPHICS_MODE, | ||
1980 | ((TEXT || (video_mode->bits_per_pixel == 1)) ? 0x00 : 0x40)); | ||
1981 | WGfx (regs, GCT_ID_MISC, (TEXT ? 0x04 : 0x01)); | ||
1982 | WSeq (regs, SEQ_ID_MEMORY_MODE, | ||
1983 | ((TEXT || (video_mode->bits_per_pixel == 1)) ? 0x06 : 0x02)); | ||
1984 | |||
1985 | wb_64 (regs, VDAC_MASK, 0xFF); | ||
1986 | |||
1987 | /* Blank border */ | ||
1988 | test = RCrt (regs, CRT_ID_BACKWAD_COMP_2); | ||
1989 | WCrt (regs, CRT_ID_BACKWAD_COMP_2, (test | 0x20)); | ||
1990 | |||
1991 | sr15 = RSeq (regs, SEQ_ID_CLKSYN_CNTL_2); | ||
1992 | sr15 &= 0xEF; | ||
1993 | sr18 = RSeq (regs, SEQ_ID_RAMDAC_CNTL); | ||
1994 | sr18 &= 0x7F; | ||
1995 | clock_mode = 0x00; | ||
1996 | cr50 = 0x00; | ||
1997 | |||
1998 | test = RCrt (regs, CRT_ID_EXT_MISC_CNTL_2); | ||
1999 | test &= 0xD; | ||
2000 | |||
2001 | /* Clear roxxler byte-swapping... */ | ||
2002 | cv64_write_port (0x0040, CyberBase); | ||
2003 | cv64_write_port (0x0020, CyberBase); | ||
2004 | |||
2005 | switch (video_mode->bits_per_pixel) { | ||
2006 | case 1: | ||
2007 | case 4: /* text */ | ||
2008 | HDE = video_mode->xres / 16; | ||
2009 | break; | ||
2010 | |||
2011 | case 8: | ||
2012 | if (freq > 80000000) { | ||
2013 | clock_mode = 0x10 | 0x02; | ||
2014 | sr15 |= 0x10; | ||
2015 | sr18 |= 0x80; | ||
2016 | } | ||
2017 | HDE = video_mode->xres / 8; | ||
2018 | cr50 |= 0x00; | ||
2019 | break; | ||
2020 | |||
2021 | case 15: | ||
2022 | cv64_write_port (0x8020, CyberBase); | ||
2023 | clock_mode = 0x30; | ||
2024 | HDE = video_mode->xres / 4; | ||
2025 | cr50 |= 0x10; | ||
2026 | break; | ||
2027 | |||
2028 | case 16: | ||
2029 | cv64_write_port (0x8020, CyberBase); | ||
2030 | clock_mode = 0x50; | ||
2031 | HDE = video_mode->xres / 4; | ||
2032 | cr50 |= 0x10; | ||
2033 | break; | ||
2034 | |||
2035 | case 24: | ||
2036 | case 32: | ||
2037 | cv64_write_port (0x8040, CyberBase); | ||
2038 | clock_mode = 0xD0; | ||
2039 | HDE = video_mode->xres / 2; | ||
2040 | cr50 |= 0x30; | ||
2041 | break; | ||
2042 | } | ||
2043 | |||
2044 | WCrt (regs, CRT_ID_EXT_MISC_CNTL_2, clock_mode | test); | ||
2045 | WSeq (regs, SEQ_ID_CLKSYN_CNTL_2, sr15); | ||
2046 | WSeq (regs, SEQ_ID_RAMDAC_CNTL, sr18); | ||
2047 | WCrt (regs, CRT_ID_SCREEN_OFFSET, HDE); | ||
2048 | |||
2049 | WCrt (regs, CRT_ID_MISC_1, (TEXT ? 0x05 : 0x35)); | ||
2050 | |||
2051 | test = RCrt (regs, CRT_ID_EXT_SYS_CNTL_2); | ||
2052 | test &= ~0x30; | ||
2053 | test |= (HDE >> 4) & 0x30; | ||
2054 | WCrt (regs, CRT_ID_EXT_SYS_CNTL_2, test); | ||
2055 | |||
2056 | /* Set up graphics engine */ | ||
2057 | switch (video_mode->xres) { | ||
2058 | case 1024: | ||
2059 | cr50 |= 0x00; | ||
2060 | break; | ||
2061 | |||
2062 | case 640: | ||
2063 | cr50 |= 0x40; | ||
2064 | break; | ||
2065 | |||
2066 | case 800: | ||
2067 | cr50 |= 0x80; | ||
2068 | break; | ||
2069 | |||
2070 | case 1280: | ||
2071 | cr50 |= 0xC0; | ||
2072 | break; | ||
2073 | |||
2074 | case 1152: | ||
2075 | cr50 |= 0x01; | ||
2076 | break; | ||
2077 | |||
2078 | case 1600: | ||
2079 | cr50 |= 0x81; | ||
2080 | break; | ||
2081 | |||
2082 | default: /* XXX */ | ||
2083 | break; | ||
2084 | } | ||
2085 | |||
2086 | WCrt (regs, CRT_ID_EXT_SYS_CNTL_1, cr50); | ||
2087 | |||
2088 | udelay(100); | ||
2089 | WAttr (regs, ACT_ID_ATTR_MODE_CNTL, (TEXT ? 0x08 : 0x41)); | ||
2090 | udelay(100); | ||
2091 | WAttr (regs, ACT_ID_COLOR_PLANE_ENA, | ||
2092 | (video_mode->bits_per_pixel == 1) ? 0x01 : 0x0F); | ||
2093 | udelay(100); | ||
2094 | |||
2095 | tfillm = (96 * (cv64_memclk / 1000)) / 240000; | ||
2096 | |||
2097 | switch (video_mode->bits_per_pixel) { | ||
2098 | case 32: | ||
2099 | case 24: | ||
2100 | temptym = (24 * (cv64_memclk / 1000)) / (freq / 1000); | ||
2101 | break; | ||
2102 | case 15: | ||
2103 | case 16: | ||
2104 | temptym = (48 * (cv64_memclk / 1000)) / (freq / 1000); | ||
2105 | break; | ||
2106 | case 4: | ||
2107 | temptym = (192 * (cv64_memclk / 1000)) / (freq / 1000); | ||
2108 | break; | ||
2109 | default: | ||
2110 | temptym = (96 * (cv64_memclk / 1000)) / (freq / 1000); | ||
2111 | break; | ||
2112 | } | ||
2113 | |||
2114 | m = (temptym - tfillm - 9) / 2; | ||
2115 | if (m < 0) | ||
2116 | m = 0; | ||
2117 | m = (m & 0x1F) << 3; | ||
2118 | if (m < 0x18) | ||
2119 | m = 0x18; | ||
2120 | n = 0xFF; | ||
2121 | |||
2122 | WCrt (regs, CRT_ID_EXT_MEM_CNTL_2, m); | ||
2123 | WCrt (regs, CRT_ID_EXT_MEM_CNTL_3, n); | ||
2124 | udelay(10); | ||
2125 | |||
2126 | /* Text initialization */ | ||
2127 | |||
2128 | if (TEXT) { | ||
2129 | /* Do text initialization here ! */ | ||
2130 | } | ||
2131 | |||
2132 | if (CONSOLE) { | ||
2133 | int i; | ||
2134 | wb_64 (regs, VDAC_ADDRESS_W, 0); | ||
2135 | for (i = 0; i < 4; i++) { | ||
2136 | wb_64 (regs, VDAC_DATA, cvconscolors [i][0]); | ||
2137 | wb_64 (regs, VDAC_DATA, cvconscolors [i][1]); | ||
2138 | wb_64 (regs, VDAC_DATA, cvconscolors [i][2]); | ||
2139 | } | ||
2140 | } | ||
2141 | |||
2142 | WAttr (regs, 0x33, 0); | ||
2143 | |||
2144 | /* Turn gfx on again */ | ||
2145 | gfx_on_off (0, (volatile unsigned char *) regs); | ||
2146 | |||
2147 | /* Pass-through */ | ||
2148 | cvscreen (0, CyberBase); | ||
2149 | |||
2150 | DPRINTK("EXIT\n"); | ||
2151 | } | ||
2152 | |||
2153 | void cvision_bitblt (u_short sx, u_short sy, u_short dx, u_short dy, | ||
2154 | u_short w, u_short h) | ||
2155 | { | ||
2156 | volatile unsigned char *regs = CyberRegs; | ||
2157 | unsigned short drawdir = 0; | ||
2158 | |||
2159 | DPRINTK("ENTER\n"); | ||
2160 | if (sx > dx) { | ||
2161 | drawdir |= 1 << 5; | ||
2162 | } else { | ||
2163 | sx += w - 1; | ||
2164 | dx += w - 1; | ||
2165 | } | ||
2166 | |||
2167 | if (sy > dy) { | ||
2168 | drawdir |= 1 << 7; | ||
2169 | } else { | ||
2170 | sy += h - 1; | ||
2171 | dy += h - 1; | ||
2172 | } | ||
2173 | |||
2174 | Cyber_WaitBlit(); | ||
2175 | vgaw16 (regs, ECR_READ_REG_DATA, 0xA000); | ||
2176 | vgaw16 (regs, ECR_BKGD_MIX, 0x7); | ||
2177 | vgaw16 (regs, ECR_FRGD_MIX, 0x67); | ||
2178 | vgaw16 (regs, ECR_BKGD_COLOR, 0x0); | ||
2179 | vgaw16 (regs, ECR_FRGD_COLOR, 0x1); | ||
2180 | vgaw16 (regs, ECR_BITPLANE_READ_MASK, 0x1); | ||
2181 | vgaw16 (regs, ECR_BITPLANE_WRITE_MASK, 0xFFF); | ||
2182 | vgaw16 (regs, ECR_CURRENT_Y_POS, sy); | ||
2183 | vgaw16 (regs, ECR_CURRENT_X_POS, sx); | ||
2184 | vgaw16 (regs, ECR_DEST_Y__AX_STEP, dy); | ||
2185 | vgaw16 (regs, ECR_DEST_X__DIA_STEP, dx); | ||
2186 | vgaw16 (regs, ECR_READ_REG_DATA, h - 1); | ||
2187 | vgaw16 (regs, ECR_MAJ_AXIS_PIX_CNT, w - 1); | ||
2188 | vgaw16 (regs, ECR_DRAW_CMD, 0xC051 | drawdir); | ||
2189 | DPRINTK("EXIT\n"); | ||
2190 | } | ||
2191 | |||
2192 | void cvision_clear (u_short dx, u_short dy, u_short w, u_short h, u_short bg) | ||
2193 | { | ||
2194 | volatile unsigned char *regs = CyberRegs; | ||
2195 | DPRINTK("ENTER\n"); | ||
2196 | Cyber_WaitBlit(); | ||
2197 | vgaw16 (regs, ECR_FRGD_MIX, 0x0027); | ||
2198 | vgaw16 (regs, ECR_FRGD_COLOR, bg); | ||
2199 | vgaw16 (regs, ECR_READ_REG_DATA, 0xA000); | ||
2200 | vgaw16 (regs, ECR_CURRENT_Y_POS, dy); | ||
2201 | vgaw16 (regs, ECR_CURRENT_X_POS, dx); | ||
2202 | vgaw16 (regs, ECR_READ_REG_DATA, h - 1); | ||
2203 | vgaw16 (regs, ECR_MAJ_AXIS_PIX_CNT, w - 1); | ||
2204 | vgaw16 (regs, ECR_DRAW_CMD, 0x40B1); | ||
2205 | DPRINTK("EXIT\n"); | ||
2206 | } | ||
2207 | |||
2208 | #ifdef CYBERFBDEBUG | ||
2209 | /* | ||
2210 | * Dump internal settings of CyberVision board | ||
2211 | */ | ||
2212 | static void cv64_dump (void) | ||
2213 | { | ||
2214 | volatile unsigned char *regs = CyberRegs; | ||
2215 | DPRINTK("ENTER\n"); | ||
2216 | /* Dump the VGA setup values */ | ||
2217 | *(regs + S3_CRTC_ADR) = 0x00; | ||
2218 | DPRINTK("CR00 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2219 | *(regs + S3_CRTC_ADR) = 0x01; | ||
2220 | DPRINTK("CR01 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2221 | *(regs + S3_CRTC_ADR) = 0x02; | ||
2222 | DPRINTK("CR02 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2223 | *(regs + S3_CRTC_ADR) = 0x03; | ||
2224 | DPRINTK("CR03 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2225 | *(regs + S3_CRTC_ADR) = 0x04; | ||
2226 | DPRINTK("CR04 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2227 | *(regs + S3_CRTC_ADR) = 0x05; | ||
2228 | DPRINTK("CR05 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2229 | *(regs + S3_CRTC_ADR) = 0x06; | ||
2230 | DPRINTK("CR06 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2231 | *(regs + S3_CRTC_ADR) = 0x07; | ||
2232 | DPRINTK("CR07 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2233 | *(regs + S3_CRTC_ADR) = 0x08; | ||
2234 | DPRINTK("CR08 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2235 | *(regs + S3_CRTC_ADR) = 0x09; | ||
2236 | DPRINTK("CR09 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2237 | *(regs + S3_CRTC_ADR) = 0x10; | ||
2238 | DPRINTK("CR10 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2239 | *(regs + S3_CRTC_ADR) = 0x11; | ||
2240 | DPRINTK("CR11 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2241 | *(regs + S3_CRTC_ADR) = 0x12; | ||
2242 | DPRINTK("CR12 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2243 | *(regs + S3_CRTC_ADR) = 0x13; | ||
2244 | DPRINTK("CR13 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2245 | *(regs + S3_CRTC_ADR) = 0x15; | ||
2246 | DPRINTK("CR15 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2247 | *(regs + S3_CRTC_ADR) = 0x16; | ||
2248 | DPRINTK("CR16 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2249 | *(regs + S3_CRTC_ADR) = 0x36; | ||
2250 | DPRINTK("CR36 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2251 | *(regs + S3_CRTC_ADR) = 0x37; | ||
2252 | DPRINTK("CR37 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2253 | *(regs + S3_CRTC_ADR) = 0x42; | ||
2254 | DPRINTK("CR42 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2255 | *(regs + S3_CRTC_ADR) = 0x43; | ||
2256 | DPRINTK("CR43 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2257 | *(regs + S3_CRTC_ADR) = 0x50; | ||
2258 | DPRINTK("CR50 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2259 | *(regs + S3_CRTC_ADR) = 0x51; | ||
2260 | DPRINTK("CR51 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2261 | *(regs + S3_CRTC_ADR) = 0x53; | ||
2262 | DPRINTK("CR53 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2263 | *(regs + S3_CRTC_ADR) = 0x58; | ||
2264 | DPRINTK("CR58 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2265 | *(regs + S3_CRTC_ADR) = 0x59; | ||
2266 | DPRINTK("CR59 = %x\n", *(regs + S3_CRTC_DATA)); | ||
2267 | *(regs + S3_CRTC_ADR) = 0x5A; | ||
2268 | DPRINTK("CR5A = %x\n", *(regs + S3_CRTC_DATA)); | ||
2269 | *(regs + S3_CRTC_ADR) = 0x5D; | ||
2270 | DPRINTK("CR5D = %x\n", *(regs + S3_CRTC_DATA)); | ||
2271 | *(regs + S3_CRTC_ADR) = 0x5E; | ||
2272 | DPRINTK("CR5E = %x\n", *(regs + S3_CRTC_DATA)); | ||
2273 | DPRINTK("MISC = %x\n", *(regs + GREG_MISC_OUTPUT_R)); | ||
2274 | *(regs + SEQ_ADDRESS) = 0x01; | ||
2275 | DPRINTK("SR01 = %x\n", *(regs + SEQ_ADDRESS_R)); | ||
2276 | *(regs + SEQ_ADDRESS) = 0x02; | ||
2277 | DPRINTK("SR02 = %x\n", *(regs + SEQ_ADDRESS_R)); | ||
2278 | *(regs + SEQ_ADDRESS) = 0x03; | ||
2279 | DPRINTK("SR03 = %x\n", *(regs + SEQ_ADDRESS_R)); | ||
2280 | *(regs + SEQ_ADDRESS) = 0x09; | ||
2281 | DPRINTK("SR09 = %x\n", *(regs + SEQ_ADDRESS_R)); | ||
2282 | *(regs + SEQ_ADDRESS) = 0x10; | ||
2283 | DPRINTK("SR10 = %x\n", *(regs + SEQ_ADDRESS_R)); | ||
2284 | *(regs + SEQ_ADDRESS) = 0x11; | ||
2285 | DPRINTK("SR11 = %x\n", *(regs + SEQ_ADDRESS_R)); | ||
2286 | *(regs + SEQ_ADDRESS) = 0x12; | ||
2287 | DPRINTK("SR12 = %x\n", *(regs + SEQ_ADDRESS_R)); | ||
2288 | *(regs + SEQ_ADDRESS) = 0x13; | ||
2289 | DPRINTK("SR13 = %x\n", *(regs + SEQ_ADDRESS_R)); | ||
2290 | *(regs + SEQ_ADDRESS) = 0x15; | ||
2291 | DPRINTK("SR15 = %x\n", *(regs + SEQ_ADDRESS_R)); | ||
2292 | |||
2293 | return; | ||
2294 | } | ||
2295 | #endif | ||
diff --git a/drivers/video/cyberfb.h b/drivers/video/cyberfb.h deleted file mode 100644 index 8435c430ad27..000000000000 --- a/drivers/video/cyberfb.h +++ /dev/null | |||
@@ -1,415 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/m68k/console/cvision.h -- CyberVision64 definitions for the | ||
3 | * text console driver. | ||
4 | * | ||
5 | * Copyright (c) 1998 Alan Bair | ||
6 | * | ||
7 | * This file is based on the initial port to Linux of grf_cvreg.h: | ||
8 | * | ||
9 | * Copyright (c) 1997 Antonio Santos | ||
10 | * | ||
11 | * The original work is from the NetBSD CyberVision 64 framebuffer driver | ||
12 | * and support files (grf_cv.c, grf_cvreg.h, ite_cv.c): | ||
13 | * Permission to use the source of this driver was obtained from the | ||
14 | * author Michael Teske by Alan Bair. | ||
15 | * | ||
16 | * Copyright (c) 1995 Michael Teske | ||
17 | * | ||
18 | * History: | ||
19 | * | ||
20 | * | ||
21 | * | ||
22 | * This file is subject to the terms and conditions of the GNU General Public | ||
23 | * License. See the file COPYING in the main directory of this archive | ||
24 | * for more details. | ||
25 | */ | ||
26 | |||
27 | /* s3 commands */ | ||
28 | #define S3_BITBLT 0xc011 | ||
29 | #define S3_TWOPOINTLINE 0x2811 | ||
30 | #define S3_FILLEDRECT 0x40b1 | ||
31 | |||
32 | #define S3_FIFO_EMPTY 0x0400 | ||
33 | #define S3_HDW_BUSY 0x0200 | ||
34 | |||
35 | /* Enhanced register mapping (MMIO mode) */ | ||
36 | |||
37 | #define S3_READ_SEL 0xbee8 /* offset f */ | ||
38 | #define S3_MULT_MISC 0xbee8 /* offset e */ | ||
39 | #define S3_ERR_TERM 0x92e8 | ||
40 | #define S3_FRGD_COLOR 0xa6e8 | ||
41 | #define S3_BKGD_COLOR 0xa2e8 | ||
42 | #define S3_PIXEL_CNTL 0xbee8 /* offset a */ | ||
43 | #define S3_FRGD_MIX 0xbae8 | ||
44 | #define S3_BKGD_MIX 0xb6e8 | ||
45 | #define S3_CUR_Y 0x82e8 | ||
46 | #define S3_CUR_X 0x86e8 | ||
47 | #define S3_DESTY_AXSTP 0x8ae8 | ||
48 | #define S3_DESTX_DIASTP 0x8ee8 | ||
49 | #define S3_MIN_AXIS_PCNT 0xbee8 /* offset 0 */ | ||
50 | #define S3_MAJ_AXIS_PCNT 0x96e8 | ||
51 | #define S3_CMD 0x9ae8 | ||
52 | #define S3_GP_STAT 0x9ae8 | ||
53 | #define S3_ADVFUNC_CNTL 0x4ae8 | ||
54 | #define S3_WRT_MASK 0xaae8 | ||
55 | #define S3_RD_MASK 0xaee8 | ||
56 | |||
57 | /* Enhanced register mapping (Packed MMIO mode, write only) */ | ||
58 | #define S3_ALT_CURXY 0x8100 | ||
59 | #define S3_ALT_CURXY2 0x8104 | ||
60 | #define S3_ALT_STEP 0x8108 | ||
61 | #define S3_ALT_STEP2 0x810c | ||
62 | #define S3_ALT_ERR 0x8110 | ||
63 | #define S3_ALT_CMD 0x8118 | ||
64 | #define S3_ALT_MIX 0x8134 | ||
65 | #define S3_ALT_PCNT 0x8148 | ||
66 | #define S3_ALT_PAT 0x8168 | ||
67 | |||
68 | /* Drawing modes */ | ||
69 | #define S3_NOTCUR 0x0000 | ||
70 | #define S3_LOGICALZERO 0x0001 | ||
71 | #define S3_LOGICALONE 0x0002 | ||
72 | #define S3_LEAVEASIS 0x0003 | ||
73 | #define S3_NOTNEW 0x0004 | ||
74 | #define S3_CURXORNEW 0x0005 | ||
75 | #define S3_NOT_CURXORNEW 0x0006 | ||
76 | #define S3_NEW 0x0007 | ||
77 | #define S3_NOTCURORNOTNEW 0x0008 | ||
78 | #define S3_CURORNOTNEW 0x0009 | ||
79 | #define S3_NOTCURORNEW 0x000a | ||
80 | #define S3_CURORNEW 0x000b | ||
81 | #define S3_CURANDNEW 0x000c | ||
82 | #define S3_NOTCURANDNEW 0x000d | ||
83 | #define S3_CURANDNOTNEW 0x000e | ||
84 | #define S3_NOTCURANDNOTNEW 0x000f | ||
85 | |||
86 | #define S3_CRTC_ADR 0x03d4 | ||
87 | #define S3_CRTC_DATA 0x03d5 | ||
88 | |||
89 | #define S3_REG_LOCK2 0x39 | ||
90 | #define S3_HGC_MODE 0x45 | ||
91 | |||
92 | #define S3_HWGC_ORGX_H 0x46 | ||
93 | #define S3_HWGC_ORGX_L 0x47 | ||
94 | #define S3_HWGC_ORGY_H 0x48 | ||
95 | #define S3_HWGC_ORGY_L 0x49 | ||
96 | #define S3_HWGC_DX 0x4e | ||
97 | #define S3_HWGC_DY 0x4f | ||
98 | |||
99 | #define S3_LAW_CTL 0x58 | ||
100 | |||
101 | /**************************************************/ | ||
102 | |||
103 | /* support for a BitBlt operation. The op-codes are identical | ||
104 | to X11 GCs */ | ||
105 | #define GRFBBOPclear 0x0 /* 0 */ | ||
106 | #define GRFBBOPand 0x1 /* src AND dst */ | ||
107 | #define GRFBBOPandReverse 0x2 /* src AND NOT dst */ | ||
108 | #define GRFBBOPcopy 0x3 /* src */ | ||
109 | #define GRFBBOPandInverted 0x4 /* NOT src AND dst */ | ||
110 | #define GRFBBOPnoop 0x5 /* dst */ | ||
111 | #define GRFBBOPxor 0x6 /* src XOR dst */ | ||
112 | #define GRFBBOPor 0x7 /* src OR dst */ | ||
113 | #define GRFBBOPnor 0x8 /* NOT src AND NOT dst */ | ||
114 | #define GRFBBOPequiv 0x9 /* NOT src XOR dst */ | ||
115 | #define GRFBBOPinvert 0xa /* NOT dst */ | ||
116 | #define GRFBBOPorReverse 0xb /* src OR NOT dst */ | ||
117 | #define GRFBBOPcopyInverted 0xc /* NOT src */ | ||
118 | #define GRFBBOPorInverted 0xd /* NOT src OR dst */ | ||
119 | #define GRFBBOPnand 0xe /* NOT src OR NOT dst */ | ||
120 | #define GRFBBOPset 0xf /* 1 */ | ||
121 | |||
122 | |||
123 | /* Write 16 Bit VGA register */ | ||
124 | #define vgaw16(ba, reg, val) \ | ||
125 | *((unsigned short *) (((volatile unsigned char *)ba)+reg)) = val | ||
126 | |||
127 | /* | ||
128 | * Defines for the used register addresses (mw) | ||
129 | * | ||
130 | * NOTE: There are some registers that have different addresses when | ||
131 | * in mono or color mode. We only support color mode, and thus | ||
132 | * some addresses won't work in mono-mode! | ||
133 | * | ||
134 | * General and VGA-registers taken from retina driver. Fixed a few | ||
135 | * bugs in it. (SR and GR read address is Port + 1, NOT Port) | ||
136 | * | ||
137 | */ | ||
138 | |||
139 | /* General Registers: */ | ||
140 | #define GREG_MISC_OUTPUT_R 0x03CC | ||
141 | #define GREG_MISC_OUTPUT_W 0x03C2 | ||
142 | #define GREG_FEATURE_CONTROL_R 0x03CA | ||
143 | #define GREG_FEATURE_CONTROL_W 0x03DA | ||
144 | #define GREG_INPUT_STATUS0_R 0x03C2 | ||
145 | #define GREG_INPUT_STATUS1_R 0x03DA | ||
146 | |||
147 | /* Setup Registers: */ | ||
148 | #define SREG_OPTION_SELECT 0x0102 | ||
149 | #define SREG_VIDEO_SUBS_ENABLE 0x46E8 | ||
150 | |||
151 | /* Attribute Controller: */ | ||
152 | #define ACT_ADDRESS 0x03C0 | ||
153 | #define ACT_ADDRESS_R 0x03C1 | ||
154 | #define ACT_ADDRESS_W 0x03C0 | ||
155 | #define ACT_ADDRESS_RESET 0x03DA | ||
156 | #define ACT_ID_PALETTE0 0x00 | ||
157 | #define ACT_ID_PALETTE1 0x01 | ||
158 | #define ACT_ID_PALETTE2 0x02 | ||
159 | #define ACT_ID_PALETTE3 0x03 | ||
160 | #define ACT_ID_PALETTE4 0x04 | ||
161 | #define ACT_ID_PALETTE5 0x05 | ||
162 | #define ACT_ID_PALETTE6 0x06 | ||
163 | #define ACT_ID_PALETTE7 0x07 | ||
164 | #define ACT_ID_PALETTE8 0x08 | ||
165 | #define ACT_ID_PALETTE9 0x09 | ||
166 | #define ACT_ID_PALETTE10 0x0A | ||
167 | #define ACT_ID_PALETTE11 0x0B | ||
168 | #define ACT_ID_PALETTE12 0x0C | ||
169 | #define ACT_ID_PALETTE13 0x0D | ||
170 | #define ACT_ID_PALETTE14 0x0E | ||
171 | #define ACT_ID_PALETTE15 0x0F | ||
172 | #define ACT_ID_ATTR_MODE_CNTL 0x10 | ||
173 | #define ACT_ID_OVERSCAN_COLOR 0x11 | ||
174 | #define ACT_ID_COLOR_PLANE_ENA 0x12 | ||
175 | #define ACT_ID_HOR_PEL_PANNING 0x13 | ||
176 | #define ACT_ID_COLOR_SELECT 0x14 | ||
177 | |||
178 | /* Graphics Controller: */ | ||
179 | #define GCT_ADDRESS 0x03CE | ||
180 | #define GCT_ADDRESS_R 0x03CF | ||
181 | #define GCT_ADDRESS_W 0x03CF | ||
182 | #define GCT_ID_SET_RESET 0x00 | ||
183 | #define GCT_ID_ENABLE_SET_RESET 0x01 | ||
184 | #define GCT_ID_COLOR_COMPARE 0x02 | ||
185 | #define GCT_ID_DATA_ROTATE 0x03 | ||
186 | #define GCT_ID_READ_MAP_SELECT 0x04 | ||
187 | #define GCT_ID_GRAPHICS_MODE 0x05 | ||
188 | #define GCT_ID_MISC 0x06 | ||
189 | #define GCT_ID_COLOR_XCARE 0x07 | ||
190 | #define GCT_ID_BITMASK 0x08 | ||
191 | |||
192 | /* Sequencer: */ | ||
193 | #define SEQ_ADDRESS 0x03C4 | ||
194 | #define SEQ_ADDRESS_R 0x03C5 | ||
195 | #define SEQ_ADDRESS_W 0x03C5 | ||
196 | #define SEQ_ID_RESET 0x00 | ||
197 | #define SEQ_ID_CLOCKING_MODE 0x01 | ||
198 | #define SEQ_ID_MAP_MASK 0x02 | ||
199 | #define SEQ_ID_CHAR_MAP_SELECT 0x03 | ||
200 | #define SEQ_ID_MEMORY_MODE 0x04 | ||
201 | #define SEQ_ID_UNKNOWN1 0x05 | ||
202 | #define SEQ_ID_UNKNOWN2 0x06 | ||
203 | #define SEQ_ID_UNKNOWN3 0x07 | ||
204 | /* S3 extensions */ | ||
205 | #define SEQ_ID_UNLOCK_EXT 0x08 | ||
206 | #define SEQ_ID_EXT_SEQ_REG9 0x09 | ||
207 | #define SEQ_ID_BUS_REQ_CNTL 0x0A | ||
208 | #define SEQ_ID_EXT_MISC_SEQ 0x0B | ||
209 | #define SEQ_ID_UNKNOWN4 0x0C | ||
210 | #define SEQ_ID_EXT_SEQ 0x0D | ||
211 | #define SEQ_ID_UNKNOWN5 0x0E | ||
212 | #define SEQ_ID_UNKNOWN6 0x0F | ||
213 | #define SEQ_ID_MCLK_LO 0x10 | ||
214 | #define SEQ_ID_MCLK_HI 0x11 | ||
215 | #define SEQ_ID_DCLK_LO 0x12 | ||
216 | #define SEQ_ID_DCLK_HI 0x13 | ||
217 | #define SEQ_ID_CLKSYN_CNTL_1 0x14 | ||
218 | #define SEQ_ID_CLKSYN_CNTL_2 0x15 | ||
219 | #define SEQ_ID_CLKSYN_TEST_HI 0x16 /* reserved for S3 testing of the */ | ||
220 | #define SEQ_ID_CLKSYN_TEST_LO 0x17 /* internal clock synthesizer */ | ||
221 | #define SEQ_ID_RAMDAC_CNTL 0x18 | ||
222 | #define SEQ_ID_MORE_MAGIC 0x1A | ||
223 | |||
224 | /* CRT Controller: */ | ||
225 | #define CRT_ADDRESS 0x03D4 | ||
226 | #define CRT_ADDRESS_R 0x03D5 | ||
227 | #define CRT_ADDRESS_W 0x03D5 | ||
228 | #define CRT_ID_HOR_TOTAL 0x00 | ||
229 | #define CRT_ID_HOR_DISP_ENA_END 0x01 | ||
230 | #define CRT_ID_START_HOR_BLANK 0x02 | ||
231 | #define CRT_ID_END_HOR_BLANK 0x03 | ||
232 | #define CRT_ID_START_HOR_RETR 0x04 | ||
233 | #define CRT_ID_END_HOR_RETR 0x05 | ||
234 | #define CRT_ID_VER_TOTAL 0x06 | ||
235 | #define CRT_ID_OVERFLOW 0x07 | ||
236 | #define CRT_ID_PRESET_ROW_SCAN 0x08 | ||
237 | #define CRT_ID_MAX_SCAN_LINE 0x09 | ||
238 | #define CRT_ID_CURSOR_START 0x0A | ||
239 | #define CRT_ID_CURSOR_END 0x0B | ||
240 | #define CRT_ID_START_ADDR_HIGH 0x0C | ||
241 | #define CRT_ID_START_ADDR_LOW 0x0D | ||
242 | #define CRT_ID_CURSOR_LOC_HIGH 0x0E | ||
243 | #define CRT_ID_CURSOR_LOC_LOW 0x0F | ||
244 | #define CRT_ID_START_VER_RETR 0x10 | ||
245 | #define CRT_ID_END_VER_RETR 0x11 | ||
246 | #define CRT_ID_VER_DISP_ENA_END 0x12 | ||
247 | #define CRT_ID_SCREEN_OFFSET 0x13 | ||
248 | #define CRT_ID_UNDERLINE_LOC 0x14 | ||
249 | #define CRT_ID_START_VER_BLANK 0x15 | ||
250 | #define CRT_ID_END_VER_BLANK 0x16 | ||
251 | #define CRT_ID_MODE_CONTROL 0x17 | ||
252 | #define CRT_ID_LINE_COMPARE 0x18 | ||
253 | #define CRT_ID_GD_LATCH_RBACK 0x22 | ||
254 | #define CRT_ID_ACT_TOGGLE_RBACK 0x24 | ||
255 | #define CRT_ID_ACT_INDEX_RBACK 0x26 | ||
256 | /* S3 extensions: S3 VGA Registers */ | ||
257 | #define CRT_ID_DEVICE_HIGH 0x2D | ||
258 | #define CRT_ID_DEVICE_LOW 0x2E | ||
259 | #define CRT_ID_REVISION 0x2F | ||
260 | #define CRT_ID_CHIP_ID_REV 0x30 | ||
261 | #define CRT_ID_MEMORY_CONF 0x31 | ||
262 | #define CRT_ID_BACKWAD_COMP_1 0x32 | ||
263 | #define CRT_ID_BACKWAD_COMP_2 0x33 | ||
264 | #define CRT_ID_BACKWAD_COMP_3 0x34 | ||
265 | #define CRT_ID_REGISTER_LOCK 0x35 | ||
266 | #define CRT_ID_CONFIG_1 0x36 | ||
267 | #define CRT_ID_CONFIG_2 0x37 | ||
268 | #define CRT_ID_REGISTER_LOCK_1 0x38 | ||
269 | #define CRT_ID_REGISTER_LOCK_2 0x39 | ||
270 | #define CRT_ID_MISC_1 0x3A | ||
271 | #define CRT_ID_DISPLAY_FIFO 0x3B | ||
272 | #define CRT_ID_LACE_RETR_START 0x3C | ||
273 | /* S3 extensions: System Control Registers */ | ||
274 | #define CRT_ID_SYSTEM_CONFIG 0x40 | ||
275 | #define CRT_ID_BIOS_FLAG 0x41 | ||
276 | #define CRT_ID_LACE_CONTROL 0x42 | ||
277 | #define CRT_ID_EXT_MODE 0x43 | ||
278 | #define CRT_ID_HWGC_MODE 0x45 /* HWGC = Hardware Graphics Cursor */ | ||
279 | #define CRT_ID_HWGC_ORIGIN_X_HI 0x46 | ||
280 | #define CRT_ID_HWGC_ORIGIN_X_LO 0x47 | ||
281 | #define CRT_ID_HWGC_ORIGIN_Y_HI 0x48 | ||
282 | #define CRT_ID_HWGC_ORIGIN_Y_LO 0x49 | ||
283 | #define CRT_ID_HWGC_FG_STACK 0x4A | ||
284 | #define CRT_ID_HWGC_BG_STACK 0x4B | ||
285 | #define CRT_ID_HWGC_START_AD_HI 0x4C | ||
286 | #define CRT_ID_HWGC_START_AD_LO 0x4D | ||
287 | #define CRT_ID_HWGC_DSTART_X 0x4E | ||
288 | #define CRT_ID_HWGC_DSTART_Y 0x4F | ||
289 | /* S3 extensions: System Extension Registers */ | ||
290 | #define CRT_ID_EXT_SYS_CNTL_1 0x50 | ||
291 | #define CRT_ID_EXT_SYS_CNTL_2 0x51 | ||
292 | #define CRT_ID_EXT_BIOS_FLAG_1 0x52 | ||
293 | #define CRT_ID_EXT_MEM_CNTL_1 0x53 | ||
294 | #define CRT_ID_EXT_MEM_CNTL_2 0x54 | ||
295 | #define CRT_ID_EXT_DAC_CNTL 0x55 | ||
296 | #define CRT_ID_EX_SYNC_1 0x56 | ||
297 | #define CRT_ID_EX_SYNC_2 0x57 | ||
298 | #define CRT_ID_LAW_CNTL 0x58 /* LAW = Linear Address Window */ | ||
299 | #define CRT_ID_LAW_POS_HI 0x59 | ||
300 | #define CRT_ID_LAW_POS_LO 0x5A | ||
301 | #define CRT_ID_GOUT_PORT 0x5C | ||
302 | #define CRT_ID_EXT_HOR_OVF 0x5D | ||
303 | #define CRT_ID_EXT_VER_OVF 0x5E | ||
304 | #define CRT_ID_EXT_MEM_CNTL_3 0x60 | ||
305 | #define CRT_ID_EX_SYNC_3 0x63 | ||
306 | #define CRT_ID_EXT_MISC_CNTL 0x65 | ||
307 | #define CRT_ID_EXT_MISC_CNTL_1 0x66 | ||
308 | #define CRT_ID_EXT_MISC_CNTL_2 0x67 | ||
309 | #define CRT_ID_CONFIG_3 0x68 | ||
310 | #define CRT_ID_EXT_SYS_CNTL_3 0x69 | ||
311 | #define CRT_ID_EXT_SYS_CNTL_4 0x6A | ||
312 | #define CRT_ID_EXT_BIOS_FLAG_3 0x6B | ||
313 | #define CRT_ID_EXT_BIOS_FLAG_4 0x6C | ||
314 | |||
315 | /* Enhanced Commands Registers: */ | ||
316 | #define ECR_SUBSYSTEM_STAT 0x42E8 | ||
317 | #define ECR_SUBSYSTEM_CNTL 0x42E8 | ||
318 | #define ECR_ADV_FUNC_CNTL 0x4AE8 | ||
319 | #define ECR_CURRENT_Y_POS 0x82E8 | ||
320 | #define ECR_CURRENT_Y_POS2 0x82EA /* Trio64 only */ | ||
321 | #define ECR_CURRENT_X_POS 0x86E8 | ||
322 | #define ECR_CURRENT_X_POS2 0x86EA /* Trio64 only */ | ||
323 | #define ECR_DEST_Y__AX_STEP 0x8AE8 | ||
324 | #define ECR_DEST_Y2__AX_STEP2 0x8AEA /* Trio64 only */ | ||
325 | #define ECR_DEST_X__DIA_STEP 0x8EE8 | ||
326 | #define ECR_DEST_X2__DIA_STEP2 0x8EEA /* Trio64 only */ | ||
327 | #define ECR_ERR_TERM 0x92E8 | ||
328 | #define ECR_ERR_TERM2 0x92EA /* Trio64 only */ | ||
329 | #define ECR_MAJ_AXIS_PIX_CNT 0x96E8 | ||
330 | #define ECR_MAJ_AXIS_PIX_CNT2 0x96EA /* Trio64 only */ | ||
331 | #define ECR_GP_STAT 0x9AE8 /* GP = Graphics Processor */ | ||
332 | #define ECR_DRAW_CMD 0x9AE8 | ||
333 | #define ECR_DRAW_CMD2 0x9AEA /* Trio64 only */ | ||
334 | #define ECR_SHORT_STROKE 0x9EE8 | ||
335 | #define ECR_BKGD_COLOR 0xA2E8 /* BKGD = Background */ | ||
336 | #define ECR_FRGD_COLOR 0xA6E8 /* FRGD = Foreground */ | ||
337 | #define ECR_BITPLANE_WRITE_MASK 0xAAE8 | ||
338 | #define ECR_BITPLANE_READ_MASK 0xAEE8 | ||
339 | #define ECR_COLOR_COMPARE 0xB2E8 | ||
340 | #define ECR_BKGD_MIX 0xB6E8 | ||
341 | #define ECR_FRGD_MIX 0xBAE8 | ||
342 | #define ECR_READ_REG_DATA 0xBEE8 | ||
343 | #define ECR_ID_MIN_AXIS_PIX_CNT 0x00 | ||
344 | #define ECR_ID_SCISSORS_TOP 0x01 | ||
345 | #define ECR_ID_SCISSORS_LEFT 0x02 | ||
346 | #define ECR_ID_SCISSORS_BUTTOM 0x03 | ||
347 | #define ECR_ID_SCISSORS_RIGHT 0x04 | ||
348 | #define ECR_ID_PIX_CNTL 0x0A | ||
349 | #define ECR_ID_MULT_CNTL_MISC_2 0x0D | ||
350 | #define ECR_ID_MULT_CNTL_MISC 0x0E | ||
351 | #define ECR_ID_READ_SEL 0x0F | ||
352 | #define ECR_PIX_TRANS 0xE2E8 | ||
353 | #define ECR_PIX_TRANS_EXT 0xE2EA | ||
354 | #define ECR_PATTERN_Y 0xEAE8 /* Trio64 only */ | ||
355 | #define ECR_PATTERN_X 0xEAEA /* Trio64 only */ | ||
356 | |||
357 | |||
358 | /* Pass-through */ | ||
359 | #define PASS_ADDRESS 0x40001 | ||
360 | #define PASS_ADDRESS_W 0x40001 | ||
361 | |||
362 | /* Video DAC */ | ||
363 | #define VDAC_ADDRESS 0x03c8 | ||
364 | #define VDAC_ADDRESS_W 0x03c8 | ||
365 | #define VDAC_ADDRESS_R 0x03c7 | ||
366 | #define VDAC_STATE 0x03c7 | ||
367 | #define VDAC_DATA 0x03c9 | ||
368 | #define VDAC_MASK 0x03c6 | ||
369 | |||
370 | |||
371 | #define WGfx(ba, idx, val) \ | ||
372 | do { wb_64(ba, GCT_ADDRESS, idx); wb_64(ba, GCT_ADDRESS_W , val); } while (0) | ||
373 | |||
374 | #define WSeq(ba, idx, val) \ | ||
375 | do { wb_64(ba, SEQ_ADDRESS, idx); wb_64(ba, SEQ_ADDRESS_W , val); } while (0) | ||
376 | |||
377 | #define WCrt(ba, idx, val) \ | ||
378 | do { wb_64(ba, CRT_ADDRESS, idx); wb_64(ba, CRT_ADDRESS_W , val); } while (0) | ||
379 | |||
380 | #define WAttr(ba, idx, val) \ | ||
381 | do { \ | ||
382 | unsigned char tmp;\ | ||
383 | tmp = rb_64(ba, ACT_ADDRESS_RESET);\ | ||
384 | wb_64(ba, ACT_ADDRESS_W, idx);\ | ||
385 | wb_64(ba, ACT_ADDRESS_W, val);\ | ||
386 | } while (0) | ||
387 | |||
388 | #define SetTextPlane(ba, m) \ | ||
389 | do { \ | ||
390 | WGfx(ba, GCT_ID_READ_MAP_SELECT, m & 3 );\ | ||
391 | WSeq(ba, SEQ_ID_MAP_MASK, (1 << (m & 3)));\ | ||
392 | } while (0) | ||
393 | |||
394 | /* --------------------------------- */ | ||
395 | /* prototypes */ | ||
396 | /* --------------------------------- */ | ||
397 | |||
398 | inline unsigned char RAttr(volatile unsigned char * board, short idx); | ||
399 | inline unsigned char RSeq(volatile unsigned char * board, short idx); | ||
400 | inline unsigned char RCrt(volatile unsigned char * board, short idx); | ||
401 | inline unsigned char RGfx(volatile unsigned char * board, short idx); | ||
402 | inline void cv64_write_port(unsigned short bits, | ||
403 | volatile unsigned char *board); | ||
404 | inline void cvscreen(int toggle, volatile unsigned char *board); | ||
405 | inline void gfx_on_off(int toggle, volatile unsigned char *board); | ||
406 | #if 0 | ||
407 | unsigned short cv64_compute_clock(unsigned long freq); | ||
408 | int cv_has_4mb(volatile unsigned char * fb); | ||
409 | void cv64_board_init(void); | ||
410 | void cv64_load_video_mode(struct fb_var_screeninfo *video_mode); | ||
411 | #endif | ||
412 | |||
413 | void cvision_bitblt(u_short sx, u_short sy, u_short dx, u_short dy, u_short w, | ||
414 | u_short h); | ||
415 | void cvision_clear(u_short dx, u_short dy, u_short w, u_short h, u_short bg); | ||
diff --git a/drivers/video/fbsysfs.c b/drivers/video/fbsysfs.c index 323bdf6fc7d5..818fb09105f9 100644 --- a/drivers/video/fbsysfs.c +++ b/drivers/video/fbsysfs.c | |||
@@ -175,7 +175,7 @@ static ssize_t store_modes(struct device *device, | |||
175 | 175 | ||
176 | acquire_console_sem(); | 176 | acquire_console_sem(); |
177 | list_splice(&fb_info->modelist, &old_list); | 177 | list_splice(&fb_info->modelist, &old_list); |
178 | fb_videomode_to_modelist((struct fb_videomode *)buf, i, | 178 | fb_videomode_to_modelist((const struct fb_videomode *)buf, i, |
179 | &fb_info->modelist); | 179 | &fb_info->modelist); |
180 | if (fb_new_modelist(fb_info)) { | 180 | if (fb_new_modelist(fb_info)) { |
181 | fb_destroy_modelist(&fb_info->modelist); | 181 | fb_destroy_modelist(&fb_info->modelist); |
diff --git a/drivers/video/geode/gx1fb_core.c b/drivers/video/geode/gx1fb_core.c index bcf9cea54d8b..bb20a2289760 100644 --- a/drivers/video/geode/gx1fb_core.c +++ b/drivers/video/geode/gx1fb_core.c | |||
@@ -401,6 +401,30 @@ static void gx1fb_remove(struct pci_dev *pdev) | |||
401 | framebuffer_release(info); | 401 | framebuffer_release(info); |
402 | } | 402 | } |
403 | 403 | ||
404 | #ifndef MODULE | ||
405 | static void __init gx1fb_setup(char *options) | ||
406 | { | ||
407 | char *this_opt; | ||
408 | |||
409 | if (!options || !*options) | ||
410 | return; | ||
411 | |||
412 | while ((this_opt = strsep(&options, ","))) { | ||
413 | if (!*this_opt) | ||
414 | continue; | ||
415 | |||
416 | if (!strncmp(this_opt, "mode:", 5)) | ||
417 | strlcpy(mode_option, this_opt + 5, sizeof(mode_option)); | ||
418 | else if (!strncmp(this_opt, "crt:", 4)) | ||
419 | crt_option = !!simple_strtoul(this_opt + 4, NULL, 0); | ||
420 | else if (!strncmp(this_opt, "panel:", 6)) | ||
421 | strlcpy(panel_option, this_opt + 6, sizeof(panel_option)); | ||
422 | else | ||
423 | strlcpy(mode_option, this_opt, sizeof(mode_option)); | ||
424 | } | ||
425 | } | ||
426 | #endif | ||
427 | |||
404 | static struct pci_device_id gx1fb_id_table[] = { | 428 | static struct pci_device_id gx1fb_id_table[] = { |
405 | { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_VIDEO, | 429 | { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5530_VIDEO, |
406 | PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16, | 430 | PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16, |
@@ -420,8 +444,11 @@ static struct pci_driver gx1fb_driver = { | |||
420 | static int __init gx1fb_init(void) | 444 | static int __init gx1fb_init(void) |
421 | { | 445 | { |
422 | #ifndef MODULE | 446 | #ifndef MODULE |
423 | if (fb_get_options("gx1fb", NULL)) | 447 | char *option = NULL; |
448 | |||
449 | if (fb_get_options("gx1fb", &option)) | ||
424 | return -ENODEV; | 450 | return -ENODEV; |
451 | gx1fb_setup(option); | ||
425 | #endif | 452 | #endif |
426 | return pci_register_driver(&gx1fb_driver); | 453 | return pci_register_driver(&gx1fb_driver); |
427 | } | 454 | } |
diff --git a/drivers/video/i810/i810.h b/drivers/video/i810/i810.h index 579195c2bea3..aa65ffce915b 100644 --- a/drivers/video/i810/i810.h +++ b/drivers/video/i810/i810.h | |||
@@ -264,7 +264,8 @@ struct i810fb_par { | |||
264 | struct heap_data cursor_heap; | 264 | struct heap_data cursor_heap; |
265 | struct vgastate state; | 265 | struct vgastate state; |
266 | struct i810fb_i2c_chan chan[3]; | 266 | struct i810fb_i2c_chan chan[3]; |
267 | atomic_t use_count; | 267 | struct mutex open_lock; |
268 | unsigned int use_count; | ||
268 | u32 pseudo_palette[17]; | 269 | u32 pseudo_palette[17]; |
269 | unsigned long mmio_start_phys; | 270 | unsigned long mmio_start_phys; |
270 | u8 __iomem *mmio_start_virtual; | 271 | u8 __iomem *mmio_start_virtual; |
diff --git a/drivers/video/i810/i810_main.c b/drivers/video/i810/i810_main.c index b55a12d95eb2..ab1b8fe34d6d 100644 --- a/drivers/video/i810/i810_main.c +++ b/drivers/video/i810/i810_main.c | |||
@@ -1049,7 +1049,7 @@ static int i810_check_params(struct fb_var_screeninfo *var, | |||
1049 | mode_valid = 1; | 1049 | mode_valid = 1; |
1050 | 1050 | ||
1051 | if (!mode_valid && info->monspecs.modedb_len) { | 1051 | if (!mode_valid && info->monspecs.modedb_len) { |
1052 | struct fb_videomode *mode; | 1052 | const struct fb_videomode *mode; |
1053 | 1053 | ||
1054 | mode = fb_find_best_mode(var, &info->modelist); | 1054 | mode = fb_find_best_mode(var, &info->modelist); |
1055 | if (mode) { | 1055 | if (mode) { |
@@ -1235,9 +1235,9 @@ static int i810fb_getcolreg(u8 regno, u8 *red, u8 *green, u8 *blue, | |||
1235 | static int i810fb_open(struct fb_info *info, int user) | 1235 | static int i810fb_open(struct fb_info *info, int user) |
1236 | { | 1236 | { |
1237 | struct i810fb_par *par = info->par; | 1237 | struct i810fb_par *par = info->par; |
1238 | u32 count = atomic_read(&par->use_count); | 1238 | |
1239 | 1239 | mutex_lock(&par->open_lock); | |
1240 | if (count == 0) { | 1240 | if (par->use_count == 0) { |
1241 | memset(&par->state, 0, sizeof(struct vgastate)); | 1241 | memset(&par->state, 0, sizeof(struct vgastate)); |
1242 | par->state.flags = VGA_SAVE_CMAP; | 1242 | par->state.flags = VGA_SAVE_CMAP; |
1243 | par->state.vgabase = par->mmio_start_virtual; | 1243 | par->state.vgabase = par->mmio_start_virtual; |
@@ -1246,7 +1246,8 @@ static int i810fb_open(struct fb_info *info, int user) | |||
1246 | i810_save_vga_state(par); | 1246 | i810_save_vga_state(par); |
1247 | } | 1247 | } |
1248 | 1248 | ||
1249 | atomic_inc(&par->use_count); | 1249 | par->use_count++; |
1250 | mutex_unlock(&par->open_lock); | ||
1250 | 1251 | ||
1251 | return 0; | 1252 | return 0; |
1252 | } | 1253 | } |
@@ -1254,18 +1255,20 @@ static int i810fb_open(struct fb_info *info, int user) | |||
1254 | static int i810fb_release(struct fb_info *info, int user) | 1255 | static int i810fb_release(struct fb_info *info, int user) |
1255 | { | 1256 | { |
1256 | struct i810fb_par *par = info->par; | 1257 | struct i810fb_par *par = info->par; |
1257 | u32 count; | 1258 | |
1258 | 1259 | mutex_lock(&par->open_lock); | |
1259 | count = atomic_read(&par->use_count); | 1260 | if (par->use_count == 0) { |
1260 | if (count == 0) | 1261 | mutex_unlock(&par->open_lock); |
1261 | return -EINVAL; | 1262 | return -EINVAL; |
1263 | } | ||
1262 | 1264 | ||
1263 | if (count == 1) { | 1265 | if (par->use_count == 1) { |
1264 | i810_restore_vga_state(par); | 1266 | i810_restore_vga_state(par); |
1265 | restore_vga(&par->state); | 1267 | restore_vga(&par->state); |
1266 | } | 1268 | } |
1267 | 1269 | ||
1268 | atomic_dec(&par->use_count); | 1270 | par->use_count--; |
1271 | mutex_unlock(&par->open_lock); | ||
1269 | 1272 | ||
1270 | return 0; | 1273 | return 0; |
1271 | } | 1274 | } |
@@ -1752,6 +1755,8 @@ static void __devinit i810_init_monspecs(struct fb_info *info) | |||
1752 | static void __devinit i810_init_defaults(struct i810fb_par *par, | 1755 | static void __devinit i810_init_defaults(struct i810fb_par *par, |
1753 | struct fb_info *info) | 1756 | struct fb_info *info) |
1754 | { | 1757 | { |
1758 | mutex_init(&par->open_lock); | ||
1759 | |||
1755 | if (voffset) | 1760 | if (voffset) |
1756 | v_offset_default = voffset; | 1761 | v_offset_default = voffset; |
1757 | else if (par->aperture.size > 32 * 1024 * 1024) | 1762 | else if (par->aperture.size > 32 * 1024 * 1024) |
@@ -1919,7 +1924,7 @@ static void __devinit i810fb_find_init_mode(struct fb_info *info) | |||
1919 | fb_videomode_to_modelist(specs->modedb, specs->modedb_len, | 1924 | fb_videomode_to_modelist(specs->modedb, specs->modedb_len, |
1920 | &info->modelist); | 1925 | &info->modelist); |
1921 | if (specs->modedb != NULL) { | 1926 | if (specs->modedb != NULL) { |
1922 | struct fb_videomode *m; | 1927 | const struct fb_videomode *m; |
1923 | 1928 | ||
1924 | if (xres && yres) { | 1929 | if (xres && yres) { |
1925 | if ((m = fb_find_best_mode(&var, &info->modelist))) { | 1930 | if ((m = fb_find_best_mode(&var, &info->modelist))) { |
@@ -2016,11 +2021,10 @@ static int __devinit i810fb_init_pci (struct pci_dev *dev, | |||
2016 | par = info->par; | 2021 | par = info->par; |
2017 | par->dev = dev; | 2022 | par->dev = dev; |
2018 | 2023 | ||
2019 | if (!(info->pixmap.addr = kmalloc(8*1024, GFP_KERNEL))) { | 2024 | if (!(info->pixmap.addr = kzalloc(8*1024, GFP_KERNEL))) { |
2020 | i810fb_release_resource(info, par); | 2025 | i810fb_release_resource(info, par); |
2021 | return -ENOMEM; | 2026 | return -ENOMEM; |
2022 | } | 2027 | } |
2023 | memset(info->pixmap.addr, 0, 8*1024); | ||
2024 | info->pixmap.size = 8*1024; | 2028 | info->pixmap.size = 8*1024; |
2025 | info->pixmap.buf_align = 8; | 2029 | info->pixmap.buf_align = 8; |
2026 | info->pixmap.access_align = 32; | 2030 | info->pixmap.access_align = 32; |
diff --git a/drivers/video/igafb.c b/drivers/video/igafb.c index 655ae0fa99ca..90592fb59156 100644 --- a/drivers/video/igafb.c +++ b/drivers/video/igafb.c | |||
@@ -370,7 +370,6 @@ static int __init iga_init(struct fb_info *info, struct iga_par *par) | |||
370 | 370 | ||
371 | int __init igafb_init(void) | 371 | int __init igafb_init(void) |
372 | { | 372 | { |
373 | extern int con_is_present(void); | ||
374 | struct fb_info *info; | 373 | struct fb_info *info; |
375 | struct pci_dev *pdev; | 374 | struct pci_dev *pdev; |
376 | struct iga_par *par; | 375 | struct iga_par *par; |
@@ -402,12 +401,11 @@ int __init igafb_init(void) | |||
402 | 401 | ||
403 | size = sizeof(struct fb_info) + sizeof(struct iga_par) + sizeof(u32)*16; | 402 | size = sizeof(struct fb_info) + sizeof(struct iga_par) + sizeof(u32)*16; |
404 | 403 | ||
405 | info = kmalloc(size, GFP_ATOMIC); | 404 | info = kzalloc(size, GFP_ATOMIC); |
406 | if (!info) { | 405 | if (!info) { |
407 | printk("igafb_init: can't alloc fb_info\n"); | 406 | printk("igafb_init: can't alloc fb_info\n"); |
408 | return -ENOMEM; | 407 | return -ENOMEM; |
409 | } | 408 | } |
410 | memset(info, 0, size); | ||
411 | 409 | ||
412 | par = (struct iga_par *) (info + 1); | 410 | par = (struct iga_par *) (info + 1); |
413 | 411 | ||
@@ -466,7 +464,7 @@ int __init igafb_init(void) | |||
466 | * one additional region with size == 0. | 464 | * one additional region with size == 0. |
467 | */ | 465 | */ |
468 | 466 | ||
469 | par->mmap_map = kmalloc(4 * sizeof(*par->mmap_map), GFP_ATOMIC); | 467 | par->mmap_map = kzalloc(4 * sizeof(*par->mmap_map), GFP_ATOMIC); |
470 | if (!par->mmap_map) { | 468 | if (!par->mmap_map) { |
471 | printk("igafb_init: can't alloc mmap_map\n"); | 469 | printk("igafb_init: can't alloc mmap_map\n"); |
472 | iounmap((void *)par->io_base); | 470 | iounmap((void *)par->io_base); |
@@ -475,8 +473,6 @@ int __init igafb_init(void) | |||
475 | return -ENOMEM; | 473 | return -ENOMEM; |
476 | } | 474 | } |
477 | 475 | ||
478 | memset(par->mmap_map, 0, 4 * sizeof(*par->mmap_map)); | ||
479 | |||
480 | /* | 476 | /* |
481 | * Set default vmode and cmode from PROM properties. | 477 | * Set default vmode and cmode from PROM properties. |
482 | */ | 478 | */ |
diff --git a/drivers/video/intelfb/intelfbdrv.c b/drivers/video/intelfb/intelfbdrv.c index 664fc5cf962a..b75eda84858f 100644 --- a/drivers/video/intelfb/intelfbdrv.c +++ b/drivers/video/intelfb/intelfbdrv.c | |||
@@ -540,12 +540,11 @@ intelfb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
540 | dinfo->pdev = pdev; | 540 | dinfo->pdev = pdev; |
541 | 541 | ||
542 | /* Reserve pixmap space. */ | 542 | /* Reserve pixmap space. */ |
543 | info->pixmap.addr = kmalloc(64 * 1024, GFP_KERNEL); | 543 | info->pixmap.addr = kzalloc(64 * 1024, GFP_KERNEL); |
544 | if (info->pixmap.addr == NULL) { | 544 | if (info->pixmap.addr == NULL) { |
545 | ERR_MSG("Cannot reserve pixmap memory.\n"); | 545 | ERR_MSG("Cannot reserve pixmap memory.\n"); |
546 | goto err_out_pixmap; | 546 | goto err_out_pixmap; |
547 | } | 547 | } |
548 | memset(info->pixmap.addr, 0, 64 * 1024); | ||
549 | 548 | ||
550 | /* set early this option because it could be changed by tv encoder | 549 | /* set early this option because it could be changed by tv encoder |
551 | driver */ | 550 | driver */ |
diff --git a/drivers/video/matrox/i2c-matroxfb.c b/drivers/video/matrox/i2c-matroxfb.c index fe28848e7b52..f64c4a0984cd 100644 --- a/drivers/video/matrox/i2c-matroxfb.c +++ b/drivers/video/matrox/i2c-matroxfb.c | |||
@@ -146,7 +146,7 @@ static void* i2c_matroxfb_probe(struct matrox_fb_info* minfo) { | |||
146 | unsigned long flags; | 146 | unsigned long flags; |
147 | struct matroxfb_dh_maven_info* m2info; | 147 | struct matroxfb_dh_maven_info* m2info; |
148 | 148 | ||
149 | m2info = kmalloc(sizeof(*m2info), GFP_KERNEL); | 149 | m2info = kzalloc(sizeof(*m2info), GFP_KERNEL); |
150 | if (!m2info) | 150 | if (!m2info) |
151 | return NULL; | 151 | return NULL; |
152 | 152 | ||
@@ -155,8 +155,6 @@ static void* i2c_matroxfb_probe(struct matrox_fb_info* minfo) { | |||
155 | matroxfb_DAC_out(PMINFO DAC_XGENIOCTRL, 0x00); | 155 | matroxfb_DAC_out(PMINFO DAC_XGENIOCTRL, 0x00); |
156 | matroxfb_DAC_unlock_irqrestore(flags); | 156 | matroxfb_DAC_unlock_irqrestore(flags); |
157 | 157 | ||
158 | memset(m2info, 0, sizeof(*m2info)); | ||
159 | |||
160 | switch (ACCESS_FBINFO(chip)) { | 158 | switch (ACCESS_FBINFO(chip)) { |
161 | case MGA_2064: | 159 | case MGA_2064: |
162 | case MGA_2164: | 160 | case MGA_2164: |
diff --git a/drivers/video/matrox/matroxfb_crtc2.c b/drivers/video/matrox/matroxfb_crtc2.c index 2c9801090fae..03ae55b168ff 100644 --- a/drivers/video/matrox/matroxfb_crtc2.c +++ b/drivers/video/matrox/matroxfb_crtc2.c | |||
@@ -694,12 +694,11 @@ static void* matroxfb_crtc2_probe(struct matrox_fb_info* minfo) { | |||
694 | /* hardware is CRTC2 incapable... */ | 694 | /* hardware is CRTC2 incapable... */ |
695 | if (!ACCESS_FBINFO(devflags.crtc2)) | 695 | if (!ACCESS_FBINFO(devflags.crtc2)) |
696 | return NULL; | 696 | return NULL; |
697 | m2info = kmalloc(sizeof(*m2info), GFP_KERNEL); | 697 | m2info = kzalloc(sizeof(*m2info), GFP_KERNEL); |
698 | if (!m2info) { | 698 | if (!m2info) { |
699 | printk(KERN_ERR "matroxfb_crtc2: Not enough memory for CRTC2 control structs\n"); | 699 | printk(KERN_ERR "matroxfb_crtc2: Not enough memory for CRTC2 control structs\n"); |
700 | return NULL; | 700 | return NULL; |
701 | } | 701 | } |
702 | memset(m2info, 0, sizeof(*m2info)); | ||
703 | m2info->primary_dev = MINFO; | 702 | m2info->primary_dev = MINFO; |
704 | if (matroxfb_dh_registerfb(m2info)) { | 703 | if (matroxfb_dh_registerfb(m2info)) { |
705 | kfree(m2info); | 704 | kfree(m2info); |
diff --git a/drivers/video/mbx/mbxdebugfs.c b/drivers/video/mbx/mbxdebugfs.c index 472a3ca3d92d..15b8b3c4330e 100644 --- a/drivers/video/mbx/mbxdebugfs.c +++ b/drivers/video/mbx/mbxdebugfs.c | |||
@@ -170,37 +170,37 @@ static ssize_t misc_read_file(struct file *file, char __user *userbuf, | |||
170 | } | 170 | } |
171 | 171 | ||
172 | 172 | ||
173 | static struct file_operations sysconf_fops = { | 173 | static const struct file_operations sysconf_fops = { |
174 | .read = sysconf_read_file, | 174 | .read = sysconf_read_file, |
175 | .write = write_file_dummy, | 175 | .write = write_file_dummy, |
176 | .open = open_file_generic, | 176 | .open = open_file_generic, |
177 | }; | 177 | }; |
178 | 178 | ||
179 | static struct file_operations clock_fops = { | 179 | static const struct file_operations clock_fops = { |
180 | .read = clock_read_file, | 180 | .read = clock_read_file, |
181 | .write = write_file_dummy, | 181 | .write = write_file_dummy, |
182 | .open = open_file_generic, | 182 | .open = open_file_generic, |
183 | }; | 183 | }; |
184 | 184 | ||
185 | static struct file_operations display_fops = { | 185 | static const struct file_operations display_fops = { |
186 | .read = display_read_file, | 186 | .read = display_read_file, |
187 | .write = write_file_dummy, | 187 | .write = write_file_dummy, |
188 | .open = open_file_generic, | 188 | .open = open_file_generic, |
189 | }; | 189 | }; |
190 | 190 | ||
191 | static struct file_operations gsctl_fops = { | 191 | static const struct file_operations gsctl_fops = { |
192 | .read = gsctl_read_file, | 192 | .read = gsctl_read_file, |
193 | .write = write_file_dummy, | 193 | .write = write_file_dummy, |
194 | .open = open_file_generic, | 194 | .open = open_file_generic, |
195 | }; | 195 | }; |
196 | 196 | ||
197 | static struct file_operations sdram_fops = { | 197 | static const struct file_operations sdram_fops = { |
198 | .read = sdram_read_file, | 198 | .read = sdram_read_file, |
199 | .write = write_file_dummy, | 199 | .write = write_file_dummy, |
200 | .open = open_file_generic, | 200 | .open = open_file_generic, |
201 | }; | 201 | }; |
202 | 202 | ||
203 | static struct file_operations misc_fops = { | 203 | static const struct file_operations misc_fops = { |
204 | .read = misc_read_file, | 204 | .read = misc_read_file, |
205 | .write = write_file_dummy, | 205 | .write = write_file_dummy, |
206 | .open = open_file_generic, | 206 | .open = open_file_generic, |
diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c index 5df41f6f2b86..5162eab95539 100644 --- a/drivers/video/modedb.c +++ b/drivers/video/modedb.c | |||
@@ -610,10 +610,8 @@ done: | |||
610 | diff = refresh; | 610 | diff = refresh; |
611 | best = -1; | 611 | best = -1; |
612 | for (i = 0; i < dbsize; i++) { | 612 | for (i = 0; i < dbsize; i++) { |
613 | if ((name_matches(db[i], name, namelen) && | 613 | if (name_matches(db[i], name, namelen) || |
614 | !fb_try_mode(var, info, &db[i], bpp))) | 614 | (res_specified && res_matches(db[i], xres, yres))) { |
615 | return 1; | ||
616 | if (res_specified && res_matches(db[i], xres, yres)) { | ||
617 | if(!fb_try_mode(var, info, &db[i], bpp)) { | 615 | if(!fb_try_mode(var, info, &db[i], bpp)) { |
618 | if(!refresh_specified || db[i].refresh == refresh) | 616 | if(!refresh_specified || db[i].refresh == refresh) |
619 | return 1; | 617 | return 1; |
@@ -670,7 +668,7 @@ done: | |||
670 | * @var: pointer to struct fb_var_screeninfo | 668 | * @var: pointer to struct fb_var_screeninfo |
671 | */ | 669 | */ |
672 | void fb_var_to_videomode(struct fb_videomode *mode, | 670 | void fb_var_to_videomode(struct fb_videomode *mode, |
673 | struct fb_var_screeninfo *var) | 671 | const struct fb_var_screeninfo *var) |
674 | { | 672 | { |
675 | u32 pixclock, hfreq, htotal, vtotal; | 673 | u32 pixclock, hfreq, htotal, vtotal; |
676 | 674 | ||
@@ -714,17 +712,21 @@ void fb_var_to_videomode(struct fb_videomode *mode, | |||
714 | * @mode: pointer to struct fb_videomode | 712 | * @mode: pointer to struct fb_videomode |
715 | */ | 713 | */ |
716 | void fb_videomode_to_var(struct fb_var_screeninfo *var, | 714 | void fb_videomode_to_var(struct fb_var_screeninfo *var, |
717 | struct fb_videomode *mode) | 715 | const struct fb_videomode *mode) |
718 | { | 716 | { |
719 | var->xres = mode->xres; | 717 | var->xres = mode->xres; |
720 | var->yres = mode->yres; | 718 | var->yres = mode->yres; |
719 | var->xres_virtual = mode->xres; | ||
720 | var->yres_virtual = mode->yres; | ||
721 | var->xoffset = 0; | ||
722 | var->yoffset = 0; | ||
721 | var->pixclock = mode->pixclock; | 723 | var->pixclock = mode->pixclock; |
722 | var->left_margin = mode->left_margin; | 724 | var->left_margin = mode->left_margin; |
723 | var->hsync_len = mode->hsync_len; | ||
724 | var->vsync_len = mode->vsync_len; | ||
725 | var->right_margin = mode->right_margin; | 725 | var->right_margin = mode->right_margin; |
726 | var->upper_margin = mode->upper_margin; | 726 | var->upper_margin = mode->upper_margin; |
727 | var->lower_margin = mode->lower_margin; | 727 | var->lower_margin = mode->lower_margin; |
728 | var->hsync_len = mode->hsync_len; | ||
729 | var->vsync_len = mode->vsync_len; | ||
728 | var->sync = mode->sync; | 730 | var->sync = mode->sync; |
729 | var->vmode = mode->vmode & FB_VMODE_MASK; | 731 | var->vmode = mode->vmode & FB_VMODE_MASK; |
730 | } | 732 | } |
@@ -737,8 +739,8 @@ void fb_videomode_to_var(struct fb_var_screeninfo *var, | |||
737 | * RETURNS: | 739 | * RETURNS: |
738 | * 1 if equal, 0 if not | 740 | * 1 if equal, 0 if not |
739 | */ | 741 | */ |
740 | int fb_mode_is_equal(struct fb_videomode *mode1, | 742 | int fb_mode_is_equal(const struct fb_videomode *mode1, |
741 | struct fb_videomode *mode2) | 743 | const struct fb_videomode *mode2) |
742 | { | 744 | { |
743 | return (mode1->xres == mode2->xres && | 745 | return (mode1->xres == mode2->xres && |
744 | mode1->yres == mode2->yres && | 746 | mode1->yres == mode2->yres && |
@@ -770,8 +772,8 @@ int fb_mode_is_equal(struct fb_videomode *mode1, | |||
770 | * var->xres and var->yres. If more than 1 videomode is found, will return | 772 | * var->xres and var->yres. If more than 1 videomode is found, will return |
771 | * the videomode with the highest refresh rate | 773 | * the videomode with the highest refresh rate |
772 | */ | 774 | */ |
773 | struct fb_videomode *fb_find_best_mode(struct fb_var_screeninfo *var, | 775 | const struct fb_videomode *fb_find_best_mode(const struct fb_var_screeninfo *var, |
774 | struct list_head *head) | 776 | struct list_head *head) |
775 | { | 777 | { |
776 | struct list_head *pos; | 778 | struct list_head *pos; |
777 | struct fb_modelist *modelist; | 779 | struct fb_modelist *modelist; |
@@ -808,8 +810,8 @@ struct fb_videomode *fb_find_best_mode(struct fb_var_screeninfo *var, | |||
808 | * If more than 1 videomode is found, will return the videomode with | 810 | * If more than 1 videomode is found, will return the videomode with |
809 | * the closest refresh rate. | 811 | * the closest refresh rate. |
810 | */ | 812 | */ |
811 | struct fb_videomode *fb_find_nearest_mode(struct fb_videomode *mode, | 813 | const struct fb_videomode *fb_find_nearest_mode(const struct fb_videomode *mode, |
812 | struct list_head *head) | 814 | struct list_head *head) |
813 | { | 815 | { |
814 | struct list_head *pos; | 816 | struct list_head *pos; |
815 | struct fb_modelist *modelist; | 817 | struct fb_modelist *modelist; |
@@ -847,8 +849,8 @@ struct fb_videomode *fb_find_nearest_mode(struct fb_videomode *mode, | |||
847 | * RETURNS: | 849 | * RETURNS: |
848 | * struct fb_videomode, NULL if none found | 850 | * struct fb_videomode, NULL if none found |
849 | */ | 851 | */ |
850 | struct fb_videomode *fb_match_mode(struct fb_var_screeninfo *var, | 852 | const struct fb_videomode *fb_match_mode(const struct fb_var_screeninfo *var, |
851 | struct list_head *head) | 853 | struct list_head *head) |
852 | { | 854 | { |
853 | struct list_head *pos; | 855 | struct list_head *pos; |
854 | struct fb_modelist *modelist; | 856 | struct fb_modelist *modelist; |
@@ -872,7 +874,7 @@ struct fb_videomode *fb_match_mode(struct fb_var_screeninfo *var, | |||
872 | * NOTES: | 874 | * NOTES: |
873 | * Will only add unmatched mode entries | 875 | * Will only add unmatched mode entries |
874 | */ | 876 | */ |
875 | int fb_add_videomode(struct fb_videomode *mode, struct list_head *head) | 877 | int fb_add_videomode(const struct fb_videomode *mode, struct list_head *head) |
876 | { | 878 | { |
877 | struct list_head *pos; | 879 | struct list_head *pos; |
878 | struct fb_modelist *modelist; | 880 | struct fb_modelist *modelist; |
@@ -907,7 +909,8 @@ int fb_add_videomode(struct fb_videomode *mode, struct list_head *head) | |||
907 | * NOTES: | 909 | * NOTES: |
908 | * Will remove all matching mode entries | 910 | * Will remove all matching mode entries |
909 | */ | 911 | */ |
910 | void fb_delete_videomode(struct fb_videomode *mode, struct list_head *head) | 912 | void fb_delete_videomode(const struct fb_videomode *mode, |
913 | struct list_head *head) | ||
911 | { | 914 | { |
912 | struct list_head *pos, *n; | 915 | struct list_head *pos, *n; |
913 | struct fb_modelist *modelist; | 916 | struct fb_modelist *modelist; |
@@ -943,7 +946,7 @@ void fb_destroy_modelist(struct list_head *head) | |||
943 | * @num: number of entries in array | 946 | * @num: number of entries in array |
944 | * @head: struct list_head of modelist | 947 | * @head: struct list_head of modelist |
945 | */ | 948 | */ |
946 | void fb_videomode_to_modelist(struct fb_videomode *modedb, int num, | 949 | void fb_videomode_to_modelist(const struct fb_videomode *modedb, int num, |
947 | struct list_head *head) | 950 | struct list_head *head) |
948 | { | 951 | { |
949 | int i; | 952 | int i; |
@@ -956,12 +959,12 @@ void fb_videomode_to_modelist(struct fb_videomode *modedb, int num, | |||
956 | } | 959 | } |
957 | } | 960 | } |
958 | 961 | ||
959 | struct fb_videomode *fb_find_best_display(struct fb_monspecs *specs, | 962 | const struct fb_videomode *fb_find_best_display(const struct fb_monspecs *specs, |
960 | struct list_head *head) | 963 | struct list_head *head) |
961 | { | 964 | { |
962 | struct list_head *pos; | 965 | struct list_head *pos; |
963 | struct fb_modelist *modelist; | 966 | struct fb_modelist *modelist; |
964 | struct fb_videomode *m, *m1 = NULL, *md = NULL, *best = NULL; | 967 | const struct fb_videomode *m, *m1 = NULL, *md = NULL, *best = NULL; |
965 | int first = 0; | 968 | int first = 0; |
966 | 969 | ||
967 | if (!head->prev || !head->next || list_empty(head)) | 970 | if (!head->prev || !head->next || list_empty(head)) |
diff --git a/drivers/video/neofb.c b/drivers/video/neofb.c index deaf820cb38f..395ccedde9a6 100644 --- a/drivers/video/neofb.c +++ b/drivers/video/neofb.c | |||
@@ -66,7 +66,6 @@ | |||
66 | #include <linux/init.h> | 66 | #include <linux/init.h> |
67 | #ifdef CONFIG_TOSHIBA | 67 | #ifdef CONFIG_TOSHIBA |
68 | #include <linux/toshiba.h> | 68 | #include <linux/toshiba.h> |
69 | extern int tosh_smm(SMMRegisters *regs); | ||
70 | #endif | 69 | #endif |
71 | 70 | ||
72 | #include <asm/io.h> | 71 | #include <asm/io.h> |
@@ -557,14 +556,16 @@ static int | |||
557 | neofb_open(struct fb_info *info, int user) | 556 | neofb_open(struct fb_info *info, int user) |
558 | { | 557 | { |
559 | struct neofb_par *par = info->par; | 558 | struct neofb_par *par = info->par; |
560 | int cnt = atomic_read(&par->ref_count); | ||
561 | 559 | ||
562 | if (!cnt) { | 560 | mutex_lock(&par->open_lock); |
561 | if (!par->ref_count) { | ||
563 | memset(&par->state, 0, sizeof(struct vgastate)); | 562 | memset(&par->state, 0, sizeof(struct vgastate)); |
564 | par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS; | 563 | par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS; |
565 | save_vga(&par->state); | 564 | save_vga(&par->state); |
566 | } | 565 | } |
567 | atomic_inc(&par->ref_count); | 566 | par->ref_count++; |
567 | mutex_unlock(&par->open_lock); | ||
568 | |||
568 | return 0; | 569 | return 0; |
569 | } | 570 | } |
570 | 571 | ||
@@ -572,14 +573,18 @@ static int | |||
572 | neofb_release(struct fb_info *info, int user) | 573 | neofb_release(struct fb_info *info, int user) |
573 | { | 574 | { |
574 | struct neofb_par *par = info->par; | 575 | struct neofb_par *par = info->par; |
575 | int cnt = atomic_read(&par->ref_count); | ||
576 | 576 | ||
577 | if (!cnt) | 577 | mutex_lock(&par->open_lock); |
578 | if (!par->ref_count) { | ||
579 | mutex_unlock(&par->open_lock); | ||
578 | return -EINVAL; | 580 | return -EINVAL; |
579 | if (cnt == 1) { | 581 | } |
582 | if (par->ref_count == 1) { | ||
580 | restore_vga(&par->state); | 583 | restore_vga(&par->state); |
581 | } | 584 | } |
582 | atomic_dec(&par->ref_count); | 585 | par->ref_count--; |
586 | mutex_unlock(&par->open_lock); | ||
587 | |||
583 | return 0; | 588 | return 0; |
584 | } | 589 | } |
585 | 590 | ||
@@ -2048,6 +2053,7 @@ static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const st | |||
2048 | 2053 | ||
2049 | info->fix.accel = id->driver_data; | 2054 | info->fix.accel = id->driver_data; |
2050 | 2055 | ||
2056 | mutex_init(&par->open_lock); | ||
2051 | par->pci_burst = !nopciburst; | 2057 | par->pci_burst = !nopciburst; |
2052 | par->lcd_stretch = !nostretch; | 2058 | par->lcd_stretch = !nostretch; |
2053 | par->libretto = libretto; | 2059 | par->libretto = libretto; |
diff --git a/drivers/video/nvidia/nvidia.c b/drivers/video/nvidia/nvidia.c index 538e947610e1..8e5b484db649 100644 --- a/drivers/video/nvidia/nvidia.c +++ b/drivers/video/nvidia/nvidia.c | |||
@@ -829,7 +829,7 @@ static int nvidiafb_check_var(struct fb_var_screeninfo *var, | |||
829 | } | 829 | } |
830 | 830 | ||
831 | if (!mode_valid) { | 831 | if (!mode_valid) { |
832 | struct fb_videomode *mode; | 832 | const struct fb_videomode *mode; |
833 | 833 | ||
834 | mode = fb_find_best_mode(var, &info->modelist); | 834 | mode = fb_find_best_mode(var, &info->modelist); |
835 | if (mode) { | 835 | if (mode) { |
@@ -1046,10 +1046,10 @@ static int __devinit nvidia_set_fbinfo(struct fb_info *info) | |||
1046 | } | 1046 | } |
1047 | 1047 | ||
1048 | if (specs->modedb != NULL) { | 1048 | if (specs->modedb != NULL) { |
1049 | struct fb_videomode *modedb; | 1049 | const struct fb_videomode *mode; |
1050 | 1050 | ||
1051 | modedb = fb_find_best_display(specs, &info->modelist); | 1051 | mode = fb_find_best_display(specs, &info->modelist); |
1052 | fb_videomode_to_var(&nvidiafb_default_var, modedb); | 1052 | fb_videomode_to_var(&nvidiafb_default_var, mode); |
1053 | nvidiafb_default_var.bits_per_pixel = bpp; | 1053 | nvidiafb_default_var.bits_per_pixel = bpp; |
1054 | } else if (par->fpWidth && par->fpHeight) { | 1054 | } else if (par->fpWidth && par->fpHeight) { |
1055 | char buf[16]; | 1055 | char buf[16]; |
@@ -1205,13 +1205,11 @@ static int __devinit nvidiafb_probe(struct pci_dev *pd, | |||
1205 | par = info->par; | 1205 | par = info->par; |
1206 | par->pci_dev = pd; | 1206 | par->pci_dev = pd; |
1207 | 1207 | ||
1208 | info->pixmap.addr = kmalloc(8 * 1024, GFP_KERNEL); | 1208 | info->pixmap.addr = kzalloc(8 * 1024, GFP_KERNEL); |
1209 | 1209 | ||
1210 | if (info->pixmap.addr == NULL) | 1210 | if (info->pixmap.addr == NULL) |
1211 | goto err_out_kfree; | 1211 | goto err_out_kfree; |
1212 | 1212 | ||
1213 | memset(info->pixmap.addr, 0, 8 * 1024); | ||
1214 | |||
1215 | if (pci_enable_device(pd)) { | 1213 | if (pci_enable_device(pd)) { |
1216 | printk(KERN_ERR PFX "cannot enable PCI device\n"); | 1214 | printk(KERN_ERR PFX "cannot enable PCI device\n"); |
1217 | goto err_out_enable; | 1215 | goto err_out_enable; |
@@ -1347,7 +1345,7 @@ err_out: | |||
1347 | return -ENODEV; | 1345 | return -ENODEV; |
1348 | } | 1346 | } |
1349 | 1347 | ||
1350 | static void __exit nvidiafb_remove(struct pci_dev *pd) | 1348 | static void __devexit nvidiafb_remove(struct pci_dev *pd) |
1351 | { | 1349 | { |
1352 | struct fb_info *info = pci_get_drvdata(pd); | 1350 | struct fb_info *info = pci_get_drvdata(pd); |
1353 | struct nvidia_par *par = info->par; | 1351 | struct nvidia_par *par = info->par; |
@@ -1433,7 +1431,7 @@ static struct pci_driver nvidiafb_driver = { | |||
1433 | .probe = nvidiafb_probe, | 1431 | .probe = nvidiafb_probe, |
1434 | .suspend = nvidiafb_suspend, | 1432 | .suspend = nvidiafb_suspend, |
1435 | .resume = nvidiafb_resume, | 1433 | .resume = nvidiafb_resume, |
1436 | .remove = __exit_p(nvidiafb_remove), | 1434 | .remove = __devexit_p(nvidiafb_remove), |
1437 | }; | 1435 | }; |
1438 | 1436 | ||
1439 | /* ------------------------------------------------------------------------- * | 1437 | /* ------------------------------------------------------------------------- * |
diff --git a/drivers/video/pm3fb.c b/drivers/video/pm3fb.c index 1d81ef47efd3..bd787e80177d 100644 --- a/drivers/video/pm3fb.c +++ b/drivers/video/pm3fb.c | |||
@@ -3299,14 +3299,12 @@ static void pm3fb_detect(void) | |||
3299 | fb_info[i].dev = NULL; | 3299 | fb_info[i].dev = NULL; |
3300 | } | 3300 | } |
3301 | 3301 | ||
3302 | dev = | 3302 | dev = pci_get_device(PCI_VENDOR_ID_3DLABS, |
3303 | pci_find_device(PCI_VENDOR_ID_3DLABS, | ||
3304 | PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev); | 3303 | PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev); |
3305 | 3304 | ||
3306 | for (i = 0; ((i < PM3_MAX_BOARD) && dev); i++) { | 3305 | for (i = 0; ((i < PM3_MAX_BOARD) && dev); i++) { |
3307 | dev_array[i] = dev; | 3306 | dev_array[i] = dev; |
3308 | dev = | 3307 | dev = pci_get_device(PCI_VENDOR_ID_3DLABS, |
3309 | pci_find_device(PCI_VENDOR_ID_3DLABS, | ||
3310 | PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev); | 3308 | PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev); |
3311 | } | 3309 | } |
3312 | 3310 | ||
@@ -3353,7 +3351,7 @@ static void pm3fb_detect(void) | |||
3353 | /* now, initialize... or not */ | 3351 | /* now, initialize... or not */ |
3354 | for (i = 0; i < PM3_MAX_BOARD; i++) { | 3352 | for (i = 0; i < PM3_MAX_BOARD; i++) { |
3355 | l_fb_info = &(fb_info[i]); | 3353 | l_fb_info = &(fb_info[i]); |
3356 | if ((l_fb_info->dev) && (!disable[i])) { /* PCI device was found and not disabled by user */ | 3354 | if (l_fb_info->dev && !disable[i]) { /* PCI device was found and not disabled by user */ |
3357 | DPRINTK(2, | 3355 | DPRINTK(2, |
3358 | "found @%lx Vendor %lx Device %lx ; base @ : %lx - %lx - %lx - %lx - %lx - %lx, irq %ld\n", | 3356 | "found @%lx Vendor %lx Device %lx ; base @ : %lx - %lx - %lx - %lx - %lx - %lx, irq %ld\n", |
3359 | (unsigned long) l_fb_info->dev, | 3357 | (unsigned long) l_fb_info->dev, |
@@ -3608,7 +3606,7 @@ int init_module(void) | |||
3608 | 3606 | ||
3609 | pm3fb_init(); | 3607 | pm3fb_init(); |
3610 | 3608 | ||
3611 | return (0); | 3609 | return 0; |
3612 | } | 3610 | } |
3613 | 3611 | ||
3614 | void cleanup_module(void) | 3612 | void cleanup_module(void) |
@@ -3619,23 +3617,18 @@ void cleanup_module(void) | |||
3619 | struct pm3fb_info *l_fb_info; | 3617 | struct pm3fb_info *l_fb_info; |
3620 | for (i = 0; i < PM3_MAX_BOARD; i++) { | 3618 | for (i = 0; i < PM3_MAX_BOARD; i++) { |
3621 | l_fb_info = &(fb_info[i]); | 3619 | l_fb_info = &(fb_info[i]); |
3622 | if ((l_fb_info->dev != NULL) | 3620 | pci_dev_put(l_fb_info->dev); |
3623 | && (!(disable[l_fb_info->board_num]))) { | 3621 | if (l_fb_info->dev != NULL && !(disable[l_fb_info->board_num])) { |
3624 | if (l_fb_info->vIOBase != | 3622 | if (l_fb_info->vIOBase != (unsigned char *) -1) { |
3625 | (unsigned char *) -1) { | ||
3626 | pm3fb_unmapIO(l_fb_info); | 3623 | pm3fb_unmapIO(l_fb_info); |
3627 | release_mem_region(l_fb_info->p_fb, | 3624 | release_mem_region(l_fb_info->p_fb, |
3628 | l_fb_info-> | 3625 | l_fb_info->fb_size); |
3629 | fb_size); | 3626 | release_mem_region(l_fb_info->pIOBase, |
3630 | release_mem_region(l_fb_info-> | 3627 | PM3_REGS_SIZE); |
3631 | pIOBase, | ||
3632 | PM3_REGS_SIZE); | ||
3633 | } | 3628 | } |
3634 | unregister_framebuffer(&l_fb_info->gen. | 3629 | unregister_framebuffer(&l_fb_info->gen.info); |
3635 | info); | ||
3636 | } | 3630 | } |
3637 | } | 3631 | } |
3638 | } | 3632 | } |
3639 | return; | ||
3640 | } | 3633 | } |
3641 | #endif /* MODULE */ | 3634 | #endif /* MODULE */ |
diff --git a/drivers/video/ps3fb.c b/drivers/video/ps3fb.c new file mode 100644 index 000000000000..81e43cda7d8b --- /dev/null +++ b/drivers/video/ps3fb.c | |||
@@ -0,0 +1,1229 @@ | |||
1 | /* | ||
2 | * linux/drivers/video/ps3fb.c -- PS3 GPU frame buffer device | ||
3 | * | ||
4 | * Copyright (C) 2006 Sony Computer Entertainment Inc. | ||
5 | * Copyright 2006, 2007 Sony Corporation | ||
6 | * | ||
7 | * This file is based on : | ||
8 | * | ||
9 | * linux/drivers/video/vfb.c -- Virtual frame buffer device | ||
10 | * | ||
11 | * Copyright (C) 2002 James Simmons | ||
12 | * | ||
13 | * Copyright (C) 1997 Geert Uytterhoeven | ||
14 | * | ||
15 | * This file is subject to the terms and conditions of the GNU General Public | ||
16 | * License. See the file COPYING in the main directory of this archive for | ||
17 | * more details. | ||
18 | */ | ||
19 | |||
20 | #include <linux/module.h> | ||
21 | #include <linux/kernel.h> | ||
22 | #include <linux/errno.h> | ||
23 | #include <linux/string.h> | ||
24 | #include <linux/mm.h> | ||
25 | #include <linux/tty.h> | ||
26 | #include <linux/slab.h> | ||
27 | #include <linux/vmalloc.h> | ||
28 | #include <linux/delay.h> | ||
29 | #include <linux/interrupt.h> | ||
30 | #include <linux/platform_device.h> | ||
31 | #include <linux/console.h> | ||
32 | #include <linux/ioctl.h> | ||
33 | #include <linux/notifier.h> | ||
34 | #include <linux/reboot.h> | ||
35 | |||
36 | #include <asm/uaccess.h> | ||
37 | #include <linux/fb.h> | ||
38 | #include <linux/init.h> | ||
39 | #include <asm/time.h> | ||
40 | |||
41 | #include <asm/abs_addr.h> | ||
42 | #include <asm/lv1call.h> | ||
43 | #include <asm/ps3av.h> | ||
44 | #include <asm/ps3fb.h> | ||
45 | #include <asm/ps3.h> | ||
46 | |||
47 | #ifdef PS3FB_DEBUG | ||
48 | #define DPRINTK(fmt, args...) printk("%s: " fmt, __FUNCTION__ , ##args) | ||
49 | #else | ||
50 | #define DPRINTK(fmt, args...) | ||
51 | #endif | ||
52 | |||
53 | #define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC 0x101 | ||
54 | #define L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP 0x102 | ||
55 | #define L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP 0x600 | ||
56 | #define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT 0x601 | ||
57 | #define L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT_SYNC 0x602 | ||
58 | |||
59 | #define L1GPU_FB_BLIT_WAIT_FOR_COMPLETION (1ULL << 32) | ||
60 | |||
61 | #define L1GPU_DISPLAY_SYNC_HSYNC 1 | ||
62 | #define L1GPU_DISPLAY_SYNC_VSYNC 2 | ||
63 | |||
64 | #define DDR_SIZE (0) /* used no ddr */ | ||
65 | #define GPU_OFFSET (64 * 1024) | ||
66 | #define GPU_IOIF (0x0d000000UL) | ||
67 | |||
68 | #define PS3FB_FULL_MODE_BIT 0x80 | ||
69 | |||
70 | #define GPU_INTR_STATUS_VSYNC_0 0 /* vsync on head A */ | ||
71 | #define GPU_INTR_STATUS_VSYNC_1 1 /* vsync on head B */ | ||
72 | #define GPU_INTR_STATUS_FLIP_0 3 /* flip head A */ | ||
73 | #define GPU_INTR_STATUS_FLIP_1 4 /* flip head B */ | ||
74 | #define GPU_INTR_STATUS_QUEUE_0 5 /* queue head A */ | ||
75 | #define GPU_INTR_STATUS_QUEUE_1 6 /* queue head B */ | ||
76 | |||
77 | #define GPU_DRIVER_INFO_VERSION 0x211 | ||
78 | |||
79 | /* gpu internals */ | ||
80 | struct display_head { | ||
81 | u64 be_time_stamp; | ||
82 | u32 status; | ||
83 | u32 offset; | ||
84 | u32 res1; | ||
85 | u32 res2; | ||
86 | u32 field; | ||
87 | u32 reserved1; | ||
88 | |||
89 | u64 res3; | ||
90 | u32 raster; | ||
91 | |||
92 | u64 vblank_count; | ||
93 | u32 field_vsync; | ||
94 | u32 reserved2; | ||
95 | }; | ||
96 | |||
97 | struct gpu_irq { | ||
98 | u32 irq_outlet; | ||
99 | u32 status; | ||
100 | u32 mask; | ||
101 | u32 video_cause; | ||
102 | u32 graph_cause; | ||
103 | u32 user_cause; | ||
104 | |||
105 | u32 res1; | ||
106 | u64 res2; | ||
107 | |||
108 | u32 reserved[4]; | ||
109 | }; | ||
110 | |||
111 | struct gpu_driver_info { | ||
112 | u32 version_driver; | ||
113 | u32 version_gpu; | ||
114 | u32 memory_size; | ||
115 | u32 hardware_channel; | ||
116 | |||
117 | u32 nvcore_frequency; | ||
118 | u32 memory_frequency; | ||
119 | |||
120 | u32 reserved[1063]; | ||
121 | struct display_head display_head[8]; | ||
122 | struct gpu_irq irq; | ||
123 | }; | ||
124 | |||
125 | struct ps3fb_priv { | ||
126 | unsigned int irq_no; | ||
127 | void *dev; | ||
128 | |||
129 | u64 context_handle, memory_handle; | ||
130 | void *xdr_ea; | ||
131 | struct gpu_driver_info *dinfo; | ||
132 | struct semaphore sem; | ||
133 | u32 res_index; | ||
134 | |||
135 | u64 vblank_count; /* frame count */ | ||
136 | wait_queue_head_t wait_vsync; | ||
137 | |||
138 | u32 num_frames; /* num of frame buffers */ | ||
139 | atomic_t ext_flip; /* on/off flip with vsync */ | ||
140 | atomic_t f_count; /* fb_open count */ | ||
141 | int is_blanked; | ||
142 | }; | ||
143 | static struct ps3fb_priv ps3fb; | ||
144 | |||
145 | struct ps3fb_res_table { | ||
146 | u32 xres; | ||
147 | u32 yres; | ||
148 | u32 xoff; | ||
149 | u32 yoff; | ||
150 | u32 type; | ||
151 | }; | ||
152 | #define PS3FB_RES_FULL 1 | ||
153 | static const struct ps3fb_res_table ps3fb_res[] = { | ||
154 | /* res_x,y margin_x,y full */ | ||
155 | { 720, 480, 72, 48 , 0}, | ||
156 | { 720, 576, 72, 58 , 0}, | ||
157 | { 1280, 720, 78, 38 , 0}, | ||
158 | { 1920, 1080, 116, 58 , 0}, | ||
159 | /* full mode */ | ||
160 | { 720, 480, 0, 0 , PS3FB_RES_FULL}, | ||
161 | { 720, 576, 0, 0 , PS3FB_RES_FULL}, | ||
162 | { 1280, 720, 0, 0 , PS3FB_RES_FULL}, | ||
163 | { 1920, 1080, 0, 0 , PS3FB_RES_FULL}, | ||
164 | /* vesa: normally full mode */ | ||
165 | { 1280, 768, 0, 0 , 0}, | ||
166 | { 1280, 1024, 0, 0 , 0}, | ||
167 | { 1920, 1200, 0, 0 , 0}, | ||
168 | { 0, 0, 0, 0 , 0} }; | ||
169 | |||
170 | /* default resolution */ | ||
171 | #define GPU_RES_INDEX 0 /* 720 x 480 */ | ||
172 | |||
173 | static const struct fb_videomode ps3fb_modedb[] = { | ||
174 | /* 60 Hz broadcast modes (modes "1" to "5") */ | ||
175 | { | ||
176 | /* 480i */ | ||
177 | "480i", 60, 576, 384, 74074, 130, 89, 78, 57, 63, 6, | ||
178 | FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | ||
179 | }, { | ||
180 | /* 480p */ | ||
181 | "480p", 60, 576, 384, 37037, 130, 89, 78, 57, 63, 6, | ||
182 | FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED | ||
183 | }, { | ||
184 | /* 720p */ | ||
185 | "720p", 60, 1124, 644, 13481, 298, 148, 57, 44, 80, 5, | ||
186 | FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED | ||
187 | }, { | ||
188 | /* 1080i */ | ||
189 | "1080i", 60, 1688, 964, 13481, 264, 160, 94, 62, 88, 5, | ||
190 | FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | ||
191 | }, { | ||
192 | /* 1080p */ | ||
193 | "1080p", 60, 1688, 964, 6741, 264, 160, 94, 62, 88, 5, | ||
194 | FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED | ||
195 | }, | ||
196 | |||
197 | /* 50 Hz broadcast modes (modes "6" to "10") */ | ||
198 | { | ||
199 | /* 576i */ | ||
200 | "576i", 50, 576, 460, 74074, 142, 83, 97, 63, 63, 5, | ||
201 | FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | ||
202 | }, { | ||
203 | /* 576p */ | ||
204 | "576p", 50, 576, 460, 37037, 142, 83, 97, 63, 63, 5, | ||
205 | FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED | ||
206 | }, { | ||
207 | /* 720p */ | ||
208 | "720p", 50, 1124, 644, 13468, 298, 478, 57, 44, 80, 5, | ||
209 | FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED | ||
210 | }, { | ||
211 | /* 1080 */ | ||
212 | "1080i", 50, 1688, 964, 13468, 264, 600, 94, 62, 88, 5, | ||
213 | FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | ||
214 | }, { | ||
215 | /* 1080p */ | ||
216 | "1080p", 50, 1688, 964, 6734, 264, 600, 94, 62, 88, 5, | ||
217 | FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED | ||
218 | }, | ||
219 | |||
220 | /* VESA modes (modes "11" to "13") */ | ||
221 | { | ||
222 | /* WXGA */ | ||
223 | "wxga", 60, 1280, 768, 12924, 160, 24, 29, 3, 136, 6, | ||
224 | 0, FB_VMODE_NONINTERLACED, | ||
225 | FB_MODE_IS_VESA | ||
226 | }, { | ||
227 | /* SXGA */ | ||
228 | "sxga", 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3, | ||
229 | FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED, | ||
230 | FB_MODE_IS_VESA | ||
231 | }, { | ||
232 | /* WUXGA */ | ||
233 | "wuxga", 60, 1920, 1200, 6494, 80, 48, 26, 3, 32, 6, | ||
234 | FB_SYNC_HOR_HIGH_ACT, FB_VMODE_NONINTERLACED, | ||
235 | FB_MODE_IS_VESA | ||
236 | }, | ||
237 | |||
238 | /* 60 Hz broadcast modes (full resolution versions of modes "1" to "5") */ | ||
239 | { | ||
240 | /* 480if */ | ||
241 | "480if", 60, 720, 480, 74074, 58, 17, 30, 9, 63, 6, | ||
242 | FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | ||
243 | }, { | ||
244 | /* 480pf */ | ||
245 | "480pf", 60, 720, 480, 37037, 58, 17, 30, 9, 63, 6, | ||
246 | FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED | ||
247 | }, { | ||
248 | /* 720pf */ | ||
249 | "720pf", 60, 1280, 720, 13481, 220, 70, 19, 6, 80, 5, | ||
250 | FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED | ||
251 | }, { | ||
252 | /* 1080if */ | ||
253 | "1080if", 60, 1920, 1080, 13481, 148, 44, 36, 4, 88, 5, | ||
254 | FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | ||
255 | }, { | ||
256 | /* 1080pf */ | ||
257 | "1080pf", 60, 1920, 1080, 6741, 148, 44, 36, 4, 88, 5, | ||
258 | FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED | ||
259 | }, | ||
260 | |||
261 | /* 50 Hz broadcast modes (full resolution versions of modes "6" to "10") */ | ||
262 | { | ||
263 | /* 576if */ | ||
264 | "576if", 50, 720, 576, 74074, 70, 11, 39, 5, 63, 5, | ||
265 | FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | ||
266 | }, { | ||
267 | /* 576pf */ | ||
268 | "576pf", 50, 720, 576, 37037, 70, 11, 39, 5, 63, 5, | ||
269 | FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED | ||
270 | }, { | ||
271 | /* 720pf */ | ||
272 | "720pf", 50, 1280, 720, 13468, 220, 400, 19, 6, 80, 5, | ||
273 | FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED | ||
274 | }, { | ||
275 | /* 1080if */ | ||
276 | "1080f", 50, 1920, 1080, 13468, 148, 484, 36, 4, 88, 5, | ||
277 | FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | ||
278 | }, { | ||
279 | /* 1080pf */ | ||
280 | "1080pf", 50, 1920, 1080, 6734, 148, 484, 36, 4, 88, 5, | ||
281 | FB_SYNC_BROADCAST, FB_VMODE_NONINTERLACED | ||
282 | } | ||
283 | }; | ||
284 | |||
285 | |||
286 | #define HEAD_A | ||
287 | #define HEAD_B | ||
288 | |||
289 | #define X_OFF(i) (ps3fb_res[i].xoff) /* left/right margin (pixel) */ | ||
290 | #define Y_OFF(i) (ps3fb_res[i].yoff) /* top/bottom margin (pixel) */ | ||
291 | #define WIDTH(i) (ps3fb_res[i].xres) /* width of FB */ | ||
292 | #define HEIGHT(i) (ps3fb_res[i].yres) /* height of FB */ | ||
293 | #define BPP 4 /* number of bytes per pixel */ | ||
294 | #define VP_OFF(i) (WIDTH(i) * Y_OFF(i) * BPP + X_OFF(i) * BPP) | ||
295 | #define FB_OFF(i) (GPU_OFFSET - VP_OFF(i) % GPU_OFFSET) | ||
296 | |||
297 | static int ps3fb_mode = 0; | ||
298 | module_param(ps3fb_mode, bool, 0); | ||
299 | |||
300 | static char *mode_option __initdata = NULL; | ||
301 | |||
302 | |||
303 | static int ps3fb_get_res_table(u32 xres, u32 yres) | ||
304 | { | ||
305 | int full_mode; | ||
306 | unsigned int i; | ||
307 | u32 x, y, f; | ||
308 | |||
309 | full_mode = (ps3fb_mode & PS3FB_FULL_MODE_BIT) ? PS3FB_RES_FULL : 0; | ||
310 | for (i = 0;; i++) { | ||
311 | x = ps3fb_res[i].xres; | ||
312 | y = ps3fb_res[i].yres; | ||
313 | f = ps3fb_res[i].type; | ||
314 | |||
315 | if (!x) { | ||
316 | DPRINTK("ERROR: ps3fb_get_res_table()\n"); | ||
317 | return -1; | ||
318 | } | ||
319 | |||
320 | if (full_mode == PS3FB_RES_FULL && f != PS3FB_RES_FULL) | ||
321 | continue; | ||
322 | |||
323 | if (x == xres && (yres == 0 || y == yres)) | ||
324 | break; | ||
325 | |||
326 | x = x - 2 * ps3fb_res[i].xoff; | ||
327 | y = y - 2 * ps3fb_res[i].yoff; | ||
328 | if (x == xres && (yres == 0 || y == yres)) | ||
329 | break; | ||
330 | } | ||
331 | return i; | ||
332 | } | ||
333 | |||
334 | static unsigned int ps3fb_find_mode(const struct fb_var_screeninfo *var, | ||
335 | u32 *line_length) | ||
336 | { | ||
337 | unsigned int i, mode; | ||
338 | |||
339 | for (i = 0; i < ARRAY_SIZE(ps3fb_modedb); i++) | ||
340 | if (var->xres == ps3fb_modedb[i].xres && | ||
341 | var->yres == ps3fb_modedb[i].yres && | ||
342 | var->pixclock == ps3fb_modedb[i].pixclock && | ||
343 | var->hsync_len == ps3fb_modedb[i].hsync_len && | ||
344 | var->vsync_len == ps3fb_modedb[i].vsync_len && | ||
345 | var->left_margin == ps3fb_modedb[i].left_margin && | ||
346 | var->right_margin == ps3fb_modedb[i].right_margin && | ||
347 | var->upper_margin == ps3fb_modedb[i].upper_margin && | ||
348 | var->lower_margin == ps3fb_modedb[i].lower_margin && | ||
349 | var->sync == ps3fb_modedb[i].sync && | ||
350 | (var->vmode & FB_VMODE_MASK) == ps3fb_modedb[i].vmode) { | ||
351 | /* Cropped broadcast modes use the full line_length */ | ||
352 | *line_length = | ||
353 | ps3fb_modedb[i < 10 ? i + 13 : i].xres * 4; | ||
354 | /* Full broadcast modes have the full mode bit set */ | ||
355 | mode = i > 12 ? (i - 12) | PS3FB_FULL_MODE_BIT : i + 1; | ||
356 | |||
357 | DPRINTK("ps3fb_find_mode: mode %u\n", mode); | ||
358 | return mode; | ||
359 | } | ||
360 | |||
361 | DPRINTK("ps3fb_find_mode: mode not found\n"); | ||
362 | return 0; | ||
363 | |||
364 | } | ||
365 | |||
366 | static const struct fb_videomode *ps3fb_default_mode(void) | ||
367 | { | ||
368 | u32 mode = ps3fb_mode & PS3AV_MODE_MASK; | ||
369 | u32 flags; | ||
370 | |||
371 | if (mode < 1 || mode > 13) | ||
372 | return NULL; | ||
373 | |||
374 | flags = ps3fb_mode & ~PS3AV_MODE_MASK; | ||
375 | |||
376 | if (mode <= 10 && flags & PS3FB_FULL_MODE_BIT) { | ||
377 | /* Full broadcast mode */ | ||
378 | return &ps3fb_modedb[mode + 12]; | ||
379 | } | ||
380 | |||
381 | return &ps3fb_modedb[mode - 1]; | ||
382 | } | ||
383 | |||
384 | static int ps3fb_sync(u32 frame) | ||
385 | { | ||
386 | int i, status; | ||
387 | u32 xres, yres; | ||
388 | u64 fb_ioif, offset; | ||
389 | |||
390 | i = ps3fb.res_index; | ||
391 | xres = ps3fb_res[i].xres; | ||
392 | yres = ps3fb_res[i].yres; | ||
393 | |||
394 | if (frame > ps3fb.num_frames - 1) { | ||
395 | printk(KERN_WARNING "%s: invalid frame number (%u)\n", | ||
396 | __FUNCTION__, frame); | ||
397 | return -EINVAL; | ||
398 | } | ||
399 | offset = xres * yres * BPP * frame; | ||
400 | |||
401 | fb_ioif = GPU_IOIF + FB_OFF(i) + offset; | ||
402 | status = lv1_gpu_context_attribute(ps3fb.context_handle, | ||
403 | L1GPU_CONTEXT_ATTRIBUTE_FB_BLIT, | ||
404 | offset, fb_ioif, | ||
405 | L1GPU_FB_BLIT_WAIT_FOR_COMPLETION | | ||
406 | (xres << 16) | yres, | ||
407 | xres * BPP); /* line_length */ | ||
408 | if (status) | ||
409 | printk(KERN_ERR "%s: lv1_gpu_context_attribute FB_BLIT failed: %d\n", | ||
410 | __FUNCTION__, status); | ||
411 | #ifdef HEAD_A | ||
412 | status = lv1_gpu_context_attribute(ps3fb.context_handle, | ||
413 | L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP, | ||
414 | 0, offset, 0, 0); | ||
415 | if (status) | ||
416 | printk(KERN_ERR "%s: lv1_gpu_context_attribute FLIP failed: %d\n", | ||
417 | __FUNCTION__, status); | ||
418 | #endif | ||
419 | #ifdef HEAD_B | ||
420 | status = lv1_gpu_context_attribute(ps3fb.context_handle, | ||
421 | L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_FLIP, | ||
422 | 1, offset, 0, 0); | ||
423 | if (status) | ||
424 | printk(KERN_ERR "%s: lv1_gpu_context_attribute FLIP failed: %d\n", | ||
425 | __FUNCTION__, status); | ||
426 | #endif | ||
427 | return 0; | ||
428 | } | ||
429 | |||
430 | |||
431 | static int ps3fb_open(struct fb_info *info, int user) | ||
432 | { | ||
433 | atomic_inc(&ps3fb.f_count); | ||
434 | return 0; | ||
435 | } | ||
436 | |||
437 | static int ps3fb_release(struct fb_info *info, int user) | ||
438 | { | ||
439 | if (atomic_dec_and_test(&ps3fb.f_count)) { | ||
440 | if (atomic_read(&ps3fb.ext_flip)) { | ||
441 | atomic_set(&ps3fb.ext_flip, 0); | ||
442 | ps3fb_sync(0); /* single buffer */ | ||
443 | } | ||
444 | } | ||
445 | return 0; | ||
446 | } | ||
447 | |||
448 | /* | ||
449 | * Setting the video mode has been split into two parts. | ||
450 | * First part, xxxfb_check_var, must not write anything | ||
451 | * to hardware, it should only verify and adjust var. | ||
452 | * This means it doesn't alter par but it does use hardware | ||
453 | * data from it to check this var. | ||
454 | */ | ||
455 | |||
456 | static int ps3fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | ||
457 | { | ||
458 | u32 line_length; | ||
459 | int mode; | ||
460 | int i; | ||
461 | |||
462 | DPRINTK("var->xres:%u info->var.xres:%u\n", var->xres, info->var.xres); | ||
463 | DPRINTK("var->yres:%u info->var.yres:%u\n", var->yres, info->var.yres); | ||
464 | |||
465 | /* FIXME For now we do exact matches only */ | ||
466 | mode = ps3fb_find_mode(var, &line_length); | ||
467 | if (!mode) | ||
468 | return -EINVAL; | ||
469 | |||
470 | /* | ||
471 | * FB_VMODE_CONUPDATE and FB_VMODE_SMOOTH_XPAN are equal! | ||
472 | * as FB_VMODE_SMOOTH_XPAN is only used internally | ||
473 | */ | ||
474 | |||
475 | if (var->vmode & FB_VMODE_CONUPDATE) { | ||
476 | var->vmode |= FB_VMODE_YWRAP; | ||
477 | var->xoffset = info->var.xoffset; | ||
478 | var->yoffset = info->var.yoffset; | ||
479 | } | ||
480 | |||
481 | /* Virtual screen and panning are not supported */ | ||
482 | if (var->xres_virtual > var->xres || var->yres_virtual > var->yres || | ||
483 | var->xoffset || var->yoffset) { | ||
484 | DPRINTK("Virtual screen and panning are not supported\n"); | ||
485 | return -EINVAL; | ||
486 | } | ||
487 | |||
488 | var->xres_virtual = var->xres; | ||
489 | var->yres_virtual = var->yres; | ||
490 | |||
491 | /* We support ARGB8888 only */ | ||
492 | if (var->bits_per_pixel > 32 || var->grayscale || | ||
493 | var->red.offset > 16 || var->green.offset > 8 || | ||
494 | var->blue.offset > 0 || var->transp.offset > 24 || | ||
495 | var->red.length > 8 || var->green.length > 8 || | ||
496 | var->blue.length > 8 || var->transp.length > 8 || | ||
497 | var->red.msb_right || var->green.msb_right || | ||
498 | var->blue.msb_right || var->transp.msb_right || var->nonstd) { | ||
499 | DPRINTK("We support ARGB8888 only\n"); | ||
500 | return -EINVAL; | ||
501 | } | ||
502 | |||
503 | var->bits_per_pixel = 32; | ||
504 | var->red.offset = 16; | ||
505 | var->green.offset = 8; | ||
506 | var->blue.offset = 0; | ||
507 | var->transp.offset = 24; | ||
508 | var->red.length = 8; | ||
509 | var->green.length = 8; | ||
510 | var->blue.length = 8; | ||
511 | var->transp.length = 8; | ||
512 | var->red.msb_right = 0; | ||
513 | var->green.msb_right = 0; | ||
514 | var->blue.msb_right = 0; | ||
515 | var->transp.msb_right = 0; | ||
516 | |||
517 | /* Rotation is not supported */ | ||
518 | if (var->rotate) { | ||
519 | DPRINTK("Rotation is not supported\n"); | ||
520 | return -EINVAL; | ||
521 | } | ||
522 | |||
523 | /* Memory limit */ | ||
524 | i = ps3fb_get_res_table(var->xres, var->yres); | ||
525 | if (ps3fb_res[i].xres*ps3fb_res[i].yres*BPP > ps3fb_videomemory.size) { | ||
526 | DPRINTK("Not enough memory\n"); | ||
527 | return -ENOMEM; | ||
528 | } | ||
529 | |||
530 | var->height = -1; | ||
531 | var->width = -1; | ||
532 | |||
533 | return 0; | ||
534 | } | ||
535 | |||
536 | /* | ||
537 | * This routine actually sets the video mode. | ||
538 | */ | ||
539 | |||
540 | static int ps3fb_set_par(struct fb_info *info) | ||
541 | { | ||
542 | unsigned int mode; | ||
543 | int i; | ||
544 | unsigned long offset; | ||
545 | static int first = 1; | ||
546 | |||
547 | DPRINTK("xres:%d xv:%d yres:%d yv:%d clock:%d\n", | ||
548 | info->var.xres, info->var.xres_virtual, | ||
549 | info->var.yres, info->var.yres_virtual, info->var.pixclock); | ||
550 | i = ps3fb_get_res_table(info->var.xres, info->var.yres); | ||
551 | ps3fb.res_index = i; | ||
552 | |||
553 | mode = ps3fb_find_mode(&info->var, &info->fix.line_length); | ||
554 | if (!mode) | ||
555 | return -EINVAL; | ||
556 | |||
557 | offset = FB_OFF(i) + VP_OFF(i); | ||
558 | info->fix.smem_len = ps3fb_videomemory.size - offset; | ||
559 | info->screen_base = (char __iomem *)ps3fb.xdr_ea + offset; | ||
560 | memset(ps3fb.xdr_ea, 0, ps3fb_videomemory.size); | ||
561 | |||
562 | ps3fb.num_frames = ps3fb_videomemory.size/ | ||
563 | (ps3fb_res[i].xres*ps3fb_res[i].yres*BPP); | ||
564 | |||
565 | /* Keep the special bits we cannot set using fb_var_screeninfo */ | ||
566 | ps3fb_mode = (ps3fb_mode & ~PS3AV_MODE_MASK) | mode; | ||
567 | |||
568 | if (ps3av_set_video_mode(ps3fb_mode, first)) | ||
569 | return -EINVAL; | ||
570 | |||
571 | first = 0; | ||
572 | return 0; | ||
573 | } | ||
574 | |||
575 | /* | ||
576 | * Set a single color register. The values supplied are already | ||
577 | * rounded down to the hardware's capabilities (according to the | ||
578 | * entries in the var structure). Return != 0 for invalid regno. | ||
579 | */ | ||
580 | |||
581 | static int ps3fb_setcolreg(unsigned int regno, unsigned int red, | ||
582 | unsigned int green, unsigned int blue, | ||
583 | unsigned int transp, struct fb_info *info) | ||
584 | { | ||
585 | if (regno >= 16) | ||
586 | return 1; | ||
587 | |||
588 | red >>= 8; | ||
589 | green >>= 8; | ||
590 | blue >>= 8; | ||
591 | transp >>= 8; | ||
592 | |||
593 | ((u32 *)info->pseudo_palette)[regno] = transp << 24 | red << 16 | | ||
594 | green << 8 | blue; | ||
595 | return 0; | ||
596 | } | ||
597 | |||
598 | /* | ||
599 | * As we have a virtual frame buffer, we need our own mmap function | ||
600 | */ | ||
601 | |||
602 | static int ps3fb_mmap(struct fb_info *info, struct vm_area_struct *vma) | ||
603 | { | ||
604 | unsigned long size, offset; | ||
605 | int i; | ||
606 | |||
607 | i = ps3fb_get_res_table(info->var.xres, info->var.yres); | ||
608 | if (i == -1) | ||
609 | return -EINVAL; | ||
610 | |||
611 | size = vma->vm_end - vma->vm_start; | ||
612 | offset = vma->vm_pgoff << PAGE_SHIFT; | ||
613 | if (offset + size > info->fix.smem_len) | ||
614 | return -EINVAL; | ||
615 | |||
616 | offset += info->fix.smem_start + FB_OFF(i) + VP_OFF(i); | ||
617 | if (remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT, | ||
618 | size, vma->vm_page_prot)) | ||
619 | return -EAGAIN; | ||
620 | |||
621 | printk(KERN_DEBUG "ps3fb: mmap framebuffer P(%lx)->V(%lx)\n", offset, | ||
622 | vma->vm_start); | ||
623 | return 0; | ||
624 | } | ||
625 | |||
626 | /* | ||
627 | * Blank the display | ||
628 | */ | ||
629 | |||
630 | static int ps3fb_blank(int blank, struct fb_info *info) | ||
631 | { | ||
632 | int retval; | ||
633 | |||
634 | DPRINTK("%s: blank:%d\n", __FUNCTION__, blank); | ||
635 | switch (blank) { | ||
636 | case FB_BLANK_POWERDOWN: | ||
637 | case FB_BLANK_HSYNC_SUSPEND: | ||
638 | case FB_BLANK_VSYNC_SUSPEND: | ||
639 | case FB_BLANK_NORMAL: | ||
640 | retval = ps3av_video_mute(1); /* mute on */ | ||
641 | if (!retval) | ||
642 | ps3fb.is_blanked = 1; | ||
643 | break; | ||
644 | |||
645 | default: /* unblank */ | ||
646 | retval = ps3av_video_mute(0); /* mute off */ | ||
647 | if (!retval) | ||
648 | ps3fb.is_blanked = 0; | ||
649 | break; | ||
650 | } | ||
651 | return retval; | ||
652 | } | ||
653 | |||
654 | static int ps3fb_get_vblank(struct fb_vblank *vblank) | ||
655 | { | ||
656 | memset(vblank, 0, sizeof(&vblank)); | ||
657 | vblank->flags = FB_VBLANK_HAVE_VSYNC; | ||
658 | return 0; | ||
659 | } | ||
660 | |||
661 | int ps3fb_wait_for_vsync(u32 crtc) | ||
662 | { | ||
663 | int ret; | ||
664 | u64 count; | ||
665 | |||
666 | count = ps3fb.vblank_count; | ||
667 | ret = wait_event_interruptible_timeout(ps3fb.wait_vsync, | ||
668 | count != ps3fb.vblank_count, | ||
669 | HZ / 10); | ||
670 | if (!ret) | ||
671 | return -ETIMEDOUT; | ||
672 | |||
673 | return 0; | ||
674 | } | ||
675 | |||
676 | EXPORT_SYMBOL_GPL(ps3fb_wait_for_vsync); | ||
677 | |||
678 | void ps3fb_flip_ctl(int on) | ||
679 | { | ||
680 | if (on) { | ||
681 | if (atomic_read(&ps3fb.ext_flip) > 0) { | ||
682 | atomic_dec(&ps3fb.ext_flip); | ||
683 | } | ||
684 | } else { | ||
685 | atomic_inc(&ps3fb.ext_flip); | ||
686 | } | ||
687 | } | ||
688 | |||
689 | EXPORT_SYMBOL_GPL(ps3fb_flip_ctl); | ||
690 | |||
691 | /* | ||
692 | * ioctl | ||
693 | */ | ||
694 | |||
695 | static int ps3fb_ioctl(struct fb_info *info, unsigned int cmd, | ||
696 | unsigned long arg) | ||
697 | { | ||
698 | void __user *argp = (void __user *)arg; | ||
699 | u32 val, old_mode; | ||
700 | int retval = -EFAULT; | ||
701 | |||
702 | switch (cmd) { | ||
703 | case FBIOGET_VBLANK: | ||
704 | { | ||
705 | struct fb_vblank vblank; | ||
706 | DPRINTK("FBIOGET_VBLANK:\n"); | ||
707 | retval = ps3fb_get_vblank(&vblank); | ||
708 | if (retval) | ||
709 | break; | ||
710 | |||
711 | if (copy_to_user(argp, &vblank, sizeof(vblank))) | ||
712 | retval = -EFAULT; | ||
713 | break; | ||
714 | } | ||
715 | |||
716 | case FBIO_WAITFORVSYNC: | ||
717 | { | ||
718 | u32 crt; | ||
719 | DPRINTK("FBIO_WAITFORVSYNC:\n"); | ||
720 | if (get_user(crt, (u32 __user *) arg)) | ||
721 | break; | ||
722 | |||
723 | retval = ps3fb_wait_for_vsync(crt); | ||
724 | break; | ||
725 | } | ||
726 | |||
727 | case PS3FB_IOCTL_SETMODE: | ||
728 | { | ||
729 | const struct fb_videomode *mode; | ||
730 | struct fb_var_screeninfo var; | ||
731 | |||
732 | if (copy_from_user(&val, argp, sizeof(val))) | ||
733 | break; | ||
734 | |||
735 | DPRINTK("PS3FB_IOCTL_SETMODE:%x\n", val); | ||
736 | retval = -EINVAL; | ||
737 | old_mode = ps3fb_mode; | ||
738 | ps3fb_mode = val; | ||
739 | mode = ps3fb_default_mode(); | ||
740 | if (mode) { | ||
741 | var = info->var; | ||
742 | fb_videomode_to_var(&var, mode); | ||
743 | acquire_console_sem(); | ||
744 | info->flags |= FBINFO_MISC_USEREVENT; | ||
745 | /* Force, in case only special bits changed */ | ||
746 | var.activate |= FB_ACTIVATE_FORCE; | ||
747 | retval = fb_set_var(info, &var); | ||
748 | info->flags &= ~FBINFO_MISC_USEREVENT; | ||
749 | release_console_sem(); | ||
750 | } | ||
751 | if (retval) | ||
752 | ps3fb_mode = old_mode; | ||
753 | break; | ||
754 | } | ||
755 | |||
756 | case PS3FB_IOCTL_GETMODE: | ||
757 | val = ps3av_get_mode(); | ||
758 | DPRINTK("PS3FB_IOCTL_GETMODE:%x\n", val); | ||
759 | if (!copy_to_user(argp, &val, sizeof(val))) | ||
760 | retval = 0; | ||
761 | break; | ||
762 | |||
763 | case PS3FB_IOCTL_SCREENINFO: | ||
764 | { | ||
765 | struct ps3fb_ioctl_res res; | ||
766 | int i = ps3fb.res_index; | ||
767 | DPRINTK("PS3FB_IOCTL_SCREENINFO:\n"); | ||
768 | res.xres = ps3fb_res[i].xres; | ||
769 | res.yres = ps3fb_res[i].yres; | ||
770 | res.xoff = ps3fb_res[i].xoff; | ||
771 | res.yoff = ps3fb_res[i].yoff; | ||
772 | res.num_frames = ps3fb.num_frames; | ||
773 | if (!copy_to_user(argp, &res, sizeof(res))) | ||
774 | retval = 0; | ||
775 | break; | ||
776 | } | ||
777 | |||
778 | case PS3FB_IOCTL_ON: | ||
779 | DPRINTK("PS3FB_IOCTL_ON:\n"); | ||
780 | atomic_inc(&ps3fb.ext_flip); | ||
781 | retval = 0; | ||
782 | break; | ||
783 | |||
784 | case PS3FB_IOCTL_OFF: | ||
785 | DPRINTK("PS3FB_IOCTL_OFF:\n"); | ||
786 | if (atomic_read(&ps3fb.ext_flip) > 0) | ||
787 | atomic_dec(&ps3fb.ext_flip); | ||
788 | retval = 0; | ||
789 | break; | ||
790 | |||
791 | case PS3FB_IOCTL_FSEL: | ||
792 | if (copy_from_user(&val, argp, sizeof(val))) | ||
793 | break; | ||
794 | |||
795 | DPRINTK("PS3FB_IOCTL_FSEL:%d\n", val); | ||
796 | retval = ps3fb_sync(val); | ||
797 | break; | ||
798 | |||
799 | default: | ||
800 | retval = -ENOIOCTLCMD; | ||
801 | break; | ||
802 | } | ||
803 | return retval; | ||
804 | } | ||
805 | |||
806 | static int ps3fbd(void *arg) | ||
807 | { | ||
808 | daemonize("ps3fbd"); | ||
809 | for (;;) { | ||
810 | down(&ps3fb.sem); | ||
811 | if (atomic_read(&ps3fb.ext_flip) == 0) | ||
812 | ps3fb_sync(0); /* single buffer */ | ||
813 | } | ||
814 | return 0; | ||
815 | } | ||
816 | |||
817 | static irqreturn_t ps3fb_vsync_interrupt(int irq, void *ptr) | ||
818 | { | ||
819 | u64 v1; | ||
820 | int status; | ||
821 | struct display_head *head = &ps3fb.dinfo->display_head[1]; | ||
822 | |||
823 | status = lv1_gpu_context_intr(ps3fb.context_handle, &v1); | ||
824 | if (status) { | ||
825 | printk(KERN_ERR "%s: lv1_gpu_context_intr failed: %d\n", | ||
826 | __FUNCTION__, status); | ||
827 | return IRQ_NONE; | ||
828 | } | ||
829 | |||
830 | if (v1 & (1 << GPU_INTR_STATUS_VSYNC_1)) { | ||
831 | /* VSYNC */ | ||
832 | ps3fb.vblank_count = head->vblank_count; | ||
833 | if (!ps3fb.is_blanked) | ||
834 | up(&ps3fb.sem); | ||
835 | wake_up_interruptible(&ps3fb.wait_vsync); | ||
836 | } | ||
837 | |||
838 | return IRQ_HANDLED; | ||
839 | } | ||
840 | |||
841 | #ifndef MODULE | ||
842 | static int __init ps3fb_setup(char *options) | ||
843 | { | ||
844 | char *this_opt; | ||
845 | int mode = 0; | ||
846 | |||
847 | if (!options || !*options) | ||
848 | return 0; /* no options */ | ||
849 | |||
850 | while ((this_opt = strsep(&options, ",")) != NULL) { | ||
851 | if (!*this_opt) | ||
852 | continue; | ||
853 | if (!strncmp(this_opt, "mode:", 5)) | ||
854 | mode = simple_strtoul(this_opt + 5, NULL, 0); | ||
855 | else | ||
856 | mode_option = this_opt; | ||
857 | } | ||
858 | return mode; | ||
859 | } | ||
860 | #endif /* MODULE */ | ||
861 | |||
862 | /* | ||
863 | * Initialisation | ||
864 | */ | ||
865 | |||
866 | static void ps3fb_platform_release(struct device *device) | ||
867 | { | ||
868 | /* This is called when the reference count goes to zero. */ | ||
869 | } | ||
870 | |||
871 | static int ps3fb_vsync_settings(struct gpu_driver_info *dinfo, void *dev) | ||
872 | { | ||
873 | int error; | ||
874 | |||
875 | DPRINTK("version_driver:%x\n", dinfo->version_driver); | ||
876 | DPRINTK("irq outlet:%x\n", dinfo->irq.irq_outlet); | ||
877 | DPRINTK("version_gpu:%x memory_size:%x ch:%x core_freq:%d mem_freq:%d\n", | ||
878 | dinfo->version_gpu, dinfo->memory_size, dinfo->hardware_channel, | ||
879 | dinfo->nvcore_frequency/1000000, dinfo->memory_frequency/1000000); | ||
880 | |||
881 | if (dinfo->version_driver != GPU_DRIVER_INFO_VERSION) { | ||
882 | printk(KERN_ERR "%s: version_driver err:%x\n", __FUNCTION__, | ||
883 | dinfo->version_driver); | ||
884 | return -EINVAL; | ||
885 | } | ||
886 | |||
887 | ps3fb.dev = dev; | ||
888 | error = ps3_alloc_irq(PS3_BINDING_CPU_ANY, dinfo->irq.irq_outlet, | ||
889 | &ps3fb.irq_no); | ||
890 | if (error) { | ||
891 | printk(KERN_ERR "%s: ps3_alloc_irq failed %d\n", __FUNCTION__, | ||
892 | error); | ||
893 | return error; | ||
894 | } | ||
895 | |||
896 | error = request_irq(ps3fb.irq_no, ps3fb_vsync_interrupt, IRQF_DISABLED, | ||
897 | "ps3fb vsync", ps3fb.dev); | ||
898 | if (error) { | ||
899 | printk(KERN_ERR "%s: request_irq failed %d\n", __FUNCTION__, | ||
900 | error); | ||
901 | ps3_free_irq(ps3fb.irq_no); | ||
902 | return error; | ||
903 | } | ||
904 | |||
905 | dinfo->irq.mask = (1 << GPU_INTR_STATUS_VSYNC_1) | | ||
906 | (1 << GPU_INTR_STATUS_FLIP_1); | ||
907 | return 0; | ||
908 | } | ||
909 | |||
910 | static int ps3fb_xdr_settings(u64 xdr_lpar) | ||
911 | { | ||
912 | int status; | ||
913 | |||
914 | status = lv1_gpu_context_iomap(ps3fb.context_handle, GPU_IOIF, | ||
915 | xdr_lpar, ps3fb_videomemory.size, 0); | ||
916 | if (status) { | ||
917 | printk(KERN_ERR "%s: lv1_gpu_context_iomap failed: %d\n", | ||
918 | __FUNCTION__, status); | ||
919 | return -ENXIO; | ||
920 | } | ||
921 | DPRINTK("video:%p xdr_ea:%p ioif:%lx lpar:%lx phys:%lx size:%lx\n", | ||
922 | ps3fb_videomemory.address, ps3fb.xdr_ea, GPU_IOIF, xdr_lpar, | ||
923 | virt_to_abs(ps3fb.xdr_ea), ps3fb_videomemory.size); | ||
924 | |||
925 | status = lv1_gpu_context_attribute(ps3fb.context_handle, | ||
926 | L1GPU_CONTEXT_ATTRIBUTE_FB_SETUP, | ||
927 | xdr_lpar, ps3fb_videomemory.size, | ||
928 | GPU_IOIF, 0); | ||
929 | if (status) { | ||
930 | printk(KERN_ERR "%s: lv1_gpu_context_attribute FB_SETUP failed: %d\n", | ||
931 | __FUNCTION__, status); | ||
932 | return -ENXIO; | ||
933 | } | ||
934 | return 0; | ||
935 | } | ||
936 | |||
937 | static struct fb_ops ps3fb_ops = { | ||
938 | .fb_open = ps3fb_open, | ||
939 | .fb_release = ps3fb_release, | ||
940 | .fb_check_var = ps3fb_check_var, | ||
941 | .fb_set_par = ps3fb_set_par, | ||
942 | .fb_setcolreg = ps3fb_setcolreg, | ||
943 | .fb_fillrect = cfb_fillrect, | ||
944 | .fb_copyarea = cfb_copyarea, | ||
945 | .fb_imageblit = cfb_imageblit, | ||
946 | .fb_mmap = ps3fb_mmap, | ||
947 | .fb_blank = ps3fb_blank, | ||
948 | .fb_ioctl = ps3fb_ioctl, | ||
949 | .fb_compat_ioctl = ps3fb_ioctl | ||
950 | }; | ||
951 | |||
952 | static struct fb_fix_screeninfo ps3fb_fix __initdata = { | ||
953 | .id = "PS3 FB", | ||
954 | .type = FB_TYPE_PACKED_PIXELS, | ||
955 | .visual = FB_VISUAL_TRUECOLOR, | ||
956 | .accel = FB_ACCEL_NONE, | ||
957 | }; | ||
958 | |||
959 | static int __init ps3fb_probe(struct platform_device *dev) | ||
960 | { | ||
961 | struct fb_info *info; | ||
962 | int retval = -ENOMEM; | ||
963 | u64 ddr_lpar = 0; | ||
964 | u64 lpar_dma_control = 0; | ||
965 | u64 lpar_driver_info = 0; | ||
966 | u64 lpar_reports = 0; | ||
967 | u64 lpar_reports_size = 0; | ||
968 | u64 xdr_lpar; | ||
969 | int status; | ||
970 | unsigned long offset; | ||
971 | |||
972 | /* get gpu context handle */ | ||
973 | status = lv1_gpu_memory_allocate(DDR_SIZE, 0, 0, 0, 0, | ||
974 | &ps3fb.memory_handle, &ddr_lpar); | ||
975 | if (status) { | ||
976 | printk(KERN_ERR "%s: lv1_gpu_memory_allocate failed: %d\n", | ||
977 | __FUNCTION__, status); | ||
978 | goto err; | ||
979 | } | ||
980 | DPRINTK("ddr:lpar:0x%lx\n", ddr_lpar); | ||
981 | |||
982 | status = lv1_gpu_context_allocate(ps3fb.memory_handle, 0, | ||
983 | &ps3fb.context_handle, | ||
984 | &lpar_dma_control, &lpar_driver_info, | ||
985 | &lpar_reports, &lpar_reports_size); | ||
986 | if (status) { | ||
987 | printk(KERN_ERR "%s: lv1_gpu_context_attribute failed: %d\n", | ||
988 | __FUNCTION__, status); | ||
989 | goto err_gpu_memory_free; | ||
990 | } | ||
991 | |||
992 | /* vsync interrupt */ | ||
993 | ps3fb.dinfo = ioremap(lpar_driver_info, 128 * 1024); | ||
994 | if (!ps3fb.dinfo) { | ||
995 | printk(KERN_ERR "%s: ioremap failed\n", __FUNCTION__); | ||
996 | goto err_gpu_context_free; | ||
997 | } | ||
998 | |||
999 | retval = ps3fb_vsync_settings(ps3fb.dinfo, dev); | ||
1000 | if (retval) | ||
1001 | goto err_iounmap_dinfo; | ||
1002 | |||
1003 | /* xdr frame buffer */ | ||
1004 | ps3fb.xdr_ea = ps3fb_videomemory.address; | ||
1005 | xdr_lpar = ps3_mm_phys_to_lpar(__pa(ps3fb.xdr_ea)); | ||
1006 | retval = ps3fb_xdr_settings(xdr_lpar); | ||
1007 | if (retval) | ||
1008 | goto err_free_irq; | ||
1009 | |||
1010 | /* | ||
1011 | * ps3fb must clear memory to prevent kernel info | ||
1012 | * leakage into userspace | ||
1013 | */ | ||
1014 | memset(ps3fb.xdr_ea, 0, ps3fb_videomemory.size); | ||
1015 | info = framebuffer_alloc(sizeof(u32) * 16, &dev->dev); | ||
1016 | if (!info) | ||
1017 | goto err_free_irq; | ||
1018 | |||
1019 | offset = FB_OFF(ps3fb.res_index) + VP_OFF(ps3fb.res_index); | ||
1020 | info->screen_base = (char __iomem *)ps3fb.xdr_ea + offset; | ||
1021 | info->fbops = &ps3fb_ops; | ||
1022 | |||
1023 | info->fix = ps3fb_fix; | ||
1024 | info->fix.smem_start = virt_to_abs(ps3fb.xdr_ea); | ||
1025 | info->fix.smem_len = ps3fb_videomemory.size - offset; | ||
1026 | info->pseudo_palette = info->par; | ||
1027 | info->par = NULL; | ||
1028 | info->flags = FBINFO_FLAG_DEFAULT; | ||
1029 | |||
1030 | retval = fb_alloc_cmap(&info->cmap, 256, 0); | ||
1031 | if (retval < 0) | ||
1032 | goto err_framebuffer_release; | ||
1033 | |||
1034 | if (!fb_find_mode(&info->var, info, mode_option, ps3fb_modedb, | ||
1035 | ARRAY_SIZE(ps3fb_modedb), ps3fb_default_mode(), 32)) { | ||
1036 | retval = -EINVAL; | ||
1037 | goto err_fb_dealloc; | ||
1038 | } | ||
1039 | |||
1040 | fb_videomode_to_modelist(ps3fb_modedb, ARRAY_SIZE(ps3fb_modedb), | ||
1041 | &info->modelist); | ||
1042 | |||
1043 | retval = register_framebuffer(info); | ||
1044 | if (retval < 0) | ||
1045 | goto err_fb_dealloc; | ||
1046 | |||
1047 | platform_set_drvdata(dev, info); | ||
1048 | |||
1049 | printk(KERN_INFO | ||
1050 | "fb%d: PS3 frame buffer device, using %ld KiB of video memory\n", | ||
1051 | info->node, ps3fb_videomemory.size >> 10); | ||
1052 | |||
1053 | kernel_thread(ps3fbd, info, CLONE_KERNEL); | ||
1054 | return 0; | ||
1055 | |||
1056 | err_fb_dealloc: | ||
1057 | fb_dealloc_cmap(&info->cmap); | ||
1058 | err_framebuffer_release: | ||
1059 | framebuffer_release(info); | ||
1060 | err_free_irq: | ||
1061 | free_irq(ps3fb.irq_no, ps3fb.dev); | ||
1062 | ps3_free_irq(ps3fb.irq_no); | ||
1063 | err_iounmap_dinfo: | ||
1064 | iounmap((u8 __iomem *)ps3fb.dinfo); | ||
1065 | err_gpu_context_free: | ||
1066 | lv1_gpu_context_free(ps3fb.context_handle); | ||
1067 | err_gpu_memory_free: | ||
1068 | lv1_gpu_memory_free(ps3fb.memory_handle); | ||
1069 | err: | ||
1070 | return retval; | ||
1071 | } | ||
1072 | |||
1073 | static void ps3fb_shutdown(struct platform_device *dev) | ||
1074 | { | ||
1075 | ps3fb_flip_ctl(0); /* flip off */ | ||
1076 | ps3fb.dinfo->irq.mask = 0; | ||
1077 | free_irq(ps3fb.irq_no, ps3fb.dev); | ||
1078 | ps3_free_irq(ps3fb.irq_no); | ||
1079 | iounmap((u8 __iomem *)ps3fb.dinfo); | ||
1080 | } | ||
1081 | |||
1082 | void ps3fb_cleanup(void) | ||
1083 | { | ||
1084 | int status; | ||
1085 | |||
1086 | if (ps3fb.irq_no) { | ||
1087 | free_irq(ps3fb.irq_no, ps3fb.dev); | ||
1088 | ps3_free_irq(ps3fb.irq_no); | ||
1089 | } | ||
1090 | iounmap((u8 __iomem *)ps3fb.dinfo); | ||
1091 | |||
1092 | status = lv1_gpu_context_free(ps3fb.context_handle); | ||
1093 | if (status) | ||
1094 | DPRINTK("lv1_gpu_context_free failed: %d\n", status); | ||
1095 | |||
1096 | status = lv1_gpu_memory_free(ps3fb.memory_handle); | ||
1097 | if (status) | ||
1098 | DPRINTK("lv1_gpu_memory_free failed: %d\n", status); | ||
1099 | |||
1100 | ps3av_dev_close(); | ||
1101 | } | ||
1102 | |||
1103 | EXPORT_SYMBOL_GPL(ps3fb_cleanup); | ||
1104 | |||
1105 | static int ps3fb_remove(struct platform_device *dev) | ||
1106 | { | ||
1107 | struct fb_info *info = platform_get_drvdata(dev); | ||
1108 | |||
1109 | if (info) { | ||
1110 | unregister_framebuffer(info); | ||
1111 | fb_dealloc_cmap(&info->cmap); | ||
1112 | framebuffer_release(info); | ||
1113 | } | ||
1114 | ps3fb_cleanup(); | ||
1115 | return 0; | ||
1116 | } | ||
1117 | |||
1118 | static struct platform_driver ps3fb_driver = { | ||
1119 | .probe = ps3fb_probe, | ||
1120 | .remove = ps3fb_remove, | ||
1121 | .shutdown = ps3fb_shutdown, | ||
1122 | .driver = { .name = "ps3fb" } | ||
1123 | }; | ||
1124 | |||
1125 | static struct platform_device ps3fb_device = { | ||
1126 | .name = "ps3fb", | ||
1127 | .id = 0, | ||
1128 | .dev = { .release = ps3fb_platform_release } | ||
1129 | }; | ||
1130 | |||
1131 | int ps3fb_set_sync(void) | ||
1132 | { | ||
1133 | int status; | ||
1134 | |||
1135 | #ifdef HEAD_A | ||
1136 | status = lv1_gpu_context_attribute(0x0, | ||
1137 | L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC, | ||
1138 | 0, L1GPU_DISPLAY_SYNC_VSYNC, 0, 0); | ||
1139 | if (status) { | ||
1140 | printk(KERN_ERR "%s: lv1_gpu_context_attribute DISPLAY_SYNC failed: %d\n", | ||
1141 | __FUNCTION__, status); | ||
1142 | return -1; | ||
1143 | } | ||
1144 | #endif | ||
1145 | #ifdef HEAD_B | ||
1146 | status = lv1_gpu_context_attribute(0x0, | ||
1147 | L1GPU_CONTEXT_ATTRIBUTE_DISPLAY_SYNC, | ||
1148 | 1, L1GPU_DISPLAY_SYNC_VSYNC, 0, 0); | ||
1149 | |||
1150 | if (status) { | ||
1151 | printk(KERN_ERR "%s: lv1_gpu_context_attribute DISPLAY_MODE failed: %d\n", | ||
1152 | __FUNCTION__, status); | ||
1153 | return -1; | ||
1154 | } | ||
1155 | #endif | ||
1156 | return 0; | ||
1157 | } | ||
1158 | |||
1159 | EXPORT_SYMBOL_GPL(ps3fb_set_sync); | ||
1160 | |||
1161 | static int __init ps3fb_init(void) | ||
1162 | { | ||
1163 | int error; | ||
1164 | #ifndef MODULE | ||
1165 | int mode; | ||
1166 | char *option = NULL; | ||
1167 | |||
1168 | if (fb_get_options("ps3fb", &option)) | ||
1169 | goto err; | ||
1170 | #endif | ||
1171 | |||
1172 | if (!ps3fb_videomemory.address) | ||
1173 | goto err; | ||
1174 | |||
1175 | error = ps3av_dev_open(); | ||
1176 | if (error) { | ||
1177 | printk(KERN_ERR "%s: ps3av_dev_open failed\n", __FUNCTION__); | ||
1178 | goto err; | ||
1179 | } | ||
1180 | |||
1181 | ps3fb_mode = ps3av_get_mode(); | ||
1182 | DPRINTK("ps3av_mode:%d\n", ps3fb_mode); | ||
1183 | #ifndef MODULE | ||
1184 | mode = ps3fb_setup(option); /* check boot option */ | ||
1185 | if (mode) | ||
1186 | ps3fb_mode = mode; | ||
1187 | #endif | ||
1188 | if (ps3fb_mode > 0) { | ||
1189 | u32 xres, yres; | ||
1190 | ps3av_video_mode2res(ps3fb_mode, &xres, &yres); | ||
1191 | ps3fb.res_index = ps3fb_get_res_table(xres, yres); | ||
1192 | DPRINTK("res_index:%d\n", ps3fb.res_index); | ||
1193 | } else | ||
1194 | ps3fb.res_index = GPU_RES_INDEX; | ||
1195 | |||
1196 | atomic_set(&ps3fb.f_count, -1); /* fbcon opens ps3fb */ | ||
1197 | atomic_set(&ps3fb.ext_flip, 0); /* for flip with vsync */ | ||
1198 | init_MUTEX(&ps3fb.sem); | ||
1199 | init_waitqueue_head(&ps3fb.wait_vsync); | ||
1200 | ps3fb.num_frames = 1; | ||
1201 | |||
1202 | error = platform_driver_register(&ps3fb_driver); | ||
1203 | if (!error) { | ||
1204 | error = platform_device_register(&ps3fb_device); | ||
1205 | if (error) | ||
1206 | platform_driver_unregister(&ps3fb_driver); | ||
1207 | } | ||
1208 | |||
1209 | ps3fb_set_sync(); | ||
1210 | |||
1211 | return error; | ||
1212 | |||
1213 | err: | ||
1214 | return -ENXIO; | ||
1215 | } | ||
1216 | |||
1217 | module_init(ps3fb_init); | ||
1218 | |||
1219 | #ifdef MODULE | ||
1220 | static void __exit ps3fb_exit(void) | ||
1221 | { | ||
1222 | platform_device_unregister(&ps3fb_device); | ||
1223 | platform_driver_unregister(&ps3fb_driver); | ||
1224 | } | ||
1225 | |||
1226 | module_exit(ps3fb_exit); | ||
1227 | |||
1228 | MODULE_LICENSE("GPL"); | ||
1229 | #endif /* MODULE */ | ||
diff --git a/drivers/video/retz3fb.c b/drivers/video/retz3fb.c deleted file mode 100644 index bc7ffc84e185..000000000000 --- a/drivers/video/retz3fb.c +++ /dev/null | |||
@@ -1,1588 +0,0 @@ | |||
1 | /* | ||
2 | * Linux/drivers/video/retz3fb.c -- RetinaZ3 frame buffer device | ||
3 | * | ||
4 | * Copyright (C) 1997 Jes Sorensen | ||
5 | * | ||
6 | * This file is based on the CyberVision64 frame buffer device and | ||
7 | * the generic Cirrus Logic driver. | ||
8 | * | ||
9 | * cyberfb.c: Copyright (C) 1996 Martin Apel, | ||
10 | * Geert Uytterhoeven | ||
11 | * clgen.c: Copyright (C) 1996 Frank Neumann | ||
12 | * | ||
13 | * History: | ||
14 | * - 22 Jan 97: Initial work | ||
15 | * - 14 Feb 97: Screen initialization works somewhat, still only | ||
16 | * 8-bit packed pixel is supported. | ||
17 | * | ||
18 | * This file is subject to the terms and conditions of the GNU General Public | ||
19 | * License. See the file COPYING in the main directory of this archive | ||
20 | * for more details. | ||
21 | */ | ||
22 | |||
23 | #include <linux/module.h> | ||
24 | #include <linux/kernel.h> | ||
25 | #include <linux/errno.h> | ||
26 | #include <linux/string.h> | ||
27 | #include <linux/mm.h> | ||
28 | #include <linux/slab.h> | ||
29 | #include <linux/delay.h> | ||
30 | #include <linux/fb.h> | ||
31 | #include <linux/zorro.h> | ||
32 | #include <linux/init.h> | ||
33 | |||
34 | #include <asm/uaccess.h> | ||
35 | #include <asm/system.h> | ||
36 | #include <asm/irq.h> | ||
37 | #include <asm/pgtable.h> | ||
38 | #include <asm/io.h> | ||
39 | |||
40 | #include <video/fbcon.h> | ||
41 | #include <video/fbcon-cfb8.h> | ||
42 | #include <video/fbcon-cfb16.h> | ||
43 | |||
44 | #include "retz3fb.h" | ||
45 | |||
46 | /* #define DEBUG if(1) */ | ||
47 | #define DEBUG if(0) | ||
48 | |||
49 | /* | ||
50 | * Reserve space for one pattern line. | ||
51 | * | ||
52 | * For the time being we only support 4MB boards! | ||
53 | */ | ||
54 | |||
55 | #define PAT_MEM_SIZE 16*3 | ||
56 | #define PAT_MEM_OFF (4*1024*1024 - PAT_MEM_SIZE) | ||
57 | |||
58 | struct retz3fb_par { | ||
59 | int xres; | ||
60 | int yres; | ||
61 | int xres_vir; | ||
62 | int yres_vir; | ||
63 | int xoffset; | ||
64 | int yoffset; | ||
65 | int bpp; | ||
66 | |||
67 | struct fb_bitfield red; | ||
68 | struct fb_bitfield green; | ||
69 | struct fb_bitfield blue; | ||
70 | struct fb_bitfield transp; | ||
71 | |||
72 | int pixclock; | ||
73 | int left_margin; /* time from sync to picture */ | ||
74 | int right_margin; /* time from picture to sync */ | ||
75 | int upper_margin; /* time from sync to picture */ | ||
76 | int lower_margin; | ||
77 | int hsync_len; /* length of horizontal sync */ | ||
78 | int vsync_len; /* length of vertical sync */ | ||
79 | int vmode; | ||
80 | |||
81 | int accel; | ||
82 | }; | ||
83 | |||
84 | struct display_data { | ||
85 | long h_total; /* Horizontal Total */ | ||
86 | long h_sstart; /* Horizontal Sync Start */ | ||
87 | long h_sstop; /* Horizontal Sync Stop */ | ||
88 | long h_bstart; /* Horizontal Blank Start */ | ||
89 | long h_bstop; /* Horizontal Blank Stop */ | ||
90 | long h_dispend; /* Horizontal Display End */ | ||
91 | long v_total; /* Vertical Total */ | ||
92 | long v_sstart; /* Vertical Sync Start */ | ||
93 | long v_sstop; /* Vertical Sync Stop */ | ||
94 | long v_bstart; /* Vertical Blank Start */ | ||
95 | long v_bstop; /* Vertical Blank Stop */ | ||
96 | long v_dispend; /* Horizontal Display End */ | ||
97 | }; | ||
98 | |||
99 | struct retz3_fb_info { | ||
100 | struct fb_info info; | ||
101 | unsigned char *base; | ||
102 | unsigned char *fbmem; | ||
103 | unsigned long fbsize; | ||
104 | volatile unsigned char *regs; | ||
105 | unsigned long physfbmem; | ||
106 | unsigned long physregs; | ||
107 | int current_par_valid; /* set to 0 by memset */ | ||
108 | int blitbusy; | ||
109 | struct display disp; | ||
110 | struct retz3fb_par current_par; | ||
111 | unsigned char color_table [256][3]; | ||
112 | }; | ||
113 | |||
114 | |||
115 | static char fontname[40] __initdata = { 0 }; | ||
116 | |||
117 | #define retz3info(info) ((struct retz3_fb_info *)(info)) | ||
118 | #define fbinfo(info) ((struct fb_info *)(info)) | ||
119 | |||
120 | |||
121 | /* | ||
122 | * Frame Buffer Name | ||
123 | */ | ||
124 | |||
125 | static char retz3fb_name[16] = "RetinaZ3"; | ||
126 | |||
127 | |||
128 | /* | ||
129 | * A small info on how to convert XFree86 timing values into fb | ||
130 | * timings - by Frank Neumann: | ||
131 | * | ||
132 | An XFree86 mode line consists of the following fields: | ||
133 | "800x600" 50 800 856 976 1040 600 637 643 666 | ||
134 | < name > DCF HR SH1 SH2 HFL VR SV1 SV2 VFL | ||
135 | |||
136 | The fields in the fb_var_screeninfo structure are: | ||
137 | unsigned long pixclock; * pixel clock in ps (pico seconds) * | ||
138 | unsigned long left_margin; * time from sync to picture * | ||
139 | unsigned long right_margin; * time from picture to sync * | ||
140 | unsigned long upper_margin; * time from sync to picture * | ||
141 | unsigned long lower_margin; | ||
142 | unsigned long hsync_len; * length of horizontal sync * | ||
143 | unsigned long vsync_len; * length of vertical sync * | ||
144 | |||
145 | 1) Pixelclock: | ||
146 | xfree: in MHz | ||
147 | fb: In Picoseconds (ps) | ||
148 | |||
149 | pixclock = 1000000 / DCF | ||
150 | |||
151 | 2) horizontal timings: | ||
152 | left_margin = HFL - SH2 | ||
153 | right_margin = SH1 - HR | ||
154 | hsync_len = SH2 - SH1 | ||
155 | |||
156 | 3) vertical timings: | ||
157 | upper_margin = VFL - SV2 | ||
158 | lower_margin = SV1 - VR | ||
159 | vsync_len = SV2 - SV1 | ||
160 | |||
161 | Good examples for VESA timings can be found in the XFree86 source tree, | ||
162 | under "programs/Xserver/hw/xfree86/doc/modeDB.txt". | ||
163 | */ | ||
164 | |||
165 | /* | ||
166 | * Predefined Video Modes | ||
167 | */ | ||
168 | |||
169 | static struct { | ||
170 | const char *name; | ||
171 | struct fb_var_screeninfo var; | ||
172 | } retz3fb_predefined[] __initdata = { | ||
173 | /* | ||
174 | * NB: it is very important to adjust the pixel-clock to the color-depth. | ||
175 | */ | ||
176 | |||
177 | { | ||
178 | "640x480", { /* 640x480, 8 bpp */ | ||
179 | 640, 480, 640, 480, 0, 0, 8, 0, | ||
180 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
181 | 0, 0, -1, -1, FB_ACCEL_NONE, 39722, 48, 16, 33, 10, 96, 2, | ||
182 | FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,FB_VMODE_NONINTERLACED | ||
183 | } | ||
184 | }, | ||
185 | /* | ||
186 | ModeLine "800x600" 36 800 824 896 1024 600 601 603 625 | ||
187 | < name > DCF HR SH1 SH2 HFL VR SV1 SV2 VFL | ||
188 | */ | ||
189 | { | ||
190 | "800x600", { /* 800x600, 8 bpp */ | ||
191 | 800, 600, 800, 600, 0, 0, 8, 0, | ||
192 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
193 | 0, 0, -1, -1, FB_ACCELF_TEXT, 27778, 64, 24, 22, 1, 120, 2, | ||
194 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED | ||
195 | } | ||
196 | }, | ||
197 | { | ||
198 | "800x600-60", { /* 800x600, 8 bpp */ | ||
199 | 800, 600, 800, 600, 0, 0, 8, 0, | ||
200 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
201 | 0, 0, -1, -1, FB_ACCELF_TEXT, 25000, 88, 40, 23, 1, 128, 4, | ||
202 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED | ||
203 | } | ||
204 | }, | ||
205 | { | ||
206 | "800x600-70", { /* 800x600, 8 bpp */ | ||
207 | 800, 600, 800, 600, 0, 0, 8, 0, | ||
208 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
209 | 0, 0, -1, -1, FB_ACCELF_TEXT, 22272, 40, 24, 15, 9, 144, 12, | ||
210 | FB_SYNC_COMP_HIGH_ACT, FB_VMODE_NONINTERLACED | ||
211 | } | ||
212 | }, | ||
213 | /* | ||
214 | ModeLine "1024x768i" 45 1024 1064 1224 1264 768 777 785 817 interlace | ||
215 | < name > DCF HR SH1 SH2 HFL VR SV1 SV2 VFL | ||
216 | */ | ||
217 | { | ||
218 | "1024x768i", { /* 1024x768, 8 bpp, interlaced */ | ||
219 | 1024, 768, 1024, 768, 0, 0, 8, 0, | ||
220 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
221 | 0, 0, -1, -1, FB_ACCELF_TEXT, 22222, 40, 40, 32, 9, 160, 8, | ||
222 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_INTERLACED | ||
223 | } | ||
224 | }, | ||
225 | { | ||
226 | "1024x768", { | ||
227 | 1024, 768, 1024, 768, 0, 0, 8, 0, | ||
228 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
229 | 0, 0, -1, -1, FB_ACCEL_NONE, 12500, 92, 112, 31, 2, 204, 4, | ||
230 | FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED | ||
231 | } | ||
232 | }, | ||
233 | { | ||
234 | "640x480-16", { /* 640x480, 16 bpp */ | ||
235 | 640, 480, 640, 480, 0, 0, 16, 0, | ||
236 | {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, | ||
237 | 0, 0, -1, -1, 0, 38461/2, 28, 32, 12, 10, 96, 2, | ||
238 | FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,FB_VMODE_NONINTERLACED | ||
239 | } | ||
240 | }, | ||
241 | { | ||
242 | "640x480-24", { /* 640x480, 24 bpp */ | ||
243 | 640, 480, 640, 480, 0, 0, 24, 0, | ||
244 | {8, 8, 8}, {8, 8, 8}, {8, 8, 8}, {0, 0, 0}, | ||
245 | 0, 0, -1, -1, 0, 38461/3, 28, 32, 12, 10, 96, 2, | ||
246 | FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,FB_VMODE_NONINTERLACED | ||
247 | } | ||
248 | }, | ||
249 | }; | ||
250 | |||
251 | |||
252 | #define NUM_TOTAL_MODES ARRAY_SIZE(retz3fb_predefined) | ||
253 | |||
254 | static struct fb_var_screeninfo retz3fb_default; | ||
255 | |||
256 | static int z3fb_inverse = 0; | ||
257 | static int z3fb_mode __initdata = 0; | ||
258 | |||
259 | |||
260 | /* | ||
261 | * Interface used by the world | ||
262 | */ | ||
263 | |||
264 | int retz3fb_setup(char *options); | ||
265 | |||
266 | static int retz3fb_get_fix(struct fb_fix_screeninfo *fix, int con, | ||
267 | struct fb_info *info); | ||
268 | static int retz3fb_get_var(struct fb_var_screeninfo *var, int con, | ||
269 | struct fb_info *info); | ||
270 | static int retz3fb_set_var(struct fb_var_screeninfo *var, int con, | ||
271 | struct fb_info *info); | ||
272 | static int retz3fb_get_cmap(struct fb_cmap *cmap, int kspc, int con, | ||
273 | struct fb_info *info); | ||
274 | static int retz3fb_setcolreg(unsigned int regno, unsigned int red, | ||
275 | unsigned int green, unsigned int blue, | ||
276 | unsigned int transp, struct fb_info *info); | ||
277 | static int retz3fb_blank(int blank, struct fb_info *info); | ||
278 | |||
279 | |||
280 | /* | ||
281 | * Interface to the low level console driver | ||
282 | */ | ||
283 | |||
284 | int retz3fb_init(void); | ||
285 | static int z3fb_switch(int con, struct fb_info *info); | ||
286 | static int z3fb_updatevar(int con, struct fb_info *info); | ||
287 | |||
288 | |||
289 | /* | ||
290 | * Text console acceleration | ||
291 | */ | ||
292 | |||
293 | #ifdef FBCON_HAS_CFB8 | ||
294 | static struct display_switch fbcon_retz3_8; | ||
295 | #endif | ||
296 | |||
297 | |||
298 | /* | ||
299 | * Accelerated Functions used by the low level console driver | ||
300 | */ | ||
301 | |||
302 | static void retz3_bitblt(struct display *p, | ||
303 | unsigned short curx, unsigned short cury, unsigned | ||
304 | short destx, unsigned short desty, unsigned short | ||
305 | width, unsigned short height, unsigned short cmd, | ||
306 | unsigned short mask); | ||
307 | |||
308 | /* | ||
309 | * Hardware Specific Routines | ||
310 | */ | ||
311 | |||
312 | static int retz3_encode_fix(struct fb_info *info, | ||
313 | struct fb_fix_screeninfo *fix, | ||
314 | struct retz3fb_par *par); | ||
315 | static int retz3_decode_var(struct fb_var_screeninfo *var, | ||
316 | struct retz3fb_par *par); | ||
317 | static int retz3_encode_var(struct fb_var_screeninfo *var, | ||
318 | struct retz3fb_par *par); | ||
319 | static int retz3_getcolreg(unsigned int regno, unsigned int *red, | ||
320 | unsigned int *green, unsigned int *blue, | ||
321 | unsigned int *transp, struct fb_info *info); | ||
322 | |||
323 | /* | ||
324 | * Internal routines | ||
325 | */ | ||
326 | |||
327 | static void retz3fb_get_par(struct fb_info *info, struct retz3fb_par *par); | ||
328 | static void retz3fb_set_par(struct fb_info *info, struct retz3fb_par *par); | ||
329 | static int do_fb_set_var(struct fb_info *info, | ||
330 | struct fb_var_screeninfo *var, int isactive); | ||
331 | static void retz3fb_set_disp(int con, struct fb_info *info); | ||
332 | static int get_video_mode(const char *name); | ||
333 | |||
334 | |||
335 | /* -------------------- Hardware specific routines ------------------------- */ | ||
336 | |||
337 | static unsigned short find_fq(unsigned int freq) | ||
338 | { | ||
339 | unsigned long f; | ||
340 | long tmp; | ||
341 | long prev = 0x7fffffff; | ||
342 | long n2, n1 = 3; | ||
343 | unsigned long m; | ||
344 | unsigned short res = 0; | ||
345 | |||
346 | if (freq <= 31250000) | ||
347 | n2 = 3; | ||
348 | else if (freq <= 62500000) | ||
349 | n2 = 2; | ||
350 | else if (freq <= 125000000) | ||
351 | n2 = 1; | ||
352 | else if (freq <= 250000000) | ||
353 | n2 = 0; | ||
354 | else | ||
355 | return 0; | ||
356 | |||
357 | |||
358 | do { | ||
359 | f = freq >> (10 - n2); | ||
360 | |||
361 | m = (f * n1) / (14318180/1024); | ||
362 | |||
363 | if (m > 129) | ||
364 | break; | ||
365 | |||
366 | tmp = (((m * 14318180) >> n2) / n1) - freq; | ||
367 | if (tmp < 0) | ||
368 | tmp = -tmp; | ||
369 | |||
370 | if (tmp < prev) { | ||
371 | prev = tmp; | ||
372 | res = (((n2 << 5) | (n1-2)) << 8) | (m-2); | ||
373 | } | ||
374 | |||
375 | } while ( (++n1) <= 21); | ||
376 | |||
377 | return res; | ||
378 | } | ||
379 | |||
380 | |||
381 | static int retz3_set_video(struct fb_info *info, | ||
382 | struct fb_var_screeninfo *var, | ||
383 | struct retz3fb_par *par) | ||
384 | { | ||
385 | volatile unsigned char *regs = retz3info(info)->regs; | ||
386 | unsigned int freq; | ||
387 | |||
388 | int xres, hfront, hsync, hback; | ||
389 | int yres, vfront, vsync, vback; | ||
390 | unsigned char tmp; | ||
391 | unsigned short best_freq; | ||
392 | struct display_data data; | ||
393 | |||
394 | short clocksel = 0; /* Apparantly this is always zero */ | ||
395 | |||
396 | int bpp = var->bits_per_pixel; | ||
397 | |||
398 | /* | ||
399 | * XXX | ||
400 | */ | ||
401 | if (bpp == 24) | ||
402 | return 0; | ||
403 | |||
404 | if ((bpp != 8) && (bpp != 16) && (bpp != 24)) | ||
405 | return -EFAULT; | ||
406 | |||
407 | par->xoffset = 0; | ||
408 | par->yoffset = 0; | ||
409 | |||
410 | xres = var->xres * bpp / 4; | ||
411 | hfront = var->right_margin * bpp / 4; | ||
412 | hsync = var->hsync_len * bpp / 4; | ||
413 | hback = var->left_margin * bpp / 4; | ||
414 | |||
415 | if (var->vmode & FB_VMODE_DOUBLE) | ||
416 | { | ||
417 | yres = var->yres * 2; | ||
418 | vfront = var->lower_margin * 2; | ||
419 | vsync = var->vsync_len * 2; | ||
420 | vback = var->upper_margin * 2; | ||
421 | } | ||
422 | else if (var->vmode & FB_VMODE_INTERLACED) | ||
423 | { | ||
424 | yres = (var->yres + 1) / 2; | ||
425 | vfront = (var->lower_margin + 1) / 2; | ||
426 | vsync = (var->vsync_len + 1) / 2; | ||
427 | vback = (var->upper_margin + 1) / 2; | ||
428 | } | ||
429 | else | ||
430 | { | ||
431 | yres = var->yres; /* -1 ? */ | ||
432 | vfront = var->lower_margin; | ||
433 | vsync = var->vsync_len; | ||
434 | vback = var->upper_margin; | ||
435 | } | ||
436 | |||
437 | data.h_total = (hback / 8) + (xres / 8) | ||
438 | + (hfront / 8) + (hsync / 8) - 1 /* + 1 */; | ||
439 | data.h_dispend = ((xres + bpp - 1)/ 8) - 1; | ||
440 | data.h_bstart = xres / 8 - 1 /* + 1 */; | ||
441 | |||
442 | data.h_bstop = data.h_total+1 + 2 + 1; | ||
443 | data.h_sstart = (xres / 8) + (hfront / 8) + 1; | ||
444 | data.h_sstop = (xres / 8) + (hfront / 8) + (hsync / 8) + 1; | ||
445 | |||
446 | data.v_total = yres + vfront + vsync + vback - 1; | ||
447 | |||
448 | data.v_dispend = yres - 1; | ||
449 | data.v_bstart = yres - 1; | ||
450 | |||
451 | data.v_bstop = data.v_total; | ||
452 | data.v_sstart = yres + vfront - 1 - 2; | ||
453 | data.v_sstop = yres + vfront + vsync - 1; | ||
454 | |||
455 | #if 0 /* testing */ | ||
456 | |||
457 | printk("HBS: %i\n", data.h_bstart); | ||
458 | printk("HSS: %i\n", data.h_sstart); | ||
459 | printk("HSE: %i\n", data.h_sstop); | ||
460 | printk("HBE: %i\n", data.h_bstop); | ||
461 | printk("HT: %i\n", data.h_total); | ||
462 | |||
463 | printk("hsync: %i\n", hsync); | ||
464 | printk("hfront: %i\n", hfront); | ||
465 | printk("hback: %i\n", hback); | ||
466 | |||
467 | printk("VBS: %i\n", data.v_bstart); | ||
468 | printk("VSS: %i\n", data.v_sstart); | ||
469 | printk("VSE: %i\n", data.v_sstop); | ||
470 | printk("VBE: %i\n", data.v_bstop); | ||
471 | printk("VT: %i\n", data.v_total); | ||
472 | |||
473 | printk("vsync: %i\n", vsync); | ||
474 | printk("vfront: %i\n", vfront); | ||
475 | printk("vback: %i\n", vback); | ||
476 | #endif | ||
477 | |||
478 | if (data.v_total >= 1024) | ||
479 | printk(KERN_ERR "MAYDAY: v_total >= 1024; bailing out!\n"); | ||
480 | |||
481 | reg_w(regs, GREG_MISC_OUTPUT_W, 0xe3 | ((clocksel & 3) * 0x04)); | ||
482 | reg_w(regs, GREG_FEATURE_CONTROL_W, 0x00); | ||
483 | |||
484 | seq_w(regs, SEQ_RESET, 0x00); | ||
485 | seq_w(regs, SEQ_RESET, 0x03); /* reset sequencer logic */ | ||
486 | |||
487 | /* | ||
488 | * CLOCKING_MODE bits: | ||
489 | * 2: This one is only set for certain text-modes, wonder if | ||
490 | * it may be for EGA-lines? (it was referred to as CLKDIV2) | ||
491 | * (The CL drivers sets it to 0x21 with the comment: | ||
492 | * FullBandwidth (video off) and 8/9 dot clock) | ||
493 | */ | ||
494 | seq_w(regs, SEQ_CLOCKING_MODE, 0x01 | 0x00 /* 0x08 */); | ||
495 | |||
496 | seq_w(regs, SEQ_MAP_MASK, 0x0f); /* enable writing to plane 0-3 */ | ||
497 | seq_w(regs, SEQ_CHAR_MAP_SELECT, 0x00); /* doesn't matter in gfx-mode */ | ||
498 | seq_w(regs, SEQ_MEMORY_MODE, 0x06); /* CL driver says 0x0e for 256 col mode*/ | ||
499 | seq_w(regs, SEQ_RESET, 0x01); | ||
500 | seq_w(regs, SEQ_RESET, 0x03); | ||
501 | |||
502 | seq_w(regs, SEQ_EXTENDED_ENABLE, 0x05); | ||
503 | |||
504 | seq_w(regs, SEQ_CURSOR_CONTROL, 0x00); /* disable cursor */ | ||
505 | seq_w(regs, SEQ_PRIM_HOST_OFF_HI, 0x00); | ||
506 | seq_w(regs, SEQ_PRIM_HOST_OFF_HI, 0x00); | ||
507 | seq_w(regs, SEQ_LINEAR_0, 0x4a); | ||
508 | seq_w(regs, SEQ_LINEAR_1, 0x00); | ||
509 | |||
510 | seq_w(regs, SEQ_SEC_HOST_OFF_HI, 0x00); | ||
511 | seq_w(regs, SEQ_SEC_HOST_OFF_LO, 0x00); | ||
512 | seq_w(regs, SEQ_EXTENDED_MEM_ENA, 0x3 | 0x4 | 0x10 | 0x40); | ||
513 | |||
514 | /* | ||
515 | * The lower 4 bits (0-3) are used to set the font-width for | ||
516 | * text-mode - DON'T try to set this for gfx-mode. | ||
517 | */ | ||
518 | seq_w(regs, SEQ_EXT_CLOCK_MODE, 0x10); | ||
519 | seq_w(regs, SEQ_EXT_VIDEO_ADDR, 0x03); | ||
520 | |||
521 | /* | ||
522 | * Extended Pixel Control: | ||
523 | * bit 0: text-mode=0, gfx-mode=1 (Graphics Byte ?) | ||
524 | * bit 1: (Packed/Nibble Pixel Format ?) | ||
525 | * bit 4-5: depth, 0=1-8bpp, 1=9-16bpp, 2=17-24bpp | ||
526 | */ | ||
527 | seq_w(regs, SEQ_EXT_PIXEL_CNTL, 0x01 | (((bpp / 8) - 1) << 4)); | ||
528 | |||
529 | seq_w(regs, SEQ_BUS_WIDTH_FEEDB, 0x04); | ||
530 | seq_w(regs, SEQ_COLOR_EXP_WFG, 0x01); | ||
531 | seq_w(regs, SEQ_COLOR_EXP_WBG, 0x00); | ||
532 | seq_w(regs, SEQ_EXT_RW_CONTROL, 0x00); | ||
533 | seq_w(regs, SEQ_MISC_FEATURE_SEL, (0x51 | (clocksel & 8))); | ||
534 | seq_w(regs, SEQ_COLOR_KEY_CNTL, 0x40); | ||
535 | seq_w(regs, SEQ_COLOR_KEY_MATCH0, 0x00); | ||
536 | seq_w(regs, SEQ_COLOR_KEY_MATCH1, 0x00); | ||
537 | seq_w(regs, SEQ_COLOR_KEY_MATCH2, 0x00); | ||
538 | seq_w(regs, SEQ_CRC_CONTROL, 0x00); | ||
539 | seq_w(regs, SEQ_PERF_SELECT, 0x10); | ||
540 | seq_w(regs, SEQ_ACM_APERTURE_1, 0x00); | ||
541 | seq_w(regs, SEQ_ACM_APERTURE_2, 0x30); | ||
542 | seq_w(regs, SEQ_ACM_APERTURE_3, 0x00); | ||
543 | seq_w(regs, SEQ_MEMORY_MAP_CNTL, 0x03); | ||
544 | |||
545 | |||
546 | /* unlock register CRT0..CRT7 */ | ||
547 | crt_w(regs, CRT_END_VER_RETR, (data.v_sstop & 0x0f) | 0x20); | ||
548 | |||
549 | /* Zuerst zu schreibende Werte nur per printk ausgeben */ | ||
550 | DEBUG printk("CRT_HOR_TOTAL: %ld\n", data.h_total); | ||
551 | crt_w(regs, CRT_HOR_TOTAL, data.h_total & 0xff); | ||
552 | |||
553 | DEBUG printk("CRT_HOR_DISP_ENA_END: %ld\n", data.h_dispend); | ||
554 | crt_w(regs, CRT_HOR_DISP_ENA_END, (data.h_dispend) & 0xff); | ||
555 | |||
556 | DEBUG printk("CRT_START_HOR_BLANK: %ld\n", data.h_bstart); | ||
557 | crt_w(regs, CRT_START_HOR_BLANK, data.h_bstart & 0xff); | ||
558 | |||
559 | DEBUG printk("CRT_END_HOR_BLANK: 128+%ld\n", data.h_bstop % 32); | ||
560 | crt_w(regs, CRT_END_HOR_BLANK, 0x80 | (data.h_bstop & 0x1f)); | ||
561 | |||
562 | DEBUG printk("CRT_START_HOR_RETR: %ld\n", data.h_sstart); | ||
563 | crt_w(regs, CRT_START_HOR_RETR, data.h_sstart & 0xff); | ||
564 | |||
565 | tmp = (data.h_sstop & 0x1f); | ||
566 | if (data.h_bstop & 0x20) | ||
567 | tmp |= 0x80; | ||
568 | DEBUG printk("CRT_END_HOR_RETR: %d\n", tmp); | ||
569 | crt_w(regs, CRT_END_HOR_RETR, tmp); | ||
570 | |||
571 | DEBUG printk("CRT_VER_TOTAL: %ld\n", data.v_total & 0xff); | ||
572 | crt_w(regs, CRT_VER_TOTAL, (data.v_total & 0xff)); | ||
573 | |||
574 | tmp = 0x10; /* LineCompare bit #9 */ | ||
575 | if (data.v_total & 256) | ||
576 | tmp |= 0x01; | ||
577 | if (data.v_dispend & 256) | ||
578 | tmp |= 0x02; | ||
579 | if (data.v_sstart & 256) | ||
580 | tmp |= 0x04; | ||
581 | if (data.v_bstart & 256) | ||
582 | tmp |= 0x08; | ||
583 | if (data.v_total & 512) | ||
584 | tmp |= 0x20; | ||
585 | if (data.v_dispend & 512) | ||
586 | tmp |= 0x40; | ||
587 | if (data.v_sstart & 512) | ||
588 | tmp |= 0x80; | ||
589 | DEBUG printk("CRT_OVERFLOW: %d\n", tmp); | ||
590 | crt_w(regs, CRT_OVERFLOW, tmp); | ||
591 | |||
592 | crt_w(regs, CRT_PRESET_ROW_SCAN, 0x00); /* not CL !!! */ | ||
593 | |||
594 | tmp = 0x40; /* LineCompare bit #8 */ | ||
595 | if (data.v_bstart & 512) | ||
596 | tmp |= 0x20; | ||
597 | if (var->vmode & FB_VMODE_DOUBLE) | ||
598 | tmp |= 0x80; | ||
599 | DEBUG printk("CRT_MAX_SCAN_LINE: %d\n", tmp); | ||
600 | crt_w(regs, CRT_MAX_SCAN_LINE, tmp); | ||
601 | |||
602 | crt_w(regs, CRT_CURSOR_START, 0x00); | ||
603 | crt_w(regs, CRT_CURSOR_END, 8 & 0x1f); /* font height */ | ||
604 | |||
605 | crt_w(regs, CRT_START_ADDR_HIGH, 0x00); | ||
606 | crt_w(regs, CRT_START_ADDR_LOW, 0x00); | ||
607 | |||
608 | crt_w(regs, CRT_CURSOR_LOC_HIGH, 0x00); | ||
609 | crt_w(regs, CRT_CURSOR_LOC_LOW, 0x00); | ||
610 | |||
611 | DEBUG printk("CRT_START_VER_RETR: %ld\n", data.v_sstart & 0xff); | ||
612 | crt_w(regs, CRT_START_VER_RETR, (data.v_sstart & 0xff)); | ||
613 | |||
614 | #if 1 | ||
615 | /* 5 refresh cycles per scanline */ | ||
616 | DEBUG printk("CRT_END_VER_RETR: 64+32+%ld\n", data.v_sstop % 16); | ||
617 | crt_w(regs, CRT_END_VER_RETR, ((data.v_sstop & 0x0f) | 0x40 | 0x20)); | ||
618 | #else | ||
619 | DEBUG printk("CRT_END_VER_RETR: 128+32+%ld\n", data.v_sstop % 16); | ||
620 | crt_w(regs, CRT_END_VER_RETR, ((data.v_sstop & 0x0f) | 128 | 32)); | ||
621 | #endif | ||
622 | DEBUG printk("CRT_VER_DISP_ENA_END: %ld\n", data.v_dispend & 0xff); | ||
623 | crt_w(regs, CRT_VER_DISP_ENA_END, (data.v_dispend & 0xff)); | ||
624 | |||
625 | DEBUG printk("CRT_START_VER_BLANK: %ld\n", data.v_bstart & 0xff); | ||
626 | crt_w(regs, CRT_START_VER_BLANK, (data.v_bstart & 0xff)); | ||
627 | |||
628 | DEBUG printk("CRT_END_VER_BLANK: %ld\n", data.v_bstop & 0xff); | ||
629 | crt_w(regs, CRT_END_VER_BLANK, (data.v_bstop & 0xff)); | ||
630 | |||
631 | DEBUG printk("CRT_MODE_CONTROL: 0xe3\n"); | ||
632 | crt_w(regs, CRT_MODE_CONTROL, 0xe3); | ||
633 | |||
634 | DEBUG printk("CRT_LINE_COMPARE: 0xff\n"); | ||
635 | crt_w(regs, CRT_LINE_COMPARE, 0xff); | ||
636 | |||
637 | tmp = (var->xres_virtual / 8) * (bpp / 8); | ||
638 | crt_w(regs, CRT_OFFSET, tmp); | ||
639 | |||
640 | crt_w(regs, CRT_UNDERLINE_LOC, 0x07); /* probably font-height - 1 */ | ||
641 | |||
642 | tmp = 0x20; /* Enable extended end bits */ | ||
643 | if (data.h_total & 0x100) | ||
644 | tmp |= 0x01; | ||
645 | if ((data.h_dispend) & 0x100) | ||
646 | tmp |= 0x02; | ||
647 | if (data.h_bstart & 0x100) | ||
648 | tmp |= 0x04; | ||
649 | if (data.h_sstart & 0x100) | ||
650 | tmp |= 0x08; | ||
651 | if (var->vmode & FB_VMODE_INTERLACED) | ||
652 | tmp |= 0x10; | ||
653 | DEBUG printk("CRT_EXT_HOR_TIMING1: %d\n", tmp); | ||
654 | crt_w(regs, CRT_EXT_HOR_TIMING1, tmp); | ||
655 | |||
656 | tmp = 0x00; | ||
657 | if (((var->xres_virtual / 8) * (bpp / 8)) & 0x100) | ||
658 | tmp |= 0x10; | ||
659 | crt_w(regs, CRT_EXT_START_ADDR, tmp); | ||
660 | |||
661 | tmp = 0x00; | ||
662 | if (data.h_total & 0x200) | ||
663 | tmp |= 0x01; | ||
664 | if ((data.h_dispend) & 0x200) | ||
665 | tmp |= 0x02; | ||
666 | if (data.h_bstart & 0x200) | ||
667 | tmp |= 0x04; | ||
668 | if (data.h_sstart & 0x200) | ||
669 | tmp |= 0x08; | ||
670 | tmp |= ((data.h_bstop & 0xc0) >> 2); | ||
671 | tmp |= ((data.h_sstop & 0x60) << 1); | ||
672 | crt_w(regs, CRT_EXT_HOR_TIMING2, tmp); | ||
673 | DEBUG printk("CRT_EXT_HOR_TIMING2: %d\n", tmp); | ||
674 | |||
675 | tmp = 0x10; /* Line compare bit 10 */ | ||
676 | if (data.v_total & 0x400) | ||
677 | tmp |= 0x01; | ||
678 | if ((data.v_dispend) & 0x400) | ||
679 | tmp |= 0x02; | ||
680 | if (data.v_bstart & 0x400) | ||
681 | tmp |= 0x04; | ||
682 | if (data.v_sstart & 0x400) | ||
683 | tmp |= 0x08; | ||
684 | tmp |= ((data.v_bstop & 0x300) >> 3); | ||
685 | if (data.v_sstop & 0x10) | ||
686 | tmp |= 0x80; | ||
687 | crt_w(regs, CRT_EXT_VER_TIMING, tmp); | ||
688 | DEBUG printk("CRT_EXT_VER_TIMING: %d\n", tmp); | ||
689 | |||
690 | crt_w(regs, CRT_MONITOR_POWER, 0x00); | ||
691 | |||
692 | /* | ||
693 | * Convert from ps to Hz. | ||
694 | */ | ||
695 | freq = 2000000000 / var->pixclock; | ||
696 | freq = freq * 500; | ||
697 | |||
698 | best_freq = find_fq(freq); | ||
699 | pll_w(regs, 0x02, best_freq); | ||
700 | best_freq = find_fq(61000000); | ||
701 | pll_w(regs, 0x0a, best_freq); | ||
702 | pll_w(regs, 0x0e, 0x22); | ||
703 | |||
704 | gfx_w(regs, GFX_SET_RESET, 0x00); | ||
705 | gfx_w(regs, GFX_ENABLE_SET_RESET, 0x00); | ||
706 | gfx_w(regs, GFX_COLOR_COMPARE, 0x00); | ||
707 | gfx_w(regs, GFX_DATA_ROTATE, 0x00); | ||
708 | gfx_w(regs, GFX_READ_MAP_SELECT, 0x00); | ||
709 | gfx_w(regs, GFX_GRAPHICS_MODE, 0x00); | ||
710 | gfx_w(regs, GFX_MISC, 0x05); | ||
711 | gfx_w(regs, GFX_COLOR_XCARE, 0x0f); | ||
712 | gfx_w(regs, GFX_BITMASK, 0xff); | ||
713 | |||
714 | reg_r(regs, ACT_ADDRESS_RESET); | ||
715 | attr_w(regs, ACT_PALETTE0 , 0x00); | ||
716 | attr_w(regs, ACT_PALETTE1 , 0x01); | ||
717 | attr_w(regs, ACT_PALETTE2 , 0x02); | ||
718 | attr_w(regs, ACT_PALETTE3 , 0x03); | ||
719 | attr_w(regs, ACT_PALETTE4 , 0x04); | ||
720 | attr_w(regs, ACT_PALETTE5 , 0x05); | ||
721 | attr_w(regs, ACT_PALETTE6 , 0x06); | ||
722 | attr_w(regs, ACT_PALETTE7 , 0x07); | ||
723 | attr_w(regs, ACT_PALETTE8 , 0x08); | ||
724 | attr_w(regs, ACT_PALETTE9 , 0x09); | ||
725 | attr_w(regs, ACT_PALETTE10, 0x0a); | ||
726 | attr_w(regs, ACT_PALETTE11, 0x0b); | ||
727 | attr_w(regs, ACT_PALETTE12, 0x0c); | ||
728 | attr_w(regs, ACT_PALETTE13, 0x0d); | ||
729 | attr_w(regs, ACT_PALETTE14, 0x0e); | ||
730 | attr_w(regs, ACT_PALETTE15, 0x0f); | ||
731 | reg_r(regs, ACT_ADDRESS_RESET); | ||
732 | |||
733 | attr_w(regs, ACT_ATTR_MODE_CNTL, 0x09); /* 0x01 for CL */ | ||
734 | |||
735 | attr_w(regs, ACT_OVERSCAN_COLOR, 0x00); | ||
736 | attr_w(regs, ACT_COLOR_PLANE_ENA, 0x0f); | ||
737 | attr_w(regs, ACT_HOR_PEL_PANNING, 0x00); | ||
738 | attr_w(regs, ACT_COLOR_SELECT, 0x00); | ||
739 | |||
740 | reg_r(regs, ACT_ADDRESS_RESET); | ||
741 | reg_w(regs, ACT_DATA, 0x20); | ||
742 | |||
743 | reg_w(regs, VDAC_MASK, 0xff); | ||
744 | |||
745 | /* | ||
746 | * Extended palette addressing ??? | ||
747 | */ | ||
748 | switch (bpp){ | ||
749 | case 8: | ||
750 | reg_w(regs, 0x83c6, 0x00); | ||
751 | break; | ||
752 | case 16: | ||
753 | reg_w(regs, 0x83c6, 0x60); | ||
754 | break; | ||
755 | case 24: | ||
756 | reg_w(regs, 0x83c6, 0xe0); | ||
757 | break; | ||
758 | default: | ||
759 | printk(KERN_INFO "Illegal color-depth: %i\n", bpp); | ||
760 | } | ||
761 | |||
762 | reg_w(regs, VDAC_ADDRESS, 0x00); | ||
763 | |||
764 | seq_w(regs, SEQ_MAP_MASK, 0x0f ); | ||
765 | |||
766 | return 0; | ||
767 | } | ||
768 | |||
769 | |||
770 | /* | ||
771 | * This function should fill in the `fix' structure based on the | ||
772 | * values in the `par' structure. | ||
773 | */ | ||
774 | |||
775 | static int retz3_encode_fix(struct fb_info *info, | ||
776 | struct fb_fix_screeninfo *fix, | ||
777 | struct retz3fb_par *par) | ||
778 | { | ||
779 | struct retz3_fb_info *zinfo = retz3info(info); | ||
780 | |||
781 | memset(fix, 0, sizeof(struct fb_fix_screeninfo)); | ||
782 | strcpy(fix->id, retz3fb_name); | ||
783 | fix->smem_start = zinfo->physfbmem; | ||
784 | fix->smem_len = zinfo->fbsize; | ||
785 | fix->mmio_start = zinfo->physregs; | ||
786 | fix->mmio_len = 0x00c00000; | ||
787 | |||
788 | fix->type = FB_TYPE_PACKED_PIXELS; | ||
789 | fix->type_aux = 0; | ||
790 | if (par->bpp == 8) | ||
791 | fix->visual = FB_VISUAL_PSEUDOCOLOR; | ||
792 | else | ||
793 | fix->visual = FB_VISUAL_TRUECOLOR; | ||
794 | |||
795 | fix->xpanstep = 0; | ||
796 | fix->ypanstep = 0; | ||
797 | fix->ywrapstep = 0; | ||
798 | fix->line_length = 0; | ||
799 | |||
800 | fix->accel = FB_ACCEL_NCR_77C32BLT; | ||
801 | |||
802 | return 0; | ||
803 | } | ||
804 | |||
805 | |||
806 | /* | ||
807 | * Get the video params out of `var'. If a value doesn't fit, round | ||
808 | * it up, if it's too big, return -EINVAL. | ||
809 | */ | ||
810 | |||
811 | static int retz3_decode_var(struct fb_var_screeninfo *var, | ||
812 | struct retz3fb_par *par) | ||
813 | { | ||
814 | par->xres = var->xres; | ||
815 | par->yres = var->yres; | ||
816 | par->xres_vir = var->xres_virtual; | ||
817 | par->yres_vir = var->yres_virtual; | ||
818 | par->bpp = var->bits_per_pixel; | ||
819 | par->pixclock = var->pixclock; | ||
820 | par->vmode = var->vmode; | ||
821 | |||
822 | par->red = var->red; | ||
823 | par->green = var->green; | ||
824 | par->blue = var->blue; | ||
825 | par->transp = var->transp; | ||
826 | |||
827 | par->left_margin = var->left_margin; | ||
828 | par->right_margin = var->right_margin; | ||
829 | par->upper_margin = var->upper_margin; | ||
830 | par->lower_margin = var->lower_margin; | ||
831 | par->hsync_len = var->hsync_len; | ||
832 | par->vsync_len = var->vsync_len; | ||
833 | |||
834 | if (var->accel_flags & FB_ACCELF_TEXT) | ||
835 | par->accel = FB_ACCELF_TEXT; | ||
836 | else | ||
837 | par->accel = 0; | ||
838 | |||
839 | return 0; | ||
840 | } | ||
841 | |||
842 | |||
843 | /* | ||
844 | * Fill the `var' structure based on the values in `par' and maybe | ||
845 | * other values read out of the hardware. | ||
846 | */ | ||
847 | |||
848 | static int retz3_encode_var(struct fb_var_screeninfo *var, | ||
849 | struct retz3fb_par *par) | ||
850 | { | ||
851 | memset(var, 0, sizeof(struct fb_var_screeninfo)); | ||
852 | var->xres = par->xres; | ||
853 | var->yres = par->yres; | ||
854 | var->xres_virtual = par->xres_vir; | ||
855 | var->yres_virtual = par->yres_vir; | ||
856 | var->xoffset = 0; | ||
857 | var->yoffset = 0; | ||
858 | |||
859 | var->bits_per_pixel = par->bpp; | ||
860 | var->grayscale = 0; | ||
861 | |||
862 | var->red = par->red; | ||
863 | var->green = par->green; | ||
864 | var->blue = par->blue; | ||
865 | var->transp = par->transp; | ||
866 | |||
867 | var->nonstd = 0; | ||
868 | var->activate = 0; | ||
869 | |||
870 | var->height = -1; | ||
871 | var->width = -1; | ||
872 | |||
873 | var->accel_flags = (par->accel && par->bpp == 8) ? FB_ACCELF_TEXT : 0; | ||
874 | |||
875 | var->pixclock = par->pixclock; | ||
876 | |||
877 | var->sync = 0; /* ??? */ | ||
878 | var->left_margin = par->left_margin; | ||
879 | var->right_margin = par->right_margin; | ||
880 | var->upper_margin = par->upper_margin; | ||
881 | var->lower_margin = par->lower_margin; | ||
882 | var->hsync_len = par->hsync_len; | ||
883 | var->vsync_len = par->vsync_len; | ||
884 | |||
885 | var->vmode = par->vmode; | ||
886 | return 0; | ||
887 | } | ||
888 | |||
889 | |||
890 | /* | ||
891 | * Set a single color register. Return != 0 for invalid regno. | ||
892 | */ | ||
893 | |||
894 | static int retz3fb_setcolreg(unsigned int regno, unsigned int red, | ||
895 | unsigned int green, unsigned int blue, | ||
896 | unsigned int transp, struct fb_info *info) | ||
897 | { | ||
898 | struct retz3_fb_info *zinfo = retz3info(info); | ||
899 | volatile unsigned char *regs = zinfo->regs; | ||
900 | |||
901 | /* We'll get to this */ | ||
902 | |||
903 | if (regno > 255) | ||
904 | return 1; | ||
905 | |||
906 | red >>= 10; | ||
907 | green >>= 10; | ||
908 | blue >>= 10; | ||
909 | |||
910 | zinfo->color_table[regno][0] = red; | ||
911 | zinfo->color_table[regno][1] = green; | ||
912 | zinfo->color_table[regno][2] = blue; | ||
913 | |||
914 | reg_w(regs, VDAC_ADDRESS_W, regno); | ||
915 | reg_w(regs, VDAC_DATA, red); | ||
916 | reg_w(regs, VDAC_DATA, green); | ||
917 | reg_w(regs, VDAC_DATA, blue); | ||
918 | |||
919 | return 0; | ||
920 | } | ||
921 | |||
922 | |||
923 | /* | ||
924 | * Read a single color register and split it into | ||
925 | * colors/transparent. Return != 0 for invalid regno. | ||
926 | */ | ||
927 | |||
928 | static int retz3_getcolreg(unsigned int regno, unsigned int *red, | ||
929 | unsigned int *green, unsigned int *blue, | ||
930 | unsigned int *transp, struct fb_info *info) | ||
931 | { | ||
932 | struct retz3_fb_info *zinfo = retz3info(info); | ||
933 | int t; | ||
934 | |||
935 | if (regno > 255) | ||
936 | return 1; | ||
937 | t = zinfo->color_table[regno][0]; | ||
938 | *red = (t<<10) | (t<<4) | (t>>2); | ||
939 | t = zinfo->color_table[regno][1]; | ||
940 | *green = (t<<10) | (t<<4) | (t>>2); | ||
941 | t = zinfo->color_table[regno][2]; | ||
942 | *blue = (t<<10) | (t<<4) | (t>>2); | ||
943 | *transp = 0; | ||
944 | return 0; | ||
945 | } | ||
946 | |||
947 | |||
948 | static inline void retz3_busy(struct display *p) | ||
949 | { | ||
950 | struct retz3_fb_info *zinfo = retz3info(p->fb_info); | ||
951 | volatile unsigned char *acm = zinfo->base + ACM_OFFSET; | ||
952 | unsigned char blt_status; | ||
953 | |||
954 | if (zinfo->blitbusy) { | ||
955 | do{ | ||
956 | blt_status = *((acm) + (ACM_START_STATUS + 2)); | ||
957 | }while ((blt_status & 1) == 0); | ||
958 | zinfo->blitbusy = 0; | ||
959 | } | ||
960 | } | ||
961 | |||
962 | |||
963 | static void retz3_bitblt (struct display *p, | ||
964 | unsigned short srcx, unsigned short srcy, | ||
965 | unsigned short destx, unsigned short desty, | ||
966 | unsigned short width, unsigned short height, | ||
967 | unsigned short cmd, unsigned short mask) | ||
968 | { | ||
969 | struct fb_var_screeninfo *var = &p->var; | ||
970 | struct retz3_fb_info *zinfo = retz3info(p->fb_info); | ||
971 | volatile unsigned long *acm = (unsigned long *)(zinfo->base + ACM_OFFSET); | ||
972 | unsigned long *pattern = (unsigned long *)(zinfo->fbmem + PAT_MEM_OFF); | ||
973 | |||
974 | unsigned short mod; | ||
975 | unsigned long tmp; | ||
976 | unsigned long pat, src, dst; | ||
977 | |||
978 | int i, xres_virtual = var->xres_virtual; | ||
979 | short bpp = (var->bits_per_pixel & 0xff); | ||
980 | |||
981 | if (bpp < 8) | ||
982 | bpp = 8; | ||
983 | |||
984 | tmp = mask | (mask << 16); | ||
985 | |||
986 | retz3_busy(p); | ||
987 | |||
988 | i = 0; | ||
989 | do{ | ||
990 | *pattern++ = tmp; | ||
991 | }while(i++ < bpp/4); | ||
992 | |||
993 | tmp = cmd << 8; | ||
994 | *(acm + ACM_RASTEROP_ROTATION/4) = tmp; | ||
995 | |||
996 | mod = 0xc0c2; | ||
997 | |||
998 | pat = 8 * PAT_MEM_OFF; | ||
999 | dst = bpp * (destx + desty * xres_virtual); | ||
1000 | |||
1001 | /* | ||
1002 | * Source is not set for clear. | ||
1003 | */ | ||
1004 | if ((cmd != Z3BLTclear) && (cmd != Z3BLTset)) { | ||
1005 | src = bpp * (srcx + srcy * xres_virtual); | ||
1006 | |||
1007 | if (destx > srcx) { | ||
1008 | mod &= ~0x8000; | ||
1009 | src += bpp * (width - 1); | ||
1010 | dst += bpp * (width - 1); | ||
1011 | pat += bpp * 2; | ||
1012 | } | ||
1013 | if (desty > srcy) { | ||
1014 | mod &= ~0x4000; | ||
1015 | src += bpp * (height - 1) * xres_virtual; | ||
1016 | dst += bpp * (height - 1) * xres_virtual; | ||
1017 | pat += bpp * 4; | ||
1018 | } | ||
1019 | |||
1020 | *(acm + ACM_SOURCE/4) = cpu_to_le32(src); | ||
1021 | } | ||
1022 | |||
1023 | *(acm + ACM_PATTERN/4) = cpu_to_le32(pat); | ||
1024 | |||
1025 | *(acm + ACM_DESTINATION/4) = cpu_to_le32(dst); | ||
1026 | |||
1027 | tmp = mod << 16; | ||
1028 | *(acm + ACM_CONTROL/4) = tmp; | ||
1029 | |||
1030 | tmp = width | (height << 16); | ||
1031 | |||
1032 | *(acm + ACM_BITMAP_DIMENSION/4) = cpu_to_le32(tmp); | ||
1033 | |||
1034 | *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x00; | ||
1035 | *(((volatile unsigned char *)acm) + ACM_START_STATUS) = 0x01; | ||
1036 | zinfo->blitbusy = 1; | ||
1037 | } | ||
1038 | |||
1039 | #if 0 | ||
1040 | /* | ||
1041 | * Move cursor to x, y | ||
1042 | */ | ||
1043 | static void retz3_MoveCursor (unsigned short x, unsigned short y) | ||
1044 | { | ||
1045 | /* Guess we gotta deal with the cursor at some point */ | ||
1046 | } | ||
1047 | #endif | ||
1048 | |||
1049 | |||
1050 | /* | ||
1051 | * Fill the hardware's `par' structure. | ||
1052 | */ | ||
1053 | |||
1054 | static void retz3fb_get_par(struct fb_info *info, struct retz3fb_par *par) | ||
1055 | { | ||
1056 | struct retz3_fb_info *zinfo = retz3info(info); | ||
1057 | |||
1058 | if (zinfo->current_par_valid) | ||
1059 | *par = zinfo->current_par; | ||
1060 | else | ||
1061 | retz3_decode_var(&retz3fb_default, par); | ||
1062 | } | ||
1063 | |||
1064 | |||
1065 | static void retz3fb_set_par(struct fb_info *info, struct retz3fb_par *par) | ||
1066 | { | ||
1067 | struct retz3_fb_info *zinfo = retz3info(info); | ||
1068 | |||
1069 | zinfo->current_par = *par; | ||
1070 | zinfo->current_par_valid = 1; | ||
1071 | } | ||
1072 | |||
1073 | |||
1074 | static int do_fb_set_var(struct fb_info *info, | ||
1075 | struct fb_var_screeninfo *var, int isactive) | ||
1076 | { | ||
1077 | int err, activate; | ||
1078 | struct retz3fb_par par; | ||
1079 | struct retz3_fb_info *zinfo = retz3info(info); | ||
1080 | |||
1081 | if ((err = retz3_decode_var(var, &par))) | ||
1082 | return err; | ||
1083 | activate = var->activate; | ||
1084 | |||
1085 | /* XXX ... what to do about isactive ? */ | ||
1086 | |||
1087 | if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW && isactive) | ||
1088 | retz3fb_set_par(info, &par); | ||
1089 | retz3_encode_var(var, &par); | ||
1090 | var->activate = activate; | ||
1091 | |||
1092 | retz3_set_video(info, var, &zinfo->current_par); | ||
1093 | |||
1094 | return 0; | ||
1095 | } | ||
1096 | |||
1097 | /* | ||
1098 | * Get the Fixed Part of the Display | ||
1099 | */ | ||
1100 | |||
1101 | static int retz3fb_get_fix(struct fb_fix_screeninfo *fix, int con, | ||
1102 | struct fb_info *info) | ||
1103 | { | ||
1104 | struct retz3fb_par par; | ||
1105 | int error = 0; | ||
1106 | |||
1107 | if (con == -1) | ||
1108 | retz3fb_get_par(info, &par); | ||
1109 | else | ||
1110 | error = retz3_decode_var(&fb_display[con].var, &par); | ||
1111 | return(error ? error : retz3_encode_fix(info, fix, &par)); | ||
1112 | } | ||
1113 | |||
1114 | |||
1115 | /* | ||
1116 | * Get the User Defined Part of the Display | ||
1117 | */ | ||
1118 | |||
1119 | static int retz3fb_get_var(struct fb_var_screeninfo *var, int con, | ||
1120 | struct fb_info *info) | ||
1121 | { | ||
1122 | struct retz3fb_par par; | ||
1123 | int error = 0; | ||
1124 | |||
1125 | if (con == -1) { | ||
1126 | retz3fb_get_par(info, &par); | ||
1127 | error = retz3_encode_var(var, &par); | ||
1128 | } else | ||
1129 | *var = fb_display[con].var; | ||
1130 | return error; | ||
1131 | } | ||
1132 | |||
1133 | |||
1134 | static void retz3fb_set_disp(int con, struct fb_info *info) | ||
1135 | { | ||
1136 | struct fb_fix_screeninfo fix; | ||
1137 | struct display *display; | ||
1138 | struct retz3_fb_info *zinfo = retz3info(info); | ||
1139 | |||
1140 | if (con >= 0) | ||
1141 | display = &fb_display[con]; | ||
1142 | else | ||
1143 | display = &zinfo->disp; /* used during initialization */ | ||
1144 | |||
1145 | retz3fb_get_fix(&fix, con, info); | ||
1146 | |||
1147 | if (con == -1) | ||
1148 | con = 0; | ||
1149 | |||
1150 | display->visual = fix.visual; | ||
1151 | display->type = fix.type; | ||
1152 | display->type_aux = fix.type_aux; | ||
1153 | display->ypanstep = fix.ypanstep; | ||
1154 | display->ywrapstep = fix.ywrapstep; | ||
1155 | display->can_soft_blank = 1; | ||
1156 | display->inverse = z3fb_inverse; | ||
1157 | |||
1158 | /* | ||
1159 | * This seems to be about 20% faster. | ||
1160 | */ | ||
1161 | display->scrollmode = SCROLL_YREDRAW; | ||
1162 | |||
1163 | switch (display->var.bits_per_pixel) { | ||
1164 | #ifdef FBCON_HAS_CFB8 | ||
1165 | case 8: | ||
1166 | if (display->var.accel_flags & FB_ACCELF_TEXT) { | ||
1167 | display->dispsw = &fbcon_retz3_8; | ||
1168 | retz3_set_video(info, &display->var, &zinfo->current_par); | ||
1169 | } else | ||
1170 | display->dispsw = &fbcon_cfb8; | ||
1171 | break; | ||
1172 | #endif | ||
1173 | #ifdef FBCON_HAS_CFB16 | ||
1174 | case 16: | ||
1175 | display->dispsw = &fbcon_cfb16; | ||
1176 | break; | ||
1177 | #endif | ||
1178 | default: | ||
1179 | display->dispsw = &fbcon_dummy; | ||
1180 | break; | ||
1181 | } | ||
1182 | } | ||
1183 | |||
1184 | |||
1185 | /* | ||
1186 | * Set the User Defined Part of the Display | ||
1187 | */ | ||
1188 | |||
1189 | static int retz3fb_set_var(struct fb_var_screeninfo *var, int con, | ||
1190 | struct fb_info *info) | ||
1191 | { | ||
1192 | int err, oldxres, oldyres, oldvxres, oldvyres, oldbpp, oldaccel; | ||
1193 | struct display *display; | ||
1194 | struct retz3_fb_info *zinfo = retz3info(info); | ||
1195 | |||
1196 | if (con >= 0) | ||
1197 | display = &fb_display[con]; | ||
1198 | else | ||
1199 | display = &zinfo->disp; /* used during initialization */ | ||
1200 | |||
1201 | if ((err = do_fb_set_var(info, var, con == info->currcon))) | ||
1202 | return err; | ||
1203 | if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) { | ||
1204 | oldxres = display->var.xres; | ||
1205 | oldyres = display->var.yres; | ||
1206 | oldvxres = display->var.xres_virtual; | ||
1207 | oldvyres = display->var.yres_virtual; | ||
1208 | oldbpp = display->var.bits_per_pixel; | ||
1209 | oldaccel = display->var.accel_flags; | ||
1210 | display->var = *var; | ||
1211 | |||
1212 | if (oldxres != var->xres || oldyres != var->yres || | ||
1213 | oldvxres != var->xres_virtual || | ||
1214 | oldvyres != var->yres_virtual || | ||
1215 | oldbpp != var->bits_per_pixel || | ||
1216 | oldaccel != var->accel_flags) { | ||
1217 | |||
1218 | struct fb_fix_screeninfo fix; | ||
1219 | retz3fb_get_fix(&fix, con, info); | ||
1220 | |||
1221 | display->visual = fix.visual; | ||
1222 | display->type = fix.type; | ||
1223 | display->type_aux = fix.type_aux; | ||
1224 | display->ypanstep = fix.ypanstep; | ||
1225 | display->ywrapstep = fix.ywrapstep; | ||
1226 | display->line_length = fix.line_length; | ||
1227 | display->can_soft_blank = 1; | ||
1228 | display->inverse = z3fb_inverse; | ||
1229 | switch (display->var.bits_per_pixel) { | ||
1230 | #ifdef FBCON_HAS_CFB8 | ||
1231 | case 8: | ||
1232 | if (var->accel_flags & FB_ACCELF_TEXT) { | ||
1233 | display->dispsw = &fbcon_retz3_8; | ||
1234 | } else | ||
1235 | display->dispsw = &fbcon_cfb8; | ||
1236 | break; | ||
1237 | #endif | ||
1238 | #ifdef FBCON_HAS_CFB16 | ||
1239 | case 16: | ||
1240 | display->dispsw = &fbcon_cfb16; | ||
1241 | break; | ||
1242 | #endif | ||
1243 | default: | ||
1244 | display->dispsw = &fbcon_dummy; | ||
1245 | break; | ||
1246 | } | ||
1247 | /* | ||
1248 | * We still need to find a way to tell the X | ||
1249 | * server that the video mem has been fiddled with | ||
1250 | * so it redraws the entire screen when switching | ||
1251 | * between X and a text console. | ||
1252 | */ | ||
1253 | retz3_set_video(info, var, &zinfo->current_par); | ||
1254 | |||
1255 | if (info->changevar) | ||
1256 | (*info->changevar)(con); | ||
1257 | } | ||
1258 | |||
1259 | if (oldbpp != var->bits_per_pixel) { | ||
1260 | if ((err = fb_alloc_cmap(&display->cmap, 0, 0))) | ||
1261 | return err; | ||
1262 | do_install_cmap(con, info); | ||
1263 | } | ||
1264 | } | ||
1265 | return 0; | ||
1266 | } | ||
1267 | |||
1268 | |||
1269 | /* | ||
1270 | * Get the Colormap | ||
1271 | */ | ||
1272 | |||
1273 | static int retz3fb_get_cmap(struct fb_cmap *cmap, int kspc, int con, | ||
1274 | struct fb_info *info) | ||
1275 | { | ||
1276 | if (con == info->currcon) /* current console? */ | ||
1277 | return(fb_get_cmap(cmap, kspc, retz3_getcolreg, info)); | ||
1278 | else if (fb_display[con].cmap.len) /* non default colormap? */ | ||
1279 | fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2); | ||
1280 | else | ||
1281 | fb_copy_cmap(fb_default_cmap(1<<fb_display[con].var.bits_per_pixel), | ||
1282 | cmap, kspc ? 0 : 2); | ||
1283 | return 0; | ||
1284 | } | ||
1285 | |||
1286 | /* | ||
1287 | * Blank the display. | ||
1288 | */ | ||
1289 | |||
1290 | static int retz3fb_blank(int blank, struct fb_info *info) | ||
1291 | { | ||
1292 | struct retz3_fb_info *zinfo = retz3info(info); | ||
1293 | volatile unsigned char *regs = retz3info(info)->regs; | ||
1294 | short i; | ||
1295 | |||
1296 | if (blank) | ||
1297 | for (i = 0; i < 256; i++){ | ||
1298 | reg_w(regs, VDAC_ADDRESS_W, i); | ||
1299 | reg_w(regs, VDAC_DATA, 0); | ||
1300 | reg_w(regs, VDAC_DATA, 0); | ||
1301 | reg_w(regs, VDAC_DATA, 0); | ||
1302 | } | ||
1303 | else | ||
1304 | for (i = 0; i < 256; i++){ | ||
1305 | reg_w(regs, VDAC_ADDRESS_W, i); | ||
1306 | reg_w(regs, VDAC_DATA, zinfo->color_table[i][0]); | ||
1307 | reg_w(regs, VDAC_DATA, zinfo->color_table[i][1]); | ||
1308 | reg_w(regs, VDAC_DATA, zinfo->color_table[i][2]); | ||
1309 | } | ||
1310 | return 0; | ||
1311 | } | ||
1312 | |||
1313 | static struct fb_ops retz3fb_ops = { | ||
1314 | .owner = THIS_MODULE, | ||
1315 | .fb_get_fix = retz3fb_get_fix, | ||
1316 | .fb_get_var = retz3fb_get_var, | ||
1317 | .fb_set_var = retz3fb_set_var, | ||
1318 | .fb_get_cmap = retz3fb_get_cmap, | ||
1319 | .fb_set_cmap = gen_set_cmap, | ||
1320 | .fb_setcolreg = retz3fb_setcolreg, | ||
1321 | .fb_blank = retz3fb_blank, | ||
1322 | }; | ||
1323 | |||
1324 | int __init retz3fb_setup(char *options) | ||
1325 | { | ||
1326 | char *this_opt; | ||
1327 | |||
1328 | if (!options || !*options) | ||
1329 | return 0; | ||
1330 | |||
1331 | while ((this_opt = strsep(&options, ",")) != NULL) { | ||
1332 | if (!*this_opt) | ||
1333 | continue; | ||
1334 | if (!strcmp(this_opt, "inverse")) { | ||
1335 | z3fb_inverse = 1; | ||
1336 | fb_invert_cmaps(); | ||
1337 | } else if (!strncmp(this_opt, "font:", 5)) { | ||
1338 | strlcpy(fontname, this_opt+5, sizeof(fontname)); | ||
1339 | } else | ||
1340 | z3fb_mode = get_video_mode(this_opt); | ||
1341 | } | ||
1342 | return 0; | ||
1343 | } | ||
1344 | |||
1345 | |||
1346 | /* | ||
1347 | * Initialization | ||
1348 | */ | ||
1349 | |||
1350 | int __init retz3fb_init(void) | ||
1351 | { | ||
1352 | unsigned long board_addr, board_size; | ||
1353 | struct zorro_dev *z = NULL; | ||
1354 | volatile unsigned char *regs; | ||
1355 | struct retz3fb_par par; | ||
1356 | struct retz3_fb_info *zinfo; | ||
1357 | struct fb_info *fb_info; | ||
1358 | short i; | ||
1359 | int res = -ENXIO; | ||
1360 | |||
1361 | while ((z = zorro_find_device(ZORRO_PROD_MACROSYSTEMS_RETINA_Z3, z))) { | ||
1362 | board_addr = z->resource.start; | ||
1363 | board_size = z->resource.end-z->resource.start+1; | ||
1364 | if (!request_mem_region(board_addr, 0x0c00000, | ||
1365 | "ncr77c32blt")) { | ||
1366 | continue; | ||
1367 | if (!request_mem_region(board_addr+VIDEO_MEM_OFFSET, | ||
1368 | 0x00400000, "RAM")) | ||
1369 | release_mem_region(board_addr, 0x00c00000); | ||
1370 | continue; | ||
1371 | } | ||
1372 | if (!(zinfo = kmalloc(sizeof(struct retz3_fb_info), | ||
1373 | GFP_KERNEL))) | ||
1374 | return -ENOMEM; | ||
1375 | memset(zinfo, 0, sizeof(struct retz3_fb_info)); | ||
1376 | |||
1377 | zinfo->base = ioremap(board_addr, board_size); | ||
1378 | zinfo->regs = zinfo->base; | ||
1379 | zinfo->fbmem = zinfo->base + VIDEO_MEM_OFFSET; | ||
1380 | /* Get memory size - for now we asume it's a 4MB board */ | ||
1381 | zinfo->fbsize = 0x00400000; /* 4 MB */ | ||
1382 | zinfo->physregs = board_addr; | ||
1383 | zinfo->physfbmem = board_addr + VIDEO_MEM_OFFSET; | ||
1384 | |||
1385 | fb_info = fbinfo(zinfo); | ||
1386 | |||
1387 | for (i = 0; i < 256; i++){ | ||
1388 | for (i = 0; i < 256; i++){ | ||
1389 | zinfo->color_table[i][0] = i; | ||
1390 | zinfo->color_table[i][1] = i; | ||
1391 | zinfo->color_table[i][2] = i; | ||
1392 | } | ||
1393 | } | ||
1394 | |||
1395 | regs = zinfo->regs; | ||
1396 | /* Disable hardware cursor */ | ||
1397 | seq_w(regs, SEQ_CURSOR_Y_INDEX, 0x00); | ||
1398 | |||
1399 | retz3fb_setcolreg (255, 56<<8, 100<<8, 160<<8, 0, fb_info); | ||
1400 | retz3fb_setcolreg (254, 0, 0, 0, 0, fb_info); | ||
1401 | |||
1402 | strcpy(fb_info->modename, retz3fb_name); | ||
1403 | fb_info->changevar = NULL; | ||
1404 | fb_info->fbops = &retz3fb_ops; | ||
1405 | fb_info->screen_base = zinfo->fbmem; | ||
1406 | fb_info->disp = &zinfo->disp; | ||
1407 | fb_info->currcon = -1; | ||
1408 | fb_info->switch_con = &z3fb_switch; | ||
1409 | fb_info->updatevar = &z3fb_updatevar; | ||
1410 | fb_info->flags = FBINFO_FLAG_DEFAULT; | ||
1411 | strlcpy(fb_info->fontname, fontname, sizeof(fb_info->fontname)); | ||
1412 | |||
1413 | if (z3fb_mode == -1) | ||
1414 | retz3fb_default = retz3fb_predefined[0].var; | ||
1415 | |||
1416 | retz3_decode_var(&retz3fb_default, &par); | ||
1417 | retz3_encode_var(&retz3fb_default, &par); | ||
1418 | |||
1419 | do_fb_set_var(fb_info, &retz3fb_default, 0); | ||
1420 | retz3fb_get_var(&zinfo->disp.var, -1, fb_info); | ||
1421 | |||
1422 | retz3fb_set_disp(-1, fb_info); | ||
1423 | |||
1424 | do_install_cmap(0, fb_info); | ||
1425 | |||
1426 | if (register_framebuffer(fb_info) < 0) { | ||
1427 | iounmap(zinfo->base); | ||
1428 | return -EINVAL; | ||
1429 | } | ||
1430 | |||
1431 | printk(KERN_INFO "fb%d: %s frame buffer device, using %ldK of " | ||
1432 | "video memory\n", fb_info->node, | ||
1433 | fb_info->modename, zinfo->fbsize>>10); | ||
1434 | |||
1435 | /* FIXME: This driver cannot be unloaded yet */ | ||
1436 | res = 0; | ||
1437 | } | ||
1438 | return res; | ||
1439 | } | ||
1440 | |||
1441 | |||
1442 | static int z3fb_switch(int con, struct fb_info *info) | ||
1443 | { | ||
1444 | /* Do we have to save the colormap? */ | ||
1445 | if (fb_display[info->currcon].cmap.len) | ||
1446 | fb_get_cmap(&fb_display[info->currcon].cmap, 1, | ||
1447 | retz3_getcolreg, info); | ||
1448 | |||
1449 | do_fb_set_var(info, &fb_display[con].var, 1); | ||
1450 | info->currcon = con; | ||
1451 | /* Install new colormap */ | ||
1452 | do_install_cmap(con, info); | ||
1453 | return 0; | ||
1454 | } | ||
1455 | |||
1456 | |||
1457 | /* | ||
1458 | * Update the `var' structure (called by fbcon.c) | ||
1459 | * | ||
1460 | * This call looks only at yoffset and the FB_VMODE_YWRAP flag in `var'. | ||
1461 | * Since it's called by a kernel driver, no range checking is done. | ||
1462 | */ | ||
1463 | |||
1464 | static int z3fb_updatevar(int con, struct fb_info *info) | ||
1465 | { | ||
1466 | return 0; | ||
1467 | } | ||
1468 | |||
1469 | /* | ||
1470 | * Get a Video Mode | ||
1471 | */ | ||
1472 | |||
1473 | static int __init get_video_mode(const char *name) | ||
1474 | { | ||
1475 | short i; | ||
1476 | |||
1477 | for (i = 0; i < NUM_TOTAL_MODES; i++) | ||
1478 | if (!strcmp(name, retz3fb_predefined[i].name)){ | ||
1479 | retz3fb_default = retz3fb_predefined[i].var; | ||
1480 | return i; | ||
1481 | } | ||
1482 | return -1; | ||
1483 | } | ||
1484 | |||
1485 | |||
1486 | #ifdef MODULE | ||
1487 | MODULE_LICENSE("GPL"); | ||
1488 | |||
1489 | int init_module(void) | ||
1490 | { | ||
1491 | return retz3fb_init(); | ||
1492 | } | ||
1493 | #endif | ||
1494 | |||
1495 | |||
1496 | /* | ||
1497 | * Text console acceleration | ||
1498 | */ | ||
1499 | |||
1500 | #ifdef FBCON_HAS_CFB8 | ||
1501 | static void retz3_8_bmove(struct display *p, int sy, int sx, | ||
1502 | int dy, int dx, int height, int width) | ||
1503 | { | ||
1504 | int fontwidth = fontwidth(p); | ||
1505 | |||
1506 | sx *= fontwidth; | ||
1507 | dx *= fontwidth; | ||
1508 | width *= fontwidth; | ||
1509 | |||
1510 | retz3_bitblt(p, | ||
1511 | (unsigned short)sx, | ||
1512 | (unsigned short)(sy*fontheight(p)), | ||
1513 | (unsigned short)dx, | ||
1514 | (unsigned short)(dy*fontheight(p)), | ||
1515 | (unsigned short)width, | ||
1516 | (unsigned short)(height*fontheight(p)), | ||
1517 | Z3BLTcopy, | ||
1518 | 0xffff); | ||
1519 | } | ||
1520 | |||
1521 | static void retz3_8_clear(struct vc_data *conp, struct display *p, | ||
1522 | int sy, int sx, int height, int width) | ||
1523 | { | ||
1524 | unsigned short col; | ||
1525 | int fontwidth = fontwidth(p); | ||
1526 | |||
1527 | sx *= fontwidth; | ||
1528 | width *= fontwidth; | ||
1529 | |||
1530 | col = attr_bgcol_ec(p, conp); | ||
1531 | col &= 0xff; | ||
1532 | col |= (col << 8); | ||
1533 | |||
1534 | retz3_bitblt(p, | ||
1535 | (unsigned short)sx, | ||
1536 | (unsigned short)(sy*fontheight(p)), | ||
1537 | (unsigned short)sx, | ||
1538 | (unsigned short)(sy*fontheight(p)), | ||
1539 | (unsigned short)width, | ||
1540 | (unsigned short)(height*fontheight(p)), | ||
1541 | Z3BLTset, | ||
1542 | col); | ||
1543 | } | ||
1544 | |||
1545 | |||
1546 | static void retz3_putc(struct vc_data *conp, struct display *p, int c, | ||
1547 | int yy, int xx) | ||
1548 | { | ||
1549 | retz3_busy(p); | ||
1550 | fbcon_cfb8_putc(conp, p, c, yy, xx); | ||
1551 | } | ||
1552 | |||
1553 | |||
1554 | static void retz3_putcs(struct vc_data *conp, struct display *p, | ||
1555 | const unsigned short *s, int count, | ||
1556 | int yy, int xx) | ||
1557 | { | ||
1558 | retz3_busy(p); | ||
1559 | fbcon_cfb8_putcs(conp, p, s, count, yy, xx); | ||
1560 | } | ||
1561 | |||
1562 | |||
1563 | static void retz3_revc(struct display *p, int xx, int yy) | ||
1564 | { | ||
1565 | retz3_busy(p); | ||
1566 | fbcon_cfb8_revc(p, xx, yy); | ||
1567 | } | ||
1568 | |||
1569 | |||
1570 | static void retz3_clear_margins(struct vc_data* conp, struct display* p, | ||
1571 | int bottom_only) | ||
1572 | { | ||
1573 | retz3_busy(p); | ||
1574 | fbcon_cfb8_clear_margins(conp, p, bottom_only); | ||
1575 | } | ||
1576 | |||
1577 | |||
1578 | static struct display_switch fbcon_retz3_8 = { | ||
1579 | .setup = fbcon_cfb8_setup, | ||
1580 | .bmove = retz3_8_bmove, | ||
1581 | .clear = retz3_8_clear, | ||
1582 | .putc = retz3_putc, | ||
1583 | .putcs = retz3_putcs, | ||
1584 | .revc = retz3_revc, | ||
1585 | .clear_margins = retz3_clear_margins, | ||
1586 | .fontwidthmask = FONTWIDTH(8) | ||
1587 | }; | ||
1588 | #endif | ||
diff --git a/drivers/video/retz3fb.h b/drivers/video/retz3fb.h deleted file mode 100644 index 5cc751067720..000000000000 --- a/drivers/video/retz3fb.h +++ /dev/null | |||
@@ -1,286 +0,0 @@ | |||
1 | /* | ||
2 | * linux/drivers/video/retz3fb.h -- Defines and macros for the RetinaZ3 frame | ||
3 | * buffer device | ||
4 | * | ||
5 | * Copyright (C) 1997 Jes Sorensen | ||
6 | * | ||
7 | * History: | ||
8 | * - 22 Jan 97: Initial work | ||
9 | * | ||
10 | * | ||
11 | * This file is subject to the terms and conditions of the GNU General Public | ||
12 | * License. See the file COPYING in the main directory of this archive | ||
13 | * for more details. | ||
14 | */ | ||
15 | |||
16 | /* | ||
17 | * Macros to read and write to registers. | ||
18 | */ | ||
19 | #define reg_w(regs, reg,dat) (*(regs + reg) = dat) | ||
20 | #define reg_r(regs, reg) (*(regs + reg)) | ||
21 | |||
22 | /* | ||
23 | * Macro to access the sequencer. | ||
24 | */ | ||
25 | #define seq_w(regs, sreg, sdat) \ | ||
26 | do{ reg_w(regs, SEQ_IDX, sreg); reg_w(regs, SEQ_DATA, sdat); } while(0) | ||
27 | |||
28 | /* | ||
29 | * Macro to access the CRT controller. | ||
30 | */ | ||
31 | #define crt_w(regs, creg, cdat) \ | ||
32 | do{ reg_w(regs, CRT_IDX, creg); reg_w(regs, CRT_DATA, cdat); } while(0) | ||
33 | |||
34 | /* | ||
35 | * Macro to access the graphics controller. | ||
36 | */ | ||
37 | #define gfx_w(regs, greg, gdat) \ | ||
38 | do{ reg_w(regs, GFX_IDX, greg); reg_w(regs, GFX_DATA, gdat); } while(0) | ||
39 | |||
40 | /* | ||
41 | * Macro to access the attribute controller. | ||
42 | */ | ||
43 | #define attr_w(regs, areg, adat) \ | ||
44 | do{ reg_w(regs, ACT_IDX, areg); reg_w(regs, ACT_DATA, adat); } while(0) | ||
45 | |||
46 | /* | ||
47 | * Macro to access the pll. | ||
48 | */ | ||
49 | #define pll_w(regs, preg, pdat) \ | ||
50 | do{ reg_w(regs, PLL_IDX, preg); \ | ||
51 | reg_w(regs, PLL_DATA, (pdat & 0xff)); \ | ||
52 | reg_w(regs, PLL_DATA, (pdat >> 8));\ | ||
53 | } while(0) | ||
54 | |||
55 | /* | ||
56 | * Offsets | ||
57 | */ | ||
58 | #define VIDEO_MEM_OFFSET 0x00c00000 | ||
59 | #define ACM_OFFSET 0x00b00000 | ||
60 | |||
61 | /* | ||
62 | * Accelerator Control Menu | ||
63 | */ | ||
64 | #define ACM_PRIMARY_OFFSET 0x00 | ||
65 | #define ACM_SECONDARY_OFFSET 0x04 | ||
66 | #define ACM_MODE_CONTROL 0x08 | ||
67 | #define ACM_CURSOR_POSITION 0x0c | ||
68 | #define ACM_START_STATUS 0x30 | ||
69 | #define ACM_CONTROL 0x34 | ||
70 | #define ACM_RASTEROP_ROTATION 0x38 | ||
71 | #define ACM_BITMAP_DIMENSION 0x3c | ||
72 | #define ACM_DESTINATION 0x40 | ||
73 | #define ACM_SOURCE 0x44 | ||
74 | #define ACM_PATTERN 0x48 | ||
75 | #define ACM_FOREGROUND 0x4c | ||
76 | #define ACM_BACKGROUND 0x50 | ||
77 | |||
78 | /* | ||
79 | * Video DAC addresses | ||
80 | */ | ||
81 | #define VDAC_ADDRESS 0x03c8 | ||
82 | #define VDAC_ADDRESS_W 0x03c8 | ||
83 | #define VDAC_ADDRESS_R 0x03c7 | ||
84 | #define VDAC_STATE 0x03c7 | ||
85 | #define VDAC_DATA 0x03c9 | ||
86 | #define VDAC_MASK 0x03c6 | ||
87 | |||
88 | /* | ||
89 | * Sequencer | ||
90 | */ | ||
91 | #define SEQ_IDX 0x03c4 /* Sequencer Index */ | ||
92 | #define SEQ_DATA 0x03c5 | ||
93 | #define SEQ_RESET 0x00 | ||
94 | #define SEQ_CLOCKING_MODE 0x01 | ||
95 | #define SEQ_MAP_MASK 0x02 | ||
96 | #define SEQ_CHAR_MAP_SELECT 0x03 | ||
97 | #define SEQ_MEMORY_MODE 0x04 | ||
98 | #define SEQ_EXTENDED_ENABLE 0x05 /* NCR extensions */ | ||
99 | #define SEQ_UNKNOWN1 0x06 | ||
100 | #define SEQ_UNKNOWN2 0x07 | ||
101 | #define SEQ_CHIP_ID 0x08 | ||
102 | #define SEQ_UNKNOWN3 0x09 | ||
103 | #define SEQ_CURSOR_COLOR1 0x0a | ||
104 | #define SEQ_CURSOR_COLOR0 0x0b | ||
105 | #define SEQ_CURSOR_CONTROL 0x0c | ||
106 | #define SEQ_CURSOR_X_LOC_HI 0x0d | ||
107 | #define SEQ_CURSOR_X_LOC_LO 0x0e | ||
108 | #define SEQ_CURSOR_Y_LOC_HI 0x0f | ||
109 | #define SEQ_CURSOR_Y_LOC_LO 0x10 | ||
110 | #define SEQ_CURSOR_X_INDEX 0x11 | ||
111 | #define SEQ_CURSOR_Y_INDEX 0x12 | ||
112 | #define SEQ_CURSOR_STORE_HI 0x13 | ||
113 | #define SEQ_CURSOR_STORE_LO 0x14 | ||
114 | #define SEQ_CURSOR_ST_OFF_HI 0x15 | ||
115 | #define SEQ_CURSOR_ST_OFF_LO 0x16 | ||
116 | #define SEQ_CURSOR_PIXELMASK 0x17 | ||
117 | #define SEQ_PRIM_HOST_OFF_HI 0x18 | ||
118 | #define SEQ_PRIM_HOST_OFF_LO 0x19 | ||
119 | #define SEQ_LINEAR_0 0x1a | ||
120 | #define SEQ_LINEAR_1 0x1b | ||
121 | #define SEQ_SEC_HOST_OFF_HI 0x1c | ||
122 | #define SEQ_SEC_HOST_OFF_LO 0x1d | ||
123 | #define SEQ_EXTENDED_MEM_ENA 0x1e | ||
124 | #define SEQ_EXT_CLOCK_MODE 0x1f | ||
125 | #define SEQ_EXT_VIDEO_ADDR 0x20 | ||
126 | #define SEQ_EXT_PIXEL_CNTL 0x21 | ||
127 | #define SEQ_BUS_WIDTH_FEEDB 0x22 | ||
128 | #define SEQ_PERF_SELECT 0x23 | ||
129 | #define SEQ_COLOR_EXP_WFG 0x24 | ||
130 | #define SEQ_COLOR_EXP_WBG 0x25 | ||
131 | #define SEQ_EXT_RW_CONTROL 0x26 | ||
132 | #define SEQ_MISC_FEATURE_SEL 0x27 | ||
133 | #define SEQ_COLOR_KEY_CNTL 0x28 | ||
134 | #define SEQ_COLOR_KEY_MATCH0 0x29 | ||
135 | #define SEQ_COLOR_KEY_MATCH1 0x2a | ||
136 | #define SEQ_COLOR_KEY_MATCH2 0x2b | ||
137 | #define SEQ_UNKNOWN6 0x2c | ||
138 | #define SEQ_CRC_CONTROL 0x2d | ||
139 | #define SEQ_CRC_DATA_LOW 0x2e | ||
140 | #define SEQ_CRC_DATA_HIGH 0x2f | ||
141 | #define SEQ_MEMORY_MAP_CNTL 0x30 | ||
142 | #define SEQ_ACM_APERTURE_1 0x31 | ||
143 | #define SEQ_ACM_APERTURE_2 0x32 | ||
144 | #define SEQ_ACM_APERTURE_3 0x33 | ||
145 | #define SEQ_BIOS_UTILITY_0 0x3e | ||
146 | #define SEQ_BIOS_UTILITY_1 0x3f | ||
147 | |||
148 | /* | ||
149 | * Graphics Controller | ||
150 | */ | ||
151 | #define GFX_IDX 0x03ce | ||
152 | #define GFX_DATA 0x03cf | ||
153 | #define GFX_SET_RESET 0x00 | ||
154 | #define GFX_ENABLE_SET_RESET 0x01 | ||
155 | #define GFX_COLOR_COMPARE 0x02 | ||
156 | #define GFX_DATA_ROTATE 0x03 | ||
157 | #define GFX_READ_MAP_SELECT 0x04 | ||
158 | #define GFX_GRAPHICS_MODE 0x05 | ||
159 | #define GFX_MISC 0x06 | ||
160 | #define GFX_COLOR_XCARE 0x07 | ||
161 | #define GFX_BITMASK 0x08 | ||
162 | |||
163 | /* | ||
164 | * CRT Controller | ||
165 | */ | ||
166 | #define CRT_IDX 0x03d4 | ||
167 | #define CRT_DATA 0x03d5 | ||
168 | #define CRT_HOR_TOTAL 0x00 | ||
169 | #define CRT_HOR_DISP_ENA_END 0x01 | ||
170 | #define CRT_START_HOR_BLANK 0x02 | ||
171 | #define CRT_END_HOR_BLANK 0x03 | ||
172 | #define CRT_START_HOR_RETR 0x04 | ||
173 | #define CRT_END_HOR_RETR 0x05 | ||
174 | #define CRT_VER_TOTAL 0x06 | ||
175 | #define CRT_OVERFLOW 0x07 | ||
176 | #define CRT_PRESET_ROW_SCAN 0x08 | ||
177 | #define CRT_MAX_SCAN_LINE 0x09 | ||
178 | #define CRT_CURSOR_START 0x0a | ||
179 | #define CRT_CURSOR_END 0x0b | ||
180 | #define CRT_START_ADDR_HIGH 0x0c | ||
181 | #define CRT_START_ADDR_LOW 0x0d | ||
182 | #define CRT_CURSOR_LOC_HIGH 0x0e | ||
183 | #define CRT_CURSOR_LOC_LOW 0x0f | ||
184 | #define CRT_START_VER_RETR 0x10 | ||
185 | #define CRT_END_VER_RETR 0x11 | ||
186 | #define CRT_VER_DISP_ENA_END 0x12 | ||
187 | #define CRT_OFFSET 0x13 | ||
188 | #define CRT_UNDERLINE_LOC 0x14 | ||
189 | #define CRT_START_VER_BLANK 0x15 | ||
190 | #define CRT_END_VER_BLANK 0x16 | ||
191 | #define CRT_MODE_CONTROL 0x17 | ||
192 | #define CRT_LINE_COMPARE 0x18 | ||
193 | #define CRT_UNKNOWN1 0x19 | ||
194 | #define CRT_UNKNOWN2 0x1a | ||
195 | #define CRT_UNKNOWN3 0x1b | ||
196 | #define CRT_UNKNOWN4 0x1c | ||
197 | #define CRT_UNKNOWN5 0x1d | ||
198 | #define CRT_UNKNOWN6 0x1e | ||
199 | #define CRT_UNKNOWN7 0x1f | ||
200 | #define CRT_UNKNOWN8 0x20 | ||
201 | #define CRT_UNKNOWN9 0x21 | ||
202 | #define CRT_UNKNOWN10 0x22 | ||
203 | #define CRT_UNKNOWN11 0x23 | ||
204 | #define CRT_UNKNOWN12 0x24 | ||
205 | #define CRT_UNKNOWN13 0x25 | ||
206 | #define CRT_UNKNOWN14 0x26 | ||
207 | #define CRT_UNKNOWN15 0x27 | ||
208 | #define CRT_UNKNOWN16 0x28 | ||
209 | #define CRT_UNKNOWN17 0x29 | ||
210 | #define CRT_UNKNOWN18 0x2a | ||
211 | #define CRT_UNKNOWN19 0x2b | ||
212 | #define CRT_UNKNOWN20 0x2c | ||
213 | #define CRT_UNKNOWN21 0x2d | ||
214 | #define CRT_UNKNOWN22 0x2e | ||
215 | #define CRT_UNKNOWN23 0x2f | ||
216 | #define CRT_EXT_HOR_TIMING1 0x30 /* NCR crt extensions */ | ||
217 | #define CRT_EXT_START_ADDR 0x31 | ||
218 | #define CRT_EXT_HOR_TIMING2 0x32 | ||
219 | #define CRT_EXT_VER_TIMING 0x33 | ||
220 | #define CRT_MONITOR_POWER 0x34 | ||
221 | |||
222 | /* | ||
223 | * General Registers | ||
224 | */ | ||
225 | #define GREG_STATUS0_R 0x03c2 | ||
226 | #define GREG_STATUS1_R 0x03da | ||
227 | #define GREG_MISC_OUTPUT_R 0x03cc | ||
228 | #define GREG_MISC_OUTPUT_W 0x03c2 | ||
229 | #define GREG_FEATURE_CONTROL_R 0x03ca | ||
230 | #define GREG_FEATURE_CONTROL_W 0x03da | ||
231 | #define GREG_POS 0x0102 | ||
232 | |||
233 | /* | ||
234 | * Attribute Controller | ||
235 | */ | ||
236 | #define ACT_IDX 0x03C0 | ||
237 | #define ACT_ADDRESS_R 0x03C0 | ||
238 | #define ACT_DATA 0x03C0 | ||
239 | #define ACT_ADDRESS_RESET 0x03DA | ||
240 | #define ACT_PALETTE0 0x00 | ||
241 | #define ACT_PALETTE1 0x01 | ||
242 | #define ACT_PALETTE2 0x02 | ||
243 | #define ACT_PALETTE3 0x03 | ||
244 | #define ACT_PALETTE4 0x04 | ||
245 | #define ACT_PALETTE5 0x05 | ||
246 | #define ACT_PALETTE6 0x06 | ||
247 | #define ACT_PALETTE7 0x07 | ||
248 | #define ACT_PALETTE8 0x08 | ||
249 | #define ACT_PALETTE9 0x09 | ||
250 | #define ACT_PALETTE10 0x0A | ||
251 | #define ACT_PALETTE11 0x0B | ||
252 | #define ACT_PALETTE12 0x0C | ||
253 | #define ACT_PALETTE13 0x0D | ||
254 | #define ACT_PALETTE14 0x0E | ||
255 | #define ACT_PALETTE15 0x0F | ||
256 | #define ACT_ATTR_MODE_CNTL 0x10 | ||
257 | #define ACT_OVERSCAN_COLOR 0x11 | ||
258 | #define ACT_COLOR_PLANE_ENA 0x12 | ||
259 | #define ACT_HOR_PEL_PANNING 0x13 | ||
260 | #define ACT_COLOR_SELECT 0x14 | ||
261 | |||
262 | /* | ||
263 | * PLL | ||
264 | */ | ||
265 | #define PLL_IDX 0x83c8 | ||
266 | #define PLL_DATA 0x83c9 | ||
267 | |||
268 | /* | ||
269 | * Blitter operations | ||
270 | */ | ||
271 | #define Z3BLTclear 0x00 /* 0 */ | ||
272 | #define Z3BLTand 0x80 /* src AND dst */ | ||
273 | #define Z3BLTandReverse 0x40 /* src AND NOT dst */ | ||
274 | #define Z3BLTcopy 0xc0 /* src */ | ||
275 | #define Z3BLTandInverted 0x20 /* NOT src AND dst */ | ||
276 | #define Z3BLTnoop 0xa0 /* dst */ | ||
277 | #define Z3BLTxor 0x60 /* src XOR dst */ | ||
278 | #define Z3BLTor 0xe0 /* src OR dst */ | ||
279 | #define Z3BLTnor 0x10 /* NOT src AND NOT dst */ | ||
280 | #define Z3BLTequiv 0x90 /* NOT src XOR dst */ | ||
281 | #define Z3BLTinvert 0x50 /* NOT dst */ | ||
282 | #define Z3BLTorReverse 0xd0 /* src OR NOT dst */ | ||
283 | #define Z3BLTcopyInverted 0x30 /* NOT src */ | ||
284 | #define Z3BLTorInverted 0xb0 /* NOT src OR dst */ | ||
285 | #define Z3BLTnand 0x70 /* NOT src OR NOT dst */ | ||
286 | #define Z3BLTset 0xf0 /* 1 */ | ||
diff --git a/drivers/video/riva/fbdev.c b/drivers/video/riva/fbdev.c index 1a13966b7d5b..f2e9b742c92f 100644 --- a/drivers/video/riva/fbdev.c +++ b/drivers/video/riva/fbdev.c | |||
@@ -894,7 +894,8 @@ out: | |||
894 | return rc; | 894 | return rc; |
895 | } | 895 | } |
896 | 896 | ||
897 | static void riva_update_var(struct fb_var_screeninfo *var, struct fb_videomode *modedb) | 897 | static void riva_update_var(struct fb_var_screeninfo *var, |
898 | const struct fb_videomode *modedb) | ||
898 | { | 899 | { |
899 | NVTRACE_ENTER(); | 900 | NVTRACE_ENTER(); |
900 | var->xres = var->xres_virtual = modedb->xres; | 901 | var->xres = var->xres_virtual = modedb->xres; |
@@ -1101,10 +1102,10 @@ static int riva_get_cmap_len(const struct fb_var_screeninfo *var) | |||
1101 | static int rivafb_open(struct fb_info *info, int user) | 1102 | static int rivafb_open(struct fb_info *info, int user) |
1102 | { | 1103 | { |
1103 | struct riva_par *par = info->par; | 1104 | struct riva_par *par = info->par; |
1104 | int cnt = atomic_read(&par->ref_count); | ||
1105 | 1105 | ||
1106 | NVTRACE_ENTER(); | 1106 | NVTRACE_ENTER(); |
1107 | if (!cnt) { | 1107 | mutex_lock(&par->open_lock); |
1108 | if (!par->ref_count) { | ||
1108 | #ifdef CONFIG_X86 | 1109 | #ifdef CONFIG_X86 |
1109 | memset(&par->state, 0, sizeof(struct vgastate)); | 1110 | memset(&par->state, 0, sizeof(struct vgastate)); |
1110 | par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS; | 1111 | par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS; |
@@ -1119,7 +1120,8 @@ static int rivafb_open(struct fb_info *info, int user) | |||
1119 | 1120 | ||
1120 | riva_save_state(par, &par->initial_state); | 1121 | riva_save_state(par, &par->initial_state); |
1121 | } | 1122 | } |
1122 | atomic_inc(&par->ref_count); | 1123 | par->ref_count++; |
1124 | mutex_unlock(&par->open_lock); | ||
1123 | NVTRACE_LEAVE(); | 1125 | NVTRACE_LEAVE(); |
1124 | return 0; | 1126 | return 0; |
1125 | } | 1127 | } |
@@ -1127,12 +1129,14 @@ static int rivafb_open(struct fb_info *info, int user) | |||
1127 | static int rivafb_release(struct fb_info *info, int user) | 1129 | static int rivafb_release(struct fb_info *info, int user) |
1128 | { | 1130 | { |
1129 | struct riva_par *par = info->par; | 1131 | struct riva_par *par = info->par; |
1130 | int cnt = atomic_read(&par->ref_count); | ||
1131 | 1132 | ||
1132 | NVTRACE_ENTER(); | 1133 | NVTRACE_ENTER(); |
1133 | if (!cnt) | 1134 | mutex_lock(&par->open_lock); |
1135 | if (!par->ref_count) { | ||
1136 | mutex_unlock(&par->open_lock); | ||
1134 | return -EINVAL; | 1137 | return -EINVAL; |
1135 | if (cnt == 1) { | 1138 | } |
1139 | if (par->ref_count == 1) { | ||
1136 | par->riva.LockUnlock(&par->riva, 0); | 1140 | par->riva.LockUnlock(&par->riva, 0); |
1137 | par->riva.LoadStateExt(&par->riva, &par->initial_state.ext); | 1141 | par->riva.LoadStateExt(&par->riva, &par->initial_state.ext); |
1138 | riva_load_state(par, &par->initial_state); | 1142 | riva_load_state(par, &par->initial_state); |
@@ -1141,14 +1145,15 @@ static int rivafb_release(struct fb_info *info, int user) | |||
1141 | #endif | 1145 | #endif |
1142 | par->riva.LockUnlock(&par->riva, 1); | 1146 | par->riva.LockUnlock(&par->riva, 1); |
1143 | } | 1147 | } |
1144 | atomic_dec(&par->ref_count); | 1148 | par->ref_count--; |
1149 | mutex_unlock(&par->open_lock); | ||
1145 | NVTRACE_LEAVE(); | 1150 | NVTRACE_LEAVE(); |
1146 | return 0; | 1151 | return 0; |
1147 | } | 1152 | } |
1148 | 1153 | ||
1149 | static int rivafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | 1154 | static int rivafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
1150 | { | 1155 | { |
1151 | struct fb_videomode *mode; | 1156 | const struct fb_videomode *mode; |
1152 | struct riva_par *par = info->par; | 1157 | struct riva_par *par = info->par; |
1153 | int nom, den; /* translating from pixels->bytes */ | 1158 | int nom, den; /* translating from pixels->bytes */ |
1154 | int mode_valid = 0; | 1159 | int mode_valid = 0; |
@@ -1980,12 +1985,11 @@ static int __devinit rivafb_probe(struct pci_dev *pd, | |||
1980 | default_par = info->par; | 1985 | default_par = info->par; |
1981 | default_par->pdev = pd; | 1986 | default_par->pdev = pd; |
1982 | 1987 | ||
1983 | info->pixmap.addr = kmalloc(8 * 1024, GFP_KERNEL); | 1988 | info->pixmap.addr = kzalloc(8 * 1024, GFP_KERNEL); |
1984 | if (info->pixmap.addr == NULL) { | 1989 | if (info->pixmap.addr == NULL) { |
1985 | ret = -ENOMEM; | 1990 | ret = -ENOMEM; |
1986 | goto err_framebuffer_release; | 1991 | goto err_framebuffer_release; |
1987 | } | 1992 | } |
1988 | memset(info->pixmap.addr, 0, 8 * 1024); | ||
1989 | 1993 | ||
1990 | ret = pci_enable_device(pd); | 1994 | ret = pci_enable_device(pd); |
1991 | if (ret < 0) { | 1995 | if (ret < 0) { |
@@ -1999,6 +2003,7 @@ static int __devinit rivafb_probe(struct pci_dev *pd, | |||
1999 | goto err_disable_device; | 2003 | goto err_disable_device; |
2000 | } | 2004 | } |
2001 | 2005 | ||
2006 | mutex_init(&default_par->open_lock); | ||
2002 | default_par->riva.Architecture = riva_get_arch(pd); | 2007 | default_par->riva.Architecture = riva_get_arch(pd); |
2003 | 2008 | ||
2004 | default_par->Chipset = (pd->vendor << 16) | pd->device; | 2009 | default_par->Chipset = (pd->vendor << 16) | pd->device; |
diff --git a/drivers/video/riva/rivafb.h b/drivers/video/riva/rivafb.h index 7fa13fc9c413..48ead6d72f24 100644 --- a/drivers/video/riva/rivafb.h +++ b/drivers/video/riva/rivafb.h | |||
@@ -53,7 +53,8 @@ struct riva_par { | |||
53 | #ifdef CONFIG_X86 | 53 | #ifdef CONFIG_X86 |
54 | struct vgastate state; | 54 | struct vgastate state; |
55 | #endif | 55 | #endif |
56 | atomic_t ref_count; | 56 | struct mutex open_lock; |
57 | unsigned int ref_count; | ||
57 | unsigned char *EDID; | 58 | unsigned char *EDID; |
58 | unsigned int Chipset; | 59 | unsigned int Chipset; |
59 | int forceCRTC; | 60 | int forceCRTC; |
diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c new file mode 100644 index 000000000000..3162c37b1447 --- /dev/null +++ b/drivers/video/s3fb.c | |||
@@ -0,0 +1,1180 @@ | |||
1 | /* | ||
2 | * linux/drivers/video/s3fb.c -- Frame buffer device driver for S3 Trio/Virge | ||
3 | * | ||
4 | * Copyright (c) 2006-2007 Ondrej Zajicek <santiago@crfreenet.org> | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file COPYING in the main directory of this archive for | ||
8 | * more details. | ||
9 | * | ||
10 | * Code is based on David Boucher's viafb (http://davesdomain.org.uk/viafb/) | ||
11 | * which is based on the code of neofb. | ||
12 | */ | ||
13 | |||
14 | #include <linux/version.h> | ||
15 | #include <linux/module.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/errno.h> | ||
18 | #include <linux/string.h> | ||
19 | #include <linux/mm.h> | ||
20 | #include <linux/tty.h> | ||
21 | #include <linux/slab.h> | ||
22 | #include <linux/delay.h> | ||
23 | #include <linux/fb.h> | ||
24 | #include <linux/svga.h> | ||
25 | #include <linux/init.h> | ||
26 | #include <linux/pci.h> | ||
27 | #include <linux/console.h> /* Why should fb driver call console functions? because acquire_console_sem() */ | ||
28 | #include <video/vga.h> | ||
29 | |||
30 | #ifdef CONFIG_MTRR | ||
31 | #include <asm/mtrr.h> | ||
32 | #endif | ||
33 | |||
34 | struct s3fb_info { | ||
35 | int chip, rev, mclk_freq; | ||
36 | int mtrr_reg; | ||
37 | struct vgastate state; | ||
38 | struct mutex open_lock; | ||
39 | unsigned int ref_count; | ||
40 | u32 pseudo_palette[16]; | ||
41 | }; | ||
42 | |||
43 | |||
44 | /* ------------------------------------------------------------------------- */ | ||
45 | |||
46 | static const struct svga_fb_format s3fb_formats[] = { | ||
47 | { 0, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, | ||
48 | FB_TYPE_TEXT, FB_AUX_TEXT_SVGA_STEP4, FB_VISUAL_PSEUDOCOLOR, 8, 16}, | ||
49 | { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, | ||
50 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 8, 16}, | ||
51 | { 4, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 1, | ||
52 | FB_TYPE_INTERLEAVED_PLANES, 1, FB_VISUAL_PSEUDOCOLOR, 8, 16}, | ||
53 | { 8, {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0}, 0, | ||
54 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_PSEUDOCOLOR, 4, 8}, | ||
55 | {16, {10, 5, 0}, {5, 5, 0}, {0, 5, 0}, {0, 0, 0}, 0, | ||
56 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 2, 4}, | ||
57 | {16, {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, 0, | ||
58 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 2, 4}, | ||
59 | {24, {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, | ||
60 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 1, 2}, | ||
61 | {32, {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {0, 0, 0}, 0, | ||
62 | FB_TYPE_PACKED_PIXELS, 0, FB_VISUAL_TRUECOLOR, 1, 2}, | ||
63 | SVGA_FORMAT_END | ||
64 | }; | ||
65 | |||
66 | |||
67 | static const struct svga_pll s3_pll = {3, 129, 3, 33, 0, 3, | ||
68 | 60000, 240000, 14318}; | ||
69 | |||
70 | static const int s3_memsizes[] = {4096, 0, 3072, 8192, 2048, 6144, 1024, 512}; | ||
71 | |||
72 | static const char * const s3_names[] = {"S3 Unknown", "S3 Trio32", "S3 Trio64", "S3 Trio64V+", | ||
73 | "S3 Trio64UV+", "S3 Trio64V2/DX", "S3 Trio64V2/GX", | ||
74 | "S3 Plato/PX", "S3 Aurora64VP", "S3 Virge", | ||
75 | "S3 Virge/VX", "S3 Virge/DX", "S3 Virge/GX", | ||
76 | "S3 Virge/GX2", "S3 Virge/GX2P", "S3 Virge/GX2P"}; | ||
77 | |||
78 | #define CHIP_UNKNOWN 0x00 | ||
79 | #define CHIP_732_TRIO32 0x01 | ||
80 | #define CHIP_764_TRIO64 0x02 | ||
81 | #define CHIP_765_TRIO64VP 0x03 | ||
82 | #define CHIP_767_TRIO64UVP 0x04 | ||
83 | #define CHIP_775_TRIO64V2_DX 0x05 | ||
84 | #define CHIP_785_TRIO64V2_GX 0x06 | ||
85 | #define CHIP_551_PLATO_PX 0x07 | ||
86 | #define CHIP_M65_AURORA64VP 0x08 | ||
87 | #define CHIP_325_VIRGE 0x09 | ||
88 | #define CHIP_988_VIRGE_VX 0x0A | ||
89 | #define CHIP_375_VIRGE_DX 0x0B | ||
90 | #define CHIP_385_VIRGE_GX 0x0C | ||
91 | #define CHIP_356_VIRGE_GX2 0x0D | ||
92 | #define CHIP_357_VIRGE_GX2P 0x0E | ||
93 | #define CHIP_359_VIRGE_GX2P 0x0F | ||
94 | |||
95 | #define CHIP_XXX_TRIO 0x80 | ||
96 | #define CHIP_XXX_TRIO64V2_DXGX 0x81 | ||
97 | #define CHIP_XXX_VIRGE_DXGX 0x82 | ||
98 | |||
99 | #define CHIP_UNDECIDED_FLAG 0x80 | ||
100 | #define CHIP_MASK 0xFF | ||
101 | |||
102 | /* CRT timing register sets */ | ||
103 | |||
104 | static const struct vga_regset s3_h_total_regs[] = {{0x00, 0, 7}, {0x5D, 0, 0}, VGA_REGSET_END}; | ||
105 | static const struct vga_regset s3_h_display_regs[] = {{0x01, 0, 7}, {0x5D, 1, 1}, VGA_REGSET_END}; | ||
106 | static const struct vga_regset s3_h_blank_start_regs[] = {{0x02, 0, 7}, {0x5D, 2, 2}, VGA_REGSET_END}; | ||
107 | static const struct vga_regset s3_h_blank_end_regs[] = {{0x03, 0, 4}, {0x05, 7, 7}, VGA_REGSET_END}; | ||
108 | static const struct vga_regset s3_h_sync_start_regs[] = {{0x04, 0, 7}, {0x5D, 4, 4}, VGA_REGSET_END}; | ||
109 | static const struct vga_regset s3_h_sync_end_regs[] = {{0x05, 0, 4}, VGA_REGSET_END}; | ||
110 | |||
111 | static const struct vga_regset s3_v_total_regs[] = {{0x06, 0, 7}, {0x07, 0, 0}, {0x07, 5, 5}, {0x5E, 0, 0}, VGA_REGSET_END}; | ||
112 | static const struct vga_regset s3_v_display_regs[] = {{0x12, 0, 7}, {0x07, 1, 1}, {0x07, 6, 6}, {0x5E, 1, 1}, VGA_REGSET_END}; | ||
113 | static const struct vga_regset s3_v_blank_start_regs[] = {{0x15, 0, 7}, {0x07, 3, 3}, {0x09, 5, 5}, {0x5E, 2, 2}, VGA_REGSET_END}; | ||
114 | static const struct vga_regset s3_v_blank_end_regs[] = {{0x16, 0, 7}, VGA_REGSET_END}; | ||
115 | static const struct vga_regset s3_v_sync_start_regs[] = {{0x10, 0, 7}, {0x07, 2, 2}, {0x07, 7, 7}, {0x5E, 4, 4}, VGA_REGSET_END}; | ||
116 | static const struct vga_regset s3_v_sync_end_regs[] = {{0x11, 0, 3}, VGA_REGSET_END}; | ||
117 | |||
118 | static const struct vga_regset s3_line_compare_regs[] = {{0x18, 0, 7}, {0x07, 4, 4}, {0x09, 6, 6}, {0x5E, 6, 6}, VGA_REGSET_END}; | ||
119 | static const struct vga_regset s3_start_address_regs[] = {{0x0d, 0, 7}, {0x0c, 0, 7}, {0x31, 4, 5}, {0x51, 0, 1}, VGA_REGSET_END}; | ||
120 | static const struct vga_regset s3_offset_regs[] = {{0x13, 0, 7}, {0x51, 4, 5}, VGA_REGSET_END}; /* set 0x43 bit 2 to 0 */ | ||
121 | |||
122 | static const struct svga_timing_regs s3_timing_regs = { | ||
123 | s3_h_total_regs, s3_h_display_regs, s3_h_blank_start_regs, | ||
124 | s3_h_blank_end_regs, s3_h_sync_start_regs, s3_h_sync_end_regs, | ||
125 | s3_v_total_regs, s3_v_display_regs, s3_v_blank_start_regs, | ||
126 | s3_v_blank_end_regs, s3_v_sync_start_regs, s3_v_sync_end_regs, | ||
127 | }; | ||
128 | |||
129 | |||
130 | /* ------------------------------------------------------------------------- */ | ||
131 | |||
132 | /* Module parameters */ | ||
133 | |||
134 | |||
135 | static char *mode = "640x480-8@60"; | ||
136 | |||
137 | #ifdef CONFIG_MTRR | ||
138 | static int mtrr = 1; | ||
139 | #endif | ||
140 | |||
141 | static int fasttext = 1; | ||
142 | |||
143 | |||
144 | MODULE_AUTHOR("(c) 2006-2007 Ondrej Zajicek <santiago@crfreenet.org>"); | ||
145 | MODULE_LICENSE("GPL"); | ||
146 | MODULE_DESCRIPTION("fbdev driver for S3 Trio/Virge"); | ||
147 | |||
148 | module_param(mode, charp, 0444); | ||
149 | MODULE_PARM_DESC(mode, "Default video mode ('640x480-8@60', etc)"); | ||
150 | |||
151 | #ifdef CONFIG_MTRR | ||
152 | module_param(mtrr, int, 0444); | ||
153 | MODULE_PARM_DESC(mtrr, "Enable write-combining with MTRR (1=enable, 0=disable, default=1)"); | ||
154 | #endif | ||
155 | |||
156 | module_param(fasttext, int, 0644); | ||
157 | MODULE_PARM_DESC(fasttext, "Enable S3 fast text mode (1=enable, 0=disable, default=1)"); | ||
158 | |||
159 | |||
160 | /* ------------------------------------------------------------------------- */ | ||
161 | |||
162 | /* Set font in S3 fast text mode */ | ||
163 | |||
164 | static void s3fb_settile_fast(struct fb_info *info, struct fb_tilemap *map) | ||
165 | { | ||
166 | const u8 *font = map->data; | ||
167 | u8* fb = (u8 *) info->screen_base; | ||
168 | int i, c; | ||
169 | |||
170 | if ((map->width != 8) || (map->height != 16) || | ||
171 | (map->depth != 1) || (map->length != 256)) { | ||
172 | printk(KERN_ERR "fb%d: unsupported font parameters: width %d, height %d, depth %d, length %d\n", | ||
173 | info->node, map->width, map->height, map->depth, map->length); | ||
174 | return; | ||
175 | } | ||
176 | |||
177 | fb += 2; | ||
178 | for (i = 0; i < map->height; i++) { | ||
179 | for (c = 0; c < map->length; c++) { | ||
180 | fb[c * 4] = font[c * map->height + i]; | ||
181 | } | ||
182 | fb += 1024; | ||
183 | } | ||
184 | } | ||
185 | |||
186 | |||
187 | |||
188 | static struct fb_tile_ops s3fb_tile_ops = { | ||
189 | .fb_settile = svga_settile, | ||
190 | .fb_tilecopy = svga_tilecopy, | ||
191 | .fb_tilefill = svga_tilefill, | ||
192 | .fb_tileblit = svga_tileblit, | ||
193 | .fb_tilecursor = svga_tilecursor, | ||
194 | }; | ||
195 | |||
196 | static struct fb_tile_ops s3fb_fast_tile_ops = { | ||
197 | .fb_settile = s3fb_settile_fast, | ||
198 | .fb_tilecopy = svga_tilecopy, | ||
199 | .fb_tilefill = svga_tilefill, | ||
200 | .fb_tileblit = svga_tileblit, | ||
201 | .fb_tilecursor = svga_tilecursor, | ||
202 | }; | ||
203 | |||
204 | |||
205 | /* ------------------------------------------------------------------------- */ | ||
206 | |||
207 | /* image data is MSB-first, fb structure is MSB-first too */ | ||
208 | static inline u32 expand_color(u32 c) | ||
209 | { | ||
210 | return ((c & 1) | ((c & 2) << 7) | ((c & 4) << 14) | ((c & 8) << 21)) * 0xFF; | ||
211 | } | ||
212 | |||
213 | /* s3fb_iplan_imageblit silently assumes that almost everything is 8-pixel aligned */ | ||
214 | static void s3fb_iplan_imageblit(struct fb_info *info, const struct fb_image *image) | ||
215 | { | ||
216 | u32 fg = expand_color(image->fg_color); | ||
217 | u32 bg = expand_color(image->bg_color); | ||
218 | const u8 *src1, *src; | ||
219 | u8 __iomem *dst1; | ||
220 | u32 __iomem *dst; | ||
221 | u32 val; | ||
222 | int x, y; | ||
223 | |||
224 | src1 = image->data; | ||
225 | dst1 = info->screen_base + (image->dy * info->fix.line_length) | ||
226 | + ((image->dx / 8) * 4); | ||
227 | |||
228 | for (y = 0; y < image->height; y++) { | ||
229 | src = src1; | ||
230 | dst = (u32 __iomem *) dst1; | ||
231 | for (x = 0; x < image->width; x += 8) { | ||
232 | val = *(src++) * 0x01010101; | ||
233 | val = (val & fg) | (~val & bg); | ||
234 | fb_writel(val, dst++); | ||
235 | } | ||
236 | src1 += image->width / 8; | ||
237 | dst1 += info->fix.line_length; | ||
238 | } | ||
239 | |||
240 | } | ||
241 | |||
242 | /* s3fb_iplan_fillrect silently assumes that almost everything is 8-pixel aligned */ | ||
243 | static void s3fb_iplan_fillrect(struct fb_info *info, const struct fb_fillrect *rect) | ||
244 | { | ||
245 | u32 fg = expand_color(rect->color); | ||
246 | u8 __iomem *dst1; | ||
247 | u32 __iomem *dst; | ||
248 | int x, y; | ||
249 | |||
250 | dst1 = info->screen_base + (rect->dy * info->fix.line_length) | ||
251 | + ((rect->dx / 8) * 4); | ||
252 | |||
253 | for (y = 0; y < rect->height; y++) { | ||
254 | dst = (u32 __iomem *) dst1; | ||
255 | for (x = 0; x < rect->width; x += 8) { | ||
256 | fb_writel(fg, dst++); | ||
257 | } | ||
258 | dst1 += info->fix.line_length; | ||
259 | } | ||
260 | } | ||
261 | |||
262 | |||
263 | /* image data is MSB-first, fb structure is high-nibble-in-low-byte-first */ | ||
264 | static inline u32 expand_pixel(u32 c) | ||
265 | { | ||
266 | return (((c & 1) << 24) | ((c & 2) << 27) | ((c & 4) << 14) | ((c & 8) << 17) | | ||
267 | ((c & 16) << 4) | ((c & 32) << 7) | ((c & 64) >> 6) | ((c & 128) >> 3)) * 0xF; | ||
268 | } | ||
269 | |||
270 | /* s3fb_cfb4_imageblit silently assumes that almost everything is 8-pixel aligned */ | ||
271 | static void s3fb_cfb4_imageblit(struct fb_info *info, const struct fb_image *image) | ||
272 | { | ||
273 | u32 fg = image->fg_color * 0x11111111; | ||
274 | u32 bg = image->bg_color * 0x11111111; | ||
275 | const u8 *src1, *src; | ||
276 | u8 __iomem *dst1; | ||
277 | u32 __iomem *dst; | ||
278 | u32 val; | ||
279 | int x, y; | ||
280 | |||
281 | src1 = image->data; | ||
282 | dst1 = info->screen_base + (image->dy * info->fix.line_length) | ||
283 | + ((image->dx / 8) * 4); | ||
284 | |||
285 | for (y = 0; y < image->height; y++) { | ||
286 | src = src1; | ||
287 | dst = (u32 __iomem *) dst1; | ||
288 | for (x = 0; x < image->width; x += 8) { | ||
289 | val = expand_pixel(*(src++)); | ||
290 | val = (val & fg) | (~val & bg); | ||
291 | fb_writel(val, dst++); | ||
292 | } | ||
293 | src1 += image->width / 8; | ||
294 | dst1 += info->fix.line_length; | ||
295 | } | ||
296 | } | ||
297 | |||
298 | static void s3fb_imageblit(struct fb_info *info, const struct fb_image *image) | ||
299 | { | ||
300 | if ((info->var.bits_per_pixel == 4) && (image->depth == 1) | ||
301 | && ((image->width % 8) == 0) && ((image->dx % 8) == 0)) { | ||
302 | if (info->fix.type == FB_TYPE_INTERLEAVED_PLANES) | ||
303 | s3fb_iplan_imageblit(info, image); | ||
304 | else | ||
305 | s3fb_cfb4_imageblit(info, image); | ||
306 | } else | ||
307 | cfb_imageblit(info, image); | ||
308 | } | ||
309 | |||
310 | static void s3fb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) | ||
311 | { | ||
312 | if ((info->var.bits_per_pixel == 4) | ||
313 | && ((rect->width % 8) == 0) && ((rect->dx % 8) == 0) | ||
314 | && (info->fix.type == FB_TYPE_INTERLEAVED_PLANES)) | ||
315 | s3fb_iplan_fillrect(info, rect); | ||
316 | else | ||
317 | cfb_fillrect(info, rect); | ||
318 | } | ||
319 | |||
320 | |||
321 | |||
322 | /* ------------------------------------------------------------------------- */ | ||
323 | |||
324 | |||
325 | static void s3_set_pixclock(struct fb_info *info, u32 pixclock) | ||
326 | { | ||
327 | u16 m, n, r; | ||
328 | u8 regval; | ||
329 | |||
330 | svga_compute_pll(&s3_pll, 1000000000 / pixclock, &m, &n, &r, info->node); | ||
331 | |||
332 | /* Set VGA misc register */ | ||
333 | regval = vga_r(NULL, VGA_MIS_R); | ||
334 | vga_w(NULL, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); | ||
335 | |||
336 | /* Set S3 clock registers */ | ||
337 | vga_wseq(NULL, 0x12, ((n - 2) | (r << 5))); | ||
338 | vga_wseq(NULL, 0x13, m - 2); | ||
339 | |||
340 | udelay(1000); | ||
341 | |||
342 | /* Activate clock - write 0, 1, 0 to seq/15 bit 5 */ | ||
343 | regval = vga_rseq (NULL, 0x15); /* | 0x80; */ | ||
344 | vga_wseq(NULL, 0x15, regval & ~(1<<5)); | ||
345 | vga_wseq(NULL, 0x15, regval | (1<<5)); | ||
346 | vga_wseq(NULL, 0x15, regval & ~(1<<5)); | ||
347 | } | ||
348 | |||
349 | |||
350 | /* Open framebuffer */ | ||
351 | |||
352 | static int s3fb_open(struct fb_info *info, int user) | ||
353 | { | ||
354 | struct s3fb_info *par = info->par; | ||
355 | |||
356 | mutex_lock(&(par->open_lock)); | ||
357 | if (par->ref_count == 0) { | ||
358 | memset(&(par->state), 0, sizeof(struct vgastate)); | ||
359 | par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS | VGA_SAVE_CMAP; | ||
360 | par->state.num_crtc = 0x70; | ||
361 | par->state.num_seq = 0x20; | ||
362 | save_vga(&(par->state)); | ||
363 | } | ||
364 | |||
365 | par->ref_count++; | ||
366 | mutex_unlock(&(par->open_lock)); | ||
367 | |||
368 | return 0; | ||
369 | } | ||
370 | |||
371 | /* Close framebuffer */ | ||
372 | |||
373 | static int s3fb_release(struct fb_info *info, int user) | ||
374 | { | ||
375 | struct s3fb_info *par = info->par; | ||
376 | |||
377 | mutex_lock(&(par->open_lock)); | ||
378 | if (par->ref_count == 0) { | ||
379 | mutex_unlock(&(par->open_lock)); | ||
380 | return -EINVAL; | ||
381 | } | ||
382 | |||
383 | if (par->ref_count == 1) | ||
384 | restore_vga(&(par->state)); | ||
385 | |||
386 | par->ref_count--; | ||
387 | mutex_unlock(&(par->open_lock)); | ||
388 | |||
389 | return 0; | ||
390 | } | ||
391 | |||
392 | /* Validate passed in var */ | ||
393 | |||
394 | static int s3fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | ||
395 | { | ||
396 | struct s3fb_info *par = info->par; | ||
397 | int rv, mem, step; | ||
398 | |||
399 | /* Find appropriate format */ | ||
400 | rv = svga_match_format (s3fb_formats, var, NULL); | ||
401 | if ((rv < 0) || ((par->chip == CHIP_988_VIRGE_VX) ? (rv == 7) : (rv == 6))) | ||
402 | { /* 24bpp on VIRGE VX, 32bpp on others */ | ||
403 | printk(KERN_ERR "fb%d: unsupported mode requested\n", info->node); | ||
404 | return rv; | ||
405 | } | ||
406 | |||
407 | /* Do not allow to have real resoulution larger than virtual */ | ||
408 | if (var->xres > var->xres_virtual) | ||
409 | var->xres_virtual = var->xres; | ||
410 | |||
411 | if (var->yres > var->yres_virtual) | ||
412 | var->yres_virtual = var->yres; | ||
413 | |||
414 | /* Round up xres_virtual to have proper alignment of lines */ | ||
415 | step = s3fb_formats[rv].xresstep - 1; | ||
416 | var->xres_virtual = (var->xres_virtual+step) & ~step; | ||
417 | |||
418 | /* Check whether have enough memory */ | ||
419 | mem = ((var->bits_per_pixel * var->xres_virtual) >> 3) * var->yres_virtual; | ||
420 | if (mem > info->screen_size) | ||
421 | { | ||
422 | printk(KERN_ERR "fb%d: not enough framebuffer memory (%d kB requested , %d kB available)\n", | ||
423 | info->node, mem >> 10, (unsigned int) (info->screen_size >> 10)); | ||
424 | return -EINVAL; | ||
425 | } | ||
426 | |||
427 | rv = svga_check_timings (&s3_timing_regs, var, info->node); | ||
428 | if (rv < 0) | ||
429 | { | ||
430 | printk(KERN_ERR "fb%d: invalid timings requested\n", info->node); | ||
431 | return rv; | ||
432 | } | ||
433 | |||
434 | return 0; | ||
435 | } | ||
436 | |||
437 | /* Set video mode from par */ | ||
438 | |||
439 | static int s3fb_set_par(struct fb_info *info) | ||
440 | { | ||
441 | struct s3fb_info *par = info->par; | ||
442 | u32 value, mode, hmul, offset_value, screen_size, multiplex; | ||
443 | u32 bpp = info->var.bits_per_pixel; | ||
444 | |||
445 | if (bpp != 0) { | ||
446 | info->fix.ypanstep = 1; | ||
447 | info->fix.line_length = (info->var.xres_virtual * bpp) / 8; | ||
448 | |||
449 | info->flags &= ~FBINFO_MISC_TILEBLITTING; | ||
450 | info->tileops = NULL; | ||
451 | |||
452 | offset_value = (info->var.xres_virtual * bpp) / 64; | ||
453 | screen_size = info->var.yres_virtual * info->fix.line_length; | ||
454 | } else { | ||
455 | info->fix.ypanstep = 16; | ||
456 | info->fix.line_length = 0; | ||
457 | |||
458 | info->flags |= FBINFO_MISC_TILEBLITTING; | ||
459 | info->tileops = fasttext ? &s3fb_fast_tile_ops : &s3fb_tile_ops; | ||
460 | |||
461 | offset_value = info->var.xres_virtual / 16; | ||
462 | screen_size = (info->var.xres_virtual * info->var.yres_virtual) / 64; | ||
463 | } | ||
464 | |||
465 | info->var.xoffset = 0; | ||
466 | info->var.yoffset = 0; | ||
467 | info->var.activate = FB_ACTIVATE_NOW; | ||
468 | |||
469 | /* Unlock registers */ | ||
470 | vga_wcrt(NULL, 0x38, 0x48); | ||
471 | vga_wcrt(NULL, 0x39, 0xA5); | ||
472 | vga_wseq(NULL, 0x08, 0x06); | ||
473 | svga_wcrt_mask(0x11, 0x00, 0x80); | ||
474 | |||
475 | /* Blank screen and turn off sync */ | ||
476 | svga_wseq_mask(0x01, 0x20, 0x20); | ||
477 | svga_wcrt_mask(0x17, 0x00, 0x80); | ||
478 | |||
479 | /* Set default values */ | ||
480 | svga_set_default_gfx_regs(); | ||
481 | svga_set_default_atc_regs(); | ||
482 | svga_set_default_seq_regs(); | ||
483 | svga_set_default_crt_regs(); | ||
484 | svga_wcrt_multi(s3_line_compare_regs, 0xFFFFFFFF); | ||
485 | svga_wcrt_multi(s3_start_address_regs, 0); | ||
486 | |||
487 | /* S3 specific initialization */ | ||
488 | svga_wcrt_mask(0x58, 0x10, 0x10); /* enable linear framebuffer */ | ||
489 | svga_wcrt_mask(0x31, 0x08, 0x08); /* enable sequencer access to framebuffer above 256 kB */ | ||
490 | |||
491 | /* svga_wcrt_mask(0x33, 0x08, 0x08); */ /* DDR ? */ | ||
492 | /* svga_wcrt_mask(0x43, 0x01, 0x01); */ /* DDR ? */ | ||
493 | svga_wcrt_mask(0x33, 0x00, 0x08); /* no DDR ? */ | ||
494 | svga_wcrt_mask(0x43, 0x00, 0x01); /* no DDR ? */ | ||
495 | |||
496 | svga_wcrt_mask(0x5D, 0x00, 0x28); // Clear strange HSlen bits | ||
497 | |||
498 | /* svga_wcrt_mask(0x58, 0x03, 0x03); */ | ||
499 | |||
500 | /* svga_wcrt_mask(0x53, 0x12, 0x13); */ /* enable MMIO */ | ||
501 | /* svga_wcrt_mask(0x40, 0x08, 0x08); */ /* enable write buffer */ | ||
502 | |||
503 | |||
504 | /* Set the offset register */ | ||
505 | pr_debug("fb%d: offset register : %d\n", info->node, offset_value); | ||
506 | svga_wcrt_multi(s3_offset_regs, offset_value); | ||
507 | |||
508 | vga_wcrt(NULL, 0x54, 0x18); /* M parameter */ | ||
509 | vga_wcrt(NULL, 0x60, 0xff); /* N parameter */ | ||
510 | vga_wcrt(NULL, 0x61, 0xff); /* L parameter */ | ||
511 | vga_wcrt(NULL, 0x62, 0xff); /* L parameter */ | ||
512 | |||
513 | vga_wcrt(NULL, 0x3A, 0x35); | ||
514 | svga_wattr(0x33, 0x00); | ||
515 | |||
516 | if (info->var.vmode & FB_VMODE_DOUBLE) | ||
517 | svga_wcrt_mask(0x09, 0x80, 0x80); | ||
518 | else | ||
519 | svga_wcrt_mask(0x09, 0x00, 0x80); | ||
520 | |||
521 | if (info->var.vmode & FB_VMODE_INTERLACED) | ||
522 | svga_wcrt_mask(0x42, 0x20, 0x20); | ||
523 | else | ||
524 | svga_wcrt_mask(0x42, 0x00, 0x20); | ||
525 | |||
526 | /* Disable hardware graphics cursor */ | ||
527 | svga_wcrt_mask(0x45, 0x00, 0x01); | ||
528 | /* Disable Streams engine */ | ||
529 | svga_wcrt_mask(0x67, 0x00, 0x0C); | ||
530 | |||
531 | mode = svga_match_format(s3fb_formats, &(info->var), &(info->fix)); | ||
532 | |||
533 | /* S3 virge DX hack */ | ||
534 | if (par->chip == CHIP_375_VIRGE_DX) { | ||
535 | vga_wcrt(NULL, 0x86, 0x80); | ||
536 | vga_wcrt(NULL, 0x90, 0x00); | ||
537 | } | ||
538 | |||
539 | /* S3 virge VX hack */ | ||
540 | if (par->chip == CHIP_988_VIRGE_VX) { | ||
541 | vga_wcrt(NULL, 0x50, 0x00); | ||
542 | vga_wcrt(NULL, 0x67, 0x50); | ||
543 | |||
544 | vga_wcrt(NULL, 0x63, (mode <= 2) ? 0x90 : 0x09); | ||
545 | vga_wcrt(NULL, 0x66, 0x90); | ||
546 | } | ||
547 | |||
548 | svga_wcrt_mask(0x31, 0x00, 0x40); | ||
549 | multiplex = 0; | ||
550 | hmul = 1; | ||
551 | |||
552 | /* Set mode-specific register values */ | ||
553 | switch (mode) { | ||
554 | case 0: | ||
555 | pr_debug("fb%d: text mode\n", info->node); | ||
556 | svga_set_textmode_vga_regs(); | ||
557 | |||
558 | /* Set additional registers like in 8-bit mode */ | ||
559 | svga_wcrt_mask(0x50, 0x00, 0x30); | ||
560 | svga_wcrt_mask(0x67, 0x00, 0xF0); | ||
561 | |||
562 | /* Disable enhanced mode */ | ||
563 | svga_wcrt_mask(0x3A, 0x00, 0x30); | ||
564 | |||
565 | if (fasttext) { | ||
566 | pr_debug("fb%d: high speed text mode set\n", info->node); | ||
567 | svga_wcrt_mask(0x31, 0x40, 0x40); | ||
568 | } | ||
569 | break; | ||
570 | case 1: | ||
571 | pr_debug("fb%d: 4 bit pseudocolor\n", info->node); | ||
572 | vga_wgfx(NULL, VGA_GFX_MODE, 0x40); | ||
573 | |||
574 | /* Set additional registers like in 8-bit mode */ | ||
575 | svga_wcrt_mask(0x50, 0x00, 0x30); | ||
576 | svga_wcrt_mask(0x67, 0x00, 0xF0); | ||
577 | |||
578 | /* disable enhanced mode */ | ||
579 | svga_wcrt_mask(0x3A, 0x00, 0x30); | ||
580 | break; | ||
581 | case 2: | ||
582 | pr_debug("fb%d: 4 bit pseudocolor, planar\n", info->node); | ||
583 | |||
584 | /* Set additional registers like in 8-bit mode */ | ||
585 | svga_wcrt_mask(0x50, 0x00, 0x30); | ||
586 | svga_wcrt_mask(0x67, 0x00, 0xF0); | ||
587 | |||
588 | /* disable enhanced mode */ | ||
589 | svga_wcrt_mask(0x3A, 0x00, 0x30); | ||
590 | break; | ||
591 | case 3: | ||
592 | pr_debug("fb%d: 8 bit pseudocolor\n", info->node); | ||
593 | if (info->var.pixclock > 20000) { | ||
594 | svga_wcrt_mask(0x50, 0x00, 0x30); | ||
595 | svga_wcrt_mask(0x67, 0x00, 0xF0); | ||
596 | } else { | ||
597 | svga_wcrt_mask(0x50, 0x00, 0x30); | ||
598 | svga_wcrt_mask(0x67, 0x10, 0xF0); | ||
599 | multiplex = 1; | ||
600 | } | ||
601 | break; | ||
602 | case 4: | ||
603 | pr_debug("fb%d: 5/5/5 truecolor\n", info->node); | ||
604 | if (par->chip == CHIP_988_VIRGE_VX) { | ||
605 | if (info->var.pixclock > 20000) | ||
606 | svga_wcrt_mask(0x67, 0x20, 0xF0); | ||
607 | else | ||
608 | svga_wcrt_mask(0x67, 0x30, 0xF0); | ||
609 | } else { | ||
610 | svga_wcrt_mask(0x50, 0x10, 0x30); | ||
611 | svga_wcrt_mask(0x67, 0x30, 0xF0); | ||
612 | hmul = 2; | ||
613 | } | ||
614 | break; | ||
615 | case 5: | ||
616 | pr_debug("fb%d: 5/6/5 truecolor\n", info->node); | ||
617 | if (par->chip == CHIP_988_VIRGE_VX) { | ||
618 | if (info->var.pixclock > 20000) | ||
619 | svga_wcrt_mask(0x67, 0x40, 0xF0); | ||
620 | else | ||
621 | svga_wcrt_mask(0x67, 0x50, 0xF0); | ||
622 | } else { | ||
623 | svga_wcrt_mask(0x50, 0x10, 0x30); | ||
624 | svga_wcrt_mask(0x67, 0x50, 0xF0); | ||
625 | hmul = 2; | ||
626 | } | ||
627 | break; | ||
628 | case 6: | ||
629 | /* VIRGE VX case */ | ||
630 | pr_debug("fb%d: 8/8/8 truecolor\n", info->node); | ||
631 | svga_wcrt_mask(0x67, 0xD0, 0xF0); | ||
632 | break; | ||
633 | case 7: | ||
634 | pr_debug("fb%d: 8/8/8/8 truecolor\n", info->node); | ||
635 | svga_wcrt_mask(0x50, 0x30, 0x30); | ||
636 | svga_wcrt_mask(0x67, 0xD0, 0xF0); | ||
637 | break; | ||
638 | default: | ||
639 | printk(KERN_ERR "fb%d: unsupported mode - bug\n", info->node); | ||
640 | return -EINVAL; | ||
641 | } | ||
642 | |||
643 | if (par->chip != CHIP_988_VIRGE_VX) { | ||
644 | svga_wseq_mask(0x15, multiplex ? 0x10 : 0x00, 0x10); | ||
645 | svga_wseq_mask(0x18, multiplex ? 0x80 : 0x00, 0x80); | ||
646 | } | ||
647 | |||
648 | s3_set_pixclock(info, info->var.pixclock); | ||
649 | svga_set_timings(&s3_timing_regs, &(info->var), hmul, 1, | ||
650 | (info->var.vmode & FB_VMODE_DOUBLE) ? 2 : 1, | ||
651 | (info->var.vmode & FB_VMODE_INTERLACED) ? 2 : 1, | ||
652 | hmul, info->node); | ||
653 | |||
654 | /* Set interlaced mode start/end register */ | ||
655 | value = info->var.xres + info->var.left_margin + info->var.right_margin + info->var.hsync_len; | ||
656 | value = ((value * hmul) / 8) - 5; | ||
657 | vga_wcrt(NULL, 0x3C, (value + 1) / 2); | ||
658 | |||
659 | memset((u8*)info->screen_base, 0x00, screen_size); | ||
660 | /* Device and screen back on */ | ||
661 | svga_wcrt_mask(0x17, 0x80, 0x80); | ||
662 | svga_wseq_mask(0x01, 0x00, 0x20); | ||
663 | |||
664 | return 0; | ||
665 | } | ||
666 | |||
667 | /* Set a colour register */ | ||
668 | |||
669 | static int s3fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | ||
670 | u_int transp, struct fb_info *fb) | ||
671 | { | ||
672 | switch (fb->var.bits_per_pixel) { | ||
673 | case 0: | ||
674 | case 4: | ||
675 | if (regno >= 16) | ||
676 | return -EINVAL; | ||
677 | |||
678 | if ((fb->var.bits_per_pixel == 4) && | ||
679 | (fb->var.nonstd == 0)) { | ||
680 | outb(0xF0, VGA_PEL_MSK); | ||
681 | outb(regno*16, VGA_PEL_IW); | ||
682 | } else { | ||
683 | outb(0x0F, VGA_PEL_MSK); | ||
684 | outb(regno, VGA_PEL_IW); | ||
685 | } | ||
686 | outb(red >> 10, VGA_PEL_D); | ||
687 | outb(green >> 10, VGA_PEL_D); | ||
688 | outb(blue >> 10, VGA_PEL_D); | ||
689 | break; | ||
690 | case 8: | ||
691 | if (regno >= 256) | ||
692 | return -EINVAL; | ||
693 | |||
694 | outb(0xFF, VGA_PEL_MSK); | ||
695 | outb(regno, VGA_PEL_IW); | ||
696 | outb(red >> 10, VGA_PEL_D); | ||
697 | outb(green >> 10, VGA_PEL_D); | ||
698 | outb(blue >> 10, VGA_PEL_D); | ||
699 | break; | ||
700 | case 16: | ||
701 | if (regno >= 16) | ||
702 | return -EINVAL; | ||
703 | |||
704 | if (fb->var.green.length == 5) | ||
705 | ((u32*)fb->pseudo_palette)[regno] = ((red & 0xF800) >> 1) | | ||
706 | ((green & 0xF800) >> 6) | ((blue & 0xF800) >> 11); | ||
707 | else if (fb->var.green.length == 6) | ||
708 | ((u32*)fb->pseudo_palette)[regno] = (red & 0xF800) | | ||
709 | ((green & 0xFC00) >> 5) | ((blue & 0xF800) >> 11); | ||
710 | else return -EINVAL; | ||
711 | break; | ||
712 | case 24: | ||
713 | case 32: | ||
714 | if (regno >= 16) | ||
715 | return -EINVAL; | ||
716 | |||
717 | ((u32*)fb->pseudo_palette)[regno] = ((transp & 0xFF00) << 16) | ((red & 0xFF00) << 8) | | ||
718 | (green & 0xFF00) | ((blue & 0xFF00) >> 8); | ||
719 | break; | ||
720 | default: | ||
721 | return -EINVAL; | ||
722 | } | ||
723 | |||
724 | return 0; | ||
725 | } | ||
726 | |||
727 | |||
728 | /* Set the display blanking state */ | ||
729 | |||
730 | static int s3fb_blank(int blank_mode, struct fb_info *info) | ||
731 | { | ||
732 | switch (blank_mode) { | ||
733 | case FB_BLANK_UNBLANK: | ||
734 | pr_debug("fb%d: unblank\n", info->node); | ||
735 | svga_wcrt_mask(0x56, 0x00, 0x06); | ||
736 | svga_wseq_mask(0x01, 0x00, 0x20); | ||
737 | break; | ||
738 | case FB_BLANK_NORMAL: | ||
739 | pr_debug("fb%d: blank\n", info->node); | ||
740 | svga_wcrt_mask(0x56, 0x00, 0x06); | ||
741 | svga_wseq_mask(0x01, 0x20, 0x20); | ||
742 | break; | ||
743 | case FB_BLANK_HSYNC_SUSPEND: | ||
744 | pr_debug("fb%d: hsync\n", info->node); | ||
745 | svga_wcrt_mask(0x56, 0x02, 0x06); | ||
746 | svga_wseq_mask(0x01, 0x20, 0x20); | ||
747 | break; | ||
748 | case FB_BLANK_VSYNC_SUSPEND: | ||
749 | pr_debug("fb%d: vsync\n", info->node); | ||
750 | svga_wcrt_mask(0x56, 0x04, 0x06); | ||
751 | svga_wseq_mask(0x01, 0x20, 0x20); | ||
752 | break; | ||
753 | case FB_BLANK_POWERDOWN: | ||
754 | pr_debug("fb%d: sync down\n", info->node); | ||
755 | svga_wcrt_mask(0x56, 0x06, 0x06); | ||
756 | svga_wseq_mask(0x01, 0x20, 0x20); | ||
757 | break; | ||
758 | } | ||
759 | |||
760 | return 0; | ||
761 | } | ||
762 | |||
763 | |||
764 | /* Pan the display */ | ||
765 | |||
766 | static int s3fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) { | ||
767 | |||
768 | unsigned int offset; | ||
769 | |||
770 | /* Validate the offsets */ | ||
771 | if ((var->xoffset + var->xres) > var->xres_virtual) | ||
772 | return -EINVAL; | ||
773 | if ((var->yoffset + var->yres) > var->yres_virtual) | ||
774 | return -EINVAL; | ||
775 | |||
776 | /* Calculate the offset */ | ||
777 | if (var->bits_per_pixel == 0) { | ||
778 | offset = (var->yoffset / 16) * (var->xres_virtual / 2) + (var->xoffset / 2); | ||
779 | offset = offset >> 2; | ||
780 | } else { | ||
781 | offset = (var->yoffset * info->fix.line_length) + | ||
782 | (var->xoffset * var->bits_per_pixel / 8); | ||
783 | offset = offset >> 2; | ||
784 | } | ||
785 | |||
786 | /* Set the offset */ | ||
787 | svga_wcrt_multi(s3_start_address_regs, offset); | ||
788 | |||
789 | return 0; | ||
790 | } | ||
791 | |||
792 | /* ------------------------------------------------------------------------- */ | ||
793 | |||
794 | /* Frame buffer operations */ | ||
795 | |||
796 | static struct fb_ops s3fb_ops = { | ||
797 | .owner = THIS_MODULE, | ||
798 | .fb_open = s3fb_open, | ||
799 | .fb_release = s3fb_release, | ||
800 | .fb_check_var = s3fb_check_var, | ||
801 | .fb_set_par = s3fb_set_par, | ||
802 | .fb_setcolreg = s3fb_setcolreg, | ||
803 | .fb_blank = s3fb_blank, | ||
804 | .fb_pan_display = s3fb_pan_display, | ||
805 | .fb_fillrect = s3fb_fillrect, | ||
806 | .fb_copyarea = cfb_copyarea, | ||
807 | .fb_imageblit = s3fb_imageblit, | ||
808 | }; | ||
809 | |||
810 | /* ------------------------------------------------------------------------- */ | ||
811 | |||
812 | static int __devinit s3_identification(int chip) | ||
813 | { | ||
814 | if (chip == CHIP_XXX_TRIO) { | ||
815 | u8 cr30 = vga_rcrt(NULL, 0x30); | ||
816 | u8 cr2e = vga_rcrt(NULL, 0x2e); | ||
817 | u8 cr2f = vga_rcrt(NULL, 0x2f); | ||
818 | |||
819 | if ((cr30 == 0xE0) || (cr30 == 0xE1)) { | ||
820 | if (cr2e == 0x10) | ||
821 | return CHIP_732_TRIO32; | ||
822 | if (cr2e == 0x11) { | ||
823 | if (! (cr2f & 0x40)) | ||
824 | return CHIP_764_TRIO64; | ||
825 | else | ||
826 | return CHIP_765_TRIO64VP; | ||
827 | } | ||
828 | } | ||
829 | } | ||
830 | |||
831 | if (chip == CHIP_XXX_TRIO64V2_DXGX) { | ||
832 | u8 cr6f = vga_rcrt(NULL, 0x6f); | ||
833 | |||
834 | if (! (cr6f & 0x01)) | ||
835 | return CHIP_775_TRIO64V2_DX; | ||
836 | else | ||
837 | return CHIP_785_TRIO64V2_GX; | ||
838 | } | ||
839 | |||
840 | if (chip == CHIP_XXX_VIRGE_DXGX) { | ||
841 | u8 cr6f = vga_rcrt(NULL, 0x6f); | ||
842 | |||
843 | if (! (cr6f & 0x01)) | ||
844 | return CHIP_375_VIRGE_DX; | ||
845 | else | ||
846 | return CHIP_385_VIRGE_GX; | ||
847 | } | ||
848 | |||
849 | return CHIP_UNKNOWN; | ||
850 | } | ||
851 | |||
852 | |||
853 | /* PCI probe */ | ||
854 | |||
855 | static int __devinit s3_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) | ||
856 | { | ||
857 | struct fb_info *info; | ||
858 | struct s3fb_info *par; | ||
859 | int rc; | ||
860 | u8 regval, cr38, cr39; | ||
861 | |||
862 | /* Ignore secondary VGA device because there is no VGA arbitration */ | ||
863 | if (! svga_primary_device(dev)) { | ||
864 | dev_info(&(dev->dev), "ignoring secondary device\n"); | ||
865 | return -ENODEV; | ||
866 | } | ||
867 | |||
868 | /* Allocate and fill driver data structure */ | ||
869 | info = framebuffer_alloc(sizeof(struct s3fb_info), NULL); | ||
870 | if (!info) { | ||
871 | dev_err(&(dev->dev), "cannot allocate memory\n"); | ||
872 | return -ENOMEM; | ||
873 | } | ||
874 | |||
875 | par = info->par; | ||
876 | mutex_init(&par->open_lock); | ||
877 | |||
878 | info->flags = FBINFO_PARTIAL_PAN_OK | FBINFO_HWACCEL_YPAN; | ||
879 | info->fbops = &s3fb_ops; | ||
880 | |||
881 | /* Prepare PCI device */ | ||
882 | rc = pci_enable_device(dev); | ||
883 | if (rc < 0) { | ||
884 | dev_err(&(dev->dev), "cannot enable PCI device\n"); | ||
885 | goto err_enable_device; | ||
886 | } | ||
887 | |||
888 | rc = pci_request_regions(dev, "s3fb"); | ||
889 | if (rc < 0) { | ||
890 | dev_err(&(dev->dev), "cannot reserve framebuffer region\n"); | ||
891 | goto err_request_regions; | ||
892 | } | ||
893 | |||
894 | |||
895 | info->fix.smem_start = pci_resource_start(dev, 0); | ||
896 | info->fix.smem_len = pci_resource_len(dev, 0); | ||
897 | |||
898 | /* Map physical IO memory address into kernel space */ | ||
899 | info->screen_base = pci_iomap(dev, 0, 0); | ||
900 | if (! info->screen_base) { | ||
901 | rc = -ENOMEM; | ||
902 | dev_err(&(dev->dev), "iomap for framebuffer failed\n"); | ||
903 | goto err_iomap; | ||
904 | } | ||
905 | |||
906 | /* Unlock regs */ | ||
907 | cr38 = vga_rcrt(NULL, 0x38); | ||
908 | cr39 = vga_rcrt(NULL, 0x39); | ||
909 | vga_wseq(NULL, 0x08, 0x06); | ||
910 | vga_wcrt(NULL, 0x38, 0x48); | ||
911 | vga_wcrt(NULL, 0x39, 0xA5); | ||
912 | |||
913 | /* Find how many physical memory there is on card */ | ||
914 | /* 0x36 register is accessible even if other registers are locked */ | ||
915 | regval = vga_rcrt(NULL, 0x36); | ||
916 | info->screen_size = s3_memsizes[regval >> 5] << 10; | ||
917 | info->fix.smem_len = info->screen_size; | ||
918 | |||
919 | par->chip = id->driver_data & CHIP_MASK; | ||
920 | par->rev = vga_rcrt(NULL, 0x2f); | ||
921 | if (par->chip & CHIP_UNDECIDED_FLAG) | ||
922 | par->chip = s3_identification(par->chip); | ||
923 | |||
924 | /* Find MCLK frequency */ | ||
925 | regval = vga_rseq(NULL, 0x10); | ||
926 | par->mclk_freq = ((vga_rseq(NULL, 0x11) + 2) * 14318) / ((regval & 0x1F) + 2); | ||
927 | par->mclk_freq = par->mclk_freq >> (regval >> 5); | ||
928 | |||
929 | /* Restore locks */ | ||
930 | vga_wcrt(NULL, 0x38, cr38); | ||
931 | vga_wcrt(NULL, 0x39, cr39); | ||
932 | |||
933 | strcpy(info->fix.id, s3_names [par->chip]); | ||
934 | info->fix.mmio_start = 0; | ||
935 | info->fix.mmio_len = 0; | ||
936 | info->fix.type = FB_TYPE_PACKED_PIXELS; | ||
937 | info->fix.visual = FB_VISUAL_PSEUDOCOLOR; | ||
938 | info->fix.ypanstep = 0; | ||
939 | info->fix.accel = FB_ACCEL_NONE; | ||
940 | info->pseudo_palette = (void*) (par->pseudo_palette); | ||
941 | |||
942 | /* Prepare startup mode */ | ||
943 | rc = fb_find_mode(&(info->var), info, mode, NULL, 0, NULL, 8); | ||
944 | if (! ((rc == 1) || (rc == 2))) { | ||
945 | rc = -EINVAL; | ||
946 | dev_err(&(dev->dev), "mode %s not found\n", mode); | ||
947 | goto err_find_mode; | ||
948 | } | ||
949 | |||
950 | rc = fb_alloc_cmap(&info->cmap, 256, 0); | ||
951 | if (rc < 0) { | ||
952 | dev_err(&(dev->dev), "cannot allocate colormap\n"); | ||
953 | goto err_alloc_cmap; | ||
954 | } | ||
955 | |||
956 | rc = register_framebuffer(info); | ||
957 | if (rc < 0) { | ||
958 | dev_err(&(dev->dev), "cannot register framebuffer\n"); | ||
959 | goto err_reg_fb; | ||
960 | } | ||
961 | |||
962 | printk(KERN_INFO "fb%d: %s on %s, %d MB RAM, %d MHz MCLK\n", info->node, info->fix.id, | ||
963 | pci_name(dev), info->fix.smem_len >> 20, (par->mclk_freq + 500) / 1000); | ||
964 | |||
965 | if (par->chip == CHIP_UNKNOWN) | ||
966 | printk(KERN_INFO "fb%d: unknown chip, CR2D=%x, CR2E=%x, CRT2F=%x, CRT30=%x\n", | ||
967 | info->node, vga_rcrt(NULL, 0x2d), vga_rcrt(NULL, 0x2e), | ||
968 | vga_rcrt(NULL, 0x2f), vga_rcrt(NULL, 0x30)); | ||
969 | |||
970 | /* Record a reference to the driver data */ | ||
971 | pci_set_drvdata(dev, info); | ||
972 | |||
973 | #ifdef CONFIG_MTRR | ||
974 | if (mtrr) { | ||
975 | par->mtrr_reg = -1; | ||
976 | par->mtrr_reg = mtrr_add(info->fix.smem_start, info->fix.smem_len, MTRR_TYPE_WRCOMB, 1); | ||
977 | } | ||
978 | #endif | ||
979 | |||
980 | return 0; | ||
981 | |||
982 | /* Error handling */ | ||
983 | err_reg_fb: | ||
984 | fb_dealloc_cmap(&info->cmap); | ||
985 | err_alloc_cmap: | ||
986 | err_find_mode: | ||
987 | pci_iounmap(dev, info->screen_base); | ||
988 | err_iomap: | ||
989 | pci_release_regions(dev); | ||
990 | err_request_regions: | ||
991 | /* pci_disable_device(dev); */ | ||
992 | err_enable_device: | ||
993 | framebuffer_release(info); | ||
994 | return rc; | ||
995 | } | ||
996 | |||
997 | |||
998 | /* PCI remove */ | ||
999 | |||
1000 | static void __devexit s3_pci_remove(struct pci_dev *dev) | ||
1001 | { | ||
1002 | struct fb_info *info = pci_get_drvdata(dev); | ||
1003 | struct s3fb_info *par = info->par; | ||
1004 | |||
1005 | if (info) { | ||
1006 | |||
1007 | #ifdef CONFIG_MTRR | ||
1008 | if (par->mtrr_reg >= 0) { | ||
1009 | mtrr_del(par->mtrr_reg, 0, 0); | ||
1010 | par->mtrr_reg = -1; | ||
1011 | } | ||
1012 | #endif | ||
1013 | |||
1014 | unregister_framebuffer(info); | ||
1015 | fb_dealloc_cmap(&info->cmap); | ||
1016 | |||
1017 | pci_iounmap(dev, info->screen_base); | ||
1018 | pci_release_regions(dev); | ||
1019 | /* pci_disable_device(dev); */ | ||
1020 | |||
1021 | pci_set_drvdata(dev, NULL); | ||
1022 | framebuffer_release(info); | ||
1023 | } | ||
1024 | } | ||
1025 | |||
1026 | /* PCI suspend */ | ||
1027 | |||
1028 | static int s3_pci_suspend(struct pci_dev* dev, pm_message_t state) | ||
1029 | { | ||
1030 | struct fb_info *info = pci_get_drvdata(dev); | ||
1031 | struct s3fb_info *par = info->par; | ||
1032 | |||
1033 | dev_info(&(dev->dev), "suspend\n"); | ||
1034 | |||
1035 | acquire_console_sem(); | ||
1036 | mutex_lock(&(par->open_lock)); | ||
1037 | |||
1038 | if ((state.event == PM_EVENT_FREEZE) || (par->ref_count == 0)) { | ||
1039 | mutex_unlock(&(par->open_lock)); | ||
1040 | release_console_sem(); | ||
1041 | return 0; | ||
1042 | } | ||
1043 | |||
1044 | fb_set_suspend(info, 1); | ||
1045 | |||
1046 | pci_save_state(dev); | ||
1047 | pci_disable_device(dev); | ||
1048 | pci_set_power_state(dev, pci_choose_state(dev, state)); | ||
1049 | |||
1050 | mutex_unlock(&(par->open_lock)); | ||
1051 | release_console_sem(); | ||
1052 | |||
1053 | return 0; | ||
1054 | } | ||
1055 | |||
1056 | |||
1057 | /* PCI resume */ | ||
1058 | |||
1059 | static int s3_pci_resume(struct pci_dev* dev) | ||
1060 | { | ||
1061 | struct fb_info *info = pci_get_drvdata(dev); | ||
1062 | struct s3fb_info *par = info->par; | ||
1063 | |||
1064 | dev_info(&(dev->dev), "resume\n"); | ||
1065 | |||
1066 | acquire_console_sem(); | ||
1067 | mutex_lock(&(par->open_lock)); | ||
1068 | |||
1069 | if (par->ref_count == 0) { | ||
1070 | mutex_unlock(&(par->open_lock)); | ||
1071 | release_console_sem(); | ||
1072 | return 0; | ||
1073 | } | ||
1074 | |||
1075 | pci_set_power_state(dev, PCI_D0); | ||
1076 | pci_restore_state(dev); | ||
1077 | pci_enable_device(dev); | ||
1078 | pci_set_master(dev); | ||
1079 | |||
1080 | s3fb_set_par(info); | ||
1081 | fb_set_suspend(info, 0); | ||
1082 | |||
1083 | mutex_unlock(&(par->open_lock)); | ||
1084 | release_console_sem(); | ||
1085 | |||
1086 | return 0; | ||
1087 | } | ||
1088 | |||
1089 | |||
1090 | /* List of boards that we are trying to support */ | ||
1091 | |||
1092 | static struct pci_device_id s3_devices[] __devinitdata = { | ||
1093 | {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8810), .driver_data = CHIP_XXX_TRIO}, | ||
1094 | {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8811), .driver_data = CHIP_XXX_TRIO}, | ||
1095 | {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8812), .driver_data = CHIP_M65_AURORA64VP}, | ||
1096 | {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8814), .driver_data = CHIP_767_TRIO64UVP}, | ||
1097 | {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8901), .driver_data = CHIP_XXX_TRIO64V2_DXGX}, | ||
1098 | {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8902), .driver_data = CHIP_551_PLATO_PX}, | ||
1099 | |||
1100 | {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x5631), .driver_data = CHIP_325_VIRGE}, | ||
1101 | {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x883D), .driver_data = CHIP_988_VIRGE_VX}, | ||
1102 | {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A01), .driver_data = CHIP_XXX_VIRGE_DXGX}, | ||
1103 | {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A10), .driver_data = CHIP_356_VIRGE_GX2}, | ||
1104 | {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A11), .driver_data = CHIP_357_VIRGE_GX2P}, | ||
1105 | {PCI_DEVICE(PCI_VENDOR_ID_S3, 0x8A12), .driver_data = CHIP_359_VIRGE_GX2P}, | ||
1106 | |||
1107 | {0, 0, 0, 0, 0, 0, 0} | ||
1108 | }; | ||
1109 | |||
1110 | |||
1111 | MODULE_DEVICE_TABLE(pci, s3_devices); | ||
1112 | |||
1113 | static struct pci_driver s3fb_pci_driver = { | ||
1114 | .name = "s3fb", | ||
1115 | .id_table = s3_devices, | ||
1116 | .probe = s3_pci_probe, | ||
1117 | .remove = __devexit_p(s3_pci_remove), | ||
1118 | .suspend = s3_pci_suspend, | ||
1119 | .resume = s3_pci_resume, | ||
1120 | }; | ||
1121 | |||
1122 | /* Parse user speficied options */ | ||
1123 | |||
1124 | #ifndef MODULE | ||
1125 | static int __init s3fb_setup(char *options) | ||
1126 | { | ||
1127 | char *opt; | ||
1128 | |||
1129 | if (!options || !*options) | ||
1130 | return 0; | ||
1131 | |||
1132 | while ((opt = strsep(&options, ",")) != NULL) { | ||
1133 | |||
1134 | if (!*opt) | ||
1135 | continue; | ||
1136 | #ifdef CONFIG_MTRR | ||
1137 | else if (!strcmp(opt, "mtrr:")) | ||
1138 | mtrr = simple_strtoul(opt + 5, NULL, 0); | ||
1139 | #endif | ||
1140 | else if (!strcmp(opt, "fasttext:")) | ||
1141 | mtrr = simple_strtoul(opt + 9, NULL, 0); | ||
1142 | else | ||
1143 | mode = opt; | ||
1144 | } | ||
1145 | |||
1146 | return 0; | ||
1147 | } | ||
1148 | #endif | ||
1149 | |||
1150 | /* Cleanup */ | ||
1151 | |||
1152 | static void __exit s3fb_cleanup(void) | ||
1153 | { | ||
1154 | pr_debug("s3fb: cleaning up\n"); | ||
1155 | pci_unregister_driver(&s3fb_pci_driver); | ||
1156 | } | ||
1157 | |||
1158 | /* Driver Initialisation */ | ||
1159 | |||
1160 | static int __init s3fb_init(void) | ||
1161 | { | ||
1162 | |||
1163 | #ifndef MODULE | ||
1164 | char *option = NULL; | ||
1165 | |||
1166 | if (fb_get_options("s3fb", &option)) | ||
1167 | return -ENODEV; | ||
1168 | s3fb_setup(option); | ||
1169 | #endif | ||
1170 | |||
1171 | pr_debug("s3fb: initializing\n"); | ||
1172 | return pci_register_driver(&s3fb_pci_driver); | ||
1173 | } | ||
1174 | |||
1175 | /* ------------------------------------------------------------------------- */ | ||
1176 | |||
1177 | /* Modularization */ | ||
1178 | |||
1179 | module_init(s3fb_init); | ||
1180 | module_exit(s3fb_cleanup); | ||
diff --git a/drivers/video/savage/savagefb_driver.c b/drivers/video/savage/savagefb_driver.c index 82b3deaae02d..4afa30522fdb 100644 --- a/drivers/video/savage/savagefb_driver.c +++ b/drivers/video/savage/savagefb_driver.c | |||
@@ -833,7 +833,8 @@ static void savage_set_default_par(struct savagefb_par *par, | |||
833 | vga_out8(0x3d5, cr66, par); | 833 | vga_out8(0x3d5, cr66, par); |
834 | } | 834 | } |
835 | 835 | ||
836 | static void savage_update_var(struct fb_var_screeninfo *var, struct fb_videomode *modedb) | 836 | static void savage_update_var(struct fb_var_screeninfo *var, |
837 | const struct fb_videomode *modedb) | ||
837 | { | 838 | { |
838 | var->xres = var->xres_virtual = modedb->xres; | 839 | var->xres = var->xres_virtual = modedb->xres; |
839 | var->yres = modedb->yres; | 840 | var->yres = modedb->yres; |
@@ -902,7 +903,7 @@ static int savagefb_check_var(struct fb_var_screeninfo *var, | |||
902 | } | 903 | } |
903 | 904 | ||
904 | if (!mode_valid) { | 905 | if (!mode_valid) { |
905 | struct fb_videomode *mode; | 906 | const struct fb_videomode *mode; |
906 | 907 | ||
907 | mode = fb_find_best_mode(var, &info->modelist); | 908 | mode = fb_find_best_mode(var, &info->modelist); |
908 | if (mode) { | 909 | if (mode) { |
@@ -2206,11 +2207,10 @@ static int __devinit savagefb_probe(struct pci_dev* dev, | |||
2206 | info->monspecs.modedb, info->monspecs.modedb_len, | 2207 | info->monspecs.modedb, info->monspecs.modedb_len, |
2207 | NULL, 8); | 2208 | NULL, 8); |
2208 | } else if (info->monspecs.modedb != NULL) { | 2209 | } else if (info->monspecs.modedb != NULL) { |
2209 | struct fb_videomode *modedb; | 2210 | const struct fb_videomode *mode; |
2210 | 2211 | ||
2211 | modedb = fb_find_best_display(&info->monspecs, | 2212 | mode = fb_find_best_display(&info->monspecs, &info->modelist); |
2212 | &info->modelist); | 2213 | savage_update_var(&info->var, mode); |
2213 | savage_update_var(&info->var, modedb); | ||
2214 | } | 2214 | } |
2215 | 2215 | ||
2216 | /* maximize virtual vertical length */ | 2216 | /* maximize virtual vertical length */ |
diff --git a/drivers/video/sis/init.c b/drivers/video/sis/init.c index 2ab3868efde3..c311ad3c3687 100644 --- a/drivers/video/sis/init.c +++ b/drivers/video/sis/init.c | |||
@@ -317,23 +317,23 @@ InitTo310Pointer(struct SiS_Private *SiS_Pr) | |||
317 | } | 317 | } |
318 | #endif | 318 | #endif |
319 | 319 | ||
320 | BOOLEAN | 320 | bool |
321 | SiSInitPtr(struct SiS_Private *SiS_Pr) | 321 | SiSInitPtr(struct SiS_Private *SiS_Pr) |
322 | { | 322 | { |
323 | if(SiS_Pr->ChipType < SIS_315H) { | 323 | if(SiS_Pr->ChipType < SIS_315H) { |
324 | #ifdef SIS300 | 324 | #ifdef SIS300 |
325 | InitTo300Pointer(SiS_Pr); | 325 | InitTo300Pointer(SiS_Pr); |
326 | #else | 326 | #else |
327 | return FALSE; | 327 | return false; |
328 | #endif | 328 | #endif |
329 | } else { | 329 | } else { |
330 | #ifdef SIS315H | 330 | #ifdef SIS315H |
331 | InitTo310Pointer(SiS_Pr); | 331 | InitTo310Pointer(SiS_Pr); |
332 | #else | 332 | #else |
333 | return FALSE; | 333 | return false; |
334 | #endif | 334 | #endif |
335 | } | 335 | } |
336 | return TRUE; | 336 | return true; |
337 | } | 337 | } |
338 | 338 | ||
339 | /*********************************************/ | 339 | /*********************************************/ |
@@ -345,7 +345,7 @@ static | |||
345 | #endif | 345 | #endif |
346 | unsigned short | 346 | unsigned short |
347 | SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, | 347 | SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, |
348 | int Depth, BOOLEAN FSTN, int LCDwidth, int LCDheight) | 348 | int Depth, bool FSTN, int LCDwidth, int LCDheight) |
349 | { | 349 | { |
350 | unsigned short ModeIndex = 0; | 350 | unsigned short ModeIndex = 0; |
351 | 351 | ||
@@ -483,7 +483,7 @@ SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, | |||
483 | 483 | ||
484 | unsigned short | 484 | unsigned short |
485 | SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, | 485 | SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, |
486 | int Depth, BOOLEAN FSTN, unsigned short CustomT, int LCDwidth, int LCDheight, | 486 | int Depth, bool FSTN, unsigned short CustomT, int LCDwidth, int LCDheight, |
487 | unsigned int VBFlags2) | 487 | unsigned int VBFlags2) |
488 | { | 488 | { |
489 | unsigned short ModeIndex = 0; | 489 | unsigned short ModeIndex = 0; |
@@ -873,7 +873,7 @@ SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDispl | |||
873 | break; | 873 | break; |
874 | } | 874 | } |
875 | 875 | ||
876 | return SiS_GetModeID(VGAEngine, 0, HDisplay, VDisplay, Depth, FALSE, 0, 0); | 876 | return SiS_GetModeID(VGAEngine, 0, HDisplay, VDisplay, Depth, false, 0, 0); |
877 | } | 877 | } |
878 | 878 | ||
879 | 879 | ||
@@ -1020,12 +1020,12 @@ SiS_GetSysFlags(struct SiS_Private *SiS_Pr) | |||
1020 | 1020 | ||
1021 | /* 661 and newer: NEVER write non-zero to SR11[7:4] */ | 1021 | /* 661 and newer: NEVER write non-zero to SR11[7:4] */ |
1022 | /* (SR11 is used for DDC and in enable/disablebridge) */ | 1022 | /* (SR11 is used for DDC and in enable/disablebridge) */ |
1023 | SiS_Pr->SiS_SensibleSR11 = FALSE; | 1023 | SiS_Pr->SiS_SensibleSR11 = false; |
1024 | SiS_Pr->SiS_MyCR63 = 0x63; | 1024 | SiS_Pr->SiS_MyCR63 = 0x63; |
1025 | if(SiS_Pr->ChipType >= SIS_330) { | 1025 | if(SiS_Pr->ChipType >= SIS_330) { |
1026 | SiS_Pr->SiS_MyCR63 = 0x53; | 1026 | SiS_Pr->SiS_MyCR63 = 0x53; |
1027 | if(SiS_Pr->ChipType >= SIS_661) { | 1027 | if(SiS_Pr->ChipType >= SIS_661) { |
1028 | SiS_Pr->SiS_SensibleSR11 = TRUE; | 1028 | SiS_Pr->SiS_SensibleSR11 = true; |
1029 | } | 1029 | } |
1030 | } | 1030 | } |
1031 | 1031 | ||
@@ -1253,7 +1253,7 @@ SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo, | |||
1253 | /* HELPER: Determine ROM usage */ | 1253 | /* HELPER: Determine ROM usage */ |
1254 | /*********************************************/ | 1254 | /*********************************************/ |
1255 | 1255 | ||
1256 | BOOLEAN | 1256 | bool |
1257 | SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr) | 1257 | SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr) |
1258 | { | 1258 | { |
1259 | unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; | 1259 | unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; |
@@ -1261,16 +1261,16 @@ SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr) | |||
1261 | 1261 | ||
1262 | if(SiS_Pr->ChipType >= XGI_20) { | 1262 | if(SiS_Pr->ChipType >= XGI_20) { |
1263 | /* XGI ROMs don't qualify */ | 1263 | /* XGI ROMs don't qualify */ |
1264 | return FALSE; | 1264 | return false; |
1265 | } else if(SiS_Pr->ChipType >= SIS_761) { | 1265 | } else if(SiS_Pr->ChipType >= SIS_761) { |
1266 | /* I very much assume 761, 340 and newer will use new layout */ | 1266 | /* I very much assume 761, 340 and newer will use new layout */ |
1267 | return TRUE; | 1267 | return true; |
1268 | } else if(SiS_Pr->ChipType >= SIS_661) { | 1268 | } else if(SiS_Pr->ChipType >= SIS_661) { |
1269 | if((ROMAddr[0x1a] == 'N') && | 1269 | if((ROMAddr[0x1a] == 'N') && |
1270 | (ROMAddr[0x1b] == 'e') && | 1270 | (ROMAddr[0x1b] == 'e') && |
1271 | (ROMAddr[0x1c] == 'w') && | 1271 | (ROMAddr[0x1c] == 'w') && |
1272 | (ROMAddr[0x1d] == 'V')) { | 1272 | (ROMAddr[0x1d] == 'V')) { |
1273 | return TRUE; | 1273 | return true; |
1274 | } | 1274 | } |
1275 | romversoffs = ROMAddr[0x16] | (ROMAddr[0x17] << 8); | 1275 | romversoffs = ROMAddr[0x16] | (ROMAddr[0x17] << 8); |
1276 | if(romversoffs) { | 1276 | if(romversoffs) { |
@@ -1280,17 +1280,17 @@ SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr) | |||
1280 | } | 1280 | } |
1281 | } | 1281 | } |
1282 | if((romvmaj != 0) || (romvmin >= 92)) { | 1282 | if((romvmaj != 0) || (romvmin >= 92)) { |
1283 | return TRUE; | 1283 | return true; |
1284 | } | 1284 | } |
1285 | } else if(IS_SIS650740) { | 1285 | } else if(IS_SIS650740) { |
1286 | if((ROMAddr[0x1a] == 'N') && | 1286 | if((ROMAddr[0x1a] == 'N') && |
1287 | (ROMAddr[0x1b] == 'e') && | 1287 | (ROMAddr[0x1b] == 'e') && |
1288 | (ROMAddr[0x1c] == 'w') && | 1288 | (ROMAddr[0x1c] == 'w') && |
1289 | (ROMAddr[0x1d] == 'V')) { | 1289 | (ROMAddr[0x1d] == 'V')) { |
1290 | return TRUE; | 1290 | return true; |
1291 | } | 1291 | } |
1292 | } | 1292 | } |
1293 | return FALSE; | 1293 | return false; |
1294 | } | 1294 | } |
1295 | 1295 | ||
1296 | static void | 1296 | static void |
@@ -1299,8 +1299,8 @@ SiSDetermineROMUsage(struct SiS_Private *SiS_Pr) | |||
1299 | unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; | 1299 | unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; |
1300 | unsigned short romptr = 0; | 1300 | unsigned short romptr = 0; |
1301 | 1301 | ||
1302 | SiS_Pr->SiS_UseROM = FALSE; | 1302 | SiS_Pr->SiS_UseROM = false; |
1303 | SiS_Pr->SiS_ROMNew = FALSE; | 1303 | SiS_Pr->SiS_ROMNew = false; |
1304 | SiS_Pr->SiS_PWDOffset = 0; | 1304 | SiS_Pr->SiS_PWDOffset = 0; |
1305 | 1305 | ||
1306 | if(SiS_Pr->ChipType >= XGI_20) return; | 1306 | if(SiS_Pr->ChipType >= XGI_20) return; |
@@ -1312,15 +1312,15 @@ SiSDetermineROMUsage(struct SiS_Private *SiS_Pr) | |||
1312 | * of the BIOS image. | 1312 | * of the BIOS image. |
1313 | */ | 1313 | */ |
1314 | if((ROMAddr[3] == 0xe9) && ((ROMAddr[5] << 8) | ROMAddr[4]) > 0x21a) | 1314 | if((ROMAddr[3] == 0xe9) && ((ROMAddr[5] << 8) | ROMAddr[4]) > 0x21a) |
1315 | SiS_Pr->SiS_UseROM = TRUE; | 1315 | SiS_Pr->SiS_UseROM = true; |
1316 | } else if(SiS_Pr->ChipType < SIS_315H) { | 1316 | } else if(SiS_Pr->ChipType < SIS_315H) { |
1317 | /* Sony's VAIO BIOS 1.09 follows the standard, so perhaps | 1317 | /* Sony's VAIO BIOS 1.09 follows the standard, so perhaps |
1318 | * the others do as well | 1318 | * the others do as well |
1319 | */ | 1319 | */ |
1320 | SiS_Pr->SiS_UseROM = TRUE; | 1320 | SiS_Pr->SiS_UseROM = true; |
1321 | } else { | 1321 | } else { |
1322 | /* 315/330 series stick to the standard(s) */ | 1322 | /* 315/330 series stick to the standard(s) */ |
1323 | SiS_Pr->SiS_UseROM = TRUE; | 1323 | SiS_Pr->SiS_UseROM = true; |
1324 | if((SiS_Pr->SiS_ROMNew = SiSDetermineROMLayout661(SiS_Pr))) { | 1324 | if((SiS_Pr->SiS_ROMNew = SiSDetermineROMLayout661(SiS_Pr))) { |
1325 | SiS_Pr->SiS_EMIOffset = 14; | 1325 | SiS_Pr->SiS_EMIOffset = 14; |
1326 | SiS_Pr->SiS_PWDOffset = 17; | 1326 | SiS_Pr->SiS_PWDOffset = 17; |
@@ -1488,7 +1488,7 @@ SiS_GetVBType(struct SiS_Private *SiS_Pr) | |||
1488 | /*********************************************/ | 1488 | /*********************************************/ |
1489 | 1489 | ||
1490 | #ifdef SIS_LINUX_KERNEL | 1490 | #ifdef SIS_LINUX_KERNEL |
1491 | static BOOLEAN | 1491 | static bool |
1492 | SiS_CheckMemorySize(struct SiS_Private *SiS_Pr, unsigned short ModeNo, | 1492 | SiS_CheckMemorySize(struct SiS_Private *SiS_Pr, unsigned short ModeNo, |
1493 | unsigned short ModeIdIndex) | 1493 | unsigned short ModeIdIndex) |
1494 | { | 1494 | { |
@@ -1496,10 +1496,10 @@ SiS_CheckMemorySize(struct SiS_Private *SiS_Pr, unsigned short ModeNo, | |||
1496 | unsigned short modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex); | 1496 | unsigned short modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex); |
1497 | unsigned short memorysize = ((modeflag & MemoryInfoFlag) >> MemorySizeShift) + 1; | 1497 | unsigned short memorysize = ((modeflag & MemoryInfoFlag) >> MemorySizeShift) + 1; |
1498 | 1498 | ||
1499 | if(!AdapterMemSize) return TRUE; | 1499 | if(!AdapterMemSize) return true; |
1500 | 1500 | ||
1501 | if(AdapterMemSize < memorysize) return FALSE; | 1501 | if(AdapterMemSize < memorysize) return false; |
1502 | return TRUE; | 1502 | return true; |
1503 | } | 1503 | } |
1504 | #endif | 1504 | #endif |
1505 | 1505 | ||
@@ -1605,7 +1605,7 @@ SiS_ClearBuffer(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
1605 | /* HELPER: SearchModeID */ | 1605 | /* HELPER: SearchModeID */ |
1606 | /*********************************************/ | 1606 | /*********************************************/ |
1607 | 1607 | ||
1608 | BOOLEAN | 1608 | bool |
1609 | SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, | 1609 | SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, |
1610 | unsigned short *ModeIdIndex) | 1610 | unsigned short *ModeIdIndex) |
1611 | { | 1611 | { |
@@ -1617,7 +1617,7 @@ SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, | |||
1617 | 1617 | ||
1618 | for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) { | 1618 | for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) { |
1619 | if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == (*ModeNo)) break; | 1619 | if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == (*ModeNo)) break; |
1620 | if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == 0xFF) return FALSE; | 1620 | if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == 0xFF) return false; |
1621 | } | 1621 | } |
1622 | 1622 | ||
1623 | if((*ModeNo) == 0x07) { | 1623 | if((*ModeNo) == 0x07) { |
@@ -1635,11 +1635,11 @@ SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, | |||
1635 | 1635 | ||
1636 | for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) { | 1636 | for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) { |
1637 | if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == (*ModeNo)) break; | 1637 | if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == (*ModeNo)) break; |
1638 | if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == 0xFF) return FALSE; | 1638 | if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == 0xFF) return false; |
1639 | } | 1639 | } |
1640 | 1640 | ||
1641 | } | 1641 | } |
1642 | return TRUE; | 1642 | return true; |
1643 | } | 1643 | } |
1644 | 1644 | ||
1645 | /*********************************************/ | 1645 | /*********************************************/ |
@@ -1696,13 +1696,13 @@ SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide | |||
1696 | /* HELPER: LowModeTests */ | 1696 | /* HELPER: LowModeTests */ |
1697 | /*********************************************/ | 1697 | /*********************************************/ |
1698 | 1698 | ||
1699 | static BOOLEAN | 1699 | static bool |
1700 | SiS_DoLowModeTest(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | 1700 | SiS_DoLowModeTest(struct SiS_Private *SiS_Pr, unsigned short ModeNo) |
1701 | { | 1701 | { |
1702 | unsigned short temp, temp1, temp2; | 1702 | unsigned short temp, temp1, temp2; |
1703 | 1703 | ||
1704 | if((ModeNo != 0x03) && (ModeNo != 0x10) && (ModeNo != 0x12)) | 1704 | if((ModeNo != 0x03) && (ModeNo != 0x10) && (ModeNo != 0x12)) |
1705 | return TRUE; | 1705 | return true; |
1706 | temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x11); | 1706 | temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x11); |
1707 | SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x11,0x80); | 1707 | SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x11,0x80); |
1708 | temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00); | 1708 | temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00); |
@@ -1712,13 +1712,13 @@ SiS_DoLowModeTest(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
1712 | SiS_SetReg(SiS_Pr->SiS_P3d4,0x11,temp); | 1712 | SiS_SetReg(SiS_Pr->SiS_P3d4,0x11,temp); |
1713 | if((SiS_Pr->ChipType >= SIS_315H) || | 1713 | if((SiS_Pr->ChipType >= SIS_315H) || |
1714 | (SiS_Pr->ChipType == SIS_300)) { | 1714 | (SiS_Pr->ChipType == SIS_300)) { |
1715 | if(temp2 == 0x55) return FALSE; | 1715 | if(temp2 == 0x55) return false; |
1716 | else return TRUE; | 1716 | else return true; |
1717 | } else { | 1717 | } else { |
1718 | if(temp2 != 0x55) return TRUE; | 1718 | if(temp2 != 0x55) return true; |
1719 | else { | 1719 | else { |
1720 | SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01); | 1720 | SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01); |
1721 | return FALSE; | 1721 | return false; |
1722 | } | 1722 | } |
1723 | } | 1723 | } |
1724 | } | 1724 | } |
@@ -3237,14 +3237,14 @@ static void | |||
3237 | SiS_SetPitch(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn) | 3237 | SiS_SetPitch(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn) |
3238 | { | 3238 | { |
3239 | SISPtr pSiS = SISPTR(pScrn); | 3239 | SISPtr pSiS = SISPTR(pScrn); |
3240 | BOOLEAN isslavemode = FALSE; | 3240 | bool isslavemode = false; |
3241 | 3241 | ||
3242 | if( (pSiS->VBFlags2 & VB2_VIDEOBRIDGE) && | 3242 | if( (pSiS->VBFlags2 & VB2_VIDEOBRIDGE) && |
3243 | ( ((pSiS->VGAEngine == SIS_300_VGA) && | 3243 | ( ((pSiS->VGAEngine == SIS_300_VGA) && |
3244 | (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0xa0) == 0x20) || | 3244 | (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0xa0) == 0x20) || |
3245 | ((pSiS->VGAEngine == SIS_315_VGA) && | 3245 | ((pSiS->VGAEngine == SIS_315_VGA) && |
3246 | (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) { | 3246 | (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) { |
3247 | isslavemode = TRUE; | 3247 | isslavemode = true; |
3248 | } | 3248 | } |
3249 | 3249 | ||
3250 | /* We need to set pitch for CRT1 if bridge is in slave mode, too */ | 3250 | /* We need to set pitch for CRT1 if bridge is in slave mode, too */ |
@@ -3264,10 +3264,10 @@ SiS_SetPitch(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn) | |||
3264 | 3264 | ||
3265 | #ifdef SIS_XORG_XF86 | 3265 | #ifdef SIS_XORG_XF86 |
3266 | /* We need pScrn for setting the pitch correctly */ | 3266 | /* We need pScrn for setting the pitch correctly */ |
3267 | BOOLEAN | 3267 | bool |
3268 | SiSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, unsigned short ModeNo, BOOLEAN dosetpitch) | 3268 | SiSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, unsigned short ModeNo, bool dosetpitch) |
3269 | #else | 3269 | #else |
3270 | BOOLEAN | 3270 | bool |
3271 | SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | 3271 | SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo) |
3272 | #endif | 3272 | #endif |
3273 | { | 3273 | { |
@@ -3277,8 +3277,8 @@ SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
3277 | #ifdef SIS_LINUX_KERNEL | 3277 | #ifdef SIS_LINUX_KERNEL |
3278 | unsigned short KeepLockReg; | 3278 | unsigned short KeepLockReg; |
3279 | 3279 | ||
3280 | SiS_Pr->UseCustomMode = FALSE; | 3280 | SiS_Pr->UseCustomMode = false; |
3281 | SiS_Pr->CRT1UsesCustomMode = FALSE; | 3281 | SiS_Pr->CRT1UsesCustomMode = false; |
3282 | #endif | 3282 | #endif |
3283 | 3283 | ||
3284 | SiS_Pr->SiS_flag_clearbuffer = 0; | 3284 | SiS_Pr->SiS_flag_clearbuffer = 0; |
@@ -3317,7 +3317,7 @@ SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
3317 | SiS_UnLockCRT2(SiS_Pr); | 3317 | SiS_UnLockCRT2(SiS_Pr); |
3318 | 3318 | ||
3319 | if(!SiS_Pr->UseCustomMode) { | 3319 | if(!SiS_Pr->UseCustomMode) { |
3320 | if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE; | 3320 | if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false; |
3321 | } else { | 3321 | } else { |
3322 | ModeIdIndex = 0; | 3322 | ModeIdIndex = 0; |
3323 | } | 3323 | } |
@@ -3347,18 +3347,18 @@ SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
3347 | #ifdef SIS_LINUX_KERNEL | 3347 | #ifdef SIS_LINUX_KERNEL |
3348 | /* Check memory size (kernel framebuffer driver only) */ | 3348 | /* Check memory size (kernel framebuffer driver only) */ |
3349 | if(!SiS_CheckMemorySize(SiS_Pr, ModeNo, ModeIdIndex)) { | 3349 | if(!SiS_CheckMemorySize(SiS_Pr, ModeNo, ModeIdIndex)) { |
3350 | return FALSE; | 3350 | return false; |
3351 | } | 3351 | } |
3352 | #endif | 3352 | #endif |
3353 | 3353 | ||
3354 | SiS_OpenCRTC(SiS_Pr); | 3354 | SiS_OpenCRTC(SiS_Pr); |
3355 | 3355 | ||
3356 | if(SiS_Pr->UseCustomMode) { | 3356 | if(SiS_Pr->UseCustomMode) { |
3357 | SiS_Pr->CRT1UsesCustomMode = TRUE; | 3357 | SiS_Pr->CRT1UsesCustomMode = true; |
3358 | SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock; | 3358 | SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock; |
3359 | SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag; | 3359 | SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag; |
3360 | } else { | 3360 | } else { |
3361 | SiS_Pr->CRT1UsesCustomMode = FALSE; | 3361 | SiS_Pr->CRT1UsesCustomMode = false; |
3362 | } | 3362 | } |
3363 | 3363 | ||
3364 | /* Set mode on CRT1 */ | 3364 | /* Set mode on CRT1 */ |
@@ -3445,7 +3445,7 @@ SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
3445 | if(KeepLockReg != 0xA1) SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x00); | 3445 | if(KeepLockReg != 0xA1) SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x00); |
3446 | #endif | 3446 | #endif |
3447 | 3447 | ||
3448 | return TRUE; | 3448 | return true; |
3449 | } | 3449 | } |
3450 | 3450 | ||
3451 | /*********************************************/ | 3451 | /*********************************************/ |
@@ -3454,14 +3454,14 @@ SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
3454 | /*********************************************/ | 3454 | /*********************************************/ |
3455 | 3455 | ||
3456 | #ifdef SIS_XORG_XF86 | 3456 | #ifdef SIS_XORG_XF86 |
3457 | BOOLEAN | 3457 | bool |
3458 | SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | 3458 | SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, |
3459 | DisplayModePtr mode, BOOLEAN IsCustom) | 3459 | DisplayModePtr mode, bool IsCustom) |
3460 | { | 3460 | { |
3461 | SISPtr pSiS = SISPTR(pScrn); | 3461 | SISPtr pSiS = SISPTR(pScrn); |
3462 | unsigned short ModeNo = 0; | 3462 | unsigned short ModeNo = 0; |
3463 | 3463 | ||
3464 | SiS_Pr->UseCustomMode = FALSE; | 3464 | SiS_Pr->UseCustomMode = false; |
3465 | 3465 | ||
3466 | if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) { | 3466 | if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) { |
3467 | 3467 | ||
@@ -3475,13 +3475,13 @@ SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | |||
3475 | 3475 | ||
3476 | /* Don't need vbflags here; checks done earlier */ | 3476 | /* Don't need vbflags here; checks done earlier */ |
3477 | ModeNo = SiS_GetModeNumber(pScrn, mode, pSiS->VBFlags); | 3477 | ModeNo = SiS_GetModeNumber(pScrn, mode, pSiS->VBFlags); |
3478 | if(!ModeNo) return FALSE; | 3478 | if(!ModeNo) return false; |
3479 | 3479 | ||
3480 | xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting standard mode 0x%x\n", ModeNo); | 3480 | xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting standard mode 0x%x\n", ModeNo); |
3481 | 3481 | ||
3482 | } | 3482 | } |
3483 | 3483 | ||
3484 | return(SiSSetMode(SiS_Pr, pScrn, ModeNo, TRUE)); | 3484 | return(SiSSetMode(SiS_Pr, pScrn, ModeNo, true)); |
3485 | } | 3485 | } |
3486 | 3486 | ||
3487 | /*********************************************/ | 3487 | /*********************************************/ |
@@ -3489,9 +3489,9 @@ SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | |||
3489 | /* for Dual-Head modes */ | 3489 | /* for Dual-Head modes */ |
3490 | /*********************************************/ | 3490 | /*********************************************/ |
3491 | 3491 | ||
3492 | BOOLEAN | 3492 | bool |
3493 | SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | 3493 | SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, |
3494 | DisplayModePtr mode, BOOLEAN IsCustom) | 3494 | DisplayModePtr mode, bool IsCustom) |
3495 | { | 3495 | { |
3496 | SISIOADDRESS BaseAddr = SiS_Pr->IOAddress; | 3496 | SISIOADDRESS BaseAddr = SiS_Pr->IOAddress; |
3497 | SISPtr pSiS = SISPTR(pScrn); | 3497 | SISPtr pSiS = SISPTR(pScrn); |
@@ -3502,7 +3502,7 @@ SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | |||
3502 | unsigned short ModeNo = 0; | 3502 | unsigned short ModeNo = 0; |
3503 | unsigned char backupreg = 0; | 3503 | unsigned char backupreg = 0; |
3504 | 3504 | ||
3505 | SiS_Pr->UseCustomMode = FALSE; | 3505 | SiS_Pr->UseCustomMode = false; |
3506 | 3506 | ||
3507 | /* Remember: Custom modes for CRT2 are ONLY supported | 3507 | /* Remember: Custom modes for CRT2 are ONLY supported |
3508 | * -) on the 30x/B/C, and | 3508 | * -) on the 30x/B/C, and |
@@ -3516,7 +3516,7 @@ SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | |||
3516 | } else { | 3516 | } else { |
3517 | 3517 | ||
3518 | ModeNo = SiS_GetModeNumber(pScrn, mode, pSiS->VBFlags); | 3518 | ModeNo = SiS_GetModeNumber(pScrn, mode, pSiS->VBFlags); |
3519 | if(!ModeNo) return FALSE; | 3519 | if(!ModeNo) return false; |
3520 | 3520 | ||
3521 | } | 3521 | } |
3522 | 3522 | ||
@@ -3550,10 +3550,10 @@ SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | |||
3550 | if(pSiSEnt->CRT1ModeNo == -1) { | 3550 | if(pSiSEnt->CRT1ModeNo == -1) { |
3551 | xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, | 3551 | xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, |
3552 | "Setting CRT2 mode delayed until after setting CRT1 mode\n"); | 3552 | "Setting CRT2 mode delayed until after setting CRT1 mode\n"); |
3553 | return TRUE; | 3553 | return true; |
3554 | } | 3554 | } |
3555 | #endif | 3555 | #endif |
3556 | pSiSEnt->CRT2ModeSet = TRUE; | 3556 | pSiSEnt->CRT2ModeSet = true; |
3557 | } | 3557 | } |
3558 | #endif | 3558 | #endif |
3559 | 3559 | ||
@@ -3578,7 +3578,7 @@ SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | |||
3578 | SiS_UnLockCRT2(SiS_Pr); | 3578 | SiS_UnLockCRT2(SiS_Pr); |
3579 | 3579 | ||
3580 | if(!SiS_Pr->UseCustomMode) { | 3580 | if(!SiS_Pr->UseCustomMode) { |
3581 | if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE; | 3581 | if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false; |
3582 | } else { | 3582 | } else { |
3583 | ModeIdIndex = 0; | 3583 | ModeIdIndex = 0; |
3584 | } | 3584 | } |
@@ -3658,7 +3658,7 @@ SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | |||
3658 | 3658 | ||
3659 | SiS_Handle760(SiS_Pr); | 3659 | SiS_Handle760(SiS_Pr); |
3660 | 3660 | ||
3661 | return TRUE; | 3661 | return true; |
3662 | } | 3662 | } |
3663 | 3663 | ||
3664 | /*********************************************/ | 3664 | /*********************************************/ |
@@ -3666,9 +3666,9 @@ SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | |||
3666 | /* for Dual-Head modes */ | 3666 | /* for Dual-Head modes */ |
3667 | /*********************************************/ | 3667 | /*********************************************/ |
3668 | 3668 | ||
3669 | BOOLEAN | 3669 | bool |
3670 | SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | 3670 | SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, |
3671 | DisplayModePtr mode, BOOLEAN IsCustom) | 3671 | DisplayModePtr mode, bool IsCustom) |
3672 | { | 3672 | { |
3673 | SISIOADDRESS BaseAddr = SiS_Pr->IOAddress; | 3673 | SISIOADDRESS BaseAddr = SiS_Pr->IOAddress; |
3674 | SISPtr pSiS = SISPTR(pScrn); | 3674 | SISPtr pSiS = SISPTR(pScrn); |
@@ -3677,10 +3677,10 @@ SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | |||
3677 | #ifdef SISDUALHEAD | 3677 | #ifdef SISDUALHEAD |
3678 | SISEntPtr pSiSEnt = pSiS->entityPrivate; | 3678 | SISEntPtr pSiSEnt = pSiS->entityPrivate; |
3679 | unsigned char backupcr30, backupcr31, backupcr38, backupcr35, backupp40d=0; | 3679 | unsigned char backupcr30, backupcr31, backupcr38, backupcr35, backupp40d=0; |
3680 | BOOLEAN backupcustom; | 3680 | bool backupcustom; |
3681 | #endif | 3681 | #endif |
3682 | 3682 | ||
3683 | SiS_Pr->UseCustomMode = FALSE; | 3683 | SiS_Pr->UseCustomMode = false; |
3684 | 3684 | ||
3685 | if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) { | 3685 | if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) { |
3686 | 3686 | ||
@@ -3697,7 +3697,7 @@ SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | |||
3697 | } else { | 3697 | } else { |
3698 | 3698 | ||
3699 | ModeNo = SiS_GetModeNumber(pScrn, mode, 0); /* don't give VBFlags */ | 3699 | ModeNo = SiS_GetModeNumber(pScrn, mode, 0); /* don't give VBFlags */ |
3700 | if(!ModeNo) return FALSE; | 3700 | if(!ModeNo) return false; |
3701 | 3701 | ||
3702 | xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, | 3702 | xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, |
3703 | "Setting standard mode 0x%x on CRT1\n", ModeNo); | 3703 | "Setting standard mode 0x%x on CRT1\n", ModeNo); |
@@ -3721,7 +3721,7 @@ SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | |||
3721 | SiS_UnLockCRT2(SiS_Pr); | 3721 | SiS_UnLockCRT2(SiS_Pr); |
3722 | 3722 | ||
3723 | if(!SiS_Pr->UseCustomMode) { | 3723 | if(!SiS_Pr->UseCustomMode) { |
3724 | if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE; | 3724 | if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false; |
3725 | } else { | 3725 | } else { |
3726 | ModeIdIndex = 0; | 3726 | ModeIdIndex = 0; |
3727 | } | 3727 | } |
@@ -3771,11 +3771,11 @@ SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | |||
3771 | #endif | 3771 | #endif |
3772 | 3772 | ||
3773 | if(SiS_Pr->UseCustomMode) { | 3773 | if(SiS_Pr->UseCustomMode) { |
3774 | SiS_Pr->CRT1UsesCustomMode = TRUE; | 3774 | SiS_Pr->CRT1UsesCustomMode = true; |
3775 | SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock; | 3775 | SiS_Pr->CSRClock_CRT1 = SiS_Pr->CSRClock; |
3776 | SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag; | 3776 | SiS_Pr->CModeFlag_CRT1 = SiS_Pr->CModeFlag; |
3777 | } else { | 3777 | } else { |
3778 | SiS_Pr->CRT1UsesCustomMode = FALSE; | 3778 | SiS_Pr->CRT1UsesCustomMode = false; |
3779 | } | 3779 | } |
3780 | 3780 | ||
3781 | /* Reset CRT2 if changing mode on CRT1 */ | 3781 | /* Reset CRT2 if changing mode on CRT1 */ |
@@ -3838,7 +3838,7 @@ SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | |||
3838 | /* Backup/Set ModeNo in BIOS scratch area */ | 3838 | /* Backup/Set ModeNo in BIOS scratch area */ |
3839 | SiS_GetSetModeID(pScrn,ModeNo); | 3839 | SiS_GetSetModeID(pScrn,ModeNo); |
3840 | 3840 | ||
3841 | return TRUE; | 3841 | return true; |
3842 | } | 3842 | } |
3843 | #endif /* Linux_XF86 */ | 3843 | #endif /* Linux_XF86 */ |
3844 | 3844 | ||
@@ -4082,7 +4082,7 @@ SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, | |||
4082 | DisplayModePtr current | 4082 | DisplayModePtr current |
4083 | #endif | 4083 | #endif |
4084 | #ifdef SIS_LINUX_KERNEL | 4084 | #ifdef SIS_LINUX_KERNEL |
4085 | struct fb_var_screeninfo *var, BOOLEAN writeres | 4085 | struct fb_var_screeninfo *var, bool writeres |
4086 | #endif | 4086 | #endif |
4087 | ) | 4087 | ) |
4088 | { | 4088 | { |
diff --git a/drivers/video/sis/init.h b/drivers/video/sis/init.h index 59d12844b4dd..f40a680df86f 100644 --- a/drivers/video/sis/init.h +++ b/drivers/video/sis/init.h | |||
@@ -1521,13 +1521,13 @@ static const struct SiS_LVDSCRT1Data SiS_LVDSCRT1640x480_1_H[] = | |||
1521 | 0x00}} | 1521 | 0x00}} |
1522 | }; | 1522 | }; |
1523 | 1523 | ||
1524 | BOOLEAN SiSInitPtr(struct SiS_Private *SiS_Pr); | 1524 | bool SiSInitPtr(struct SiS_Private *SiS_Pr); |
1525 | #ifdef SIS_XORG_XF86 | 1525 | #ifdef SIS_XORG_XF86 |
1526 | unsigned short SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, | 1526 | unsigned short SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, |
1527 | int Depth, BOOLEAN FSTN, int LCDwith, int LCDheight); | 1527 | int Depth, bool FSTN, int LCDwith, int LCDheight); |
1528 | #endif | 1528 | #endif |
1529 | unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, | 1529 | unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, |
1530 | int VDisplay, int Depth, BOOLEAN FSTN, | 1530 | int VDisplay, int Depth, bool FSTN, |
1531 | unsigned short CustomT, int LCDwith, int LCDheight, | 1531 | unsigned short CustomT, int LCDwith, int LCDheight, |
1532 | unsigned int VBFlags2); | 1532 | unsigned int VBFlags2); |
1533 | unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay, | 1533 | unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay, |
@@ -1558,12 +1558,12 @@ void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable); | |||
1558 | void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable); | 1558 | void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable); |
1559 | unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo, | 1559 | unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo, |
1560 | unsigned short ModeIdIndex); | 1560 | unsigned short ModeIdIndex); |
1561 | BOOLEAN SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr); | 1561 | bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr); |
1562 | #ifndef SIS_LINUX_KERNEL | 1562 | #ifndef SIS_LINUX_KERNEL |
1563 | void SiS_GetVBType(struct SiS_Private *SiS_Pr); | 1563 | void SiS_GetVBType(struct SiS_Private *SiS_Pr); |
1564 | #endif | 1564 | #endif |
1565 | 1565 | ||
1566 | BOOLEAN SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, | 1566 | bool SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, |
1567 | unsigned short *ModeIdIndex); | 1567 | unsigned short *ModeIdIndex); |
1568 | unsigned short SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, | 1568 | unsigned short SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, |
1569 | unsigned short ModeIdIndex); | 1569 | unsigned short ModeIdIndex); |
@@ -1581,17 +1581,17 @@ unsigned short SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned shor | |||
1581 | #endif | 1581 | #endif |
1582 | void SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); | 1582 | void SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); |
1583 | #ifdef SIS_XORG_XF86 | 1583 | #ifdef SIS_XORG_XF86 |
1584 | BOOLEAN SiSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, unsigned short ModeNo, | 1584 | bool SiSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, unsigned short ModeNo, |
1585 | BOOLEAN dosetpitch); | 1585 | bool dosetpitch); |
1586 | BOOLEAN SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | 1586 | bool SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, |
1587 | DisplayModePtr mode, BOOLEAN IsCustom); | 1587 | DisplayModePtr mode, bool IsCustom); |
1588 | BOOLEAN SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | 1588 | bool SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, |
1589 | DisplayModePtr mode, BOOLEAN IsCustom); | 1589 | DisplayModePtr mode, bool IsCustom); |
1590 | BOOLEAN SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, | 1590 | bool SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, |
1591 | DisplayModePtr mode, BOOLEAN IsCustom); | 1591 | DisplayModePtr mode, bool IsCustom); |
1592 | #endif | 1592 | #endif |
1593 | #ifdef SIS_LINUX_KERNEL | 1593 | #ifdef SIS_LINUX_KERNEL |
1594 | BOOLEAN SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo); | 1594 | bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo); |
1595 | #endif | 1595 | #endif |
1596 | void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth); | 1596 | void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth); |
1597 | void SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo, | 1597 | void SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo, |
@@ -1602,7 +1602,7 @@ void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdat | |||
1602 | #endif | 1602 | #endif |
1603 | #ifdef SIS_LINUX_KERNEL | 1603 | #ifdef SIS_LINUX_KERNEL |
1604 | void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres, | 1604 | void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres, |
1605 | int yres, struct fb_var_screeninfo *var, BOOLEAN writeres); | 1605 | int yres, struct fb_var_screeninfo *var, bool writeres); |
1606 | #endif | 1606 | #endif |
1607 | 1607 | ||
1608 | /* From init301.c: */ | 1608 | /* From init301.c: */ |
@@ -1615,7 +1615,7 @@ extern void SiS_SetTVMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo, | |||
1615 | unsigned short ModeIdIndex); | 1615 | unsigned short ModeIdIndex); |
1616 | extern void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr); | 1616 | extern void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr); |
1617 | extern void SiS_DisableBridge(struct SiS_Private *); | 1617 | extern void SiS_DisableBridge(struct SiS_Private *); |
1618 | extern BOOLEAN SiS_SetCRT2Group(struct SiS_Private *, unsigned short); | 1618 | extern bool SiS_SetCRT2Group(struct SiS_Private *, unsigned short); |
1619 | extern unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, | 1619 | extern unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, |
1620 | unsigned short ModeIdIndex); | 1620 | unsigned short ModeIdIndex); |
1621 | extern void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr); | 1621 | extern void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr); |
@@ -1624,8 +1624,8 @@ extern unsigned short SiS_GetResInfo(struct SiS_Private *SiS_Pr, unsigned short | |||
1624 | extern unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax); | 1624 | extern unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax); |
1625 | extern unsigned short SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, | 1625 | extern unsigned short SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, |
1626 | unsigned short ModeIdIndex, unsigned short RRTI); | 1626 | unsigned short ModeIdIndex, unsigned short RRTI); |
1627 | extern BOOLEAN SiS_IsVAMode(struct SiS_Private *); | 1627 | extern bool SiS_IsVAMode(struct SiS_Private *); |
1628 | extern BOOLEAN SiS_IsDualEdge(struct SiS_Private *); | 1628 | extern bool SiS_IsDualEdge(struct SiS_Private *); |
1629 | 1629 | ||
1630 | #ifdef SIS_XORG_XF86 | 1630 | #ifdef SIS_XORG_XF86 |
1631 | /* From other modules: */ | 1631 | /* From other modules: */ |
diff --git a/drivers/video/sis/init301.c b/drivers/video/sis/init301.c index 47e1896cffeb..da33d801c22e 100644 --- a/drivers/video/sis/init301.c +++ b/drivers/video/sis/init301.c | |||
@@ -200,7 +200,7 @@ GetLCDStructPtr661_2(struct SiS_Private *SiS_Pr) | |||
200 | /* Adjust Rate for CRT2 */ | 200 | /* Adjust Rate for CRT2 */ |
201 | /*********************************************/ | 201 | /*********************************************/ |
202 | 202 | ||
203 | static BOOLEAN | 203 | static bool |
204 | SiS_AdjustCRT2Rate(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex, | 204 | SiS_AdjustCRT2Rate(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex, |
205 | unsigned short RRTI, unsigned short *i) | 205 | unsigned short RRTI, unsigned short *i) |
206 | { | 206 | { |
@@ -269,7 +269,7 @@ SiS_AdjustCRT2Rate(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s | |||
269 | /* Look backwards in table for matching CRT2 mode */ | 269 | /* Look backwards in table for matching CRT2 mode */ |
270 | for(; SiS_Pr->SiS_RefIndex[RRTI + (*i)].ModeID == modeid; (*i)--) { | 270 | for(; SiS_Pr->SiS_RefIndex[RRTI + (*i)].ModeID == modeid; (*i)--) { |
271 | infoflag = SiS_Pr->SiS_RefIndex[RRTI + (*i)].Ext_InfoFlag; | 271 | infoflag = SiS_Pr->SiS_RefIndex[RRTI + (*i)].Ext_InfoFlag; |
272 | if(infoflag & checkmask) return TRUE; | 272 | if(infoflag & checkmask) return true; |
273 | if((*i) == 0) break; | 273 | if((*i) == 0) break; |
274 | } | 274 | } |
275 | 275 | ||
@@ -279,9 +279,9 @@ SiS_AdjustCRT2Rate(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s | |||
279 | for((*i) = 0; ; (*i)++) { | 279 | for((*i) = 0; ; (*i)++) { |
280 | if(SiS_Pr->SiS_RefIndex[RRTI + (*i)].ModeID != modeid) break; | 280 | if(SiS_Pr->SiS_RefIndex[RRTI + (*i)].ModeID != modeid) break; |
281 | infoflag = SiS_Pr->SiS_RefIndex[RRTI + (*i)].Ext_InfoFlag; | 281 | infoflag = SiS_Pr->SiS_RefIndex[RRTI + (*i)].Ext_InfoFlag; |
282 | if(infoflag & checkmask) return TRUE; | 282 | if(infoflag & checkmask) return true; |
283 | } | 283 | } |
284 | return FALSE; | 284 | return false; |
285 | } | 285 | } |
286 | 286 | ||
287 | /*********************************************/ | 287 | /*********************************************/ |
@@ -405,7 +405,7 @@ SiS_SaveCRT2Info(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
405 | /*********************************************/ | 405 | /*********************************************/ |
406 | 406 | ||
407 | #ifdef SIS300 | 407 | #ifdef SIS300 |
408 | static BOOLEAN | 408 | static bool |
409 | SiS_CR36BIOSWord23b(struct SiS_Private *SiS_Pr) | 409 | SiS_CR36BIOSWord23b(struct SiS_Private *SiS_Pr) |
410 | { | 410 | { |
411 | unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; | 411 | unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; |
@@ -415,13 +415,13 @@ SiS_CR36BIOSWord23b(struct SiS_Private *SiS_Pr) | |||
415 | if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) { | 415 | if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) { |
416 | temp = 1 << ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4) & 0x0f); | 416 | temp = 1 << ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4) & 0x0f); |
417 | temp1 = SISGETROMW(0x23b); | 417 | temp1 = SISGETROMW(0x23b); |
418 | if(temp1 & temp) return TRUE; | 418 | if(temp1 & temp) return true; |
419 | } | 419 | } |
420 | } | 420 | } |
421 | return FALSE; | 421 | return false; |
422 | } | 422 | } |
423 | 423 | ||
424 | static BOOLEAN | 424 | static bool |
425 | SiS_CR36BIOSWord23d(struct SiS_Private *SiS_Pr) | 425 | SiS_CR36BIOSWord23d(struct SiS_Private *SiS_Pr) |
426 | { | 426 | { |
427 | unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; | 427 | unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; |
@@ -431,10 +431,10 @@ SiS_CR36BIOSWord23d(struct SiS_Private *SiS_Pr) | |||
431 | if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) { | 431 | if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) { |
432 | temp = 1 << ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4) & 0x0f); | 432 | temp = 1 << ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4) & 0x0f); |
433 | temp1 = SISGETROMW(0x23d); | 433 | temp1 = SISGETROMW(0x23d); |
434 | if(temp1 & temp) return TRUE; | 434 | if(temp1 & temp) return true; |
435 | } | 435 | } |
436 | } | 436 | } |
437 | return FALSE; | 437 | return false; |
438 | } | 438 | } |
439 | #endif | 439 | #endif |
440 | 440 | ||
@@ -687,38 +687,38 @@ SiS_VBLongWait(struct SiS_Private *SiS_Pr) | |||
687 | /*********************************************/ | 687 | /*********************************************/ |
688 | 688 | ||
689 | #ifdef SIS300 | 689 | #ifdef SIS300 |
690 | static BOOLEAN | 690 | static bool |
691 | SiS_Is301B(struct SiS_Private *SiS_Pr) | 691 | SiS_Is301B(struct SiS_Private *SiS_Pr) |
692 | { | 692 | { |
693 | if(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01) >= 0xb0) return TRUE; | 693 | if(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01) >= 0xb0) return true; |
694 | return FALSE; | 694 | return false; |
695 | } | 695 | } |
696 | #endif | 696 | #endif |
697 | 697 | ||
698 | static BOOLEAN | 698 | static bool |
699 | SiS_CRT2IsLCD(struct SiS_Private *SiS_Pr) | 699 | SiS_CRT2IsLCD(struct SiS_Private *SiS_Pr) |
700 | { | 700 | { |
701 | if(SiS_Pr->ChipType == SIS_730) { | 701 | if(SiS_Pr->ChipType == SIS_730) { |
702 | if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x20) return TRUE; | 702 | if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x20) return true; |
703 | } | 703 | } |
704 | if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & 0x20) return TRUE; | 704 | if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & 0x20) return true; |
705 | return FALSE; | 705 | return false; |
706 | } | 706 | } |
707 | 707 | ||
708 | BOOLEAN | 708 | bool |
709 | SiS_IsDualEdge(struct SiS_Private *SiS_Pr) | 709 | SiS_IsDualEdge(struct SiS_Private *SiS_Pr) |
710 | { | 710 | { |
711 | #ifdef SIS315H | 711 | #ifdef SIS315H |
712 | if(SiS_Pr->ChipType >= SIS_315H) { | 712 | if(SiS_Pr->ChipType >= SIS_315H) { |
713 | if((SiS_Pr->ChipType != SIS_650) || (SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0)) { | 713 | if((SiS_Pr->ChipType != SIS_650) || (SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0)) { |
714 | if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableDualEdge) return TRUE; | 714 | if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableDualEdge) return true; |
715 | } | 715 | } |
716 | } | 716 | } |
717 | #endif | 717 | #endif |
718 | return FALSE; | 718 | return false; |
719 | } | 719 | } |
720 | 720 | ||
721 | BOOLEAN | 721 | bool |
722 | SiS_IsVAMode(struct SiS_Private *SiS_Pr) | 722 | SiS_IsVAMode(struct SiS_Private *SiS_Pr) |
723 | { | 723 | { |
724 | #ifdef SIS315H | 724 | #ifdef SIS315H |
@@ -726,70 +726,70 @@ SiS_IsVAMode(struct SiS_Private *SiS_Pr) | |||
726 | 726 | ||
727 | if(SiS_Pr->ChipType >= SIS_315H) { | 727 | if(SiS_Pr->ChipType >= SIS_315H) { |
728 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); | 728 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); |
729 | if((flag & EnableDualEdge) && (flag & SetToLCDA)) return TRUE; | 729 | if((flag & EnableDualEdge) && (flag & SetToLCDA)) return true; |
730 | } | 730 | } |
731 | #endif | 731 | #endif |
732 | return FALSE; | 732 | return false; |
733 | } | 733 | } |
734 | 734 | ||
735 | #ifdef SIS315H | 735 | #ifdef SIS315H |
736 | static BOOLEAN | 736 | static bool |
737 | SiS_IsVAorLCD(struct SiS_Private *SiS_Pr) | 737 | SiS_IsVAorLCD(struct SiS_Private *SiS_Pr) |
738 | { | 738 | { |
739 | if(SiS_IsVAMode(SiS_Pr)) return TRUE; | 739 | if(SiS_IsVAMode(SiS_Pr)) return true; |
740 | if(SiS_CRT2IsLCD(SiS_Pr)) return TRUE; | 740 | if(SiS_CRT2IsLCD(SiS_Pr)) return true; |
741 | return FALSE; | 741 | return false; |
742 | } | 742 | } |
743 | #endif | 743 | #endif |
744 | 744 | ||
745 | static BOOLEAN | 745 | static bool |
746 | SiS_IsDualLink(struct SiS_Private *SiS_Pr) | 746 | SiS_IsDualLink(struct SiS_Private *SiS_Pr) |
747 | { | 747 | { |
748 | #ifdef SIS315H | 748 | #ifdef SIS315H |
749 | if(SiS_Pr->ChipType >= SIS_315H) { | 749 | if(SiS_Pr->ChipType >= SIS_315H) { |
750 | if((SiS_CRT2IsLCD(SiS_Pr)) || | 750 | if((SiS_CRT2IsLCD(SiS_Pr)) || |
751 | (SiS_IsVAMode(SiS_Pr))) { | 751 | (SiS_IsVAMode(SiS_Pr))) { |
752 | if(SiS_Pr->SiS_LCDInfo & LCDDualLink) return TRUE; | 752 | if(SiS_Pr->SiS_LCDInfo & LCDDualLink) return true; |
753 | } | 753 | } |
754 | } | 754 | } |
755 | #endif | 755 | #endif |
756 | return FALSE; | 756 | return false; |
757 | } | 757 | } |
758 | 758 | ||
759 | #ifdef SIS315H | 759 | #ifdef SIS315H |
760 | static BOOLEAN | 760 | static bool |
761 | SiS_TVEnabled(struct SiS_Private *SiS_Pr) | 761 | SiS_TVEnabled(struct SiS_Private *SiS_Pr) |
762 | { | 762 | { |
763 | if((SiS_GetReg(SiS_Pr->SiS_Part2Port,0x00) & 0x0f) != 0x0c) return TRUE; | 763 | if((SiS_GetReg(SiS_Pr->SiS_Part2Port,0x00) & 0x0f) != 0x0c) return true; |
764 | if(SiS_Pr->SiS_VBType & VB_SISYPBPR) { | 764 | if(SiS_Pr->SiS_VBType & VB_SISYPBPR) { |
765 | if(SiS_GetReg(SiS_Pr->SiS_Part2Port,0x4d) & 0x10) return TRUE; | 765 | if(SiS_GetReg(SiS_Pr->SiS_Part2Port,0x4d) & 0x10) return true; |
766 | } | 766 | } |
767 | return FALSE; | 767 | return false; |
768 | } | 768 | } |
769 | #endif | 769 | #endif |
770 | 770 | ||
771 | #ifdef SIS315H | 771 | #ifdef SIS315H |
772 | static BOOLEAN | 772 | static bool |
773 | SiS_LCDAEnabled(struct SiS_Private *SiS_Pr) | 773 | SiS_LCDAEnabled(struct SiS_Private *SiS_Pr) |
774 | { | 774 | { |
775 | if(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x13) & 0x04) return TRUE; | 775 | if(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x13) & 0x04) return true; |
776 | return FALSE; | 776 | return false; |
777 | } | 777 | } |
778 | #endif | 778 | #endif |
779 | 779 | ||
780 | #ifdef SIS315H | 780 | #ifdef SIS315H |
781 | static BOOLEAN | 781 | static bool |
782 | SiS_WeHaveBacklightCtrl(struct SiS_Private *SiS_Pr) | 782 | SiS_WeHaveBacklightCtrl(struct SiS_Private *SiS_Pr) |
783 | { | 783 | { |
784 | if((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->ChipType < SIS_661)) { | 784 | if((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->ChipType < SIS_661)) { |
785 | if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x79) & 0x10) return TRUE; | 785 | if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x79) & 0x10) return true; |
786 | } | 786 | } |
787 | return FALSE; | 787 | return false; |
788 | } | 788 | } |
789 | #endif | 789 | #endif |
790 | 790 | ||
791 | #ifdef SIS315H | 791 | #ifdef SIS315H |
792 | static BOOLEAN | 792 | static bool |
793 | SiS_IsNotM650orLater(struct SiS_Private *SiS_Pr) | 793 | SiS_IsNotM650orLater(struct SiS_Private *SiS_Pr) |
794 | { | 794 | { |
795 | unsigned short flag; | 795 | unsigned short flag; |
@@ -798,90 +798,90 @@ SiS_IsNotM650orLater(struct SiS_Private *SiS_Pr) | |||
798 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0; | 798 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0; |
799 | /* Check for revision != A0 only */ | 799 | /* Check for revision != A0 only */ |
800 | if((flag == 0xe0) || (flag == 0xc0) || | 800 | if((flag == 0xe0) || (flag == 0xc0) || |
801 | (flag == 0xb0) || (flag == 0x90)) return FALSE; | 801 | (flag == 0xb0) || (flag == 0x90)) return false; |
802 | } else if(SiS_Pr->ChipType >= SIS_661) return FALSE; | 802 | } else if(SiS_Pr->ChipType >= SIS_661) return false; |
803 | return TRUE; | 803 | return true; |
804 | } | 804 | } |
805 | #endif | 805 | #endif |
806 | 806 | ||
807 | #ifdef SIS315H | 807 | #ifdef SIS315H |
808 | static BOOLEAN | 808 | static bool |
809 | SiS_IsYPbPr(struct SiS_Private *SiS_Pr) | 809 | SiS_IsYPbPr(struct SiS_Private *SiS_Pr) |
810 | { | 810 | { |
811 | if(SiS_Pr->ChipType >= SIS_315H) { | 811 | if(SiS_Pr->ChipType >= SIS_315H) { |
812 | /* YPrPb = 0x08 */ | 812 | /* YPrPb = 0x08 */ |
813 | if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableCHYPbPr) return TRUE; | 813 | if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableCHYPbPr) return true; |
814 | } | 814 | } |
815 | return FALSE; | 815 | return false; |
816 | } | 816 | } |
817 | #endif | 817 | #endif |
818 | 818 | ||
819 | #ifdef SIS315H | 819 | #ifdef SIS315H |
820 | static BOOLEAN | 820 | static bool |
821 | SiS_IsChScart(struct SiS_Private *SiS_Pr) | 821 | SiS_IsChScart(struct SiS_Private *SiS_Pr) |
822 | { | 822 | { |
823 | if(SiS_Pr->ChipType >= SIS_315H) { | 823 | if(SiS_Pr->ChipType >= SIS_315H) { |
824 | /* Scart = 0x04 */ | 824 | /* Scart = 0x04 */ |
825 | if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableCHScart) return TRUE; | 825 | if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableCHScart) return true; |
826 | } | 826 | } |
827 | return FALSE; | 827 | return false; |
828 | } | 828 | } |
829 | #endif | 829 | #endif |
830 | 830 | ||
831 | #ifdef SIS315H | 831 | #ifdef SIS315H |
832 | static BOOLEAN | 832 | static bool |
833 | SiS_IsTVOrYPbPrOrScart(struct SiS_Private *SiS_Pr) | 833 | SiS_IsTVOrYPbPrOrScart(struct SiS_Private *SiS_Pr) |
834 | { | 834 | { |
835 | unsigned short flag; | 835 | unsigned short flag; |
836 | 836 | ||
837 | if(SiS_Pr->ChipType >= SIS_315H) { | 837 | if(SiS_Pr->ChipType >= SIS_315H) { |
838 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); | 838 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); |
839 | if(flag & SetCRT2ToTV) return TRUE; | 839 | if(flag & SetCRT2ToTV) return true; |
840 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); | 840 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); |
841 | if(flag & EnableCHYPbPr) return TRUE; /* = YPrPb = 0x08 */ | 841 | if(flag & EnableCHYPbPr) return true; /* = YPrPb = 0x08 */ |
842 | if(flag & EnableCHScart) return TRUE; /* = Scart = 0x04 - TW */ | 842 | if(flag & EnableCHScart) return true; /* = Scart = 0x04 - TW */ |
843 | } else { | 843 | } else { |
844 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); | 844 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); |
845 | if(flag & SetCRT2ToTV) return TRUE; | 845 | if(flag & SetCRT2ToTV) return true; |
846 | } | 846 | } |
847 | return FALSE; | 847 | return false; |
848 | } | 848 | } |
849 | #endif | 849 | #endif |
850 | 850 | ||
851 | #ifdef SIS315H | 851 | #ifdef SIS315H |
852 | static BOOLEAN | 852 | static bool |
853 | SiS_IsLCDOrLCDA(struct SiS_Private *SiS_Pr) | 853 | SiS_IsLCDOrLCDA(struct SiS_Private *SiS_Pr) |
854 | { | 854 | { |
855 | unsigned short flag; | 855 | unsigned short flag; |
856 | 856 | ||
857 | if(SiS_Pr->ChipType >= SIS_315H) { | 857 | if(SiS_Pr->ChipType >= SIS_315H) { |
858 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); | 858 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); |
859 | if(flag & SetCRT2ToLCD) return TRUE; | 859 | if(flag & SetCRT2ToLCD) return true; |
860 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); | 860 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); |
861 | if(flag & SetToLCDA) return TRUE; | 861 | if(flag & SetToLCDA) return true; |
862 | } else { | 862 | } else { |
863 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); | 863 | flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); |
864 | if(flag & SetCRT2ToLCD) return TRUE; | 864 | if(flag & SetCRT2ToLCD) return true; |
865 | } | 865 | } |
866 | return FALSE; | 866 | return false; |
867 | } | 867 | } |
868 | #endif | 868 | #endif |
869 | 869 | ||
870 | static BOOLEAN | 870 | static bool |
871 | SiS_HaveBridge(struct SiS_Private *SiS_Pr) | 871 | SiS_HaveBridge(struct SiS_Private *SiS_Pr) |
872 | { | 872 | { |
873 | unsigned short flag; | 873 | unsigned short flag; |
874 | 874 | ||
875 | if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { | 875 | if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { |
876 | return TRUE; | 876 | return true; |
877 | } else if(SiS_Pr->SiS_VBType & VB_SISVB) { | 877 | } else if(SiS_Pr->SiS_VBType & VB_SISVB) { |
878 | flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00); | 878 | flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00); |
879 | if((flag == 1) || (flag == 2)) return TRUE; | 879 | if((flag == 1) || (flag == 2)) return true; |
880 | } | 880 | } |
881 | return FALSE; | 881 | return false; |
882 | } | 882 | } |
883 | 883 | ||
884 | static BOOLEAN | 884 | static bool |
885 | SiS_BridgeIsEnabled(struct SiS_Private *SiS_Pr) | 885 | SiS_BridgeIsEnabled(struct SiS_Private *SiS_Pr) |
886 | { | 886 | { |
887 | unsigned short flag; | 887 | unsigned short flag; |
@@ -890,23 +890,23 @@ SiS_BridgeIsEnabled(struct SiS_Private *SiS_Pr) | |||
890 | flag = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00); | 890 | flag = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00); |
891 | if(SiS_Pr->ChipType < SIS_315H) { | 891 | if(SiS_Pr->ChipType < SIS_315H) { |
892 | flag &= 0xa0; | 892 | flag &= 0xa0; |
893 | if((flag == 0x80) || (flag == 0x20)) return TRUE; | 893 | if((flag == 0x80) || (flag == 0x20)) return true; |
894 | } else { | 894 | } else { |
895 | flag &= 0x50; | 895 | flag &= 0x50; |
896 | if((flag == 0x40) || (flag == 0x10)) return TRUE; | 896 | if((flag == 0x40) || (flag == 0x10)) return true; |
897 | } | 897 | } |
898 | } | 898 | } |
899 | return FALSE; | 899 | return false; |
900 | } | 900 | } |
901 | 901 | ||
902 | static BOOLEAN | 902 | static bool |
903 | SiS_BridgeInSlavemode(struct SiS_Private *SiS_Pr) | 903 | SiS_BridgeInSlavemode(struct SiS_Private *SiS_Pr) |
904 | { | 904 | { |
905 | unsigned short flag1; | 905 | unsigned short flag1; |
906 | 906 | ||
907 | flag1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31); | 907 | flag1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31); |
908 | if(flag1 & (SetInSlaveMode >> 8)) return TRUE; | 908 | if(flag1 & (SetInSlaveMode >> 8)) return true; |
909 | return FALSE; | 909 | return false; |
910 | } | 910 | } |
911 | 911 | ||
912 | /*********************************************/ | 912 | /*********************************************/ |
@@ -1461,11 +1461,11 @@ SiS_GetLCDInfoBIOS(struct SiS_Private *SiS_Pr) | |||
1461 | 1461 | ||
1462 | if((ROMAddr = GetLCDStructPtr661(SiS_Pr))) { | 1462 | if((ROMAddr = GetLCDStructPtr661(SiS_Pr))) { |
1463 | if((temp = SISGETROMW(6)) != SiS_Pr->PanelHT) { | 1463 | if((temp = SISGETROMW(6)) != SiS_Pr->PanelHT) { |
1464 | SiS_Pr->SiS_NeedRomModeData = TRUE; | 1464 | SiS_Pr->SiS_NeedRomModeData = true; |
1465 | SiS_Pr->PanelHT = temp; | 1465 | SiS_Pr->PanelHT = temp; |
1466 | } | 1466 | } |
1467 | if((temp = SISGETROMW(8)) != SiS_Pr->PanelVT) { | 1467 | if((temp = SISGETROMW(8)) != SiS_Pr->PanelVT) { |
1468 | SiS_Pr->SiS_NeedRomModeData = TRUE; | 1468 | SiS_Pr->SiS_NeedRomModeData = true; |
1469 | SiS_Pr->PanelVT = temp; | 1469 | SiS_Pr->PanelVT = temp; |
1470 | } | 1470 | } |
1471 | SiS_Pr->PanelHRS = SISGETROMW(10); | 1471 | SiS_Pr->PanelHRS = SISGETROMW(10); |
@@ -1516,7 +1516,7 @@ void | |||
1516 | SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex) | 1516 | SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex) |
1517 | { | 1517 | { |
1518 | unsigned short temp,modeflag,resinfo=0,modexres=0,modeyres=0; | 1518 | unsigned short temp,modeflag,resinfo=0,modexres=0,modeyres=0; |
1519 | BOOLEAN panelcanscale = FALSE; | 1519 | bool panelcanscale = false; |
1520 | #ifdef SIS300 | 1520 | #ifdef SIS300 |
1521 | unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; | 1521 | unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; |
1522 | static const unsigned char SiS300SeriesLCDRes[] = | 1522 | static const unsigned char SiS300SeriesLCDRes[] = |
@@ -1534,10 +1534,10 @@ SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned sh | |||
1534 | SiS_Pr->PanelHRE = 999; /* HSync end */ | 1534 | SiS_Pr->PanelHRE = 999; /* HSync end */ |
1535 | SiS_Pr->PanelVRS = 999; /* VSync start */ | 1535 | SiS_Pr->PanelVRS = 999; /* VSync start */ |
1536 | SiS_Pr->PanelVRE = 999; /* VSync end */ | 1536 | SiS_Pr->PanelVRE = 999; /* VSync end */ |
1537 | SiS_Pr->SiS_NeedRomModeData = FALSE; | 1537 | SiS_Pr->SiS_NeedRomModeData = false; |
1538 | 1538 | ||
1539 | /* Alternative 1600x1200@60 timing for 1600x1200 LCDA */ | 1539 | /* Alternative 1600x1200@60 timing for 1600x1200 LCDA */ |
1540 | SiS_Pr->Alternate1600x1200 = FALSE; | 1540 | SiS_Pr->Alternate1600x1200 = false; |
1541 | 1541 | ||
1542 | if(!(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA))) return; | 1542 | if(!(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA))) return; |
1543 | 1543 | ||
@@ -1633,7 +1633,7 @@ SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned sh | |||
1633 | SiS_Pr->SiS_LCDInfo |= DontExpandLCD; | 1633 | SiS_Pr->SiS_LCDInfo |= DontExpandLCD; |
1634 | } | 1634 | } |
1635 | 1635 | ||
1636 | panelcanscale = (SiS_Pr->SiS_LCDInfo & DontExpandLCD) ? TRUE : FALSE; | 1636 | panelcanscale = (bool)(SiS_Pr->SiS_LCDInfo & DontExpandLCD); |
1637 | 1637 | ||
1638 | if(!SiS_Pr->UsePanelScaler) SiS_Pr->SiS_LCDInfo &= ~DontExpandLCD; | 1638 | if(!SiS_Pr->UsePanelScaler) SiS_Pr->SiS_LCDInfo &= ~DontExpandLCD; |
1639 | else if(SiS_Pr->UsePanelScaler == 1) SiS_Pr->SiS_LCDInfo |= DontExpandLCD; | 1639 | else if(SiS_Pr->UsePanelScaler == 1) SiS_Pr->SiS_LCDInfo |= DontExpandLCD; |
@@ -1833,7 +1833,7 @@ SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned sh | |||
1833 | SiS_Pr->PanelHRS = 48; SiS_Pr->PanelHRE = 32; | 1833 | SiS_Pr->PanelHRS = 48; SiS_Pr->PanelHRE = 32; |
1834 | SiS_Pr->PanelVRS = 2; SiS_Pr->PanelVRE = 4; | 1834 | SiS_Pr->PanelVRS = 2; SiS_Pr->PanelVRE = 4; |
1835 | SiS_Pr->PanelVCLKIdx315 = VCLK130_315; | 1835 | SiS_Pr->PanelVCLKIdx315 = VCLK130_315; |
1836 | SiS_Pr->Alternate1600x1200 = TRUE; | 1836 | SiS_Pr->Alternate1600x1200 = true; |
1837 | } | 1837 | } |
1838 | } else if(SiS_Pr->SiS_IF_DEF_LVDS) { | 1838 | } else if(SiS_Pr->SiS_IF_DEF_LVDS) { |
1839 | SiS_Pr->PanelHT = 2048; SiS_Pr->PanelVT = 1320; | 1839 | SiS_Pr->PanelHT = 2048; SiS_Pr->PanelVT = 1320; |
@@ -3448,7 +3448,7 @@ SiS_GetCRT2Data301(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s | |||
3448 | 3448 | ||
3449 | } else { | 3449 | } else { |
3450 | 3450 | ||
3451 | BOOLEAN gotit = FALSE; | 3451 | bool gotit = false; |
3452 | 3452 | ||
3453 | if((SiS_Pr->SiS_LCDInfo & DontExpandLCD) && (!(SiS_Pr->SiS_LCDInfo & LCDPass11))) { | 3453 | if((SiS_Pr->SiS_LCDInfo & DontExpandLCD) && (!(SiS_Pr->SiS_LCDInfo & LCDPass11))) { |
3454 | 3454 | ||
@@ -3456,7 +3456,7 @@ SiS_GetCRT2Data301(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s | |||
3456 | SiS_Pr->SiS_VGAVT = SiS_Pr->PanelVT; | 3456 | SiS_Pr->SiS_VGAVT = SiS_Pr->PanelVT; |
3457 | SiS_Pr->SiS_HT = SiS_Pr->PanelHT; | 3457 | SiS_Pr->SiS_HT = SiS_Pr->PanelHT; |
3458 | SiS_Pr->SiS_VT = SiS_Pr->PanelVT; | 3458 | SiS_Pr->SiS_VT = SiS_Pr->PanelVT; |
3459 | gotit = TRUE; | 3459 | gotit = true; |
3460 | 3460 | ||
3461 | } else if( (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) && (romptr) && (ROMAddr) ) { | 3461 | } else if( (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) && (romptr) && (ROMAddr) ) { |
3462 | 3462 | ||
@@ -3474,7 +3474,7 @@ SiS_GetCRT2Data301(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s | |||
3474 | if(ROMAddr[romptr+9] & 0x80) SiS_Pr->SiS_RVBHRS2 -= tempax; | 3474 | if(ROMAddr[romptr+9] & 0x80) SiS_Pr->SiS_RVBHRS2 -= tempax; |
3475 | else SiS_Pr->SiS_RVBHRS2 += tempax; | 3475 | else SiS_Pr->SiS_RVBHRS2 += tempax; |
3476 | } | 3476 | } |
3477 | if(SiS_Pr->SiS_VGAHT) gotit = TRUE; | 3477 | if(SiS_Pr->SiS_VGAHT) gotit = true; |
3478 | else { | 3478 | else { |
3479 | SiS_Pr->SiS_LCDInfo |= DontExpandLCD; | 3479 | SiS_Pr->SiS_LCDInfo |= DontExpandLCD; |
3480 | SiS_Pr->SiS_LCDInfo &= ~LCDPass11; | 3480 | SiS_Pr->SiS_LCDInfo &= ~LCDPass11; |
@@ -3485,7 +3485,7 @@ SiS_GetCRT2Data301(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s | |||
3485 | SiS_Pr->SiS_HT = SiS_Pr->PanelHT; | 3485 | SiS_Pr->SiS_HT = SiS_Pr->PanelHT; |
3486 | SiS_Pr->SiS_VT = SiS_Pr->PanelVT; | 3486 | SiS_Pr->SiS_VT = SiS_Pr->PanelVT; |
3487 | SiS_Pr->SiS_RVBHRS2 = 0; | 3487 | SiS_Pr->SiS_RVBHRS2 = 0; |
3488 | gotit = TRUE; | 3488 | gotit = true; |
3489 | } | 3489 | } |
3490 | #endif | 3490 | #endif |
3491 | 3491 | ||
@@ -3960,8 +3960,8 @@ SiS_DisableBridge(struct SiS_Private *SiS_Pr) | |||
3960 | #ifdef SIS315H /* 315 series */ | 3960 | #ifdef SIS315H /* 315 series */ |
3961 | 3961 | ||
3962 | int didpwd = 0; | 3962 | int didpwd = 0; |
3963 | BOOLEAN custom1 = ((SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) || | 3963 | bool custom1 = (SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) || |
3964 | (SiS_Pr->SiS_CustomT == CUT_CLEVO1400)) ? TRUE : FALSE; | 3964 | (SiS_Pr->SiS_CustomT == CUT_CLEVO1400); |
3965 | 3965 | ||
3966 | modenum = SiS_GetReg(SiS_Pr->SiS_P3d4,0x34) & 0x7f; | 3966 | modenum = SiS_GetReg(SiS_Pr->SiS_P3d4,0x34) & 0x7f; |
3967 | 3967 | ||
@@ -4313,7 +4313,7 @@ SiS_EnableBridge(struct SiS_Private *SiS_Pr) | |||
4313 | unsigned short temp=0, tempah; | 4313 | unsigned short temp=0, tempah; |
4314 | #ifdef SIS315H | 4314 | #ifdef SIS315H |
4315 | unsigned short temp1, pushax=0; | 4315 | unsigned short temp1, pushax=0; |
4316 | BOOLEAN delaylong = FALSE; | 4316 | bool delaylong = false; |
4317 | #endif | 4317 | #endif |
4318 | 4318 | ||
4319 | if(SiS_Pr->SiS_VBType & VB_SISVB) { | 4319 | if(SiS_Pr->SiS_VBType & VB_SISVB) { |
@@ -4448,7 +4448,7 @@ SiS_EnableBridge(struct SiS_Private *SiS_Pr) | |||
4448 | 4448 | ||
4449 | if(!(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40)) { | 4449 | if(!(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40)) { |
4450 | SiS_PanelDelayLoop(SiS_Pr, 3, 10); | 4450 | SiS_PanelDelayLoop(SiS_Pr, 3, 10); |
4451 | delaylong = TRUE; | 4451 | delaylong = true; |
4452 | } | 4452 | } |
4453 | 4453 | ||
4454 | } | 4454 | } |
@@ -4530,7 +4530,7 @@ SiS_EnableBridge(struct SiS_Private *SiS_Pr) | |||
4530 | SiS_Pr->EMI_33 = ROMAddr[romptr + SiS_Pr->SiS_EMIOffset + 2]; | 4530 | SiS_Pr->EMI_33 = ROMAddr[romptr + SiS_Pr->SiS_EMIOffset + 2]; |
4531 | if(ROMAddr[romptr + 1] & 0x10) SiS_Pr->EMI_30 = 0x40; | 4531 | if(ROMAddr[romptr + 1] & 0x10) SiS_Pr->EMI_30 = 0x40; |
4532 | /* emidelay = SISGETROMW((romptr + 0x22)); */ | 4532 | /* emidelay = SISGETROMW((romptr + 0x22)); */ |
4533 | SiS_Pr->HaveEMI = SiS_Pr->HaveEMILCD = SiS_Pr->OverruleEMI = TRUE; | 4533 | SiS_Pr->HaveEMI = SiS_Pr->HaveEMILCD = SiS_Pr->OverruleEMI = true; |
4534 | } | 4534 | } |
4535 | } | 4535 | } |
4536 | 4536 | ||
@@ -4644,7 +4644,7 @@ SiS_EnableBridge(struct SiS_Private *SiS_Pr) | |||
4644 | SiS_PanelDelayLoop(SiS_Pr, 3, 5); | 4644 | SiS_PanelDelayLoop(SiS_Pr, 3, 5); |
4645 | if(delaylong) { | 4645 | if(delaylong) { |
4646 | SiS_PanelDelayLoop(SiS_Pr, 3, 5); | 4646 | SiS_PanelDelayLoop(SiS_Pr, 3, 5); |
4647 | delaylong = FALSE; | 4647 | delaylong = false; |
4648 | } | 4648 | } |
4649 | SiS_WaitVBRetrace(SiS_Pr); | 4649 | SiS_WaitVBRetrace(SiS_Pr); |
4650 | SiS_WaitVBRetrace(SiS_Pr); | 4650 | SiS_WaitVBRetrace(SiS_Pr); |
@@ -5454,7 +5454,7 @@ SiS_SetGroup1_LVDS(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s | |||
5454 | unsigned short modeflag, resinfo = 0; | 5454 | unsigned short modeflag, resinfo = 0; |
5455 | unsigned short push2, tempax, tempbx, tempcx, temp; | 5455 | unsigned short push2, tempax, tempbx, tempcx, temp; |
5456 | unsigned int tempeax = 0, tempebx, tempecx, tempvcfact = 0; | 5456 | unsigned int tempeax = 0, tempebx, tempecx, tempvcfact = 0; |
5457 | BOOLEAN islvds = FALSE, issis = FALSE, chkdclkfirst = FALSE; | 5457 | bool islvds = false, issis = false, chkdclkfirst = false; |
5458 | #ifdef SIS300 | 5458 | #ifdef SIS300 |
5459 | unsigned short crt2crtc = 0; | 5459 | unsigned short crt2crtc = 0; |
5460 | #endif | 5460 | #endif |
@@ -5480,17 +5480,17 @@ SiS_SetGroup1_LVDS(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s | |||
5480 | 5480 | ||
5481 | /* is lvds if really LVDS, or 301B-DH with external LVDS transmitter */ | 5481 | /* is lvds if really LVDS, or 301B-DH with external LVDS transmitter */ |
5482 | if((SiS_Pr->SiS_IF_DEF_LVDS == 1) || (SiS_Pr->SiS_VBType & VB_NoLCD)) { | 5482 | if((SiS_Pr->SiS_IF_DEF_LVDS == 1) || (SiS_Pr->SiS_VBType & VB_NoLCD)) { |
5483 | islvds = TRUE; | 5483 | islvds = true; |
5484 | } | 5484 | } |
5485 | 5485 | ||
5486 | /* is really sis if sis bridge, but not 301B-DH */ | 5486 | /* is really sis if sis bridge, but not 301B-DH */ |
5487 | if((SiS_Pr->SiS_VBType & VB_SISVB) && (!(SiS_Pr->SiS_VBType & VB_NoLCD))) { | 5487 | if((SiS_Pr->SiS_VBType & VB_SISVB) && (!(SiS_Pr->SiS_VBType & VB_NoLCD))) { |
5488 | issis = TRUE; | 5488 | issis = true; |
5489 | } | 5489 | } |
5490 | 5490 | ||
5491 | if((SiS_Pr->ChipType >= SIS_315H) && (islvds) && (!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA))) { | 5491 | if((SiS_Pr->ChipType >= SIS_315H) && (islvds) && (!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA))) { |
5492 | if((!SiS_Pr->SiS_IF_DEF_FSTN) && (!SiS_Pr->SiS_IF_DEF_DSTN)) { | 5492 | if((!SiS_Pr->SiS_IF_DEF_FSTN) && (!SiS_Pr->SiS_IF_DEF_DSTN)) { |
5493 | chkdclkfirst = TRUE; | 5493 | chkdclkfirst = true; |
5494 | } | 5494 | } |
5495 | } | 5495 | } |
5496 | 5496 | ||
@@ -6447,13 +6447,13 @@ SiS_SetGroup2_C_ELV(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned | |||
6447 | SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x4e,0xeb,temp); | 6447 | SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x4e,0xeb,temp); |
6448 | } | 6448 | } |
6449 | 6449 | ||
6450 | static BOOLEAN | 6450 | static bool |
6451 | SiS_GetCRT2Part2Ptr(struct SiS_Private *SiS_Pr,unsigned short ModeNo,unsigned short ModeIdIndex, | 6451 | SiS_GetCRT2Part2Ptr(struct SiS_Private *SiS_Pr,unsigned short ModeNo,unsigned short ModeIdIndex, |
6452 | unsigned short RefreshRateTableIndex,unsigned short *CRT2Index, | 6452 | unsigned short RefreshRateTableIndex,unsigned short *CRT2Index, |
6453 | unsigned short *ResIndex) | 6453 | unsigned short *ResIndex) |
6454 | { | 6454 | { |
6455 | 6455 | ||
6456 | if(SiS_Pr->ChipType < SIS_315H) return FALSE; | 6456 | if(SiS_Pr->ChipType < SIS_315H) return false; |
6457 | 6457 | ||
6458 | if(ModeNo <= 0x13) | 6458 | if(ModeNo <= 0x13) |
6459 | (*ResIndex) = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; | 6459 | (*ResIndex) = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; |
@@ -6688,7 +6688,7 @@ SiS_SetGroup2(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short | |||
6688 | unsigned short i, j, tempax, tempbx, tempcx, tempch, tempcl, temp; | 6688 | unsigned short i, j, tempax, tempbx, tempcx, tempch, tempcl, temp; |
6689 | unsigned short push2, modeflag, crt2crtc, bridgeoffset; | 6689 | unsigned short push2, modeflag, crt2crtc, bridgeoffset; |
6690 | unsigned int longtemp, PhaseIndex; | 6690 | unsigned int longtemp, PhaseIndex; |
6691 | BOOLEAN newtvphase; | 6691 | bool newtvphase; |
6692 | const unsigned char *TimingPoint; | 6692 | const unsigned char *TimingPoint; |
6693 | #ifdef SIS315H | 6693 | #ifdef SIS315H |
6694 | unsigned short resindex, CRT2Index; | 6694 | unsigned short resindex, CRT2Index; |
@@ -6721,11 +6721,11 @@ SiS_SetGroup2(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short | |||
6721 | PhaseIndex = 0x01; /* SiS_PALPhase */ | 6721 | PhaseIndex = 0x01; /* SiS_PALPhase */ |
6722 | TimingPoint = SiS_Pr->SiS_PALTiming; | 6722 | TimingPoint = SiS_Pr->SiS_PALTiming; |
6723 | 6723 | ||
6724 | newtvphase = FALSE; | 6724 | newtvphase = false; |
6725 | if( (SiS_Pr->SiS_VBType & VB_SIS30xBLV) && | 6725 | if( (SiS_Pr->SiS_VBType & VB_SIS30xBLV) && |
6726 | ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) || | 6726 | ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) || |
6727 | (SiS_Pr->SiS_TVMode & TVSetTVSimuMode) ) ) { | 6727 | (SiS_Pr->SiS_TVMode & TVSetTVSimuMode) ) ) { |
6728 | newtvphase = TRUE; | 6728 | newtvphase = true; |
6729 | } | 6729 | } |
6730 | 6730 | ||
6731 | if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) { | 6731 | if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) { |
@@ -7754,13 +7754,13 @@ SiS_SetGroup5(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short | |||
7754 | /* MODIFY CRT1 GROUP FOR SLAVE MODE */ | 7754 | /* MODIFY CRT1 GROUP FOR SLAVE MODE */ |
7755 | /*********************************************/ | 7755 | /*********************************************/ |
7756 | 7756 | ||
7757 | static BOOLEAN | 7757 | static bool |
7758 | SiS_GetLVDSCRT1Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex, | 7758 | SiS_GetLVDSCRT1Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex, |
7759 | unsigned short RefreshRateTableIndex, unsigned short *ResIndex, | 7759 | unsigned short RefreshRateTableIndex, unsigned short *ResIndex, |
7760 | unsigned short *DisplayType) | 7760 | unsigned short *DisplayType) |
7761 | { | 7761 | { |
7762 | unsigned short modeflag = 0; | 7762 | unsigned short modeflag = 0; |
7763 | BOOLEAN checkhd = TRUE; | 7763 | bool checkhd = true; |
7764 | 7764 | ||
7765 | /* Pass 1:1 not supported here */ | 7765 | /* Pass 1:1 not supported here */ |
7766 | 7766 | ||
@@ -7792,7 +7792,7 @@ SiS_GetLVDSCRT1Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s | |||
7792 | (*DisplayType = 0); | 7792 | (*DisplayType = 0); |
7793 | switch(SiS_Pr->SiS_LCDResInfo) { | 7793 | switch(SiS_Pr->SiS_LCDResInfo) { |
7794 | case Panel_320x240_1: (*DisplayType) = 50; | 7794 | case Panel_320x240_1: (*DisplayType) = 50; |
7795 | checkhd = FALSE; | 7795 | checkhd = false; |
7796 | break; | 7796 | break; |
7797 | case Panel_320x240_2: (*DisplayType) = 14; | 7797 | case Panel_320x240_2: (*DisplayType) = 14; |
7798 | break; | 7798 | break; |
@@ -7802,7 +7802,7 @@ SiS_GetLVDSCRT1Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s | |||
7802 | break; | 7802 | break; |
7803 | case Panel_1024x600: (*DisplayType) = 26; | 7803 | case Panel_1024x600: (*DisplayType) = 26; |
7804 | break; | 7804 | break; |
7805 | default: return TRUE; | 7805 | default: return true; |
7806 | } | 7806 | } |
7807 | 7807 | ||
7808 | if(checkhd) { | 7808 | if(checkhd) { |
@@ -7815,7 +7815,7 @@ SiS_GetLVDSCRT1Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned s | |||
7815 | 7815 | ||
7816 | } | 7816 | } |
7817 | 7817 | ||
7818 | return TRUE; | 7818 | return true; |
7819 | } | 7819 | } |
7820 | 7820 | ||
7821 | static void | 7821 | static void |
@@ -8654,7 +8654,7 @@ SiS_ChrontelDoSomething1(struct SiS_Private *SiS_Pr) | |||
8654 | /* MAIN: SET CRT2 REGISTER GROUP */ | 8654 | /* MAIN: SET CRT2 REGISTER GROUP */ |
8655 | /*********************************************/ | 8655 | /*********************************************/ |
8656 | 8656 | ||
8657 | BOOLEAN | 8657 | bool |
8658 | SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | 8658 | SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo) |
8659 | { | 8659 | { |
8660 | #ifdef SIS300 | 8660 | #ifdef SIS300 |
@@ -8690,7 +8690,7 @@ SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
8690 | if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) { | 8690 | if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) { |
8691 | SiS_LockCRT2(SiS_Pr); | 8691 | SiS_LockCRT2(SiS_Pr); |
8692 | SiS_DisplayOn(SiS_Pr); | 8692 | SiS_DisplayOn(SiS_Pr); |
8693 | return TRUE; | 8693 | return true; |
8694 | } | 8694 | } |
8695 | 8695 | ||
8696 | SiS_GetCRT2Data(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); | 8696 | SiS_GetCRT2Data(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex); |
@@ -8828,7 +8828,7 @@ SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
8828 | SiS_LockCRT2(SiS_Pr); | 8828 | SiS_LockCRT2(SiS_Pr); |
8829 | } | 8829 | } |
8830 | 8830 | ||
8831 | return TRUE; | 8831 | return true; |
8832 | } | 8832 | } |
8833 | 8833 | ||
8834 | 8834 | ||
@@ -8908,7 +8908,7 @@ SiS_SetTrumpBlockLoop(struct SiS_Private *SiS_Pr, unsigned char *dataptr) | |||
8908 | return NULL; | 8908 | return NULL; |
8909 | } | 8909 | } |
8910 | 8910 | ||
8911 | static BOOLEAN | 8911 | static bool |
8912 | SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr) | 8912 | SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr) |
8913 | { | 8913 | { |
8914 | SiS_Pr->SiS_DDC_DeviceAddr = 0xF0; /* DAB (Device Address Byte) */ | 8914 | SiS_Pr->SiS_DDC_DeviceAddr = 0xF0; /* DAB (Device Address Byte) */ |
@@ -8921,14 +8921,14 @@ SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr) | |||
8921 | 8921 | ||
8922 | while(*dataptr) { | 8922 | while(*dataptr) { |
8923 | dataptr = SiS_SetTrumpBlockLoop(SiS_Pr, dataptr); | 8923 | dataptr = SiS_SetTrumpBlockLoop(SiS_Pr, dataptr); |
8924 | if(!dataptr) return FALSE; | 8924 | if(!dataptr) return false; |
8925 | } | 8925 | } |
8926 | #ifdef SIS_XORG_XF86 | 8926 | #ifdef SIS_XORG_XF86 |
8927 | #ifdef TWDEBUG | 8927 | #ifdef TWDEBUG |
8928 | xf86DrvMsg(0, X_INFO, "Trumpion block success\n"); | 8928 | xf86DrvMsg(0, X_INFO, "Trumpion block success\n"); |
8929 | #endif | 8929 | #endif |
8930 | #endif | 8930 | #endif |
8931 | return TRUE; | 8931 | return true; |
8932 | } | 8932 | } |
8933 | #endif | 8933 | #endif |
8934 | 8934 | ||
@@ -8939,7 +8939,7 @@ SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr) | |||
8939 | * 0x0a, possibly for working around the DDC problems | 8939 | * 0x0a, possibly for working around the DDC problems |
8940 | */ | 8940 | */ |
8941 | 8941 | ||
8942 | static BOOLEAN | 8942 | static bool |
8943 | SiS_SetChReg(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val, unsigned short myor) | 8943 | SiS_SetChReg(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val, unsigned short myor) |
8944 | { | 8944 | { |
8945 | unsigned short temp, i; | 8945 | unsigned short temp, i; |
@@ -8958,9 +8958,9 @@ SiS_SetChReg(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val, | |||
8958 | if(temp) continue; /* (ERROR: no ack) */ | 8958 | if(temp) continue; /* (ERROR: no ack) */ |
8959 | if(SiS_SetStop(SiS_Pr)) continue; /* Set stop condition */ | 8959 | if(SiS_SetStop(SiS_Pr)) continue; /* Set stop condition */ |
8960 | SiS_Pr->SiS_ChrontelInit = 1; | 8960 | SiS_Pr->SiS_ChrontelInit = 1; |
8961 | return TRUE; | 8961 | return true; |
8962 | } | 8962 | } |
8963 | return FALSE; | 8963 | return false; |
8964 | } | 8964 | } |
8965 | 8965 | ||
8966 | /* Write to Chrontel 700x */ | 8966 | /* Write to Chrontel 700x */ |
@@ -9119,7 +9119,7 @@ static | |||
9119 | #endif | 9119 | #endif |
9120 | unsigned short | 9120 | unsigned short |
9121 | SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine, | 9121 | SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine, |
9122 | unsigned short adaptnum, unsigned short DDCdatatype, BOOLEAN checkcr32, | 9122 | unsigned short adaptnum, unsigned short DDCdatatype, bool checkcr32, |
9123 | unsigned int VBFlags2) | 9123 | unsigned int VBFlags2) |
9124 | { | 9124 | { |
9125 | unsigned char ddcdtype[] = { 0xa0, 0xa0, 0xa0, 0xa2, 0xa6 }; | 9125 | unsigned char ddcdtype[] = { 0xa0, 0xa0, 0xa0, 0xa2, 0xa6 }; |
@@ -9287,7 +9287,7 @@ SiS_DoProbeDDC(struct SiS_Private *SiS_Pr) | |||
9287 | { | 9287 | { |
9288 | unsigned char mask, value; | 9288 | unsigned char mask, value; |
9289 | unsigned short temp, ret=0; | 9289 | unsigned short temp, ret=0; |
9290 | BOOLEAN failed = FALSE; | 9290 | bool failed = false; |
9291 | 9291 | ||
9292 | SiS_SetSwitchDDC2(SiS_Pr); | 9292 | SiS_SetSwitchDDC2(SiS_Pr); |
9293 | if(SiS_PrepareDDC(SiS_Pr)) { | 9293 | if(SiS_PrepareDDC(SiS_Pr)) { |
@@ -9308,7 +9308,7 @@ SiS_DoProbeDDC(struct SiS_Private *SiS_Pr) | |||
9308 | mask = 0xff; | 9308 | mask = 0xff; |
9309 | value = 0xff; | 9309 | value = 0xff; |
9310 | } else { | 9310 | } else { |
9311 | failed = TRUE; | 9311 | failed = true; |
9312 | ret = 0xFFFF; | 9312 | ret = 0xFFFF; |
9313 | #ifdef SIS_XORG_XF86 | 9313 | #ifdef SIS_XORG_XF86 |
9314 | #ifdef TWDEBUG | 9314 | #ifdef TWDEBUG |
@@ -9317,7 +9317,7 @@ SiS_DoProbeDDC(struct SiS_Private *SiS_Pr) | |||
9317 | #endif | 9317 | #endif |
9318 | } | 9318 | } |
9319 | } | 9319 | } |
9320 | if(failed == FALSE) { | 9320 | if(!failed) { |
9321 | temp = (unsigned char)SiS_ReadDDC2Data(SiS_Pr); | 9321 | temp = (unsigned char)SiS_ReadDDC2Data(SiS_Pr); |
9322 | SiS_SendACK(SiS_Pr, 1); | 9322 | SiS_SendACK(SiS_Pr, 1); |
9323 | temp &= mask; | 9323 | temp &= mask; |
@@ -9431,7 +9431,7 @@ SiS_HandleDDC(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine, | |||
9431 | if((!(VBFlags2 & VB2_VIDEOBRIDGE)) && (adaptnum > 0)) | 9431 | if((!(VBFlags2 & VB2_VIDEOBRIDGE)) && (adaptnum > 0)) |
9432 | return 0xFFFF; | 9432 | return 0xFFFF; |
9433 | 9433 | ||
9434 | if(SiS_InitDDCRegs(SiS_Pr, VBFlags, VGAEngine, adaptnum, DDCdatatype, FALSE, VBFlags2) == 0xFFFF) | 9434 | if(SiS_InitDDCRegs(SiS_Pr, VBFlags, VGAEngine, adaptnum, DDCdatatype, false, VBFlags2) == 0xFFFF) |
9435 | return 0xFFFF; | 9435 | return 0xFFFF; |
9436 | 9436 | ||
9437 | sr1f = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1f); | 9437 | sr1f = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1f); |
@@ -9829,7 +9829,7 @@ SetDelayComp(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
9829 | { | 9829 | { |
9830 | unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; | 9830 | unsigned char *ROMAddr = SiS_Pr->VirtualRomBase; |
9831 | unsigned short delay=0,index,myindex,temp,romptr=0; | 9831 | unsigned short delay=0,index,myindex,temp,romptr=0; |
9832 | BOOLEAN dochiptest = TRUE; | 9832 | bool dochiptest = true; |
9833 | 9833 | ||
9834 | if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { | 9834 | if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { |
9835 | SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x20,0xbf); | 9835 | SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x20,0xbf); |
@@ -9864,7 +9864,7 @@ SetDelayComp(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
9864 | 9864 | ||
9865 | } else if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD|SetCRT2ToLCDA)) { /* ---------- LCD/LCDA */ | 9865 | } else if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD|SetCRT2ToLCDA)) { /* ---------- LCD/LCDA */ |
9866 | 9866 | ||
9867 | BOOLEAN gotitfrompci = FALSE; | 9867 | bool gotitfrompci = false; |
9868 | 9868 | ||
9869 | /* Could we detect a PDC for LCD or did we get a user-defined? If yes, use it */ | 9869 | /* Could we detect a PDC for LCD or did we get a user-defined? If yes, use it */ |
9870 | 9870 | ||
@@ -9916,22 +9916,22 @@ SetDelayComp(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
9916 | case CUT_COMPAQ1280: | 9916 | case CUT_COMPAQ1280: |
9917 | case CUT_COMPAQ12802: | 9917 | case CUT_COMPAQ12802: |
9918 | if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) { | 9918 | if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) { |
9919 | gotitfrompci = TRUE; | 9919 | gotitfrompci = true; |
9920 | dochiptest = FALSE; | 9920 | dochiptest = false; |
9921 | delay = 0x03; | 9921 | delay = 0x03; |
9922 | } | 9922 | } |
9923 | break; | 9923 | break; |
9924 | case CUT_CLEVO1400: | 9924 | case CUT_CLEVO1400: |
9925 | case CUT_CLEVO14002: | 9925 | case CUT_CLEVO14002: |
9926 | gotitfrompci = TRUE; | 9926 | gotitfrompci = true; |
9927 | dochiptest = FALSE; | 9927 | dochiptest = false; |
9928 | delay = 0x02; | 9928 | delay = 0x02; |
9929 | break; | 9929 | break; |
9930 | case CUT_CLEVO1024: | 9930 | case CUT_CLEVO1024: |
9931 | case CUT_CLEVO10242: | 9931 | case CUT_CLEVO10242: |
9932 | if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) { | 9932 | if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) { |
9933 | gotitfrompci = TRUE; | 9933 | gotitfrompci = true; |
9934 | dochiptest = FALSE; | 9934 | dochiptest = false; |
9935 | delay = 0x33; | 9935 | delay = 0x33; |
9936 | SiS_SetReg(SiS_Pr->SiS_Part1Port,0x2D,delay); | 9936 | SiS_SetReg(SiS_Pr->SiS_Part1Port,0x2D,delay); |
9937 | delay &= 0x0f; | 9937 | delay &= 0x0f; |
@@ -10009,7 +10009,7 @@ SetDelayComp(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
10009 | 10009 | ||
10010 | if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { | 10010 | if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { |
10011 | SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,0x0F,((delay << 4) & 0xf0)); | 10011 | SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,0x0F,((delay << 4) & 0xf0)); |
10012 | dochiptest = FALSE; | 10012 | dochiptest = false; |
10013 | } | 10013 | } |
10014 | 10014 | ||
10015 | } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { /* ------------ TV */ | 10015 | } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { /* ------------ TV */ |
@@ -10043,12 +10043,12 @@ SetDelayComp(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
10043 | case CUT_CLEVO1400: | 10043 | case CUT_CLEVO1400: |
10044 | case CUT_CLEVO14002: | 10044 | case CUT_CLEVO14002: |
10045 | delay = 0x02; | 10045 | delay = 0x02; |
10046 | dochiptest = FALSE; | 10046 | dochiptest = false; |
10047 | break; | 10047 | break; |
10048 | case CUT_CLEVO1024: | 10048 | case CUT_CLEVO1024: |
10049 | case CUT_CLEVO10242: | 10049 | case CUT_CLEVO10242: |
10050 | delay = 0x03; | 10050 | delay = 0x03; |
10051 | dochiptest = FALSE; | 10051 | dochiptest = false; |
10052 | break; | 10052 | break; |
10053 | default: | 10053 | default: |
10054 | delay = SiS310_TVDelayCompensation_651301LV[index]; | 10054 | delay = SiS310_TVDelayCompensation_651301LV[index]; |
@@ -10085,7 +10085,7 @@ SetDelayComp(struct SiS_Private *SiS_Pr, unsigned short ModeNo) | |||
10085 | 10085 | ||
10086 | if(SiS_LCDAEnabled(SiS_Pr)) { | 10086 | if(SiS_LCDAEnabled(SiS_Pr)) { |
10087 | delay &= 0x0f; | 10087 | delay &= 0x0f; |
10088 | dochiptest = FALSE; | 10088 | dochiptest = false; |
10089 | } | 10089 | } |
10090 | 10090 | ||
10091 | } else return; | 10091 | } else return; |
@@ -10728,7 +10728,7 @@ SiS_FinalizeLCD(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned shor | |||
10728 | SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1c,0x00); | 10728 | SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1c,0x00); |
10729 | SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1d,0x1b); | 10729 | SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1d,0x1b); |
10730 | } | 10730 | } |
10731 | if((SiS_Pr->Backup == TRUE) && (SiS_Pr->Backup_Mode == ModeNo)) { | 10731 | if(SiS_Pr->Backup && (SiS_Pr->Backup_Mode == ModeNo)) { |
10732 | SiS_SetReg(SiS_Pr->SiS_Part1Port,0x14,SiS_Pr->Backup_14); | 10732 | SiS_SetReg(SiS_Pr->SiS_Part1Port,0x14,SiS_Pr->Backup_14); |
10733 | SiS_SetReg(SiS_Pr->SiS_Part1Port,0x15,SiS_Pr->Backup_15); | 10733 | SiS_SetReg(SiS_Pr->SiS_Part1Port,0x15,SiS_Pr->Backup_15); |
10734 | SiS_SetReg(SiS_Pr->SiS_Part1Port,0x16,SiS_Pr->Backup_16); | 10734 | SiS_SetReg(SiS_Pr->SiS_Part1Port,0x16,SiS_Pr->Backup_16); |
diff --git a/drivers/video/sis/init301.h b/drivers/video/sis/init301.h index 4f3a28699d37..7708e1e1d99e 100644 --- a/drivers/video/sis/init301.h +++ b/drivers/video/sis/init301.h | |||
@@ -363,8 +363,8 @@ void SiS_LockCRT2(struct SiS_Private *SiS_Pr); | |||
363 | void SiS_EnableCRT2(struct SiS_Private *SiS_Pr); | 363 | void SiS_EnableCRT2(struct SiS_Private *SiS_Pr); |
364 | unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); | 364 | unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); |
365 | void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr); | 365 | void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr); |
366 | BOOLEAN SiS_IsDualEdge(struct SiS_Private *SiS_Pr); | 366 | bool SiS_IsDualEdge(struct SiS_Private *SiS_Pr); |
367 | BOOLEAN SiS_IsVAMode(struct SiS_Private *SiS_Pr); | 367 | bool SiS_IsVAMode(struct SiS_Private *SiS_Pr); |
368 | void SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, | 368 | void SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, |
369 | unsigned short ModeIdIndex, int checkcrt2mode); | 369 | unsigned short ModeIdIndex, int checkcrt2mode); |
370 | void SiS_SetYPbPr(struct SiS_Private *SiS_Pr); | 370 | void SiS_SetYPbPr(struct SiS_Private *SiS_Pr); |
@@ -379,7 +379,7 @@ void SiS_DisableBridge(struct SiS_Private *SiS_Pr); | |||
379 | #ifndef SIS_LINUX_KERNEL | 379 | #ifndef SIS_LINUX_KERNEL |
380 | void SiS_EnableBridge(struct SiS_Private *SiS_Pr); | 380 | void SiS_EnableBridge(struct SiS_Private *SiS_Pr); |
381 | #endif | 381 | #endif |
382 | BOOLEAN SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo); | 382 | bool SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo); |
383 | void SiS_SiS30xBLOn(struct SiS_Private *SiS_Pr); | 383 | void SiS_SiS30xBLOn(struct SiS_Private *SiS_Pr); |
384 | void SiS_SiS30xBLOff(struct SiS_Private *SiS_Pr); | 384 | void SiS_SiS30xBLOff(struct SiS_Private *SiS_Pr); |
385 | 385 | ||
@@ -403,7 +403,7 @@ void SiS_Chrontel701xBLOff(struct SiS_Private *SiS_Pr); | |||
403 | #endif /* 315 */ | 403 | #endif /* 315 */ |
404 | 404 | ||
405 | #ifdef SIS300 | 405 | #ifdef SIS300 |
406 | static BOOLEAN SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr); | 406 | static bool SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr); |
407 | void SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo); | 407 | void SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo); |
408 | #endif | 408 | #endif |
409 | 409 | ||
@@ -416,14 +416,14 @@ unsigned short SiS_HandleDDC(struct SiS_Private *SiS_Pr, unsigned int VBFlags, i | |||
416 | #ifdef SIS_XORG_XF86 | 416 | #ifdef SIS_XORG_XF86 |
417 | unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, | 417 | unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, |
418 | int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype, | 418 | int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype, |
419 | BOOLEAN checkcr32, unsigned int VBFlags2); | 419 | bool checkcr32, unsigned int VBFlags2); |
420 | unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr); | 420 | unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr); |
421 | unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype, | 421 | unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype, |
422 | unsigned char *buffer); | 422 | unsigned char *buffer); |
423 | #else | 423 | #else |
424 | static unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, | 424 | static unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, |
425 | int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype, | 425 | int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype, |
426 | BOOLEAN checkcr32, unsigned int VBFlags2); | 426 | bool checkcr32, unsigned int VBFlags2); |
427 | static unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr); | 427 | static unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr); |
428 | static unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype, | 428 | static unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype, |
429 | unsigned char *buffer); | 429 | unsigned char *buffer); |
@@ -469,7 +469,7 @@ extern void SiS_SetRegOR(SISIOADDRESS, unsigned short, unsigned short); | |||
469 | extern void SiS_SetRegAND(SISIOADDRESS, unsigned short, unsigned short); | 469 | extern void SiS_SetRegAND(SISIOADDRESS, unsigned short, unsigned short); |
470 | extern void SiS_DisplayOff(struct SiS_Private *SiS_Pr); | 470 | extern void SiS_DisplayOff(struct SiS_Private *SiS_Pr); |
471 | extern void SiS_DisplayOn(struct SiS_Private *SiS_Pr); | 471 | extern void SiS_DisplayOn(struct SiS_Private *SiS_Pr); |
472 | extern BOOLEAN SiS_SearchModeID(struct SiS_Private *, unsigned short *, unsigned short *); | 472 | extern bool SiS_SearchModeID(struct SiS_Private *, unsigned short *, unsigned short *); |
473 | extern unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo, | 473 | extern unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo, |
474 | unsigned short ModeIdIndex); | 474 | unsigned short ModeIdIndex); |
475 | extern unsigned short SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); | 475 | extern unsigned short SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex); |
diff --git a/drivers/video/sis/initextlfb.c b/drivers/video/sis/initextlfb.c index c3884a29f4c5..47a33501549d 100644 --- a/drivers/video/sis/initextlfb.c +++ b/drivers/video/sis/initextlfb.c | |||
@@ -38,14 +38,14 @@ int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr, | |||
38 | unsigned char modeno, unsigned char rateindex); | 38 | unsigned char modeno, unsigned char rateindex); |
39 | int sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno, | 39 | int sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno, |
40 | unsigned char rateindex, struct fb_var_screeninfo *var); | 40 | unsigned char rateindex, struct fb_var_screeninfo *var); |
41 | BOOLEAN sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, | 41 | bool sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, |
42 | int *htotal, int *vtotal, unsigned char rateindex); | 42 | int *htotal, int *vtotal, unsigned char rateindex); |
43 | 43 | ||
44 | extern BOOLEAN SiSInitPtr(struct SiS_Private *SiS_Pr); | 44 | extern bool SiSInitPtr(struct SiS_Private *SiS_Pr); |
45 | extern BOOLEAN SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, | 45 | extern bool SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo, |
46 | unsigned short *ModeIdIndex); | 46 | unsigned short *ModeIdIndex); |
47 | extern void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, | 47 | extern void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, |
48 | int xres, int yres, struct fb_var_screeninfo *var, BOOLEAN writeres); | 48 | int xres, int yres, struct fb_var_screeninfo *var, bool writeres); |
49 | 49 | ||
50 | int | 50 | int |
51 | sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr, unsigned char modeno, | 51 | sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr, unsigned char modeno, |
@@ -131,7 +131,7 @@ sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno, | |||
131 | (unsigned char *)&SiS_Pr->SiS_CRT1Table[index].CR[0], | 131 | (unsigned char *)&SiS_Pr->SiS_CRT1Table[index].CR[0], |
132 | SiS_Pr->SiS_RefIndex[RRTI].XRes, | 132 | SiS_Pr->SiS_RefIndex[RRTI].XRes, |
133 | SiS_Pr->SiS_RefIndex[RRTI].YRes, | 133 | SiS_Pr->SiS_RefIndex[RRTI].YRes, |
134 | var, FALSE); | 134 | var, false); |
135 | 135 | ||
136 | if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & 0x8000) | 136 | if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & 0x8000) |
137 | var->sync &= ~FB_SYNC_VERT_HIGH_ACT; | 137 | var->sync &= ~FB_SYNC_VERT_HIGH_ACT; |
@@ -175,7 +175,7 @@ sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno, | |||
175 | return 1; | 175 | return 1; |
176 | } | 176 | } |
177 | 177 | ||
178 | BOOLEAN | 178 | bool |
179 | sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, int *htotal, | 179 | sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, int *htotal, |
180 | int *vtotal, unsigned char rateindex) | 180 | int *vtotal, unsigned char rateindex) |
181 | { | 181 | { |
@@ -184,7 +184,7 @@ sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, int *ht | |||
184 | unsigned short RRTI = 0; | 184 | unsigned short RRTI = 0; |
185 | unsigned char sr_data, cr_data, cr_data2; | 185 | unsigned char sr_data, cr_data, cr_data2; |
186 | 186 | ||
187 | if(!SiSInitPtr(SiS_Pr)) return FALSE; | 187 | if(!SiSInitPtr(SiS_Pr)) return false; |
188 | 188 | ||
189 | if(rateindex > 0) rateindex--; | 189 | if(rateindex > 0) rateindex--; |
190 | 190 | ||
@@ -195,7 +195,7 @@ sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, int *ht | |||
195 | } | 195 | } |
196 | #endif | 196 | #endif |
197 | 197 | ||
198 | if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE; | 198 | if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return false; |
199 | 199 | ||
200 | RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex; | 200 | RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex; |
201 | if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & HaveWideTiming) { | 201 | if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & HaveWideTiming) { |
@@ -226,7 +226,7 @@ sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, int *ht | |||
226 | if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & InterlaceMode) | 226 | if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & InterlaceMode) |
227 | *vtotal *= 2; | 227 | *vtotal *= 2; |
228 | 228 | ||
229 | return TRUE; | 229 | return true; |
230 | } | 230 | } |
231 | 231 | ||
232 | 232 | ||
diff --git a/drivers/video/sis/sis.h b/drivers/video/sis/sis.h index a259446ca7fe..7d5ee2145e21 100644 --- a/drivers/video/sis/sis.h +++ b/drivers/video/sis/sis.h | |||
@@ -526,7 +526,7 @@ struct sis_video_info { | |||
526 | u16 vmax; | 526 | u16 vmax; |
527 | u32 dclockmax; | 527 | u32 dclockmax; |
528 | u8 feature; | 528 | u8 feature; |
529 | BOOLEAN datavalid; | 529 | bool datavalid; |
530 | } sisfb_thismonitor; | 530 | } sisfb_thismonitor; |
531 | 531 | ||
532 | unsigned short chip_id; /* PCI ID of chip */ | 532 | unsigned short chip_id; /* PCI ID of chip */ |
diff --git a/drivers/video/sis/sis_main.c b/drivers/video/sis/sis_main.c index baaf495a0a6d..01197d740217 100644 --- a/drivers/video/sis/sis_main.c +++ b/drivers/video/sis/sis_main.c | |||
@@ -110,7 +110,7 @@ sisfb_setdefaultparms(void) | |||
110 | /* ------------- Parameter parsing -------------- */ | 110 | /* ------------- Parameter parsing -------------- */ |
111 | 111 | ||
112 | static void __devinit | 112 | static void __devinit |
113 | sisfb_search_vesamode(unsigned int vesamode, BOOLEAN quiet) | 113 | sisfb_search_vesamode(unsigned int vesamode, bool quiet) |
114 | { | 114 | { |
115 | int i = 0, j = 0; | 115 | int i = 0, j = 0; |
116 | 116 | ||
@@ -150,7 +150,7 @@ sisfb_search_vesamode(unsigned int vesamode, BOOLEAN quiet) | |||
150 | } | 150 | } |
151 | 151 | ||
152 | static void __devinit | 152 | static void __devinit |
153 | sisfb_search_mode(char *name, BOOLEAN quiet) | 153 | sisfb_search_mode(char *name, bool quiet) |
154 | { | 154 | { |
155 | unsigned int j = 0, xres = 0, yres = 0, depth = 0, rate = 0; | 155 | unsigned int j = 0, xres = 0, yres = 0, depth = 0, rate = 0; |
156 | int i = 0; | 156 | int i = 0; |
@@ -251,7 +251,7 @@ sisfb_get_vga_mode_from_kernel(void) | |||
251 | "sisfb: Using vga mode %s pre-set by kernel as default\n", | 251 | "sisfb: Using vga mode %s pre-set by kernel as default\n", |
252 | mymode); | 252 | mymode); |
253 | 253 | ||
254 | sisfb_search_mode(mymode, TRUE); | 254 | sisfb_search_mode(mymode, true); |
255 | } | 255 | } |
256 | #endif | 256 | #endif |
257 | return; | 257 | return; |
@@ -307,7 +307,7 @@ static void __init | |||
307 | sisfb_search_specialtiming(const char *name) | 307 | sisfb_search_specialtiming(const char *name) |
308 | { | 308 | { |
309 | int i = 0; | 309 | int i = 0; |
310 | BOOLEAN found = FALSE; | 310 | bool found = false; |
311 | 311 | ||
312 | /* We don't know the hardware specs yet and there is no ivideo */ | 312 | /* We don't know the hardware specs yet and there is no ivideo */ |
313 | 313 | ||
@@ -322,7 +322,7 @@ sisfb_search_specialtiming(const char *name) | |||
322 | if(!strnicmp(name,mycustomttable[i].optionName, | 322 | if(!strnicmp(name,mycustomttable[i].optionName, |
323 | strlen(mycustomttable[i].optionName))) { | 323 | strlen(mycustomttable[i].optionName))) { |
324 | sisfb_specialtiming = mycustomttable[i].SpecialID; | 324 | sisfb_specialtiming = mycustomttable[i].SpecialID; |
325 | found = TRUE; | 325 | found = true; |
326 | printk(KERN_INFO "sisfb: Special timing for %s %s forced (\"%s\")\n", | 326 | printk(KERN_INFO "sisfb: Special timing for %s %s forced (\"%s\")\n", |
327 | mycustomttable[i].vendorName, | 327 | mycustomttable[i].vendorName, |
328 | mycustomttable[i].cardName, | 328 | mycustomttable[i].cardName, |
@@ -353,7 +353,7 @@ sisfb_detect_custom_timing(struct sis_video_info *ivideo) | |||
353 | { | 353 | { |
354 | unsigned char *biosver = NULL; | 354 | unsigned char *biosver = NULL; |
355 | unsigned char *biosdate = NULL; | 355 | unsigned char *biosdate = NULL; |
356 | BOOLEAN footprint; | 356 | bool footprint; |
357 | u32 chksum = 0; | 357 | u32 chksum = 0; |
358 | int i, j; | 358 | int i, j; |
359 | 359 | ||
@@ -380,16 +380,16 @@ sisfb_detect_custom_timing(struct sis_video_info *ivideo) | |||
380 | (mycustomttable[i].bioschksum == chksum))) && | 380 | (mycustomttable[i].bioschksum == chksum))) && |
381 | (mycustomttable[i].pcisubsysvendor == ivideo->subsysvendor) && | 381 | (mycustomttable[i].pcisubsysvendor == ivideo->subsysvendor) && |
382 | (mycustomttable[i].pcisubsyscard == ivideo->subsysdevice) ) { | 382 | (mycustomttable[i].pcisubsyscard == ivideo->subsysdevice) ) { |
383 | footprint = TRUE; | 383 | footprint = true; |
384 | for(j = 0; j < 5; j++) { | 384 | for(j = 0; j < 5; j++) { |
385 | if(mycustomttable[i].biosFootprintAddr[j]) { | 385 | if(mycustomttable[i].biosFootprintAddr[j]) { |
386 | if(ivideo->SiS_Pr.UseROM) { | 386 | if(ivideo->SiS_Pr.UseROM) { |
387 | if(ivideo->SiS_Pr.VirtualRomBase[mycustomttable[i].biosFootprintAddr[j]] != | 387 | if(ivideo->SiS_Pr.VirtualRomBase[mycustomttable[i].biosFootprintAddr[j]] != |
388 | mycustomttable[i].biosFootprintData[j]) { | 388 | mycustomttable[i].biosFootprintData[j]) { |
389 | footprint = FALSE; | 389 | footprint = false; |
390 | } | 390 | } |
391 | } else | 391 | } else |
392 | footprint = FALSE; | 392 | footprint = false; |
393 | } | 393 | } |
394 | } | 394 | } |
395 | if(footprint) { | 395 | if(footprint) { |
@@ -406,7 +406,7 @@ sisfb_detect_custom_timing(struct sis_video_info *ivideo) | |||
406 | } while(mycustomttable[i].chipID); | 406 | } while(mycustomttable[i].chipID); |
407 | } | 407 | } |
408 | 408 | ||
409 | static BOOLEAN __devinit | 409 | static bool __devinit |
410 | sisfb_interpret_edid(struct sisfb_monitor *monitor, u8 *buffer) | 410 | sisfb_interpret_edid(struct sisfb_monitor *monitor, u8 *buffer) |
411 | { | 411 | { |
412 | int i, j, xres, yres, refresh, index; | 412 | int i, j, xres, yres, refresh, index; |
@@ -417,13 +417,13 @@ sisfb_interpret_edid(struct sisfb_monitor *monitor, u8 *buffer) | |||
417 | buffer[4] != 0xff || buffer[5] != 0xff || | 417 | buffer[4] != 0xff || buffer[5] != 0xff || |
418 | buffer[6] != 0xff || buffer[7] != 0x00) { | 418 | buffer[6] != 0xff || buffer[7] != 0x00) { |
419 | printk(KERN_DEBUG "sisfb: Bad EDID header\n"); | 419 | printk(KERN_DEBUG "sisfb: Bad EDID header\n"); |
420 | return FALSE; | 420 | return false; |
421 | } | 421 | } |
422 | 422 | ||
423 | if(buffer[0x12] != 0x01) { | 423 | if(buffer[0x12] != 0x01) { |
424 | printk(KERN_INFO "sisfb: EDID version %d not supported\n", | 424 | printk(KERN_INFO "sisfb: EDID version %d not supported\n", |
425 | buffer[0x12]); | 425 | buffer[0x12]); |
426 | return FALSE; | 426 | return false; |
427 | } | 427 | } |
428 | 428 | ||
429 | monitor->feature = buffer[0x18]; | 429 | monitor->feature = buffer[0x18]; |
@@ -449,7 +449,7 @@ sisfb_interpret_edid(struct sisfb_monitor *monitor, u8 *buffer) | |||
449 | monitor->vmin = buffer[j + 5]; | 449 | monitor->vmin = buffer[j + 5]; |
450 | monitor->vmax = buffer[j + 6]; | 450 | monitor->vmax = buffer[j + 6]; |
451 | monitor->dclockmax = buffer[j + 9] * 10 * 1000; | 451 | monitor->dclockmax = buffer[j + 9] * 10 * 1000; |
452 | monitor->datavalid = TRUE; | 452 | monitor->datavalid = true; |
453 | break; | 453 | break; |
454 | } | 454 | } |
455 | j += 18; | 455 | j += 18; |
@@ -501,7 +501,7 @@ sisfb_interpret_edid(struct sisfb_monitor *monitor, u8 *buffer) | |||
501 | index += 2; | 501 | index += 2; |
502 | } | 502 | } |
503 | if((monitor->hmin <= monitor->hmax) && (monitor->vmin <= monitor->vmax)) { | 503 | if((monitor->hmin <= monitor->hmax) && (monitor->vmin <= monitor->vmax)) { |
504 | monitor->datavalid = TRUE; | 504 | monitor->datavalid = true; |
505 | } | 505 | } |
506 | } | 506 | } |
507 | 507 | ||
@@ -514,7 +514,7 @@ sisfb_handle_ddc(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, i | |||
514 | unsigned short temp, i, realcrtno = crtno; | 514 | unsigned short temp, i, realcrtno = crtno; |
515 | unsigned char buffer[256]; | 515 | unsigned char buffer[256]; |
516 | 516 | ||
517 | monitor->datavalid = FALSE; | 517 | monitor->datavalid = false; |
518 | 518 | ||
519 | if(crtno) { | 519 | if(crtno) { |
520 | if(ivideo->vbflags & CRT2_LCD) realcrtno = 1; | 520 | if(ivideo->vbflags & CRT2_LCD) realcrtno = 1; |
@@ -563,7 +563,7 @@ sisfb_handle_ddc(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, i | |||
563 | 563 | ||
564 | /* -------------- Mode validation --------------- */ | 564 | /* -------------- Mode validation --------------- */ |
565 | 565 | ||
566 | static BOOLEAN | 566 | static bool |
567 | sisfb_verify_rate(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, | 567 | sisfb_verify_rate(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, |
568 | int mode_idx, int rate_idx, int rate) | 568 | int mode_idx, int rate_idx, int rate) |
569 | { | 569 | { |
@@ -571,10 +571,10 @@ sisfb_verify_rate(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, | |||
571 | unsigned int dclock, hsync; | 571 | unsigned int dclock, hsync; |
572 | 572 | ||
573 | if(!monitor->datavalid) | 573 | if(!monitor->datavalid) |
574 | return TRUE; | 574 | return true; |
575 | 575 | ||
576 | if(mode_idx < 0) | 576 | if(mode_idx < 0) |
577 | return FALSE; | 577 | return false; |
578 | 578 | ||
579 | /* Skip for 320x200, 320x240, 640x400 */ | 579 | /* Skip for 320x200, 320x240, 640x400 */ |
580 | switch(sisbios_mode[mode_idx].mode_no[ivideo->mni]) { | 580 | switch(sisbios_mode[mode_idx].mode_no[ivideo->mni]) { |
@@ -587,34 +587,34 @@ sisfb_verify_rate(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, | |||
587 | case 0x2f: | 587 | case 0x2f: |
588 | case 0x5d: | 588 | case 0x5d: |
589 | case 0x5e: | 589 | case 0x5e: |
590 | return TRUE; | 590 | return true; |
591 | #ifdef CONFIG_FB_SIS_315 | 591 | #ifdef CONFIG_FB_SIS_315 |
592 | case 0x5a: | 592 | case 0x5a: |
593 | case 0x5b: | 593 | case 0x5b: |
594 | if(ivideo->sisvga_engine == SIS_315_VGA) return TRUE; | 594 | if(ivideo->sisvga_engine == SIS_315_VGA) return true; |
595 | #endif | 595 | #endif |
596 | } | 596 | } |
597 | 597 | ||
598 | if(rate < (monitor->vmin - 1)) | 598 | if(rate < (monitor->vmin - 1)) |
599 | return FALSE; | 599 | return false; |
600 | if(rate > (monitor->vmax + 1)) | 600 | if(rate > (monitor->vmax + 1)) |
601 | return FALSE; | 601 | return false; |
602 | 602 | ||
603 | if(sisfb_gettotalfrommode(&ivideo->SiS_Pr, | 603 | if(sisfb_gettotalfrommode(&ivideo->SiS_Pr, |
604 | sisbios_mode[mode_idx].mode_no[ivideo->mni], | 604 | sisbios_mode[mode_idx].mode_no[ivideo->mni], |
605 | &htotal, &vtotal, rate_idx)) { | 605 | &htotal, &vtotal, rate_idx)) { |
606 | dclock = (htotal * vtotal * rate) / 1000; | 606 | dclock = (htotal * vtotal * rate) / 1000; |
607 | if(dclock > (monitor->dclockmax + 1000)) | 607 | if(dclock > (monitor->dclockmax + 1000)) |
608 | return FALSE; | 608 | return false; |
609 | hsync = dclock / htotal; | 609 | hsync = dclock / htotal; |
610 | if(hsync < (monitor->hmin - 1)) | 610 | if(hsync < (monitor->hmin - 1)) |
611 | return FALSE; | 611 | return false; |
612 | if(hsync > (monitor->hmax + 1)) | 612 | if(hsync > (monitor->hmax + 1)) |
613 | return FALSE; | 613 | return false; |
614 | } else { | 614 | } else { |
615 | return FALSE; | 615 | return false; |
616 | } | 616 | } |
617 | return TRUE; | 617 | return true; |
618 | } | 618 | } |
619 | 619 | ||
620 | static int | 620 | static int |
@@ -732,49 +732,49 @@ sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate, int | |||
732 | } | 732 | } |
733 | } | 733 | } |
734 | 734 | ||
735 | static BOOLEAN | 735 | static bool |
736 | sisfb_bridgeisslave(struct sis_video_info *ivideo) | 736 | sisfb_bridgeisslave(struct sis_video_info *ivideo) |
737 | { | 737 | { |
738 | unsigned char P1_00; | 738 | unsigned char P1_00; |
739 | 739 | ||
740 | if(!(ivideo->vbflags2 & VB2_VIDEOBRIDGE)) | 740 | if(!(ivideo->vbflags2 & VB2_VIDEOBRIDGE)) |
741 | return FALSE; | 741 | return false; |
742 | 742 | ||
743 | inSISIDXREG(SISPART1,0x00,P1_00); | 743 | inSISIDXREG(SISPART1,0x00,P1_00); |
744 | if( ((ivideo->sisvga_engine == SIS_300_VGA) && (P1_00 & 0xa0) == 0x20) || | 744 | if( ((ivideo->sisvga_engine == SIS_300_VGA) && (P1_00 & 0xa0) == 0x20) || |
745 | ((ivideo->sisvga_engine == SIS_315_VGA) && (P1_00 & 0x50) == 0x10) ) { | 745 | ((ivideo->sisvga_engine == SIS_315_VGA) && (P1_00 & 0x50) == 0x10) ) { |
746 | return TRUE; | 746 | return true; |
747 | } else { | 747 | } else { |
748 | return FALSE; | 748 | return false; |
749 | } | 749 | } |
750 | } | 750 | } |
751 | 751 | ||
752 | static BOOLEAN | 752 | static bool |
753 | sisfballowretracecrt1(struct sis_video_info *ivideo) | 753 | sisfballowretracecrt1(struct sis_video_info *ivideo) |
754 | { | 754 | { |
755 | u8 temp; | 755 | u8 temp; |
756 | 756 | ||
757 | inSISIDXREG(SISCR,0x17,temp); | 757 | inSISIDXREG(SISCR,0x17,temp); |
758 | if(!(temp & 0x80)) | 758 | if(!(temp & 0x80)) |
759 | return FALSE; | 759 | return false; |
760 | 760 | ||
761 | inSISIDXREG(SISSR,0x1f,temp); | 761 | inSISIDXREG(SISSR,0x1f,temp); |
762 | if(temp & 0xc0) | 762 | if(temp & 0xc0) |
763 | return FALSE; | 763 | return false; |
764 | 764 | ||
765 | return TRUE; | 765 | return true; |
766 | } | 766 | } |
767 | 767 | ||
768 | static BOOLEAN | 768 | static bool |
769 | sisfbcheckvretracecrt1(struct sis_video_info *ivideo) | 769 | sisfbcheckvretracecrt1(struct sis_video_info *ivideo) |
770 | { | 770 | { |
771 | if(!sisfballowretracecrt1(ivideo)) | 771 | if(!sisfballowretracecrt1(ivideo)) |
772 | return FALSE; | 772 | return false; |
773 | 773 | ||
774 | if(inSISREG(SISINPSTAT) & 0x08) | 774 | if(inSISREG(SISINPSTAT) & 0x08) |
775 | return TRUE; | 775 | return true; |
776 | else | 776 | else |
777 | return FALSE; | 777 | return false; |
778 | } | 778 | } |
779 | 779 | ||
780 | static void | 780 | static void |
@@ -791,7 +791,7 @@ sisfbwaitretracecrt1(struct sis_video_info *ivideo) | |||
791 | while((inSISREG(SISINPSTAT) & 0x08) && --watchdog); | 791 | while((inSISREG(SISINPSTAT) & 0x08) && --watchdog); |
792 | } | 792 | } |
793 | 793 | ||
794 | static BOOLEAN | 794 | static bool |
795 | sisfbcheckvretracecrt2(struct sis_video_info *ivideo) | 795 | sisfbcheckvretracecrt2(struct sis_video_info *ivideo) |
796 | { | 796 | { |
797 | unsigned char temp, reg; | 797 | unsigned char temp, reg; |
@@ -799,17 +799,17 @@ sisfbcheckvretracecrt2(struct sis_video_info *ivideo) | |||
799 | switch(ivideo->sisvga_engine) { | 799 | switch(ivideo->sisvga_engine) { |
800 | case SIS_300_VGA: reg = 0x25; break; | 800 | case SIS_300_VGA: reg = 0x25; break; |
801 | case SIS_315_VGA: reg = 0x30; break; | 801 | case SIS_315_VGA: reg = 0x30; break; |
802 | default: return FALSE; | 802 | default: return false; |
803 | } | 803 | } |
804 | 804 | ||
805 | inSISIDXREG(SISPART1, reg, temp); | 805 | inSISIDXREG(SISPART1, reg, temp); |
806 | if(temp & 0x02) | 806 | if(temp & 0x02) |
807 | return TRUE; | 807 | return true; |
808 | else | 808 | else |
809 | return FALSE; | 809 | return false; |
810 | } | 810 | } |
811 | 811 | ||
812 | static BOOLEAN | 812 | static bool |
813 | sisfb_CheckVBRetrace(struct sis_video_info *ivideo) | 813 | sisfb_CheckVBRetrace(struct sis_video_info *ivideo) |
814 | { | 814 | { |
815 | if(ivideo->currentvbflags & VB_DISPTYPE_DISP2) { | 815 | if(ivideo->currentvbflags & VB_DISPTYPE_DISP2) { |
@@ -874,7 +874,7 @@ static int | |||
874 | sisfb_myblank(struct sis_video_info *ivideo, int blank) | 874 | sisfb_myblank(struct sis_video_info *ivideo, int blank) |
875 | { | 875 | { |
876 | u8 sr01, sr11, sr1f, cr63=0, p2_0, p1_13; | 876 | u8 sr01, sr11, sr1f, cr63=0, p2_0, p1_13; |
877 | BOOLEAN backlight = TRUE; | 877 | bool backlight = true; |
878 | 878 | ||
879 | switch(blank) { | 879 | switch(blank) { |
880 | case FB_BLANK_UNBLANK: /* on */ | 880 | case FB_BLANK_UNBLANK: /* on */ |
@@ -884,7 +884,7 @@ sisfb_myblank(struct sis_video_info *ivideo, int blank) | |||
884 | cr63 = 0x00; | 884 | cr63 = 0x00; |
885 | p2_0 = 0x20; | 885 | p2_0 = 0x20; |
886 | p1_13 = 0x00; | 886 | p1_13 = 0x00; |
887 | backlight = TRUE; | 887 | backlight = true; |
888 | break; | 888 | break; |
889 | case FB_BLANK_NORMAL: /* blank */ | 889 | case FB_BLANK_NORMAL: /* blank */ |
890 | sr01 = 0x20; | 890 | sr01 = 0x20; |
@@ -893,7 +893,7 @@ sisfb_myblank(struct sis_video_info *ivideo, int blank) | |||
893 | cr63 = 0x00; | 893 | cr63 = 0x00; |
894 | p2_0 = 0x20; | 894 | p2_0 = 0x20; |
895 | p1_13 = 0x00; | 895 | p1_13 = 0x00; |
896 | backlight = TRUE; | 896 | backlight = true; |
897 | break; | 897 | break; |
898 | case FB_BLANK_VSYNC_SUSPEND: /* no vsync */ | 898 | case FB_BLANK_VSYNC_SUSPEND: /* no vsync */ |
899 | sr01 = 0x20; | 899 | sr01 = 0x20; |
@@ -902,7 +902,7 @@ sisfb_myblank(struct sis_video_info *ivideo, int blank) | |||
902 | cr63 = 0x40; | 902 | cr63 = 0x40; |
903 | p2_0 = 0x40; | 903 | p2_0 = 0x40; |
904 | p1_13 = 0x80; | 904 | p1_13 = 0x80; |
905 | backlight = FALSE; | 905 | backlight = false; |
906 | break; | 906 | break; |
907 | case FB_BLANK_HSYNC_SUSPEND: /* no hsync */ | 907 | case FB_BLANK_HSYNC_SUSPEND: /* no hsync */ |
908 | sr01 = 0x20; | 908 | sr01 = 0x20; |
@@ -911,7 +911,7 @@ sisfb_myblank(struct sis_video_info *ivideo, int blank) | |||
911 | cr63 = 0x40; | 911 | cr63 = 0x40; |
912 | p2_0 = 0x80; | 912 | p2_0 = 0x80; |
913 | p1_13 = 0x40; | 913 | p1_13 = 0x40; |
914 | backlight = FALSE; | 914 | backlight = false; |
915 | break; | 915 | break; |
916 | case FB_BLANK_POWERDOWN: /* off */ | 916 | case FB_BLANK_POWERDOWN: /* off */ |
917 | sr01 = 0x20; | 917 | sr01 = 0x20; |
@@ -920,7 +920,7 @@ sisfb_myblank(struct sis_video_info *ivideo, int blank) | |||
920 | cr63 = 0x40; | 920 | cr63 = 0x40; |
921 | p2_0 = 0xc0; | 921 | p2_0 = 0xc0; |
922 | p1_13 = 0xc0; | 922 | p1_13 = 0xc0; |
923 | backlight = FALSE; | 923 | backlight = false; |
924 | break; | 924 | break; |
925 | default: | 925 | default: |
926 | return 1; | 926 | return 1; |
@@ -1109,11 +1109,11 @@ sisfb_calc_pitch(struct sis_video_info *ivideo, struct fb_var_screeninfo *var) | |||
1109 | static void | 1109 | static void |
1110 | sisfb_set_pitch(struct sis_video_info *ivideo) | 1110 | sisfb_set_pitch(struct sis_video_info *ivideo) |
1111 | { | 1111 | { |
1112 | BOOLEAN isslavemode = FALSE; | 1112 | bool isslavemode = false; |
1113 | unsigned short HDisplay1 = ivideo->scrnpitchCRT1 >> 3; | 1113 | unsigned short HDisplay1 = ivideo->scrnpitchCRT1 >> 3; |
1114 | unsigned short HDisplay2 = ivideo->video_linelength >> 3; | 1114 | unsigned short HDisplay2 = ivideo->video_linelength >> 3; |
1115 | 1115 | ||
1116 | if(sisfb_bridgeisslave(ivideo)) isslavemode = TRUE; | 1116 | if(sisfb_bridgeisslave(ivideo)) isslavemode = true; |
1117 | 1117 | ||
1118 | /* We need to set pitch for CRT1 if bridge is in slave mode, too */ | 1118 | /* We need to set pitch for CRT1 if bridge is in slave mode, too */ |
1119 | if((ivideo->currentvbflags & VB_DISPTYPE_DISP1) || (isslavemode)) { | 1119 | if((ivideo->currentvbflags & VB_DISPTYPE_DISP1) || (isslavemode)) { |
@@ -1178,7 +1178,7 @@ sisfb_set_mode(struct sis_video_info *ivideo, int clrscrn) | |||
1178 | 1178 | ||
1179 | sisfb_pre_setmode(ivideo); | 1179 | sisfb_pre_setmode(ivideo); |
1180 | 1180 | ||
1181 | if(SiSSetMode(&ivideo->SiS_Pr, modeno) == 0) { | 1181 | if(!SiSSetMode(&ivideo->SiS_Pr, modeno)) { |
1182 | printk(KERN_ERR "sisfb: Setting mode[0x%x] failed\n", ivideo->mode_no); | 1182 | printk(KERN_ERR "sisfb: Setting mode[0x%x] failed\n", ivideo->mode_no); |
1183 | return -EINVAL; | 1183 | return -EINVAL; |
1184 | } | 1184 | } |
@@ -1446,7 +1446,7 @@ sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | |||
1446 | unsigned int drate = 0, hrate = 0, maxyres; | 1446 | unsigned int drate = 0, hrate = 0, maxyres; |
1447 | int found_mode = 0; | 1447 | int found_mode = 0; |
1448 | int refresh_rate, search_idx, tidx; | 1448 | int refresh_rate, search_idx, tidx; |
1449 | BOOLEAN recalc_clock = FALSE; | 1449 | bool recalc_clock = false; |
1450 | u32 pixclock; | 1450 | u32 pixclock; |
1451 | 1451 | ||
1452 | htotal = var->left_margin + var->xres + var->right_margin + var->hsync_len; | 1452 | htotal = var->left_margin + var->xres + var->right_margin + var->hsync_len; |
@@ -1524,7 +1524,7 @@ sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | |||
1524 | (var->bits_per_pixel == 8) ) { | 1524 | (var->bits_per_pixel == 8) ) { |
1525 | /* Slave modes on LVDS and 301B-DH */ | 1525 | /* Slave modes on LVDS and 301B-DH */ |
1526 | refresh_rate = 60; | 1526 | refresh_rate = 60; |
1527 | recalc_clock = TRUE; | 1527 | recalc_clock = true; |
1528 | } else if( (ivideo->current_htotal == htotal) && | 1528 | } else if( (ivideo->current_htotal == htotal) && |
1529 | (ivideo->current_vtotal == vtotal) && | 1529 | (ivideo->current_vtotal == vtotal) && |
1530 | (ivideo->current_pixclock == pixclock) ) { | 1530 | (ivideo->current_pixclock == pixclock) ) { |
@@ -1545,17 +1545,17 @@ sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | |||
1545 | } else { | 1545 | } else { |
1546 | refresh_rate = 60; | 1546 | refresh_rate = 60; |
1547 | } | 1547 | } |
1548 | recalc_clock = TRUE; | 1548 | recalc_clock = true; |
1549 | } else if((pixclock) && (htotal) && (vtotal)) { | 1549 | } else if((pixclock) && (htotal) && (vtotal)) { |
1550 | drate = 1000000000 / pixclock; | 1550 | drate = 1000000000 / pixclock; |
1551 | hrate = (drate * 1000) / htotal; | 1551 | hrate = (drate * 1000) / htotal; |
1552 | refresh_rate = (unsigned int) (hrate * 2 / vtotal); | 1552 | refresh_rate = (unsigned int) (hrate * 2 / vtotal); |
1553 | } else if(ivideo->current_refresh_rate) { | 1553 | } else if(ivideo->current_refresh_rate) { |
1554 | refresh_rate = ivideo->current_refresh_rate; | 1554 | refresh_rate = ivideo->current_refresh_rate; |
1555 | recalc_clock = TRUE; | 1555 | recalc_clock = true; |
1556 | } else { | 1556 | } else { |
1557 | refresh_rate = 60; | 1557 | refresh_rate = 60; |
1558 | recalc_clock = TRUE; | 1558 | recalc_clock = true; |
1559 | } | 1559 | } |
1560 | 1560 | ||
1561 | myrateindex = sisfb_search_refresh_rate(ivideo, refresh_rate, search_idx); | 1561 | myrateindex = sisfb_search_refresh_rate(ivideo, refresh_rate, search_idx); |
@@ -2181,7 +2181,7 @@ sisfb_detect_VB_connect(struct sis_video_info *ivideo) | |||
2181 | 2181 | ||
2182 | /* ------------------ Sensing routines ------------------ */ | 2182 | /* ------------------ Sensing routines ------------------ */ |
2183 | 2183 | ||
2184 | static BOOLEAN __devinit | 2184 | static bool __devinit |
2185 | sisfb_test_DDC1(struct sis_video_info *ivideo) | 2185 | sisfb_test_DDC1(struct sis_video_info *ivideo) |
2186 | { | 2186 | { |
2187 | unsigned short old; | 2187 | unsigned short old; |
@@ -2191,13 +2191,13 @@ sisfb_test_DDC1(struct sis_video_info *ivideo) | |||
2191 | do { | 2191 | do { |
2192 | if(old != SiS_ReadDDC1Bit(&ivideo->SiS_Pr)) break; | 2192 | if(old != SiS_ReadDDC1Bit(&ivideo->SiS_Pr)) break; |
2193 | } while(count--); | 2193 | } while(count--); |
2194 | return (count == -1) ? FALSE : TRUE; | 2194 | return (count != -1); |
2195 | } | 2195 | } |
2196 | 2196 | ||
2197 | static void __devinit | 2197 | static void __devinit |
2198 | sisfb_sense_crt1(struct sis_video_info *ivideo) | 2198 | sisfb_sense_crt1(struct sis_video_info *ivideo) |
2199 | { | 2199 | { |
2200 | BOOLEAN mustwait = FALSE; | 2200 | bool mustwait = false; |
2201 | u8 sr1F, cr17; | 2201 | u8 sr1F, cr17; |
2202 | #ifdef CONFIG_FB_SIS_315 | 2202 | #ifdef CONFIG_FB_SIS_315 |
2203 | u8 cr63=0; | 2203 | u8 cr63=0; |
@@ -2208,7 +2208,7 @@ sisfb_sense_crt1(struct sis_video_info *ivideo) | |||
2208 | inSISIDXREG(SISSR,0x1F,sr1F); | 2208 | inSISIDXREG(SISSR,0x1F,sr1F); |
2209 | orSISIDXREG(SISSR,0x1F,0x04); | 2209 | orSISIDXREG(SISSR,0x1F,0x04); |
2210 | andSISIDXREG(SISSR,0x1F,0x3F); | 2210 | andSISIDXREG(SISSR,0x1F,0x3F); |
2211 | if(sr1F & 0xc0) mustwait = TRUE; | 2211 | if(sr1F & 0xc0) mustwait = true; |
2212 | 2212 | ||
2213 | #ifdef CONFIG_FB_SIS_315 | 2213 | #ifdef CONFIG_FB_SIS_315 |
2214 | if(ivideo->sisvga_engine == SIS_315_VGA) { | 2214 | if(ivideo->sisvga_engine == SIS_315_VGA) { |
@@ -2222,7 +2222,7 @@ sisfb_sense_crt1(struct sis_video_info *ivideo) | |||
2222 | cr17 &= 0x80; | 2222 | cr17 &= 0x80; |
2223 | if(!cr17) { | 2223 | if(!cr17) { |
2224 | orSISIDXREG(SISCR,0x17,0x80); | 2224 | orSISIDXREG(SISCR,0x17,0x80); |
2225 | mustwait = TRUE; | 2225 | mustwait = true; |
2226 | outSISIDXREG(SISSR, 0x00, 0x01); | 2226 | outSISIDXREG(SISSR, 0x00, 0x01); |
2227 | outSISIDXREG(SISSR, 0x00, 0x03); | 2227 | outSISIDXREG(SISSR, 0x00, 0x03); |
2228 | } | 2228 | } |
@@ -2284,7 +2284,7 @@ SiS_SenseLCD(struct sis_video_info *ivideo) | |||
2284 | u8 reg, cr37 = 0, paneltype = 0; | 2284 | u8 reg, cr37 = 0, paneltype = 0; |
2285 | u16 xres, yres; | 2285 | u16 xres, yres; |
2286 | 2286 | ||
2287 | ivideo->SiS_Pr.PanelSelfDetected = FALSE; | 2287 | ivideo->SiS_Pr.PanelSelfDetected = false; |
2288 | 2288 | ||
2289 | /* LCD detection only for TMDS bridges */ | 2289 | /* LCD detection only for TMDS bridges */ |
2290 | if(!(ivideo->vbflags2 & VB2_SISTMDSBRIDGE)) | 2290 | if(!(ivideo->vbflags2 & VB2_SISTMDSBRIDGE)) |
@@ -2361,7 +2361,7 @@ SiS_SenseLCD(struct sis_video_info *ivideo) | |||
2361 | setSISIDXREG(SISCR, 0x37, 0x0c, cr37); | 2361 | setSISIDXREG(SISCR, 0x37, 0x0c, cr37); |
2362 | orSISIDXREG(SISCR, 0x32, 0x08); | 2362 | orSISIDXREG(SISCR, 0x32, 0x08); |
2363 | 2363 | ||
2364 | ivideo->SiS_Pr.PanelSelfDetected = TRUE; | 2364 | ivideo->SiS_Pr.PanelSelfDetected = true; |
2365 | } | 2365 | } |
2366 | 2366 | ||
2367 | static int __devinit | 2367 | static int __devinit |
@@ -3016,7 +3016,7 @@ sisfb_save_pdc_emi(struct sis_video_info *ivideo) | |||
3016 | int tmp; | 3016 | int tmp; |
3017 | inSISIDXREG(SISPART1,0x13,tmp); | 3017 | inSISIDXREG(SISPART1,0x13,tmp); |
3018 | if(tmp & 0x04) { | 3018 | if(tmp & 0x04) { |
3019 | ivideo->SiS_Pr.SiS_UseLCDA = TRUE; | 3019 | ivideo->SiS_Pr.SiS_UseLCDA = true; |
3020 | ivideo->detectedlcda = 0x03; | 3020 | ivideo->detectedlcda = 0x03; |
3021 | } | 3021 | } |
3022 | } | 3022 | } |
@@ -3071,9 +3071,9 @@ sisfb_save_pdc_emi(struct sis_video_info *ivideo) | |||
3071 | inSISIDXREG(SISPART4,0x31,ivideo->SiS_Pr.EMI_31); | 3071 | inSISIDXREG(SISPART4,0x31,ivideo->SiS_Pr.EMI_31); |
3072 | inSISIDXREG(SISPART4,0x32,ivideo->SiS_Pr.EMI_32); | 3072 | inSISIDXREG(SISPART4,0x32,ivideo->SiS_Pr.EMI_32); |
3073 | inSISIDXREG(SISPART4,0x33,ivideo->SiS_Pr.EMI_33); | 3073 | inSISIDXREG(SISPART4,0x33,ivideo->SiS_Pr.EMI_33); |
3074 | ivideo->SiS_Pr.HaveEMI = TRUE; | 3074 | ivideo->SiS_Pr.HaveEMI = true; |
3075 | if((tmp & 0x20) || (ivideo->detectedlcda != 0xff)) { | 3075 | if((tmp & 0x20) || (ivideo->detectedlcda != 0xff)) { |
3076 | ivideo->SiS_Pr.HaveEMILCD = TRUE; | 3076 | ivideo->SiS_Pr.HaveEMILCD = true; |
3077 | } | 3077 | } |
3078 | } | 3078 | } |
3079 | } | 3079 | } |
@@ -3558,8 +3558,8 @@ sisfb_pre_setmode(struct sis_video_info *ivideo) | |||
3558 | } | 3558 | } |
3559 | #endif | 3559 | #endif |
3560 | 3560 | ||
3561 | SiS_SetEnableDstn(&ivideo->SiS_Pr, FALSE); | 3561 | SiS_SetEnableDstn(&ivideo->SiS_Pr, false); |
3562 | SiS_SetEnableFstn(&ivideo->SiS_Pr, FALSE); | 3562 | SiS_SetEnableFstn(&ivideo->SiS_Pr, false); |
3563 | ivideo->curFSTN = ivideo->curDSTN = 0; | 3563 | ivideo->curFSTN = ivideo->curDSTN = 0; |
3564 | 3564 | ||
3565 | switch(ivideo->currentvbflags & VB_DISPTYPE_DISP2) { | 3565 | switch(ivideo->currentvbflags & VB_DISPTYPE_DISP2) { |
@@ -3814,8 +3814,8 @@ sisfb_set_TVyposoffset(struct sis_video_info *ivideo, int val) | |||
3814 | static void | 3814 | static void |
3815 | sisfb_post_setmode(struct sis_video_info *ivideo) | 3815 | sisfb_post_setmode(struct sis_video_info *ivideo) |
3816 | { | 3816 | { |
3817 | BOOLEAN crt1isoff = FALSE; | 3817 | bool crt1isoff = false; |
3818 | BOOLEAN doit = TRUE; | 3818 | bool doit = true; |
3819 | #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315) | 3819 | #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315) |
3820 | u8 reg; | 3820 | u8 reg; |
3821 | #endif | 3821 | #endif |
@@ -3834,17 +3834,17 @@ sisfb_post_setmode(struct sis_video_info *ivideo) | |||
3834 | 3834 | ||
3835 | /* We can't switch off CRT1 if bridge is in slave mode */ | 3835 | /* We can't switch off CRT1 if bridge is in slave mode */ |
3836 | if(ivideo->vbflags2 & VB2_VIDEOBRIDGE) { | 3836 | if(ivideo->vbflags2 & VB2_VIDEOBRIDGE) { |
3837 | if(sisfb_bridgeisslave(ivideo)) doit = FALSE; | 3837 | if(sisfb_bridgeisslave(ivideo)) doit = false; |
3838 | } else | 3838 | } else |
3839 | ivideo->sisfb_crt1off = 0; | 3839 | ivideo->sisfb_crt1off = 0; |
3840 | 3840 | ||
3841 | #ifdef CONFIG_FB_SIS_300 | 3841 | #ifdef CONFIG_FB_SIS_300 |
3842 | if(ivideo->sisvga_engine == SIS_300_VGA) { | 3842 | if(ivideo->sisvga_engine == SIS_300_VGA) { |
3843 | if((ivideo->sisfb_crt1off) && (doit)) { | 3843 | if((ivideo->sisfb_crt1off) && (doit)) { |
3844 | crt1isoff = TRUE; | 3844 | crt1isoff = true; |
3845 | reg = 0x00; | 3845 | reg = 0x00; |
3846 | } else { | 3846 | } else { |
3847 | crt1isoff = FALSE; | 3847 | crt1isoff = false; |
3848 | reg = 0x80; | 3848 | reg = 0x80; |
3849 | } | 3849 | } |
3850 | setSISIDXREG(SISCR, 0x17, 0x7f, reg); | 3850 | setSISIDXREG(SISCR, 0x17, 0x7f, reg); |
@@ -3853,11 +3853,11 @@ sisfb_post_setmode(struct sis_video_info *ivideo) | |||
3853 | #ifdef CONFIG_FB_SIS_315 | 3853 | #ifdef CONFIG_FB_SIS_315 |
3854 | if(ivideo->sisvga_engine == SIS_315_VGA) { | 3854 | if(ivideo->sisvga_engine == SIS_315_VGA) { |
3855 | if((ivideo->sisfb_crt1off) && (doit)) { | 3855 | if((ivideo->sisfb_crt1off) && (doit)) { |
3856 | crt1isoff = TRUE; | 3856 | crt1isoff = true; |
3857 | reg = 0x40; | 3857 | reg = 0x40; |
3858 | reg1 = 0xc0; | 3858 | reg1 = 0xc0; |
3859 | } else { | 3859 | } else { |
3860 | crt1isoff = FALSE; | 3860 | crt1isoff = false; |
3861 | reg = 0x00; | 3861 | reg = 0x00; |
3862 | reg1 = 0x00; | 3862 | reg1 = 0x00; |
3863 | } | 3863 | } |
@@ -4004,9 +4004,9 @@ sisfb_setup(char *options) | |||
4004 | } else if(!strnicmp(this_opt, "tvstandard:",11)) { | 4004 | } else if(!strnicmp(this_opt, "tvstandard:",11)) { |
4005 | sisfb_search_tvstd(this_opt + 11); | 4005 | sisfb_search_tvstd(this_opt + 11); |
4006 | } else if(!strnicmp(this_opt, "mode:", 5)) { | 4006 | } else if(!strnicmp(this_opt, "mode:", 5)) { |
4007 | sisfb_search_mode(this_opt + 5, FALSE); | 4007 | sisfb_search_mode(this_opt + 5, false); |
4008 | } else if(!strnicmp(this_opt, "vesa:", 5)) { | 4008 | } else if(!strnicmp(this_opt, "vesa:", 5)) { |
4009 | sisfb_search_vesamode(simple_strtoul(this_opt + 5, NULL, 0), FALSE); | 4009 | sisfb_search_vesamode(simple_strtoul(this_opt + 5, NULL, 0), false); |
4010 | } else if(!strnicmp(this_opt, "rate:", 5)) { | 4010 | } else if(!strnicmp(this_opt, "rate:", 5)) { |
4011 | sisfb_parm_rate = simple_strtoul(this_opt + 5, NULL, 0); | 4011 | sisfb_parm_rate = simple_strtoul(this_opt + 5, NULL, 0); |
4012 | } else if(!strnicmp(this_opt, "forcecrt1:", 10)) { | 4012 | } else if(!strnicmp(this_opt, "forcecrt1:", 10)) { |
@@ -4062,7 +4062,7 @@ sisfb_setup(char *options) | |||
4062 | sisfb_lvdshl = temp; | 4062 | sisfb_lvdshl = temp; |
4063 | } | 4063 | } |
4064 | } else if(this_opt[0] >= '0' && this_opt[0] <= '9') { | 4064 | } else if(this_opt[0] >= '0' && this_opt[0] <= '9') { |
4065 | sisfb_search_mode(this_opt, TRUE); | 4065 | sisfb_search_mode(this_opt, true); |
4066 | #if !defined(__i386__) && !defined(__x86_64__) | 4066 | #if !defined(__i386__) && !defined(__x86_64__) |
4067 | } else if(!strnicmp(this_opt, "resetcard", 9)) { | 4067 | } else if(!strnicmp(this_opt, "resetcard", 9)) { |
4068 | sisfb_resetcard = 1; | 4068 | sisfb_resetcard = 1; |
@@ -4564,9 +4564,9 @@ sisfb_post_sis300(struct pci_dev *pdev) | |||
4564 | sisfb_sense_crt1(ivideo); | 4564 | sisfb_sense_crt1(ivideo); |
4565 | 4565 | ||
4566 | /* Set default mode, don't clear screen */ | 4566 | /* Set default mode, don't clear screen */ |
4567 | ivideo->SiS_Pr.SiS_UseOEM = FALSE; | 4567 | ivideo->SiS_Pr.SiS_UseOEM = false; |
4568 | SiS_SetEnableDstn(&ivideo->SiS_Pr, FALSE); | 4568 | SiS_SetEnableDstn(&ivideo->SiS_Pr, false); |
4569 | SiS_SetEnableFstn(&ivideo->SiS_Pr, FALSE); | 4569 | SiS_SetEnableFstn(&ivideo->SiS_Pr, false); |
4570 | ivideo->curFSTN = ivideo->curDSTN = 0; | 4570 | ivideo->curFSTN = ivideo->curDSTN = 0; |
4571 | ivideo->SiS_Pr.VideoMemorySize = 8 << 20; | 4571 | ivideo->SiS_Pr.VideoMemorySize = 8 << 20; |
4572 | SiSSetMode(&ivideo->SiS_Pr, 0x2e | 0x80); | 4572 | SiSSetMode(&ivideo->SiS_Pr, 0x2e | 0x80); |
@@ -5680,9 +5680,9 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5680 | } else { | 5680 | } else { |
5681 | 5681 | ||
5682 | /* Set default mode, don't clear screen */ | 5682 | /* Set default mode, don't clear screen */ |
5683 | ivideo->SiS_Pr.SiS_UseOEM = FALSE; | 5683 | ivideo->SiS_Pr.SiS_UseOEM = false; |
5684 | SiS_SetEnableDstn(&ivideo->SiS_Pr, FALSE); | 5684 | SiS_SetEnableDstn(&ivideo->SiS_Pr, false); |
5685 | SiS_SetEnableFstn(&ivideo->SiS_Pr, FALSE); | 5685 | SiS_SetEnableFstn(&ivideo->SiS_Pr, false); |
5686 | ivideo->curFSTN = ivideo->curDSTN = 0; | 5686 | ivideo->curFSTN = ivideo->curDSTN = 0; |
5687 | ivideo->SiS_Pr.VideoMemorySize = 8 << 20; | 5687 | ivideo->SiS_Pr.VideoMemorySize = 8 << 20; |
5688 | SiSSetMode(&ivideo->SiS_Pr, 0x2e | 0x80); | 5688 | SiSSetMode(&ivideo->SiS_Pr, 0x2e | 0x80); |
@@ -5723,9 +5723,9 @@ sisfb_post_xgi(struct pci_dev *pdev) | |||
5723 | } | 5723 | } |
5724 | 5724 | ||
5725 | /* Set default mode, don't clear screen */ | 5725 | /* Set default mode, don't clear screen */ |
5726 | ivideo->SiS_Pr.SiS_UseOEM = FALSE; | 5726 | ivideo->SiS_Pr.SiS_UseOEM = false; |
5727 | SiS_SetEnableDstn(&ivideo->SiS_Pr, FALSE); | 5727 | SiS_SetEnableDstn(&ivideo->SiS_Pr, false); |
5728 | SiS_SetEnableFstn(&ivideo->SiS_Pr, FALSE); | 5728 | SiS_SetEnableFstn(&ivideo->SiS_Pr, false); |
5729 | ivideo->curFSTN = ivideo->curDSTN = 0; | 5729 | ivideo->curFSTN = ivideo->curDSTN = 0; |
5730 | SiSSetMode(&ivideo->SiS_Pr, 0x2e | 0x80); | 5730 | SiSSetMode(&ivideo->SiS_Pr, 0x2e | 0x80); |
5731 | 5731 | ||
@@ -5819,7 +5819,7 @@ sisfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
5819 | ivideo->detectedpdca = 0xff; | 5819 | ivideo->detectedpdca = 0xff; |
5820 | ivideo->detectedlcda = 0xff; | 5820 | ivideo->detectedlcda = 0xff; |
5821 | 5821 | ||
5822 | ivideo->sisfb_thismonitor.datavalid = FALSE; | 5822 | ivideo->sisfb_thismonitor.datavalid = false; |
5823 | 5823 | ||
5824 | ivideo->current_base = 0; | 5824 | ivideo->current_base = 0; |
5825 | 5825 | ||
@@ -5871,21 +5871,21 @@ sisfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
5871 | 5871 | ||
5872 | ivideo->SiS_Pr.SiS_Backup70xx = 0xff; | 5872 | ivideo->SiS_Pr.SiS_Backup70xx = 0xff; |
5873 | ivideo->SiS_Pr.SiS_CHOverScan = -1; | 5873 | ivideo->SiS_Pr.SiS_CHOverScan = -1; |
5874 | ivideo->SiS_Pr.SiS_ChSW = FALSE; | 5874 | ivideo->SiS_Pr.SiS_ChSW = false; |
5875 | ivideo->SiS_Pr.SiS_UseLCDA = FALSE; | 5875 | ivideo->SiS_Pr.SiS_UseLCDA = false; |
5876 | ivideo->SiS_Pr.HaveEMI = FALSE; | 5876 | ivideo->SiS_Pr.HaveEMI = false; |
5877 | ivideo->SiS_Pr.HaveEMILCD = FALSE; | 5877 | ivideo->SiS_Pr.HaveEMILCD = false; |
5878 | ivideo->SiS_Pr.OverruleEMI = FALSE; | 5878 | ivideo->SiS_Pr.OverruleEMI = false; |
5879 | ivideo->SiS_Pr.SiS_SensibleSR11 = FALSE; | 5879 | ivideo->SiS_Pr.SiS_SensibleSR11 = false; |
5880 | ivideo->SiS_Pr.SiS_MyCR63 = 0x63; | 5880 | ivideo->SiS_Pr.SiS_MyCR63 = 0x63; |
5881 | ivideo->SiS_Pr.PDC = -1; | 5881 | ivideo->SiS_Pr.PDC = -1; |
5882 | ivideo->SiS_Pr.PDCA = -1; | 5882 | ivideo->SiS_Pr.PDCA = -1; |
5883 | ivideo->SiS_Pr.DDCPortMixup = FALSE; | 5883 | ivideo->SiS_Pr.DDCPortMixup = false; |
5884 | #ifdef CONFIG_FB_SIS_315 | 5884 | #ifdef CONFIG_FB_SIS_315 |
5885 | if(ivideo->chip >= SIS_330) { | 5885 | if(ivideo->chip >= SIS_330) { |
5886 | ivideo->SiS_Pr.SiS_MyCR63 = 0x53; | 5886 | ivideo->SiS_Pr.SiS_MyCR63 = 0x53; |
5887 | if(ivideo->chip >= SIS_661) { | 5887 | if(ivideo->chip >= SIS_661) { |
5888 | ivideo->SiS_Pr.SiS_SensibleSR11 = TRUE; | 5888 | ivideo->SiS_Pr.SiS_SensibleSR11 = true; |
5889 | } | 5889 | } |
5890 | } | 5890 | } |
5891 | #endif | 5891 | #endif |
@@ -5969,7 +5969,7 @@ sisfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
5969 | do { | 5969 | do { |
5970 | if(mychswtable[i].subsysVendor == ivideo->subsysvendor && | 5970 | if(mychswtable[i].subsysVendor == ivideo->subsysvendor && |
5971 | mychswtable[i].subsysCard == ivideo->subsysdevice) { | 5971 | mychswtable[i].subsysCard == ivideo->subsysdevice) { |
5972 | ivideo->SiS_Pr.SiS_ChSW = TRUE; | 5972 | ivideo->SiS_Pr.SiS_ChSW = true; |
5973 | printk(KERN_DEBUG "sisfb: Identified [%s %s] " | 5973 | printk(KERN_DEBUG "sisfb: Identified [%s %s] " |
5974 | "requiring Chrontel/GPIO setup\n", | 5974 | "requiring Chrontel/GPIO setup\n", |
5975 | mychswtable[i].vendorName, | 5975 | mychswtable[i].vendorName, |
@@ -6018,20 +6018,20 @@ sisfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
6018 | /* Search and copy ROM image */ | 6018 | /* Search and copy ROM image */ |
6019 | ivideo->bios_abase = NULL; | 6019 | ivideo->bios_abase = NULL; |
6020 | ivideo->SiS_Pr.VirtualRomBase = NULL; | 6020 | ivideo->SiS_Pr.VirtualRomBase = NULL; |
6021 | ivideo->SiS_Pr.UseROM = FALSE; | 6021 | ivideo->SiS_Pr.UseROM = false; |
6022 | ivideo->haveXGIROM = ivideo->SiS_Pr.SiS_XGIROM = FALSE; | 6022 | ivideo->haveXGIROM = ivideo->SiS_Pr.SiS_XGIROM = false; |
6023 | if(ivideo->sisfb_userom) { | 6023 | if(ivideo->sisfb_userom) { |
6024 | ivideo->SiS_Pr.VirtualRomBase = sisfb_find_rom(pdev); | 6024 | ivideo->SiS_Pr.VirtualRomBase = sisfb_find_rom(pdev); |
6025 | ivideo->bios_abase = ivideo->SiS_Pr.VirtualRomBase; | 6025 | ivideo->bios_abase = ivideo->SiS_Pr.VirtualRomBase; |
6026 | ivideo->SiS_Pr.UseROM = (ivideo->SiS_Pr.VirtualRomBase) ? TRUE : FALSE; | 6026 | ivideo->SiS_Pr.UseROM = (bool)(ivideo->SiS_Pr.VirtualRomBase); |
6027 | printk(KERN_INFO "sisfb: Video ROM %sfound\n", | 6027 | printk(KERN_INFO "sisfb: Video ROM %sfound\n", |
6028 | ivideo->SiS_Pr.UseROM ? "" : "not "); | 6028 | ivideo->SiS_Pr.UseROM ? "" : "not "); |
6029 | if((ivideo->SiS_Pr.UseROM) && (ivideo->chip >= XGI_20)) { | 6029 | if((ivideo->SiS_Pr.UseROM) && (ivideo->chip >= XGI_20)) { |
6030 | ivideo->SiS_Pr.UseROM = FALSE; | 6030 | ivideo->SiS_Pr.UseROM = false; |
6031 | ivideo->haveXGIROM = ivideo->SiS_Pr.SiS_XGIROM = TRUE; | 6031 | ivideo->haveXGIROM = ivideo->SiS_Pr.SiS_XGIROM = true; |
6032 | if( (ivideo->revision_id == 2) && | 6032 | if( (ivideo->revision_id == 2) && |
6033 | (!(ivideo->bios_abase[0x1d1] & 0x01)) ) { | 6033 | (!(ivideo->bios_abase[0x1d1] & 0x01)) ) { |
6034 | ivideo->SiS_Pr.DDCPortMixup = TRUE; | 6034 | ivideo->SiS_Pr.DDCPortMixup = true; |
6035 | } | 6035 | } |
6036 | } | 6036 | } |
6037 | } else { | 6037 | } else { |
@@ -6677,9 +6677,9 @@ static int __init sisfb_init_module(void) | |||
6677 | sisfb_search_tvstd(tvstandard); | 6677 | sisfb_search_tvstd(tvstandard); |
6678 | 6678 | ||
6679 | if(mode) | 6679 | if(mode) |
6680 | sisfb_search_mode(mode, FALSE); | 6680 | sisfb_search_mode(mode, false); |
6681 | else if(vesa != -1) | 6681 | else if(vesa != -1) |
6682 | sisfb_search_vesamode(vesa, FALSE); | 6682 | sisfb_search_vesamode(vesa, false); |
6683 | 6683 | ||
6684 | sisfb_crt1off = (crt1off == 0) ? 1 : 0; | 6684 | sisfb_crt1off = (crt1off == 0) ? 1 : 0; |
6685 | 6685 | ||
diff --git a/drivers/video/sis/sis_main.h b/drivers/video/sis/sis_main.h index 88e4f1e41470..3e3b7fa05d6c 100644 --- a/drivers/video/sis/sis_main.h +++ b/drivers/video/sis/sis_main.h | |||
@@ -411,54 +411,54 @@ static const struct _sis_vrate { | |||
411 | u16 xres; | 411 | u16 xres; |
412 | u16 yres; | 412 | u16 yres; |
413 | u16 refresh; | 413 | u16 refresh; |
414 | BOOLEAN SiS730valid32bpp; | 414 | bool SiS730valid32bpp; |
415 | } sisfb_vrate[] = { | 415 | } sisfb_vrate[] = { |
416 | {1, 320, 200, 70, TRUE}, | 416 | {1, 320, 200, 70, true}, |
417 | {1, 320, 240, 60, TRUE}, | 417 | {1, 320, 240, 60, true}, |
418 | {1, 400, 300, 60, TRUE}, | 418 | {1, 400, 300, 60, true}, |
419 | {1, 512, 384, 60, TRUE}, | 419 | {1, 512, 384, 60, true}, |
420 | {1, 640, 400, 72, TRUE}, | 420 | {1, 640, 400, 72, true}, |
421 | {1, 640, 480, 60, TRUE}, {2, 640, 480, 72, TRUE}, {3, 640, 480, 75, TRUE}, | 421 | {1, 640, 480, 60, true}, {2, 640, 480, 72, true}, {3, 640, 480, 75, true}, |
422 | {4, 640, 480, 85, TRUE}, {5, 640, 480, 100, TRUE}, {6, 640, 480, 120, TRUE}, | 422 | {4, 640, 480, 85, true}, {5, 640, 480, 100, true}, {6, 640, 480, 120, true}, |
423 | {7, 640, 480, 160, TRUE}, {8, 640, 480, 200, TRUE}, | 423 | {7, 640, 480, 160, true}, {8, 640, 480, 200, true}, |
424 | {1, 720, 480, 60, TRUE}, | 424 | {1, 720, 480, 60, true}, |
425 | {1, 720, 576, 58, TRUE}, | 425 | {1, 720, 576, 58, true}, |
426 | {1, 768, 576, 58, TRUE}, | 426 | {1, 768, 576, 58, true}, |
427 | {1, 800, 480, 60, TRUE}, {2, 800, 480, 75, TRUE}, {3, 800, 480, 85, TRUE}, | 427 | {1, 800, 480, 60, true}, {2, 800, 480, 75, true}, {3, 800, 480, 85, true}, |
428 | {1, 800, 600, 56, TRUE}, {2, 800, 600, 60, TRUE}, {3, 800, 600, 72, TRUE}, | 428 | {1, 800, 600, 56, true}, {2, 800, 600, 60, true}, {3, 800, 600, 72, true}, |
429 | {4, 800, 600, 75, TRUE}, {5, 800, 600, 85, TRUE}, {6, 800, 600, 105, TRUE}, | 429 | {4, 800, 600, 75, true}, {5, 800, 600, 85, true}, {6, 800, 600, 105, true}, |
430 | {7, 800, 600, 120, TRUE}, {8, 800, 600, 160, TRUE}, | 430 | {7, 800, 600, 120, true}, {8, 800, 600, 160, true}, |
431 | {1, 848, 480, 39, TRUE}, {2, 848, 480, 60, TRUE}, | 431 | {1, 848, 480, 39, true}, {2, 848, 480, 60, true}, |
432 | {1, 856, 480, 39, TRUE}, {2, 856, 480, 60, TRUE}, | 432 | {1, 856, 480, 39, true}, {2, 856, 480, 60, true}, |
433 | {1, 960, 540, 60, TRUE}, | 433 | {1, 960, 540, 60, true}, |
434 | {1, 960, 600, 60, TRUE}, | 434 | {1, 960, 600, 60, true}, |
435 | {1, 1024, 576, 60, TRUE}, {2, 1024, 576, 75, TRUE}, {3, 1024, 576, 85, TRUE}, | 435 | {1, 1024, 576, 60, true}, {2, 1024, 576, 75, true}, {3, 1024, 576, 85, true}, |
436 | {1, 1024, 600, 60, TRUE}, | 436 | {1, 1024, 600, 60, true}, |
437 | {1, 1024, 768, 43, TRUE}, {2, 1024, 768, 60, TRUE}, {3, 1024, 768, 70, FALSE}, | 437 | {1, 1024, 768, 43, true}, {2, 1024, 768, 60, true}, {3, 1024, 768, 70, false}, |
438 | {4, 1024, 768, 75, FALSE}, {5, 1024, 768, 85, TRUE}, {6, 1024, 768, 100, TRUE}, | 438 | {4, 1024, 768, 75, false}, {5, 1024, 768, 85, true}, {6, 1024, 768, 100, true}, |
439 | {7, 1024, 768, 120, TRUE}, | 439 | {7, 1024, 768, 120, true}, |
440 | {1, 1152, 768, 60, TRUE}, | 440 | {1, 1152, 768, 60, true}, |
441 | {1, 1152, 864, 60, TRUE}, {2, 1152, 864, 75, TRUE}, {3, 1152, 864, 84, TRUE}, | 441 | {1, 1152, 864, 60, true}, {2, 1152, 864, 75, true}, {3, 1152, 864, 84, true}, |
442 | {1, 1280, 720, 60, TRUE}, {2, 1280, 720, 75, TRUE}, {3, 1280, 720, 85, TRUE}, | 442 | {1, 1280, 720, 60, true}, {2, 1280, 720, 75, true}, {3, 1280, 720, 85, true}, |
443 | {1, 1280, 768, 60, TRUE}, | 443 | {1, 1280, 768, 60, true}, |
444 | {1, 1280, 800, 60, TRUE}, | 444 | {1, 1280, 800, 60, true}, |
445 | {1, 1280, 854, 60, TRUE}, | 445 | {1, 1280, 854, 60, true}, |
446 | {1, 1280, 960, 60, TRUE}, {2, 1280, 960, 85, TRUE}, | 446 | {1, 1280, 960, 60, true}, {2, 1280, 960, 85, true}, |
447 | {1, 1280, 1024, 43, TRUE}, {2, 1280, 1024, 60, TRUE}, {3, 1280, 1024, 75, TRUE}, | 447 | {1, 1280, 1024, 43, true}, {2, 1280, 1024, 60, true}, {3, 1280, 1024, 75, true}, |
448 | {4, 1280, 1024, 85, TRUE}, | 448 | {4, 1280, 1024, 85, true}, |
449 | {1, 1360, 768, 60, TRUE}, | 449 | {1, 1360, 768, 60, true}, |
450 | {1, 1360, 1024, 59, TRUE}, | 450 | {1, 1360, 1024, 59, true}, |
451 | {1, 1400, 1050, 60, TRUE}, {2, 1400, 1050, 75, TRUE}, | 451 | {1, 1400, 1050, 60, true}, {2, 1400, 1050, 75, true}, |
452 | {1, 1600, 1200, 60, TRUE}, {2, 1600, 1200, 65, TRUE}, {3, 1600, 1200, 70, TRUE}, | 452 | {1, 1600, 1200, 60, true}, {2, 1600, 1200, 65, true}, {3, 1600, 1200, 70, true}, |
453 | {4, 1600, 1200, 75, TRUE}, {5, 1600, 1200, 85, TRUE}, {6, 1600, 1200, 100, TRUE}, | 453 | {4, 1600, 1200, 75, true}, {5, 1600, 1200, 85, true}, {6, 1600, 1200, 100, true}, |
454 | {7, 1600, 1200, 120, TRUE}, | 454 | {7, 1600, 1200, 120, true}, |
455 | {1, 1680, 1050, 60, TRUE}, | 455 | {1, 1680, 1050, 60, true}, |
456 | {1, 1920, 1080, 30, TRUE}, | 456 | {1, 1920, 1080, 30, true}, |
457 | {1, 1920, 1440, 60, TRUE}, {2, 1920, 1440, 65, TRUE}, {3, 1920, 1440, 70, TRUE}, | 457 | {1, 1920, 1440, 60, true}, {2, 1920, 1440, 65, true}, {3, 1920, 1440, 70, true}, |
458 | {4, 1920, 1440, 75, TRUE}, {5, 1920, 1440, 85, TRUE}, {6, 1920, 1440, 100, TRUE}, | 458 | {4, 1920, 1440, 75, true}, {5, 1920, 1440, 85, true}, {6, 1920, 1440, 100, true}, |
459 | {1, 2048, 1536, 60, TRUE}, {2, 2048, 1536, 65, TRUE}, {3, 2048, 1536, 70, TRUE}, | 459 | {1, 2048, 1536, 60, true}, {2, 2048, 1536, 65, true}, {3, 2048, 1536, 70, true}, |
460 | {4, 2048, 1536, 75, TRUE}, {5, 2048, 1536, 85, TRUE}, | 460 | {4, 2048, 1536, 75, true}, {5, 2048, 1536, 85, true}, |
461 | {0, 0, 0, 0, FALSE} | 461 | {0, 0, 0, 0, false} |
462 | }; | 462 | }; |
463 | 463 | ||
464 | static struct _sisfbddcsmodes { | 464 | static struct _sisfbddcsmodes { |
@@ -691,7 +691,7 @@ extern int sisfb_initaccel(struct sis_video_info *ivideo); | |||
691 | extern void sisfb_syncaccel(struct sis_video_info *ivideo); | 691 | extern void sisfb_syncaccel(struct sis_video_info *ivideo); |
692 | 692 | ||
693 | /* Internal general routines */ | 693 | /* Internal general routines */ |
694 | static void sisfb_search_mode(char *name, BOOLEAN quiet); | 694 | static void sisfb_search_mode(char *name, bool quiet); |
695 | static int sisfb_validate_mode(struct sis_video_info *ivideo, int modeindex, u32 vbflags); | 695 | static int sisfb_validate_mode(struct sis_video_info *ivideo, int modeindex, u32 vbflags); |
696 | static u8 sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate, | 696 | static u8 sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate, |
697 | int index); | 697 | int index); |
@@ -702,10 +702,10 @@ static int sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive, | |||
702 | struct fb_info *info); | 702 | struct fb_info *info); |
703 | static void sisfb_pre_setmode(struct sis_video_info *ivideo); | 703 | static void sisfb_pre_setmode(struct sis_video_info *ivideo); |
704 | static void sisfb_post_setmode(struct sis_video_info *ivideo); | 704 | static void sisfb_post_setmode(struct sis_video_info *ivideo); |
705 | static BOOLEAN sisfb_CheckVBRetrace(struct sis_video_info *ivideo); | 705 | static bool sisfb_CheckVBRetrace(struct sis_video_info *ivideo); |
706 | static BOOLEAN sisfbcheckvretracecrt2(struct sis_video_info *ivideo); | 706 | static bool sisfbcheckvretracecrt2(struct sis_video_info *ivideo); |
707 | static BOOLEAN sisfbcheckvretracecrt1(struct sis_video_info *ivideo); | 707 | static bool sisfbcheckvretracecrt1(struct sis_video_info *ivideo); |
708 | static BOOLEAN sisfb_bridgeisslave(struct sis_video_info *ivideo); | 708 | static bool sisfb_bridgeisslave(struct sis_video_info *ivideo); |
709 | static void sisfb_detect_VB_connect(struct sis_video_info *ivideo); | 709 | static void sisfb_detect_VB_connect(struct sis_video_info *ivideo); |
710 | static void sisfb_get_VB_type(struct sis_video_info *ivideo); | 710 | static void sisfb_get_VB_type(struct sis_video_info *ivideo); |
711 | static void sisfb_set_TVxposoffset(struct sis_video_info *ivideo, int val); | 711 | static void sisfb_set_TVxposoffset(struct sis_video_info *ivideo, int val); |
@@ -737,20 +737,20 @@ static void sisfb_free_node(struct SIS_HEAP *memheap, struct SIS_OH *poh); | |||
737 | 737 | ||
738 | /* Routines from init.c/init301.c */ | 738 | /* Routines from init.c/init301.c */ |
739 | extern unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, | 739 | extern unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, |
740 | int VDisplay, int Depth, BOOLEAN FSTN, unsigned short CustomT, | 740 | int VDisplay, int Depth, bool FSTN, unsigned short CustomT, |
741 | int LCDwith, int LCDheight, unsigned int VBFlags2); | 741 | int LCDwith, int LCDheight, unsigned int VBFlags2); |
742 | extern unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay, | 742 | extern unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay, |
743 | int VDisplay, int Depth, unsigned int VBFlags2); | 743 | int VDisplay, int Depth, unsigned int VBFlags2); |
744 | extern unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay, | 744 | extern unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay, |
745 | int VDisplay, int Depth, unsigned int VBFlags2); | 745 | int VDisplay, int Depth, unsigned int VBFlags2); |
746 | extern void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr); | 746 | extern void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr); |
747 | extern BOOLEAN SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo); | 747 | extern bool SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo); |
748 | extern void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable); | 748 | extern void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable); |
749 | extern void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable); | 749 | extern void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable); |
750 | 750 | ||
751 | extern BOOLEAN SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr); | 751 | extern bool SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr); |
752 | 752 | ||
753 | extern BOOLEAN sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, | 753 | extern bool sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, |
754 | int *htotal, int *vtotal, unsigned char rateindex); | 754 | int *htotal, int *vtotal, unsigned char rateindex); |
755 | extern int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr, | 755 | extern int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr, |
756 | unsigned char modeno, unsigned char rateindex); | 756 | unsigned char modeno, unsigned char rateindex); |
diff --git a/drivers/video/sis/vgatypes.h b/drivers/video/sis/vgatypes.h index 05d08b7889a1..b532fbd2b04c 100644 --- a/drivers/video/sis/vgatypes.h +++ b/drivers/video/sis/vgatypes.h | |||
@@ -57,18 +57,6 @@ | |||
57 | #include <linux/version.h> | 57 | #include <linux/version.h> |
58 | #endif | 58 | #endif |
59 | 59 | ||
60 | #ifndef FALSE | ||
61 | #define FALSE 0 | ||
62 | #endif | ||
63 | |||
64 | #ifndef TRUE | ||
65 | #define TRUE 1 | ||
66 | #endif | ||
67 | |||
68 | #ifndef BOOLEAN | ||
69 | typedef unsigned int BOOLEAN; | ||
70 | #endif | ||
71 | |||
72 | #define SISIOMEMTYPE | 60 | #define SISIOMEMTYPE |
73 | 61 | ||
74 | #ifdef SIS_LINUX_KERNEL | 62 | #ifdef SIS_LINUX_KERNEL |
diff --git a/drivers/video/sis/vstruct.h b/drivers/video/sis/vstruct.h index 9ae32923c142..705c85360526 100644 --- a/drivers/video/sis/vstruct.h +++ b/drivers/video/sis/vstruct.h | |||
@@ -240,7 +240,7 @@ struct SiS_Private | |||
240 | void *ivideo; | 240 | void *ivideo; |
241 | #endif | 241 | #endif |
242 | unsigned char *VirtualRomBase; | 242 | unsigned char *VirtualRomBase; |
243 | BOOLEAN UseROM; | 243 | bool UseROM; |
244 | #ifdef SIS_LINUX_KERNEL | 244 | #ifdef SIS_LINUX_KERNEL |
245 | unsigned char SISIOMEMTYPE *VideoMemoryAddress; | 245 | unsigned char SISIOMEMTYPE *VideoMemoryAddress; |
246 | unsigned int VideoMemorySize; | 246 | unsigned int VideoMemorySize; |
@@ -283,24 +283,24 @@ struct SiS_Private | |||
283 | #ifdef SIS_XORG_XF86 | 283 | #ifdef SIS_XORG_XF86 |
284 | unsigned short SiS_CP1, SiS_CP2, SiS_CP3, SiS_CP4; | 284 | unsigned short SiS_CP1, SiS_CP2, SiS_CP3, SiS_CP4; |
285 | #endif | 285 | #endif |
286 | BOOLEAN SiS_UseROM; | 286 | bool SiS_UseROM; |
287 | BOOLEAN SiS_ROMNew; | 287 | bool SiS_ROMNew; |
288 | BOOLEAN SiS_XGIROM; | 288 | bool SiS_XGIROM; |
289 | BOOLEAN SiS_NeedRomModeData; | 289 | bool SiS_NeedRomModeData; |
290 | BOOLEAN PanelSelfDetected; | 290 | bool PanelSelfDetected; |
291 | BOOLEAN DDCPortMixup; | 291 | bool DDCPortMixup; |
292 | int SiS_CHOverScan; | 292 | int SiS_CHOverScan; |
293 | BOOLEAN SiS_CHSOverScan; | 293 | bool SiS_CHSOverScan; |
294 | BOOLEAN SiS_ChSW; | 294 | bool SiS_ChSW; |
295 | BOOLEAN SiS_UseLCDA; | 295 | bool SiS_UseLCDA; |
296 | int SiS_UseOEM; | 296 | int SiS_UseOEM; |
297 | unsigned int SiS_CustomT; | 297 | unsigned int SiS_CustomT; |
298 | int SiS_UseWide, SiS_UseWideCRT2; | 298 | int SiS_UseWide, SiS_UseWideCRT2; |
299 | int SiS_TVBlue; | 299 | int SiS_TVBlue; |
300 | unsigned short SiS_Backup70xx; | 300 | unsigned short SiS_Backup70xx; |
301 | BOOLEAN HaveEMI; | 301 | bool HaveEMI; |
302 | BOOLEAN HaveEMILCD; | 302 | bool HaveEMILCD; |
303 | BOOLEAN OverruleEMI; | 303 | bool OverruleEMI; |
304 | unsigned char EMI_30,EMI_31,EMI_32,EMI_33; | 304 | unsigned char EMI_30,EMI_31,EMI_32,EMI_33; |
305 | unsigned short SiS_EMIOffset; | 305 | unsigned short SiS_EMIOffset; |
306 | unsigned short SiS_PWDOffset; | 306 | unsigned short SiS_PWDOffset; |
@@ -352,7 +352,7 @@ struct SiS_Private | |||
352 | unsigned short SiS_DDC_ReadAddr; | 352 | unsigned short SiS_DDC_ReadAddr; |
353 | unsigned short SiS_DDC_SecAddr; | 353 | unsigned short SiS_DDC_SecAddr; |
354 | unsigned short SiS_ChrontelInit; | 354 | unsigned short SiS_ChrontelInit; |
355 | BOOLEAN SiS_SensibleSR11; | 355 | bool SiS_SensibleSR11; |
356 | unsigned short SiS661LCD2TableSize; | 356 | unsigned short SiS661LCD2TableSize; |
357 | 357 | ||
358 | unsigned short SiS_PanelMinLVDS; | 358 | unsigned short SiS_PanelMinLVDS; |
@@ -494,10 +494,10 @@ struct SiS_Private | |||
494 | unsigned short PanelVRS, PanelVRE; | 494 | unsigned short PanelVRS, PanelVRE; |
495 | unsigned short PanelVCLKIdx300; | 495 | unsigned short PanelVCLKIdx300; |
496 | unsigned short PanelVCLKIdx315; | 496 | unsigned short PanelVCLKIdx315; |
497 | BOOLEAN Alternate1600x1200; | 497 | bool Alternate1600x1200; |
498 | 498 | ||
499 | BOOLEAN UseCustomMode; | 499 | bool UseCustomMode; |
500 | BOOLEAN CRT1UsesCustomMode; | 500 | bool CRT1UsesCustomMode; |
501 | unsigned short CHDisplay; | 501 | unsigned short CHDisplay; |
502 | unsigned short CHSyncStart; | 502 | unsigned short CHSyncStart; |
503 | unsigned short CHSyncEnd; | 503 | unsigned short CHSyncEnd; |
@@ -523,7 +523,7 @@ struct SiS_Private | |||
523 | 523 | ||
524 | int LVDSHL; | 524 | int LVDSHL; |
525 | 525 | ||
526 | BOOLEAN Backup; | 526 | bool Backup; |
527 | unsigned char Backup_Mode; | 527 | unsigned char Backup_Mode; |
528 | unsigned char Backup_14; | 528 | unsigned char Backup_14; |
529 | unsigned char Backup_15; | 529 | unsigned char Backup_15; |
@@ -542,12 +542,12 @@ struct SiS_Private | |||
542 | int CenterScreen; | 542 | int CenterScreen; |
543 | 543 | ||
544 | unsigned short CP_Vendor, CP_Product; | 544 | unsigned short CP_Vendor, CP_Product; |
545 | BOOLEAN CP_HaveCustomData; | 545 | bool CP_HaveCustomData; |
546 | int CP_PreferredX, CP_PreferredY, CP_PreferredIndex; | 546 | int CP_PreferredX, CP_PreferredY, CP_PreferredIndex; |
547 | int CP_MaxX, CP_MaxY, CP_MaxClock; | 547 | int CP_MaxX, CP_MaxY, CP_MaxClock; |
548 | unsigned char CP_PrefSR2B, CP_PrefSR2C; | 548 | unsigned char CP_PrefSR2B, CP_PrefSR2C; |
549 | unsigned short CP_PrefClock; | 549 | unsigned short CP_PrefClock; |
550 | BOOLEAN CP_Supports64048075; | 550 | bool CP_Supports64048075; |
551 | int CP_HDisplay[7], CP_VDisplay[7]; /* For Custom LCD panel dimensions */ | 551 | int CP_HDisplay[7], CP_VDisplay[7]; /* For Custom LCD panel dimensions */ |
552 | int CP_HTotal[7], CP_VTotal[7]; | 552 | int CP_HTotal[7], CP_VTotal[7]; |
553 | int CP_HSyncStart[7], CP_VSyncStart[7]; | 553 | int CP_HSyncStart[7], CP_VSyncStart[7]; |
@@ -555,8 +555,8 @@ struct SiS_Private | |||
555 | int CP_HBlankStart[7], CP_VBlankStart[7]; | 555 | int CP_HBlankStart[7], CP_VBlankStart[7]; |
556 | int CP_HBlankEnd[7], CP_VBlankEnd[7]; | 556 | int CP_HBlankEnd[7], CP_VBlankEnd[7]; |
557 | int CP_Clock[7]; | 557 | int CP_Clock[7]; |
558 | BOOLEAN CP_DataValid[7]; | 558 | bool CP_DataValid[7]; |
559 | BOOLEAN CP_HSync_P[7], CP_VSync_P[7], CP_SyncValid[7]; | 559 | bool CP_HSync_P[7], CP_VSync_P[7], CP_SyncValid[7]; |
560 | }; | 560 | }; |
561 | 561 | ||
562 | #endif | 562 | #endif |
diff --git a/drivers/video/sun3fb.c b/drivers/video/sun3fb.c deleted file mode 100644 index f80356dfa8e8..000000000000 --- a/drivers/video/sun3fb.c +++ /dev/null | |||
@@ -1,702 +0,0 @@ | |||
1 | /* | ||
2 | * linux/drivers/video/sun3fb.c -- Frame buffer driver for Sun3 | ||
3 | * | ||
4 | * (C) 1998 Thomas Bogendoerfer | ||
5 | * | ||
6 | * This driver is bases on sbusfb.c, which is | ||
7 | * | ||
8 | * Copyright (C) 1998 Jakub Jelinek | ||
9 | * | ||
10 | * This driver is partly based on the Open Firmware console driver | ||
11 | * | ||
12 | * Copyright (C) 1997 Geert Uytterhoeven | ||
13 | * | ||
14 | * and SPARC console subsystem | ||
15 | * | ||
16 | * Copyright (C) 1995 Peter Zaitcev (zaitcev@yahoo.com) | ||
17 | * Copyright (C) 1995-1997 David S. Miller (davem@caip.rutgers.edu) | ||
18 | * Copyright (C) 1995-1996 Miguel de Icaza (miguel@nuclecu.unam.mx) | ||
19 | * Copyright (C) 1996 Dave Redman (djhr@tadpole.co.uk) | ||
20 | * Copyright (C) 1996-1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) | ||
21 | * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) | ||
22 | * | ||
23 | * This file is subject to the terms and conditions of the GNU General Public | ||
24 | * License. See the file COPYING in the main directory of this archive for | ||
25 | * more details. | ||
26 | */ | ||
27 | |||
28 | #include <linux/module.h> | ||
29 | #include <linux/kernel.h> | ||
30 | #include <linux/errno.h> | ||
31 | #include <linux/string.h> | ||
32 | #include <linux/mm.h> | ||
33 | #include <linux/slab.h> | ||
34 | #include <linux/vmalloc.h> | ||
35 | #include <linux/delay.h> | ||
36 | #include <linux/interrupt.h> | ||
37 | #include <linux/fb.h> | ||
38 | #include <linux/selection.h> | ||
39 | #include <linux/init.h> | ||
40 | #include <linux/console.h> | ||
41 | #include <linux/kd.h> | ||
42 | #include <linux/vt_kern.h> | ||
43 | |||
44 | #include <asm/uaccess.h> | ||
45 | #include <asm/pgtable.h> /* io_remap_page_range() */ | ||
46 | |||
47 | #ifdef CONFIG_SUN3 | ||
48 | #include <asm/oplib.h> | ||
49 | #include <asm/machines.h> | ||
50 | #include <asm/idprom.h> | ||
51 | |||
52 | #define CGFOUR_OBMEM_ADDR 0x1f300000 | ||
53 | #define BWTWO_OBMEM_ADDR 0x1f000000 | ||
54 | #define BWTWO_OBMEM50_ADDR 0x00100000 | ||
55 | |||
56 | #endif | ||
57 | #ifdef CONFIG_SUN3X | ||
58 | #include <asm/sun3x.h> | ||
59 | #endif | ||
60 | #include <video/sbusfb.h> | ||
61 | |||
62 | #define DEFAULT_CURSOR_BLINK_RATE (2*HZ/5) | ||
63 | |||
64 | #define CURSOR_SHAPE 1 | ||
65 | #define CURSOR_BLINK 2 | ||
66 | |||
67 | #define mymemset(x,y) memset(x,0,y) | ||
68 | |||
69 | /* | ||
70 | * Interface used by the world | ||
71 | */ | ||
72 | |||
73 | int sun3fb_init(void); | ||
74 | void sun3fb_setup(char *options); | ||
75 | |||
76 | static char fontname[40] __initdata = { 0 }; | ||
77 | static int curblink __initdata = 1; | ||
78 | |||
79 | static int sun3fb_get_fix(struct fb_fix_screeninfo *fix, int con, | ||
80 | struct fb_info *info); | ||
81 | static int sun3fb_get_var(struct fb_var_screeninfo *var, int con, | ||
82 | struct fb_info *info); | ||
83 | static int sun3fb_set_var(struct fb_var_screeninfo *var, int con, | ||
84 | struct fb_info *info); | ||
85 | static int sun3fb_get_cmap(struct fb_cmap *cmap, int kspc, int con, | ||
86 | struct fb_info *info); | ||
87 | static int sun3fb_set_cmap(struct fb_cmap *cmap, int kspc, int con, | ||
88 | struct fb_info *info); | ||
89 | static int sun3fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | ||
90 | u_int transp, struct fb_info *info); | ||
91 | static int sun3fb_blank(int blank, struct fb_info *info); | ||
92 | static void sun3fb_cursor(struct display *p, int mode, int x, int y); | ||
93 | static void sun3fb_clear_margin(struct display *p, int s); | ||
94 | |||
95 | /* | ||
96 | * Interface to the low level console driver | ||
97 | */ | ||
98 | |||
99 | static int sun3fbcon_switch(int con, struct fb_info *info); | ||
100 | static int sun3fbcon_updatevar(int con, struct fb_info *info); | ||
101 | |||
102 | /* | ||
103 | * Internal routines | ||
104 | */ | ||
105 | |||
106 | static int sun3fb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, | ||
107 | u_int *transp, struct fb_info *info); | ||
108 | |||
109 | static struct fb_ops sun3fb_ops = { | ||
110 | .owner = THIS_MODULE, | ||
111 | .fb_get_fix = sun3fb_get_fix, | ||
112 | .fb_get_var = sun3fb_get_var, | ||
113 | .fb_set_var = sun3fb_set_var, | ||
114 | .fb_get_cmap = sun3fb_get_cmap, | ||
115 | .fb_set_cmap = sun3fb_set_cmap, | ||
116 | .fb_setcolreg = sun3fb_setcolreg, | ||
117 | .fb_blank = sun3fb_blank, | ||
118 | }; | ||
119 | |||
120 | static void sun3fb_clear_margin(struct display *p, int s) | ||
121 | { | ||
122 | struct fb_info_sbusfb *fb = sbusfbinfod(p); | ||
123 | |||
124 | return; | ||
125 | |||
126 | if (fb->switch_from_graph) | ||
127 | (*fb->switch_from_graph)(fb); | ||
128 | if (fb->fill) { | ||
129 | unsigned short rects [16]; | ||
130 | |||
131 | rects [0] = 0; | ||
132 | rects [1] = 0; | ||
133 | rects [2] = fb->var.xres_virtual; | ||
134 | rects [3] = fb->y_margin; | ||
135 | rects [4] = 0; | ||
136 | rects [5] = fb->y_margin; | ||
137 | rects [6] = fb->x_margin; | ||
138 | rects [7] = fb->var.yres_virtual; | ||
139 | rects [8] = fb->var.xres_virtual - fb->x_margin; | ||
140 | rects [9] = fb->y_margin; | ||
141 | rects [10] = fb->var.xres_virtual; | ||
142 | rects [11] = fb->var.yres_virtual; | ||
143 | rects [12] = fb->x_margin; | ||
144 | rects [13] = fb->var.yres_virtual - fb->y_margin; | ||
145 | rects [14] = fb->var.xres_virtual - fb->x_margin; | ||
146 | rects [15] = fb->var.yres_virtual; | ||
147 | (*fb->fill)(fb, p, s, 4, rects); | ||
148 | } else { | ||
149 | unsigned char *fb_base = fb->info.screen_base, *q; | ||
150 | int skip_bytes = fb->y_margin * fb->var.xres_virtual; | ||
151 | int scr_size = fb->var.xres_virtual * fb->var.yres_virtual; | ||
152 | int h, he, incr, size; | ||
153 | |||
154 | he = fb->var.yres; | ||
155 | if (fb->var.bits_per_pixel == 1) { | ||
156 | fb_base -= (skip_bytes + fb->x_margin) / 8; | ||
157 | skip_bytes /= 8; | ||
158 | scr_size /= 8; | ||
159 | mymemset (fb_base, skip_bytes - fb->x_margin / 8); | ||
160 | mymemset (fb_base + scr_size - skip_bytes + fb->x_margin / 8, skip_bytes - fb->x_margin / 8); | ||
161 | incr = fb->var.xres_virtual / 8; | ||
162 | size = fb->x_margin / 8 * 2; | ||
163 | for (q = fb_base + skip_bytes - fb->x_margin / 8, h = 0; | ||
164 | h <= he; q += incr, h++) | ||
165 | mymemset (q, size); | ||
166 | } else { | ||
167 | fb_base -= (skip_bytes + fb->x_margin); | ||
168 | memset (fb_base, attr_bgcol(p,s), skip_bytes - fb->x_margin); | ||
169 | memset (fb_base + scr_size - skip_bytes + fb->x_margin, attr_bgcol(p,s), skip_bytes - fb->x_margin); | ||
170 | incr = fb->var.xres_virtual; | ||
171 | size = fb->x_margin * 2; | ||
172 | for (q = fb_base + skip_bytes - fb->x_margin, h = 0; | ||
173 | h <= he; q += incr, h++) | ||
174 | memset (q, attr_bgcol(p,s), size); | ||
175 | } | ||
176 | } | ||
177 | } | ||
178 | |||
179 | static void sun3fb_disp_setup(struct display *p) | ||
180 | { | ||
181 | struct fb_info_sbusfb *fb = sbusfbinfod(p); | ||
182 | |||
183 | if (fb->setup) | ||
184 | fb->setup(p); | ||
185 | sun3fb_clear_margin(p, 0); | ||
186 | } | ||
187 | |||
188 | /* | ||
189 | * Get the Fixed Part of the Display | ||
190 | */ | ||
191 | |||
192 | static int sun3fb_get_fix(struct fb_fix_screeninfo *fix, int con, | ||
193 | struct fb_info *info) | ||
194 | { | ||
195 | struct fb_info_sbusfb *fb = sbusfbinfo(info); | ||
196 | |||
197 | memcpy(fix, &fb->fix, sizeof(struct fb_fix_screeninfo)); | ||
198 | return 0; | ||
199 | } | ||
200 | |||
201 | /* | ||
202 | * Get the User Defined Part of the Display | ||
203 | */ | ||
204 | |||
205 | static int sun3fb_get_var(struct fb_var_screeninfo *var, int con, | ||
206 | struct fb_info *info) | ||
207 | { | ||
208 | struct fb_info_sbusfb *fb = sbusfbinfo(info); | ||
209 | |||
210 | memcpy(var, &fb->var, sizeof(struct fb_var_screeninfo)); | ||
211 | return 0; | ||
212 | } | ||
213 | |||
214 | /* | ||
215 | * Set the User Defined Part of the Display | ||
216 | */ | ||
217 | |||
218 | static int sun3fb_set_var(struct fb_var_screeninfo *var, int con, | ||
219 | struct fb_info *info) | ||
220 | { | ||
221 | struct fb_info_sbusfb *fb = sbusfbinfo(info); | ||
222 | |||
223 | if (var->xres > fb->var.xres || var->yres > fb->var.yres || | ||
224 | var->xres_virtual > fb->var.xres_virtual || | ||
225 | var->yres_virtual > fb->var.yres_virtual || | ||
226 | var->bits_per_pixel != fb->var.bits_per_pixel || | ||
227 | var->nonstd || | ||
228 | (var->vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED) | ||
229 | return -EINVAL; | ||
230 | memcpy(var, &fb->var, sizeof(struct fb_var_screeninfo)); | ||
231 | return 0; | ||
232 | } | ||
233 | |||
234 | /* | ||
235 | * Hardware cursor | ||
236 | */ | ||
237 | |||
238 | static unsigned char hw_cursor_cmap[2] = { 0, 0xff }; | ||
239 | |||
240 | static void | ||
241 | sun3fb_cursor_timer_handler(unsigned long dev_addr) | ||
242 | { | ||
243 | struct fb_info_sbusfb *fb = (struct fb_info_sbusfb *)dev_addr; | ||
244 | |||
245 | if (!fb->setcursor) return; | ||
246 | |||
247 | if (fb->cursor.mode & CURSOR_BLINK) { | ||
248 | fb->cursor.enable ^= 1; | ||
249 | fb->setcursor(fb); | ||
250 | } | ||
251 | |||
252 | fb->cursor.timer.expires = jiffies + fb->cursor.blink_rate; | ||
253 | add_timer(&fb->cursor.timer); | ||
254 | } | ||
255 | |||
256 | static void sun3fb_cursor(struct display *p, int mode, int x, int y) | ||
257 | { | ||
258 | struct fb_info_sbusfb *fb = sbusfbinfod(p); | ||
259 | |||
260 | switch (mode) { | ||
261 | case CM_ERASE: | ||
262 | fb->cursor.mode &= ~CURSOR_BLINK; | ||
263 | fb->cursor.enable = 0; | ||
264 | (*fb->setcursor)(fb); | ||
265 | break; | ||
266 | |||
267 | case CM_MOVE: | ||
268 | case CM_DRAW: | ||
269 | if (fb->cursor.mode & CURSOR_SHAPE) { | ||
270 | fb->cursor.size.fbx = fontwidth(p); | ||
271 | fb->cursor.size.fby = fontheight(p); | ||
272 | fb->cursor.chot.fbx = 0; | ||
273 | fb->cursor.chot.fby = 0; | ||
274 | fb->cursor.enable = 1; | ||
275 | memset (fb->cursor.bits, 0, sizeof (fb->cursor.bits)); | ||
276 | fb->cursor.bits[0][fontheight(p) - 2] = (0xffffffff << (32 - fontwidth(p))); | ||
277 | fb->cursor.bits[1][fontheight(p) - 2] = (0xffffffff << (32 - fontwidth(p))); | ||
278 | fb->cursor.bits[0][fontheight(p) - 1] = (0xffffffff << (32 - fontwidth(p))); | ||
279 | fb->cursor.bits[1][fontheight(p) - 1] = (0xffffffff << (32 - fontwidth(p))); | ||
280 | (*fb->setcursormap) (fb, hw_cursor_cmap, hw_cursor_cmap, hw_cursor_cmap); | ||
281 | (*fb->setcurshape) (fb); | ||
282 | } | ||
283 | fb->cursor.mode = CURSOR_BLINK; | ||
284 | if (fontwidthlog(p)) | ||
285 | fb->cursor.cpos.fbx = (x << fontwidthlog(p)) + fb->x_margin; | ||
286 | else | ||
287 | fb->cursor.cpos.fbx = (x * fontwidth(p)) + fb->x_margin; | ||
288 | if (fontheightlog(p)) | ||
289 | fb->cursor.cpos.fby = (y << fontheightlog(p)) + fb->y_margin; | ||
290 | else | ||
291 | fb->cursor.cpos.fby = (y * fontheight(p)) + fb->y_margin; | ||
292 | (*fb->setcursor)(fb); | ||
293 | break; | ||
294 | } | ||
295 | } | ||
296 | |||
297 | /* | ||
298 | * Get the Colormap | ||
299 | */ | ||
300 | |||
301 | static int sun3fb_get_cmap(struct fb_cmap *cmap, int kspc, int con, | ||
302 | struct fb_info *info) | ||
303 | { | ||
304 | if (con == info->currcon) /* current console? */ | ||
305 | return fb_get_cmap(cmap, kspc, sun3fb_getcolreg, info); | ||
306 | else if (fb_display[con].cmap.len) /* non default colormap? */ | ||
307 | fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2); | ||
308 | else | ||
309 | fb_copy_cmap(fb_default_cmap(1<<fb_display[con].var.bits_per_pixel), cmap, kspc ? 0 : 2); | ||
310 | return 0; | ||
311 | } | ||
312 | |||
313 | /* | ||
314 | * Set the Colormap | ||
315 | */ | ||
316 | |||
317 | static int sun3fb_set_cmap(struct fb_cmap *cmap, int kspc, int con, | ||
318 | struct fb_info *info) | ||
319 | { | ||
320 | int err; | ||
321 | |||
322 | if (!fb_display[con].cmap.len) { /* no colormap allocated? */ | ||
323 | if ((err = fb_alloc_cmap(&fb_display[con].cmap, 1<<fb_display[con].var.bits_per_pixel, 0))) | ||
324 | return err; | ||
325 | } | ||
326 | if (con == info->currcon) { /* current console? */ | ||
327 | err = fb_set_cmap(cmap, kspc, info); | ||
328 | if (!err) { | ||
329 | struct fb_info_sbusfb *fb = sbusfbinfo(info); | ||
330 | |||
331 | if (fb->loadcmap) | ||
332 | (*fb->loadcmap)(fb, &fb_display[con], cmap->start, cmap->len); | ||
333 | } | ||
334 | return err; | ||
335 | } else | ||
336 | fb_copy_cmap(cmap, &fb_display[con].cmap, kspc ? 0 : 1); | ||
337 | return 0; | ||
338 | } | ||
339 | |||
340 | /* | ||
341 | * Setup: parse used options | ||
342 | */ | ||
343 | |||
344 | void __init sun3fb_setup(char *options) | ||
345 | { | ||
346 | char *p; | ||
347 | |||
348 | for (p = options;;) { | ||
349 | if (!strncmp(p, "font=", 5)) { | ||
350 | int i; | ||
351 | |||
352 | for (i = 0; i < sizeof(fontname) - 1; i++) | ||
353 | if (p[i+5] == ' ' || !p[i+5]) | ||
354 | break; | ||
355 | memcpy(fontname, p+5, i); | ||
356 | fontname[i] = 0; | ||
357 | } else if (!strncmp(p, "noblink", 7)) | ||
358 | curblink = 0; | ||
359 | while (*p && *p != ' ' && *p != ',') p++; | ||
360 | if (*p != ',') break; | ||
361 | p++; | ||
362 | } | ||
363 | |||
364 | return; | ||
365 | } | ||
366 | |||
367 | static int sun3fbcon_switch(int con, struct fb_info *info) | ||
368 | { | ||
369 | int x_margin, y_margin; | ||
370 | struct fb_info_sbusfb *fb = sbusfbinfo(info); | ||
371 | int lastconsole; | ||
372 | |||
373 | /* Do we have to save the colormap? */ | ||
374 | if (fb_display[info->currcon].cmap.len) | ||
375 | fb_get_cmap(&fb_display[info->currcon].cmap, 1, sun3fb_getcolreg, info); | ||
376 | |||
377 | if (info->display_fg) { | ||
378 | lastconsole = info->display_fg->vc_num; | ||
379 | if (lastconsole != con && | ||
380 | (fontwidth(&fb_display[lastconsole]) != fontwidth(&fb_display[con]) || | ||
381 | fontheight(&fb_display[lastconsole]) != fontheight(&fb_display[con]))) | ||
382 | fb->cursor.mode |= CURSOR_SHAPE; | ||
383 | } | ||
384 | x_margin = (fb_display[con].var.xres_virtual - fb_display[con].var.xres) / 2; | ||
385 | y_margin = (fb_display[con].var.yres_virtual - fb_display[con].var.yres) / 2; | ||
386 | if (fb->margins) | ||
387 | fb->margins(fb, &fb_display[con], x_margin, y_margin); | ||
388 | if (fb->graphmode || fb->x_margin != x_margin || fb->y_margin != y_margin) { | ||
389 | fb->x_margin = x_margin; fb->y_margin = y_margin; | ||
390 | sun3fb_clear_margin(&fb_display[con], 0); | ||
391 | } | ||
392 | info->currcon = con; | ||
393 | /* Install new colormap */ | ||
394 | do_install_cmap(con, info); | ||
395 | return 0; | ||
396 | } | ||
397 | |||
398 | /* | ||
399 | * Update the `var' structure (called by fbcon.c) | ||
400 | */ | ||
401 | |||
402 | static int sun3fbcon_updatevar(int con, struct fb_info *info) | ||
403 | { | ||
404 | /* Nothing */ | ||
405 | return 0; | ||
406 | } | ||
407 | |||
408 | /* | ||
409 | * Blank the display. | ||
410 | */ | ||
411 | |||
412 | static int sun3fb_blank(int blank, struct fb_info *info) | ||
413 | { | ||
414 | struct fb_info_sbusfb *fb = sbusfbinfo(info); | ||
415 | |||
416 | if (blank && fb->blank) | ||
417 | return fb->blank(fb); | ||
418 | else if (!blank && fb->unblank) | ||
419 | return fb->unblank(fb); | ||
420 | return 0; | ||
421 | } | ||
422 | |||
423 | /* | ||
424 | * Read a single color register and split it into | ||
425 | * colors/transparent. Return != 0 for invalid regno. | ||
426 | */ | ||
427 | |||
428 | static int sun3fb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, | ||
429 | u_int *transp, struct fb_info *info) | ||
430 | { | ||
431 | struct fb_info_sbusfb *fb = sbusfbinfo(info); | ||
432 | |||
433 | if (!fb->color_map || regno > 255) | ||
434 | return 1; | ||
435 | *red = (fb->color_map CM(regno, 0)<<8) | fb->color_map CM(regno, 0); | ||
436 | *green = (fb->color_map CM(regno, 1)<<8) | fb->color_map CM(regno, 1); | ||
437 | *blue = (fb->color_map CM(regno, 2)<<8) | fb->color_map CM(regno, 2); | ||
438 | *transp = 0; | ||
439 | return 0; | ||
440 | } | ||
441 | |||
442 | |||
443 | /* | ||
444 | * Set a single color register. The values supplied are already | ||
445 | * rounded down to the hardware's capabilities (according to the | ||
446 | * entries in the var structure). Return != 0 for invalid regno. | ||
447 | */ | ||
448 | |||
449 | static int sun3fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | ||
450 | u_int transp, struct fb_info *info) | ||
451 | { | ||
452 | struct fb_info_sbusfb *fb = sbusfbinfo(info); | ||
453 | |||
454 | if (!fb->color_map || regno > 255) | ||
455 | return 1; | ||
456 | red >>= 8; | ||
457 | green >>= 8; | ||
458 | blue >>= 8; | ||
459 | fb->color_map CM(regno, 0) = red; | ||
460 | fb->color_map CM(regno, 1) = green; | ||
461 | fb->color_map CM(regno, 2) = blue; | ||
462 | return 0; | ||
463 | } | ||
464 | |||
465 | static int sun3fb_set_font(struct display *p, int width, int height) | ||
466 | { | ||
467 | int w = p->var.xres_virtual, h = p->var.yres_virtual; | ||
468 | int depth = p->var.bits_per_pixel; | ||
469 | struct fb_info_sbusfb *fb = sbusfbinfod(p); | ||
470 | int x_margin, y_margin; | ||
471 | |||
472 | if (depth > 8) depth = 8; | ||
473 | x_margin = (w % width) / 2; | ||
474 | y_margin = (h % height) / 2; | ||
475 | |||
476 | p->var.xres = w - 2*x_margin; | ||
477 | p->var.yres = h - 2*y_margin; | ||
478 | |||
479 | fb->cursor.mode |= CURSOR_SHAPE; | ||
480 | |||
481 | if (fb->margins) | ||
482 | fb->margins(fb, p, x_margin, y_margin); | ||
483 | if (fb->x_margin != x_margin || fb->y_margin != y_margin) { | ||
484 | fb->x_margin = x_margin; fb->y_margin = y_margin; | ||
485 | sun3fb_clear_margin(p, 0); | ||
486 | } | ||
487 | |||
488 | return 1; | ||
489 | } | ||
490 | |||
491 | void sun3fb_palette(int enter) | ||
492 | { | ||
493 | int i; | ||
494 | struct display *p; | ||
495 | |||
496 | for (i = 0; i < MAX_NR_CONSOLES; i++) { | ||
497 | p = &fb_display[i]; | ||
498 | if (p->dispsw && p->dispsw->setup == sun3fb_disp_setup && | ||
499 | p->fb_info->display_fg && | ||
500 | p->fb_info->display_fg->vc_num == i) { | ||
501 | struct fb_info_sbusfb *fb = sbusfbinfod(p); | ||
502 | |||
503 | if (fb->restore_palette) { | ||
504 | if (enter) | ||
505 | fb->restore_palette(fb); | ||
506 | else if (vc_cons[i].d->vc_mode != KD_GRAPHICS) | ||
507 | vc_cons[i].d->vc_sw->con_set_palette(vc_cons[i].d, color_table); | ||
508 | } | ||
509 | } | ||
510 | } | ||
511 | } | ||
512 | |||
513 | /* | ||
514 | * Initialisation | ||
515 | */ | ||
516 | static int __init sun3fb_init_fb(int fbtype, unsigned long addr) | ||
517 | { | ||
518 | static struct sbus_dev sdb; | ||
519 | struct fb_fix_screeninfo *fix; | ||
520 | struct fb_var_screeninfo *var; | ||
521 | struct display *disp; | ||
522 | struct fb_info_sbusfb *fb; | ||
523 | struct fbtype *type; | ||
524 | int linebytes, w, h, depth; | ||
525 | char *p = NULL; | ||
526 | |||
527 | fb = kmalloc(sizeof(struct fb_info_sbusfb), GFP_ATOMIC); | ||
528 | if (!fb) | ||
529 | return -ENOMEM; | ||
530 | |||
531 | memset(fb, 0, sizeof(struct fb_info_sbusfb)); | ||
532 | fix = &fb->fix; | ||
533 | var = &fb->var; | ||
534 | disp = &fb->disp; | ||
535 | type = &fb->type; | ||
536 | |||
537 | sdb.reg_addrs[0].phys_addr = addr; | ||
538 | fb->sbdp = &sdb; | ||
539 | |||
540 | type->fb_type = fbtype; | ||
541 | |||
542 | type->fb_height = h = 900; | ||
543 | type->fb_width = w = 1152; | ||
544 | sizechange: | ||
545 | type->fb_depth = depth = (fbtype == FBTYPE_SUN2BW) ? 1 : 8; | ||
546 | linebytes = w * depth / 8; | ||
547 | type->fb_size = PAGE_ALIGN((linebytes) * h); | ||
548 | /* | ||
549 | fb->x_margin = (w & 7) / 2; | ||
550 | fb->y_margin = (h & 15) / 2; | ||
551 | */ | ||
552 | fb->x_margin = fb->y_margin = 0; | ||
553 | |||
554 | var->xres_virtual = w; | ||
555 | var->yres_virtual = h; | ||
556 | var->xres = w - 2*fb->x_margin; | ||
557 | var->yres = h - 2*fb->y_margin; | ||
558 | |||
559 | var->bits_per_pixel = depth; | ||
560 | var->height = var->width = -1; | ||
561 | var->pixclock = 10000; | ||
562 | var->vmode = FB_VMODE_NONINTERLACED; | ||
563 | var->red.length = var->green.length = var->blue.length = 8; | ||
564 | |||
565 | fix->line_length = linebytes; | ||
566 | fix->smem_len = type->fb_size; | ||
567 | fix->type = FB_TYPE_PACKED_PIXELS; | ||
568 | fix->visual = FB_VISUAL_PSEUDOCOLOR; | ||
569 | |||
570 | fb->info.fbops = &sun3fb_ops; | ||
571 | fb->info.disp = disp; | ||
572 | fb->info.currcon = -1; | ||
573 | strcpy(fb->info.fontname, fontname); | ||
574 | fb->info.changevar = NULL; | ||
575 | fb->info.switch_con = &sun3fbcon_switch; | ||
576 | fb->info.updatevar = &sun3fbcon_updatevar; | ||
577 | fb->info.flags = FBINFO_FLAG_DEFAULT; | ||
578 | |||
579 | fb->cursor.hwsize.fbx = 32; | ||
580 | fb->cursor.hwsize.fby = 32; | ||
581 | |||
582 | if (depth > 1 && !fb->color_map) { | ||
583 | if((fb->color_map = kmalloc(256 * 3, GFP_ATOMIC))==NULL) | ||
584 | return -ENOMEM; | ||
585 | } | ||
586 | |||
587 | switch(fbtype) { | ||
588 | #ifdef CONFIG_FB_CGSIX | ||
589 | case FBTYPE_SUNFAST_COLOR: | ||
590 | p = cgsixfb_init(fb); break; | ||
591 | #endif | ||
592 | #ifdef CONFIG_FB_BWTWO | ||
593 | case FBTYPE_SUN2BW: | ||
594 | p = bwtwofb_init(fb); break; | ||
595 | #endif | ||
596 | #ifdef CONFIG_FB_CGTHREE | ||
597 | case FBTYPE_SUN4COLOR: | ||
598 | case FBTYPE_SUN3COLOR: | ||
599 | type->fb_size = 0x100000; | ||
600 | p = cgthreefb_init(fb); break; | ||
601 | #endif | ||
602 | } | ||
603 | fix->smem_start = (unsigned long)fb->info.screen_base; // FIXME | ||
604 | |||
605 | if (!p) { | ||
606 | kfree(fb); | ||
607 | return -ENODEV; | ||
608 | } | ||
609 | |||
610 | if (p == SBUSFBINIT_SIZECHANGE) | ||
611 | goto sizechange; | ||
612 | |||
613 | disp->dispsw = &fb->dispsw; | ||
614 | if (fb->setcursor) { | ||
615 | fb->dispsw.cursor = sun3fb_cursor; | ||
616 | if (curblink) { | ||
617 | fb->cursor.blink_rate = DEFAULT_CURSOR_BLINK_RATE; | ||
618 | init_timer(&fb->cursor.timer); | ||
619 | fb->cursor.timer.expires = jiffies + fb->cursor.blink_rate; | ||
620 | fb->cursor.timer.data = (unsigned long)fb; | ||
621 | fb->cursor.timer.function = sun3fb_cursor_timer_handler; | ||
622 | add_timer(&fb->cursor.timer); | ||
623 | } | ||
624 | } | ||
625 | fb->cursor.mode = CURSOR_SHAPE; | ||
626 | fb->dispsw.set_font = sun3fb_set_font; | ||
627 | fb->setup = fb->dispsw.setup; | ||
628 | fb->dispsw.setup = sun3fb_disp_setup; | ||
629 | fb->dispsw.clear_margins = NULL; | ||
630 | |||
631 | disp->var = *var; | ||
632 | disp->visual = fix->visual; | ||
633 | disp->type = fix->type; | ||
634 | disp->type_aux = fix->type_aux; | ||
635 | disp->line_length = fix->line_length; | ||
636 | |||
637 | if (fb->blank) | ||
638 | disp->can_soft_blank = 1; | ||
639 | |||
640 | sun3fb_set_var(var, -1, &fb->info); | ||
641 | |||
642 | if (register_framebuffer(&fb->info) < 0) { | ||
643 | kfree(fb); | ||
644 | return -EINVAL; | ||
645 | } | ||
646 | printk("fb%d: %s\n", fb->info.node, p); | ||
647 | |||
648 | return 0; | ||
649 | } | ||
650 | |||
651 | |||
652 | int __init sun3fb_init(void) | ||
653 | { | ||
654 | extern int con_is_present(void); | ||
655 | unsigned long addr; | ||
656 | char p4id; | ||
657 | |||
658 | if (!con_is_present()) return -ENODEV; | ||
659 | #ifdef CONFIG_SUN3 | ||
660 | switch(*(romvec->pv_fbtype)) | ||
661 | { | ||
662 | case FBTYPE_SUN2BW: | ||
663 | addr = 0xfe20000; | ||
664 | return sun3fb_init_fb(FBTYPE_SUN2BW, addr); | ||
665 | case FBTYPE_SUN3COLOR: | ||
666 | case FBTYPE_SUN4COLOR: | ||
667 | if(idprom->id_machtype != (SM_SUN3|SM_3_60)) { | ||
668 | printk("sun3fb: cgthree/four only supported on 3/60\n"); | ||
669 | return -ENODEV; | ||
670 | } | ||
671 | |||
672 | addr = CGFOUR_OBMEM_ADDR; | ||
673 | return sun3fb_init_fb(*(romvec->pv_fbtype), addr); | ||
674 | default: | ||
675 | printk("sun3fb: unsupported framebuffer\n"); | ||
676 | return -ENODEV; | ||
677 | } | ||
678 | #else | ||
679 | addr = SUN3X_VIDEO_BASE; | ||
680 | p4id = *(char *)SUN3X_VIDEO_P4ID; | ||
681 | |||
682 | p4id = (p4id == 0x45) ? p4id : (p4id & 0xf0); | ||
683 | switch (p4id) { | ||
684 | case 0x00: | ||
685 | return sun3fb_init_fb(FBTYPE_SUN2BW, addr); | ||
686 | #if 0 /* not yet */ | ||
687 | case 0x40: | ||
688 | return sun3fb_init_fb(FBTYPE_SUN4COLOR, addr); | ||
689 | break; | ||
690 | case 0x45: | ||
691 | return sun3fb_init_fb(FBTYPE_SUN8COLOR, addr); | ||
692 | break; | ||
693 | #endif | ||
694 | case 0x60: | ||
695 | return sun3fb_init_fb(FBTYPE_SUNFAST_COLOR, addr); | ||
696 | } | ||
697 | #endif | ||
698 | |||
699 | return -ENODEV; | ||
700 | } | ||
701 | |||
702 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/video/svgalib.c b/drivers/video/svgalib.c new file mode 100644 index 000000000000..68b30d9eac58 --- /dev/null +++ b/drivers/video/svgalib.c | |||
@@ -0,0 +1,632 @@ | |||
1 | /* | ||
2 | * Common utility functions for VGA-based graphics cards. | ||
3 | * | ||
4 | * Copyright (c) 2006-2007 Ondrej Zajicek <santiago@crfreenet.org> | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file COPYING in the main directory of this archive for | ||
8 | * more details. | ||
9 | * | ||
10 | * Some parts are based on David Boucher's viafb (http://davesdomain.org.uk/viafb/) | ||
11 | */ | ||
12 | |||
13 | #include <linux/module.h> | ||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/string.h> | ||
16 | #include <linux/fb.h> | ||
17 | #include <linux/svga.h> | ||
18 | #include <linux/slab.h> | ||
19 | #include <asm/types.h> | ||
20 | #include <asm/io.h> | ||
21 | |||
22 | |||
23 | /* Write a CRT register value spread across multiple registers */ | ||
24 | void svga_wcrt_multi(const struct vga_regset *regset, u32 value) { | ||
25 | |||
26 | u8 regval, bitval, bitnum; | ||
27 | |||
28 | while (regset->regnum != VGA_REGSET_END_VAL) { | ||
29 | regval = vga_rcrt(NULL, regset->regnum); | ||
30 | bitnum = regset->lowbit; | ||
31 | while (bitnum <= regset->highbit) { | ||
32 | bitval = 1 << bitnum; | ||
33 | regval = regval & ~bitval; | ||
34 | if (value & 1) regval = regval | bitval; | ||
35 | bitnum ++; | ||
36 | value = value >> 1; | ||
37 | } | ||
38 | vga_wcrt(NULL, regset->regnum, regval); | ||
39 | regset ++; | ||
40 | } | ||
41 | } | ||
42 | |||
43 | /* Write a sequencer register value spread across multiple registers */ | ||
44 | void svga_wseq_multi(const struct vga_regset *regset, u32 value) { | ||
45 | |||
46 | u8 regval, bitval, bitnum; | ||
47 | |||
48 | while (regset->regnum != VGA_REGSET_END_VAL) { | ||
49 | regval = vga_rseq(NULL, regset->regnum); | ||
50 | bitnum = regset->lowbit; | ||
51 | while (bitnum <= regset->highbit) { | ||
52 | bitval = 1 << bitnum; | ||
53 | regval = regval & ~bitval; | ||
54 | if (value & 1) regval = regval | bitval; | ||
55 | bitnum ++; | ||
56 | value = value >> 1; | ||
57 | } | ||
58 | vga_wseq(NULL, regset->regnum, regval); | ||
59 | regset ++; | ||
60 | } | ||
61 | } | ||
62 | |||
63 | static unsigned int svga_regset_size(const struct vga_regset *regset) | ||
64 | { | ||
65 | u8 count = 0; | ||
66 | |||
67 | while (regset->regnum != VGA_REGSET_END_VAL) { | ||
68 | count += regset->highbit - regset->lowbit + 1; | ||
69 | regset ++; | ||
70 | } | ||
71 | return 1 << count; | ||
72 | } | ||
73 | |||
74 | |||
75 | /* ------------------------------------------------------------------------- */ | ||
76 | |||
77 | |||
78 | /* Set graphics controller registers to sane values */ | ||
79 | void svga_set_default_gfx_regs(void) | ||
80 | { | ||
81 | /* All standard GFX registers (GR00 - GR08) */ | ||
82 | vga_wgfx(NULL, VGA_GFX_SR_VALUE, 0x00); | ||
83 | vga_wgfx(NULL, VGA_GFX_SR_ENABLE, 0x00); | ||
84 | vga_wgfx(NULL, VGA_GFX_COMPARE_VALUE, 0x00); | ||
85 | vga_wgfx(NULL, VGA_GFX_DATA_ROTATE, 0x00); | ||
86 | vga_wgfx(NULL, VGA_GFX_PLANE_READ, 0x00); | ||
87 | vga_wgfx(NULL, VGA_GFX_MODE, 0x00); | ||
88 | /* vga_wgfx(NULL, VGA_GFX_MODE, 0x20); */ | ||
89 | /* vga_wgfx(NULL, VGA_GFX_MODE, 0x40); */ | ||
90 | vga_wgfx(NULL, VGA_GFX_MISC, 0x05); | ||
91 | /* vga_wgfx(NULL, VGA_GFX_MISC, 0x01); */ | ||
92 | vga_wgfx(NULL, VGA_GFX_COMPARE_MASK, 0x0F); | ||
93 | vga_wgfx(NULL, VGA_GFX_BIT_MASK, 0xFF); | ||
94 | } | ||
95 | |||
96 | /* Set attribute controller registers to sane values */ | ||
97 | void svga_set_default_atc_regs(void) | ||
98 | { | ||
99 | u8 count; | ||
100 | |||
101 | vga_r(NULL, 0x3DA); | ||
102 | vga_w(NULL, VGA_ATT_W, 0x00); | ||
103 | |||
104 | /* All standard ATC registers (AR00 - AR14) */ | ||
105 | for (count = 0; count <= 0xF; count ++) | ||
106 | svga_wattr(count, count); | ||
107 | |||
108 | svga_wattr(VGA_ATC_MODE, 0x01); | ||
109 | /* svga_wattr(VGA_ATC_MODE, 0x41); */ | ||
110 | svga_wattr(VGA_ATC_OVERSCAN, 0x00); | ||
111 | svga_wattr(VGA_ATC_PLANE_ENABLE, 0x0F); | ||
112 | svga_wattr(VGA_ATC_PEL, 0x00); | ||
113 | svga_wattr(VGA_ATC_COLOR_PAGE, 0x00); | ||
114 | |||
115 | vga_r(NULL, 0x3DA); | ||
116 | vga_w(NULL, VGA_ATT_W, 0x20); | ||
117 | } | ||
118 | |||
119 | /* Set sequencer registers to sane values */ | ||
120 | void svga_set_default_seq_regs(void) | ||
121 | { | ||
122 | /* Standard sequencer registers (SR01 - SR04), SR00 is not set */ | ||
123 | vga_wseq(NULL, VGA_SEQ_CLOCK_MODE, VGA_SR01_CHAR_CLK_8DOTS); | ||
124 | vga_wseq(NULL, VGA_SEQ_PLANE_WRITE, VGA_SR02_ALL_PLANES); | ||
125 | vga_wseq(NULL, VGA_SEQ_CHARACTER_MAP, 0x00); | ||
126 | /* vga_wseq(NULL, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM | VGA_SR04_SEQ_MODE | VGA_SR04_CHN_4M); */ | ||
127 | vga_wseq(NULL, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM | VGA_SR04_SEQ_MODE); | ||
128 | } | ||
129 | |||
130 | /* Set CRTC registers to sane values */ | ||
131 | void svga_set_default_crt_regs(void) | ||
132 | { | ||
133 | /* Standard CRT registers CR03 CR08 CR09 CR14 CR17 */ | ||
134 | svga_wcrt_mask(0x03, 0x80, 0x80); /* Enable vertical retrace EVRA */ | ||
135 | vga_wcrt(NULL, VGA_CRTC_PRESET_ROW, 0); | ||
136 | svga_wcrt_mask(VGA_CRTC_MAX_SCAN, 0, 0x1F); | ||
137 | vga_wcrt(NULL, VGA_CRTC_UNDERLINE, 0); | ||
138 | vga_wcrt(NULL, VGA_CRTC_MODE, 0xE3); | ||
139 | } | ||
140 | |||
141 | void svga_set_textmode_vga_regs(void) | ||
142 | { | ||
143 | /* svga_wseq_mask(0x1, 0x00, 0x01); */ /* Switch 8/9 pixel per char */ | ||
144 | vga_wseq(NULL, VGA_SEQ_MEMORY_MODE, VGA_SR04_EXT_MEM); | ||
145 | vga_wseq(NULL, VGA_SEQ_PLANE_WRITE, 0x03); | ||
146 | |||
147 | vga_wcrt(NULL, VGA_CRTC_MAX_SCAN, 0x0f); /* 0x4f */ | ||
148 | vga_wcrt(NULL, VGA_CRTC_UNDERLINE, 0x1f); | ||
149 | svga_wcrt_mask(VGA_CRTC_MODE, 0x23, 0x7f); | ||
150 | |||
151 | vga_wcrt(NULL, VGA_CRTC_CURSOR_START, 0x0d); | ||
152 | vga_wcrt(NULL, VGA_CRTC_CURSOR_END, 0x0e); | ||
153 | vga_wcrt(NULL, VGA_CRTC_CURSOR_HI, 0x00); | ||
154 | vga_wcrt(NULL, VGA_CRTC_CURSOR_LO, 0x00); | ||
155 | |||
156 | vga_wgfx(NULL, VGA_GFX_MODE, 0x10); /* Odd/even memory mode */ | ||
157 | vga_wgfx(NULL, VGA_GFX_MISC, 0x0E); /* Misc graphics register - text mode enable */ | ||
158 | vga_wgfx(NULL, VGA_GFX_COMPARE_MASK, 0x00); | ||
159 | |||
160 | vga_r(NULL, 0x3DA); | ||
161 | vga_w(NULL, VGA_ATT_W, 0x00); | ||
162 | |||
163 | svga_wattr(0x10, 0x0C); /* Attribute Mode Control Register - text mode, blinking and line graphics */ | ||
164 | svga_wattr(0x13, 0x08); /* Horizontal Pixel Panning Register */ | ||
165 | |||
166 | vga_r(NULL, 0x3DA); | ||
167 | vga_w(NULL, VGA_ATT_W, 0x20); | ||
168 | } | ||
169 | |||
170 | #if 0 | ||
171 | void svga_dump_var(struct fb_var_screeninfo *var, int node) | ||
172 | { | ||
173 | pr_debug("fb%d: var.vmode : 0x%X\n", node, var->vmode); | ||
174 | pr_debug("fb%d: var.xres : %d\n", node, var->xres); | ||
175 | pr_debug("fb%d: var.yres : %d\n", node, var->yres); | ||
176 | pr_debug("fb%d: var.bits_per_pixel: %d\n", node, var->bits_per_pixel); | ||
177 | pr_debug("fb%d: var.xres_virtual : %d\n", node, var->xres_virtual); | ||
178 | pr_debug("fb%d: var.yres_virtual : %d\n", node, var->yres_virtual); | ||
179 | pr_debug("fb%d: var.left_margin : %d\n", node, var->left_margin); | ||
180 | pr_debug("fb%d: var.right_margin : %d\n", node, var->right_margin); | ||
181 | pr_debug("fb%d: var.upper_margin : %d\n", node, var->upper_margin); | ||
182 | pr_debug("fb%d: var.lower_margin : %d\n", node, var->lower_margin); | ||
183 | pr_debug("fb%d: var.hsync_len : %d\n", node, var->hsync_len); | ||
184 | pr_debug("fb%d: var.vsync_len : %d\n", node, var->vsync_len); | ||
185 | pr_debug("fb%d: var.sync : 0x%X\n", node, var->sync); | ||
186 | pr_debug("fb%d: var.pixclock : %d\n\n", node, var->pixclock); | ||
187 | } | ||
188 | #endif /* 0 */ | ||
189 | |||
190 | |||
191 | /* ------------------------------------------------------------------------- */ | ||
192 | |||
193 | |||
194 | void svga_settile(struct fb_info *info, struct fb_tilemap *map) | ||
195 | { | ||
196 | const u8 *font = map->data; | ||
197 | u8* fb = (u8 *) info->screen_base; | ||
198 | int i, c; | ||
199 | |||
200 | if ((map->width != 8) || (map->height != 16) || | ||
201 | (map->depth != 1) || (map->length != 256)) { | ||
202 | printk(KERN_ERR "fb%d: unsupported font parameters: width %d, height %d, depth %d, length %d\n", | ||
203 | info->node, map->width, map->height, map->depth, map->length); | ||
204 | return; | ||
205 | } | ||
206 | |||
207 | fb += 2; | ||
208 | for (c = 0; c < map->length; c++) { | ||
209 | for (i = 0; i < map->height; i++) { | ||
210 | fb[i * 4] = font[i]; | ||
211 | } | ||
212 | fb += 128; | ||
213 | font += map->height; | ||
214 | } | ||
215 | } | ||
216 | |||
217 | /* Copy area in text (tileblit) mode */ | ||
218 | void svga_tilecopy(struct fb_info *info, struct fb_tilearea *area) | ||
219 | { | ||
220 | int dx, dy; | ||
221 | /* colstride is halved in this function because u16 are used */ | ||
222 | int colstride = 1 << (info->fix.type_aux & FB_AUX_TEXT_SVGA_MASK); | ||
223 | int rowstride = colstride * (info->var.xres_virtual / 8); | ||
224 | u16 *fb = (u16 *) info->screen_base; | ||
225 | u16 *src, *dst; | ||
226 | |||
227 | if ((area->sy > area->dy) || | ||
228 | ((area->sy == area->dy) && (area->sx > area->dx))) { | ||
229 | src = fb + area->sx * colstride + area->sy * rowstride; | ||
230 | dst = fb + area->dx * colstride + area->dy * rowstride; | ||
231 | } else { | ||
232 | src = fb + (area->sx + area->width - 1) * colstride | ||
233 | + (area->sy + area->height - 1) * rowstride; | ||
234 | dst = fb + (area->dx + area->width - 1) * colstride | ||
235 | + (area->dy + area->height - 1) * rowstride; | ||
236 | |||
237 | colstride = -colstride; | ||
238 | rowstride = -rowstride; | ||
239 | } | ||
240 | |||
241 | for (dy = 0; dy < area->height; dy++) { | ||
242 | u16* src2 = src; | ||
243 | u16* dst2 = dst; | ||
244 | for (dx = 0; dx < area->width; dx++) { | ||
245 | *dst2 = *src2; | ||
246 | src2 += colstride; | ||
247 | dst2 += colstride; | ||
248 | } | ||
249 | src += rowstride; | ||
250 | dst += rowstride; | ||
251 | } | ||
252 | } | ||
253 | |||
254 | /* Fill area in text (tileblit) mode */ | ||
255 | void svga_tilefill(struct fb_info *info, struct fb_tilerect *rect) | ||
256 | { | ||
257 | int dx, dy; | ||
258 | int colstride = 2 << (info->fix.type_aux & FB_AUX_TEXT_SVGA_MASK); | ||
259 | int rowstride = colstride * (info->var.xres_virtual / 8); | ||
260 | int attr = (0x0F & rect->bg) << 4 | (0x0F & rect->fg); | ||
261 | u8 *fb = (u8 *) info->screen_base; | ||
262 | fb += rect->sx * colstride + rect->sy * rowstride; | ||
263 | |||
264 | for (dy = 0; dy < rect->height; dy++) { | ||
265 | u8* fb2 = fb; | ||
266 | for (dx = 0; dx < rect->width; dx++) { | ||
267 | fb2[0] = rect->index; | ||
268 | fb2[1] = attr; | ||
269 | fb2 += colstride; | ||
270 | } | ||
271 | fb += rowstride; | ||
272 | } | ||
273 | } | ||
274 | |||
275 | /* Write text in text (tileblit) mode */ | ||
276 | void svga_tileblit(struct fb_info *info, struct fb_tileblit *blit) | ||
277 | { | ||
278 | int dx, dy, i; | ||
279 | int colstride = 2 << (info->fix.type_aux & FB_AUX_TEXT_SVGA_MASK); | ||
280 | int rowstride = colstride * (info->var.xres_virtual / 8); | ||
281 | int attr = (0x0F & blit->bg) << 4 | (0x0F & blit->fg); | ||
282 | u8* fb = (u8 *) info->screen_base; | ||
283 | fb += blit->sx * colstride + blit->sy * rowstride; | ||
284 | |||
285 | i=0; | ||
286 | for (dy=0; dy < blit->height; dy ++) { | ||
287 | u8* fb2 = fb; | ||
288 | for (dx = 0; dx < blit->width; dx ++) { | ||
289 | fb2[0] = blit->indices[i]; | ||
290 | fb2[1] = attr; | ||
291 | fb2 += colstride; | ||
292 | i ++; | ||
293 | if (i == blit->length) return; | ||
294 | } | ||
295 | fb += rowstride; | ||
296 | } | ||
297 | |||
298 | } | ||
299 | |||
300 | /* Set cursor in text (tileblit) mode */ | ||
301 | void svga_tilecursor(struct fb_info *info, struct fb_tilecursor *cursor) | ||
302 | { | ||
303 | u8 cs = 0x0d; | ||
304 | u8 ce = 0x0e; | ||
305 | u16 pos = cursor->sx + (info->var.xoffset / 8) | ||
306 | + (cursor->sy + (info->var.yoffset / 16)) | ||
307 | * (info->var.xres_virtual / 8); | ||
308 | |||
309 | if (! cursor -> mode) | ||
310 | return; | ||
311 | |||
312 | svga_wcrt_mask(0x0A, 0x20, 0x20); /* disable cursor */ | ||
313 | |||
314 | if (cursor -> shape == FB_TILE_CURSOR_NONE) | ||
315 | return; | ||
316 | |||
317 | switch (cursor -> shape) { | ||
318 | case FB_TILE_CURSOR_UNDERLINE: | ||
319 | cs = 0x0d; | ||
320 | break; | ||
321 | case FB_TILE_CURSOR_LOWER_THIRD: | ||
322 | cs = 0x09; | ||
323 | break; | ||
324 | case FB_TILE_CURSOR_LOWER_HALF: | ||
325 | cs = 0x07; | ||
326 | break; | ||
327 | case FB_TILE_CURSOR_TWO_THIRDS: | ||
328 | cs = 0x05; | ||
329 | break; | ||
330 | case FB_TILE_CURSOR_BLOCK: | ||
331 | cs = 0x01; | ||
332 | break; | ||
333 | } | ||
334 | |||
335 | /* set cursor position */ | ||
336 | vga_wcrt(NULL, 0x0E, pos >> 8); | ||
337 | vga_wcrt(NULL, 0x0F, pos & 0xFF); | ||
338 | |||
339 | vga_wcrt(NULL, 0x0B, ce); /* set cursor end */ | ||
340 | vga_wcrt(NULL, 0x0A, cs); /* set cursor start and enable it */ | ||
341 | } | ||
342 | |||
343 | |||
344 | /* ------------------------------------------------------------------------- */ | ||
345 | |||
346 | |||
347 | /* | ||
348 | * Compute PLL settings (M, N, R) | ||
349 | * F_VCO = (F_BASE * M) / N | ||
350 | * F_OUT = F_VCO / (2^R) | ||
351 | */ | ||
352 | |||
353 | static inline u32 abs_diff(u32 a, u32 b) | ||
354 | { | ||
355 | return (a > b) ? (a - b) : (b - a); | ||
356 | } | ||
357 | |||
358 | int svga_compute_pll(const struct svga_pll *pll, u32 f_wanted, u16 *m, u16 *n, u16 *r, int node) | ||
359 | { | ||
360 | u16 am, an, ar; | ||
361 | u32 f_vco, f_current, delta_current, delta_best; | ||
362 | |||
363 | pr_debug("fb%d: ideal frequency: %d kHz\n", node, (unsigned int) f_wanted); | ||
364 | |||
365 | ar = pll->r_max; | ||
366 | f_vco = f_wanted << ar; | ||
367 | |||
368 | /* overflow check */ | ||
369 | if ((f_vco >> ar) != f_wanted) | ||
370 | return -EINVAL; | ||
371 | |||
372 | /* It is usually better to have greater VCO clock | ||
373 | because of better frequency stability. | ||
374 | So first try r_max, then r smaller. */ | ||
375 | while ((ar > pll->r_min) && (f_vco > pll->f_vco_max)) { | ||
376 | ar--; | ||
377 | f_vco = f_vco >> 1; | ||
378 | } | ||
379 | |||
380 | /* VCO bounds check */ | ||
381 | if ((f_vco < pll->f_vco_min) || (f_vco > pll->f_vco_max)) | ||
382 | return -EINVAL; | ||
383 | |||
384 | delta_best = 0xFFFFFFFF; | ||
385 | *m = 0; | ||
386 | *n = 0; | ||
387 | *r = ar; | ||
388 | |||
389 | am = pll->m_min; | ||
390 | an = pll->n_min; | ||
391 | |||
392 | while ((am <= pll->m_max) && (an <= pll->n_max)) { | ||
393 | f_current = (pll->f_base * am) / an; | ||
394 | delta_current = abs_diff (f_current, f_vco); | ||
395 | |||
396 | if (delta_current < delta_best) { | ||
397 | delta_best = delta_current; | ||
398 | *m = am; | ||
399 | *n = an; | ||
400 | } | ||
401 | |||
402 | if (f_current <= f_vco) { | ||
403 | am ++; | ||
404 | } else { | ||
405 | an ++; | ||
406 | } | ||
407 | } | ||
408 | |||
409 | f_current = (pll->f_base * *m) / *n; | ||
410 | pr_debug("fb%d: found frequency: %d kHz (VCO %d kHz)\n", node, (int) (f_current >> ar), (int) f_current); | ||
411 | pr_debug("fb%d: m = %d n = %d r = %d\n", node, (unsigned int) *m, (unsigned int) *n, (unsigned int) *r); | ||
412 | return 0; | ||
413 | } | ||
414 | |||
415 | |||
416 | /* ------------------------------------------------------------------------- */ | ||
417 | |||
418 | |||
419 | /* Check CRT timing values */ | ||
420 | int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, int node) | ||
421 | { | ||
422 | u32 value; | ||
423 | |||
424 | var->xres = (var->xres+7)&~7; | ||
425 | var->left_margin = (var->left_margin+7)&~7; | ||
426 | var->right_margin = (var->right_margin+7)&~7; | ||
427 | var->hsync_len = (var->hsync_len+7)&~7; | ||
428 | |||
429 | /* Check horizontal total */ | ||
430 | value = var->xres + var->left_margin + var->right_margin + var->hsync_len; | ||
431 | if (((value / 8) - 5) >= svga_regset_size (tm->h_total_regs)) | ||
432 | return -EINVAL; | ||
433 | |||
434 | /* Check horizontal display and blank start */ | ||
435 | value = var->xres; | ||
436 | if (((value / 8) - 1) >= svga_regset_size (tm->h_display_regs)) | ||
437 | return -EINVAL; | ||
438 | if (((value / 8) - 1) >= svga_regset_size (tm->h_blank_start_regs)) | ||
439 | return -EINVAL; | ||
440 | |||
441 | /* Check horizontal sync start */ | ||
442 | value = var->xres + var->right_margin; | ||
443 | if (((value / 8) - 1) >= svga_regset_size (tm->h_sync_start_regs)) | ||
444 | return -EINVAL; | ||
445 | |||
446 | /* Check horizontal blank end (or length) */ | ||
447 | value = var->left_margin + var->right_margin + var->hsync_len; | ||
448 | if ((value == 0) || ((value / 8) >= svga_regset_size (tm->h_blank_end_regs))) | ||
449 | return -EINVAL; | ||
450 | |||
451 | /* Check horizontal sync end (or length) */ | ||
452 | value = var->hsync_len; | ||
453 | if ((value == 0) || ((value / 8) >= svga_regset_size (tm->h_sync_end_regs))) | ||
454 | return -EINVAL; | ||
455 | |||
456 | /* Check vertical total */ | ||
457 | value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; | ||
458 | if ((value - 1) >= svga_regset_size(tm->v_total_regs)) | ||
459 | return -EINVAL; | ||
460 | |||
461 | /* Check vertical display and blank start */ | ||
462 | value = var->yres; | ||
463 | if ((value - 1) >= svga_regset_size(tm->v_display_regs)) | ||
464 | return -EINVAL; | ||
465 | if ((value - 1) >= svga_regset_size(tm->v_blank_start_regs)) | ||
466 | return -EINVAL; | ||
467 | |||
468 | /* Check vertical sync start */ | ||
469 | value = var->yres + var->lower_margin; | ||
470 | if ((value - 1) >= svga_regset_size(tm->v_sync_start_regs)) | ||
471 | return -EINVAL; | ||
472 | |||
473 | /* Check vertical blank end (or length) */ | ||
474 | value = var->upper_margin + var->lower_margin + var->vsync_len; | ||
475 | if ((value == 0) || (value >= svga_regset_size (tm->v_blank_end_regs))) | ||
476 | return -EINVAL; | ||
477 | |||
478 | /* Check vertical sync end (or length) */ | ||
479 | value = var->vsync_len; | ||
480 | if ((value == 0) || (value >= svga_regset_size (tm->v_sync_end_regs))) | ||
481 | return -EINVAL; | ||
482 | |||
483 | return 0; | ||
484 | } | ||
485 | |||
486 | /* Set CRT timing registers */ | ||
487 | void svga_set_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, | ||
488 | u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node) | ||
489 | { | ||
490 | u8 regval; | ||
491 | u32 value; | ||
492 | |||
493 | value = var->xres + var->left_margin + var->right_margin + var->hsync_len; | ||
494 | value = (value * hmul) / hdiv; | ||
495 | pr_debug("fb%d: horizontal total : %d\n", node, value); | ||
496 | svga_wcrt_multi(tm->h_total_regs, (value / 8) - 5); | ||
497 | |||
498 | value = var->xres; | ||
499 | value = (value * hmul) / hdiv; | ||
500 | pr_debug("fb%d: horizontal display : %d\n", node, value); | ||
501 | svga_wcrt_multi(tm->h_display_regs, (value / 8) - 1); | ||
502 | |||
503 | value = var->xres; | ||
504 | value = (value * hmul) / hdiv; | ||
505 | pr_debug("fb%d: horizontal blank start: %d\n", node, value); | ||
506 | svga_wcrt_multi(tm->h_blank_start_regs, (value / 8) - 1 + hborder); | ||
507 | |||
508 | value = var->xres + var->left_margin + var->right_margin + var->hsync_len; | ||
509 | value = (value * hmul) / hdiv; | ||
510 | pr_debug("fb%d: horizontal blank end : %d\n", node, value); | ||
511 | svga_wcrt_multi(tm->h_blank_end_regs, (value / 8) - 1 - hborder); | ||
512 | |||
513 | value = var->xres + var->right_margin; | ||
514 | value = (value * hmul) / hdiv; | ||
515 | pr_debug("fb%d: horizontal sync start : %d\n", node, value); | ||
516 | svga_wcrt_multi(tm->h_sync_start_regs, (value / 8)); | ||
517 | |||
518 | value = var->xres + var->right_margin + var->hsync_len; | ||
519 | value = (value * hmul) / hdiv; | ||
520 | pr_debug("fb%d: horizontal sync end : %d\n", node, value); | ||
521 | svga_wcrt_multi(tm->h_sync_end_regs, (value / 8)); | ||
522 | |||
523 | value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; | ||
524 | value = (value * vmul) / vdiv; | ||
525 | pr_debug("fb%d: vertical total : %d\n", node, value); | ||
526 | svga_wcrt_multi(tm->v_total_regs, value - 2); | ||
527 | |||
528 | value = var->yres; | ||
529 | value = (value * vmul) / vdiv; | ||
530 | pr_debug("fb%d: vertical display : %d\n", node, value); | ||
531 | svga_wcrt_multi(tm->v_display_regs, value - 1); | ||
532 | |||
533 | value = var->yres; | ||
534 | value = (value * vmul) / vdiv; | ||
535 | pr_debug("fb%d: vertical blank start : %d\n", node, value); | ||
536 | svga_wcrt_multi(tm->v_blank_start_regs, value); | ||
537 | |||
538 | value = var->yres + var->upper_margin + var->lower_margin + var->vsync_len; | ||
539 | value = (value * vmul) / vdiv; | ||
540 | pr_debug("fb%d: vertical blank end : %d\n", node, value); | ||
541 | svga_wcrt_multi(tm->v_blank_end_regs, value - 2); | ||
542 | |||
543 | value = var->yres + var->lower_margin; | ||
544 | value = (value * vmul) / vdiv; | ||
545 | pr_debug("fb%d: vertical sync start : %d\n", node, value); | ||
546 | svga_wcrt_multi(tm->v_sync_start_regs, value); | ||
547 | |||
548 | value = var->yres + var->lower_margin + var->vsync_len; | ||
549 | value = (value * vmul) / vdiv; | ||
550 | pr_debug("fb%d: vertical sync end : %d\n", node, value); | ||
551 | svga_wcrt_multi(tm->v_sync_end_regs, value); | ||
552 | |||
553 | /* Set horizontal and vertical sync pulse polarity in misc register */ | ||
554 | |||
555 | regval = vga_r(NULL, VGA_MIS_R); | ||
556 | if (var->sync & FB_SYNC_HOR_HIGH_ACT) { | ||
557 | pr_debug("fb%d: positive horizontal sync\n", node); | ||
558 | regval = regval & ~0x80; | ||
559 | } else { | ||
560 | pr_debug("fb%d: negative horizontal sync\n", node); | ||
561 | regval = regval | 0x80; | ||
562 | } | ||
563 | if (var->sync & FB_SYNC_VERT_HIGH_ACT) { | ||
564 | pr_debug("fb%d: positive vertical sync\n", node); | ||
565 | regval = regval & ~0x40; | ||
566 | } else { | ||
567 | pr_debug("fb%d: negative vertical sync\n\n", node); | ||
568 | regval = regval | 0x40; | ||
569 | } | ||
570 | vga_w(NULL, VGA_MIS_W, regval); | ||
571 | } | ||
572 | |||
573 | |||
574 | /* ------------------------------------------------------------------------- */ | ||
575 | |||
576 | |||
577 | int svga_match_format(const struct svga_fb_format *frm, struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix) | ||
578 | { | ||
579 | int i = 0; | ||
580 | |||
581 | while (frm->bits_per_pixel != SVGA_FORMAT_END_VAL) | ||
582 | { | ||
583 | if ((var->bits_per_pixel == frm->bits_per_pixel) && | ||
584 | (var->red.length <= frm->red.length) && | ||
585 | (var->green.length <= frm->green.length) && | ||
586 | (var->blue.length <= frm->blue.length) && | ||
587 | (var->transp.length <= frm->transp.length) && | ||
588 | (var->nonstd == frm->nonstd)) { | ||
589 | var->bits_per_pixel = frm->bits_per_pixel; | ||
590 | var->red = frm->red; | ||
591 | var->green = frm->green; | ||
592 | var->blue = frm->blue; | ||
593 | var->transp = frm->transp; | ||
594 | var->nonstd = frm->nonstd; | ||
595 | if (fix != NULL) { | ||
596 | fix->type = frm->type; | ||
597 | fix->type_aux = frm->type_aux; | ||
598 | fix->visual = frm->visual; | ||
599 | fix->xpanstep = frm->xpanstep; | ||
600 | } | ||
601 | return i; | ||
602 | } | ||
603 | i++; | ||
604 | frm++; | ||
605 | } | ||
606 | return -EINVAL; | ||
607 | } | ||
608 | |||
609 | |||
610 | EXPORT_SYMBOL(svga_wcrt_multi); | ||
611 | EXPORT_SYMBOL(svga_wseq_multi); | ||
612 | |||
613 | EXPORT_SYMBOL(svga_set_default_gfx_regs); | ||
614 | EXPORT_SYMBOL(svga_set_default_atc_regs); | ||
615 | EXPORT_SYMBOL(svga_set_default_seq_regs); | ||
616 | EXPORT_SYMBOL(svga_set_default_crt_regs); | ||
617 | EXPORT_SYMBOL(svga_set_textmode_vga_regs); | ||
618 | |||
619 | EXPORT_SYMBOL(svga_settile); | ||
620 | EXPORT_SYMBOL(svga_tilecopy); | ||
621 | EXPORT_SYMBOL(svga_tilefill); | ||
622 | EXPORT_SYMBOL(svga_tileblit); | ||
623 | EXPORT_SYMBOL(svga_tilecursor); | ||
624 | |||
625 | EXPORT_SYMBOL(svga_compute_pll); | ||
626 | EXPORT_SYMBOL(svga_check_timings); | ||
627 | EXPORT_SYMBOL(svga_set_timings); | ||
628 | EXPORT_SYMBOL(svga_match_format); | ||
629 | |||
630 | MODULE_AUTHOR("Ondrej Zajicek <santiago@crfreenet.org>"); | ||
631 | MODULE_DESCRIPTION("Common utility functions for VGA-based graphics cards"); | ||
632 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/video/tgafb.c b/drivers/video/tgafb.c index 4b88fab83b74..b604859b4ddb 100644 --- a/drivers/video/tgafb.c +++ b/drivers/video/tgafb.c | |||
@@ -43,8 +43,9 @@ static void tgafb_imageblit(struct fb_info *, const struct fb_image *); | |||
43 | static void tgafb_fillrect(struct fb_info *, const struct fb_fillrect *); | 43 | static void tgafb_fillrect(struct fb_info *, const struct fb_fillrect *); |
44 | static void tgafb_copyarea(struct fb_info *, const struct fb_copyarea *); | 44 | static void tgafb_copyarea(struct fb_info *, const struct fb_copyarea *); |
45 | 45 | ||
46 | static int tgafb_pci_register(struct pci_dev *, const struct pci_device_id *); | 46 | static int __devinit tgafb_pci_register(struct pci_dev *, |
47 | static void tgafb_pci_unregister(struct pci_dev *); | 47 | const struct pci_device_id *); |
48 | static void __devexit tgafb_pci_unregister(struct pci_dev *); | ||
48 | 49 | ||
49 | static const char *mode_option = "640x480@60"; | 50 | static const char *mode_option = "640x480@60"; |
50 | 51 | ||
@@ -70,9 +71,10 @@ static struct fb_ops tgafb_ops = { | |||
70 | */ | 71 | */ |
71 | 72 | ||
72 | static struct pci_device_id const tgafb_pci_table[] = { | 73 | static struct pci_device_id const tgafb_pci_table[] = { |
73 | { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TGA, PCI_ANY_ID, PCI_ANY_ID, | 74 | { PCI_DEVICE(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_TGA) }, |
74 | 0, 0, 0 } | 75 | { } |
75 | }; | 76 | }; |
77 | MODULE_DEVICE_TABLE(pci, tgafb_pci_table); | ||
76 | 78 | ||
77 | static struct pci_driver tgafb_driver = { | 79 | static struct pci_driver tgafb_driver = { |
78 | .name = "tgafb", | 80 | .name = "tgafb", |
@@ -99,6 +101,12 @@ tgafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) | |||
99 | if (var->bits_per_pixel != 32) | 101 | if (var->bits_per_pixel != 32) |
100 | return -EINVAL; | 102 | return -EINVAL; |
101 | } | 103 | } |
104 | var->red.length = var->green.length = var->blue.length = 8; | ||
105 | if (var->bits_per_pixel == 32) { | ||
106 | var->red.offset = 16; | ||
107 | var->green.offset = 8; | ||
108 | var->blue.offset = 0; | ||
109 | } | ||
102 | 110 | ||
103 | if (var->xres_virtual != var->xres || var->yres_virtual != var->yres) | 111 | if (var->xres_virtual != var->xres || var->yres_virtual != var->yres) |
104 | return -EINVAL; | 112 | return -EINVAL; |
@@ -137,10 +145,10 @@ tgafb_set_par(struct fb_info *info) | |||
137 | 0x00000303 | 145 | 0x00000303 |
138 | }; | 146 | }; |
139 | static unsigned int const mode_presets[4] = { | 147 | static unsigned int const mode_presets[4] = { |
140 | 0x00002000, | 148 | 0x00000000, |
141 | 0x00002300, | 149 | 0x00000300, |
142 | 0xffffffff, | 150 | 0xffffffff, |
143 | 0x00002300 | 151 | 0x00000300 |
144 | }; | 152 | }; |
145 | static unsigned int const base_addr_presets[4] = { | 153 | static unsigned int const base_addr_presets[4] = { |
146 | 0x00000000, | 154 | 0x00000000, |
@@ -152,7 +160,7 @@ tgafb_set_par(struct fb_info *info) | |||
152 | struct tga_par *par = (struct tga_par *) info->par; | 160 | struct tga_par *par = (struct tga_par *) info->par; |
153 | u32 htimings, vtimings, pll_freq; | 161 | u32 htimings, vtimings, pll_freq; |
154 | u8 tga_type; | 162 | u8 tga_type; |
155 | int i, j; | 163 | int i; |
156 | 164 | ||
157 | /* Encode video timings. */ | 165 | /* Encode video timings. */ |
158 | htimings = (((info->var.xres/4) & TGA_HORIZ_ACT_LSB) | 166 | htimings = (((info->var.xres/4) & TGA_HORIZ_ACT_LSB) |
@@ -190,7 +198,9 @@ tgafb_set_par(struct fb_info *info) | |||
190 | while (TGA_READ_REG(par, TGA_CMD_STAT_REG) & 1) /* wait for not busy */ | 198 | while (TGA_READ_REG(par, TGA_CMD_STAT_REG) & 1) /* wait for not busy */ |
191 | continue; | 199 | continue; |
192 | mb(); | 200 | mb(); |
193 | TGA_WRITE_REG(par, deep_presets[tga_type], TGA_DEEP_REG); | 201 | TGA_WRITE_REG(par, deep_presets[tga_type] | |
202 | (par->sync_on_green ? 0x0 : 0x00010000), | ||
203 | TGA_DEEP_REG); | ||
194 | while (TGA_READ_REG(par, TGA_CMD_STAT_REG) & 1) /* wait for not busy */ | 204 | while (TGA_READ_REG(par, TGA_CMD_STAT_REG) & 1) /* wait for not busy */ |
195 | continue; | 205 | continue; |
196 | mb(); | 206 | mb(); |
@@ -227,8 +237,10 @@ tgafb_set_par(struct fb_info *info) | |||
227 | BT485_WRITE(par, 0x00, BT485_ADDR_PAL_WRITE); | 237 | BT485_WRITE(par, 0x00, BT485_ADDR_PAL_WRITE); |
228 | TGA_WRITE_REG(par, BT485_DATA_PAL, TGA_RAMDAC_SETUP_REG); | 238 | TGA_WRITE_REG(par, BT485_DATA_PAL, TGA_RAMDAC_SETUP_REG); |
229 | 239 | ||
240 | #ifdef CONFIG_HW_CONSOLE | ||
230 | for (i = 0; i < 16; i++) { | 241 | for (i = 0; i < 16; i++) { |
231 | j = color_table[i]; | 242 | int j = color_table[i]; |
243 | |||
232 | TGA_WRITE_REG(par, default_red[j]|(BT485_DATA_PAL<<8), | 244 | TGA_WRITE_REG(par, default_red[j]|(BT485_DATA_PAL<<8), |
233 | TGA_RAMDAC_REG); | 245 | TGA_RAMDAC_REG); |
234 | TGA_WRITE_REG(par, default_grn[j]|(BT485_DATA_PAL<<8), | 246 | TGA_WRITE_REG(par, default_grn[j]|(BT485_DATA_PAL<<8), |
@@ -236,24 +248,27 @@ tgafb_set_par(struct fb_info *info) | |||
236 | TGA_WRITE_REG(par, default_blu[j]|(BT485_DATA_PAL<<8), | 248 | TGA_WRITE_REG(par, default_blu[j]|(BT485_DATA_PAL<<8), |
237 | TGA_RAMDAC_REG); | 249 | TGA_RAMDAC_REG); |
238 | } | 250 | } |
239 | for (i = 0; i < 240*3; i += 4) { | 251 | for (i = 0; i < 240 * 3; i += 4) { |
240 | TGA_WRITE_REG(par, 0x55|(BT485_DATA_PAL<<8), | 252 | #else |
253 | for (i = 0; i < 256 * 3; i += 4) { | ||
254 | #endif | ||
255 | TGA_WRITE_REG(par, 0x55 | (BT485_DATA_PAL << 8), | ||
241 | TGA_RAMDAC_REG); | 256 | TGA_RAMDAC_REG); |
242 | TGA_WRITE_REG(par, 0x00|(BT485_DATA_PAL<<8), | 257 | TGA_WRITE_REG(par, 0x00 | (BT485_DATA_PAL << 8), |
243 | TGA_RAMDAC_REG); | 258 | TGA_RAMDAC_REG); |
244 | TGA_WRITE_REG(par, 0x00|(BT485_DATA_PAL<<8), | 259 | TGA_WRITE_REG(par, 0x00 | (BT485_DATA_PAL << 8), |
245 | TGA_RAMDAC_REG); | 260 | TGA_RAMDAC_REG); |
246 | TGA_WRITE_REG(par, 0x00|(BT485_DATA_PAL<<8), | 261 | TGA_WRITE_REG(par, 0x00 | (BT485_DATA_PAL << 8), |
247 | TGA_RAMDAC_REG); | 262 | TGA_RAMDAC_REG); |
248 | } | 263 | } |
249 | 264 | ||
250 | } else { /* 24-plane or 24plusZ */ | 265 | } else { /* 24-plane or 24plusZ */ |
251 | 266 | ||
252 | /* Init BT463 registers. */ | 267 | /* Init BT463 RAMDAC registers. */ |
253 | BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_0, 0x40); | 268 | BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_0, 0x40); |
254 | BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_1, 0x08); | 269 | BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_1, 0x08); |
255 | BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_2, | 270 | BT463_WRITE(par, BT463_REG_ACC, BT463_CMD_REG_2, |
256 | (par->sync_on_green ? 0x80 : 0x40)); | 271 | (par->sync_on_green ? 0xc0 : 0x40)); |
257 | 272 | ||
258 | BT463_WRITE(par, BT463_REG_ACC, BT463_READ_MASK_0, 0xff); | 273 | BT463_WRITE(par, BT463_REG_ACC, BT463_READ_MASK_0, 0xff); |
259 | BT463_WRITE(par, BT463_REG_ACC, BT463_READ_MASK_1, 0xff); | 274 | BT463_WRITE(par, BT463_REG_ACC, BT463_READ_MASK_1, 0xff); |
@@ -267,26 +282,24 @@ tgafb_set_par(struct fb_info *info) | |||
267 | 282 | ||
268 | /* Fill the palette. */ | 283 | /* Fill the palette. */ |
269 | BT463_LOAD_ADDR(par, 0x0000); | 284 | BT463_LOAD_ADDR(par, 0x0000); |
270 | TGA_WRITE_REG(par, BT463_PALETTE<<2, TGA_RAMDAC_REG); | 285 | TGA_WRITE_REG(par, BT463_PALETTE << 2, TGA_RAMDAC_SETUP_REG); |
271 | 286 | ||
287 | #ifdef CONFIG_HW_CONSOLE | ||
272 | for (i = 0; i < 16; i++) { | 288 | for (i = 0; i < 16; i++) { |
273 | j = color_table[i]; | 289 | int j = color_table[i]; |
274 | TGA_WRITE_REG(par, default_red[j]|(BT463_PALETTE<<10), | 290 | |
275 | TGA_RAMDAC_REG); | 291 | TGA_WRITE_REG(par, default_red[j], TGA_RAMDAC_REG); |
276 | TGA_WRITE_REG(par, default_grn[j]|(BT463_PALETTE<<10), | 292 | TGA_WRITE_REG(par, default_grn[j], TGA_RAMDAC_REG); |
277 | TGA_RAMDAC_REG); | 293 | TGA_WRITE_REG(par, default_blu[j], TGA_RAMDAC_REG); |
278 | TGA_WRITE_REG(par, default_blu[j]|(BT463_PALETTE<<10), | ||
279 | TGA_RAMDAC_REG); | ||
280 | } | 294 | } |
281 | for (i = 0; i < 512*3; i += 4) { | 295 | for (i = 0; i < 512 * 3; i += 4) { |
282 | TGA_WRITE_REG(par, 0x55|(BT463_PALETTE<<10), | 296 | #else |
283 | TGA_RAMDAC_REG); | 297 | for (i = 0; i < 528 * 3; i += 4) { |
284 | TGA_WRITE_REG(par, 0x00|(BT463_PALETTE<<10), | 298 | #endif |
285 | TGA_RAMDAC_REG); | 299 | TGA_WRITE_REG(par, 0x55, TGA_RAMDAC_REG); |
286 | TGA_WRITE_REG(par, 0x00|(BT463_PALETTE<<10), | 300 | TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG); |
287 | TGA_RAMDAC_REG); | 301 | TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG); |
288 | TGA_WRITE_REG(par, 0x00|(BT463_PALETTE<<10), | 302 | TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG); |
289 | TGA_RAMDAC_REG); | ||
290 | } | 303 | } |
291 | 304 | ||
292 | /* Fill window type table after start of vertical retrace. */ | 305 | /* Fill window type table after start of vertical retrace. */ |
@@ -299,15 +312,12 @@ tgafb_set_par(struct fb_info *info) | |||
299 | TGA_WRITE_REG(par, 0x01, TGA_INTR_STAT_REG); | 312 | TGA_WRITE_REG(par, 0x01, TGA_INTR_STAT_REG); |
300 | 313 | ||
301 | BT463_LOAD_ADDR(par, BT463_WINDOW_TYPE_BASE); | 314 | BT463_LOAD_ADDR(par, BT463_WINDOW_TYPE_BASE); |
302 | TGA_WRITE_REG(par, BT463_REG_ACC<<2, TGA_RAMDAC_SETUP_REG); | 315 | TGA_WRITE_REG(par, BT463_REG_ACC << 2, TGA_RAMDAC_SETUP_REG); |
303 | 316 | ||
304 | for (i = 0; i < 16; i++) { | 317 | for (i = 0; i < 16; i++) { |
305 | TGA_WRITE_REG(par, 0x00|(BT463_REG_ACC<<10), | 318 | TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG); |
306 | TGA_RAMDAC_REG); | 319 | TGA_WRITE_REG(par, 0x01, TGA_RAMDAC_REG); |
307 | TGA_WRITE_REG(par, 0x01|(BT463_REG_ACC<<10), | 320 | TGA_WRITE_REG(par, 0x00, TGA_RAMDAC_REG); |
308 | TGA_RAMDAC_REG); | ||
309 | TGA_WRITE_REG(par, 0x80|(BT463_REG_ACC<<10), | ||
310 | TGA_RAMDAC_REG); | ||
311 | } | 321 | } |
312 | 322 | ||
313 | } | 323 | } |
@@ -435,9 +445,16 @@ tgafb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue, | |||
435 | TGA_WRITE_REG(par, red|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG); | 445 | TGA_WRITE_REG(par, red|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG); |
436 | TGA_WRITE_REG(par, green|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG); | 446 | TGA_WRITE_REG(par, green|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG); |
437 | TGA_WRITE_REG(par, blue|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG); | 447 | TGA_WRITE_REG(par, blue|(BT485_DATA_PAL<<8),TGA_RAMDAC_REG); |
438 | } else if (regno < 16) { | 448 | } else { |
439 | u32 value = (red << 16) | (green << 8) | blue; | 449 | if (regno < 16) { |
440 | ((u32 *)info->pseudo_palette)[regno] = value; | 450 | u32 value = (regno << 16) | (regno << 8) | regno; |
451 | ((u32 *)info->pseudo_palette)[regno] = value; | ||
452 | } | ||
453 | BT463_LOAD_ADDR(par, regno); | ||
454 | TGA_WRITE_REG(par, BT463_PALETTE << 2, TGA_RAMDAC_SETUP_REG); | ||
455 | TGA_WRITE_REG(par, red, TGA_RAMDAC_REG); | ||
456 | TGA_WRITE_REG(par, green, TGA_RAMDAC_REG); | ||
457 | TGA_WRITE_REG(par, blue, TGA_RAMDAC_REG); | ||
441 | } | 458 | } |
442 | 459 | ||
443 | return 0; | 460 | return 0; |
@@ -885,7 +902,7 @@ copyarea_line_8bpp(struct fb_info *info, u32 dy, u32 sy, | |||
885 | 902 | ||
886 | n64 = (height * width) / 64; | 903 | n64 = (height * width) / 64; |
887 | 904 | ||
888 | if (dy < sy) { | 905 | if (sy < dy) { |
889 | spos = (sy + height) * width; | 906 | spos = (sy + height) * width; |
890 | dpos = (dy + height) * width; | 907 | dpos = (dy + height) * width; |
891 | 908 | ||
@@ -933,7 +950,7 @@ copyarea_line_32bpp(struct fb_info *info, u32 dy, u32 sy, | |||
933 | 950 | ||
934 | n16 = (height * width) / 16; | 951 | n16 = (height * width) / 16; |
935 | 952 | ||
936 | if (dy < sy) { | 953 | if (sy < dy) { |
937 | src = tga_fb + (sy + height) * width * 4; | 954 | src = tga_fb + (sy + height) * width * 4; |
938 | dst = tga_fb + (dy + height) * width * 4; | 955 | dst = tga_fb + (dy + height) * width * 4; |
939 | 956 | ||
@@ -1317,7 +1334,7 @@ tgafb_init_fix(struct fb_info *info) | |||
1317 | info->fix.type_aux = 0; | 1334 | info->fix.type_aux = 0; |
1318 | info->fix.visual = (tga_type == TGA_TYPE_8PLANE | 1335 | info->fix.visual = (tga_type == TGA_TYPE_8PLANE |
1319 | ? FB_VISUAL_PSEUDOCOLOR | 1336 | ? FB_VISUAL_PSEUDOCOLOR |
1320 | : FB_VISUAL_TRUECOLOR); | 1337 | : FB_VISUAL_DIRECTCOLOR); |
1321 | 1338 | ||
1322 | info->fix.line_length = par->xres * (par->bits_per_pixel >> 3); | 1339 | info->fix.line_length = par->xres * (par->bits_per_pixel >> 3); |
1323 | info->fix.smem_start = (size_t) par->tga_fb_base; | 1340 | info->fix.smem_start = (size_t) par->tga_fb_base; |
@@ -1342,14 +1359,10 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1342 | TGA_24PLUSZ_FB_OFFSET | 1359 | TGA_24PLUSZ_FB_OFFSET |
1343 | }; | 1360 | }; |
1344 | 1361 | ||
1345 | struct all_info { | ||
1346 | struct fb_info info; | ||
1347 | struct tga_par par; | ||
1348 | u32 pseudo_palette[16]; | ||
1349 | } *all; | ||
1350 | |||
1351 | void __iomem *mem_base; | 1362 | void __iomem *mem_base; |
1352 | unsigned long bar0_start, bar0_len; | 1363 | unsigned long bar0_start, bar0_len; |
1364 | struct fb_info *info; | ||
1365 | struct tga_par *par; | ||
1353 | u8 tga_type; | 1366 | u8 tga_type; |
1354 | int ret; | 1367 | int ret; |
1355 | 1368 | ||
@@ -1360,13 +1373,14 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1360 | } | 1373 | } |
1361 | 1374 | ||
1362 | /* Allocate the fb and par structures. */ | 1375 | /* Allocate the fb and par structures. */ |
1363 | all = kmalloc(sizeof(*all), GFP_KERNEL); | 1376 | info = framebuffer_alloc(sizeof(struct tga_par), &pdev->dev); |
1364 | if (!all) { | 1377 | if (!info) { |
1365 | printk(KERN_ERR "tgafb: Cannot allocate memory\n"); | 1378 | printk(KERN_ERR "tgafb: Cannot allocate memory\n"); |
1366 | return -ENOMEM; | 1379 | return -ENOMEM; |
1367 | } | 1380 | } |
1368 | memset(all, 0, sizeof(*all)); | 1381 | |
1369 | pci_set_drvdata(pdev, all); | 1382 | par = info->par; |
1383 | pci_set_drvdata(pdev, info); | ||
1370 | 1384 | ||
1371 | /* Request the mem regions. */ | 1385 | /* Request the mem regions. */ |
1372 | bar0_start = pci_resource_start(pdev, 0); | 1386 | bar0_start = pci_resource_start(pdev, 0); |
@@ -1386,25 +1400,23 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1386 | 1400 | ||
1387 | /* Grab info about the card. */ | 1401 | /* Grab info about the card. */ |
1388 | tga_type = (readl(mem_base) >> 12) & 0x0f; | 1402 | tga_type = (readl(mem_base) >> 12) & 0x0f; |
1389 | all->par.pdev = pdev; | 1403 | par->pdev = pdev; |
1390 | all->par.tga_mem_base = mem_base; | 1404 | par->tga_mem_base = mem_base; |
1391 | all->par.tga_fb_base = mem_base + fb_offset_presets[tga_type]; | 1405 | par->tga_fb_base = mem_base + fb_offset_presets[tga_type]; |
1392 | all->par.tga_regs_base = mem_base + TGA_REGS_OFFSET; | 1406 | par->tga_regs_base = mem_base + TGA_REGS_OFFSET; |
1393 | all->par.tga_type = tga_type; | 1407 | par->tga_type = tga_type; |
1394 | pci_read_config_byte(pdev, PCI_REVISION_ID, &all->par.tga_chip_rev); | 1408 | pci_read_config_byte(pdev, PCI_REVISION_ID, &par->tga_chip_rev); |
1395 | 1409 | ||
1396 | /* Setup framebuffer. */ | 1410 | /* Setup framebuffer. */ |
1397 | all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA | | 1411 | info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_COPYAREA | |
1398 | FBINFO_HWACCEL_IMAGEBLIT | FBINFO_HWACCEL_FILLRECT; | 1412 | FBINFO_HWACCEL_IMAGEBLIT | FBINFO_HWACCEL_FILLRECT; |
1399 | all->info.fbops = &tgafb_ops; | 1413 | info->fbops = &tgafb_ops; |
1400 | all->info.screen_base = all->par.tga_fb_base; | 1414 | info->screen_base = par->tga_fb_base; |
1401 | all->info.par = &all->par; | 1415 | info->pseudo_palette = (void *)(par + 1); |
1402 | all->info.pseudo_palette = all->pseudo_palette; | ||
1403 | 1416 | ||
1404 | /* This should give a reasonable default video mode. */ | 1417 | /* This should give a reasonable default video mode. */ |
1405 | 1418 | ||
1406 | ret = fb_find_mode(&all->info.var, &all->info, mode_option, | 1419 | ret = fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL, |
1407 | NULL, 0, NULL, | ||
1408 | tga_type == TGA_TYPE_8PLANE ? 8 : 32); | 1420 | tga_type == TGA_TYPE_8PLANE ? 8 : 32); |
1409 | if (ret == 0 || ret == 4) { | 1421 | if (ret == 0 || ret == 4) { |
1410 | printk(KERN_ERR "tgafb: Could not find valid video mode\n"); | 1422 | printk(KERN_ERR "tgafb: Could not find valid video mode\n"); |
@@ -1412,29 +1424,28 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1412 | goto err1; | 1424 | goto err1; |
1413 | } | 1425 | } |
1414 | 1426 | ||
1415 | if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { | 1427 | if (fb_alloc_cmap(&info->cmap, 256, 0)) { |
1416 | printk(KERN_ERR "tgafb: Could not allocate color map\n"); | 1428 | printk(KERN_ERR "tgafb: Could not allocate color map\n"); |
1417 | ret = -ENOMEM; | 1429 | ret = -ENOMEM; |
1418 | goto err1; | 1430 | goto err1; |
1419 | } | 1431 | } |
1420 | 1432 | ||
1421 | tgafb_set_par(&all->info); | 1433 | tgafb_set_par(info); |
1422 | tgafb_init_fix(&all->info); | 1434 | tgafb_init_fix(info); |
1423 | 1435 | ||
1424 | all->info.device = &pdev->dev; | 1436 | if (register_framebuffer(info) < 0) { |
1425 | if (register_framebuffer(&all->info) < 0) { | ||
1426 | printk(KERN_ERR "tgafb: Could not register framebuffer\n"); | 1437 | printk(KERN_ERR "tgafb: Could not register framebuffer\n"); |
1427 | ret = -EINVAL; | 1438 | ret = -EINVAL; |
1428 | goto err1; | 1439 | goto err1; |
1429 | } | 1440 | } |
1430 | 1441 | ||
1431 | printk(KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n", | 1442 | printk(KERN_INFO "tgafb: DC21030 [TGA] detected, rev=0x%02x\n", |
1432 | all->par.tga_chip_rev); | 1443 | par->tga_chip_rev); |
1433 | printk(KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n", | 1444 | printk(KERN_INFO "tgafb: at PCI bus %d, device %d, function %d\n", |
1434 | pdev->bus->number, PCI_SLOT(pdev->devfn), | 1445 | pdev->bus->number, PCI_SLOT(pdev->devfn), |
1435 | PCI_FUNC(pdev->devfn)); | 1446 | PCI_FUNC(pdev->devfn)); |
1436 | printk(KERN_INFO "fb%d: %s frame buffer device at 0x%lx\n", | 1447 | printk(KERN_INFO "fb%d: %s frame buffer device at 0x%lx\n", |
1437 | all->info.node, all->info.fix.id, bar0_start); | 1448 | info->node, info->fix.id, bar0_start); |
1438 | 1449 | ||
1439 | return 0; | 1450 | return 0; |
1440 | 1451 | ||
@@ -1443,11 +1454,11 @@ tgafb_pci_register(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1443 | iounmap(mem_base); | 1454 | iounmap(mem_base); |
1444 | release_mem_region(bar0_start, bar0_len); | 1455 | release_mem_region(bar0_start, bar0_len); |
1445 | err0: | 1456 | err0: |
1446 | kfree(all); | 1457 | framebuffer_release(info); |
1447 | return ret; | 1458 | return ret; |
1448 | } | 1459 | } |
1449 | 1460 | ||
1450 | static void __exit | 1461 | static void __devexit |
1451 | tgafb_pci_unregister(struct pci_dev *pdev) | 1462 | tgafb_pci_unregister(struct pci_dev *pdev) |
1452 | { | 1463 | { |
1453 | struct fb_info *info = pci_get_drvdata(pdev); | 1464 | struct fb_info *info = pci_get_drvdata(pdev); |
@@ -1456,22 +1467,21 @@ tgafb_pci_unregister(struct pci_dev *pdev) | |||
1456 | if (!info) | 1467 | if (!info) |
1457 | return; | 1468 | return; |
1458 | unregister_framebuffer(info); | 1469 | unregister_framebuffer(info); |
1470 | fb_dealloc_cmap(&info->cmap); | ||
1459 | iounmap(par->tga_mem_base); | 1471 | iounmap(par->tga_mem_base); |
1460 | release_mem_region(pci_resource_start(pdev, 0), | 1472 | release_mem_region(pci_resource_start(pdev, 0), |
1461 | pci_resource_len(pdev, 0)); | 1473 | pci_resource_len(pdev, 0)); |
1462 | kfree(info); | 1474 | framebuffer_release(info); |
1463 | } | 1475 | } |
1464 | 1476 | ||
1465 | #ifdef MODULE | 1477 | static void __devexit |
1466 | static void __exit | ||
1467 | tgafb_exit(void) | 1478 | tgafb_exit(void) |
1468 | { | 1479 | { |
1469 | pci_unregister_driver(&tgafb_driver); | 1480 | pci_unregister_driver(&tgafb_driver); |
1470 | } | 1481 | } |
1471 | #endif /* MODULE */ | ||
1472 | 1482 | ||
1473 | #ifndef MODULE | 1483 | #ifndef MODULE |
1474 | int __init | 1484 | static int __devinit |
1475 | tgafb_setup(char *arg) | 1485 | tgafb_setup(char *arg) |
1476 | { | 1486 | { |
1477 | char *this_opt; | 1487 | char *this_opt; |
@@ -1493,7 +1503,7 @@ tgafb_setup(char *arg) | |||
1493 | } | 1503 | } |
1494 | #endif /* !MODULE */ | 1504 | #endif /* !MODULE */ |
1495 | 1505 | ||
1496 | int __init | 1506 | static int __devinit |
1497 | tgafb_init(void) | 1507 | tgafb_init(void) |
1498 | { | 1508 | { |
1499 | #ifndef MODULE | 1509 | #ifndef MODULE |
@@ -1511,10 +1521,7 @@ tgafb_init(void) | |||
1511 | */ | 1521 | */ |
1512 | 1522 | ||
1513 | module_init(tgafb_init); | 1523 | module_init(tgafb_init); |
1514 | |||
1515 | #ifdef MODULE | ||
1516 | module_exit(tgafb_exit); | 1524 | module_exit(tgafb_exit); |
1517 | #endif | ||
1518 | 1525 | ||
1519 | MODULE_DESCRIPTION("framebuffer driver for TGA chipset"); | 1526 | MODULE_DESCRIPTION("framebuffer driver for TGA chipset"); |
1520 | MODULE_LICENSE("GPL"); | 1527 | MODULE_LICENSE("GPL"); |
diff --git a/drivers/video/vga16fb.c b/drivers/video/vga16fb.c index 6aff63d5b295..ec4c7dc54a66 100644 --- a/drivers/video/vga16fb.c +++ b/drivers/video/vga16fb.c | |||
@@ -70,7 +70,8 @@ struct vga16fb_par { | |||
70 | unsigned char ClockingMode; /* Seq-Controller:01h */ | 70 | unsigned char ClockingMode; /* Seq-Controller:01h */ |
71 | } vga_state; | 71 | } vga_state; |
72 | struct vgastate state; | 72 | struct vgastate state; |
73 | atomic_t ref_count; | 73 | struct mutex open_lock; |
74 | unsigned int ref_count; | ||
74 | int palette_blanked, vesa_blanked, mode, isVGA; | 75 | int palette_blanked, vesa_blanked, mode, isVGA; |
75 | u8 misc, pel_msk, vss, clkdiv; | 76 | u8 misc, pel_msk, vss, clkdiv; |
76 | u8 crtc[VGA_CRT_C]; | 77 | u8 crtc[VGA_CRT_C]; |
@@ -300,28 +301,33 @@ static void vga16fb_clock_chip(struct vga16fb_par *par, | |||
300 | static int vga16fb_open(struct fb_info *info, int user) | 301 | static int vga16fb_open(struct fb_info *info, int user) |
301 | { | 302 | { |
302 | struct vga16fb_par *par = info->par; | 303 | struct vga16fb_par *par = info->par; |
303 | int cnt = atomic_read(&par->ref_count); | ||
304 | 304 | ||
305 | if (!cnt) { | 305 | mutex_lock(&par->open_lock); |
306 | if (!par->ref_count) { | ||
306 | memset(&par->state, 0, sizeof(struct vgastate)); | 307 | memset(&par->state, 0, sizeof(struct vgastate)); |
307 | par->state.flags = VGA_SAVE_FONTS | VGA_SAVE_MODE | | 308 | par->state.flags = VGA_SAVE_FONTS | VGA_SAVE_MODE | |
308 | VGA_SAVE_CMAP; | 309 | VGA_SAVE_CMAP; |
309 | save_vga(&par->state); | 310 | save_vga(&par->state); |
310 | } | 311 | } |
311 | atomic_inc(&par->ref_count); | 312 | par->ref_count++; |
313 | mutex_unlock(&par->open_lock); | ||
314 | |||
312 | return 0; | 315 | return 0; |
313 | } | 316 | } |
314 | 317 | ||
315 | static int vga16fb_release(struct fb_info *info, int user) | 318 | static int vga16fb_release(struct fb_info *info, int user) |
316 | { | 319 | { |
317 | struct vga16fb_par *par = info->par; | 320 | struct vga16fb_par *par = info->par; |
318 | int cnt = atomic_read(&par->ref_count); | ||
319 | 321 | ||
320 | if (!cnt) | 322 | mutex_lock(&par->open_lock); |
323 | if (!par->ref_count) { | ||
324 | mutex_unlock(&par->open_lock); | ||
321 | return -EINVAL; | 325 | return -EINVAL; |
322 | if (cnt == 1) | 326 | } |
327 | if (par->ref_count == 1) | ||
323 | restore_vga(&par->state); | 328 | restore_vga(&par->state); |
324 | atomic_dec(&par->ref_count); | 329 | par->ref_count--; |
330 | mutex_unlock(&par->open_lock); | ||
325 | 331 | ||
326 | return 0; | 332 | return 0; |
327 | } | 333 | } |
@@ -1357,6 +1363,7 @@ static int __init vga16fb_probe(struct platform_device *dev) | |||
1357 | printk(KERN_INFO "vga16fb: mapped to 0x%p\n", info->screen_base); | 1363 | printk(KERN_INFO "vga16fb: mapped to 0x%p\n", info->screen_base); |
1358 | par = info->par; | 1364 | par = info->par; |
1359 | 1365 | ||
1366 | mutex_init(&par->open_lock); | ||
1360 | par->isVGA = ORIG_VIDEO_ISVGA; | 1367 | par->isVGA = ORIG_VIDEO_ISVGA; |
1361 | par->palette_blanked = 0; | 1368 | par->palette_blanked = 0; |
1362 | par->vesa_blanked = 0; | 1369 | par->vesa_blanked = 0; |
diff --git a/drivers/video/virgefb.c b/drivers/video/virgefb.c deleted file mode 100644 index b9fb6fb3600d..000000000000 --- a/drivers/video/virgefb.c +++ /dev/null | |||
@@ -1,2526 +0,0 @@ | |||
1 | /* | ||
2 | * linux/drivers/video/virgefb.c -- CyberVision64/3D frame buffer device | ||
3 | * | ||
4 | * Copyright (C) 1997 André Heynatz | ||
5 | * | ||
6 | * | ||
7 | * This file is based on the CyberVision frame buffer device (cyberfb.c): | ||
8 | * | ||
9 | * Copyright (C) 1996 Martin Apel | ||
10 | * Geert Uytterhoeven | ||
11 | * | ||
12 | * Zorro II additions : | ||
13 | * | ||
14 | * Copyright (C) 1998-2000 Christian T. Steigies | ||
15 | * | ||
16 | * Initialization additions : | ||
17 | * | ||
18 | * Copyright (C) 1998-2000 Ken Tyler | ||
19 | * | ||
20 | * Parts of the Initialization code are based on Cyberfb.c by Allan Bair, | ||
21 | * and on the NetBSD CyberVision64 frame buffer driver by Michael Teske who gave | ||
22 | * permission for its use. | ||
23 | * | ||
24 | * Many thanks to Frank Mariak for his assistance with ZORRO 2 access and other | ||
25 | * mysteries. | ||
26 | * | ||
27 | * | ||
28 | * | ||
29 | * This file is subject to the terms and conditions of the GNU General Public | ||
30 | * License. See the file COPYING in the main directory of this archive | ||
31 | * for more details. | ||
32 | */ | ||
33 | |||
34 | #undef VIRGEFBDEBUG | ||
35 | #undef VIRGEFBDUMP | ||
36 | |||
37 | #include <linux/module.h> | ||
38 | #include <linux/kernel.h> | ||
39 | #include <linux/errno.h> | ||
40 | #include <linux/string.h> | ||
41 | #include <linux/mm.h> | ||
42 | #include <linux/slab.h> | ||
43 | #include <linux/delay.h> | ||
44 | #include <linux/zorro.h> | ||
45 | #include <linux/fb.h> | ||
46 | #include <linux/init.h> | ||
47 | #include <asm/uaccess.h> | ||
48 | #include <asm/system.h> | ||
49 | #include <asm/amigahw.h> | ||
50 | #include <asm/io.h> | ||
51 | #include <asm/irq.h> | ||
52 | #include <video/fbcon.h> | ||
53 | #include <video/fbcon-cfb8.h> | ||
54 | #include <video/fbcon-cfb16.h> | ||
55 | #include <video/fbcon-cfb32.h> | ||
56 | |||
57 | #include "virgefb.h" | ||
58 | |||
59 | #ifdef VIRGEFBDEBUG | ||
60 | #define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) | ||
61 | #else | ||
62 | #define DPRINTK(fmt, args...) | ||
63 | #endif | ||
64 | |||
65 | #ifdef VIRGEFBDUMP | ||
66 | static void cv64_dump(void); | ||
67 | #define DUMP cv64_dump() | ||
68 | #else | ||
69 | #define DUMP | ||
70 | #endif | ||
71 | |||
72 | /* | ||
73 | * Macros for register access and zorro control | ||
74 | */ | ||
75 | |||
76 | static inline void mb_inline(void) { mb(); } /* for use in comma expressions */ | ||
77 | |||
78 | /* Set zorro 2 map */ | ||
79 | |||
80 | #define SelectIO \ | ||
81 | mb(); \ | ||
82 | if (on_zorro2) { \ | ||
83 | (*(volatile u16 *)((u8 *)(vcode_switch_base + 0x04)) = 0x01); \ | ||
84 | mb(); \ | ||
85 | } | ||
86 | |||
87 | #define SelectMMIO \ | ||
88 | mb(); \ | ||
89 | if (on_zorro2) { \ | ||
90 | (*(volatile u16 *)((u8 *)(vcode_switch_base + 0x04)) = 0x02); \ | ||
91 | mb(); \ | ||
92 | } | ||
93 | |||
94 | #define SelectCFG \ | ||
95 | mb(); \ | ||
96 | if (on_zorro2) { \ | ||
97 | (*(volatile u16 *)((u8 *)(vcode_switch_base + 0x04)) = 0x03); \ | ||
98 | mb(); \ | ||
99 | } | ||
100 | |||
101 | /* Set pass through, 0 = amiga, !=0 = cv64/3d */ | ||
102 | |||
103 | #define SetVSwitch(x) \ | ||
104 | mb(); \ | ||
105 | (*(volatile u16 *)((u8 *)(vcode_switch_base)) = \ | ||
106 | (u16)(x ? 0 : 1)); \ | ||
107 | mb(); | ||
108 | |||
109 | /* Zorro2 endian 'aperture' */ | ||
110 | |||
111 | #define ENDIAN_BYTE 2 | ||
112 | #define ENDIAN_WORD 1 | ||
113 | #define ENDIAN_LONG 0 | ||
114 | |||
115 | #define Select_Zorro2_FrameBuffer(x) \ | ||
116 | do { \ | ||
117 | if (on_zorro2) { \ | ||
118 | mb(); \ | ||
119 | (*(volatile u16 *)((u8 *)(vcode_switch_base + 0x08)) = \ | ||
120 | (x * 0x40)); \ | ||
121 | mb(); \ | ||
122 | } \ | ||
123 | } while (0) | ||
124 | |||
125 | /* SetPortVal - only used for interrupt enable (not yet implemented) */ | ||
126 | |||
127 | #if 0 | ||
128 | #define SetPortVal(x) \ | ||
129 | mb(); \ | ||
130 | (*(volatile u16 *)((u8 *)(vcode_switch_base + 0x0c)) = \ | ||
131 | (u16)x); \ | ||
132 | mb(); | ||
133 | #endif | ||
134 | |||
135 | /* IO access */ | ||
136 | |||
137 | #define byte_access_io(x) (((x) & 0x3ffc) | (((x) & 3)^3) | (((x) & 3) <<14)) | ||
138 | #define byte_access_mmio(x) (((x) & 0xfffc) | (((x) & 3)^3)) | ||
139 | |||
140 | /* Write 8 bit VGA register - used once for chip wakeup */ | ||
141 | |||
142 | #define wb_vgaio(reg, dat) \ | ||
143 | SelectIO; \ | ||
144 | (*(volatile u8 *)(vgaio_regs + ((u32)byte_access_io(reg) & 0xffff)) = \ | ||
145 | (dat & 0xff)); \ | ||
146 | SelectMMIO; | ||
147 | |||
148 | /* Read 8 bit VGA register - only used in dump (SelectIO not needed on read ?) */ | ||
149 | |||
150 | #ifdef VIRGEFBDUMP | ||
151 | #define rb_vgaio(reg) \ | ||
152 | ({ \ | ||
153 | u8 __zzyzx; \ | ||
154 | SelectIO; \ | ||
155 | __zzyzx = (*(volatile u8 *)((vgaio_regs)+(u32)byte_access_io(reg))); \ | ||
156 | SelectMMIO; \ | ||
157 | __zzyzx; \ | ||
158 | }) | ||
159 | #endif | ||
160 | |||
161 | /* MMIO access */ | ||
162 | |||
163 | /* Read 8 bit MMIO register */ | ||
164 | |||
165 | #define rb_mmio(reg) \ | ||
166 | (mb_inline(), \ | ||
167 | (*(volatile u8 *)(mmio_regs + 0x8000 + (u32)byte_access_mmio(reg)))) | ||
168 | |||
169 | /* Write 8 bit MMIO register */ | ||
170 | |||
171 | #define wb_mmio(reg,dat) \ | ||
172 | mb(); \ | ||
173 | (*(volatile u8 *)(mmio_regs + 0x8000 + (byte_access_mmio((reg) & 0xffff))) = \ | ||
174 | (dat & 0xff)); \ | ||
175 | mb(); | ||
176 | |||
177 | /* Read 32 bit MMIO register */ | ||
178 | |||
179 | #define rl_mmio(reg) \ | ||
180 | (mb_inline(), \ | ||
181 | (*((volatile u32 *)((u8 *)((mmio_regs + (on_zorro2 ? 0x20000 : 0)) + (reg)))))) | ||
182 | |||
183 | /* Write 32 bit MMIO register */ | ||
184 | |||
185 | #define wl_mmio(reg,dat) \ | ||
186 | mb(); \ | ||
187 | ((*(volatile u32 *)((u8 *)((mmio_regs + (on_zorro2 ? 0x20000 : 0)) + (reg)))) = \ | ||
188 | (u32)(dat)); \ | ||
189 | mb(); | ||
190 | |||
191 | /* Write to virge graphics register */ | ||
192 | |||
193 | #define wgfx(reg, dat) do { wb_mmio(GCT_ADDRESS, (reg)); wb_mmio(GCT_ADDRESS_W, (dat)); } while (0) | ||
194 | |||
195 | /* Write to virge sequencer register */ | ||
196 | |||
197 | #define wseq(reg, dat) do { wb_mmio(SEQ_ADDRESS, (reg)); wb_mmio(SEQ_ADDRESS_W, (dat)); } while (0) | ||
198 | |||
199 | /* Write to virge CRT controller register */ | ||
200 | |||
201 | #define wcrt(reg, dat) do { wb_mmio(CRT_ADDRESS, (reg)); wb_mmio(CRT_ADDRESS_W, (dat)); } while (0) | ||
202 | |||
203 | /* Write to virge attribute register */ | ||
204 | |||
205 | #define watr(reg, dat) \ | ||
206 | do { \ | ||
207 | volatile unsigned char watr_tmp; \ | ||
208 | watr_tmp = rb_mmio(ACT_ADDRESS_RESET); \ | ||
209 | wb_mmio(ACT_ADDRESS_W, (reg)); \ | ||
210 | wb_mmio(ACT_ADDRESS_W, (dat)); \ | ||
211 | udelay(10); \ | ||
212 | } while (0) | ||
213 | |||
214 | /* end of macros */ | ||
215 | |||
216 | struct virgefb_par { | ||
217 | struct fb_var_screeninfo var; | ||
218 | __u32 type; | ||
219 | __u32 type_aux; | ||
220 | __u32 visual; | ||
221 | __u32 line_length; | ||
222 | }; | ||
223 | |||
224 | static struct virgefb_par current_par; | ||
225 | |||
226 | static int current_par_valid = 0; | ||
227 | |||
228 | static struct display disp; | ||
229 | static struct fb_info fb_info; | ||
230 | |||
231 | static union { | ||
232 | #ifdef FBCON_HAS_CFB16 | ||
233 | u16 cfb16[16]; | ||
234 | #endif | ||
235 | #ifdef FBCON_HAS_CFB32 | ||
236 | u32 cfb32[16]; | ||
237 | #endif | ||
238 | } fbcon_cmap; | ||
239 | |||
240 | /* | ||
241 | * Switch for Chipset Independency | ||
242 | */ | ||
243 | |||
244 | static struct fb_hwswitch { | ||
245 | |||
246 | /* Initialisation */ | ||
247 | |||
248 | int (*init)(void); | ||
249 | |||
250 | /* Display Control */ | ||
251 | |||
252 | int (*encode_fix)(struct fb_fix_screeninfo *fix, struct virgefb_par *par); | ||
253 | int (*decode_var)(struct fb_var_screeninfo *var, struct virgefb_par *par); | ||
254 | int (*encode_var)(struct fb_var_screeninfo *var, struct virgefb_par *par); | ||
255 | int (*getcolreg)(u_int regno, u_int *red, u_int *green, u_int *blue, | ||
256 | u_int *transp, struct fb_info *info); | ||
257 | void (*blank)(int blank); | ||
258 | } *fbhw; | ||
259 | |||
260 | static unsigned char blit_maybe_busy = 0; | ||
261 | |||
262 | /* | ||
263 | * Frame Buffer Name | ||
264 | */ | ||
265 | |||
266 | static char virgefb_name[16] = "CyberVision/3D"; | ||
267 | |||
268 | /* | ||
269 | * CyberVision64/3d Graphics Board | ||
270 | */ | ||
271 | |||
272 | static unsigned char virgefb_colour_table [256][3]; | ||
273 | static unsigned long v_ram; | ||
274 | static unsigned long v_ram_size; | ||
275 | static volatile unsigned char *mmio_regs; | ||
276 | static volatile unsigned char *vgaio_regs; | ||
277 | |||
278 | static unsigned long v_ram_phys; | ||
279 | static unsigned long mmio_regs_phys; | ||
280 | static unsigned long vcode_switch_base; | ||
281 | static unsigned char on_zorro2; | ||
282 | |||
283 | /* | ||
284 | * Offsets from start of video ram to appropriate ZIII aperture | ||
285 | */ | ||
286 | |||
287 | #ifdef FBCON_HAS_CFB8 | ||
288 | #define CYBMEM_OFFSET_8 0x800000 /* BGRX */ | ||
289 | #endif | ||
290 | #ifdef FBCON_HAS_CFB16 | ||
291 | #define CYBMEM_OFFSET_16 0x400000 /* GBXR */ | ||
292 | #endif | ||
293 | #ifdef FBCON_HAS_CFB32 | ||
294 | #define CYBMEM_OFFSET_32 0x000000 /* XRGB */ | ||
295 | #endif | ||
296 | |||
297 | /* | ||
298 | * MEMCLOCK was 32MHz, 64MHz works, 72MHz doesn't (on my board) | ||
299 | */ | ||
300 | |||
301 | #define MEMCLOCK 50000000 | ||
302 | |||
303 | /* | ||
304 | * Predefined Video Modes | ||
305 | */ | ||
306 | |||
307 | static struct { | ||
308 | const char *name; | ||
309 | struct fb_var_screeninfo var; | ||
310 | } virgefb_predefined[] __initdata = { | ||
311 | #ifdef FBCON_HAS_CFB8 | ||
312 | { | ||
313 | "640x480-8", { /* Cybervision 8 bpp */ | ||
314 | 640, 480, 640, 480, 0, 0, 8, 0, | ||
315 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
316 | 0, 0, -1, -1, FB_ACCELF_TEXT, 31250, 160, 136, 82, 61, 88, 2, | ||
317 | 0, FB_VMODE_NONINTERLACED | ||
318 | } | ||
319 | }, { | ||
320 | "768x576-8", { /* Cybervision 8 bpp */ | ||
321 | 768, 576, 768, 576, 0, 0, 8, 0, | ||
322 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
323 | 0, 0, -1, -1, FB_ACCELF_TEXT, 29411, 144, 112, 32, 15, 64, 2, | ||
324 | 0, FB_VMODE_NONINTERLACED | ||
325 | } | ||
326 | }, { | ||
327 | "800x600-8", { /* Cybervision 8 bpp */ | ||
328 | 800, 600, 800, 600, 0, 0, 8, 0, | ||
329 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
330 | 0, 0, -1, -1, FB_ACCELF_TEXT, 28571, 168, 104, 22, 1, 48, 2, | ||
331 | 0, FB_VMODE_NONINTERLACED | ||
332 | } | ||
333 | }, { | ||
334 | #if 0 | ||
335 | "1024x768-8", { /* Cybervision 8 bpp */ | ||
336 | 1024, 768, 1024, 768, 0, 0, 8, 0, | ||
337 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
338 | 0, 0, -1, -1, FB_ACCELF_TEXT, 20833, 272, 168, 39, 2, 72, 1, | ||
339 | 0, FB_VMODE_NONINTERLACED | ||
340 | } | ||
341 | #else | ||
342 | "1024x768-8", { | ||
343 | 1024, 768, 1024, 768, 0, 0, 8, 0, | ||
344 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
345 | #if 0 | ||
346 | 0, 0, -1, -1, FB_ACCELF_TEXT, 12500, 184, 40, 40, 2, 96, 1, | ||
347 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED | ||
348 | } | ||
349 | #else | ||
350 | 0, 0, -1, -1, FB_ACCELF_TEXT, 12699, 176, 16, 28, 1, 96, 3, | ||
351 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED | ||
352 | } | ||
353 | #endif | ||
354 | #endif | ||
355 | }, { | ||
356 | "1152x886-8", { /* Cybervision 8 bpp */ | ||
357 | 1152, 886, 1152, 886, 0, 0, 8, 0, | ||
358 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
359 | 0, 0, -1, -1, FB_ACCELF_TEXT, 19230, 280, 168, 45, 1, 64, 10, | ||
360 | 0, FB_VMODE_NONINTERLACED | ||
361 | } | ||
362 | }, { | ||
363 | "1280x1024-8", { /* Cybervision 8 bpp */ | ||
364 | 1280, 1024, 1280, 1024, 0, 0, 8, 0, | ||
365 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
366 | #if 0 | ||
367 | 0, 0, -1, -1, FB_ACCELF_TEXT, 17857, 232, 232, 71, 15, 176, 12, | ||
368 | } | ||
369 | #else | ||
370 | 0, 0, -1, -1, FB_ACCELF_TEXT, 7414, 232, 64, 38, 1, 112, 3, | ||
371 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED | ||
372 | } | ||
373 | #endif | ||
374 | }, { | ||
375 | "1600x1200-8", { /* Cybervision 8 bpp */ | ||
376 | 1600, 1200, 1600, 1200, 0, 0, 8, 0, | ||
377 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
378 | #if 0 | ||
379 | 0, 0, -1, -1, FB_ACCELF_TEXT, 13698, 336, 224, 77, 15, 176, 12, | ||
380 | 0, FB_VMODE_NONINTERLACED | ||
381 | } | ||
382 | #else | ||
383 | 0, 0, -1, -1, FB_ACCELF_TEXT, 6411, 256, 32, 52, 10, 160, 8, | ||
384 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED | ||
385 | } | ||
386 | #endif | ||
387 | }, | ||
388 | #endif | ||
389 | |||
390 | #ifdef FBCON_HAS_CFB16 | ||
391 | { | ||
392 | "640x480-16", { /* Cybervision 16 bpp */ | ||
393 | 640, 480, 640, 480, 0, 0, 16, 0, | ||
394 | {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, | ||
395 | 0, 0, -1, -1, FB_ACCELF_TEXT, 31250, 152, 144, 82, 61, 88, 2, | ||
396 | 0, FB_VMODE_NONINTERLACED | ||
397 | } | ||
398 | }, { | ||
399 | "768x576-16", { /* Cybervision 16 bpp */ | ||
400 | 768, 576, 768, 576, 0, 0, 16, 0, | ||
401 | {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, | ||
402 | 0, 0, -1, -1, FB_ACCELF_TEXT, 29411, 144, 112, 32, 15, 64, 2, | ||
403 | 0, FB_VMODE_NONINTERLACED | ||
404 | } | ||
405 | }, { | ||
406 | "800x600-16", { /* Cybervision 16 bpp */ | ||
407 | 800, 600, 800, 600, 0, 0, 16, 0, | ||
408 | {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, | ||
409 | 0, 0, -1, -1, FB_ACCELF_TEXT, 28571, 168, 104, 22, 1, 48, 2, | ||
410 | 0, FB_VMODE_NONINTERLACED | ||
411 | } | ||
412 | }, { | ||
413 | #if 0 | ||
414 | "1024x768-16", { /* Cybervision 16 bpp */ | ||
415 | 1024, 768, 1024, 768, 0, 0, 16, 0, | ||
416 | {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, | ||
417 | 0, 0, -1, -1, FB_ACCELF_TEXT, 20833, 272, 168, 39, 2, 72, 1, | ||
418 | 0, FB_VMODE_NONINTERLACED | ||
419 | } | ||
420 | #else | ||
421 | "1024x768-16", { | ||
422 | 1024, 768, 1024, 768, 0, 0, 16, 0, | ||
423 | {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, | ||
424 | 0, 0, -1, -1, FB_ACCELF_TEXT, 12500, 184, 40, 40, 2, 96, 1, | ||
425 | FB_SYNC_COMP_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, FB_VMODE_NONINTERLACED | ||
426 | } | ||
427 | #endif | ||
428 | }, { | ||
429 | "1152x886-16", { /* Cybervision 16 bpp */ | ||
430 | 1152, 886, 1152, 886, 0, 0, 16, 0, | ||
431 | {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, | ||
432 | 0, 0, -1, -1, FB_ACCELF_TEXT, 19230, 280, 168, 45, 1, 64, 10, | ||
433 | 0, FB_VMODE_NONINTERLACED | ||
434 | } | ||
435 | }, { | ||
436 | "1280x1024-16", { /* Cybervision 16 bpp */ | ||
437 | 1280, 1024, 1280, 1024, 0, 0, 16, 0, | ||
438 | {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, | ||
439 | 0, 0, -1, -1, FB_ACCELF_TEXT, 17857, 232, 232, 71, 15, 176, 12, | ||
440 | 0, FB_VMODE_NONINTERLACED | ||
441 | } | ||
442 | }, { | ||
443 | "1600x1200-16", { /* Cybervision 16 bpp */ | ||
444 | 1600, 1200, 1600, 1200, 0, 0, 16, 0, | ||
445 | {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, | ||
446 | 0, 0, -1, -1, FB_ACCELF_TEXT, 13698, 336, 224, 77, 15, 176, 12, | ||
447 | 0, FB_VMODE_NONINTERLACED | ||
448 | } | ||
449 | }, | ||
450 | #endif | ||
451 | |||
452 | #ifdef FBCON_HAS_CFB32 | ||
453 | { | ||
454 | "640x480-32", { /* Cybervision 32 bpp */ | ||
455 | 640, 480, 640, 480, 0, 0, 32, 0, | ||
456 | {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, | ||
457 | 0, 0, -1, -1, FB_ACCELF_TEXT, 31250, 160, 136, 82, 61, 88, 2, | ||
458 | 0, FB_VMODE_NONINTERLACED | ||
459 | } | ||
460 | }, { | ||
461 | "768x576-32", { /* Cybervision 32 bpp */ | ||
462 | 768, 576, 768, 576, 0, 0, 32, 0, | ||
463 | {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, | ||
464 | 0, 0, -1, -1, FB_ACCELF_TEXT, 29411, 144, 112, 32, 15, 64, 2, | ||
465 | 0, FB_VMODE_NONINTERLACED | ||
466 | } | ||
467 | }, { | ||
468 | "800x600-32", { /* Cybervision 32 bpp */ | ||
469 | 800, 600, 800, 600, 0, 0, 32, 0, | ||
470 | {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, | ||
471 | 0, 0, -1, -1, FB_ACCELF_TEXT, 28571, 168, 104, 22, 1, 48, 2, | ||
472 | 0, FB_VMODE_NONINTERLACED | ||
473 | } | ||
474 | }, { | ||
475 | "1024x768-32", { /* Cybervision 32 bpp */ | ||
476 | 1024, 768, 1024, 768, 0, 0, 32, 0, | ||
477 | {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, | ||
478 | 0, 0, -1, -1, FB_ACCELF_TEXT, 20833, 272, 168, 39, 2, 72, 1, | ||
479 | 0, FB_VMODE_NONINTERLACED | ||
480 | } | ||
481 | }, { | ||
482 | "1152x886-32", { /* Cybervision 32 bpp */ | ||
483 | 1152, 886, 1152, 886, 0, 0, 32, 0, | ||
484 | {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, | ||
485 | 0, 0, -1, -1, FB_ACCELF_TEXT, 19230, 280, 168, 45, 1, 64, 10, | ||
486 | 0, FB_VMODE_NONINTERLACED | ||
487 | } | ||
488 | }, { | ||
489 | "1280x1024-32", { /* Cybervision 32 bpp */ | ||
490 | 1280, 1024, 1280, 1024, 0, 0, 32, 0, | ||
491 | {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, | ||
492 | 0, 0, -1, -1, FB_ACCELF_TEXT, 17857, 232, 232, 71, 15, 176, 12, | ||
493 | 0, FB_VMODE_NONINTERLACED | ||
494 | } | ||
495 | }, { | ||
496 | "1600x1200-32", { /* Cybervision 32 bpp */ | ||
497 | 1600, 1200, 1600, 1200, 0, 0, 32, 0, | ||
498 | {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, | ||
499 | 0, 0, -1, -1, FB_ACCELF_TEXT, 13698, 336, 224, 77, 15, 176, 12, | ||
500 | 0, FB_VMODE_NONINTERLACED | ||
501 | } | ||
502 | }, | ||
503 | #endif | ||
504 | |||
505 | /* interlaced modes */ | ||
506 | |||
507 | #ifdef FBCON_HAS_CFB8 | ||
508 | { | ||
509 | "1024x768-8i", { /* Cybervision 8 bpp */ | ||
510 | 1024, 768, 1024, 768, 0, 0, 8, 0, | ||
511 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
512 | 0, 0, -1, -1, FB_ACCELF_TEXT, 20833, 272, 168, 39, 2, 72, 1, | ||
513 | 0, FB_VMODE_INTERLACED | ||
514 | } | ||
515 | }, { | ||
516 | "1280x1024-8i", { /* Cybervision 8 bpp */ | ||
517 | 1280, 1024, 1280, 1024, 0, 0, 8, 0, | ||
518 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
519 | 0, 0, -1, -1, FB_ACCELF_TEXT, 17857, 232, 232, 71, 15, 176, 12, | ||
520 | 0, FB_VMODE_INTERLACED | ||
521 | } | ||
522 | }, { | ||
523 | "1600x1200-8i", { /* Cybervision 8 bpp */ | ||
524 | 1600, 1200, 1600, 1200, 0, 0, 8, 0, | ||
525 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
526 | 0, 0, -1, -1, FB_ACCELF_TEXT, 13698, 336, 224, 77, 15, 176, 12, | ||
527 | 0, FB_VMODE_INTERLACED | ||
528 | } | ||
529 | }, | ||
530 | #endif | ||
531 | |||
532 | #ifdef FBCON_HAS_CFB16 | ||
533 | { | ||
534 | "1024x768-16i", { /* Cybervision 16 bpp */ | ||
535 | 1024, 768, 1024, 768, 0, 0, 16, 0, | ||
536 | {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, | ||
537 | 0, 0, -1, -1, FB_ACCELF_TEXT, 20833, 272, 168, 39, 2, 72, 1, | ||
538 | 0, FB_VMODE_INTERLACED | ||
539 | } | ||
540 | }, { | ||
541 | "1280x1024-16i", { /* Cybervision 16 bpp */ | ||
542 | 1280, 1024, 1280, 1024, 0, 0, 16, 0, | ||
543 | {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, | ||
544 | 0, 0, -1, -1, FB_ACCELF_TEXT, 17857, 232, 232, 71, 15, 176, 12, | ||
545 | 0, FB_VMODE_INTERLACED | ||
546 | } | ||
547 | }, { | ||
548 | "1600x1200-16i", { /* Cybervision 16 bpp */ | ||
549 | 1600, 1200, 1600, 1200, 0, 0, 16, 0, | ||
550 | {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, | ||
551 | 0, 0, -1, -1, FB_ACCELF_TEXT, 13698, 336, 224, 77, 15, 176, 12, | ||
552 | 0, FB_VMODE_INTERLACED | ||
553 | } | ||
554 | }, | ||
555 | #endif | ||
556 | |||
557 | #ifdef FBCON_HAS_CFB32 | ||
558 | { | ||
559 | "1024x768-32i", { /* Cybervision 32 bpp */ | ||
560 | 1024, 768, 1024, 768, 0, 0, 32, 0, | ||
561 | {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, | ||
562 | 0, 0, -1, -1, FB_ACCELF_TEXT, 22222, 216, 144, 39, 2, 72, 1, | ||
563 | 0, FB_VMODE_INTERLACED | ||
564 | } | ||
565 | }, { | ||
566 | "1280x1024-32i", { /* Cybervision 32 bpp */ | ||
567 | 1280, 1024, 1280, 1024, 0, 0, 32, 0, | ||
568 | {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {23, 0, 0}, | ||
569 | 0, 0, -1, -1, FB_ACCELF_TEXT, 17857, 232, 232, 71, 15, 176, 12, | ||
570 | 0, FB_VMODE_INTERLACED | ||
571 | } | ||
572 | }, { | ||
573 | "1600x1200-32i", { /* Cybervision 32 bpp */ | ||
574 | 1600, 1200, 1600, 1200, 0, 0, 32, 0, | ||
575 | {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, | ||
576 | 0, 0, -1, -1, FB_ACCELF_TEXT, 13698, 336, 224, 77, 15, 176, 12, | ||
577 | 0, FB_VMODE_INTERLACED | ||
578 | } | ||
579 | }, | ||
580 | #endif | ||
581 | |||
582 | /* doublescan modes */ | ||
583 | |||
584 | #ifdef FBCON_HAS_CFB8 | ||
585 | { | ||
586 | "320x240-8d", { /* Cybervision 8 bpp */ | ||
587 | 320, 240, 320, 240, 0, 0, 8, 0, | ||
588 | {0, 8, 0}, {0, 8, 0}, {0, 8, 0}, {0, 0, 0}, | ||
589 | 0, 0, -1, -1, FB_ACCELF_TEXT, 59259, 80, 80, 45, 26, 32, 1, | ||
590 | 0, FB_VMODE_DOUBLE | ||
591 | } | ||
592 | }, | ||
593 | #endif | ||
594 | |||
595 | #ifdef FBCON_HAS_CFB16 | ||
596 | { | ||
597 | "320x240-16d", { /* Cybervision 16 bpp */ | ||
598 | 320, 240, 320, 240, 0, 0, 16, 0, | ||
599 | {11, 5, 0}, {5, 6, 0}, {0, 5, 0}, {0, 0, 0}, | ||
600 | 0, 0, -1, -1, FB_ACCELF_TEXT, 59259, 80, 80, 45, 26, 32, 1, | ||
601 | 0, FB_VMODE_DOUBLE | ||
602 | } | ||
603 | }, | ||
604 | #endif | ||
605 | |||
606 | #ifdef FBCON_HAS_CFB32 | ||
607 | { | ||
608 | "320x240-32d", { /* Cybervision 32 bpp */ | ||
609 | 320, 240, 320, 240, 0, 0, 32, 0, | ||
610 | {16, 8, 0}, {8, 8, 0}, {0, 8, 0}, {24, 0, 0}, | ||
611 | 0, 0, -1, -1, FB_ACCELF_TEXT, 59259, 80, 80, 45, 26, 32, 1, | ||
612 | 0, FB_VMODE_DOUBLE | ||
613 | } | ||
614 | }, | ||
615 | #endif | ||
616 | }; | ||
617 | |||
618 | #define NUM_TOTAL_MODES ARRAY_SIZE(virgefb_predefined) | ||
619 | |||
620 | /* | ||
621 | * Default to 800x600 for video=virge8:, virge16: or virge32: | ||
622 | */ | ||
623 | |||
624 | #ifdef FBCON_HAS_CFB8 | ||
625 | #define VIRGE8_DEFMODE (2) | ||
626 | #endif | ||
627 | |||
628 | #ifdef FBCON_HAS_CFB16 | ||
629 | #define VIRGE16_DEFMODE (9) | ||
630 | #endif | ||
631 | |||
632 | #ifdef FBCON_HAS_CFB32 | ||
633 | #define VIRGE32_DEFMODE (16) | ||
634 | #endif | ||
635 | |||
636 | static struct fb_var_screeninfo virgefb_default; | ||
637 | static int virgefb_inverse = 0; | ||
638 | |||
639 | /* | ||
640 | * Interface used by the world | ||
641 | */ | ||
642 | |||
643 | int virgefb_setup(char*); | ||
644 | static int virgefb_get_fix(struct fb_fix_screeninfo *fix, int con, | ||
645 | struct fb_info *info); | ||
646 | static int virgefb_get_var(struct fb_var_screeninfo *var, int con, | ||
647 | struct fb_info *info); | ||
648 | static int virgefb_set_var(struct fb_var_screeninfo *var, int con, | ||
649 | struct fb_info *info); | ||
650 | static int virgefb_get_cmap(struct fb_cmap *cmap, int kspc, int con, | ||
651 | struct fb_info *info); | ||
652 | static int virgefb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | ||
653 | u_int transp, struct fb_info *info); | ||
654 | static int virgefb_blank(int blank, struct fb_info *info); | ||
655 | |||
656 | /* | ||
657 | * Interface to the low level console driver | ||
658 | */ | ||
659 | |||
660 | int virgefb_init(void); | ||
661 | static int virgefb_switch(int con, struct fb_info *info); | ||
662 | static int virgefb_updatevar(int con, struct fb_info *info); | ||
663 | |||
664 | /* | ||
665 | * Text console acceleration | ||
666 | */ | ||
667 | |||
668 | #ifdef FBCON_HAS_CFB8 | ||
669 | static struct display_switch fbcon_virge8; | ||
670 | #endif | ||
671 | |||
672 | #ifdef FBCON_HAS_CFB16 | ||
673 | static struct display_switch fbcon_virge16; | ||
674 | #endif | ||
675 | |||
676 | #ifdef FBCON_HAS_CFB32 | ||
677 | static struct display_switch fbcon_virge32; | ||
678 | #endif | ||
679 | |||
680 | /* | ||
681 | * Hardware Specific Routines | ||
682 | */ | ||
683 | |||
684 | static int virge_init(void); | ||
685 | static int virgefb_encode_fix(struct fb_fix_screeninfo *fix, | ||
686 | struct virgefb_par *par); | ||
687 | static int virgefb_decode_var(struct fb_var_screeninfo *var, | ||
688 | struct virgefb_par *par); | ||
689 | static int virgefb_encode_var(struct fb_var_screeninfo *var, | ||
690 | struct virgefb_par *par); | ||
691 | static int virgefb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, | ||
692 | u_int *transp, struct fb_info *info); | ||
693 | static void virgefb_gfx_on_off(int blank); | ||
694 | static inline void virgefb_wait_for_idle(void); | ||
695 | static void virgefb_BitBLT(u_short curx, u_short cury, u_short destx, u_short desty, | ||
696 | u_short width, u_short height, u_short stride, u_short depth); | ||
697 | static void virgefb_RectFill(u_short x, u_short y, u_short width, u_short height, | ||
698 | u_short color, u_short stride, u_short depth); | ||
699 | |||
700 | /* | ||
701 | * Internal routines | ||
702 | */ | ||
703 | |||
704 | static void virgefb_get_par(struct virgefb_par *par); | ||
705 | static void virgefb_set_par(struct virgefb_par *par); | ||
706 | static int virgefb_do_fb_set_var(struct fb_var_screeninfo *var, int isactive); | ||
707 | static void virgefb_set_disp(int con, struct fb_info *info); | ||
708 | static int virgefb_get_video_mode(const char *name); | ||
709 | static void virgefb_set_video(struct fb_var_screeninfo *var); | ||
710 | |||
711 | /* | ||
712 | * Additions for Initialization | ||
713 | */ | ||
714 | |||
715 | static void virgefb_load_video_mode(struct fb_var_screeninfo *video_mode); | ||
716 | static int cv3d_has_4mb(void); | ||
717 | static unsigned short virgefb_compute_clock(unsigned long freq); | ||
718 | static inline unsigned char rattr(short); | ||
719 | static inline unsigned char rseq(short); | ||
720 | static inline unsigned char rcrt(short); | ||
721 | static inline unsigned char rgfx(short); | ||
722 | static inline void gfx_on_off(int toggle); | ||
723 | static void virgefb_pci_init(void); | ||
724 | |||
725 | /* -------------------- Hardware specific routines ------------------------- */ | ||
726 | |||
727 | /* | ||
728 | * Functions for register access | ||
729 | */ | ||
730 | |||
731 | /* Read attribute controller register */ | ||
732 | |||
733 | static inline unsigned char rattr(short idx) | ||
734 | { | ||
735 | volatile unsigned char rattr_tmp; | ||
736 | |||
737 | rattr_tmp = rb_mmio(ACT_ADDRESS_RESET); | ||
738 | wb_mmio(ACT_ADDRESS_W, idx); | ||
739 | return (rb_mmio(ACT_ADDRESS_R)); | ||
740 | } | ||
741 | |||
742 | /* Read sequencer register */ | ||
743 | |||
744 | static inline unsigned char rseq(short idx) | ||
745 | { | ||
746 | wb_mmio(SEQ_ADDRESS, idx); | ||
747 | return (rb_mmio(SEQ_ADDRESS_R)); | ||
748 | } | ||
749 | |||
750 | /* Read CRT controller register */ | ||
751 | |||
752 | static inline unsigned char rcrt(short idx) | ||
753 | { | ||
754 | wb_mmio(CRT_ADDRESS, idx); | ||
755 | return (rb_mmio(CRT_ADDRESS_R)); | ||
756 | } | ||
757 | |||
758 | /* Read graphics controller register */ | ||
759 | |||
760 | static inline unsigned char rgfx(short idx) | ||
761 | { | ||
762 | wb_mmio(GCT_ADDRESS, idx); | ||
763 | return (rb_mmio(GCT_ADDRESS_R)); | ||
764 | } | ||
765 | |||
766 | |||
767 | /* | ||
768 | * Initialization | ||
769 | */ | ||
770 | |||
771 | /* PCI init */ | ||
772 | |||
773 | void virgefb_pci_init(void) { | ||
774 | |||
775 | DPRINTK("ENTER\n"); | ||
776 | |||
777 | SelectCFG; | ||
778 | |||
779 | if (on_zorro2) { | ||
780 | *((short *)(vgaio_regs + 0x00000010)) = 0; | ||
781 | *((long *)(vgaio_regs + 0x00000004)) = 0x02000003; | ||
782 | } else { | ||
783 | *((short *)(vgaio_regs + 0x000e0010)) = 0; | ||
784 | *((long *)(vgaio_regs + 0x000e0004)) = 0x02000003; | ||
785 | } | ||
786 | |||
787 | /* SelectIO is in wb_vgaio macro */ | ||
788 | wb_vgaio(SREG_VIDEO_SUBS_ENABLE, 0x01); | ||
789 | /* SelectMMIO is in wb_vgaio macro */ | ||
790 | |||
791 | DPRINTK("EXIT\n"); | ||
792 | |||
793 | return; | ||
794 | } | ||
795 | |||
796 | /* | ||
797 | * Initalize all mode independent regs, find mem size and clear mem | ||
798 | */ | ||
799 | |||
800 | static int virge_init(void) | ||
801 | { | ||
802 | int i; | ||
803 | unsigned char tmp; | ||
804 | |||
805 | DPRINTK("ENTER\n"); | ||
806 | |||
807 | virgefb_pci_init(); | ||
808 | |||
809 | wb_mmio(GREG_MISC_OUTPUT_W, 0x07); /* colour, ram enable, clk sel */ | ||
810 | |||
811 | wseq(SEQ_ID_UNLOCK_EXT, 0x06); /* unlock extensions */ | ||
812 | tmp = rb_mmio(GREG_MISC_OUTPUT_R); | ||
813 | wcrt(CRT_ID_REGISTER_LOCK_1, 0x48); /* unlock CR2D to CR3F */ | ||
814 | |||
815 | wcrt(CRT_ID_BACKWAD_COMP_1, 0x00); /* irq disable */ | ||
816 | |||
817 | wcrt(CRT_ID_REGISTER_LOCK_2, 0xa5); /* unlock CR40 to CRFF and more */ | ||
818 | wcrt(CRT_ID_REGISTER_LOCK,0x00); /* unlock h and v timing */ | ||
819 | wcrt(CRT_ID_SYSTEM_CONFIG, 0x01); /* unlock enhanced programming registers */ | ||
820 | |||
821 | wb_mmio(GREG_FEATURE_CONTROL_W, 0x00); | ||
822 | |||
823 | wcrt(CRT_ID_EXT_MISC_CNTL, 0x00); /* b2 = 0 to allow VDAC mmio access */ | ||
824 | #if 0 | ||
825 | /* write strap options ... ? */ | ||
826 | wcrt(CRT_ID_CONFIG_1, 0x08); | ||
827 | wcrt(CRT_ID_CONFIG_2, 0xff); /* 0x0x2 bit needs to be set ?? */ | ||
828 | wcrt(CRT_ID_CONFIG_3, 0x0f); | ||
829 | wcrt(CRT_ID_CONFIG_4, 0x1a); | ||
830 | #endif | ||
831 | wcrt(CRT_ID_EXT_MISC_CNTL_1, 0x82); /* PCI DE and software reset S3D engine */ | ||
832 | /* EXT_MISC_CNTL_1, CR66 bit 0 should be the same as bit 0 MR_ADVANCED_FUNCTION_CONTROL - check */ | ||
833 | wl_mmio(MR_ADVANCED_FUNCTION_CONTROL, 0x00000011); /* enhanced mode, linear addressing */ | ||
834 | |||
835 | /* crtc registers */ | ||
836 | |||
837 | wcrt(CRT_ID_PRESET_ROW_SCAN, 0x00); | ||
838 | |||
839 | /* Disable h/w cursor */ | ||
840 | |||
841 | wcrt(CRT_ID_CURSOR_START, 0x00); | ||
842 | wcrt(CRT_ID_CURSOR_END, 0x00); | ||
843 | wcrt(CRT_ID_START_ADDR_HIGH, 0x00); | ||
844 | wcrt(CRT_ID_START_ADDR_LOW, 0x00); | ||
845 | wcrt(CRT_ID_CURSOR_LOC_HIGH, 0x00); | ||
846 | wcrt(CRT_ID_CURSOR_LOC_LOW, 0x00); | ||
847 | wcrt(CRT_ID_EXT_MODE, 0x00); | ||
848 | wcrt(CRT_ID_HWGC_MODE, 0x00); | ||
849 | wcrt(CRT_ID_HWGC_ORIGIN_X_HI, 0x00); | ||
850 | wcrt(CRT_ID_HWGC_ORIGIN_X_LO, 0x00); | ||
851 | wcrt(CRT_ID_HWGC_ORIGIN_Y_HI, 0x00); | ||
852 | wcrt(CRT_ID_HWGC_ORIGIN_Y_LO, 0x00); | ||
853 | i = rcrt(CRT_ID_HWGC_MODE); | ||
854 | wcrt(CRT_ID_HWGC_FG_STACK, 0x00); | ||
855 | wcrt(CRT_ID_HWGC_FG_STACK, 0x00); | ||
856 | wcrt(CRT_ID_HWGC_FG_STACK, 0x00); | ||
857 | wcrt(CRT_ID_HWGC_BG_STACK, 0x00); | ||
858 | wcrt(CRT_ID_HWGC_BG_STACK, 0x00); | ||
859 | wcrt(CRT_ID_HWGC_BG_STACK, 0x00); | ||
860 | wcrt(CRT_ID_HWGC_START_AD_HI, 0x00); | ||
861 | wcrt(CRT_ID_HWGC_START_AD_LO, 0x00); | ||
862 | wcrt(CRT_ID_HWGC_DSTART_X, 0x00); | ||
863 | wcrt(CRT_ID_HWGC_DSTART_Y, 0x00); | ||
864 | |||
865 | wcrt(CRT_ID_UNDERLINE_LOC, 0x00); | ||
866 | |||
867 | wcrt(CRT_ID_MODE_CONTROL, 0xe3); | ||
868 | wcrt(CRT_ID_BACKWAD_COMP_2, 0x22); /* blank bdr bit 5 blanking only on 8 bit */ | ||
869 | |||
870 | wcrt(CRT_ID_EX_SYNC_1, 0x00); | ||
871 | |||
872 | /* memory */ | ||
873 | |||
874 | wcrt(CRT_ID_EXT_SYS_CNTL_3, 0x00); | ||
875 | wcrt(CRT_ID_MEMORY_CONF, 0x08); /* config enhanced map */ | ||
876 | wcrt(CRT_ID_EXT_MEM_CNTL_1, 0x08); /* MMIO Select (0x0c works as well)*/ | ||
877 | wcrt(CRT_ID_EXT_MEM_CNTL_2, 0x02); /* why 02 big endian 00 works ? */ | ||
878 | wcrt(CRT_ID_EXT_MEM_CNTL_4, 0x9f); /* config big endian - 0x00 ? */ | ||
879 | wcrt(CRT_ID_LAW_POS_HI, 0x00); | ||
880 | wcrt(CRT_ID_LAW_POS_LO, 0x00); | ||
881 | wcrt(CRT_ID_EXT_MISC_CNTL_1, 0x81); | ||
882 | wcrt(CRT_ID_MISC_1, 0x90); /* must follow CRT_ID_EXT_MISC_CNTL_1 */ | ||
883 | wcrt(CRT_ID_LAW_CNTL, 0x13); /* force 4 Meg for test */ | ||
884 | if (cv3d_has_4mb()) { | ||
885 | v_ram_size = 0x00400000; | ||
886 | wcrt(CRT_ID_LAW_CNTL, 0x13); /* 4 MB */ | ||
887 | } else { | ||
888 | v_ram_size = 0x00200000; | ||
889 | wcrt(CRT_ID_LAW_CNTL, 0x12); /* 2 MB */ | ||
890 | } | ||
891 | |||
892 | if (on_zorro2) | ||
893 | v_ram_size -= 0x60000; /* we need some space for the registers */ | ||
894 | |||
895 | wcrt(CRT_ID_EXT_SYS_CNTL_4, 0x00); | ||
896 | wcrt(CRT_ID_EXT_DAC_CNTL, 0x00); /* 0x10 for X11 cursor mode */ | ||
897 | |||
898 | /* sequencer registers */ | ||
899 | |||
900 | wseq(SEQ_ID_CLOCKING_MODE, 0x01); /* 8 dot clock */ | ||
901 | wseq(SEQ_ID_MAP_MASK, 0xff); | ||
902 | wseq(SEQ_ID_CHAR_MAP_SELECT, 0x00); | ||
903 | wseq(SEQ_ID_MEMORY_MODE, 0x02); | ||
904 | wseq(SEQ_ID_RAMDAC_CNTL, 0x00); | ||
905 | wseq(SEQ_ID_SIGNAL_SELECT, 0x00); | ||
906 | wseq(SEQ_ID_EXT_SEQ_REG9, 0x00); /* MMIO and PIO reg access enabled */ | ||
907 | wseq(SEQ_ID_EXT_MISC_SEQ, 0x00); | ||
908 | wseq(SEQ_ID_CLKSYN_CNTL_1, 0x00); | ||
909 | wseq(SEQ_ID_EXT_SEQ, 0x00); | ||
910 | |||
911 | /* graphic registers */ | ||
912 | |||
913 | wgfx(GCT_ID_SET_RESET, 0x00); | ||
914 | wgfx(GCT_ID_ENABLE_SET_RESET, 0x00); | ||
915 | wgfx(GCT_ID_COLOR_COMPARE, 0x00); | ||
916 | wgfx(GCT_ID_DATA_ROTATE, 0x00); | ||
917 | wgfx(GCT_ID_READ_MAP_SELECT, 0x00); | ||
918 | wgfx(GCT_ID_GRAPHICS_MODE, 0x40); | ||
919 | wgfx(GCT_ID_MISC, 0x01); | ||
920 | wgfx(GCT_ID_COLOR_XCARE, 0x0f); | ||
921 | wgfx(GCT_ID_BITMASK, 0xff); | ||
922 | |||
923 | /* attribute registers */ | ||
924 | |||
925 | for(i = 0; i <= 15; i++) | ||
926 | watr(ACT_ID_PALETTE0 + i, i); | ||
927 | watr(ACT_ID_ATTR_MODE_CNTL, 0x41); | ||
928 | watr(ACT_ID_OVERSCAN_COLOR, 0xff); | ||
929 | watr(ACT_ID_COLOR_PLANE_ENA, 0x0f); | ||
930 | watr(ACT_ID_HOR_PEL_PANNING, 0x00); | ||
931 | watr(ACT_ID_COLOR_SELECT, 0x00); | ||
932 | |||
933 | wb_mmio(VDAC_MASK, 0xff); | ||
934 | |||
935 | /* init local cmap as greyscale levels */ | ||
936 | |||
937 | for (i = 0; i < 256; i++) { | ||
938 | virgefb_colour_table [i][0] = i; | ||
939 | virgefb_colour_table [i][1] = i; | ||
940 | virgefb_colour_table [i][2] = i; | ||
941 | } | ||
942 | |||
943 | /* clear framebuffer memory */ | ||
944 | |||
945 | memset((char*)v_ram, 0x00, v_ram_size); | ||
946 | |||
947 | DPRINTK("EXIT\n"); | ||
948 | return 0; | ||
949 | } | ||
950 | |||
951 | |||
952 | /* | ||
953 | * This function should fill in the `fix' structure based on the | ||
954 | * values in the `par' structure. | ||
955 | */ | ||
956 | |||
957 | static int virgefb_encode_fix(struct fb_fix_screeninfo *fix, | ||
958 | struct virgefb_par *par) | ||
959 | { | ||
960 | DPRINTK("ENTER set video phys addr\n"); | ||
961 | |||
962 | memset(fix, 0, sizeof(struct fb_fix_screeninfo)); | ||
963 | strcpy(fix->id, virgefb_name); | ||
964 | if (on_zorro2) | ||
965 | fix->smem_start = v_ram_phys; | ||
966 | switch (par->var.bits_per_pixel) { | ||
967 | #ifdef FBCON_HAS_CFB8 | ||
968 | case 8: | ||
969 | if (on_zorro2) | ||
970 | Select_Zorro2_FrameBuffer(ENDIAN_BYTE); | ||
971 | else | ||
972 | fix->smem_start = (v_ram_phys + CYBMEM_OFFSET_8); | ||
973 | break; | ||
974 | #endif | ||
975 | #ifdef FBCON_HAS_CFB16 | ||
976 | case 16: | ||
977 | if (on_zorro2) | ||
978 | Select_Zorro2_FrameBuffer(ENDIAN_WORD); | ||
979 | else | ||
980 | fix->smem_start = (v_ram_phys + CYBMEM_OFFSET_16); | ||
981 | break; | ||
982 | #endif | ||
983 | #ifdef FBCON_HAS_CFB32 | ||
984 | case 32: | ||
985 | if (on_zorro2) | ||
986 | Select_Zorro2_FrameBuffer(ENDIAN_LONG); | ||
987 | else | ||
988 | fix->smem_start = (v_ram_phys + CYBMEM_OFFSET_32); | ||
989 | break; | ||
990 | #endif | ||
991 | } | ||
992 | |||
993 | fix->smem_len = v_ram_size; | ||
994 | fix->mmio_start = mmio_regs_phys; | ||
995 | fix->mmio_len = 0x10000; /* TODO: verify this for the CV64/3D */ | ||
996 | |||
997 | fix->type = FB_TYPE_PACKED_PIXELS; | ||
998 | fix->type_aux = 0; | ||
999 | if (par->var.bits_per_pixel == 8) | ||
1000 | fix->visual = FB_VISUAL_PSEUDOCOLOR; | ||
1001 | else | ||
1002 | fix->visual = FB_VISUAL_TRUECOLOR; | ||
1003 | |||
1004 | fix->xpanstep = 0; | ||
1005 | fix->ypanstep = 0; | ||
1006 | fix->ywrapstep = 0; | ||
1007 | fix->line_length = par->var.xres_virtual*par->var.bits_per_pixel/8; | ||
1008 | fix->accel = FB_ACCEL_S3_VIRGE; | ||
1009 | DPRINTK("EXIT v_ram_phys = 0x%8.8lx\n", (unsigned long)fix->smem_start); | ||
1010 | return 0; | ||
1011 | } | ||
1012 | |||
1013 | |||
1014 | /* | ||
1015 | * Fill the `par' structure based on the values in `var'. | ||
1016 | * TODO: Verify and adjust values, return -EINVAL if bad. | ||
1017 | */ | ||
1018 | |||
1019 | static int virgefb_decode_var(struct fb_var_screeninfo *var, | ||
1020 | struct virgefb_par *par) | ||
1021 | { | ||
1022 | DPRINTK("ENTER\n"); | ||
1023 | par->var.xres = var->xres; | ||
1024 | par->var.yres = var->yres; | ||
1025 | par->var.xres_virtual = var->xres_virtual; | ||
1026 | par->var.yres_virtual = var->yres_virtual; | ||
1027 | /* roundup and validate */ | ||
1028 | par->var.xres = (par->var.xres+7) & ~7; | ||
1029 | par->var.xres_virtual = (par->var.xres_virtual+7) & ~7; | ||
1030 | if (par->var.xres_virtual < par->var.xres) | ||
1031 | par->var.xres_virtual = par->var.xres; | ||
1032 | if (par->var.yres_virtual < par->var.yres) | ||
1033 | par->var.yres_virtual = par->var.yres; | ||
1034 | par->var.xoffset = var->xoffset; | ||
1035 | par->var.yoffset = var->yoffset; | ||
1036 | par->var.bits_per_pixel = var->bits_per_pixel; | ||
1037 | if (par->var.bits_per_pixel <= 8) | ||
1038 | par->var.bits_per_pixel = 8; | ||
1039 | else if (par->var.bits_per_pixel <= 16) | ||
1040 | par->var.bits_per_pixel = 16; | ||
1041 | else | ||
1042 | par->var.bits_per_pixel = 32; | ||
1043 | #ifndef FBCON_HAS_CFB32 | ||
1044 | if (par->var.bits_per_pixel == 32) | ||
1045 | par->var.bits_per_pixel = 16; | ||
1046 | #endif | ||
1047 | #ifndef FBCON_HAS_CFB16 | ||
1048 | if (par->var.bits_per_pixel == 16) | ||
1049 | par->var.bits_per_pixel = 8; | ||
1050 | #endif | ||
1051 | par->var.grayscale = var->grayscale; | ||
1052 | par->var.red = var->red; | ||
1053 | par->var.green = var->green; | ||
1054 | par->var.blue = var->blue; | ||
1055 | par->var.transp = var->transp; | ||
1056 | par->var.nonstd = var->nonstd; | ||
1057 | par->var.activate = var->activate; | ||
1058 | par->var.height = var->height; | ||
1059 | par->var.width = var->width; | ||
1060 | if (var->accel_flags & FB_ACCELF_TEXT) { | ||
1061 | par->var.accel_flags = FB_ACCELF_TEXT; | ||
1062 | } else { | ||
1063 | par->var.accel_flags = 0; | ||
1064 | } | ||
1065 | par->var.pixclock = var->pixclock; | ||
1066 | par->var.left_margin = var->left_margin; | ||
1067 | par->var.right_margin = var->right_margin; | ||
1068 | par->var.upper_margin = var->upper_margin; | ||
1069 | par->var.lower_margin = var->lower_margin; | ||
1070 | par->var.hsync_len = var->hsync_len; | ||
1071 | par->var.vsync_len = var->vsync_len; | ||
1072 | par->var.sync = var->sync; | ||
1073 | par->var.vmode = var->vmode; | ||
1074 | DPRINTK("EXIT\n"); | ||
1075 | return 0; | ||
1076 | } | ||
1077 | |||
1078 | /* | ||
1079 | * Fill the `var' structure based on the values in `par' and maybe | ||
1080 | * other values read out of the hardware. | ||
1081 | */ | ||
1082 | |||
1083 | static int virgefb_encode_var(struct fb_var_screeninfo *var, | ||
1084 | struct virgefb_par *par) | ||
1085 | { | ||
1086 | DPRINTK("ENTER\n"); | ||
1087 | memset(var, 0, sizeof(struct fb_var_screeninfo)); /* need this ? */ | ||
1088 | var->xres = par->var.xres; | ||
1089 | var->yres = par->var.yres; | ||
1090 | var->xres_virtual = par->var.xres_virtual; | ||
1091 | var->yres_virtual = par->var.yres_virtual; | ||
1092 | var->xoffset = par->var.xoffset; | ||
1093 | var->yoffset = par->var.yoffset; | ||
1094 | var->bits_per_pixel = par->var.bits_per_pixel; | ||
1095 | var->grayscale = par->var.grayscale; | ||
1096 | var->red = par->var.red; | ||
1097 | var->green = par->var.green; | ||
1098 | var->blue = par->var.blue; | ||
1099 | var->transp = par->var.transp; | ||
1100 | var->nonstd = par->var.nonstd; | ||
1101 | var->activate = par->var.activate; | ||
1102 | var->height = par->var.height; | ||
1103 | var->width = par->var.width; | ||
1104 | var->accel_flags = par->var.accel_flags; | ||
1105 | var->pixclock = par->var.pixclock; | ||
1106 | var->left_margin = par->var.left_margin; | ||
1107 | var->right_margin = par->var.right_margin; | ||
1108 | var->upper_margin = par->var.upper_margin; | ||
1109 | var->lower_margin = par->var.lower_margin; | ||
1110 | var->hsync_len = par->var.hsync_len; | ||
1111 | var->vsync_len = par->var.vsync_len; | ||
1112 | var->sync = par->var.sync; | ||
1113 | var->vmode = par->var.vmode; | ||
1114 | DPRINTK("EXIT\n"); | ||
1115 | return 0; | ||
1116 | } | ||
1117 | |||
1118 | /* | ||
1119 | * Set a single color register. The values supplied are already | ||
1120 | * rounded down to the hardware's capabilities (according to the | ||
1121 | * entries in the var structure). Return != 0 for invalid regno. | ||
1122 | */ | ||
1123 | |||
1124 | static int virgefb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | ||
1125 | u_int transp, struct fb_info *info) | ||
1126 | { | ||
1127 | DPRINTK("ENTER\n"); | ||
1128 | if (((current_par.var.bits_per_pixel==8) && (regno>255)) || | ||
1129 | ((current_par.var.bits_per_pixel!=8) && (regno>15))) { | ||
1130 | DPRINTK("EXIT\n"); | ||
1131 | return 1; | ||
1132 | } | ||
1133 | if (((current_par.var.bits_per_pixel==8) && (regno<256)) || | ||
1134 | ((current_par.var.bits_per_pixel!=8) && (regno<16))) { | ||
1135 | virgefb_colour_table [regno][0] = red >> 10; | ||
1136 | virgefb_colour_table [regno][1] = green >> 10; | ||
1137 | virgefb_colour_table [regno][2] = blue >> 10; | ||
1138 | } | ||
1139 | |||
1140 | switch (current_par.var.bits_per_pixel) { | ||
1141 | #ifdef FBCON_HAS_CFB8 | ||
1142 | case 8: | ||
1143 | wb_mmio(VDAC_ADDRESS_W, (unsigned char)regno); | ||
1144 | wb_mmio(VDAC_DATA, ((unsigned char)(red >> 10))); | ||
1145 | wb_mmio(VDAC_DATA, ((unsigned char)(green >> 10))); | ||
1146 | wb_mmio(VDAC_DATA, ((unsigned char)(blue >> 10))); | ||
1147 | break; | ||
1148 | #endif | ||
1149 | #ifdef FBCON_HAS_CFB16 | ||
1150 | case 16: | ||
1151 | fbcon_cmap.cfb16[regno] = | ||
1152 | ((red & 0xf800) | | ||
1153 | ((green & 0xfc00) >> 5) | | ||
1154 | ((blue & 0xf800) >> 11)); | ||
1155 | break; | ||
1156 | #endif | ||
1157 | #ifdef FBCON_HAS_CFB32 | ||
1158 | case 32: | ||
1159 | fbcon_cmap.cfb32[regno] = | ||
1160 | /* transp = 0's or 1's ? */ | ||
1161 | (((red & 0xff00) << 8) | | ||
1162 | ((green & 0xff00) >> 0) | | ||
1163 | ((blue & 0xff00) >> 8)); | ||
1164 | break; | ||
1165 | #endif | ||
1166 | } | ||
1167 | DPRINTK("EXIT\n"); | ||
1168 | return 0; | ||
1169 | } | ||
1170 | |||
1171 | |||
1172 | /* | ||
1173 | * Read a single color register and split it into | ||
1174 | * colors/transparent. Return != 0 for invalid regno. | ||
1175 | */ | ||
1176 | |||
1177 | static int virgefb_getcolreg(u_int regno, u_int *red, u_int *green, u_int *blue, | ||
1178 | u_int *transp, struct fb_info *info) | ||
1179 | { | ||
1180 | int t; | ||
1181 | |||
1182 | DPRINTK("ENTER\n"); | ||
1183 | if (regno > 255) { | ||
1184 | DPRINTK("EXIT\n"); | ||
1185 | return 1; | ||
1186 | } | ||
1187 | if (((current_par.var.bits_per_pixel==8) && (regno<256)) || | ||
1188 | ((current_par.var.bits_per_pixel!=8) && (regno<16))) { | ||
1189 | |||
1190 | t = virgefb_colour_table [regno][0]; | ||
1191 | *red = (t<<10) | (t<<4) | (t>>2); | ||
1192 | t = virgefb_colour_table [regno][1]; | ||
1193 | *green = (t<<10) | (t<<4) | (t>>2); | ||
1194 | t = virgefb_colour_table [regno][2]; | ||
1195 | *blue = (t<<10) | (t<<4) | (t>>2); | ||
1196 | } | ||
1197 | *transp = 0; | ||
1198 | DPRINTK("EXIT\n"); | ||
1199 | return 0; | ||
1200 | } | ||
1201 | |||
1202 | |||
1203 | /* | ||
1204 | * (Un)Blank the screen | ||
1205 | */ | ||
1206 | |||
1207 | static void virgefb_gfx_on_off(int blank) | ||
1208 | { | ||
1209 | DPRINTK("ENTER\n"); | ||
1210 | gfx_on_off(blank); | ||
1211 | DPRINTK("EXIT\n"); | ||
1212 | } | ||
1213 | |||
1214 | /* | ||
1215 | * CV3D low-level support | ||
1216 | */ | ||
1217 | |||
1218 | |||
1219 | static inline void wait_3d_fifo_slots(int n) /* WaitQueue */ | ||
1220 | { | ||
1221 | do { | ||
1222 | mb(); | ||
1223 | } while (((rl_mmio(MR_SUBSYSTEM_STATUS_R) >> 8) & 0x1f) < (n + 2)); | ||
1224 | } | ||
1225 | |||
1226 | static inline void virgefb_wait_for_idle(void) /* WaitIdle */ | ||
1227 | { | ||
1228 | while(!(rl_mmio(MR_SUBSYSTEM_STATUS_R) & 0x2000)) ; | ||
1229 | blit_maybe_busy = 0; | ||
1230 | } | ||
1231 | |||
1232 | /* | ||
1233 | * BitBLT - Through the Plane | ||
1234 | */ | ||
1235 | |||
1236 | static void virgefb_BitBLT(u_short curx, u_short cury, u_short destx, u_short desty, | ||
1237 | u_short width, u_short height, u_short stride, u_short depth) | ||
1238 | { | ||
1239 | unsigned int blitcmd = S3V_BITBLT | S3V_DRAW | S3V_BLT_COPY; | ||
1240 | |||
1241 | switch (depth) { | ||
1242 | #ifdef FBCON_HAS_CFB8 | ||
1243 | case 8 : | ||
1244 | blitcmd |= S3V_DST_8BPP; | ||
1245 | break; | ||
1246 | #endif | ||
1247 | #ifdef FBCON_HAS_CFB16 | ||
1248 | case 16 : | ||
1249 | blitcmd |= S3V_DST_16BPP; | ||
1250 | break; | ||
1251 | #endif | ||
1252 | #ifdef FBCON_HAS_CFB32 | ||
1253 | case 32 : | ||
1254 | /* 32 bit uses 2 by 16 bit values, see fbcon_virge32_bmove */ | ||
1255 | blitcmd |= S3V_DST_16BPP; | ||
1256 | break; | ||
1257 | #endif | ||
1258 | } | ||
1259 | |||
1260 | /* Set drawing direction */ | ||
1261 | /* -Y, X maj, -X (default) */ | ||
1262 | if (curx > destx) { | ||
1263 | blitcmd |= (1 << 25); /* Drawing direction +X */ | ||
1264 | } else { | ||
1265 | curx += (width - 1); | ||
1266 | destx += (width - 1); | ||
1267 | } | ||
1268 | |||
1269 | if (cury > desty) { | ||
1270 | blitcmd |= (1 << 26); /* Drawing direction +Y */ | ||
1271 | } else { | ||
1272 | cury += (height - 1); | ||
1273 | desty += (height - 1); | ||
1274 | } | ||
1275 | |||
1276 | wait_3d_fifo_slots(8); /* wait on fifo slots for 8 writes */ | ||
1277 | |||
1278 | if (blit_maybe_busy) | ||
1279 | virgefb_wait_for_idle(); | ||
1280 | blit_maybe_busy = 1; | ||
1281 | |||
1282 | wl_mmio(BLT_PATTERN_COLOR, 1); /* pattern fb color */ | ||
1283 | wl_mmio(BLT_MONO_PATTERN_0, ~0); | ||
1284 | wl_mmio(BLT_MONO_PATTERN_1, ~0); | ||
1285 | wl_mmio(BLT_SIZE_X_Y, ((width << 16) | height)); | ||
1286 | wl_mmio(BLT_SRC_X_Y, ((curx << 16) | cury)); | ||
1287 | wl_mmio(BLT_DEST_X_Y, ((destx << 16) | desty)); | ||
1288 | wl_mmio(BLT_SRC_DEST_STRIDE, (((stride << 16) | stride) /* & 0x0ff80ff8 */)); /* why is this needed now ? */ | ||
1289 | wl_mmio(BLT_COMMAND_SET, blitcmd); | ||
1290 | } | ||
1291 | |||
1292 | /* | ||
1293 | * Rectangle Fill Solid | ||
1294 | */ | ||
1295 | |||
1296 | static void virgefb_RectFill(u_short x, u_short y, u_short width, u_short height, | ||
1297 | u_short color, u_short stride, u_short depth) | ||
1298 | { | ||
1299 | unsigned int blitcmd = S3V_RECTFILL | S3V_DRAW | | ||
1300 | S3V_BLT_CLEAR | S3V_MONO_PAT | (1 << 26) | (1 << 25); | ||
1301 | |||
1302 | switch (depth) { | ||
1303 | #ifdef FBCON_HAS_CFB8 | ||
1304 | case 8 : | ||
1305 | blitcmd |= S3V_DST_8BPP; | ||
1306 | break; | ||
1307 | #endif | ||
1308 | #ifdef FBCON_HAS_CFB16 | ||
1309 | case 16 : | ||
1310 | blitcmd |= S3V_DST_16BPP; | ||
1311 | break; | ||
1312 | #endif | ||
1313 | #ifdef FBCON_HAS_CFB32 | ||
1314 | case 32 : | ||
1315 | /* 32 bit uses 2 times 16 bit values, see fbcon_virge32_clear */ | ||
1316 | blitcmd |= S3V_DST_16BPP; | ||
1317 | break; | ||
1318 | #endif | ||
1319 | } | ||
1320 | |||
1321 | wait_3d_fifo_slots(5); /* wait on fifo slots for 5 writes */ | ||
1322 | |||
1323 | if (blit_maybe_busy) | ||
1324 | virgefb_wait_for_idle(); | ||
1325 | blit_maybe_busy = 1; | ||
1326 | |||
1327 | wl_mmio(BLT_PATTERN_COLOR, (color & 0xff)); | ||
1328 | wl_mmio(BLT_SIZE_X_Y, ((width << 16) | height)); | ||
1329 | wl_mmio(BLT_DEST_X_Y, ((x << 16) | y)); | ||
1330 | wl_mmio(BLT_SRC_DEST_STRIDE, (((stride << 16) | stride) /* & 0x0ff80ff8 */)); | ||
1331 | wl_mmio(BLT_COMMAND_SET, blitcmd); | ||
1332 | } | ||
1333 | |||
1334 | /* | ||
1335 | * Move cursor to x, y | ||
1336 | */ | ||
1337 | |||
1338 | #if 0 | ||
1339 | static void virgefb_move_cursor(u_short x, u_short y) | ||
1340 | { | ||
1341 | DPRINTK("Yuck .... MoveCursor on a 3D\n"); | ||
1342 | return 0; | ||
1343 | } | ||
1344 | #endif | ||
1345 | |||
1346 | /* -------------------- Interfaces to hardware functions -------------------- */ | ||
1347 | |||
1348 | static struct fb_hwswitch virgefb_hw_switch = { | ||
1349 | .init = virge_init, | ||
1350 | .encode_fix = virgefb_encode_fix, | ||
1351 | .decode_var = virgefb_decode_var, | ||
1352 | .encode_var = virgefb_encode_var, | ||
1353 | .getcolreg = virgefb_getcolreg, | ||
1354 | .blank = virgefb_gfx_on_off | ||
1355 | }; | ||
1356 | |||
1357 | |||
1358 | /* -------------------- Generic routines ------------------------------------ */ | ||
1359 | |||
1360 | |||
1361 | /* | ||
1362 | * Fill the hardware's `par' structure. | ||
1363 | */ | ||
1364 | |||
1365 | static void virgefb_get_par(struct virgefb_par *par) | ||
1366 | { | ||
1367 | DPRINTK("ENTER\n"); | ||
1368 | if (current_par_valid) { | ||
1369 | *par = current_par; | ||
1370 | } else { | ||
1371 | fbhw->decode_var(&virgefb_default, par); | ||
1372 | } | ||
1373 | DPRINTK("EXIT\n"); | ||
1374 | } | ||
1375 | |||
1376 | |||
1377 | static void virgefb_set_par(struct virgefb_par *par) | ||
1378 | { | ||
1379 | DPRINTK("ENTER\n"); | ||
1380 | current_par = *par; | ||
1381 | current_par_valid = 1; | ||
1382 | DPRINTK("EXIT\n"); | ||
1383 | } | ||
1384 | |||
1385 | |||
1386 | static void virgefb_set_video(struct fb_var_screeninfo *var) | ||
1387 | { | ||
1388 | /* Set clipping rectangle to current screen size */ | ||
1389 | |||
1390 | unsigned int clip; | ||
1391 | |||
1392 | DPRINTK("ENTER\n"); | ||
1393 | wait_3d_fifo_slots(4); | ||
1394 | clip = ((0 << 16) | (var->xres - 1)); | ||
1395 | wl_mmio(BLT_CLIP_LEFT_RIGHT, clip); | ||
1396 | clip = ((0 << 16) | (var->yres - 1)); | ||
1397 | wl_mmio(BLT_CLIP_TOP_BOTTOM, clip); | ||
1398 | wl_mmio(BLT_SRC_BASE, 0); /* seems we need to clear these two */ | ||
1399 | wl_mmio(BLT_DEST_BASE, 0); | ||
1400 | |||
1401 | /* Load the video mode defined by the 'var' data */ | ||
1402 | |||
1403 | virgefb_load_video_mode(var); | ||
1404 | DPRINTK("EXIT\n"); | ||
1405 | } | ||
1406 | |||
1407 | /* | ||
1408 | Merge these two functions, Geert's suggestion. | ||
1409 | static int virgefb_set_var(struct fb_var_screeninfo *var, int con, struct fb_info *info); | ||
1410 | static int virgefb_do_fb_set_var(struct fb_var_screeninfo *var, int isactive); | ||
1411 | */ | ||
1412 | |||
1413 | static int virgefb_do_fb_set_var(struct fb_var_screeninfo *var, int isactive) | ||
1414 | { | ||
1415 | int err, activate; | ||
1416 | struct virgefb_par par; | ||
1417 | |||
1418 | DPRINTK("ENTER\n"); | ||
1419 | if ((err = fbhw->decode_var(var, &par))) { | ||
1420 | DPRINTK("EXIT\n"); | ||
1421 | return (err); | ||
1422 | } | ||
1423 | |||
1424 | activate = var->activate; | ||
1425 | if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW && isactive) | ||
1426 | virgefb_set_par(&par); | ||
1427 | fbhw->encode_var(var, &par); | ||
1428 | var->activate = activate; | ||
1429 | if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW && isactive) | ||
1430 | virgefb_set_video(var); | ||
1431 | DPRINTK("EXIT\n"); | ||
1432 | return 0; | ||
1433 | } | ||
1434 | |||
1435 | |||
1436 | /* | ||
1437 | * Get the Fixed Part of the Display | ||
1438 | */ | ||
1439 | |||
1440 | static int virgefb_get_fix(struct fb_fix_screeninfo *fix, int con, | ||
1441 | struct fb_info *info) | ||
1442 | { | ||
1443 | struct virgefb_par par; | ||
1444 | int error = 0; | ||
1445 | |||
1446 | DPRINTK("ENTER\n"); | ||
1447 | if (con == -1) | ||
1448 | virgefb_get_par(&par); | ||
1449 | else | ||
1450 | error = fbhw->decode_var(&fb_display[con].var, &par); | ||
1451 | |||
1452 | if (!error) | ||
1453 | error = fbhw->encode_fix(fix, &par); | ||
1454 | DPRINTK("EXIT\n"); | ||
1455 | return(error); | ||
1456 | } | ||
1457 | |||
1458 | |||
1459 | /* | ||
1460 | * Get the User Defined Part of the Display | ||
1461 | */ | ||
1462 | |||
1463 | static int virgefb_get_var(struct fb_var_screeninfo *var, int con, | ||
1464 | struct fb_info *info) | ||
1465 | { | ||
1466 | struct virgefb_par par; | ||
1467 | int error = 0; | ||
1468 | |||
1469 | DPRINTK("ENTER\n"); | ||
1470 | if (con == -1) { | ||
1471 | virgefb_get_par(&par); | ||
1472 | error = fbhw->encode_var(var, &par); | ||
1473 | disp.var = *var; /* ++Andre: don't know if this is the right place */ | ||
1474 | } else { | ||
1475 | *var = fb_display[con].var; | ||
1476 | } | ||
1477 | DPRINTK("EXIT\n"); | ||
1478 | return(error); | ||
1479 | } | ||
1480 | |||
1481 | static void virgefb_set_disp(int con, struct fb_info *info) | ||
1482 | { | ||
1483 | struct fb_fix_screeninfo fix; | ||
1484 | struct display *display; | ||
1485 | |||
1486 | DPRINTK("ENTER\n"); | ||
1487 | if (con >= 0) | ||
1488 | display = &fb_display[con]; | ||
1489 | else | ||
1490 | display = &disp; /* used during initialization */ | ||
1491 | |||
1492 | virgefb_get_fix(&fix, con, info); | ||
1493 | if (con == -1) | ||
1494 | con = 0; | ||
1495 | if(on_zorro2) { | ||
1496 | info->screen_base = (char*)v_ram; | ||
1497 | } else { | ||
1498 | switch (display->var.bits_per_pixel) { | ||
1499 | #ifdef FBCON_HAS_CFB8 | ||
1500 | case 8: | ||
1501 | info->screen_base = (char*)(v_ram + CYBMEM_OFFSET_8); | ||
1502 | break; | ||
1503 | #endif | ||
1504 | #ifdef FBCON_HAS_CFB16 | ||
1505 | case 16: | ||
1506 | info->screen_base = (char*)(v_ram + CYBMEM_OFFSET_16); | ||
1507 | break; | ||
1508 | #endif | ||
1509 | #ifdef FBCON_HAS_CFB32 | ||
1510 | case 32: | ||
1511 | info->screen_base = (char*)(v_ram + CYBMEM_OFFSET_32); | ||
1512 | break; | ||
1513 | #endif | ||
1514 | } | ||
1515 | } | ||
1516 | display->visual = fix.visual; | ||
1517 | display->type = fix.type; | ||
1518 | display->type_aux = fix.type_aux; | ||
1519 | display->ypanstep = fix.ypanstep; | ||
1520 | display->ywrapstep = fix.ywrapstep; | ||
1521 | display->can_soft_blank = 1; | ||
1522 | display->inverse = virgefb_inverse; | ||
1523 | display->line_length = display->var.xres_virtual* | ||
1524 | display->var.bits_per_pixel/8; | ||
1525 | |||
1526 | switch (display->var.bits_per_pixel) { | ||
1527 | #ifdef FBCON_HAS_CFB8 | ||
1528 | case 8: | ||
1529 | if (display->var.accel_flags & FB_ACCELF_TEXT) { | ||
1530 | display->dispsw = &fbcon_virge8; | ||
1531 | #warning FIXME: We should reinit the graphics engine here | ||
1532 | } else | ||
1533 | display->dispsw = &fbcon_cfb8; | ||
1534 | break; | ||
1535 | #endif | ||
1536 | #ifdef FBCON_HAS_CFB16 | ||
1537 | case 16: | ||
1538 | if (display->var.accel_flags & FB_ACCELF_TEXT) { | ||
1539 | display->dispsw = &fbcon_virge16; | ||
1540 | } else | ||
1541 | display->dispsw = &fbcon_cfb16; | ||
1542 | display->dispsw_data = &fbcon_cmap.cfb16; | ||
1543 | break; | ||
1544 | #endif | ||
1545 | #ifdef FBCON_HAS_CFB32 | ||
1546 | case 32: | ||
1547 | if (display->var.accel_flags & FB_ACCELF_TEXT) { | ||
1548 | display->dispsw = &fbcon_virge32; | ||
1549 | } else | ||
1550 | display->dispsw = &fbcon_cfb32; | ||
1551 | display->dispsw_data = &fbcon_cmap.cfb32; | ||
1552 | break; | ||
1553 | #endif | ||
1554 | default: | ||
1555 | display->dispsw = &fbcon_dummy; | ||
1556 | break; | ||
1557 | } | ||
1558 | DPRINTK("EXIT v_ram virt = 0x%8.8lx\n",(unsigned long)display->screen_base); | ||
1559 | } | ||
1560 | |||
1561 | |||
1562 | /* | ||
1563 | * Set the User Defined Part of the Display | ||
1564 | */ | ||
1565 | |||
1566 | static int virgefb_set_var(struct fb_var_screeninfo *var, int con, | ||
1567 | struct fb_info *info) | ||
1568 | { | ||
1569 | int err, oldxres, oldyres, oldvxres, oldvyres, oldbpp, oldaccel; | ||
1570 | |||
1571 | DPRINTK("ENTER\n"); | ||
1572 | |||
1573 | if ((err = virgefb_do_fb_set_var(var, con == info->currcon))) { | ||
1574 | DPRINTK("EXIT\n"); | ||
1575 | return(err); | ||
1576 | } | ||
1577 | if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) { | ||
1578 | oldxres = fb_display[con].var.xres; | ||
1579 | oldyres = fb_display[con].var.yres; | ||
1580 | oldvxres = fb_display[con].var.xres_virtual; | ||
1581 | oldvyres = fb_display[con].var.yres_virtual; | ||
1582 | oldbpp = fb_display[con].var.bits_per_pixel; | ||
1583 | oldaccel = fb_display[con].var.accel_flags; | ||
1584 | fb_display[con].var = *var; | ||
1585 | if (oldxres != var->xres || oldyres != var->yres || | ||
1586 | oldvxres != var->xres_virtual || | ||
1587 | oldvyres != var->yres_virtual || | ||
1588 | oldbpp != var->bits_per_pixel || | ||
1589 | oldaccel != var->accel_flags) { | ||
1590 | virgefb_set_disp(con, info); | ||
1591 | if (fb_info.changevar) | ||
1592 | (*fb_info.changevar)(con); | ||
1593 | fb_alloc_cmap(&fb_display[con].cmap, 0, 0); | ||
1594 | do_install_cmap(con, info); | ||
1595 | } | ||
1596 | } | ||
1597 | var->activate = 0; | ||
1598 | DPRINTK("EXIT\n"); | ||
1599 | return 0; | ||
1600 | } | ||
1601 | |||
1602 | |||
1603 | /* | ||
1604 | * Get the Colormap | ||
1605 | */ | ||
1606 | |||
1607 | static int virgefb_get_cmap(struct fb_cmap *cmap, int kspc, int con, | ||
1608 | struct fb_info *info) | ||
1609 | { | ||
1610 | DPRINTK("ENTER\n"); | ||
1611 | if (con == info->currcon) { /* current console? */ | ||
1612 | DPRINTK("EXIT - console is current console, fb_get_cmap\n"); | ||
1613 | return(fb_get_cmap(cmap, kspc, fbhw->getcolreg, info)); | ||
1614 | } else if (fb_display[con].cmap.len) { /* non default colormap? */ | ||
1615 | DPRINTK("Use console cmap\n"); | ||
1616 | fb_copy_cmap(&fb_display[con].cmap, cmap, kspc ? 0 : 2); | ||
1617 | } else { | ||
1618 | DPRINTK("Use default cmap\n"); | ||
1619 | fb_copy_cmap(fb_default_cmap(fb_display[con].var.bits_per_pixel==8 ? 256 : 16), | ||
1620 | cmap, kspc ? 0 : 2); | ||
1621 | } | ||
1622 | DPRINTK("EXIT\n"); | ||
1623 | return 0; | ||
1624 | } | ||
1625 | |||
1626 | static struct fb_ops virgefb_ops = { | ||
1627 | .owner = THIS_MODULE, | ||
1628 | .fb_get_fix = virgefb_get_fix, | ||
1629 | .fb_get_var = virgefb_get_var, | ||
1630 | .fb_set_var = virgefb_set_var, | ||
1631 | .fb_get_cmap = virgefb_get_cmap, | ||
1632 | .fb_set_cmap = gen_set_cmap, | ||
1633 | .fb_setcolreg = virgefb_setcolreg, | ||
1634 | .fb_blank = virgefb_blank, | ||
1635 | }; | ||
1636 | |||
1637 | int __init virgefb_setup(char *options) | ||
1638 | { | ||
1639 | char *this_opt; | ||
1640 | fb_info.fontname[0] = '\0'; | ||
1641 | |||
1642 | DPRINTK("ENTER\n"); | ||
1643 | if (!options || !*options) { | ||
1644 | DPRINTK("EXIT\n"); | ||
1645 | return 0; | ||
1646 | } | ||
1647 | |||
1648 | while ((this_opt = strsep(&options, ",")) != NULL) { | ||
1649 | if (!*this_opt) | ||
1650 | continue; | ||
1651 | if (!strcmp(this_opt, "inverse")) { | ||
1652 | virgefb_inverse = 1; | ||
1653 | fb_invert_cmaps(); | ||
1654 | } else if (!strncmp(this_opt, "font:", 5)) | ||
1655 | strcpy(fb_info.fontname, this_opt+5); | ||
1656 | #ifdef FBCON_HAS_CFB8 | ||
1657 | else if (!strcmp (this_opt, "virge8")){ | ||
1658 | virgefb_default = virgefb_predefined[VIRGE8_DEFMODE].var; | ||
1659 | } | ||
1660 | #endif | ||
1661 | #ifdef FBCON_HAS_CFB16 | ||
1662 | else if (!strcmp (this_opt, "virge16")){ | ||
1663 | virgefb_default = virgefb_predefined[VIRGE16_DEFMODE].var; | ||
1664 | } | ||
1665 | #endif | ||
1666 | #ifdef FBCON_HAS_CFB32 | ||
1667 | else if (!strcmp (this_opt, "virge32")){ | ||
1668 | virgefb_default = virgefb_predefined[VIRGE32_DEFMODE].var; | ||
1669 | } | ||
1670 | #endif | ||
1671 | else | ||
1672 | virgefb_get_video_mode(this_opt); | ||
1673 | } | ||
1674 | |||
1675 | printk(KERN_INFO "mode : xres=%d, yres=%d, bpp=%d\n", virgefb_default.xres, | ||
1676 | virgefb_default.yres, virgefb_default.bits_per_pixel); | ||
1677 | DPRINTK("EXIT\n"); | ||
1678 | return 0; | ||
1679 | } | ||
1680 | |||
1681 | |||
1682 | /* | ||
1683 | * Get a Video Mode | ||
1684 | */ | ||
1685 | |||
1686 | static int __init virgefb_get_video_mode(const char *name) | ||
1687 | { | ||
1688 | int i; | ||
1689 | |||
1690 | DPRINTK("ENTER\n"); | ||
1691 | for (i = 0; i < NUM_TOTAL_MODES; i++) { | ||
1692 | if (!strcmp(name, virgefb_predefined[i].name)) { | ||
1693 | virgefb_default = virgefb_predefined[i].var; | ||
1694 | DPRINTK("EXIT\n"); | ||
1695 | return(i); | ||
1696 | } | ||
1697 | } | ||
1698 | /* ++Andre: set virgefb default mode */ | ||
1699 | |||
1700 | /* prefer 16 bit depth, 8 if no 16, if no 8 or 16 use 32 */ | ||
1701 | |||
1702 | #ifdef FBCON_HAS_CFB32 | ||
1703 | virgefb_default = virgefb_predefined[VIRGE32_DEFMODE].var; | ||
1704 | #endif | ||
1705 | #ifdef FBCON_HAS_CFB8 | ||
1706 | virgefb_default = virgefb_predefined[VIRGE8_DEFMODE].var; | ||
1707 | #endif | ||
1708 | #ifdef FBCON_HAS_CFB16 | ||
1709 | virgefb_default = virgefb_predefined[VIRGE16_DEFMODE].var; | ||
1710 | #endif | ||
1711 | DPRINTK("EXIT\n"); | ||
1712 | return 0; | ||
1713 | } | ||
1714 | |||
1715 | /* | ||
1716 | * Initialization | ||
1717 | */ | ||
1718 | |||
1719 | int __init virgefb_init(void) | ||
1720 | { | ||
1721 | struct virgefb_par par; | ||
1722 | unsigned long board_addr, board_size; | ||
1723 | struct zorro_dev *z = NULL; | ||
1724 | |||
1725 | DPRINTK("ENTER\n"); | ||
1726 | |||
1727 | z = zorro_find_device(ZORRO_PROD_PHASE5_CYBERVISION64_3D, NULL); | ||
1728 | if (!z) | ||
1729 | return -ENODEV; | ||
1730 | |||
1731 | board_addr = z->resource.start; | ||
1732 | if (board_addr < 0x01000000) { | ||
1733 | |||
1734 | /* board running in Z2 space. This includes the video memory | ||
1735 | as well as the S3 register set */ | ||
1736 | |||
1737 | on_zorro2 = 1; | ||
1738 | board_size = 0x00400000; | ||
1739 | |||
1740 | if (!request_mem_region(board_addr, board_size, "S3 ViRGE")) | ||
1741 | return -ENOMEM; | ||
1742 | |||
1743 | v_ram_phys = board_addr; | ||
1744 | v_ram = ZTWO_VADDR(v_ram_phys); | ||
1745 | mmio_regs_phys = (unsigned long)(board_addr + 0x003c0000); | ||
1746 | vgaio_regs = (unsigned char *) ZTWO_VADDR(board_addr + 0x003c0000); | ||
1747 | mmio_regs = (unsigned char *)ZTWO_VADDR(mmio_regs_phys); | ||
1748 | vcode_switch_base = (unsigned long) ZTWO_VADDR(board_addr + 0x003a0000); | ||
1749 | printk(KERN_INFO "CV3D detected running in Z2 mode.\n"); | ||
1750 | |||
1751 | } else { | ||
1752 | |||
1753 | /* board running in Z3 space. Separate video memory (3 apertures) | ||
1754 | and S3 register set */ | ||
1755 | |||
1756 | on_zorro2 = 0; | ||
1757 | board_size = 0x01000000; | ||
1758 | |||
1759 | if (!request_mem_region(board_addr, board_size, "S3 ViRGE")) | ||
1760 | return -ENOMEM; | ||
1761 | |||
1762 | v_ram_phys = board_addr + 0x04000000; | ||
1763 | v_ram = (unsigned long)ioremap(v_ram_phys, 0x01000000); | ||
1764 | mmio_regs_phys = board_addr + 0x05000000; | ||
1765 | vgaio_regs = (unsigned char *)ioremap(board_addr +0x0c000000, 0x00100000); /* includes PCI regs */ | ||
1766 | mmio_regs = ioremap(mmio_regs_phys, 0x00010000); | ||
1767 | vcode_switch_base = (unsigned long)ioremap(board_addr + 0x08000000, 0x1000); | ||
1768 | printk(KERN_INFO "CV3D detected running in Z3 mode\n"); | ||
1769 | } | ||
1770 | |||
1771 | #if defined (VIRGEFBDEBUG) | ||
1772 | DPRINTK("board_addr : 0x%8.8lx\n",board_addr); | ||
1773 | DPRINTK("board_size : 0x%8.8lx\n",board_size); | ||
1774 | DPRINTK("mmio_regs_phy : 0x%8.8lx\n",mmio_regs_phys); | ||
1775 | DPRINTK("v_ram_phys : 0x%8.8lx\n",v_ram_phys); | ||
1776 | DPRINTK("vgaio_regs : 0x%8.8lx\n",(unsigned long)vgaio_regs); | ||
1777 | DPRINTK("mmio_regs : 0x%8.8lx\n",(unsigned long)mmio_regs); | ||
1778 | DPRINTK("v_ram : 0x%8.8lx\n",v_ram); | ||
1779 | DPRINTK("vcode sw base : 0x%8.8lx\n",vcode_switch_base); | ||
1780 | #endif | ||
1781 | fbhw = &virgefb_hw_switch; | ||
1782 | strcpy(fb_info.modename, virgefb_name); | ||
1783 | fb_info.changevar = NULL; | ||
1784 | fb_info.fbops = &virgefb_ops; | ||
1785 | fb_info.disp = &disp; | ||
1786 | fb_info.currcon = -1; | ||
1787 | fb_info.switch_con = &virgefb_switch; | ||
1788 | fb_info.updatevar = &virgefb_updatevar; | ||
1789 | fb_info.flags = FBINFO_FLAG_DEFAULT; | ||
1790 | fbhw->init(); | ||
1791 | fbhw->decode_var(&virgefb_default, &par); | ||
1792 | fbhw->encode_var(&virgefb_default, &par); | ||
1793 | virgefb_do_fb_set_var(&virgefb_default, 1); | ||
1794 | virgefb_get_var(&fb_display[0].var, -1, &fb_info); | ||
1795 | virgefb_set_disp(-1, &fb_info); | ||
1796 | do_install_cmap(0, &fb_info); | ||
1797 | |||
1798 | if (register_framebuffer(&fb_info) < 0) { | ||
1799 | #warning release resources | ||
1800 | printk(KERN_ERR "virgefb.c: register_framebuffer failed\n"); | ||
1801 | DPRINTK("EXIT\n"); | ||
1802 | goto out_unmap; | ||
1803 | } | ||
1804 | |||
1805 | printk(KERN_INFO "fb%d: %s frame buffer device, using %ldK of video memory\n", | ||
1806 | fb_info.node, fb_info.modename, v_ram_size>>10); | ||
1807 | |||
1808 | /* TODO: This driver cannot be unloaded yet */ | ||
1809 | |||
1810 | DPRINTK("EXIT\n"); | ||
1811 | return 0; | ||
1812 | |||
1813 | out_unmap: | ||
1814 | if (board_addr >= 0x01000000) { | ||
1815 | if (v_ram) | ||
1816 | iounmap((void*)v_ram); | ||
1817 | if (vgaio_regs) | ||
1818 | iounmap(vgaio_regs); | ||
1819 | if (mmio_regs) | ||
1820 | iounmap(mmio_regs); | ||
1821 | if (vcode_switch_base) | ||
1822 | iounmap((void*)vcode_switch_base); | ||
1823 | v_ram = vcode_switch_base = 0; | ||
1824 | vgaio_regs = mmio_regs = NULL; | ||
1825 | } | ||
1826 | return -EINVAL; | ||
1827 | } | ||
1828 | |||
1829 | |||
1830 | static int virgefb_switch(int con, struct fb_info *info) | ||
1831 | { | ||
1832 | DPRINTK("ENTER\n"); | ||
1833 | /* Do we have to save the colormap? */ | ||
1834 | if (fb_display[info->currcon].cmap.len) | ||
1835 | fb_get_cmap(&fb_display[info->currcon].cmap, 1, | ||
1836 | fbhw->getcolreg, info); | ||
1837 | virgefb_do_fb_set_var(&fb_display[con].var, 1); | ||
1838 | info->currcon = con; | ||
1839 | /* Install new colormap */ | ||
1840 | do_install_cmap(con, info); | ||
1841 | DPRINTK("EXIT\n"); | ||
1842 | return 0; | ||
1843 | } | ||
1844 | |||
1845 | |||
1846 | /* | ||
1847 | * Update the `var' structure (called by fbcon.c) | ||
1848 | * | ||
1849 | * This call looks only at yoffset and the FB_VMODE_YWRAP flag in `var'. | ||
1850 | * Since it's called by a kernel driver, no range checking is done. | ||
1851 | */ | ||
1852 | |||
1853 | static int virgefb_updatevar(int con, struct fb_info *info) | ||
1854 | { | ||
1855 | DPRINTK("ENTER\n"); | ||
1856 | return 0; | ||
1857 | DPRINTK("EXIT\n"); | ||
1858 | } | ||
1859 | |||
1860 | /* | ||
1861 | * Blank the display. | ||
1862 | */ | ||
1863 | |||
1864 | static int virgefb_blank(int blank, struct fb_info *info) | ||
1865 | { | ||
1866 | DPRINTK("ENTER\n"); | ||
1867 | fbhw->blank(blank); | ||
1868 | DPRINTK("EXIT\n"); | ||
1869 | return 0; | ||
1870 | } | ||
1871 | |||
1872 | |||
1873 | /* | ||
1874 | * Text console acceleration | ||
1875 | */ | ||
1876 | |||
1877 | #ifdef FBCON_HAS_CFB8 | ||
1878 | static void fbcon_virge8_bmove(struct display *p, int sy, int sx, int dy, | ||
1879 | int dx, int height, int width) | ||
1880 | { | ||
1881 | sx *= 8; dx *= 8; width *= 8; | ||
1882 | virgefb_BitBLT((u_short)sx, (u_short)(sy*fontheight(p)), (u_short)dx, | ||
1883 | (u_short)(dy*fontheight(p)), (u_short)width, | ||
1884 | (u_short)(height*fontheight(p)), (u_short)p->next_line, 8); | ||
1885 | } | ||
1886 | |||
1887 | static void fbcon_virge8_clear(struct vc_data *conp, struct display *p, int sy, | ||
1888 | int sx, int height, int width) | ||
1889 | { | ||
1890 | unsigned char bg; | ||
1891 | |||
1892 | sx *= 8; width *= 8; | ||
1893 | bg = attr_bgcol_ec(p,conp); | ||
1894 | virgefb_RectFill((u_short)sx, (u_short)(sy*fontheight(p)), | ||
1895 | (u_short)width, (u_short)(height*fontheight(p)), | ||
1896 | (u_short)bg, (u_short)p->next_line, 8); | ||
1897 | } | ||
1898 | |||
1899 | static void fbcon_virge8_putc(struct vc_data *conp, struct display *p, int c, int yy, | ||
1900 | int xx) | ||
1901 | { | ||
1902 | if (blit_maybe_busy) | ||
1903 | virgefb_wait_for_idle(); | ||
1904 | fbcon_cfb8_putc(conp, p, c, yy, xx); | ||
1905 | } | ||
1906 | |||
1907 | static void fbcon_virge8_putcs(struct vc_data *conp, struct display *p, | ||
1908 | const unsigned short *s, int count, int yy, int xx) | ||
1909 | { | ||
1910 | if (blit_maybe_busy) | ||
1911 | virgefb_wait_for_idle(); | ||
1912 | fbcon_cfb8_putcs(conp, p, s, count, yy, xx); | ||
1913 | } | ||
1914 | |||
1915 | static void fbcon_virge8_revc(struct display *p, int xx, int yy) | ||
1916 | { | ||
1917 | if (blit_maybe_busy) | ||
1918 | virgefb_wait_for_idle(); | ||
1919 | fbcon_cfb8_revc(p, xx, yy); | ||
1920 | } | ||
1921 | |||
1922 | static void fbcon_virge8_clear_margins(struct vc_data *conp, struct display *p, | ||
1923 | int bottom_only) | ||
1924 | { | ||
1925 | if (blit_maybe_busy) | ||
1926 | virgefb_wait_for_idle(); | ||
1927 | fbcon_cfb8_clear_margins(conp, p, bottom_only); | ||
1928 | } | ||
1929 | |||
1930 | static struct display_switch fbcon_virge8 = { | ||
1931 | .setup = fbcon_cfb8_setup, | ||
1932 | .bmove = fbcon_virge8_bmove, | ||
1933 | .clear = fbcon_virge8_clear, | ||
1934 | .putc = fbcon_virge8_putc, | ||
1935 | .putcs = fbcon_virge8_putcs, | ||
1936 | .revc = fbcon_virge8_revc, | ||
1937 | .clear_margins = fbcon_virge8_clear_margins, | ||
1938 | .fontwidthmask = FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16) | ||
1939 | }; | ||
1940 | #endif | ||
1941 | |||
1942 | #ifdef FBCON_HAS_CFB16 | ||
1943 | static void fbcon_virge16_bmove(struct display *p, int sy, int sx, int dy, | ||
1944 | int dx, int height, int width) | ||
1945 | { | ||
1946 | sx *= 8; dx *= 8; width *= 8; | ||
1947 | virgefb_BitBLT((u_short)sx, (u_short)(sy*fontheight(p)), (u_short)dx, | ||
1948 | (u_short)(dy*fontheight(p)), (u_short)width, | ||
1949 | (u_short)(height*fontheight(p)), (u_short)p->next_line, 16); | ||
1950 | } | ||
1951 | |||
1952 | static void fbcon_virge16_clear(struct vc_data *conp, struct display *p, int sy, | ||
1953 | int sx, int height, int width) | ||
1954 | { | ||
1955 | unsigned char bg; | ||
1956 | |||
1957 | sx *= 8; width *= 8; | ||
1958 | bg = attr_bgcol_ec(p,conp); | ||
1959 | virgefb_RectFill((u_short)sx, (u_short)(sy*fontheight(p)), | ||
1960 | (u_short)width, (u_short)(height*fontheight(p)), | ||
1961 | (u_short)bg, (u_short)p->next_line, 16); | ||
1962 | } | ||
1963 | |||
1964 | static void fbcon_virge16_putc(struct vc_data *conp, struct display *p, int c, int yy, | ||
1965 | int xx) | ||
1966 | { | ||
1967 | if (blit_maybe_busy) | ||
1968 | virgefb_wait_for_idle(); | ||
1969 | fbcon_cfb16_putc(conp, p, c, yy, xx); | ||
1970 | } | ||
1971 | |||
1972 | static void fbcon_virge16_putcs(struct vc_data *conp, struct display *p, | ||
1973 | const unsigned short *s, int count, int yy, int xx) | ||
1974 | { | ||
1975 | if (blit_maybe_busy) | ||
1976 | virgefb_wait_for_idle(); | ||
1977 | fbcon_cfb16_putcs(conp, p, s, count, yy, xx); | ||
1978 | } | ||
1979 | |||
1980 | static void fbcon_virge16_revc(struct display *p, int xx, int yy) | ||
1981 | { | ||
1982 | if (blit_maybe_busy) | ||
1983 | virgefb_wait_for_idle(); | ||
1984 | fbcon_cfb16_revc(p, xx, yy); | ||
1985 | } | ||
1986 | |||
1987 | static void fbcon_virge16_clear_margins(struct vc_data *conp, struct display *p, | ||
1988 | int bottom_only) | ||
1989 | { | ||
1990 | if (blit_maybe_busy) | ||
1991 | virgefb_wait_for_idle(); | ||
1992 | fbcon_cfb16_clear_margins(conp, p, bottom_only); | ||
1993 | } | ||
1994 | |||
1995 | static struct display_switch fbcon_virge16 = { | ||
1996 | .setup = fbcon_cfb16_setup, | ||
1997 | .bmove = fbcon_virge16_bmove, | ||
1998 | .clear = fbcon_virge16_clear, | ||
1999 | .putc = fbcon_virge16_putc, | ||
2000 | .putcs = fbcon_virge16_putcs, | ||
2001 | .revc = fbcon_virge16_revc, | ||
2002 | .clear_margins = fbcon_virge16_clear_margins, | ||
2003 | .fontwidthmask = FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16) | ||
2004 | }; | ||
2005 | #endif | ||
2006 | |||
2007 | #ifdef FBCON_HAS_CFB32 | ||
2008 | static void fbcon_virge32_bmove(struct display *p, int sy, int sx, int dy, | ||
2009 | int dx, int height, int width) | ||
2010 | { | ||
2011 | sx *= 16; dx *= 16; width *= 16; /* doubled these values to do 32 bit blit */ | ||
2012 | virgefb_BitBLT((u_short)sx, (u_short)(sy*fontheight(p)), (u_short)dx, | ||
2013 | (u_short)(dy*fontheight(p)), (u_short)width, | ||
2014 | (u_short)(height*fontheight(p)), (u_short)p->next_line, 16); | ||
2015 | } | ||
2016 | |||
2017 | static void fbcon_virge32_clear(struct vc_data *conp, struct display *p, int sy, | ||
2018 | int sx, int height, int width) | ||
2019 | { | ||
2020 | unsigned char bg; | ||
2021 | |||
2022 | sx *= 16; width *= 16; /* doubled these values to do 32 bit blit */ | ||
2023 | bg = attr_bgcol_ec(p,conp); | ||
2024 | virgefb_RectFill((u_short)sx, (u_short)(sy*fontheight(p)), | ||
2025 | (u_short)width, (u_short)(height*fontheight(p)), | ||
2026 | (u_short)bg, (u_short)p->next_line, 16); | ||
2027 | } | ||
2028 | |||
2029 | static void fbcon_virge32_putc(struct vc_data *conp, struct display *p, int c, int yy, | ||
2030 | int xx) | ||
2031 | { | ||
2032 | if (blit_maybe_busy) | ||
2033 | virgefb_wait_for_idle(); | ||
2034 | fbcon_cfb32_putc(conp, p, c, yy, xx); | ||
2035 | } | ||
2036 | |||
2037 | static void fbcon_virge32_putcs(struct vc_data *conp, struct display *p, | ||
2038 | const unsigned short *s, int count, int yy, int xx) | ||
2039 | { | ||
2040 | if (blit_maybe_busy) | ||
2041 | virgefb_wait_for_idle(); | ||
2042 | fbcon_cfb32_putcs(conp, p, s, count, yy, xx); | ||
2043 | } | ||
2044 | |||
2045 | static void fbcon_virge32_revc(struct display *p, int xx, int yy) | ||
2046 | { | ||
2047 | if (blit_maybe_busy) | ||
2048 | virgefb_wait_for_idle(); | ||
2049 | fbcon_cfb32_revc(p, xx, yy); | ||
2050 | } | ||
2051 | |||
2052 | static void fbcon_virge32_clear_margins(struct vc_data *conp, struct display *p, | ||
2053 | int bottom_only) | ||
2054 | { | ||
2055 | if (blit_maybe_busy) | ||
2056 | virgefb_wait_for_idle(); | ||
2057 | fbcon_cfb32_clear_margins(conp, p, bottom_only); | ||
2058 | } | ||
2059 | |||
2060 | static struct display_switch fbcon_virge32 = { | ||
2061 | .setup = fbcon_cfb32_setup, | ||
2062 | .bmove = fbcon_virge32_bmove, | ||
2063 | .clear = fbcon_virge32_clear, | ||
2064 | .putc = fbcon_virge32_putc, | ||
2065 | .putcs = fbcon_virge32_putcs, | ||
2066 | .revc = fbcon_virge32_revc, | ||
2067 | .clear_margins = fbcon_virge32_clear_margins, | ||
2068 | .fontwidthmask = FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16) | ||
2069 | }; | ||
2070 | #endif | ||
2071 | |||
2072 | #ifdef MODULE | ||
2073 | MODULE_LICENSE("GPL"); | ||
2074 | |||
2075 | int init_module(void) | ||
2076 | { | ||
2077 | return virgefb_init(); | ||
2078 | } | ||
2079 | #endif /* MODULE */ | ||
2080 | |||
2081 | static int cv3d_has_4mb(void) | ||
2082 | { | ||
2083 | /* cyberfb version didn't work, neither does this (not reliably) | ||
2084 | forced to return 4MB */ | ||
2085 | #if 0 | ||
2086 | volatile unsigned long *t0, *t2; | ||
2087 | #endif | ||
2088 | DPRINTK("ENTER\n"); | ||
2089 | #if 0 | ||
2090 | /* write patterns in memory and test if they can be read */ | ||
2091 | t0 = (volatile unsigned long *)v_ram; | ||
2092 | t2 = (volatile unsigned long *)(v_ram + 0x00200000); | ||
2093 | *t0 = 0x87654321; | ||
2094 | *t2 = 0x12345678; | ||
2095 | |||
2096 | if (*t0 != 0x87654321) { | ||
2097 | /* read of first location failed */ | ||
2098 | DPRINTK("EXIT - 0MB !\n"); | ||
2099 | return 0; | ||
2100 | } | ||
2101 | |||
2102 | if (*t2 == 0x87654321) { | ||
2103 | /* should read 0x12345678 if 4MB */ | ||
2104 | DPRINTK("EXIT - 2MB(a) \n"); | ||
2105 | return 0; | ||
2106 | } | ||
2107 | |||
2108 | if (*t2 != 0x12345678) { | ||
2109 | /* upper 2MB read back match failed */ | ||
2110 | DPRINTK("EXIT - 2MB(b)\n"); | ||
2111 | return 0; | ||
2112 | } | ||
2113 | |||
2114 | /* may have 4MB */ | ||
2115 | |||
2116 | *t2 = 0xAAAAAAAA; | ||
2117 | |||
2118 | if(*t2 != 0xAAAAAAAA) { | ||
2119 | /* upper 2MB read back match failed */ | ||
2120 | DPRINTK("EXIT - 2MB(c)\n"); | ||
2121 | return 0; | ||
2122 | } | ||
2123 | |||
2124 | *t2 = 0x55555555; | ||
2125 | |||
2126 | if(*t2 != 0x55555555) { | ||
2127 | /* upper 2MB read back match failed */ | ||
2128 | DPRINTK("EXIT - 2MB(d)\n"); | ||
2129 | return 0; | ||
2130 | } | ||
2131 | |||
2132 | #endif | ||
2133 | DPRINTK("EXIT - 4MB\n"); | ||
2134 | return 1; | ||
2135 | } | ||
2136 | |||
2137 | |||
2138 | /* | ||
2139 | * Computes M, N, and R pll params for freq arg. | ||
2140 | * Returns 16 bits - hi 0MMMMMM lo 0RRNNNNN | ||
2141 | */ | ||
2142 | |||
2143 | #define REFCLOCK 14318000 | ||
2144 | |||
2145 | static unsigned short virgefb_compute_clock(unsigned long freq) | ||
2146 | { | ||
2147 | |||
2148 | unsigned char m, n, r, rpwr; | ||
2149 | unsigned long diff, ftry, save = ~0UL; | ||
2150 | unsigned short mnr; | ||
2151 | |||
2152 | DPRINTK("ENTER\n"); | ||
2153 | |||
2154 | for (r = 0, rpwr = 1 ; r < 4 ; r++, rpwr *= 2) { | ||
2155 | if ((135000000 <= (rpwr * freq)) && ((rpwr * freq) <= 270000000)) { | ||
2156 | for (n = 1 ; n < 32 ; n++) { | ||
2157 | m = ((freq * (n + 2) * rpwr)/REFCLOCK) - 2; | ||
2158 | if (m == 0 || m >127) | ||
2159 | break; | ||
2160 | ftry = ((REFCLOCK / (n + 2)) * (m + 2)) / rpwr; | ||
2161 | if (ftry > freq) | ||
2162 | diff = ftry - freq; | ||
2163 | else | ||
2164 | diff = freq - ftry; | ||
2165 | if (diff < save) { | ||
2166 | save = diff; | ||
2167 | mnr = (m << 8) | (r<<5) | (n & 0x7f); | ||
2168 | } | ||
2169 | } | ||
2170 | } | ||
2171 | } | ||
2172 | if (save == ~0UL) | ||
2173 | printk("Can't compute clock PLL values for %ld Hz clock\n", freq); | ||
2174 | DPRINTK("EXIT\n"); | ||
2175 | return(mnr); | ||
2176 | } | ||
2177 | |||
2178 | static void virgefb_load_video_mode(struct fb_var_screeninfo *video_mode) | ||
2179 | { | ||
2180 | unsigned char lace, dblscan, tmp; | ||
2181 | unsigned short mnr; | ||
2182 | unsigned short HT, HDE, HBS, HBW, HSS, HSW; | ||
2183 | unsigned short VT, VDE, VBS, VBW, VSS, VSW; | ||
2184 | unsigned short SCO; | ||
2185 | int cr11; | ||
2186 | int cr67; | ||
2187 | int hmul; | ||
2188 | int xres, xres_virtual, hfront, hsync, hback; | ||
2189 | int yres, vfront, vsync, vback; | ||
2190 | int bpp; | ||
2191 | int i; | ||
2192 | long freq; | ||
2193 | |||
2194 | DPRINTK("ENTER : %dx%d-%d\n",video_mode->xres, video_mode->yres, | ||
2195 | video_mode->bits_per_pixel); | ||
2196 | |||
2197 | bpp = video_mode->bits_per_pixel; | ||
2198 | xres = video_mode->xres; | ||
2199 | xres_virtual = video_mode->xres_virtual; | ||
2200 | hfront = video_mode->right_margin; | ||
2201 | hsync = video_mode->hsync_len; | ||
2202 | hback = video_mode->left_margin; | ||
2203 | |||
2204 | lace = 0; | ||
2205 | dblscan = 0; | ||
2206 | |||
2207 | if (video_mode->vmode & FB_VMODE_DOUBLE) { | ||
2208 | yres = video_mode->yres * 2; | ||
2209 | vfront = video_mode->lower_margin * 2; | ||
2210 | vsync = video_mode->vsync_len * 2; | ||
2211 | vback = video_mode->upper_margin * 2; | ||
2212 | dblscan = 1; | ||
2213 | } else if (video_mode->vmode & FB_VMODE_INTERLACED) { | ||
2214 | yres = (video_mode->yres + 1) / 2; | ||
2215 | vfront = (video_mode->lower_margin + 1) / 2; | ||
2216 | vsync = (video_mode->vsync_len + 1) / 2; | ||
2217 | vback = (video_mode->upper_margin + 1) / 2; | ||
2218 | lace = 1; | ||
2219 | } else { | ||
2220 | yres = video_mode->yres; | ||
2221 | vfront = video_mode->lower_margin; | ||
2222 | vsync = video_mode->vsync_len; | ||
2223 | vback = video_mode->upper_margin; | ||
2224 | } | ||
2225 | |||
2226 | switch (bpp) { | ||
2227 | case 8: | ||
2228 | video_mode->red.offset = 0; | ||
2229 | video_mode->green.offset = 0; | ||
2230 | video_mode->blue.offset = 0; | ||
2231 | video_mode->transp.offset = 0; | ||
2232 | video_mode->red.length = 8; | ||
2233 | video_mode->green.length = 8; | ||
2234 | video_mode->blue.length = 8; | ||
2235 | video_mode->transp.length = 0; | ||
2236 | hmul = 1; | ||
2237 | cr67 = 0x00; | ||
2238 | SCO = xres_virtual / 8; | ||
2239 | break; | ||
2240 | case 16: | ||
2241 | video_mode->red.offset = 11; | ||
2242 | video_mode->green.offset = 5; | ||
2243 | video_mode->blue.offset = 0; | ||
2244 | video_mode->transp.offset = 0; | ||
2245 | video_mode->red.length = 5; | ||
2246 | video_mode->green.length = 6; | ||
2247 | video_mode->blue.length = 5; | ||
2248 | video_mode->transp.length = 0; | ||
2249 | hmul = 2; | ||
2250 | cr67 = 0x50; | ||
2251 | SCO = xres_virtual / 4; | ||
2252 | break; | ||
2253 | case 32: | ||
2254 | video_mode->red.offset = 16; | ||
2255 | video_mode->green.offset = 8; | ||
2256 | video_mode->blue.offset = 0; | ||
2257 | video_mode->transp.offset = 24; | ||
2258 | video_mode->red.length = 8; | ||
2259 | video_mode->green.length = 8; | ||
2260 | video_mode->blue.length = 8; | ||
2261 | video_mode->transp.length = 8; | ||
2262 | hmul = 1; | ||
2263 | cr67 = 0xd0; | ||
2264 | SCO = xres_virtual / 2; | ||
2265 | break; | ||
2266 | } | ||
2267 | |||
2268 | HT = (((xres + hfront + hsync + hback) / 8) * hmul) - 5; | ||
2269 | HDE = ((xres / 8) * hmul) - 1; | ||
2270 | HBS = (xres / 8) * hmul; | ||
2271 | HSS = ((xres + hfront) / 8) * hmul; | ||
2272 | HSW = (hsync / 8) * hmul; | ||
2273 | HBW = (((hfront + hsync + hback) / 8) * hmul) - 2; | ||
2274 | |||
2275 | VT = yres + vfront + vsync + vback - 2; | ||
2276 | VDE = yres - 1; | ||
2277 | VBS = yres - 1; | ||
2278 | VSS = yres + vfront; | ||
2279 | VSW = vsync; | ||
2280 | VBW = vfront + vsync + vback - 2; | ||
2281 | |||
2282 | #ifdef VIRGEFBDEBUG | ||
2283 | DPRINTK("HDE : 0x%4.4x, %4.4d\n", HDE, HDE); | ||
2284 | DPRINTK("HBS : 0x%4.4x, %4.4d\n", HBS, HBS); | ||
2285 | DPRINTK("HSS : 0x%4.4x, %4.4d\n", HSS, HSS); | ||
2286 | DPRINTK("HSW : 0x%4.4x, %4.4d\n", HSW, HSW); | ||
2287 | DPRINTK("HBW : 0x%4.4x, %4.4d\n", HBW, HBW); | ||
2288 | DPRINTK("HSS + HSW : 0x%4.4x, %4.4d\n", HSS+HSW, HSS+HSW); | ||
2289 | DPRINTK("HBS + HBW : 0x%4.4x, %4.4d\n", HBS+HBW, HBS+HBW); | ||
2290 | DPRINTK("HT : 0x%4.4x, %4.4d\n", HT, HT); | ||
2291 | DPRINTK("VDE : 0x%4.4x, %4.4d\n", VDE, VDE); | ||
2292 | DPRINTK("VBS : 0x%4.4x, %4.4d\n", VBS, VBS); | ||
2293 | DPRINTK("VSS : 0x%4.4x, %4.4d\n", VSS, VSS); | ||
2294 | DPRINTK("VSW : 0x%4.4x, %4.4d\n", VSW, VSW); | ||
2295 | DPRINTK("VBW : 0x%4.4x, %4.4d\n", VBW, VBW); | ||
2296 | DPRINTK("VT : 0x%4.4x, %4.4d\n", VT, VT); | ||
2297 | #endif | ||
2298 | |||
2299 | /* turn gfx off, don't mess up the display */ | ||
2300 | |||
2301 | gfx_on_off(1); | ||
2302 | |||
2303 | /* H and V sync polarity */ | ||
2304 | |||
2305 | tmp = rb_mmio(GREG_MISC_OUTPUT_R) & 0x2f; /* colour, ram enable, clk sr12/s13 sel */ | ||
2306 | if (!(video_mode->sync & FB_SYNC_HOR_HIGH_ACT)) | ||
2307 | tmp |= 0x40; /* neg H sync polarity */ | ||
2308 | if (!(video_mode->sync & FB_SYNC_VERT_HIGH_ACT)) | ||
2309 | tmp |= 0x80; /* neg V sync polarity */ | ||
2310 | tmp |= 0x0c; /* clk from sr12/sr13 */ | ||
2311 | wb_mmio(GREG_MISC_OUTPUT_W, tmp); | ||
2312 | |||
2313 | /* clocks */ | ||
2314 | |||
2315 | wseq(SEQ_ID_BUS_REQ_CNTL, 0xc0); /* 2 clk mem wr and /RAS1 */ | ||
2316 | wseq(SEQ_ID_CLKSYN_CNTL_2, 0x80); /* b7 is 2 mem clk wr */ | ||
2317 | mnr = virgefb_compute_clock(MEMCLOCK); | ||
2318 | DPRINTK("mem clock %d, m %d, n %d, r %d.\n", MEMCLOCK, ((mnr>>8)&0x7f), (mnr&0x1f), ((mnr >> 5)&0x03)); | ||
2319 | wseq(SEQ_ID_MCLK_LO, (mnr & 0x7f)); | ||
2320 | wseq(SEQ_ID_MCLK_HI, ((mnr & 0x7f00) >> 8)); | ||
2321 | freq = (1000000000 / video_mode->pixclock) * 1000; /* pixclock is in ps ... convert to Hz */ | ||
2322 | mnr = virgefb_compute_clock(freq); | ||
2323 | DPRINTK("dot clock %ld, m %d, n %d, r %d.\n", freq, ((mnr>>8)&0x7f), (mnr&0x1f), ((mnr>>5)&0x03)); | ||
2324 | wseq(SEQ_ID_DCLK_LO, (mnr & 0x7f)); | ||
2325 | wseq(SEQ_ID_DCLK_HI, ((mnr & 0x7f00) >> 8)); | ||
2326 | wseq(SEQ_ID_CLKSYN_CNTL_2, 0xa0); | ||
2327 | wseq(SEQ_ID_CLKSYN_CNTL_2, 0x80); | ||
2328 | udelay(100); | ||
2329 | |||
2330 | /* load display parameters into board */ | ||
2331 | |||
2332 | /* not sure about sync and blanking extensions bits in cr5d and cr5 */ | ||
2333 | |||
2334 | wcrt(CRT_ID_EXT_HOR_OVF, /* 0x5d */ | ||
2335 | ((HT & 0x100) ? 0x01 : 0x00) | | ||
2336 | ((HDE & 0x100) ? 0x02 : 0x00) | | ||
2337 | ((HBS & 0x100) ? 0x04 : 0x00) | | ||
2338 | /* (((HBS + HBW) & 0x40) ? 0x08 : 0x00) | */ | ||
2339 | ((HSS & 0x100) ? 0x10 : 0x00) | | ||
2340 | /* (((HSS + HSW) & 0x20) ? 0x20 : 0x00) | */ | ||
2341 | ((HSW >= 0x20) ? 0x20 : 0x00) | | ||
2342 | (((HT-5) & 0x100) ? 0x40 : 0x00)); | ||
2343 | |||
2344 | wcrt(CRT_ID_EXT_VER_OVF, /* 0x5e */ | ||
2345 | ((VT & 0x400) ? 0x01 : 0x00) | | ||
2346 | ((VDE & 0x400) ? 0x02 : 0x00) | | ||
2347 | ((VBS & 0x400) ? 0x04 : 0x00) | | ||
2348 | ((VSS & 0x400) ? 0x10 : 0x00) | | ||
2349 | 0x40); /* line compare */ | ||
2350 | |||
2351 | wcrt(CRT_ID_START_VER_RETR, VSS); | ||
2352 | cr11 = rcrt(CRT_ID_END_VER_RETR) | 0x20; /* vert interrupt flag */ | ||
2353 | wcrt(CRT_ID_END_VER_RETR, ((cr11 & 0x20) | ((VSS + VSW) & 0x0f))); /* keeps vert irq enable state, also has unlock bit cr0 to 7 */ | ||
2354 | wcrt(CRT_ID_VER_DISP_ENA_END, VDE); | ||
2355 | wcrt(CRT_ID_START_VER_BLANK, VBS); | ||
2356 | wcrt(CRT_ID_END_VER_BLANK, VBS + VBW); /* might be +/- 1 out */ | ||
2357 | wcrt(CRT_ID_HOR_TOTAL, HT); | ||
2358 | wcrt(CRT_ID_DISPLAY_FIFO, HT - 5); | ||
2359 | wcrt(CRT_ID_BACKWAD_COMP_3, 0x10); /* enable display fifo */ | ||
2360 | wcrt(CRT_ID_HOR_DISP_ENA_END, HDE); | ||
2361 | wcrt(CRT_ID_START_HOR_BLANK , HBS); | ||
2362 | wcrt(CRT_ID_END_HOR_BLANK, (HBS + HBW) & 0x1f); | ||
2363 | wcrt(CRT_ID_START_HOR_RETR, HSS); | ||
2364 | wcrt(CRT_ID_END_HOR_RETR, /* cr5 */ | ||
2365 | ((HSS + HSW) & 0x1f) | | ||
2366 | (((HBS + HBW) & 0x20) ? 0x80 : 0x00)); | ||
2367 | wcrt(CRT_ID_VER_TOTAL, VT); | ||
2368 | wcrt(CRT_ID_OVERFLOW, | ||
2369 | ((VT & 0x100) ? 0x01 : 0x00) | | ||
2370 | ((VDE & 0x100) ? 0x02 : 0x00) | | ||
2371 | ((VSS & 0x100) ? 0x04 : 0x00) | | ||
2372 | ((VBS & 0x100) ? 0x08 : 0x00) | | ||
2373 | 0x10 | | ||
2374 | ((VT & 0x200) ? 0x20 : 0x00) | | ||
2375 | ((VDE & 0x200) ? 0x40 : 0x00) | | ||
2376 | ((VSS & 0x200) ? 0x80 : 0x00)); | ||
2377 | wcrt(CRT_ID_MAX_SCAN_LINE, | ||
2378 | (dblscan ? 0x80 : 0x00) | | ||
2379 | 0x40 | | ||
2380 | ((VBS & 0x200) ? 0x20 : 0x00)); | ||
2381 | wcrt(CRT_ID_LINE_COMPARE, 0xff); | ||
2382 | wcrt(CRT_ID_LACE_RETR_START, HT / 2); /* (HT-5)/2 ? */ | ||
2383 | wcrt(CRT_ID_LACE_CONTROL, (lace ? 0x20 : 0x00)); | ||
2384 | |||
2385 | wcrt(CRT_ID_SCREEN_OFFSET, SCO); | ||
2386 | wcrt(CRT_ID_EXT_SYS_CNTL_2, (SCO >> 4) & 0x30 ); | ||
2387 | |||
2388 | /* wait for vert sync before cr67 update */ | ||
2389 | |||
2390 | for (i=0; i < 10000; i++) { | ||
2391 | udelay(10); | ||
2392 | mb(); | ||
2393 | if (rb_mmio(GREG_INPUT_STATUS1_R) & 0x08) | ||
2394 | break; | ||
2395 | } | ||
2396 | |||
2397 | wl_mmio(0x8200, 0x0000c000); /* fifo control (0x00110400 ?) */ | ||
2398 | wcrt(CRT_ID_EXT_MISC_CNTL_2, cr67); | ||
2399 | |||
2400 | /* enable video */ | ||
2401 | |||
2402 | tmp = rb_mmio(ACT_ADDRESS_RESET); | ||
2403 | wb_mmio(ACT_ADDRESS_W, ((bpp == 8) ? 0x20 : 0x00)); /* set b5, ENB PLT in attr idx reg) */ | ||
2404 | tmp = rb_mmio(ACT_ADDRESS_RESET); | ||
2405 | |||
2406 | /* turn gfx on again */ | ||
2407 | |||
2408 | gfx_on_off(0); | ||
2409 | |||
2410 | /* pass-through */ | ||
2411 | |||
2412 | SetVSwitch(1); /* cv3d */ | ||
2413 | |||
2414 | DUMP; | ||
2415 | DPRINTK("EXIT\n"); | ||
2416 | } | ||
2417 | |||
2418 | static inline void gfx_on_off(int toggle) | ||
2419 | { | ||
2420 | unsigned char tmp; | ||
2421 | |||
2422 | DPRINTK("ENTER gfx %s\n", (toggle ? "off" : "on")); | ||
2423 | |||
2424 | toggle = (toggle & 0x01) << 5; | ||
2425 | tmp = rseq(SEQ_ID_CLOCKING_MODE) & (~(0x01 << 5)); | ||
2426 | wseq(SEQ_ID_CLOCKING_MODE, tmp | toggle); | ||
2427 | |||
2428 | DPRINTK("EXIT\n"); | ||
2429 | } | ||
2430 | |||
2431 | #if defined (VIRGEFBDUMP) | ||
2432 | |||
2433 | /* | ||
2434 | * Dump board registers | ||
2435 | */ | ||
2436 | |||
2437 | static void cv64_dump(void) | ||
2438 | { | ||
2439 | int i; | ||
2440 | u8 c, b; | ||
2441 | u16 w; | ||
2442 | u32 l; | ||
2443 | |||
2444 | /* crt, seq, gfx and atr regs */ | ||
2445 | |||
2446 | SelectMMIO; | ||
2447 | |||
2448 | printk("\n"); | ||
2449 | for (i = 0; i <= 0x6f; i++) { | ||
2450 | wb_mmio(CRT_ADDRESS, i); | ||
2451 | printk("crt idx : 0x%2.2x : 0x%2.2x\n", i, rb_mmio(CRT_ADDRESS_R)); | ||
2452 | } | ||
2453 | for (i = 0; i <= 0x1c; i++) { | ||
2454 | wb_mmio(SEQ_ADDRESS, i); | ||
2455 | printk("seq idx : 0x%2.2x : 0x%2.2x\n", i, rb_mmio(SEQ_ADDRESS_R)); | ||
2456 | } | ||
2457 | for (i = 0; i <= 8; i++) { | ||
2458 | wb_mmio(GCT_ADDRESS, i); | ||
2459 | printk("gfx idx : 0x%2.2x : 0x%2.2x\n", i, rb_mmio(GCT_ADDRESS_R)); | ||
2460 | } | ||
2461 | for (i = 0; i <= 0x14; i++) { | ||
2462 | c = rb_mmio(ACT_ADDRESS_RESET); | ||
2463 | wb_mmio(ACT_ADDRESS_W, i); | ||
2464 | printk("atr idx : 0x%2.2x : 0x%2.2x\n", i, rb_mmio(ACT_ADDRESS_R)); | ||
2465 | } | ||
2466 | |||
2467 | /* re-enable video access to palette */ | ||
2468 | |||
2469 | c = rb_mmio(ACT_ADDRESS_RESET); | ||
2470 | udelay(10); | ||
2471 | wb_mmio(ACT_ADDRESS_W, 0x20); | ||
2472 | c = rb_mmio(ACT_ADDRESS_RESET); | ||
2473 | udelay(10); | ||
2474 | |||
2475 | /* general regs */ | ||
2476 | |||
2477 | printk("0x3cc(w 0x3c2) : 0x%2.2x\n", rb_mmio(0x3cc)); /* GREG_MISC_OUTPUT READ */ | ||
2478 | printk("0x3c2(-------) : 0x%2.2x\n", rb_mmio(0x3c2)); /* GREG_INPUT_STATUS 0 READ */ | ||
2479 | printk("0x3c3(w 0x3c3) : 0x%2.2x\n", rb_vgaio(0x3c3)); /* GREG_VIDEO_SUBS_ENABLE */ | ||
2480 | printk("0x3ca(w 0x3da) : 0x%2.2x\n", rb_vgaio(0x3ca)); /* GREG_FEATURE_CONTROL read */ | ||
2481 | printk("0x3da(-------) : 0x%2.2x\n", rb_mmio(0x3da)); /* GREG_INPUT_STATUS 1 READ */ | ||
2482 | |||
2483 | /* engine regs */ | ||
2484 | |||
2485 | for (i = 0x8180; i <= 0x8200; i = i + 4) | ||
2486 | printk("0x%8.8x : 0x%8.8x\n", i, rl_mmio(i)); | ||
2487 | |||
2488 | i = 0x8504; | ||
2489 | printk("0x%8.8x : 0x%8.8x\n", i, rl_mmio(i)); | ||
2490 | i = 0x850c; | ||
2491 | printk("0x%8.8x : 0x%8.8x\n", i, rl_mmio(i)); | ||
2492 | for (i = 0xa4d4; i <= 0xa50c; i = i + 4) | ||
2493 | printk("0x%8.8x : 0x%8.8x\n", i, rl_mmio(i)); | ||
2494 | |||
2495 | /* PCI regs */ | ||
2496 | |||
2497 | SelectCFG; | ||
2498 | |||
2499 | for (c = 0; c < 0x08; c = c + 2) { | ||
2500 | w = (*((u16 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000)) ^ 2))); | ||
2501 | printk("pci 0x%2.2x : 0x%4.4x\n", c, w); | ||
2502 | } | ||
2503 | c = 8; | ||
2504 | l = (*((u32 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000))))); | ||
2505 | printk("pci 0x%2.2x : 0x%8.8x\n", c, l); | ||
2506 | c = 0x0d; | ||
2507 | b = (*((u8 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000)) ^ 3))); | ||
2508 | printk("pci 0x%2.2x : 0x%2.2x\n", c, b); | ||
2509 | c = 0x10; | ||
2510 | l = (*((u32 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000))))); | ||
2511 | printk("pci 0x%2.2x : 0x%8.8x\n", c, l); | ||
2512 | c = 0x30; | ||
2513 | l = (*((u32 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000))))); | ||
2514 | printk("pci 0x%2.2x : 0x%8.8x\n", c, l); | ||
2515 | c = 0x3c; | ||
2516 | b = (*((u8 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000)) ^ 3))); | ||
2517 | printk("pci 0x%2.2x : 0x%2.2x\n", c, b); | ||
2518 | c = 0x3d; | ||
2519 | b = (*((u8 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000)) ^ 3))); | ||
2520 | printk("pci 0x%2.2x : 0x%2.2x\n", c, b); | ||
2521 | c = 0x3e; | ||
2522 | w = (*((u16 *)((u32)(vgaio_regs + c + (on_zorro2 ? 0 : 0x000e0000)) ^ 2))); | ||
2523 | printk("pci 0x%2.2x : 0x%4.4x\n", c, w); | ||
2524 | SelectMMIO; | ||
2525 | } | ||
2526 | #endif | ||
diff --git a/drivers/video/virgefb.h b/drivers/video/virgefb.h deleted file mode 100644 index 157d66deb244..000000000000 --- a/drivers/video/virgefb.h +++ /dev/null | |||
@@ -1,288 +0,0 @@ | |||
1 | /* | ||
2 | * linux/drivers/video/virgefb.h -- CyberVision64 definitions for the | ||
3 | * text console driver. | ||
4 | * | ||
5 | * Copyright (c) 1998 Alan Bair | ||
6 | * | ||
7 | * This file is based on the initial port to Linux of grf_cvreg.h: | ||
8 | * | ||
9 | * Copyright (c) 1997 Antonio Santos | ||
10 | * | ||
11 | * The original work is from the NetBSD CyberVision 64 framebuffer driver | ||
12 | * and support files (grf_cv.c, grf_cvreg.h, ite_cv.c): | ||
13 | * Permission to use the source of this driver was obtained from the | ||
14 | * author Michael Teske by Alan Bair. | ||
15 | * | ||
16 | * Copyright (c) 1995 Michael Teske | ||
17 | * | ||
18 | * History: | ||
19 | * | ||
20 | * | ||
21 | * | ||
22 | * This file is subject to the terms and conditions of the GNU General Public | ||
23 | * License. See the file COPYING in the main directory of this archive | ||
24 | * for more details. | ||
25 | */ | ||
26 | |||
27 | /* Enhanced register mapping (MMIO mode) */ | ||
28 | |||
29 | #define S3_CRTC_ADR 0x03d4 | ||
30 | #define S3_CRTC_DATA 0x03d5 | ||
31 | |||
32 | #define S3_REG_LOCK2 0x39 | ||
33 | #define S3_HGC_MODE 0x45 | ||
34 | |||
35 | #define S3_HWGC_ORGX_H 0x46 | ||
36 | #define S3_HWGC_ORGX_L 0x47 | ||
37 | #define S3_HWGC_ORGY_H 0x48 | ||
38 | #define S3_HWGC_ORGY_L 0x49 | ||
39 | #define S3_HWGC_DX 0x4e | ||
40 | #define S3_HWGC_DY 0x4f | ||
41 | |||
42 | #define S3_LAW_CTL 0x58 | ||
43 | |||
44 | /**************************************************/ | ||
45 | |||
46 | /* | ||
47 | * Defines for the used register addresses (mw) | ||
48 | * | ||
49 | * NOTE: There are some registers that have different addresses when | ||
50 | * in mono or color mode. We only support color mode, and thus | ||
51 | * some addresses won't work in mono-mode! | ||
52 | * | ||
53 | * General and VGA-registers taken from retina driver. Fixed a few | ||
54 | * bugs in it. (SR and GR read address is Port + 1, NOT Port) | ||
55 | * | ||
56 | */ | ||
57 | |||
58 | /* General Registers: */ | ||
59 | #define GREG_MISC_OUTPUT_R 0x03CC | ||
60 | #define GREG_MISC_OUTPUT_W 0x03C2 | ||
61 | #define GREG_FEATURE_CONTROL_R 0x03CA | ||
62 | #define GREG_FEATURE_CONTROL_W 0x03DA | ||
63 | #define GREG_INPUT_STATUS0_R 0x03C2 | ||
64 | #define GREG_INPUT_STATUS1_R 0x03DA | ||
65 | |||
66 | /* Setup Registers: */ | ||
67 | #define SREG_VIDEO_SUBS_ENABLE 0x03C3 /* virge */ | ||
68 | |||
69 | /* Attribute Controller: */ | ||
70 | #define ACT_ADDRESS 0x03C0 | ||
71 | #define ACT_ADDRESS_R 0x03C1 | ||
72 | #define ACT_ADDRESS_W 0x03C0 | ||
73 | #define ACT_ADDRESS_RESET 0x03DA | ||
74 | #define ACT_ID_PALETTE0 0x00 | ||
75 | #define ACT_ID_PALETTE1 0x01 | ||
76 | #define ACT_ID_PALETTE2 0x02 | ||
77 | #define ACT_ID_PALETTE3 0x03 | ||
78 | #define ACT_ID_PALETTE4 0x04 | ||
79 | #define ACT_ID_PALETTE5 0x05 | ||
80 | #define ACT_ID_PALETTE6 0x06 | ||
81 | #define ACT_ID_PALETTE7 0x07 | ||
82 | #define ACT_ID_PALETTE8 0x08 | ||
83 | #define ACT_ID_PALETTE9 0x09 | ||
84 | #define ACT_ID_PALETTE10 0x0A | ||
85 | #define ACT_ID_PALETTE11 0x0B | ||
86 | #define ACT_ID_PALETTE12 0x0C | ||
87 | #define ACT_ID_PALETTE13 0x0D | ||
88 | #define ACT_ID_PALETTE14 0x0E | ||
89 | #define ACT_ID_PALETTE15 0x0F | ||
90 | #define ACT_ID_ATTR_MODE_CNTL 0x10 | ||
91 | #define ACT_ID_OVERSCAN_COLOR 0x11 | ||
92 | #define ACT_ID_COLOR_PLANE_ENA 0x12 | ||
93 | #define ACT_ID_HOR_PEL_PANNING 0x13 | ||
94 | #define ACT_ID_COLOR_SELECT 0x14 /* virge PX_PADD pixel padding register */ | ||
95 | |||
96 | /* Graphics Controller: */ | ||
97 | #define GCT_ADDRESS 0x03CE | ||
98 | #define GCT_ADDRESS_R 0x03CF | ||
99 | #define GCT_ADDRESS_W 0x03CF | ||
100 | #define GCT_ID_SET_RESET 0x00 | ||
101 | #define GCT_ID_ENABLE_SET_RESET 0x01 | ||
102 | #define GCT_ID_COLOR_COMPARE 0x02 | ||
103 | #define GCT_ID_DATA_ROTATE 0x03 | ||
104 | #define GCT_ID_READ_MAP_SELECT 0x04 | ||
105 | #define GCT_ID_GRAPHICS_MODE 0x05 | ||
106 | #define GCT_ID_MISC 0x06 | ||
107 | #define GCT_ID_COLOR_XCARE 0x07 | ||
108 | #define GCT_ID_BITMASK 0x08 | ||
109 | |||
110 | /* Sequencer: */ | ||
111 | #define SEQ_ADDRESS 0x03C4 | ||
112 | #define SEQ_ADDRESS_R 0x03C5 | ||
113 | #define SEQ_ADDRESS_W 0x03C5 | ||
114 | #define SEQ_ID_RESET 0x00 | ||
115 | #define SEQ_ID_CLOCKING_MODE 0x01 | ||
116 | #define SEQ_ID_MAP_MASK 0x02 | ||
117 | #define SEQ_ID_CHAR_MAP_SELECT 0x03 | ||
118 | #define SEQ_ID_MEMORY_MODE 0x04 | ||
119 | #define SEQ_ID_UNKNOWN1 0x05 | ||
120 | #define SEQ_ID_UNKNOWN2 0x06 | ||
121 | #define SEQ_ID_UNKNOWN3 0x07 | ||
122 | /* S3 extensions */ | ||
123 | #define SEQ_ID_UNLOCK_EXT 0x08 | ||
124 | #define SEQ_ID_EXT_SEQ_REG9 0x09 /* b7 = 1 extended reg access by MMIO only */ | ||
125 | #define SEQ_ID_BUS_REQ_CNTL 0x0A | ||
126 | #define SEQ_ID_EXT_MISC_SEQ 0x0B | ||
127 | #define SEQ_ID_UNKNOWN4 0x0C | ||
128 | #define SEQ_ID_EXT_SEQ 0x0D | ||
129 | #define SEQ_ID_UNKNOWN5 0x0E | ||
130 | #define SEQ_ID_UNKNOWN6 0x0F | ||
131 | #define SEQ_ID_MCLK_LO 0x10 | ||
132 | #define SEQ_ID_MCLK_HI 0x11 | ||
133 | #define SEQ_ID_DCLK_LO 0x12 | ||
134 | #define SEQ_ID_DCLK_HI 0x13 | ||
135 | #define SEQ_ID_CLKSYN_CNTL_1 0x14 | ||
136 | #define SEQ_ID_CLKSYN_CNTL_2 0x15 | ||
137 | #define SEQ_ID_CLKSYN_TEST_HI 0x16 /* reserved for S3 testing of the */ | ||
138 | #define SEQ_ID_CLKSYN_TEST_LO 0x17 /* internal clock synthesizer */ | ||
139 | #define SEQ_ID_RAMDAC_CNTL 0x18 | ||
140 | #define SEQ_ID_MORE_MAGIC 0x1A | ||
141 | #define SEQ_ID_SIGNAL_SELECT 0x1C /* new for virge */ | ||
142 | |||
143 | /* CRT Controller: */ | ||
144 | #define CRT_ADDRESS 0x03D4 | ||
145 | #define CRT_ADDRESS_R 0x03D5 | ||
146 | #define CRT_ADDRESS_W 0x03D5 | ||
147 | #define CRT_ID_HOR_TOTAL 0x00 | ||
148 | #define CRT_ID_HOR_DISP_ENA_END 0x01 | ||
149 | #define CRT_ID_START_HOR_BLANK 0x02 | ||
150 | #define CRT_ID_END_HOR_BLANK 0x03 | ||
151 | #define CRT_ID_START_HOR_RETR 0x04 | ||
152 | #define CRT_ID_END_HOR_RETR 0x05 | ||
153 | #define CRT_ID_VER_TOTAL 0x06 | ||
154 | #define CRT_ID_OVERFLOW 0x07 | ||
155 | #define CRT_ID_PRESET_ROW_SCAN 0x08 | ||
156 | #define CRT_ID_MAX_SCAN_LINE 0x09 | ||
157 | #define CRT_ID_CURSOR_START 0x0A | ||
158 | #define CRT_ID_CURSOR_END 0x0B | ||
159 | #define CRT_ID_START_ADDR_HIGH 0x0C | ||
160 | #define CRT_ID_START_ADDR_LOW 0x0D | ||
161 | #define CRT_ID_CURSOR_LOC_HIGH 0x0E | ||
162 | #define CRT_ID_CURSOR_LOC_LOW 0x0F | ||
163 | #define CRT_ID_START_VER_RETR 0x10 | ||
164 | #define CRT_ID_END_VER_RETR 0x11 | ||
165 | #define CRT_ID_VER_DISP_ENA_END 0x12 | ||
166 | #define CRT_ID_SCREEN_OFFSET 0x13 | ||
167 | #define CRT_ID_UNDERLINE_LOC 0x14 | ||
168 | #define CRT_ID_START_VER_BLANK 0x15 | ||
169 | #define CRT_ID_END_VER_BLANK 0x16 | ||
170 | #define CRT_ID_MODE_CONTROL 0x17 | ||
171 | #define CRT_ID_LINE_COMPARE 0x18 | ||
172 | #define CRT_ID_GD_LATCH_RBACK 0x22 | ||
173 | #define CRT_ID_ACT_TOGGLE_RBACK 0x24 | ||
174 | #define CRT_ID_ACT_INDEX_RBACK 0x26 | ||
175 | /* S3 extensions: S3 VGA Registers */ | ||
176 | #define CRT_ID_DEVICE_HIGH 0x2D | ||
177 | #define CRT_ID_DEVICE_LOW 0x2E | ||
178 | #define CRT_ID_REVISION 0x2F | ||
179 | #define CRT_ID_CHIP_ID_REV 0x30 | ||
180 | #define CRT_ID_MEMORY_CONF 0x31 | ||
181 | #define CRT_ID_BACKWAD_COMP_1 0x32 | ||
182 | #define CRT_ID_BACKWAD_COMP_2 0x33 | ||
183 | #define CRT_ID_BACKWAD_COMP_3 0x34 | ||
184 | #define CRT_ID_REGISTER_LOCK 0x35 | ||
185 | #define CRT_ID_CONFIG_1 0x36 | ||
186 | #define CRT_ID_CONFIG_2 0x37 | ||
187 | #define CRT_ID_REGISTER_LOCK_1 0x38 | ||
188 | #define CRT_ID_REGISTER_LOCK_2 0x39 | ||
189 | #define CRT_ID_MISC_1 0x3A | ||
190 | #define CRT_ID_DISPLAY_FIFO 0x3B | ||
191 | #define CRT_ID_LACE_RETR_START 0x3C | ||
192 | /* S3 extensions: System Control Registers */ | ||
193 | #define CRT_ID_SYSTEM_CONFIG 0x40 | ||
194 | #define CRT_ID_BIOS_FLAG 0x41 | ||
195 | #define CRT_ID_LACE_CONTROL 0x42 | ||
196 | #define CRT_ID_EXT_MODE 0x43 | ||
197 | #define CRT_ID_HWGC_MODE 0x45 /* HWGC = Hardware Graphics Cursor */ | ||
198 | #define CRT_ID_HWGC_ORIGIN_X_HI 0x46 | ||
199 | #define CRT_ID_HWGC_ORIGIN_X_LO 0x47 | ||
200 | #define CRT_ID_HWGC_ORIGIN_Y_HI 0x48 | ||
201 | #define CRT_ID_HWGC_ORIGIN_Y_LO 0x49 | ||
202 | #define CRT_ID_HWGC_FG_STACK 0x4A | ||
203 | #define CRT_ID_HWGC_BG_STACK 0x4B | ||
204 | #define CRT_ID_HWGC_START_AD_HI 0x4C | ||
205 | #define CRT_ID_HWGC_START_AD_LO 0x4D | ||
206 | #define CRT_ID_HWGC_DSTART_X 0x4E | ||
207 | #define CRT_ID_HWGC_DSTART_Y 0x4F | ||
208 | /* S3 extensions: System Extension Registers */ | ||
209 | #define CRT_ID_EXT_SYS_CNTL_1 0x50 /* NOT a virge register */ | ||
210 | #define CRT_ID_EXT_SYS_CNTL_2 0x51 | ||
211 | #define CRT_ID_EXT_BIOS_FLAG_1 0x52 | ||
212 | #define CRT_ID_EXT_MEM_CNTL_1 0x53 | ||
213 | #define CRT_ID_EXT_MEM_CNTL_2 0x54 | ||
214 | #define CRT_ID_EXT_DAC_CNTL 0x55 | ||
215 | #define CRT_ID_EX_SYNC_1 0x56 | ||
216 | #define CRT_ID_EX_SYNC_2 0x57 | ||
217 | #define CRT_ID_LAW_CNTL 0x58 /* LAW = Linear Address Window */ | ||
218 | #define CRT_ID_LAW_POS_HI 0x59 | ||
219 | #define CRT_ID_LAW_POS_LO 0x5A | ||
220 | #define CRT_ID_GOUT_PORT 0x5C | ||
221 | #define CRT_ID_EXT_HOR_OVF 0x5D | ||
222 | #define CRT_ID_EXT_VER_OVF 0x5E | ||
223 | #define CRT_ID_EXT_MEM_CNTL_3 0x60 /* NOT a virge register */ | ||
224 | #define CRT_ID_EXT_MEM_CNTL_4 0x61 | ||
225 | #define CRT_ID_EX_SYNC_3 0x63 /* NOT a virge register */ | ||
226 | #define CRT_ID_EXT_MISC_CNTL 0x65 | ||
227 | #define CRT_ID_EXT_MISC_CNTL_1 0x66 | ||
228 | #define CRT_ID_EXT_MISC_CNTL_2 0x67 | ||
229 | #define CRT_ID_CONFIG_3 0x68 | ||
230 | #define CRT_ID_EXT_SYS_CNTL_3 0x69 | ||
231 | #define CRT_ID_EXT_SYS_CNTL_4 0x6A | ||
232 | #define CRT_ID_EXT_BIOS_FLAG_3 0x6B | ||
233 | #define CRT_ID_EXT_BIOS_FLAG_4 0x6C | ||
234 | /* S3 virge extensions: more System Extension Registers */ | ||
235 | #define CRT_ID_EXT_BIOS_FLAG_5 0x6D | ||
236 | #define CRT_ID_EXT_DAC_TEST 0x6E | ||
237 | #define CRT_ID_CONFIG_4 0x6F | ||
238 | |||
239 | /* Video DAC */ | ||
240 | #define VDAC_ADDRESS 0x03c8 | ||
241 | #define VDAC_ADDRESS_W 0x03c8 | ||
242 | #define VDAC_ADDRESS_R 0x03c7 | ||
243 | #define VDAC_STATE 0x03c7 | ||
244 | #define VDAC_DATA 0x03c9 | ||
245 | #define VDAC_MASK 0x03c6 | ||
246 | |||
247 | /* Miscellaneous Registers */ | ||
248 | #define MR_SUBSYSTEM_STATUS_R 0x8504 /* new for virge */ | ||
249 | #define MR_SUBSYSTEM_CNTL_W 0x8504 /* new for virge */ | ||
250 | #define MR_ADVANCED_FUNCTION_CONTROL 0x850C /* new for virge */ | ||
251 | |||
252 | /* Blitter */ | ||
253 | #define BLT_COMMAND_SET 0xA500 | ||
254 | #define BLT_SIZE_X_Y 0xA504 | ||
255 | #define BLT_SRC_X_Y 0xA508 | ||
256 | #define BLT_DEST_X_Y 0xA50C | ||
257 | |||
258 | #define BLT_SRC_BASE 0xa4d4 | ||
259 | #define BLT_DEST_BASE 0xa4d8 | ||
260 | #define BLT_CLIP_LEFT_RIGHT 0xa4dc | ||
261 | #define BLT_CLIP_TOP_BOTTOM 0xa4e0 | ||
262 | #define BLT_SRC_DEST_STRIDE 0xa4e4 | ||
263 | #define BLT_MONO_PATTERN_0 0xa4e8 | ||
264 | #define BLT_MONO_PATTERN_1 0xa4ec | ||
265 | #define BLT_PATTERN_COLOR 0xa4f4 | ||
266 | |||
267 | #define L2D_COMMAND_SET 0xA900 | ||
268 | #define L2D_CLIP_LEFT_RIGHT 0xA8DC | ||
269 | #define L2D_CLIP_TOP_BOTTOM 0xA8E0 | ||
270 | |||
271 | #define P2D_COMMAND_SET 0xAD00 | ||
272 | #define P2D_CLIP_LEFT_RIGHT 0xACDC | ||
273 | #define P2D_CLIP_TOP_BOTTOM 0xACE0 | ||
274 | |||
275 | #define CMD_NOP (0xf << 27) /* %1111 << 27, was 0x07 */ | ||
276 | #define S3V_BITBLT (0x0 << 27) | ||
277 | #define S3V_RECTFILL (0x2 << 27) | ||
278 | #define S3V_AUTOEXE 0x01 | ||
279 | #define S3V_HWCLIP 0x02 | ||
280 | #define S3V_DRAW 0x20 | ||
281 | #define S3V_DST_8BPP 0x00 | ||
282 | #define S3V_DST_16BPP 0x04 | ||
283 | #define S3V_DST_24BPP 0x08 | ||
284 | #define S3V_MONO_PAT 0x100 | ||
285 | |||
286 | #define S3V_BLT_COPY (0xcc<<17) | ||
287 | #define S3V_BLT_CLEAR (0x00<<17) | ||
288 | #define S3V_BLT_SET (0xff<<17) | ||
diff --git a/drivers/w1/slaves/w1_therm.c b/drivers/w1/slaves/w1_therm.c index b022fffd8c51..732db4780042 100644 --- a/drivers/w1/slaves/w1_therm.c +++ b/drivers/w1/slaves/w1_therm.c | |||
@@ -141,7 +141,7 @@ static inline int w1_convert_temp(u8 rom[9], u8 fid) | |||
141 | { | 141 | { |
142 | int i; | 142 | int i; |
143 | 143 | ||
144 | for (i=0; i<sizeof(w1_therm_families)/sizeof(w1_therm_families[0]); ++i) | 144 | for (i = 0; i < ARRAY_SIZE(w1_therm_families); ++i) |
145 | if (w1_therm_families[i].f->fid == fid) | 145 | if (w1_therm_families[i].f->fid == fid) |
146 | return w1_therm_families[i].convert(rom); | 146 | return w1_therm_families[i].convert(rom); |
147 | 147 | ||
@@ -238,7 +238,7 @@ static int __init w1_therm_init(void) | |||
238 | { | 238 | { |
239 | int err, i; | 239 | int err, i; |
240 | 240 | ||
241 | for (i=0; i<sizeof(w1_therm_families)/sizeof(w1_therm_families[0]); ++i) { | 241 | for (i = 0; i < ARRAY_SIZE(w1_therm_families); ++i) { |
242 | err = w1_register_family(w1_therm_families[i].f); | 242 | err = w1_register_family(w1_therm_families[i].f); |
243 | if (err) | 243 | if (err) |
244 | w1_therm_families[i].broken = 1; | 244 | w1_therm_families[i].broken = 1; |
@@ -251,7 +251,7 @@ static void __exit w1_therm_fini(void) | |||
251 | { | 251 | { |
252 | int i; | 252 | int i; |
253 | 253 | ||
254 | for (i=0; i<sizeof(w1_therm_families)/sizeof(w1_therm_families[0]); ++i) | 254 | for (i = 0; i < ARRAY_SIZE(w1_therm_families); ++i) |
255 | if (!w1_therm_families[i].broken) | 255 | if (!w1_therm_families[i].broken) |
256 | w1_unregister_family(w1_therm_families[i].f); | 256 | w1_unregister_family(w1_therm_families[i].f); |
257 | } | 257 | } |
diff --git a/drivers/zorro/proc.c b/drivers/zorro/proc.c index 60b05bc15642..b3ce8859a586 100644 --- a/drivers/zorro/proc.c +++ b/drivers/zorro/proc.c | |||
@@ -75,7 +75,7 @@ proc_bus_zorro_read(struct file *file, char __user *buf, size_t nbytes, loff_t * | |||
75 | return nbytes; | 75 | return nbytes; |
76 | } | 76 | } |
77 | 77 | ||
78 | static struct file_operations proc_bus_zorro_operations = { | 78 | static const struct file_operations proc_bus_zorro_operations = { |
79 | .llseek = proc_bus_zorro_lseek, | 79 | .llseek = proc_bus_zorro_lseek, |
80 | .read = proc_bus_zorro_read, | 80 | .read = proc_bus_zorro_read, |
81 | }; | 81 | }; |