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path: root/drivers/spi/spi-tegra20-sflash.c
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Diffstat (limited to 'drivers/spi/spi-tegra20-sflash.c')
-rw-r--r--drivers/spi/spi-tegra20-sflash.c26
1 files changed, 3 insertions, 23 deletions
diff --git a/drivers/spi/spi-tegra20-sflash.c b/drivers/spi/spi-tegra20-sflash.c
index 08794977f21a..47869ea636e1 100644
--- a/drivers/spi/spi-tegra20-sflash.c
+++ b/drivers/spi/spi-tegra20-sflash.c
@@ -22,7 +22,6 @@
22#include <linux/completion.h> 22#include <linux/completion.h>
23#include <linux/delay.h> 23#include <linux/delay.h>
24#include <linux/err.h> 24#include <linux/err.h>
25#include <linux/init.h>
26#include <linux/interrupt.h> 25#include <linux/interrupt.h>
27#include <linux/io.h> 26#include <linux/io.h>
28#include <linux/kernel.h> 27#include <linux/kernel.h>
@@ -121,7 +120,6 @@ struct tegra_sflash_data {
121 struct reset_control *rst; 120 struct reset_control *rst;
122 void __iomem *base; 121 void __iomem *base;
123 unsigned irq; 122 unsigned irq;
124 u32 spi_max_frequency;
125 u32 cur_speed; 123 u32 cur_speed;
126 124
127 struct spi_device *cur_spi; 125 struct spi_device *cur_spi;
@@ -315,15 +313,6 @@ static int tegra_sflash_start_transfer_one(struct spi_device *spi,
315 return tegra_sflash_start_cpu_based_transfer(tsd, t); 313 return tegra_sflash_start_cpu_based_transfer(tsd, t);
316} 314}
317 315
318static int tegra_sflash_setup(struct spi_device *spi)
319{
320 struct tegra_sflash_data *tsd = spi_master_get_devdata(spi->master);
321
322 /* Set speed to the spi max fequency if spi device has not set */
323 spi->max_speed_hz = spi->max_speed_hz ? : tsd->spi_max_frequency;
324 return 0;
325}
326
327static int tegra_sflash_transfer_one_message(struct spi_master *master, 316static int tegra_sflash_transfer_one_message(struct spi_master *master,
328 struct spi_message *msg) 317 struct spi_message *msg)
329{ 318{
@@ -430,15 +419,6 @@ static irqreturn_t tegra_sflash_isr(int irq, void *context_data)
430 return handle_cpu_based_xfer(tsd); 419 return handle_cpu_based_xfer(tsd);
431} 420}
432 421
433static void tegra_sflash_parse_dt(struct tegra_sflash_data *tsd)
434{
435 struct device_node *np = tsd->dev->of_node;
436
437 if (of_property_read_u32(np, "spi-max-frequency",
438 &tsd->spi_max_frequency))
439 tsd->spi_max_frequency = 25000000; /* 25MHz */
440}
441
442static struct of_device_id tegra_sflash_of_match[] = { 422static struct of_device_id tegra_sflash_of_match[] = {
443 { .compatible = "nvidia,tegra20-sflash", }, 423 { .compatible = "nvidia,tegra20-sflash", },
444 {} 424 {}
@@ -467,11 +447,9 @@ static int tegra_sflash_probe(struct platform_device *pdev)
467 447
468 /* the spi->mode bits understood by this driver: */ 448 /* the spi->mode bits understood by this driver: */
469 master->mode_bits = SPI_CPOL | SPI_CPHA; 449 master->mode_bits = SPI_CPOL | SPI_CPHA;
470 master->setup = tegra_sflash_setup;
471 master->transfer_one_message = tegra_sflash_transfer_one_message; 450 master->transfer_one_message = tegra_sflash_transfer_one_message;
472 master->auto_runtime_pm = true; 451 master->auto_runtime_pm = true;
473 master->num_chipselect = MAX_CHIP_SELECT; 452 master->num_chipselect = MAX_CHIP_SELECT;
474 master->bus_num = -1;
475 453
476 platform_set_drvdata(pdev, master); 454 platform_set_drvdata(pdev, master);
477 tsd = spi_master_get_devdata(master); 455 tsd = spi_master_get_devdata(master);
@@ -479,7 +457,9 @@ static int tegra_sflash_probe(struct platform_device *pdev)
479 tsd->dev = &pdev->dev; 457 tsd->dev = &pdev->dev;
480 spin_lock_init(&tsd->lock); 458 spin_lock_init(&tsd->lock);
481 459
482 tegra_sflash_parse_dt(tsd); 460 if (of_property_read_u32(tsd->dev->of_node, "spi-max-frequency",
461 &master->max_speed_hz))
462 master->max_speed_hz = 25000000; /* 25MHz */
483 463
484 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 464 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
485 tsd->base = devm_ioremap_resource(&pdev->dev, r); 465 tsd->base = devm_ioremap_resource(&pdev->dev, r);