diff options
Diffstat (limited to 'drivers/serial/bfin_5xx.c')
-rw-r--r-- | drivers/serial/bfin_5xx.c | 282 |
1 files changed, 190 insertions, 92 deletions
diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c index f9b5a72e261a..18ba812a4f84 100644 --- a/drivers/serial/bfin_5xx.c +++ b/drivers/serial/bfin_5xx.c | |||
@@ -63,7 +63,6 @@ static int kgdboc_break_enabled; | |||
63 | #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT) | 63 | #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT) |
64 | 64 | ||
65 | #define DMA_RX_FLUSH_JIFFIES (HZ / 50) | 65 | #define DMA_RX_FLUSH_JIFFIES (HZ / 50) |
66 | #define CTS_CHECK_JIFFIES (HZ / 50) | ||
67 | 66 | ||
68 | #ifdef CONFIG_SERIAL_BFIN_DMA | 67 | #ifdef CONFIG_SERIAL_BFIN_DMA |
69 | static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart); | 68 | static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart); |
@@ -71,10 +70,65 @@ static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart); | |||
71 | static void bfin_serial_tx_chars(struct bfin_serial_port *uart); | 70 | static void bfin_serial_tx_chars(struct bfin_serial_port *uart); |
72 | #endif | 71 | #endif |
73 | 72 | ||
74 | static void bfin_serial_mctrl_check(struct bfin_serial_port *uart); | ||
75 | |||
76 | static void bfin_serial_reset_irda(struct uart_port *port); | 73 | static void bfin_serial_reset_irda(struct uart_port *port); |
77 | 74 | ||
75 | #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \ | ||
76 | defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS) | ||
77 | static unsigned int bfin_serial_get_mctrl(struct uart_port *port) | ||
78 | { | ||
79 | struct bfin_serial_port *uart = (struct bfin_serial_port *)port; | ||
80 | if (uart->cts_pin < 0) | ||
81 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; | ||
82 | |||
83 | /* CTS PIN is negative assertive. */ | ||
84 | if (UART_GET_CTS(uart)) | ||
85 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; | ||
86 | else | ||
87 | return TIOCM_DSR | TIOCM_CAR; | ||
88 | } | ||
89 | |||
90 | static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) | ||
91 | { | ||
92 | struct bfin_serial_port *uart = (struct bfin_serial_port *)port; | ||
93 | if (uart->rts_pin < 0) | ||
94 | return; | ||
95 | |||
96 | /* RTS PIN is negative assertive. */ | ||
97 | if (mctrl & TIOCM_RTS) | ||
98 | UART_ENABLE_RTS(uart); | ||
99 | else | ||
100 | UART_DISABLE_RTS(uart); | ||
101 | } | ||
102 | |||
103 | /* | ||
104 | * Handle any change of modem status signal. | ||
105 | */ | ||
106 | static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id) | ||
107 | { | ||
108 | struct bfin_serial_port *uart = dev_id; | ||
109 | unsigned int status; | ||
110 | |||
111 | status = bfin_serial_get_mctrl(&uart->port); | ||
112 | uart_handle_cts_change(&uart->port, status & TIOCM_CTS); | ||
113 | #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS | ||
114 | uart->scts = 1; | ||
115 | UART_CLEAR_SCTS(uart); | ||
116 | UART_CLEAR_IER(uart, EDSSI); | ||
117 | #endif | ||
118 | |||
119 | return IRQ_HANDLED; | ||
120 | } | ||
121 | #else | ||
122 | static unsigned int bfin_serial_get_mctrl(struct uart_port *port) | ||
123 | { | ||
124 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; | ||
125 | } | ||
126 | |||
127 | static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) | ||
128 | { | ||
129 | } | ||
130 | #endif | ||
131 | |||
78 | /* | 132 | /* |
79 | * interrupts are disabled on entry | 133 | * interrupts are disabled on entry |
80 | */ | 134 | */ |
@@ -111,6 +165,13 @@ static void bfin_serial_start_tx(struct uart_port *port) | |||
111 | struct bfin_serial_port *uart = (struct bfin_serial_port *)port; | 165 | struct bfin_serial_port *uart = (struct bfin_serial_port *)port; |
112 | struct tty_struct *tty = uart->port.info->port.tty; | 166 | struct tty_struct *tty = uart->port.info->port.tty; |
113 | 167 | ||
168 | #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS | ||
169 | if (uart->scts && (!bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) { | ||
170 | uart->scts = 0; | ||
171 | uart_handle_cts_change(&uart->port, uart->scts); | ||
172 | } | ||
173 | #endif | ||
174 | |||
114 | /* | 175 | /* |
115 | * To avoid losting RX interrupt, we reset IR function | 176 | * To avoid losting RX interrupt, we reset IR function |
116 | * before sending data. | 177 | * before sending data. |
@@ -264,12 +325,6 @@ static void bfin_serial_tx_chars(struct bfin_serial_port *uart) | |||
264 | { | 325 | { |
265 | struct circ_buf *xmit = &uart->port.info->xmit; | 326 | struct circ_buf *xmit = &uart->port.info->xmit; |
266 | 327 | ||
267 | /* | ||
268 | * Check the modem control lines before | ||
269 | * transmitting anything. | ||
270 | */ | ||
271 | bfin_serial_mctrl_check(uart); | ||
272 | |||
273 | if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) { | 328 | if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) { |
274 | #ifdef CONFIG_BF54x | 329 | #ifdef CONFIG_BF54x |
275 | /* Clear TFI bit */ | 330 | /* Clear TFI bit */ |
@@ -312,6 +367,12 @@ static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id) | |||
312 | { | 367 | { |
313 | struct bfin_serial_port *uart = dev_id; | 368 | struct bfin_serial_port *uart = dev_id; |
314 | 369 | ||
370 | #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS | ||
371 | if (uart->scts && (!bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) { | ||
372 | uart->scts = 0; | ||
373 | uart_handle_cts_change(&uart->port, uart->scts); | ||
374 | } | ||
375 | #endif | ||
315 | spin_lock(&uart->port.lock); | 376 | spin_lock(&uart->port.lock); |
316 | if (UART_GET_LSR(uart) & THRE) | 377 | if (UART_GET_LSR(uart) & THRE) |
317 | bfin_serial_tx_chars(uart); | 378 | bfin_serial_tx_chars(uart); |
@@ -328,12 +389,6 @@ static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart) | |||
328 | 389 | ||
329 | uart->tx_done = 0; | 390 | uart->tx_done = 0; |
330 | 391 | ||
331 | /* | ||
332 | * Check the modem control lines before | ||
333 | * transmitting anything. | ||
334 | */ | ||
335 | bfin_serial_mctrl_check(uart); | ||
336 | |||
337 | if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) { | 392 | if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) { |
338 | uart->tx_count = 0; | 393 | uart->tx_count = 0; |
339 | uart->tx_done = 1; | 394 | uart->tx_done = 1; |
@@ -448,6 +503,13 @@ static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id) | |||
448 | struct bfin_serial_port *uart = dev_id; | 503 | struct bfin_serial_port *uart = dev_id; |
449 | struct circ_buf *xmit = &uart->port.info->xmit; | 504 | struct circ_buf *xmit = &uart->port.info->xmit; |
450 | 505 | ||
506 | #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS | ||
507 | if (uart->scts && (!bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) { | ||
508 | uart->scts = 0; | ||
509 | uart_handle_cts_change(&uart->port, uart->scts); | ||
510 | } | ||
511 | #endif | ||
512 | |||
451 | spin_lock(&uart->port.lock); | 513 | spin_lock(&uart->port.lock); |
452 | if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) { | 514 | if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) { |
453 | disable_dma(uart->tx_dma_channel); | 515 | disable_dma(uart->tx_dma_channel); |
@@ -496,61 +558,6 @@ static unsigned int bfin_serial_tx_empty(struct uart_port *port) | |||
496 | return 0; | 558 | return 0; |
497 | } | 559 | } |
498 | 560 | ||
499 | static unsigned int bfin_serial_get_mctrl(struct uart_port *port) | ||
500 | { | ||
501 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS | ||
502 | struct bfin_serial_port *uart = (struct bfin_serial_port *)port; | ||
503 | if (uart->cts_pin < 0) | ||
504 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; | ||
505 | |||
506 | if (UART_GET_CTS(uart)) | ||
507 | return TIOCM_DSR | TIOCM_CAR; | ||
508 | else | ||
509 | #endif | ||
510 | return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; | ||
511 | } | ||
512 | |||
513 | static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) | ||
514 | { | ||
515 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS | ||
516 | struct bfin_serial_port *uart = (struct bfin_serial_port *)port; | ||
517 | if (uart->rts_pin < 0) | ||
518 | return; | ||
519 | |||
520 | if (mctrl & TIOCM_RTS) | ||
521 | UART_CLEAR_RTS(uart); | ||
522 | else | ||
523 | UART_SET_RTS(uart); | ||
524 | #endif | ||
525 | } | ||
526 | |||
527 | /* | ||
528 | * Handle any change of modem status signal since we were last called. | ||
529 | */ | ||
530 | static void bfin_serial_mctrl_check(struct bfin_serial_port *uart) | ||
531 | { | ||
532 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS | ||
533 | unsigned int status; | ||
534 | struct uart_info *info = uart->port.info; | ||
535 | struct tty_struct *tty = info->port.tty; | ||
536 | |||
537 | status = bfin_serial_get_mctrl(&uart->port); | ||
538 | uart_handle_cts_change(&uart->port, status & TIOCM_CTS); | ||
539 | if (!(status & TIOCM_CTS)) { | ||
540 | tty->hw_stopped = 1; | ||
541 | uart->cts_timer.data = (unsigned long)(uart); | ||
542 | uart->cts_timer.function = (void *)bfin_serial_mctrl_check; | ||
543 | uart->cts_timer.expires = jiffies + CTS_CHECK_JIFFIES; | ||
544 | add_timer(&(uart->cts_timer)); | ||
545 | } else { | ||
546 | tty->hw_stopped = 0; | ||
547 | } | ||
548 | #endif | ||
549 | } | ||
550 | |||
551 | /* | ||
552 | * Interrupts are always disabled. | ||
553 | */ | ||
554 | static void bfin_serial_break_ctl(struct uart_port *port, int break_state) | 561 | static void bfin_serial_break_ctl(struct uart_port *port, int break_state) |
555 | { | 562 | { |
556 | struct bfin_serial_port *uart = (struct bfin_serial_port *)port; | 563 | struct bfin_serial_port *uart = (struct bfin_serial_port *)port; |
@@ -606,7 +613,7 @@ static int bfin_serial_startup(struct uart_port *port) | |||
606 | uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES; | 613 | uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES; |
607 | add_timer(&(uart->rx_dma_timer)); | 614 | add_timer(&(uart->rx_dma_timer)); |
608 | #else | 615 | #else |
609 | #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ | 616 | # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ |
610 | defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE) | 617 | defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE) |
611 | if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled) | 618 | if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled) |
612 | kgdboc_break_enabled = 0; | 619 | kgdboc_break_enabled = 0; |
@@ -661,11 +668,50 @@ static int bfin_serial_startup(struct uart_port *port) | |||
661 | } | 668 | } |
662 | } | 669 | } |
663 | # endif | 670 | # endif |
664 | #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ | 671 | # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \ |
665 | defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE) | 672 | defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE) |
666 | } | 673 | } |
667 | # endif | 674 | # endif |
668 | #endif | 675 | #endif |
676 | |||
677 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS | ||
678 | if (uart->cts_pin >= 0) { | ||
679 | if (request_irq(gpio_to_irq(uart->cts_pin), | ||
680 | bfin_serial_mctrl_cts_int, | ||
681 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | | ||
682 | IRQF_DISABLED, "BFIN_UART_CTS", uart)) { | ||
683 | uart->cts_pin = -1; | ||
684 | pr_info("Unable to attach BlackFin UART CTS interrupt.\ | ||
685 | So, disable it.\n"); | ||
686 | } | ||
687 | } | ||
688 | if (uart->rts_pin >= 0) { | ||
689 | gpio_request(uart->rts_pin, DRIVER_NAME); | ||
690 | gpio_direction_output(uart->rts_pin, 0); | ||
691 | } | ||
692 | #endif | ||
693 | #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS | ||
694 | if (request_irq(uart->status_irq, | ||
695 | bfin_serial_mctrl_cts_int, | ||
696 | IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) { | ||
697 | pr_info("Unable to attach BlackFin UART Modem \ | ||
698 | Status interrupt.\n"); | ||
699 | } | ||
700 | |||
701 | if (uart->cts_pin >= 0) { | ||
702 | gpio_request(uart->cts_pin, DRIVER_NAME); | ||
703 | gpio_direction_output(uart->cts_pin, 1); | ||
704 | } | ||
705 | if (uart->rts_pin >= 0) { | ||
706 | gpio_request(uart->rts_pin, DRIVER_NAME); | ||
707 | gpio_direction_output(uart->rts_pin, 0); | ||
708 | } | ||
709 | |||
710 | /* CTS RTS PINs are negative assertive. */ | ||
711 | UART_PUT_MCR(uart, ACTS); | ||
712 | UART_SET_IER(uart, EDSSI); | ||
713 | #endif | ||
714 | |||
669 | UART_SET_IER(uart, ERBFI); | 715 | UART_SET_IER(uart, ERBFI); |
670 | return 0; | 716 | return 0; |
671 | } | 717 | } |
@@ -699,6 +745,21 @@ static void bfin_serial_shutdown(struct uart_port *port) | |||
699 | free_irq(uart->port.irq, uart); | 745 | free_irq(uart->port.irq, uart); |
700 | free_irq(uart->port.irq+1, uart); | 746 | free_irq(uart->port.irq+1, uart); |
701 | #endif | 747 | #endif |
748 | |||
749 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS | ||
750 | if (uart->cts_pin >= 0) | ||
751 | free_irq(gpio_to_irq(uart->cts_pin), uart); | ||
752 | if (uart->rts_pin >= 0) | ||
753 | gpio_free(uart->rts_pin); | ||
754 | #endif | ||
755 | #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS | ||
756 | if (uart->cts_pin >= 0) | ||
757 | gpio_free(uart->cts_pin); | ||
758 | if (uart->rts_pin >= 0) | ||
759 | gpio_free(uart->rts_pin); | ||
760 | if (UART_GET_IER(uart) && EDSSI) | ||
761 | free_irq(uart->status_irq, uart); | ||
762 | #endif | ||
702 | } | 763 | } |
703 | 764 | ||
704 | static void | 765 | static void |
@@ -864,6 +925,20 @@ static void bfin_serial_set_ldisc(struct uart_port *port) | |||
864 | } | 925 | } |
865 | } | 926 | } |
866 | 927 | ||
928 | static void bfin_serial_reset_irda(struct uart_port *port) | ||
929 | { | ||
930 | int line = port->line; | ||
931 | unsigned short val; | ||
932 | |||
933 | val = UART_GET_GCTL(&bfin_serial_ports[line]); | ||
934 | val &= ~(IREN | RPOLC); | ||
935 | UART_PUT_GCTL(&bfin_serial_ports[line], val); | ||
936 | SSYNC(); | ||
937 | val |= (IREN | RPOLC); | ||
938 | UART_PUT_GCTL(&bfin_serial_ports[line], val); | ||
939 | SSYNC(); | ||
940 | } | ||
941 | |||
867 | #ifdef CONFIG_CONSOLE_POLL | 942 | #ifdef CONFIG_CONSOLE_POLL |
868 | static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr) | 943 | static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr) |
869 | { | 944 | { |
@@ -909,20 +984,6 @@ static int bfin_kgdboc_port_startup(struct uart_port *port) | |||
909 | } | 984 | } |
910 | #endif | 985 | #endif |
911 | 986 | ||
912 | static void bfin_serial_reset_irda(struct uart_port *port) | ||
913 | { | ||
914 | int line = port->line; | ||
915 | unsigned short val; | ||
916 | |||
917 | val = UART_GET_GCTL(&bfin_serial_ports[line]); | ||
918 | val &= ~(IREN | RPOLC); | ||
919 | UART_PUT_GCTL(&bfin_serial_ports[line], val); | ||
920 | SSYNC(); | ||
921 | val |= (IREN | RPOLC); | ||
922 | UART_PUT_GCTL(&bfin_serial_ports[line], val); | ||
923 | SSYNC(); | ||
924 | } | ||
925 | |||
926 | static struct uart_ops bfin_serial_pops = { | 987 | static struct uart_ops bfin_serial_pops = { |
927 | .tx_empty = bfin_serial_tx_empty, | 988 | .tx_empty = bfin_serial_tx_empty, |
928 | .set_mctrl = bfin_serial_set_mctrl, | 989 | .set_mctrl = bfin_serial_set_mctrl, |
@@ -952,6 +1013,39 @@ static struct uart_ops bfin_serial_pops = { | |||
952 | #endif | 1013 | #endif |
953 | }; | 1014 | }; |
954 | 1015 | ||
1016 | static void __init bfin_serial_hw_init(void) | ||
1017 | { | ||
1018 | #ifdef CONFIG_SERIAL_BFIN_UART0 | ||
1019 | peripheral_request(P_UART0_TX, DRIVER_NAME); | ||
1020 | peripheral_request(P_UART0_RX, DRIVER_NAME); | ||
1021 | #endif | ||
1022 | |||
1023 | #ifdef CONFIG_SERIAL_BFIN_UART1 | ||
1024 | peripheral_request(P_UART1_TX, DRIVER_NAME); | ||
1025 | peripheral_request(P_UART1_RX, DRIVER_NAME); | ||
1026 | |||
1027 | # if defined(CONFIG_BFIN_UART1_CTSRTS) && defined(CONFIG_BF54x) | ||
1028 | peripheral_request(P_UART1_RTS, DRIVER_NAME); | ||
1029 | peripheral_request(P_UART1_CTS, DRIVER_NAME); | ||
1030 | # endif | ||
1031 | #endif | ||
1032 | |||
1033 | #ifdef CONFIG_SERIAL_BFIN_UART2 | ||
1034 | peripheral_request(P_UART2_TX, DRIVER_NAME); | ||
1035 | peripheral_request(P_UART2_RX, DRIVER_NAME); | ||
1036 | #endif | ||
1037 | |||
1038 | #ifdef CONFIG_SERIAL_BFIN_UART3 | ||
1039 | peripheral_request(P_UART3_TX, DRIVER_NAME); | ||
1040 | peripheral_request(P_UART3_RX, DRIVER_NAME); | ||
1041 | |||
1042 | # if defined(CONFIG_BFIN_UART3_CTSRTS) && defined(CONFIG_BF54x) | ||
1043 | peripheral_request(P_UART3_RTS, DRIVER_NAME); | ||
1044 | peripheral_request(P_UART3_CTS, DRIVER_NAME); | ||
1045 | # endif | ||
1046 | #endif | ||
1047 | } | ||
1048 | |||
955 | static void __init bfin_serial_init_ports(void) | 1049 | static void __init bfin_serial_init_ports(void) |
956 | { | 1050 | { |
957 | static int first = 1; | 1051 | static int first = 1; |
@@ -961,6 +1055,8 @@ static void __init bfin_serial_init_ports(void) | |||
961 | return; | 1055 | return; |
962 | first = 0; | 1056 | first = 0; |
963 | 1057 | ||
1058 | bfin_serial_hw_init(); | ||
1059 | |||
964 | for (i = 0; i < nr_active_ports; i++) { | 1060 | for (i = 0; i < nr_active_ports; i++) { |
965 | bfin_serial_ports[i].port.uartclk = get_sclk(); | 1061 | bfin_serial_ports[i].port.uartclk = get_sclk(); |
966 | bfin_serial_ports[i].port.fifosize = BFIN_UART_TX_FIFO_SIZE; | 1062 | bfin_serial_ports[i].port.fifosize = BFIN_UART_TX_FIFO_SIZE; |
@@ -973,6 +1069,8 @@ static void __init bfin_serial_init_ports(void) | |||
973 | bfin_serial_resource[i].uart_base_addr; | 1069 | bfin_serial_resource[i].uart_base_addr; |
974 | bfin_serial_ports[i].port.irq = | 1070 | bfin_serial_ports[i].port.irq = |
975 | bfin_serial_resource[i].uart_irq; | 1071 | bfin_serial_resource[i].uart_irq; |
1072 | bfin_serial_ports[i].status_irq = | ||
1073 | bfin_serial_resource[i].uart_status_irq; | ||
976 | bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF; | 1074 | bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF; |
977 | #ifdef CONFIG_SERIAL_BFIN_DMA | 1075 | #ifdef CONFIG_SERIAL_BFIN_DMA |
978 | bfin_serial_ports[i].tx_done = 1; | 1076 | bfin_serial_ports[i].tx_done = 1; |
@@ -983,16 +1081,14 @@ static void __init bfin_serial_init_ports(void) | |||
983 | bfin_serial_resource[i].uart_rx_dma_channel; | 1081 | bfin_serial_resource[i].uart_rx_dma_channel; |
984 | init_timer(&(bfin_serial_ports[i].rx_dma_timer)); | 1082 | init_timer(&(bfin_serial_ports[i].rx_dma_timer)); |
985 | #endif | 1083 | #endif |
986 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS | 1084 | #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \ |
987 | init_timer(&(bfin_serial_ports[i].cts_timer)); | 1085 | defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS) |
988 | bfin_serial_ports[i].cts_pin = | 1086 | bfin_serial_ports[i].cts_pin = |
989 | bfin_serial_resource[i].uart_cts_pin; | 1087 | bfin_serial_resource[i].uart_cts_pin; |
990 | bfin_serial_ports[i].rts_pin = | 1088 | bfin_serial_ports[i].rts_pin = |
991 | bfin_serial_resource[i].uart_rts_pin; | 1089 | bfin_serial_resource[i].uart_rts_pin; |
992 | #endif | 1090 | #endif |
993 | bfin_serial_hw_init(&bfin_serial_ports[i]); | ||
994 | } | 1091 | } |
995 | |||
996 | } | 1092 | } |
997 | 1093 | ||
998 | #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) | 1094 | #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK) |
@@ -1049,7 +1145,8 @@ bfin_serial_console_setup(struct console *co, char *options) | |||
1049 | int baud = 57600; | 1145 | int baud = 57600; |
1050 | int bits = 8; | 1146 | int bits = 8; |
1051 | int parity = 'n'; | 1147 | int parity = 'n'; |
1052 | # ifdef CONFIG_SERIAL_BFIN_CTSRTS | 1148 | # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \ |
1149 | defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS) | ||
1053 | int flow = 'r'; | 1150 | int flow = 'r'; |
1054 | # else | 1151 | # else |
1055 | int flow = 'n'; | 1152 | int flow = 'n'; |
@@ -1246,7 +1343,8 @@ static int bfin_serial_remove(struct platform_device *dev) | |||
1246 | continue; | 1343 | continue; |
1247 | uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port); | 1344 | uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port); |
1248 | bfin_serial_ports[i].port.dev = NULL; | 1345 | bfin_serial_ports[i].port.dev = NULL; |
1249 | #ifdef CONFIG_SERIAL_BFIN_CTSRTS | 1346 | #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \ |
1347 | defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS) | ||
1250 | gpio_free(bfin_serial_ports[i].cts_pin); | 1348 | gpio_free(bfin_serial_ports[i].cts_pin); |
1251 | gpio_free(bfin_serial_ports[i].rts_pin); | 1349 | gpio_free(bfin_serial_ports[i].rts_pin); |
1252 | #endif | 1350 | #endif |