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path: root/drivers/pinctrl/freescale/pinctrl-imx28.c
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-rw-r--r--drivers/pinctrl/freescale/pinctrl-imx28.c421
1 files changed, 421 insertions, 0 deletions
diff --git a/drivers/pinctrl/freescale/pinctrl-imx28.c b/drivers/pinctrl/freescale/pinctrl-imx28.c
new file mode 100644
index 000000000000..3bd45da21229
--- /dev/null
+++ b/drivers/pinctrl/freescale/pinctrl-imx28.c
@@ -0,0 +1,421 @@
1/*
2 * Copyright 2012 Freescale Semiconductor, Inc.
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/of_device.h>
15#include <linux/pinctrl/pinctrl.h>
16#include "pinctrl-mxs.h"
17
18enum imx28_pin_enum {
19 GPMI_D00 = PINID(0, 0),
20 GPMI_D01 = PINID(0, 1),
21 GPMI_D02 = PINID(0, 2),
22 GPMI_D03 = PINID(0, 3),
23 GPMI_D04 = PINID(0, 4),
24 GPMI_D05 = PINID(0, 5),
25 GPMI_D06 = PINID(0, 6),
26 GPMI_D07 = PINID(0, 7),
27 GPMI_CE0N = PINID(0, 16),
28 GPMI_CE1N = PINID(0, 17),
29 GPMI_CE2N = PINID(0, 18),
30 GPMI_CE3N = PINID(0, 19),
31 GPMI_RDY0 = PINID(0, 20),
32 GPMI_RDY1 = PINID(0, 21),
33 GPMI_RDY2 = PINID(0, 22),
34 GPMI_RDY3 = PINID(0, 23),
35 GPMI_RDN = PINID(0, 24),
36 GPMI_WRN = PINID(0, 25),
37 GPMI_ALE = PINID(0, 26),
38 GPMI_CLE = PINID(0, 27),
39 GPMI_RESETN = PINID(0, 28),
40 LCD_D00 = PINID(1, 0),
41 LCD_D01 = PINID(1, 1),
42 LCD_D02 = PINID(1, 2),
43 LCD_D03 = PINID(1, 3),
44 LCD_D04 = PINID(1, 4),
45 LCD_D05 = PINID(1, 5),
46 LCD_D06 = PINID(1, 6),
47 LCD_D07 = PINID(1, 7),
48 LCD_D08 = PINID(1, 8),
49 LCD_D09 = PINID(1, 9),
50 LCD_D10 = PINID(1, 10),
51 LCD_D11 = PINID(1, 11),
52 LCD_D12 = PINID(1, 12),
53 LCD_D13 = PINID(1, 13),
54 LCD_D14 = PINID(1, 14),
55 LCD_D15 = PINID(1, 15),
56 LCD_D16 = PINID(1, 16),
57 LCD_D17 = PINID(1, 17),
58 LCD_D18 = PINID(1, 18),
59 LCD_D19 = PINID(1, 19),
60 LCD_D20 = PINID(1, 20),
61 LCD_D21 = PINID(1, 21),
62 LCD_D22 = PINID(1, 22),
63 LCD_D23 = PINID(1, 23),
64 LCD_RD_E = PINID(1, 24),
65 LCD_WR_RWN = PINID(1, 25),
66 LCD_RS = PINID(1, 26),
67 LCD_CS = PINID(1, 27),
68 LCD_VSYNC = PINID(1, 28),
69 LCD_HSYNC = PINID(1, 29),
70 LCD_DOTCLK = PINID(1, 30),
71 LCD_ENABLE = PINID(1, 31),
72 SSP0_DATA0 = PINID(2, 0),
73 SSP0_DATA1 = PINID(2, 1),
74 SSP0_DATA2 = PINID(2, 2),
75 SSP0_DATA3 = PINID(2, 3),
76 SSP0_DATA4 = PINID(2, 4),
77 SSP0_DATA5 = PINID(2, 5),
78 SSP0_DATA6 = PINID(2, 6),
79 SSP0_DATA7 = PINID(2, 7),
80 SSP0_CMD = PINID(2, 8),
81 SSP0_DETECT = PINID(2, 9),
82 SSP0_SCK = PINID(2, 10),
83 SSP1_SCK = PINID(2, 12),
84 SSP1_CMD = PINID(2, 13),
85 SSP1_DATA0 = PINID(2, 14),
86 SSP1_DATA3 = PINID(2, 15),
87 SSP2_SCK = PINID(2, 16),
88 SSP2_MOSI = PINID(2, 17),
89 SSP2_MISO = PINID(2, 18),
90 SSP2_SS0 = PINID(2, 19),
91 SSP2_SS1 = PINID(2, 20),
92 SSP2_SS2 = PINID(2, 21),
93 SSP3_SCK = PINID(2, 24),
94 SSP3_MOSI = PINID(2, 25),
95 SSP3_MISO = PINID(2, 26),
96 SSP3_SS0 = PINID(2, 27),
97 AUART0_RX = PINID(3, 0),
98 AUART0_TX = PINID(3, 1),
99 AUART0_CTS = PINID(3, 2),
100 AUART0_RTS = PINID(3, 3),
101 AUART1_RX = PINID(3, 4),
102 AUART1_TX = PINID(3, 5),
103 AUART1_CTS = PINID(3, 6),
104 AUART1_RTS = PINID(3, 7),
105 AUART2_RX = PINID(3, 8),
106 AUART2_TX = PINID(3, 9),
107 AUART2_CTS = PINID(3, 10),
108 AUART2_RTS = PINID(3, 11),
109 AUART3_RX = PINID(3, 12),
110 AUART3_TX = PINID(3, 13),
111 AUART3_CTS = PINID(3, 14),
112 AUART3_RTS = PINID(3, 15),
113 PWM0 = PINID(3, 16),
114 PWM1 = PINID(3, 17),
115 PWM2 = PINID(3, 18),
116 SAIF0_MCLK = PINID(3, 20),
117 SAIF0_LRCLK = PINID(3, 21),
118 SAIF0_BITCLK = PINID(3, 22),
119 SAIF0_SDATA0 = PINID(3, 23),
120 I2C0_SCL = PINID(3, 24),
121 I2C0_SDA = PINID(3, 25),
122 SAIF1_SDATA0 = PINID(3, 26),
123 SPDIF = PINID(3, 27),
124 PWM3 = PINID(3, 28),
125 PWM4 = PINID(3, 29),
126 LCD_RESET = PINID(3, 30),
127 ENET0_MDC = PINID(4, 0),
128 ENET0_MDIO = PINID(4, 1),
129 ENET0_RX_EN = PINID(4, 2),
130 ENET0_RXD0 = PINID(4, 3),
131 ENET0_RXD1 = PINID(4, 4),
132 ENET0_TX_CLK = PINID(4, 5),
133 ENET0_TX_EN = PINID(4, 6),
134 ENET0_TXD0 = PINID(4, 7),
135 ENET0_TXD1 = PINID(4, 8),
136 ENET0_RXD2 = PINID(4, 9),
137 ENET0_RXD3 = PINID(4, 10),
138 ENET0_TXD2 = PINID(4, 11),
139 ENET0_TXD3 = PINID(4, 12),
140 ENET0_RX_CLK = PINID(4, 13),
141 ENET0_COL = PINID(4, 14),
142 ENET0_CRS = PINID(4, 15),
143 ENET_CLK = PINID(4, 16),
144 JTAG_RTCK = PINID(4, 20),
145 EMI_D00 = PINID(5, 0),
146 EMI_D01 = PINID(5, 1),
147 EMI_D02 = PINID(5, 2),
148 EMI_D03 = PINID(5, 3),
149 EMI_D04 = PINID(5, 4),
150 EMI_D05 = PINID(5, 5),
151 EMI_D06 = PINID(5, 6),
152 EMI_D07 = PINID(5, 7),
153 EMI_D08 = PINID(5, 8),
154 EMI_D09 = PINID(5, 9),
155 EMI_D10 = PINID(5, 10),
156 EMI_D11 = PINID(5, 11),
157 EMI_D12 = PINID(5, 12),
158 EMI_D13 = PINID(5, 13),
159 EMI_D14 = PINID(5, 14),
160 EMI_D15 = PINID(5, 15),
161 EMI_ODT0 = PINID(5, 16),
162 EMI_DQM0 = PINID(5, 17),
163 EMI_ODT1 = PINID(5, 18),
164 EMI_DQM1 = PINID(5, 19),
165 EMI_DDR_OPEN_FB = PINID(5, 20),
166 EMI_CLK = PINID(5, 21),
167 EMI_DQS0 = PINID(5, 22),
168 EMI_DQS1 = PINID(5, 23),
169 EMI_DDR_OPEN = PINID(5, 26),
170 EMI_A00 = PINID(6, 0),
171 EMI_A01 = PINID(6, 1),
172 EMI_A02 = PINID(6, 2),
173 EMI_A03 = PINID(6, 3),
174 EMI_A04 = PINID(6, 4),
175 EMI_A05 = PINID(6, 5),
176 EMI_A06 = PINID(6, 6),
177 EMI_A07 = PINID(6, 7),
178 EMI_A08 = PINID(6, 8),
179 EMI_A09 = PINID(6, 9),
180 EMI_A10 = PINID(6, 10),
181 EMI_A11 = PINID(6, 11),
182 EMI_A12 = PINID(6, 12),
183 EMI_A13 = PINID(6, 13),
184 EMI_A14 = PINID(6, 14),
185 EMI_BA0 = PINID(6, 16),
186 EMI_BA1 = PINID(6, 17),
187 EMI_BA2 = PINID(6, 18),
188 EMI_CASN = PINID(6, 19),
189 EMI_RASN = PINID(6, 20),
190 EMI_WEN = PINID(6, 21),
191 EMI_CE0N = PINID(6, 22),
192 EMI_CE1N = PINID(6, 23),
193 EMI_CKE = PINID(6, 24),
194};
195
196static const struct pinctrl_pin_desc imx28_pins[] = {
197 MXS_PINCTRL_PIN(GPMI_D00),
198 MXS_PINCTRL_PIN(GPMI_D01),
199 MXS_PINCTRL_PIN(GPMI_D02),
200 MXS_PINCTRL_PIN(GPMI_D03),
201 MXS_PINCTRL_PIN(GPMI_D04),
202 MXS_PINCTRL_PIN(GPMI_D05),
203 MXS_PINCTRL_PIN(GPMI_D06),
204 MXS_PINCTRL_PIN(GPMI_D07),
205 MXS_PINCTRL_PIN(GPMI_CE0N),
206 MXS_PINCTRL_PIN(GPMI_CE1N),
207 MXS_PINCTRL_PIN(GPMI_CE2N),
208 MXS_PINCTRL_PIN(GPMI_CE3N),
209 MXS_PINCTRL_PIN(GPMI_RDY0),
210 MXS_PINCTRL_PIN(GPMI_RDY1),
211 MXS_PINCTRL_PIN(GPMI_RDY2),
212 MXS_PINCTRL_PIN(GPMI_RDY3),
213 MXS_PINCTRL_PIN(GPMI_RDN),
214 MXS_PINCTRL_PIN(GPMI_WRN),
215 MXS_PINCTRL_PIN(GPMI_ALE),
216 MXS_PINCTRL_PIN(GPMI_CLE),
217 MXS_PINCTRL_PIN(GPMI_RESETN),
218 MXS_PINCTRL_PIN(LCD_D00),
219 MXS_PINCTRL_PIN(LCD_D01),
220 MXS_PINCTRL_PIN(LCD_D02),
221 MXS_PINCTRL_PIN(LCD_D03),
222 MXS_PINCTRL_PIN(LCD_D04),
223 MXS_PINCTRL_PIN(LCD_D05),
224 MXS_PINCTRL_PIN(LCD_D06),
225 MXS_PINCTRL_PIN(LCD_D07),
226 MXS_PINCTRL_PIN(LCD_D08),
227 MXS_PINCTRL_PIN(LCD_D09),
228 MXS_PINCTRL_PIN(LCD_D10),
229 MXS_PINCTRL_PIN(LCD_D11),
230 MXS_PINCTRL_PIN(LCD_D12),
231 MXS_PINCTRL_PIN(LCD_D13),
232 MXS_PINCTRL_PIN(LCD_D14),
233 MXS_PINCTRL_PIN(LCD_D15),
234 MXS_PINCTRL_PIN(LCD_D16),
235 MXS_PINCTRL_PIN(LCD_D17),
236 MXS_PINCTRL_PIN(LCD_D18),
237 MXS_PINCTRL_PIN(LCD_D19),
238 MXS_PINCTRL_PIN(LCD_D20),
239 MXS_PINCTRL_PIN(LCD_D21),
240 MXS_PINCTRL_PIN(LCD_D22),
241 MXS_PINCTRL_PIN(LCD_D23),
242 MXS_PINCTRL_PIN(LCD_RD_E),
243 MXS_PINCTRL_PIN(LCD_WR_RWN),
244 MXS_PINCTRL_PIN(LCD_RS),
245 MXS_PINCTRL_PIN(LCD_CS),
246 MXS_PINCTRL_PIN(LCD_VSYNC),
247 MXS_PINCTRL_PIN(LCD_HSYNC),
248 MXS_PINCTRL_PIN(LCD_DOTCLK),
249 MXS_PINCTRL_PIN(LCD_ENABLE),
250 MXS_PINCTRL_PIN(SSP0_DATA0),
251 MXS_PINCTRL_PIN(SSP0_DATA1),
252 MXS_PINCTRL_PIN(SSP0_DATA2),
253 MXS_PINCTRL_PIN(SSP0_DATA3),
254 MXS_PINCTRL_PIN(SSP0_DATA4),
255 MXS_PINCTRL_PIN(SSP0_DATA5),
256 MXS_PINCTRL_PIN(SSP0_DATA6),
257 MXS_PINCTRL_PIN(SSP0_DATA7),
258 MXS_PINCTRL_PIN(SSP0_CMD),
259 MXS_PINCTRL_PIN(SSP0_DETECT),
260 MXS_PINCTRL_PIN(SSP0_SCK),
261 MXS_PINCTRL_PIN(SSP1_SCK),
262 MXS_PINCTRL_PIN(SSP1_CMD),
263 MXS_PINCTRL_PIN(SSP1_DATA0),
264 MXS_PINCTRL_PIN(SSP1_DATA3),
265 MXS_PINCTRL_PIN(SSP2_SCK),
266 MXS_PINCTRL_PIN(SSP2_MOSI),
267 MXS_PINCTRL_PIN(SSP2_MISO),
268 MXS_PINCTRL_PIN(SSP2_SS0),
269 MXS_PINCTRL_PIN(SSP2_SS1),
270 MXS_PINCTRL_PIN(SSP2_SS2),
271 MXS_PINCTRL_PIN(SSP3_SCK),
272 MXS_PINCTRL_PIN(SSP3_MOSI),
273 MXS_PINCTRL_PIN(SSP3_MISO),
274 MXS_PINCTRL_PIN(SSP3_SS0),
275 MXS_PINCTRL_PIN(AUART0_RX),
276 MXS_PINCTRL_PIN(AUART0_TX),
277 MXS_PINCTRL_PIN(AUART0_CTS),
278 MXS_PINCTRL_PIN(AUART0_RTS),
279 MXS_PINCTRL_PIN(AUART1_RX),
280 MXS_PINCTRL_PIN(AUART1_TX),
281 MXS_PINCTRL_PIN(AUART1_CTS),
282 MXS_PINCTRL_PIN(AUART1_RTS),
283 MXS_PINCTRL_PIN(AUART2_RX),
284 MXS_PINCTRL_PIN(AUART2_TX),
285 MXS_PINCTRL_PIN(AUART2_CTS),
286 MXS_PINCTRL_PIN(AUART2_RTS),
287 MXS_PINCTRL_PIN(AUART3_RX),
288 MXS_PINCTRL_PIN(AUART3_TX),
289 MXS_PINCTRL_PIN(AUART3_CTS),
290 MXS_PINCTRL_PIN(AUART3_RTS),
291 MXS_PINCTRL_PIN(PWM0),
292 MXS_PINCTRL_PIN(PWM1),
293 MXS_PINCTRL_PIN(PWM2),
294 MXS_PINCTRL_PIN(SAIF0_MCLK),
295 MXS_PINCTRL_PIN(SAIF0_LRCLK),
296 MXS_PINCTRL_PIN(SAIF0_BITCLK),
297 MXS_PINCTRL_PIN(SAIF0_SDATA0),
298 MXS_PINCTRL_PIN(I2C0_SCL),
299 MXS_PINCTRL_PIN(I2C0_SDA),
300 MXS_PINCTRL_PIN(SAIF1_SDATA0),
301 MXS_PINCTRL_PIN(SPDIF),
302 MXS_PINCTRL_PIN(PWM3),
303 MXS_PINCTRL_PIN(PWM4),
304 MXS_PINCTRL_PIN(LCD_RESET),
305 MXS_PINCTRL_PIN(ENET0_MDC),
306 MXS_PINCTRL_PIN(ENET0_MDIO),
307 MXS_PINCTRL_PIN(ENET0_RX_EN),
308 MXS_PINCTRL_PIN(ENET0_RXD0),
309 MXS_PINCTRL_PIN(ENET0_RXD1),
310 MXS_PINCTRL_PIN(ENET0_TX_CLK),
311 MXS_PINCTRL_PIN(ENET0_TX_EN),
312 MXS_PINCTRL_PIN(ENET0_TXD0),
313 MXS_PINCTRL_PIN(ENET0_TXD1),
314 MXS_PINCTRL_PIN(ENET0_RXD2),
315 MXS_PINCTRL_PIN(ENET0_RXD3),
316 MXS_PINCTRL_PIN(ENET0_TXD2),
317 MXS_PINCTRL_PIN(ENET0_TXD3),
318 MXS_PINCTRL_PIN(ENET0_RX_CLK),
319 MXS_PINCTRL_PIN(ENET0_COL),
320 MXS_PINCTRL_PIN(ENET0_CRS),
321 MXS_PINCTRL_PIN(ENET_CLK),
322 MXS_PINCTRL_PIN(JTAG_RTCK),
323 MXS_PINCTRL_PIN(EMI_D00),
324 MXS_PINCTRL_PIN(EMI_D01),
325 MXS_PINCTRL_PIN(EMI_D02),
326 MXS_PINCTRL_PIN(EMI_D03),
327 MXS_PINCTRL_PIN(EMI_D04),
328 MXS_PINCTRL_PIN(EMI_D05),
329 MXS_PINCTRL_PIN(EMI_D06),
330 MXS_PINCTRL_PIN(EMI_D07),
331 MXS_PINCTRL_PIN(EMI_D08),
332 MXS_PINCTRL_PIN(EMI_D09),
333 MXS_PINCTRL_PIN(EMI_D10),
334 MXS_PINCTRL_PIN(EMI_D11),
335 MXS_PINCTRL_PIN(EMI_D12),
336 MXS_PINCTRL_PIN(EMI_D13),
337 MXS_PINCTRL_PIN(EMI_D14),
338 MXS_PINCTRL_PIN(EMI_D15),
339 MXS_PINCTRL_PIN(EMI_ODT0),
340 MXS_PINCTRL_PIN(EMI_DQM0),
341 MXS_PINCTRL_PIN(EMI_ODT1),
342 MXS_PINCTRL_PIN(EMI_DQM1),
343 MXS_PINCTRL_PIN(EMI_DDR_OPEN_FB),
344 MXS_PINCTRL_PIN(EMI_CLK),
345 MXS_PINCTRL_PIN(EMI_DQS0),
346 MXS_PINCTRL_PIN(EMI_DQS1),
347 MXS_PINCTRL_PIN(EMI_DDR_OPEN),
348 MXS_PINCTRL_PIN(EMI_A00),
349 MXS_PINCTRL_PIN(EMI_A01),
350 MXS_PINCTRL_PIN(EMI_A02),
351 MXS_PINCTRL_PIN(EMI_A03),
352 MXS_PINCTRL_PIN(EMI_A04),
353 MXS_PINCTRL_PIN(EMI_A05),
354 MXS_PINCTRL_PIN(EMI_A06),
355 MXS_PINCTRL_PIN(EMI_A07),
356 MXS_PINCTRL_PIN(EMI_A08),
357 MXS_PINCTRL_PIN(EMI_A09),
358 MXS_PINCTRL_PIN(EMI_A10),
359 MXS_PINCTRL_PIN(EMI_A11),
360 MXS_PINCTRL_PIN(EMI_A12),
361 MXS_PINCTRL_PIN(EMI_A13),
362 MXS_PINCTRL_PIN(EMI_A14),
363 MXS_PINCTRL_PIN(EMI_BA0),
364 MXS_PINCTRL_PIN(EMI_BA1),
365 MXS_PINCTRL_PIN(EMI_BA2),
366 MXS_PINCTRL_PIN(EMI_CASN),
367 MXS_PINCTRL_PIN(EMI_RASN),
368 MXS_PINCTRL_PIN(EMI_WEN),
369 MXS_PINCTRL_PIN(EMI_CE0N),
370 MXS_PINCTRL_PIN(EMI_CE1N),
371 MXS_PINCTRL_PIN(EMI_CKE),
372};
373
374static struct mxs_regs imx28_regs = {
375 .muxsel = 0x100,
376 .drive = 0x300,
377 .pull = 0x600,
378};
379
380static struct mxs_pinctrl_soc_data imx28_pinctrl_data = {
381 .regs = &imx28_regs,
382 .pins = imx28_pins,
383 .npins = ARRAY_SIZE(imx28_pins),
384};
385
386static int imx28_pinctrl_probe(struct platform_device *pdev)
387{
388 return mxs_pinctrl_probe(pdev, &imx28_pinctrl_data);
389}
390
391static const struct of_device_id imx28_pinctrl_of_match[] = {
392 { .compatible = "fsl,imx28-pinctrl", },
393 { /* sentinel */ }
394};
395MODULE_DEVICE_TABLE(of, imx28_pinctrl_of_match);
396
397static struct platform_driver imx28_pinctrl_driver = {
398 .driver = {
399 .name = "imx28-pinctrl",
400 .owner = THIS_MODULE,
401 .of_match_table = imx28_pinctrl_of_match,
402 },
403 .probe = imx28_pinctrl_probe,
404 .remove = mxs_pinctrl_remove,
405};
406
407static int __init imx28_pinctrl_init(void)
408{
409 return platform_driver_register(&imx28_pinctrl_driver);
410}
411postcore_initcall(imx28_pinctrl_init);
412
413static void __exit imx28_pinctrl_exit(void)
414{
415 platform_driver_unregister(&imx28_pinctrl_driver);
416}
417module_exit(imx28_pinctrl_exit);
418
419MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
420MODULE_DESCRIPTION("Freescale i.MX28 pinctrl driver");
421MODULE_LICENSE("GPL v2");
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-26 13:03:59 -0500