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path: root/drivers/net/sfc/falcon_gmac.c
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Diffstat (limited to 'drivers/net/sfc/falcon_gmac.c')
-rw-r--r--drivers/net/sfc/falcon_gmac.c95
1 files changed, 47 insertions, 48 deletions
diff --git a/drivers/net/sfc/falcon_gmac.c b/drivers/net/sfc/falcon_gmac.c
index 8865eae20ac5..8a1b80d1ff28 100644
--- a/drivers/net/sfc/falcon_gmac.c
+++ b/drivers/net/sfc/falcon_gmac.c
@@ -13,9 +13,8 @@
13#include "efx.h" 13#include "efx.h"
14#include "falcon.h" 14#include "falcon.h"
15#include "mac.h" 15#include "mac.h"
16#include "falcon_hwdefs.h" 16#include "regs.h"
17#include "falcon_io.h" 17#include "io.h"
18#include "gmii.h"
19 18
20/************************************************************************** 19/**************************************************************************
21 * 20 *
@@ -37,89 +36,89 @@ static void falcon_reconfigure_gmac(struct efx_nic *efx)
37 bytemode = (efx->link_speed == 1000); 36 bytemode = (efx->link_speed == 1000);
38 37
39 EFX_POPULATE_OWORD_5(reg, 38 EFX_POPULATE_OWORD_5(reg,
40 GM_LOOP, loopback, 39 FRF_AB_GM_LOOP, loopback,
41 GM_TX_EN, 1, 40 FRF_AB_GM_TX_EN, 1,
42 GM_TX_FC_EN, tx_fc, 41 FRF_AB_GM_TX_FC_EN, tx_fc,
43 GM_RX_EN, 1, 42 FRF_AB_GM_RX_EN, 1,
44 GM_RX_FC_EN, rx_fc); 43 FRF_AB_GM_RX_FC_EN, rx_fc);
45 falcon_write(efx, &reg, GM_CFG1_REG); 44 efx_writeo(efx, &reg, FR_AB_GM_CFG1);
46 udelay(10); 45 udelay(10);
47 46
48 /* Configuration register 2 */ 47 /* Configuration register 2 */
49 if_mode = (bytemode) ? 2 : 1; 48 if_mode = (bytemode) ? 2 : 1;
50 EFX_POPULATE_OWORD_5(reg, 49 EFX_POPULATE_OWORD_5(reg,
51 GM_IF_MODE, if_mode, 50 FRF_AB_GM_IF_MODE, if_mode,
52 GM_PAD_CRC_EN, 1, 51 FRF_AB_GM_PAD_CRC_EN, 1,
53 GM_LEN_CHK, 1, 52 FRF_AB_GM_LEN_CHK, 1,
54 GM_FD, efx->link_fd, 53 FRF_AB_GM_FD, efx->link_fd,
55 GM_PAMBL_LEN, 0x7/*datasheet recommended */); 54 FRF_AB_GM_PAMBL_LEN, 0x7/*datasheet recommended */);
56 55
57 falcon_write(efx, &reg, GM_CFG2_REG); 56 efx_writeo(efx, &reg, FR_AB_GM_CFG2);
58 udelay(10); 57 udelay(10);
59 58
60 /* Max frame len register */ 59 /* Max frame len register */
61 max_frame_len = EFX_MAX_FRAME_LEN(efx->net_dev->mtu); 60 max_frame_len = EFX_MAX_FRAME_LEN(efx->net_dev->mtu);
62 EFX_POPULATE_OWORD_1(reg, GM_MAX_FLEN, max_frame_len); 61 EFX_POPULATE_OWORD_1(reg, FRF_AB_GM_MAX_FLEN, max_frame_len);
63 falcon_write(efx, &reg, GM_MAX_FLEN_REG); 62 efx_writeo(efx, &reg, FR_AB_GM_MAX_FLEN);
64 udelay(10); 63 udelay(10);
65 64
66 /* FIFO configuration register 0 */ 65 /* FIFO configuration register 0 */
67 EFX_POPULATE_OWORD_5(reg, 66 EFX_POPULATE_OWORD_5(reg,
68 GMF_FTFENREQ, 1, 67 FRF_AB_GMF_FTFENREQ, 1,
69 GMF_STFENREQ, 1, 68 FRF_AB_GMF_STFENREQ, 1,
70 GMF_FRFENREQ, 1, 69 FRF_AB_GMF_FRFENREQ, 1,
71 GMF_SRFENREQ, 1, 70 FRF_AB_GMF_SRFENREQ, 1,
72 GMF_WTMENREQ, 1); 71 FRF_AB_GMF_WTMENREQ, 1);
73 falcon_write(efx, &reg, GMF_CFG0_REG); 72 efx_writeo(efx, &reg, FR_AB_GMF_CFG0);
74 udelay(10); 73 udelay(10);
75 74
76 /* FIFO configuration register 1 */ 75 /* FIFO configuration register 1 */
77 EFX_POPULATE_OWORD_2(reg, 76 EFX_POPULATE_OWORD_2(reg,
78 GMF_CFGFRTH, 0x12, 77 FRF_AB_GMF_CFGFRTH, 0x12,
79 GMF_CFGXOFFRTX, 0xffff); 78 FRF_AB_GMF_CFGXOFFRTX, 0xffff);
80 falcon_write(efx, &reg, GMF_CFG1_REG); 79 efx_writeo(efx, &reg, FR_AB_GMF_CFG1);
81 udelay(10); 80 udelay(10);
82 81
83 /* FIFO configuration register 2 */ 82 /* FIFO configuration register 2 */
84 EFX_POPULATE_OWORD_2(reg, 83 EFX_POPULATE_OWORD_2(reg,
85 GMF_CFGHWM, 0x3f, 84 FRF_AB_GMF_CFGHWM, 0x3f,
86 GMF_CFGLWM, 0xa); 85 FRF_AB_GMF_CFGLWM, 0xa);
87 falcon_write(efx, &reg, GMF_CFG2_REG); 86 efx_writeo(efx, &reg, FR_AB_GMF_CFG2);
88 udelay(10); 87 udelay(10);
89 88
90 /* FIFO configuration register 3 */ 89 /* FIFO configuration register 3 */
91 EFX_POPULATE_OWORD_2(reg, 90 EFX_POPULATE_OWORD_2(reg,
92 GMF_CFGHWMFT, 0x1c, 91 FRF_AB_GMF_CFGHWMFT, 0x1c,
93 GMF_CFGFTTH, 0x08); 92 FRF_AB_GMF_CFGFTTH, 0x08);
94 falcon_write(efx, &reg, GMF_CFG3_REG); 93 efx_writeo(efx, &reg, FR_AB_GMF_CFG3);
95 udelay(10); 94 udelay(10);
96 95
97 /* FIFO configuration register 4 */ 96 /* FIFO configuration register 4 */
98 EFX_POPULATE_OWORD_1(reg, GMF_HSTFLTRFRM_PAUSE, 1); 97 EFX_POPULATE_OWORD_1(reg, FRF_AB_GMF_HSTFLTRFRM_PAUSE, 1);
99 falcon_write(efx, &reg, GMF_CFG4_REG); 98 efx_writeo(efx, &reg, FR_AB_GMF_CFG4);
100 udelay(10); 99 udelay(10);
101 100
102 /* FIFO configuration register 5 */ 101 /* FIFO configuration register 5 */
103 falcon_read(efx, &reg, GMF_CFG5_REG); 102 efx_reado(efx, &reg, FR_AB_GMF_CFG5);
104 EFX_SET_OWORD_FIELD(reg, GMF_CFGBYTMODE, bytemode); 103 EFX_SET_OWORD_FIELD(reg, FRF_AB_GMF_CFGBYTMODE, bytemode);
105 EFX_SET_OWORD_FIELD(reg, GMF_CFGHDPLX, !efx->link_fd); 104 EFX_SET_OWORD_FIELD(reg, FRF_AB_GMF_CFGHDPLX, !efx->link_fd);
106 EFX_SET_OWORD_FIELD(reg, GMF_HSTDRPLT64, !efx->link_fd); 105 EFX_SET_OWORD_FIELD(reg, FRF_AB_GMF_HSTDRPLT64, !efx->link_fd);
107 EFX_SET_OWORD_FIELD(reg, GMF_HSTFLTRFRMDC_PAUSE, 0); 106 EFX_SET_OWORD_FIELD(reg, FRF_AB_GMF_HSTFLTRFRMDC_PAUSE, 0);
108 falcon_write(efx, &reg, GMF_CFG5_REG); 107 efx_writeo(efx, &reg, FR_AB_GMF_CFG5);
109 udelay(10); 108 udelay(10);
110 109
111 /* MAC address */ 110 /* MAC address */
112 EFX_POPULATE_OWORD_4(reg, 111 EFX_POPULATE_OWORD_4(reg,
113 GM_HWADDR_5, efx->net_dev->dev_addr[5], 112 FRF_AB_GM_ADR_B0, efx->net_dev->dev_addr[5],
114 GM_HWADDR_4, efx->net_dev->dev_addr[4], 113 FRF_AB_GM_ADR_B1, efx->net_dev->dev_addr[4],
115 GM_HWADDR_3, efx->net_dev->dev_addr[3], 114 FRF_AB_GM_ADR_B2, efx->net_dev->dev_addr[3],
116 GM_HWADDR_2, efx->net_dev->dev_addr[2]); 115 FRF_AB_GM_ADR_B3, efx->net_dev->dev_addr[2]);
117 falcon_write(efx, &reg, GM_ADR1_REG); 116 efx_writeo(efx, &reg, FR_AB_GM_ADR1);
118 udelay(10); 117 udelay(10);
119 EFX_POPULATE_OWORD_2(reg, 118 EFX_POPULATE_OWORD_2(reg,
120 GM_HWADDR_1, efx->net_dev->dev_addr[1], 119 FRF_AB_GM_ADR_B4, efx->net_dev->dev_addr[1],
121 GM_HWADDR_0, efx->net_dev->dev_addr[0]); 120 FRF_AB_GM_ADR_B5, efx->net_dev->dev_addr[0]);
122 falcon_write(efx, &reg, GM_ADR2_REG); 121 efx_writeo(efx, &reg, FR_AB_GM_ADR2);
123 udelay(10); 122 udelay(10);
124 123
125 falcon_reconfigure_mac_wrapper(efx); 124 falcon_reconfigure_mac_wrapper(efx);
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-26 01:15:12 -0500