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-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/class.h23
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/ioctl.h12
-rw-r--r--drivers/gpu/drm/nouveau/include/nvif/object.h2
-rw-r--r--drivers/gpu/drm/nouveau/include/nvkm/core/client.h6
-rw-r--r--drivers/gpu/drm/nouveau/include/nvkm/core/handle.h5
-rw-r--r--drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h3
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_chan.c6
-rw-r--r--drivers/gpu/drm/nouveau/nv50_display.c4
-rw-r--r--drivers/gpu/drm/nouveau/nvif/client.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvif/object.c17
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/core/client.c50
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/core/handle.c22
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/core/ioctl.c51
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c27
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h1
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c17
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c4
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv10.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c2
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c4
24 files changed, 152 insertions, 116 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvif/class.h b/drivers/gpu/drm/nouveau/include/nvif/class.h
index 91e57ba85503..f7394b9a1047 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/class.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/class.h
@@ -354,8 +354,8 @@ struct nvif_control_pstate_user_v0 {
354struct nv03_channel_dma_v0 { 354struct nv03_channel_dma_v0 {
355 __u8 version; 355 __u8 version;
356 __u8 chid; 356 __u8 chid;
357 __u8 pad02[2]; 357 __u8 pad02[6];
358 __u32 pushbuf; 358 __u64 pushbuf;
359 __u64 offset; 359 __u64 offset;
360}; 360};
361 361
@@ -368,10 +368,10 @@ struct nv03_channel_dma_v0 {
368struct nv50_channel_gpfifo_v0 { 368struct nv50_channel_gpfifo_v0 {
369 __u8 version; 369 __u8 version;
370 __u8 chid; 370 __u8 chid;
371 __u8 pad01[6]; 371 __u8 pad02[2];
372 __u32 pushbuf;
373 __u32 ilength; 372 __u32 ilength;
374 __u64 ioffset; 373 __u64 ioffset;
374 __u64 pushbuf;
375}; 375};
376 376
377struct kepler_channel_gpfifo_a_v0 { 377struct kepler_channel_gpfifo_a_v0 {
@@ -385,10 +385,9 @@ struct kepler_channel_gpfifo_a_v0 {
385#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_ENC 0x40 385#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_ENC 0x40
386 __u8 engine; 386 __u8 engine;
387 __u16 chid; 387 __u16 chid;
388 __u8 pad04[4];
389 __u32 pushbuf;
390 __u32 ilength; 388 __u32 ilength;
391 __u64 ioffset; 389 __u64 ioffset;
390 __u64 pushbuf;
392}; 391};
393 392
394/******************************************************************************* 393/*******************************************************************************
@@ -509,8 +508,8 @@ struct nv50_disp_pior_pwr_v0 {
509/* core */ 508/* core */
510struct nv50_disp_core_channel_dma_v0 { 509struct nv50_disp_core_channel_dma_v0 {
511 __u8 version; 510 __u8 version;
512 __u8 pad01[3]; 511 __u8 pad01[7];
513 __u32 pushbuf; 512 __u64 pushbuf;
514}; 513};
515 514
516#define NV50_DISP_CORE_CHANNEL_DMA_V0_NTFY_UEVENT 0x00 515#define NV50_DISP_CORE_CHANNEL_DMA_V0_NTFY_UEVENT 0x00
@@ -527,9 +526,9 @@ struct nv50_disp_cursor_v0 {
527/* base */ 526/* base */
528struct nv50_disp_base_channel_dma_v0 { 527struct nv50_disp_base_channel_dma_v0 {
529 __u8 version; 528 __u8 version;
530 __u8 pad01[2];
531 __u8 head; 529 __u8 head;
532 __u32 pushbuf; 530 __u8 pad02[6];
531 __u64 pushbuf;
533}; 532};
534 533
535#define NV50_DISP_BASE_CHANNEL_DMA_V0_NTFY_UEVENT 0x00 534#define NV50_DISP_BASE_CHANNEL_DMA_V0_NTFY_UEVENT 0x00
@@ -537,9 +536,9 @@ struct nv50_disp_base_channel_dma_v0 {
537/* overlay */ 536/* overlay */
538struct nv50_disp_overlay_channel_dma_v0 { 537struct nv50_disp_overlay_channel_dma_v0 {
539 __u8 version; 538 __u8 version;
540 __u8 pad01[2];
541 __u8 head; 539 __u8 head;
542 __u32 pushbuf; 540 __u8 pad02[6];
541 __u64 pushbuf;
543}; 542};
544 543
545#define NV50_DISP_OVERLAY_CHANNEL_DMA_V0_NTFY_UEVENT 0x00 544#define NV50_DISP_OVERLAY_CHANNEL_DMA_V0_NTFY_UEVENT 0x00
diff --git a/drivers/gpu/drm/nouveau/include/nvif/ioctl.h b/drivers/gpu/drm/nouveau/include/nvif/ioctl.h
index 2eb9b899ab36..9d99768f1a35 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/ioctl.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/ioctl.h
@@ -3,9 +3,6 @@
3 3
4struct nvif_ioctl_v0 { 4struct nvif_ioctl_v0 {
5 __u8 version; 5 __u8 version;
6#define NVIF_IOCTL_V0_OWNER_NVIF 0x00
7#define NVIF_IOCTL_V0_OWNER_ANY 0xff
8 __u8 owner;
9#define NVIF_IOCTL_V0_NOP 0x00 6#define NVIF_IOCTL_V0_NOP 0x00
10#define NVIF_IOCTL_V0_SCLASS 0x01 7#define NVIF_IOCTL_V0_SCLASS 0x01
11#define NVIF_IOCTL_V0_NEW 0x02 8#define NVIF_IOCTL_V0_NEW 0x02
@@ -20,13 +17,15 @@ struct nvif_ioctl_v0 {
20#define NVIF_IOCTL_V0_NTFY_GET 0x0b 17#define NVIF_IOCTL_V0_NTFY_GET 0x0b
21#define NVIF_IOCTL_V0_NTFY_PUT 0x0c 18#define NVIF_IOCTL_V0_NTFY_PUT 0x0c
22 __u8 type; 19 __u8 type;
23 __u8 path_nr; 20 __u8 pad02[4];
21#define NVIF_IOCTL_V0_OWNER_NVIF 0x00
22#define NVIF_IOCTL_V0_OWNER_ANY 0xff
23 __u8 owner;
24#define NVIF_IOCTL_V0_ROUTE_NVIF 0x00 24#define NVIF_IOCTL_V0_ROUTE_NVIF 0x00
25#define NVIF_IOCTL_V0_ROUTE_HIDDEN 0xff 25#define NVIF_IOCTL_V0_ROUTE_HIDDEN 0xff
26 __u8 pad04[3];
27 __u8 route; 26 __u8 route;
28 __u64 token; 27 __u64 token;
29 __u32 path[8]; /* in reverse */ 28 __u64 object;
30 __u8 data[]; /* ioctl data (below) */ 29 __u8 data[]; /* ioctl data (below) */
31}; 30};
32 31
@@ -47,6 +46,7 @@ struct nvif_ioctl_new_v0 {
47 __u8 pad01[6]; 46 __u8 pad01[6];
48 __u8 route; 47 __u8 route;
49 __u64 token; 48 __u64 token;
49 __u64 object;
50 __u32 handle; 50 __u32 handle;
51/* these class numbers are made up by us, and not nvidia-assigned */ 51/* these class numbers are made up by us, and not nvidia-assigned */
52#define NVIF_IOCTL_NEW_V0_PERFMON 0x0000ffff 52#define NVIF_IOCTL_NEW_V0_PERFMON 0x0000ffff
diff --git a/drivers/gpu/drm/nouveau/include/nvif/object.h b/drivers/gpu/drm/nouveau/include/nvif/object.h
index 66d94c74b351..b46c2f4aa0db 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/object.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/object.h
@@ -5,7 +5,6 @@
5 5
6struct nvif_object { 6struct nvif_object {
7 struct nvif_client *client; 7 struct nvif_client *client;
8 struct nvif_object *parent;
9 u32 handle; 8 u32 handle;
10 u32 oclass; 9 u32 oclass;
11 void *priv; /*XXX: hack */ 10 void *priv; /*XXX: hack */
@@ -26,6 +25,7 @@ int nvif_object_mthd(struct nvif_object *, u32, void *, u32);
26int nvif_object_map(struct nvif_object *); 25int nvif_object_map(struct nvif_object *);
27void nvif_object_unmap(struct nvif_object *); 26void nvif_object_unmap(struct nvif_object *);
28 27
28#define nvif_handle(a) (unsigned long)(void *)(a)
29#define nvif_object(a) (a)->object 29#define nvif_object(a) (a)->object
30 30
31#define nvif_rd(a,f,b,c) ({ \ 31#define nvif_rd(a,f,b,c) ({ \
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/client.h b/drivers/gpu/drm/nouveau/include/nvkm/core/client.h
index f79f9025d1c5..d70d28f90285 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/client.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/client.h
@@ -14,8 +14,14 @@ struct nvkm_client {
14 14
15 int (*ntfy)(const void *, u32, const void *, u32); 15 int (*ntfy)(const void *, u32, const void *, u32);
16 struct nvkm_client_notify *notify[16]; 16 struct nvkm_client_notify *notify[16];
17
18 struct rb_root objroot;
17}; 19};
18 20
21bool nvkm_client_insert(struct nvkm_client *, struct nvkm_handle *);
22void nvkm_client_remove(struct nvkm_client *, struct nvkm_handle *);
23struct nvkm_handle *nvkm_client_search(struct nvkm_client *, u64 handle);
24
19static inline struct nvkm_client * 25static inline struct nvkm_client *
20nv_client(void *obj) 26nv_client(void *obj)
21{ 27{
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/handle.h b/drivers/gpu/drm/nouveau/include/nvkm/core/handle.h
index 67f384d0916c..64f9e62168ff 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/handle.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/handle.h
@@ -17,6 +17,9 @@ struct nvkm_handle {
17 17
18 struct nvkm_handle *parent; 18 struct nvkm_handle *parent;
19 struct nvkm_object *object; 19 struct nvkm_object *object;
20
21 struct rb_node rb;
22 u64 handle;
20}; 23};
21 24
22int nvkm_handle_create(struct nvkm_object *, u32 parent, u32 handle, 25int nvkm_handle_create(struct nvkm_object *, u32 parent, u32 handle,
@@ -25,8 +28,6 @@ void nvkm_handle_destroy(struct nvkm_handle *);
25int nvkm_handle_init(struct nvkm_handle *); 28int nvkm_handle_init(struct nvkm_handle *);
26int nvkm_handle_fini(struct nvkm_handle *, bool suspend); 29int nvkm_handle_fini(struct nvkm_handle *, bool suspend);
27 30
28struct nvkm_object *nvkm_handle_ref(struct nvkm_object *, u32 name);
29
30struct nvkm_handle *nvkm_handle_get_class(struct nvkm_object *, u16); 31struct nvkm_handle *nvkm_handle_get_class(struct nvkm_object *, u16);
31struct nvkm_handle *nvkm_handle_get_vinst(struct nvkm_object *, u64); 32struct nvkm_handle *nvkm_handle_get_vinst(struct nvkm_object *, u64);
32struct nvkm_handle *nvkm_handle_get_cinst(struct nvkm_object *, u32); 33struct nvkm_handle *nvkm_handle_get_cinst(struct nvkm_object *, u32);
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h
index 0ec929e00b36..fb8d2b5a0567 100644
--- a/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h
@@ -4,7 +4,6 @@
4 4
5struct nvkm_fifo_chan { 5struct nvkm_fifo_chan {
6 struct nvkm_namedb namedb; 6 struct nvkm_namedb namedb;
7 struct nvkm_dmaobj *pushdma;
8 struct nvkm_gpuobj *pushgpu; 7 struct nvkm_gpuobj *pushgpu;
9 void __iomem *user; 8 void __iomem *user;
10 u64 addr; 9 u64 addr;
@@ -30,7 +29,7 @@ nvkm_fifo_chan(void *obj)
30int nvkm_fifo_channel_create_(struct nvkm_object *, 29int nvkm_fifo_channel_create_(struct nvkm_object *,
31 struct nvkm_object *, 30 struct nvkm_object *,
32 struct nvkm_oclass *, 31 struct nvkm_oclass *,
33 int bar, u32 addr, u32 size, u32 push, 32 int bar, u32 addr, u32 size, u64 push,
34 u64 engmask, int len, void **); 33 u64 engmask, int len, void **);
35void nvkm_fifo_channel_destroy(struct nvkm_fifo_chan *); 34void nvkm_fifo_channel_destroy(struct nvkm_fifo_chan *);
36 35
diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c
index 302713821f08..9dd2f4f8e127 100644
--- a/drivers/gpu/drm/nouveau/nouveau_chan.c
+++ b/drivers/gpu/drm/nouveau/nouveau_chan.c
@@ -209,13 +209,13 @@ nouveau_channel_ind(struct nouveau_drm *drm, struct nvif_device *device,
209 if (oclass[0] >= KEPLER_CHANNEL_GPFIFO_A) { 209 if (oclass[0] >= KEPLER_CHANNEL_GPFIFO_A) {
210 args.kepler.version = 0; 210 args.kepler.version = 0;
211 args.kepler.engine = engine; 211 args.kepler.engine = engine;
212 args.kepler.pushbuf = chan->push.ctxdma.handle; 212 args.kepler.pushbuf = nvif_handle(&chan->push.ctxdma);
213 args.kepler.ilength = 0x02000; 213 args.kepler.ilength = 0x02000;
214 args.kepler.ioffset = 0x10000 + chan->push.vma.offset; 214 args.kepler.ioffset = 0x10000 + chan->push.vma.offset;
215 size = sizeof(args.kepler); 215 size = sizeof(args.kepler);
216 } else { 216 } else {
217 args.nv50.version = 0; 217 args.nv50.version = 0;
218 args.nv50.pushbuf = chan->push.ctxdma.handle; 218 args.nv50.pushbuf = nvif_handle(&chan->push.ctxdma);
219 args.nv50.ilength = 0x02000; 219 args.nv50.ilength = 0x02000;
220 args.nv50.ioffset = 0x10000 + chan->push.vma.offset; 220 args.nv50.ioffset = 0x10000 + chan->push.vma.offset;
221 size = sizeof(args.nv50); 221 size = sizeof(args.nv50);
@@ -258,7 +258,7 @@ nouveau_channel_dma(struct nouveau_drm *drm, struct nvif_device *device,
258 258
259 /* create channel object */ 259 /* create channel object */
260 args.version = 0; 260 args.version = 0;
261 args.pushbuf = chan->push.ctxdma.handle; 261 args.pushbuf = nvif_handle(&chan->push.ctxdma);
262 args.offset = chan->push.vma.offset; 262 args.offset = chan->push.vma.offset;
263 263
264 do { 264 do {
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 794a20ea71fe..c8e797404353 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -230,7 +230,7 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
230 if (!dmac->ptr) 230 if (!dmac->ptr)
231 return -ENOMEM; 231 return -ENOMEM;
232 232
233 ret = nvif_object_init(&device->object, args->pushbuf, 233 ret = nvif_object_init(&device->object, 0xd0000000,
234 NV_DMA_FROM_MEMORY, &(struct nv_dma_v0) { 234 NV_DMA_FROM_MEMORY, &(struct nv_dma_v0) {
235 .target = NV_DMA_V0_TARGET_PCI_US, 235 .target = NV_DMA_V0_TARGET_PCI_US,
236 .access = NV_DMA_V0_ACCESS_RD, 236 .access = NV_DMA_V0_ACCESS_RD,
@@ -240,6 +240,8 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
240 if (ret) 240 if (ret)
241 return ret; 241 return ret;
242 242
243 args->pushbuf = nvif_handle(&pushbuf);
244
243 ret = nv50_chan_create(device, disp, oclass, head, data, size, 245 ret = nv50_chan_create(device, disp, oclass, head, data, size,
244 &dmac->base); 246 &dmac->base);
245 nvif_object_fini(&pushbuf); 247 nvif_object_fini(&pushbuf);
diff --git a/drivers/gpu/drm/nouveau/nvif/client.c b/drivers/gpu/drm/nouveau/nvif/client.c
index 4a830ebf9661..64d3d0c37a83 100644
--- a/drivers/gpu/drm/nouveau/nvif/client.c
+++ b/drivers/gpu/drm/nouveau/nvif/client.c
@@ -50,7 +50,6 @@ nvif_client_fini(struct nvif_client *client)
50 if (client->driver) { 50 if (client->driver) {
51 client->driver->fini(client->object.priv); 51 client->driver->fini(client->object.priv);
52 client->driver = NULL; 52 client->driver = NULL;
53 client->object.parent = NULL;
54 client->object.client = NULL; 53 client->object.client = NULL;
55 nvif_object_fini(&client->object); 54 nvif_object_fini(&client->object);
56 } 55 }
@@ -79,7 +78,6 @@ nvif_client_init(const char *driver, const char *name, u64 device,
79 return ret; 78 return ret;
80 79
81 client->object.client = client; 80 client->object.client = client;
82 client->object.parent = &client->object;
83 client->object.handle = ~0; 81 client->object.handle = ~0;
84 client->route = NVIF_IOCTL_V0_ROUTE_NVIF; 82 client->route = NVIF_IOCTL_V0_ROUTE_NVIF;
85 client->super = true; 83 client->super = true;
diff --git a/drivers/gpu/drm/nouveau/nvif/object.c b/drivers/gpu/drm/nouveau/nvif/object.c
index a727f72ca234..b914e34a43c3 100644
--- a/drivers/gpu/drm/nouveau/nvif/object.c
+++ b/drivers/gpu/drm/nouveau/nvif/object.c
@@ -36,14 +36,11 @@ nvif_object_ioctl(struct nvif_object *object, void *data, u32 size, void **hack)
36 } *args = data; 36 } *args = data;
37 37
38 if (size >= sizeof(*args) && args->v0.version == 0) { 38 if (size >= sizeof(*args) && args->v0.version == 0) {
39 if (object != &client->object)
40 args->v0.object = nvif_handle(object);
41 else
42 args->v0.object = 0;
39 args->v0.owner = NVIF_IOCTL_V0_OWNER_ANY; 43 args->v0.owner = NVIF_IOCTL_V0_OWNER_ANY;
40 args->v0.path_nr = 0;
41 while (args->v0.path_nr < ARRAY_SIZE(args->v0.path)) {
42 args->v0.path[args->v0.path_nr++] = object->handle;
43 if (object->parent == object)
44 break;
45 object = object->parent;
46 }
47 } else 44 } else
48 return -ENOSYS; 45 return -ENOSYS;
49 46
@@ -216,13 +213,12 @@ nvif_object_init(struct nvif_object *parent, u32 handle, u32 oclass,
216 int ret = 0; 213 int ret = 0;
217 214
218 object->client = NULL; 215 object->client = NULL;
219 object->parent = parent;
220 object->handle = handle; 216 object->handle = handle;
221 object->oclass = oclass; 217 object->oclass = oclass;
222 object->map.ptr = NULL; 218 object->map.ptr = NULL;
223 object->map.size = 0; 219 object->map.size = 0;
224 220
225 if (object->parent) { 221 if (parent) {
226 if (!(args = kmalloc(sizeof(*args) + size, GFP_KERNEL))) { 222 if (!(args = kmalloc(sizeof(*args) + size, GFP_KERNEL))) {
227 nvif_object_fini(object); 223 nvif_object_fini(object);
228 return -ENOMEM; 224 return -ENOMEM;
@@ -232,7 +228,8 @@ nvif_object_init(struct nvif_object *parent, u32 handle, u32 oclass,
232 args->ioctl.type = NVIF_IOCTL_V0_NEW; 228 args->ioctl.type = NVIF_IOCTL_V0_NEW;
233 args->new.version = 0; 229 args->new.version = 0;
234 args->new.route = parent->client->route; 230 args->new.route = parent->client->route;
235 args->new.token = (unsigned long)(void *)object; 231 args->new.token = nvif_handle(object);
232 args->new.object = nvif_handle(object);
236 args->new.handle = handle; 233 args->new.handle = handle;
237 args->new.oclass = oclass; 234 args->new.oclass = oclass;
238 235
diff --git a/drivers/gpu/drm/nouveau/nvkm/core/client.c b/drivers/gpu/drm/nouveau/nvkm/core/client.c
index 7615cdd75294..bfe5357d7334 100644
--- a/drivers/gpu/drm/nouveau/nvkm/core/client.c
+++ b/drivers/gpu/drm/nouveau/nvkm/core/client.c
@@ -183,6 +183,55 @@ nvkm_client_oclass = {
183 }, 183 },
184}; 184};
185 185
186void
187nvkm_client_remove(struct nvkm_client *client, struct nvkm_handle *object)
188{
189 if (!RB_EMPTY_NODE(&object->rb))
190 rb_erase(&object->rb, &client->objroot);
191}
192
193bool
194nvkm_client_insert(struct nvkm_client *client, struct nvkm_handle *object)
195{
196 struct rb_node **ptr = &client->objroot.rb_node;
197 struct rb_node *parent = NULL;
198
199 while (*ptr) {
200 struct nvkm_handle *this =
201 container_of(*ptr, typeof(*this), rb);
202 parent = *ptr;
203 if (object->handle < this->handle)
204 ptr = &parent->rb_left;
205 else
206 if (object->handle > this->handle)
207 ptr = &parent->rb_right;
208 else
209 return false;
210 }
211
212 rb_link_node(&object->rb, parent, ptr);
213 rb_insert_color(&object->rb, &client->objroot);
214 return true;
215}
216
217struct nvkm_handle *
218nvkm_client_search(struct nvkm_client *client, u64 handle)
219{
220 struct rb_node *node = client->objroot.rb_node;
221 while (node) {
222 struct nvkm_handle *object =
223 container_of(node, typeof(*object), rb);
224 if (handle < object->handle)
225 node = node->rb_left;
226 else
227 if (handle > object->handle)
228 node = node->rb_right;
229 else
230 return object;
231 }
232 return NULL;
233}
234
186int 235int
187nvkm_client_fini(struct nvkm_client *client, bool suspend) 236nvkm_client_fini(struct nvkm_client *client, bool suspend)
188{ 237{
@@ -256,6 +305,7 @@ nvkm_client_new(const char *name, u64 device, const char *cfg,
256 client->device = device; 305 client->device = device;
257 snprintf(client->name, sizeof(client->name), "%s", name); 306 snprintf(client->name, sizeof(client->name), "%s", name);
258 client->debug = nvkm_dbgopt(dbg, "CLIENT"); 307 client->debug = nvkm_dbgopt(dbg, "CLIENT");
308 client->objroot = RB_ROOT;
259 return 0; 309 return 0;
260} 310}
261 311
diff --git a/drivers/gpu/drm/nouveau/nvkm/core/handle.c b/drivers/gpu/drm/nouveau/nvkm/core/handle.c
index 6230eaece64d..a12ab8001701 100644
--- a/drivers/gpu/drm/nouveau/nvkm/core/handle.c
+++ b/drivers/gpu/drm/nouveau/nvkm/core/handle.c
@@ -113,6 +113,7 @@ nvkm_handle_create(struct nvkm_object *parent, u32 _parent, u32 _handle,
113 INIT_LIST_HEAD(&handle->tree); 113 INIT_LIST_HEAD(&handle->tree);
114 handle->name = _handle; 114 handle->name = _handle;
115 handle->priv = ~0; 115 handle->priv = ~0;
116 RB_CLEAR_NODE(&handle->rb);
116 117
117 ret = nvkm_namedb_insert(nv_namedb(namedb), _handle, object, handle); 118 ret = nvkm_namedb_insert(nv_namedb(namedb), _handle, object, handle);
118 if (ret) { 119 if (ret) {
@@ -149,12 +150,15 @@ nvkm_handle_create(struct nvkm_object *parent, u32 _parent, u32 _handle,
149void 150void
150nvkm_handle_destroy(struct nvkm_handle *handle) 151nvkm_handle_destroy(struct nvkm_handle *handle)
151{ 152{
153 struct nvkm_client *client = nvkm_client(handle->object);
152 struct nvkm_handle *item, *temp; 154 struct nvkm_handle *item, *temp;
153 155
154 hprintk(handle, TRACE, "destroy running\n"); 156 hprintk(handle, TRACE, "destroy running\n");
155 list_for_each_entry_safe(item, temp, &handle->tree, head) { 157 list_for_each_entry_safe(item, temp, &handle->tree, head) {
156 nvkm_handle_destroy(item); 158 nvkm_handle_destroy(item);
157 } 159 }
160
161 nvkm_client_remove(client, handle);
158 list_del(&handle->head); 162 list_del(&handle->head);
159 163
160 if (handle->priv != ~0) { 164 if (handle->priv != ~0) {
@@ -167,24 +171,6 @@ nvkm_handle_destroy(struct nvkm_handle *handle)
167 kfree(handle); 171 kfree(handle);
168} 172}
169 173
170struct nvkm_object *
171nvkm_handle_ref(struct nvkm_object *parent, u32 name)
172{
173 struct nvkm_object *object = NULL;
174 struct nvkm_handle *handle;
175
176 while (!nv_iclass(parent, NV_NAMEDB_CLASS))
177 parent = parent->parent;
178
179 handle = nvkm_namedb_get(nv_namedb(parent), name);
180 if (handle) {
181 nvkm_object_ref(handle->object, &object);
182 nvkm_namedb_put(handle);
183 }
184
185 return object;
186}
187
188struct nvkm_handle * 174struct nvkm_handle *
189nvkm_handle_get_class(struct nvkm_object *engctx, u16 oclass) 175nvkm_handle_get_class(struct nvkm_object *engctx, u16 oclass)
190{ 176{
diff --git a/drivers/gpu/drm/nouveau/nvkm/core/ioctl.c b/drivers/gpu/drm/nouveau/nvkm/core/ioctl.c
index 7434958846f7..7654783e8350 100644
--- a/drivers/gpu/drm/nouveau/nvkm/core/ioctl.c
+++ b/drivers/gpu/drm/nouveau/nvkm/core/ioctl.c
@@ -103,9 +103,9 @@ nvkm_ioctl_new(struct nvkm_handle *handle, void *data, u32 size)
103 return ret; 103 return ret;
104 104
105 nvif_ioctl(handle->object, "new vers %d handle %08x class %08x " 105 nvif_ioctl(handle->object, "new vers %d handle %08x class %08x "
106 "route %02x token %llx\n", 106 "route %02x token %llx object %016llx\n",
107 args->v0.version, _handle, _oclass, 107 args->v0.version, _handle, _oclass,
108 args->v0.route, args->v0.token); 108 args->v0.route, args->v0.token, args->v0.object);
109 109
110 if (!nv_iclass(handle->object, NV_PARENT_CLASS)) { 110 if (!nv_iclass(handle->object, NV_PARENT_CLASS)) {
111 nvif_debug(handle->object, "cannot have children (ctor)\n"); 111 nvif_debug(handle->object, "cannot have children (ctor)\n");
@@ -166,6 +166,8 @@ nvkm_ioctl_new(struct nvkm_handle *handle, void *data, u32 size)
166 if (ret) 166 if (ret)
167 nvkm_handle_destroy(handle); 167 nvkm_handle_destroy(handle);
168 168
169 handle->handle = args->v0.object;
170 nvkm_client_insert(client, handle);
169fail_handle: 171fail_handle:
170 nvkm_object_dec(object, false); 172 nvkm_object_dec(object, false);
171fail_init: 173fail_init:
@@ -438,40 +440,31 @@ nvkm_ioctl_v0[] = {
438}; 440};
439 441
440static int 442static int
441nvkm_ioctl_path(struct nvkm_handle *parent, u32 type, u32 nr, u32 *path, 443nvkm_ioctl_path(struct nvkm_client *client, u64 handle, u32 type,
442 void *data, u32 size, u8 owner, u8 *route, u64 *token) 444 void *data, u32 size, u8 owner, u8 *route, u64 *token)
443{ 445{
444 struct nvkm_handle *handle = parent; 446 struct nvkm_handle *object;
445 struct nvkm_namedb *namedb;
446 struct nvkm_object *object;
447 int ret; 447 int ret;
448 448
449 while ((object = parent->object), nr--) { 449 if (handle)
450 nvif_ioctl(object, "path 0x%08x\n", path[nr]); 450 object = nvkm_client_search(client, handle);
451 if (!nv_iclass(object, NV_PARENT_CLASS)) { 451 else
452 nvif_debug(object, "cannot have children (path)\n"); 452 object = client->root;
453 return -EINVAL; 453 if (unlikely(!object)) {
454 } 454 nvif_ioctl(&client->namedb.parent.object, "object not found\n");
455 455 return -ENOENT;
456 if (!(namedb = (void *)nv_pclass(object, NV_NAMEDB_CLASS)) ||
457 !(handle = nvkm_namedb_get(namedb, path[nr]))) {
458 nvif_debug(object, "handle 0x%08x not found\n", path[nr]);
459 return -ENOENT;
460 }
461 nvkm_namedb_put(handle);
462 parent = handle;
463 } 456 }
464 457
465 if (owner != NVIF_IOCTL_V0_OWNER_ANY && owner != handle->route) { 458 if (owner != NVIF_IOCTL_V0_OWNER_ANY && owner != object->route) {
466 nvif_ioctl(object, "object route != owner\n"); 459 nvif_ioctl(&client->namedb.parent.object, "route != owner\n");
467 return -EACCES; 460 return -EACCES;
468 } 461 }
469 *route = handle->route; 462 *route = object->route;
470 *token = handle->token; 463 *token = object->token;
471 464
472 if (ret = -EINVAL, type < ARRAY_SIZE(nvkm_ioctl_v0)) { 465 if (ret = -EINVAL, type < ARRAY_SIZE(nvkm_ioctl_v0)) {
473 if (nvkm_ioctl_v0[type].version == 0) 466 if (nvkm_ioctl_v0[type].version == 0)
474 ret = nvkm_ioctl_v0[type].func(handle, data, size); 467 ret = nvkm_ioctl_v0[type].func(object, data, size);
475 } 468 }
476 469
477 return ret; 470 return ret;
@@ -491,11 +484,11 @@ nvkm_ioctl(struct nvkm_client *client, bool supervisor,
491 nvif_ioctl(object, "size %d\n", size); 484 nvif_ioctl(object, "size %d\n", size);
492 485
493 if (nvif_unpack(args->v0, 0, 0, true)) { 486 if (nvif_unpack(args->v0, 0, 0, true)) {
494 nvif_ioctl(object, "vers %d type %02x path %d owner %02x\n", 487 nvif_ioctl(object,
495 args->v0.version, args->v0.type, args->v0.path_nr, 488 "vers %d type %02x object %016llx owner %02x\n",
489 args->v0.version, args->v0.type, args->v0.object,
496 args->v0.owner); 490 args->v0.owner);
497 ret = nvkm_ioctl_path(client->root, args->v0.type, 491 ret = nvkm_ioctl_path(client, args->v0.object, args->v0.type,
498 args->v0.path_nr, args->v0.path,
499 data, size, args->v0.owner, 492 data, size, args->v0.owner,
500 &args->v0.route, &args->v0.token); 493 &args->v0.route, &args->v0.token);
501 } 494 }
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
index 9d7ac6a15bd7..2568e5d5790e 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
@@ -206,9 +206,12 @@ nv50_disp_dmac_object_detach(struct nvkm_object *parent, int cookie)
206static int 206static int
207nv50_disp_dmac_create_(struct nvkm_object *parent, 207nv50_disp_dmac_create_(struct nvkm_object *parent,
208 struct nvkm_object *engine, 208 struct nvkm_object *engine,
209 struct nvkm_oclass *oclass, u32 pushbuf, int head, 209 struct nvkm_oclass *oclass, u64 pushbuf, int head,
210 int length, void **pobject) 210 int length, void **pobject)
211{ 211{
212 struct nvkm_client *client = nvkm_client(parent);
213 struct nvkm_handle *handle;
214 struct nvkm_dmaobj *dmaobj;
212 struct nv50_disp_dmac *dmac; 215 struct nv50_disp_dmac *dmac;
213 int ret; 216 int ret;
214 217
@@ -218,22 +221,23 @@ nv50_disp_dmac_create_(struct nvkm_object *parent,
218 if (ret) 221 if (ret)
219 return ret; 222 return ret;
220 223
221 dmac->pushdma = (void *)nvkm_handle_ref(parent, pushbuf); 224 handle = nvkm_client_search(client, pushbuf);
222 if (!dmac->pushdma) 225 if (!handle)
223 return -ENOENT; 226 return -ENOENT;
227 dmaobj = (void *)handle->object;
224 228
225 switch (nv_mclass(dmac->pushdma)) { 229 switch (nv_mclass(dmaobj)) {
226 case 0x0002: 230 case 0x0002:
227 case 0x003d: 231 case 0x003d:
228 if (dmac->pushdma->limit - dmac->pushdma->start != 0xfff) 232 if (dmaobj->limit - dmaobj->start != 0xfff)
229 return -EINVAL; 233 return -EINVAL;
230 234
231 switch (dmac->pushdma->target) { 235 switch (dmaobj->target) {
232 case NV_MEM_TARGET_VRAM: 236 case NV_MEM_TARGET_VRAM:
233 dmac->push = 0x00000001 | dmac->pushdma->start >> 8; 237 dmac->push = 0x00000001 | dmaobj->start >> 8;
234 break; 238 break;
235 case NV_MEM_TARGET_PCI_NOSNOOP: 239 case NV_MEM_TARGET_PCI_NOSNOOP:
236 dmac->push = 0x00000003 | dmac->pushdma->start >> 8; 240 dmac->push = 0x00000003 | dmaobj->start >> 8;
237 break; 241 break;
238 default: 242 default:
239 return -EINVAL; 243 return -EINVAL;
@@ -250,7 +254,6 @@ void
250nv50_disp_dmac_dtor(struct nvkm_object *object) 254nv50_disp_dmac_dtor(struct nvkm_object *object)
251{ 255{
252 struct nv50_disp_dmac *dmac = (void *)object; 256 struct nv50_disp_dmac *dmac = (void *)object;
253 nvkm_object_ref(NULL, (struct nvkm_object **)&dmac->pushdma);
254 nv50_disp_chan_destroy(&dmac->base); 257 nv50_disp_chan_destroy(&dmac->base);
255} 258}
256 259
@@ -513,7 +516,7 @@ nv50_disp_core_ctor(struct nvkm_object *parent,
513 nvif_ioctl(parent, "create disp core channel dma size %d\n", size); 516 nvif_ioctl(parent, "create disp core channel dma size %d\n", size);
514 if (nvif_unpack(args->v0, 0, 0, false)) { 517 if (nvif_unpack(args->v0, 0, 0, false)) {
515 nvif_ioctl(parent, "create disp core channel dma vers %d " 518 nvif_ioctl(parent, "create disp core channel dma vers %d "
516 "pushbuf %08x\n", 519 "pushbuf %016llx\n",
517 args->v0.version, args->v0.pushbuf); 520 args->v0.version, args->v0.pushbuf);
518 } else 521 } else
519 return ret; 522 return ret;
@@ -682,7 +685,7 @@ nv50_disp_base_ctor(struct nvkm_object *parent,
682 nvif_ioctl(parent, "create disp base channel dma size %d\n", size); 685 nvif_ioctl(parent, "create disp base channel dma size %d\n", size);
683 if (nvif_unpack(args->v0, 0, 0, false)) { 686 if (nvif_unpack(args->v0, 0, 0, false)) {
684 nvif_ioctl(parent, "create disp base channel dma vers %d " 687 nvif_ioctl(parent, "create disp base channel dma vers %d "
685 "pushbuf %08x head %d\n", 688 "pushbuf %016llx head %d\n",
686 args->v0.version, args->v0.pushbuf, args->v0.head); 689 args->v0.version, args->v0.pushbuf, args->v0.head);
687 if (args->v0.head > disp->head.nr) 690 if (args->v0.head > disp->head.nr)
688 return -EINVAL; 691 return -EINVAL;
@@ -772,7 +775,7 @@ nv50_disp_ovly_ctor(struct nvkm_object *parent,
772 nvif_ioctl(parent, "create disp overlay channel dma size %d\n", size); 775 nvif_ioctl(parent, "create disp overlay channel dma size %d\n", size);
773 if (nvif_unpack(args->v0, 0, 0, false)) { 776 if (nvif_unpack(args->v0, 0, 0, false)) {
774 nvif_ioctl(parent, "create disp overlay channel dma vers %d " 777 nvif_ioctl(parent, "create disp overlay channel dma vers %d "
775 "pushbuf %08x head %d\n", 778 "pushbuf %016llx head %d\n",
776 args->v0.version, args->v0.pushbuf, args->v0.head); 779 args->v0.version, args->v0.pushbuf, args->v0.head);
777 if (args->v0.head > disp->head.nr) 780 if (args->v0.head > disp->head.nr)
778 return -EINVAL; 781 return -EINVAL;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h
index 0d495d274eb3..21dbd3901113 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h
@@ -113,7 +113,6 @@ extern const struct nvkm_event_func gf110_disp_chan_uevent;
113 113
114struct nv50_disp_dmac { 114struct nv50_disp_dmac {
115 struct nv50_disp_chan base; 115 struct nv50_disp_chan base;
116 struct nvkm_dmaobj *pushdma;
117 u32 push; 116 u32 push;
118}; 117};
119 118
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c
index e298aef71918..73b8ab4c222e 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/base.c
@@ -54,9 +54,12 @@ int
54nvkm_fifo_channel_create_(struct nvkm_object *parent, 54nvkm_fifo_channel_create_(struct nvkm_object *parent,
55 struct nvkm_object *engine, 55 struct nvkm_object *engine,
56 struct nvkm_oclass *oclass, 56 struct nvkm_oclass *oclass,
57 int bar, u32 addr, u32 size, u32 pushbuf, 57 int bar, u32 addr, u32 size, u64 pushbuf,
58 u64 engmask, int len, void **ptr) 58 u64 engmask, int len, void **ptr)
59{ 59{
60 struct nvkm_client *client = nvkm_client(parent);
61 struct nvkm_handle *handle;
62 struct nvkm_dmaobj *dmaobj;
60 struct nvkm_fifo *fifo = (void *)engine; 63 struct nvkm_fifo *fifo = (void *)engine;
61 struct nvkm_fifo_chan *chan; 64 struct nvkm_fifo_chan *chan;
62 struct nvkm_dmaeng *dmaeng; 65 struct nvkm_dmaeng *dmaeng;
@@ -73,12 +76,13 @@ nvkm_fifo_channel_create_(struct nvkm_object *parent,
73 return ret; 76 return ret;
74 77
75 /* validate dma object representing push buffer */ 78 /* validate dma object representing push buffer */
76 chan->pushdma = (void *)nvkm_handle_ref(parent, pushbuf); 79 handle = nvkm_client_search(client, pushbuf);
77 if (!chan->pushdma) 80 if (!handle)
78 return -ENOENT; 81 return -ENOENT;
82 dmaobj = (void *)handle->object;
79 83
80 dmaeng = (void *)chan->pushdma->base.engine; 84 dmaeng = (void *)dmaobj->base.engine;
81 switch (chan->pushdma->base.oclass->handle) { 85 switch (dmaobj->base.oclass->handle) {
82 case NV_DMA_FROM_MEMORY: 86 case NV_DMA_FROM_MEMORY:
83 case NV_DMA_IN_MEMORY: 87 case NV_DMA_IN_MEMORY:
84 break; 88 break;
@@ -86,7 +90,7 @@ nvkm_fifo_channel_create_(struct nvkm_object *parent,
86 return -EINVAL; 90 return -EINVAL;
87 } 91 }
88 92
89 ret = dmaeng->bind(chan->pushdma, parent, &chan->pushgpu); 93 ret = dmaeng->bind(dmaobj, parent, &chan->pushgpu);
90 if (ret) 94 if (ret)
91 return ret; 95 return ret;
92 96
@@ -126,7 +130,6 @@ nvkm_fifo_channel_destroy(struct nvkm_fifo_chan *chan)
126 spin_unlock_irqrestore(&fifo->lock, flags); 130 spin_unlock_irqrestore(&fifo->lock, flags);
127 131
128 nvkm_gpuobj_ref(NULL, &chan->pushgpu); 132 nvkm_gpuobj_ref(NULL, &chan->pushgpu);
129 nvkm_object_ref(NULL, (struct nvkm_object **)&chan->pushdma);
130 nvkm_namedb_destroy(&chan->namedb); 133 nvkm_namedb_destroy(&chan->namedb);
131} 134}
132 135
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c
index c4f48112aa05..575329d3f2bb 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/g84.c
@@ -182,7 +182,7 @@ g84_fifo_chan_ctor_dma(struct nvkm_object *parent, struct nvkm_object *engine,
182 182
183 nvif_ioctl(parent, "create channel dma size %d\n", size); 183 nvif_ioctl(parent, "create channel dma size %d\n", size);
184 if (nvif_unpack(args->v0, 0, 0, false)) { 184 if (nvif_unpack(args->v0, 0, 0, false)) {
185 nvif_ioctl(parent, "create channel dma vers %d pushbuf %08x " 185 nvif_ioctl(parent, "create channel dma vers %d pushbuf %llx "
186 "offset %016llx\n", args->v0.version, 186 "offset %016llx\n", args->v0.version,
187 args->v0.pushbuf, args->v0.offset); 187 args->v0.pushbuf, args->v0.offset);
188 } else 188 } else
@@ -258,7 +258,7 @@ g84_fifo_chan_ctor_ind(struct nvkm_object *parent, struct nvkm_object *engine,
258 258
259 nvif_ioctl(parent, "create channel gpfifo size %d\n", size); 259 nvif_ioctl(parent, "create channel gpfifo size %d\n", size);
260 if (nvif_unpack(args->v0, 0, 0, false)) { 260 if (nvif_unpack(args->v0, 0, 0, false)) {
261 nvif_ioctl(parent, "create channel gpfifo vers %d pushbuf %08x " 261 nvif_ioctl(parent, "create channel gpfifo vers %d pushbuf %llx "
262 "ioffset %016llx ilength %08x\n", 262 "ioffset %016llx ilength %08x\n",
263 args->v0.version, args->v0.pushbuf, args->v0.ioffset, 263 args->v0.version, args->v0.pushbuf, args->v0.ioffset,
264 args->v0.ilength); 264 args->v0.ilength);
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
index d940d41d1182..cfaa8aeb2223 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
@@ -210,7 +210,7 @@ gf100_fifo_chan_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
210 210
211 nvif_ioctl(parent, "create channel gpfifo size %d\n", size); 211 nvif_ioctl(parent, "create channel gpfifo size %d\n", size);
212 if (nvif_unpack(args->v0, 0, 0, false)) { 212 if (nvif_unpack(args->v0, 0, 0, false)) {
213 nvif_ioctl(parent, "create channel gpfifo vers %d pushbuf %08x " 213 nvif_ioctl(parent, "create channel gpfifo vers %d pushbuf %llx "
214 "ioffset %016llx ilength %08x\n", 214 "ioffset %016llx ilength %08x\n",
215 args->v0.version, args->v0.pushbuf, args->v0.ioffset, 215 args->v0.version, args->v0.pushbuf, args->v0.ioffset,
216 args->v0.ilength); 216 args->v0.ilength);
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
index 9a1ecef24813..9c423514fee7 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c
@@ -251,7 +251,7 @@ gk104_fifo_chan_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
251 251
252 nvif_ioctl(parent, "create channel gpfifo size %d\n", size); 252 nvif_ioctl(parent, "create channel gpfifo size %d\n", size);
253 if (nvif_unpack(args->v0, 0, 0, false)) { 253 if (nvif_unpack(args->v0, 0, 0, false)) {
254 nvif_ioctl(parent, "create channel gpfifo vers %d pushbuf %08x " 254 nvif_ioctl(parent, "create channel gpfifo vers %d pushbuf %llx "
255 "ioffset %016llx ilength %08x engine %08x\n", 255 "ioffset %016llx ilength %08x engine %08x\n",
256 args->v0.version, args->v0.pushbuf, args->v0.ioffset, 256 args->v0.version, args->v0.pushbuf, args->v0.ioffset,
257 args->v0.ilength, args->v0.engine); 257 args->v0.ilength, args->v0.engine);
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
index d5346636b7e3..6458fa0dcb95 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
@@ -120,7 +120,7 @@ nv04_fifo_chan_ctor(struct nvkm_object *parent,
120 120
121 nvif_ioctl(parent, "create channel dma size %d\n", size); 121 nvif_ioctl(parent, "create channel dma size %d\n", size);
122 if (nvif_unpack(args->v0, 0, 0, false)) { 122 if (nvif_unpack(args->v0, 0, 0, false)) {
123 nvif_ioctl(parent, "create channel dma vers %d pushbuf %08x " 123 nvif_ioctl(parent, "create channel dma vers %d pushbuf %llx "
124 "offset %016llx\n", args->v0.version, 124 "offset %016llx\n", args->v0.version,
125 args->v0.pushbuf, args->v0.offset); 125 args->v0.pushbuf, args->v0.offset);
126 } else 126 } else
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv10.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv10.c
index 5a7b11f92684..c4b5a3002e3c 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv10.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv10.c
@@ -64,7 +64,7 @@ nv10_fifo_chan_ctor(struct nvkm_object *parent,
64 64
65 nvif_ioctl(parent, "create channel dma size %d\n", size); 65 nvif_ioctl(parent, "create channel dma size %d\n", size);
66 if (nvif_unpack(args->v0, 0, 0, false)) { 66 if (nvif_unpack(args->v0, 0, 0, false)) {
67 nvif_ioctl(parent, "create channel dma vers %d pushbuf %08x " 67 nvif_ioctl(parent, "create channel dma vers %d pushbuf %llx "
68 "offset %016llx\n", args->v0.version, 68 "offset %016llx\n", args->v0.version,
69 args->v0.pushbuf, args->v0.offset); 69 args->v0.pushbuf, args->v0.offset);
70 } else 70 } else
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c
index 537bb7229e3d..ece2715e77ff 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv17.c
@@ -69,7 +69,7 @@ nv17_fifo_chan_ctor(struct nvkm_object *parent,
69 69
70 nvif_ioctl(parent, "create channel dma size %d\n", size); 70 nvif_ioctl(parent, "create channel dma size %d\n", size);
71 if (nvif_unpack(args->v0, 0, 0, false)) { 71 if (nvif_unpack(args->v0, 0, 0, false)) {
72 nvif_ioctl(parent, "create channel dma vers %d pushbuf %08x " 72 nvif_ioctl(parent, "create channel dma vers %d pushbuf %llx "
73 "offset %016llx\n", args->v0.version, 73 "offset %016llx\n", args->v0.version,
74 args->v0.pushbuf, args->v0.offset); 74 args->v0.pushbuf, args->v0.offset);
75 } else 75 } else
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c
index 27f07d1db85f..a42218a961d4 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv40.c
@@ -192,7 +192,7 @@ nv40_fifo_chan_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
192 192
193 nvif_ioctl(parent, "create channel dma size %d\n", size); 193 nvif_ioctl(parent, "create channel dma size %d\n", size);
194 if (nvif_unpack(args->v0, 0, 0, false)) { 194 if (nvif_unpack(args->v0, 0, 0, false)) {
195 nvif_ioctl(parent, "create channel dma vers %d pushbuf %08x " 195 nvif_ioctl(parent, "create channel dma vers %d pushbuf %llx "
196 "offset %016llx\n", args->v0.version, 196 "offset %016llx\n", args->v0.version,
197 args->v0.pushbuf, args->v0.offset); 197 args->v0.pushbuf, args->v0.offset);
198 } else 198 } else
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
index 24154778c01e..1a7ca8e5aecb 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv50.c
@@ -212,7 +212,7 @@ nv50_fifo_chan_ctor_dma(struct nvkm_object *parent, struct nvkm_object *engine,
212 212
213 nvif_ioctl(parent, "create channel dma size %d\n", size); 213 nvif_ioctl(parent, "create channel dma size %d\n", size);
214 if (nvif_unpack(args->v0, 0, 0, false)) { 214 if (nvif_unpack(args->v0, 0, 0, false)) {
215 nvif_ioctl(parent, "create channel dma vers %d pushbuf %08x " 215 nvif_ioctl(parent, "create channel dma vers %d pushbuf %llx "
216 "offset %016llx\n", args->v0.version, 216 "offset %016llx\n", args->v0.version,
217 args->v0.pushbuf, args->v0.offset); 217 args->v0.pushbuf, args->v0.offset);
218 } else 218 } else
@@ -276,7 +276,7 @@ nv50_fifo_chan_ctor_ind(struct nvkm_object *parent, struct nvkm_object *engine,
276 276
277 nvif_ioctl(parent, "create channel gpfifo size %d\n", size); 277 nvif_ioctl(parent, "create channel gpfifo size %d\n", size);
278 if (nvif_unpack(args->v0, 0, 0, false)) { 278 if (nvif_unpack(args->v0, 0, 0, false)) {
279 nvif_ioctl(parent, "create channel gpfifo vers %d pushbuf %08x " 279 nvif_ioctl(parent, "create channel gpfifo vers %d pushbuf %llx "
280 "ioffset %016llx ilength %08x\n", 280 "ioffset %016llx ilength %08x\n",
281 args->v0.version, args->v0.pushbuf, args->v0.ioffset, 281 args->v0.version, args->v0.pushbuf, args->v0.ioffset,
282 args->v0.ilength); 282 args->v0.ilength);