diff options
Diffstat (limited to 'drivers/cpufreq/intel_pstate.c')
-rw-r--r-- | drivers/cpufreq/intel_pstate.c | 255 |
1 files changed, 207 insertions, 48 deletions
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c index eb3fdc755000..5f1cbae36961 100644 --- a/drivers/cpufreq/intel_pstate.c +++ b/drivers/cpufreq/intel_pstate.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/types.h> | 25 | #include <linux/types.h> |
26 | #include <linux/fs.h> | 26 | #include <linux/fs.h> |
27 | #include <linux/debugfs.h> | 27 | #include <linux/debugfs.h> |
28 | #include <linux/acpi.h> | ||
28 | #include <trace/events/power.h> | 29 | #include <trace/events/power.h> |
29 | 30 | ||
30 | #include <asm/div64.h> | 31 | #include <asm/div64.h> |
@@ -33,6 +34,8 @@ | |||
33 | 34 | ||
34 | #define SAMPLE_COUNT 3 | 35 | #define SAMPLE_COUNT 3 |
35 | 36 | ||
37 | #define BYT_RATIOS 0x66a | ||
38 | |||
36 | #define FRAC_BITS 8 | 39 | #define FRAC_BITS 8 |
37 | #define int_tofp(X) ((int64_t)(X) << FRAC_BITS) | 40 | #define int_tofp(X) ((int64_t)(X) << FRAC_BITS) |
38 | #define fp_toint(X) ((X) >> FRAC_BITS) | 41 | #define fp_toint(X) ((X) >> FRAC_BITS) |
@@ -78,7 +81,6 @@ struct cpudata { | |||
78 | 81 | ||
79 | struct timer_list timer; | 82 | struct timer_list timer; |
80 | 83 | ||
81 | struct pstate_adjust_policy *pstate_policy; | ||
82 | struct pstate_data pstate; | 84 | struct pstate_data pstate; |
83 | struct _pid pid; | 85 | struct _pid pid; |
84 | 86 | ||
@@ -100,15 +102,21 @@ struct pstate_adjust_policy { | |||
100 | int i_gain_pct; | 102 | int i_gain_pct; |
101 | }; | 103 | }; |
102 | 104 | ||
103 | static struct pstate_adjust_policy default_policy = { | 105 | struct pstate_funcs { |
104 | .sample_rate_ms = 10, | 106 | int (*get_max)(void); |
105 | .deadband = 0, | 107 | int (*get_min)(void); |
106 | .setpoint = 97, | 108 | int (*get_turbo)(void); |
107 | .p_gain_pct = 20, | 109 | void (*set)(int pstate); |
108 | .d_gain_pct = 0, | 110 | }; |
109 | .i_gain_pct = 0, | 111 | |
112 | struct cpu_defaults { | ||
113 | struct pstate_adjust_policy pid_policy; | ||
114 | struct pstate_funcs funcs; | ||
110 | }; | 115 | }; |
111 | 116 | ||
117 | static struct pstate_adjust_policy pid_params; | ||
118 | static struct pstate_funcs pstate_funcs; | ||
119 | |||
112 | struct perf_limits { | 120 | struct perf_limits { |
113 | int no_turbo; | 121 | int no_turbo; |
114 | int max_perf_pct; | 122 | int max_perf_pct; |
@@ -185,14 +193,14 @@ static signed int pid_calc(struct _pid *pid, int32_t busy) | |||
185 | 193 | ||
186 | static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu) | 194 | static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu) |
187 | { | 195 | { |
188 | pid_p_gain_set(&cpu->pid, cpu->pstate_policy->p_gain_pct); | 196 | pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct); |
189 | pid_d_gain_set(&cpu->pid, cpu->pstate_policy->d_gain_pct); | 197 | pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct); |
190 | pid_i_gain_set(&cpu->pid, cpu->pstate_policy->i_gain_pct); | 198 | pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct); |
191 | 199 | ||
192 | pid_reset(&cpu->pid, | 200 | pid_reset(&cpu->pid, |
193 | cpu->pstate_policy->setpoint, | 201 | pid_params.setpoint, |
194 | 100, | 202 | 100, |
195 | cpu->pstate_policy->deadband, | 203 | pid_params.deadband, |
196 | 0); | 204 | 0); |
197 | } | 205 | } |
198 | 206 | ||
@@ -226,12 +234,12 @@ struct pid_param { | |||
226 | }; | 234 | }; |
227 | 235 | ||
228 | static struct pid_param pid_files[] = { | 236 | static struct pid_param pid_files[] = { |
229 | {"sample_rate_ms", &default_policy.sample_rate_ms}, | 237 | {"sample_rate_ms", &pid_params.sample_rate_ms}, |
230 | {"d_gain_pct", &default_policy.d_gain_pct}, | 238 | {"d_gain_pct", &pid_params.d_gain_pct}, |
231 | {"i_gain_pct", &default_policy.i_gain_pct}, | 239 | {"i_gain_pct", &pid_params.i_gain_pct}, |
232 | {"deadband", &default_policy.deadband}, | 240 | {"deadband", &pid_params.deadband}, |
233 | {"setpoint", &default_policy.setpoint}, | 241 | {"setpoint", &pid_params.setpoint}, |
234 | {"p_gain_pct", &default_policy.p_gain_pct}, | 242 | {"p_gain_pct", &pid_params.p_gain_pct}, |
235 | {NULL, NULL} | 243 | {NULL, NULL} |
236 | }; | 244 | }; |
237 | 245 | ||
@@ -336,33 +344,92 @@ static void intel_pstate_sysfs_expose_params(void) | |||
336 | } | 344 | } |
337 | 345 | ||
338 | /************************** sysfs end ************************/ | 346 | /************************** sysfs end ************************/ |
347 | static int byt_get_min_pstate(void) | ||
348 | { | ||
349 | u64 value; | ||
350 | rdmsrl(BYT_RATIOS, value); | ||
351 | return value & 0xFF; | ||
352 | } | ||
339 | 353 | ||
340 | static int intel_pstate_min_pstate(void) | 354 | static int byt_get_max_pstate(void) |
355 | { | ||
356 | u64 value; | ||
357 | rdmsrl(BYT_RATIOS, value); | ||
358 | return (value >> 16) & 0xFF; | ||
359 | } | ||
360 | |||
361 | static int core_get_min_pstate(void) | ||
341 | { | 362 | { |
342 | u64 value; | 363 | u64 value; |
343 | rdmsrl(MSR_PLATFORM_INFO, value); | 364 | rdmsrl(MSR_PLATFORM_INFO, value); |
344 | return (value >> 40) & 0xFF; | 365 | return (value >> 40) & 0xFF; |
345 | } | 366 | } |
346 | 367 | ||
347 | static int intel_pstate_max_pstate(void) | 368 | static int core_get_max_pstate(void) |
348 | { | 369 | { |
349 | u64 value; | 370 | u64 value; |
350 | rdmsrl(MSR_PLATFORM_INFO, value); | 371 | rdmsrl(MSR_PLATFORM_INFO, value); |
351 | return (value >> 8) & 0xFF; | 372 | return (value >> 8) & 0xFF; |
352 | } | 373 | } |
353 | 374 | ||
354 | static int intel_pstate_turbo_pstate(void) | 375 | static int core_get_turbo_pstate(void) |
355 | { | 376 | { |
356 | u64 value; | 377 | u64 value; |
357 | int nont, ret; | 378 | int nont, ret; |
358 | rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value); | 379 | rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value); |
359 | nont = intel_pstate_max_pstate(); | 380 | nont = core_get_max_pstate(); |
360 | ret = ((value) & 255); | 381 | ret = ((value) & 255); |
361 | if (ret <= nont) | 382 | if (ret <= nont) |
362 | ret = nont; | 383 | ret = nont; |
363 | return ret; | 384 | return ret; |
364 | } | 385 | } |
365 | 386 | ||
387 | static void core_set_pstate(int pstate) | ||
388 | { | ||
389 | u64 val; | ||
390 | |||
391 | val = pstate << 8; | ||
392 | if (limits.no_turbo) | ||
393 | val |= (u64)1 << 32; | ||
394 | |||
395 | wrmsrl(MSR_IA32_PERF_CTL, val); | ||
396 | } | ||
397 | |||
398 | static struct cpu_defaults core_params = { | ||
399 | .pid_policy = { | ||
400 | .sample_rate_ms = 10, | ||
401 | .deadband = 0, | ||
402 | .setpoint = 97, | ||
403 | .p_gain_pct = 20, | ||
404 | .d_gain_pct = 0, | ||
405 | .i_gain_pct = 0, | ||
406 | }, | ||
407 | .funcs = { | ||
408 | .get_max = core_get_max_pstate, | ||
409 | .get_min = core_get_min_pstate, | ||
410 | .get_turbo = core_get_turbo_pstate, | ||
411 | .set = core_set_pstate, | ||
412 | }, | ||
413 | }; | ||
414 | |||
415 | static struct cpu_defaults byt_params = { | ||
416 | .pid_policy = { | ||
417 | .sample_rate_ms = 10, | ||
418 | .deadband = 0, | ||
419 | .setpoint = 97, | ||
420 | .p_gain_pct = 14, | ||
421 | .d_gain_pct = 0, | ||
422 | .i_gain_pct = 4, | ||
423 | }, | ||
424 | .funcs = { | ||
425 | .get_max = byt_get_max_pstate, | ||
426 | .get_min = byt_get_min_pstate, | ||
427 | .get_turbo = byt_get_max_pstate, | ||
428 | .set = core_set_pstate, | ||
429 | }, | ||
430 | }; | ||
431 | |||
432 | |||
366 | static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max) | 433 | static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max) |
367 | { | 434 | { |
368 | int max_perf = cpu->pstate.turbo_pstate; | 435 | int max_perf = cpu->pstate.turbo_pstate; |
@@ -383,7 +450,6 @@ static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max) | |||
383 | static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate) | 450 | static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate) |
384 | { | 451 | { |
385 | int max_perf, min_perf; | 452 | int max_perf, min_perf; |
386 | u64 val; | ||
387 | 453 | ||
388 | intel_pstate_get_min_max(cpu, &min_perf, &max_perf); | 454 | intel_pstate_get_min_max(cpu, &min_perf, &max_perf); |
389 | 455 | ||
@@ -395,11 +461,8 @@ static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate) | |||
395 | trace_cpu_frequency(pstate * 100000, cpu->cpu); | 461 | trace_cpu_frequency(pstate * 100000, cpu->cpu); |
396 | 462 | ||
397 | cpu->pstate.current_pstate = pstate; | 463 | cpu->pstate.current_pstate = pstate; |
398 | val = pstate << 8; | ||
399 | if (limits.no_turbo) | ||
400 | val |= (u64)1 << 32; | ||
401 | 464 | ||
402 | wrmsrl(MSR_IA32_PERF_CTL, val); | 465 | pstate_funcs.set(pstate); |
403 | } | 466 | } |
404 | 467 | ||
405 | static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps) | 468 | static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps) |
@@ -421,9 +484,9 @@ static void intel_pstate_get_cpu_pstates(struct cpudata *cpu) | |||
421 | { | 484 | { |
422 | sprintf(cpu->name, "Intel 2nd generation core"); | 485 | sprintf(cpu->name, "Intel 2nd generation core"); |
423 | 486 | ||
424 | cpu->pstate.min_pstate = intel_pstate_min_pstate(); | 487 | cpu->pstate.min_pstate = pstate_funcs.get_min(); |
425 | cpu->pstate.max_pstate = intel_pstate_max_pstate(); | 488 | cpu->pstate.max_pstate = pstate_funcs.get_max(); |
426 | cpu->pstate.turbo_pstate = intel_pstate_turbo_pstate(); | 489 | cpu->pstate.turbo_pstate = pstate_funcs.get_turbo(); |
427 | 490 | ||
428 | /* | 491 | /* |
429 | * goto max pstate so we don't slow up boot if we are built-in if we are | 492 | * goto max pstate so we don't slow up boot if we are built-in if we are |
@@ -465,7 +528,7 @@ static inline void intel_pstate_set_sample_time(struct cpudata *cpu) | |||
465 | { | 528 | { |
466 | int sample_time, delay; | 529 | int sample_time, delay; |
467 | 530 | ||
468 | sample_time = cpu->pstate_policy->sample_rate_ms; | 531 | sample_time = pid_params.sample_rate_ms; |
469 | delay = msecs_to_jiffies(sample_time); | 532 | delay = msecs_to_jiffies(sample_time); |
470 | mod_timer_pinned(&cpu->timer, jiffies + delay); | 533 | mod_timer_pinned(&cpu->timer, jiffies + delay); |
471 | } | 534 | } |
@@ -521,14 +584,15 @@ static void intel_pstate_timer_func(unsigned long __data) | |||
521 | { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&policy } | 584 | { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)&policy } |
522 | 585 | ||
523 | static const struct x86_cpu_id intel_pstate_cpu_ids[] = { | 586 | static const struct x86_cpu_id intel_pstate_cpu_ids[] = { |
524 | ICPU(0x2a, default_policy), | 587 | ICPU(0x2a, core_params), |
525 | ICPU(0x2d, default_policy), | 588 | ICPU(0x2d, core_params), |
526 | ICPU(0x3a, default_policy), | 589 | ICPU(0x37, byt_params), |
527 | ICPU(0x3c, default_policy), | 590 | ICPU(0x3a, core_params), |
528 | ICPU(0x3e, default_policy), | 591 | ICPU(0x3c, core_params), |
529 | ICPU(0x3f, default_policy), | 592 | ICPU(0x3e, core_params), |
530 | ICPU(0x45, default_policy), | 593 | ICPU(0x3f, core_params), |
531 | ICPU(0x46, default_policy), | 594 | ICPU(0x45, core_params), |
595 | ICPU(0x46, core_params), | ||
532 | {} | 596 | {} |
533 | }; | 597 | }; |
534 | MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids); | 598 | MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids); |
@@ -552,8 +616,7 @@ static int intel_pstate_init_cpu(unsigned int cpunum) | |||
552 | intel_pstate_get_cpu_pstates(cpu); | 616 | intel_pstate_get_cpu_pstates(cpu); |
553 | 617 | ||
554 | cpu->cpu = cpunum; | 618 | cpu->cpu = cpunum; |
555 | cpu->pstate_policy = | 619 | |
556 | (struct pstate_adjust_policy *)id->driver_data; | ||
557 | init_timer_deferrable(&cpu->timer); | 620 | init_timer_deferrable(&cpu->timer); |
558 | cpu->timer.function = intel_pstate_timer_func; | 621 | cpu->timer.function = intel_pstate_timer_func; |
559 | cpu->timer.data = | 622 | cpu->timer.data = |
@@ -613,9 +676,7 @@ static int intel_pstate_set_policy(struct cpufreq_policy *policy) | |||
613 | 676 | ||
614 | static int intel_pstate_verify_policy(struct cpufreq_policy *policy) | 677 | static int intel_pstate_verify_policy(struct cpufreq_policy *policy) |
615 | { | 678 | { |
616 | cpufreq_verify_within_limits(policy, | 679 | cpufreq_verify_within_cpu_limits(policy); |
617 | policy->cpuinfo.min_freq, | ||
618 | policy->cpuinfo.max_freq); | ||
619 | 680 | ||
620 | if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) && | 681 | if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) && |
621 | (policy->policy != CPUFREQ_POLICY_PERFORMANCE)) | 682 | (policy->policy != CPUFREQ_POLICY_PERFORMANCE)) |
@@ -683,9 +744,9 @@ static int intel_pstate_msrs_not_valid(void) | |||
683 | rdmsrl(MSR_IA32_APERF, aperf); | 744 | rdmsrl(MSR_IA32_APERF, aperf); |
684 | rdmsrl(MSR_IA32_MPERF, mperf); | 745 | rdmsrl(MSR_IA32_MPERF, mperf); |
685 | 746 | ||
686 | if (!intel_pstate_min_pstate() || | 747 | if (!pstate_funcs.get_max() || |
687 | !intel_pstate_max_pstate() || | 748 | !pstate_funcs.get_min() || |
688 | !intel_pstate_turbo_pstate()) | 749 | !pstate_funcs.get_turbo()) |
689 | return -ENODEV; | 750 | return -ENODEV; |
690 | 751 | ||
691 | rdmsrl(MSR_IA32_APERF, tmp); | 752 | rdmsrl(MSR_IA32_APERF, tmp); |
@@ -698,10 +759,96 @@ static int intel_pstate_msrs_not_valid(void) | |||
698 | 759 | ||
699 | return 0; | 760 | return 0; |
700 | } | 761 | } |
762 | |||
763 | static void copy_pid_params(struct pstate_adjust_policy *policy) | ||
764 | { | ||
765 | pid_params.sample_rate_ms = policy->sample_rate_ms; | ||
766 | pid_params.p_gain_pct = policy->p_gain_pct; | ||
767 | pid_params.i_gain_pct = policy->i_gain_pct; | ||
768 | pid_params.d_gain_pct = policy->d_gain_pct; | ||
769 | pid_params.deadband = policy->deadband; | ||
770 | pid_params.setpoint = policy->setpoint; | ||
771 | } | ||
772 | |||
773 | static void copy_cpu_funcs(struct pstate_funcs *funcs) | ||
774 | { | ||
775 | pstate_funcs.get_max = funcs->get_max; | ||
776 | pstate_funcs.get_min = funcs->get_min; | ||
777 | pstate_funcs.get_turbo = funcs->get_turbo; | ||
778 | pstate_funcs.set = funcs->set; | ||
779 | } | ||
780 | |||
781 | #if IS_ENABLED(CONFIG_ACPI) | ||
782 | #include <acpi/processor.h> | ||
783 | |||
784 | static bool intel_pstate_no_acpi_pss(void) | ||
785 | { | ||
786 | int i; | ||
787 | |||
788 | for_each_possible_cpu(i) { | ||
789 | acpi_status status; | ||
790 | union acpi_object *pss; | ||
791 | struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; | ||
792 | struct acpi_processor *pr = per_cpu(processors, i); | ||
793 | |||
794 | if (!pr) | ||
795 | continue; | ||
796 | |||
797 | status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer); | ||
798 | if (ACPI_FAILURE(status)) | ||
799 | continue; | ||
800 | |||
801 | pss = buffer.pointer; | ||
802 | if (pss && pss->type == ACPI_TYPE_PACKAGE) { | ||
803 | kfree(pss); | ||
804 | return false; | ||
805 | } | ||
806 | |||
807 | kfree(pss); | ||
808 | } | ||
809 | |||
810 | return true; | ||
811 | } | ||
812 | |||
813 | struct hw_vendor_info { | ||
814 | u16 valid; | ||
815 | char oem_id[ACPI_OEM_ID_SIZE]; | ||
816 | char oem_table_id[ACPI_OEM_TABLE_ID_SIZE]; | ||
817 | }; | ||
818 | |||
819 | /* Hardware vendor-specific info that has its own power management modes */ | ||
820 | static struct hw_vendor_info vendor_info[] = { | ||
821 | {1, "HP ", "ProLiant"}, | ||
822 | {0, "", ""}, | ||
823 | }; | ||
824 | |||
825 | static bool intel_pstate_platform_pwr_mgmt_exists(void) | ||
826 | { | ||
827 | struct acpi_table_header hdr; | ||
828 | struct hw_vendor_info *v_info; | ||
829 | |||
830 | if (acpi_disabled | ||
831 | || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr))) | ||
832 | return false; | ||
833 | |||
834 | for (v_info = vendor_info; v_info->valid; v_info++) { | ||
835 | if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE) | ||
836 | && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE) | ||
837 | && intel_pstate_no_acpi_pss()) | ||
838 | return true; | ||
839 | } | ||
840 | |||
841 | return false; | ||
842 | } | ||
843 | #else /* CONFIG_ACPI not enabled */ | ||
844 | static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; } | ||
845 | #endif /* CONFIG_ACPI */ | ||
846 | |||
701 | static int __init intel_pstate_init(void) | 847 | static int __init intel_pstate_init(void) |
702 | { | 848 | { |
703 | int cpu, rc = 0; | 849 | int cpu, rc = 0; |
704 | const struct x86_cpu_id *id; | 850 | const struct x86_cpu_id *id; |
851 | struct cpu_defaults *cpu_info; | ||
705 | 852 | ||
706 | if (no_load) | 853 | if (no_load) |
707 | return -ENODEV; | 854 | return -ENODEV; |
@@ -710,6 +857,18 @@ static int __init intel_pstate_init(void) | |||
710 | if (!id) | 857 | if (!id) |
711 | return -ENODEV; | 858 | return -ENODEV; |
712 | 859 | ||
860 | /* | ||
861 | * The Intel pstate driver will be ignored if the platform | ||
862 | * firmware has its own power management modes. | ||
863 | */ | ||
864 | if (intel_pstate_platform_pwr_mgmt_exists()) | ||
865 | return -ENODEV; | ||
866 | |||
867 | cpu_info = (struct cpu_defaults *)id->driver_data; | ||
868 | |||
869 | copy_pid_params(&cpu_info->pid_policy); | ||
870 | copy_cpu_funcs(&cpu_info->funcs); | ||
871 | |||
713 | if (intel_pstate_msrs_not_valid()) | 872 | if (intel_pstate_msrs_not_valid()) |
714 | return -ENODEV; | 873 | return -ENODEV; |
715 | 874 | ||