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-rw-r--r--arch/alpha/Kconfig2
-rw-r--r--arch/alpha/include/asm/atomic.h4
-rw-r--r--arch/alpha/include/asm/fpu.h2
-rw-r--r--arch/alpha/include/asm/ptrace.h5
-rw-r--r--arch/alpha/include/asm/socket.h2
-rw-r--r--arch/alpha/include/asm/uaccess.h34
-rw-r--r--arch/alpha/include/asm/unistd.h4
-rw-r--r--arch/alpha/include/asm/word-at-a-time.h55
-rw-r--r--arch/alpha/kernel/alpha_ksyms.c3
-rw-r--r--arch/alpha/kernel/entry.S161
-rw-r--r--arch/alpha/kernel/osf_sys.c49
-rw-r--r--arch/alpha/kernel/process.c19
-rw-r--r--arch/alpha/kernel/systbls.S4
-rw-r--r--arch/alpha/lib/Makefile2
-rw-r--r--arch/alpha/lib/ev6-strncpy_from_user.S424
-rw-r--r--arch/alpha/lib/ev67-strlen_user.S107
-rw-r--r--arch/alpha/lib/strlen_user.S91
-rw-r--r--arch/alpha/lib/strncpy_from_user.S339
-rw-r--r--arch/alpha/mm/fault.c36
-rw-r--r--arch/alpha/oprofile/common.c1
-rw-r--r--arch/arm/Kconfig7
-rw-r--r--arch/arm/boot/dts/armada-xp.dtsi2
-rw-r--r--arch/arm/boot/dts/imx23.dtsi52
-rw-r--r--arch/arm/boot/dts/imx27-3ds.dts2
-rw-r--r--arch/arm/boot/dts/imx27.dtsi6
-rw-r--r--arch/arm/boot/dts/imx28.dtsi74
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts2
-rw-r--r--arch/arm/boot/dts/imx51.dtsi4
-rw-r--r--arch/arm/boot/dts/imx53-ard.dts22
-rw-r--r--arch/arm/boot/dts/imx53.dtsi7
-rw-r--r--arch/arm/boot/dts/imx6q-sabrelite.dts1
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi7
-rw-r--r--arch/arm/boot/dts/kirkwood-dns320.dts62
-rw-r--r--arch/arm/boot/dts/kirkwood-dns325.dts68
-rw-r--r--arch/arm/boot/dts/kirkwood-dnskw.dtsi69
-rw-r--r--arch/arm/boot/dts/kirkwood-dreamplug.dts50
-rw-r--r--arch/arm/boot/dts/kirkwood-goflexnet.dts99
-rw-r--r--arch/arm/boot/dts/kirkwood-ib62x0.dts38
-rw-r--r--arch/arm/boot/dts/kirkwood-iconnect.dts42
-rw-r--r--arch/arm/boot/dts/kirkwood-lschlv2.dts20
-rw-r--r--arch/arm/boot/dts/kirkwood-lsxhl.dts20
-rw-r--r--arch/arm/boot/dts/kirkwood-lsxl.dtsi95
-rw-r--r--arch/arm/boot/dts/kirkwood-ts219-6281.dts21
-rw-r--r--arch/arm/boot/dts/kirkwood-ts219-6282.dts21
-rw-r--r--arch/arm/boot/dts/kirkwood-ts219.dtsi78
-rw-r--r--arch/arm/boot/dts/kirkwood.dtsi60
-rw-r--r--arch/arm/configs/imx_v6_v7_defconfig1
-rw-r--r--arch/arm/configs/mxs_defconfig1
-rw-r--r--arch/arm/configs/omap2plus_defconfig2
-rw-r--r--arch/arm/configs/tct_hammer_defconfig2
-rw-r--r--arch/arm/include/asm/cacheflush.h8
-rw-r--r--arch/arm/include/asm/mutex.h119
-rw-r--r--arch/arm/include/asm/pgtable.h40
-rw-r--r--arch/arm/include/asm/sched_clock.h2
-rw-r--r--arch/arm/include/asm/setup.h4
-rw-r--r--arch/arm/kernel/entry-armv.S111
-rw-r--r--arch/arm/kernel/entry-common.S24
-rw-r--r--arch/arm/kernel/ftrace.c17
-rw-r--r--arch/arm/kernel/process.c2
-rw-r--r--arch/arm/kernel/ptrace.c1
-rw-r--r--arch/arm/kernel/sched_clock.c24
-rw-r--r--arch/arm/kernel/setup.c6
-rw-r--r--arch/arm/kernel/signal.c114
-rw-r--r--arch/arm/kernel/signal.h2
-rw-r--r--arch/arm/kernel/smp.c3
-rw-r--r--arch/arm/kernel/topology.c2
-rw-r--r--arch/arm/kernel/traps.c10
-rw-r--r--arch/arm/lib/Makefile23
-rw-r--r--arch/arm/lib/io-readsw-armv3.S106
-rw-r--r--arch/arm/lib/io-writesw-armv3.S126
-rw-r--r--arch/arm/lib/uaccess.S564
-rw-r--r--arch/arm/mach-davinci/board-neuros-osd2.c39
-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c1
-rw-r--r--arch/arm/mach-dove/irq.c58
-rw-r--r--arch/arm/mach-exynos/pm_domains.c2
-rw-r--r--arch/arm/mach-imx/clk-imx27.c8
-rw-r--r--arch/arm/mach-imx/clk-imx31.c2
-rw-r--r--arch/arm/mach-imx/clk-imx51-imx53.c1
-rw-r--r--arch/arm/mach-integrator/core.c1
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c2
-rw-r--r--arch/arm/mach-kirkwood/Kconfig29
-rw-r--r--arch/arm/mach-kirkwood/Makefile3
-rw-r--r--arch/arm/mach-kirkwood/Makefile.boot4
-rw-r--r--arch/arm/mach-kirkwood/board-dnskw.c143
-rw-r--r--arch/arm/mach-kirkwood/board-dreamplug.c80
-rw-r--r--arch/arm/mach-kirkwood/board-dt.c29
-rw-r--r--arch/arm/mach-kirkwood/board-goflexnet.c71
-rw-r--r--arch/arm/mach-kirkwood/board-ib62x0.c72
-rw-r--r--arch/arm/mach-kirkwood/board-iconnect.c56
-rw-r--r--arch/arm/mach-kirkwood/board-lsxl.c135
-rw-r--r--arch/arm/mach-kirkwood/board-ts219.c82
-rw-r--r--arch/arm/mach-kirkwood/common.c2
-rw-r--r--arch/arm/mach-kirkwood/common.h17
-rw-r--r--arch/arm/mach-kirkwood/irq.c38
-rw-r--r--arch/arm/mach-mmp/gplugd.c1
-rw-r--r--arch/arm/mach-mv78xx0/irq.c22
-rw-r--r--arch/arm/mach-mxs/Kconfig6
-rw-r--r--arch/arm/mach-mxs/Makefile3
-rw-r--r--arch/arm/mach-omap1/board-h2-mmc.c1
-rw-r--r--arch/arm/mach-omap1/board-h3-mmc.c1
-rw-r--r--arch/arm/mach-omap1/board-nokia770.c1
-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c1
-rw-r--r--arch/arm/mach-omap2/cpuidle44xx.c145
-rw-r--r--arch/arm/mach-omap2/display.c25
-rw-r--r--arch/arm/mach-omap2/hsmmc.c1
-rw-r--r--arch/arm/mach-omap2/timer.c4
-rw-r--r--arch/arm/mach-orion5x/irq.c22
-rw-r--r--arch/arm/mach-prima2/timer.c6
-rw-r--r--arch/arm/mach-pxa/raumfeld.c2
-rw-r--r--arch/arm/mach-s3c24xx/Kconfig4
-rw-r--r--arch/arm/mach-sa1100/leds-hackkit.c1
-rw-r--r--arch/arm/mach-spear3xx/spear300.c26
-rw-r--r--arch/arm/mach-spear3xx/spear310.c26
-rw-r--r--arch/arm/mach-spear3xx/spear320.c26
-rw-r--r--arch/arm/mach-spear3xx/spear3xx.c3
-rw-r--r--arch/arm/mach-spear6xx/spear6xx.c51
-rw-r--r--arch/arm/mach-tegra/board-harmony-power.c32
-rw-r--r--arch/arm/mm/dma-mapping.c12
-rw-r--r--arch/arm/mm/flush.c2
-rw-r--r--arch/arm/mm/tlb-v7.S12
-rw-r--r--arch/arm/plat-mxc/tzic.c1
-rw-r--r--arch/arm/plat-omap/include/plat/mmc.h2
-rw-r--r--arch/arm/plat-orion/common.c1
-rw-r--r--arch/arm/plat-orion/gpio.c166
-rw-r--r--arch/arm/plat-orion/include/plat/gpio.h16
-rw-r--r--arch/arm/plat-orion/include/plat/irq.h3
-rw-r--r--arch/arm/plat-orion/irq.c40
-rw-r--r--arch/arm/plat-samsung/Kconfig3
-rw-r--r--arch/arm/plat-spear/include/plat/pl080.h6
-rw-r--r--arch/arm/plat-spear/pl080.c10
-rw-r--r--arch/arm/vfp/entry.S16
-rw-r--r--arch/arm/vfp/vfphw.S19
-rw-r--r--arch/arm/vfp/vfpmodule.c10
-rw-r--r--arch/blackfin/kernel/setup.c1
-rw-r--r--arch/c6x/Kconfig1
-rw-r--r--arch/c6x/include/asm/cache.h16
-rw-r--r--arch/ia64/configs/generic_defconfig1
-rw-r--r--arch/ia64/configs/gensparse_defconfig1
-rw-r--r--arch/ia64/kernel/acpi.c5
-rw-r--r--arch/m68k/Kconfig13
-rw-r--r--arch/m68k/Kconfig.cpu19
-rw-r--r--arch/m68k/apollo/config.c16
-rw-r--r--arch/m68k/include/asm/Kbuild25
-rw-r--r--arch/m68k/include/asm/MC68332.h152
-rw-r--r--arch/m68k/include/asm/apollodma.h248
-rw-r--r--arch/m68k/include/asm/apollohw.h2
-rw-r--r--arch/m68k/include/asm/bitsperlong.h1
-rw-r--r--arch/m68k/include/asm/cputime.h6
-rw-r--r--arch/m68k/include/asm/delay.h2
-rw-r--r--arch/m68k/include/asm/device.h7
-rw-r--r--arch/m68k/include/asm/emergency-restart.h6
-rw-r--r--arch/m68k/include/asm/errno.h6
-rw-r--r--arch/m68k/include/asm/futex.h6
-rw-r--r--arch/m68k/include/asm/ioctl.h1
-rw-r--r--arch/m68k/include/asm/ipcbuf.h1
-rw-r--r--arch/m68k/include/asm/irq_regs.h1
-rw-r--r--arch/m68k/include/asm/kdebug.h1
-rw-r--r--arch/m68k/include/asm/kmap_types.h6
-rw-r--r--arch/m68k/include/asm/kvm_para.h1
-rw-r--r--arch/m68k/include/asm/local.h6
-rw-r--r--arch/m68k/include/asm/local64.h1
-rw-r--r--arch/m68k/include/asm/mac_mouse.h23
-rw-r--r--arch/m68k/include/asm/mcfmbus.h77
-rw-r--r--arch/m68k/include/asm/mman.h1
-rw-r--r--arch/m68k/include/asm/mutex.h9
-rw-r--r--arch/m68k/include/asm/percpu.h6
-rw-r--r--arch/m68k/include/asm/resource.h6
-rw-r--r--arch/m68k/include/asm/sbus.h45
-rw-r--r--arch/m68k/include/asm/scatterlist.h6
-rw-r--r--arch/m68k/include/asm/sections.h8
-rw-r--r--arch/m68k/include/asm/shm.h31
-rw-r--r--arch/m68k/include/asm/siginfo.h6
-rw-r--r--arch/m68k/include/asm/statfs.h6
-rw-r--r--arch/m68k/include/asm/topology.h6
-rw-r--r--arch/m68k/include/asm/types.h22
-rw-r--r--arch/m68k/include/asm/unaligned.h4
-rw-r--r--arch/m68k/include/asm/xor.h1
-rw-r--r--arch/m68k/kernel/setup_no.c11
-rw-r--r--arch/m68k/kernel/sys_m68k.c8
-rw-r--r--arch/m68k/kernel/vmlinux-nommu.lds2
-rw-r--r--arch/m68k/kernel/vmlinux-std.lds2
-rw-r--r--arch/m68k/kernel/vmlinux-sun3.lds2
-rw-r--r--arch/m68k/lib/muldi3.c2
-rw-r--r--arch/m68k/mm/init_mm.c2
-rw-r--r--arch/m68k/mm/init_no.c2
-rw-r--r--arch/m68k/platform/68328/head-de2.S8
-rw-r--r--arch/m68k/platform/68328/head-pilot.S10
-rw-r--r--arch/m68k/platform/68328/head-ram.S4
-rw-r--r--arch/m68k/platform/68328/head-rom.S6
-rw-r--r--arch/m68k/platform/68360/head-ram.S6
-rw-r--r--arch/m68k/platform/68360/head-rom.S8
-rw-r--r--arch/m68k/platform/coldfire/head.S10
-rw-r--r--arch/m68k/sun3/prom/init.c48
-rw-r--r--arch/microblaze/include/asm/sections.h4
-rw-r--r--arch/microblaze/kernel/microblaze_ksyms.c3
-rw-r--r--arch/microblaze/kernel/setup.c4
-rw-r--r--arch/microblaze/kernel/vmlinux.lds.S1
-rw-r--r--arch/mips/Kconfig2
-rw-r--r--arch/mips/include/asm/clock.h11
-rw-r--r--arch/mips/include/asm/mach-loongson/loongson.h1
-rw-r--r--arch/mips/kernel/cpufreq/Makefile2
-rw-r--r--arch/mips/kernel/cpufreq/loongson2_cpufreq.c21
-rw-r--r--arch/mips/lantiq/clk.c5
-rw-r--r--arch/mips/lantiq/prom.c22
-rw-r--r--arch/mips/lantiq/xway/sysctrl.c49
-rw-r--r--arch/mips/loongson/Kconfig1
-rw-r--r--arch/mips/loongson/lemote-2f/Makefile2
-rw-r--r--arch/mips/loongson/lemote-2f/clock.c (renamed from arch/mips/kernel/cpufreq/loongson2_clock.c)46
-rw-r--r--arch/mips/loongson1/Kconfig1
-rw-r--r--arch/mips/loongson1/common/clock.c16
-rw-r--r--arch/mips/txx9/Kconfig1
-rw-r--r--arch/powerpc/platforms/cell/spufs/inode.c77
-rw-r--r--arch/powerpc/platforms/cell/spufs/syscalls.c2
-rw-r--r--arch/s390/Kconfig1
-rw-r--r--arch/s390/include/asm/sparsemem.h2
-rw-r--r--arch/s390/include/asm/syscall.h10
-rw-r--r--arch/s390/kernel/compat_linux.c2
-rw-r--r--arch/s390/kernel/compat_wrapper.S4
-rw-r--r--arch/s390/kernel/ptrace.c7
-rw-r--r--arch/s390/kernel/sys_s390.c9
-rw-r--r--arch/sh/boards/Kconfig13
-rw-r--r--arch/sh/boards/board-apsh4a3a.c10
-rw-r--r--arch/sh/boards/board-apsh4ad0a.c10
-rw-r--r--arch/sh/boards/board-magicpanelr2.c10
-rw-r--r--arch/sh/boards/board-polaris.c10
-rw-r--r--arch/sh/boards/board-sh2007.c12
-rw-r--r--arch/sh/boards/board-sh7757lcr.c14
-rw-r--r--arch/sh/boards/mach-ap325rxa/setup.c21
-rw-r--r--arch/sh/boards/mach-ecovec24/setup.c125
-rw-r--r--arch/sh/boards/mach-kfr2r09/setup.c12
-rw-r--r--arch/sh/boards/mach-migor/setup.c13
-rw-r--r--arch/sh/boards/mach-rsk/setup.c10
-rw-r--r--arch/sh/boards/mach-sdk7786/setup.c10
-rw-r--r--arch/sh/boards/mach-se/7724/setup.c15
-rw-r--r--arch/sh/drivers/dma/dma-sh.c2
-rw-r--r--arch/sh/include/asm/sections.h1
-rw-r--r--arch/sh/include/cpu-sh2a/cpu/sh7269.h36
-rw-r--r--arch/sh/include/cpu-sh4/cpu/sh7757.h2
-rw-r--r--arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c195
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c4
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7722.c1
-rw-r--r--arch/sh/kernel/cpu/sh4a/setup-sh7757.c14
-rw-r--r--arch/sh/kernel/setup.c2
-rw-r--r--arch/sh/kernel/sh_ksyms_32.c1
-rw-r--r--arch/sh/kernel/vmlinux.lds.S1
-rw-r--r--arch/sh/lib/mcount.S8
-rw-r--r--arch/sh/mm/fault.c8
-rw-r--r--arch/sparc/kernel/sys_sparc_64.c10
-rw-r--r--arch/sparc/mm/init_64.c28
-rw-r--r--arch/um/defconfig2
-rw-r--r--arch/um/drivers/chan_kern.c4
-rw-r--r--arch/um/drivers/line.c218
-rw-r--r--arch/um/drivers/line.h12
-rw-r--r--arch/um/drivers/ssl.c42
-rw-r--r--arch/um/drivers/stdio_console.c21
-rw-r--r--arch/um/drivers/ubd_kern.c2
-rw-r--r--arch/um/include/asm/ptrace-generic.h2
-rw-r--r--arch/um/include/shared/as-layout.h3
-rw-r--r--arch/um/include/shared/irq_user.h3
-rw-r--r--arch/um/include/shared/kern_util.h13
-rw-r--r--arch/um/kernel/irq.c2
-rw-r--r--arch/um/kernel/process.c13
-rw-r--r--arch/um/kernel/ptrace.c71
-rw-r--r--arch/um/kernel/skas/syscall.c6
-rw-r--r--arch/um/kernel/time.c2
-rw-r--r--arch/um/kernel/trap.c39
-rw-r--r--arch/um/os-Linux/internal.h2
-rw-r--r--arch/um/os-Linux/signal.c26
-rw-r--r--arch/um/os-Linux/skas/process.c16
-rw-r--r--arch/um/os-Linux/time.c2
-rw-r--r--arch/x86/Kconfig2
-rw-r--r--arch/x86/Makefile4
-rw-r--r--arch/x86/boot/Makefile2
-rw-r--r--arch/x86/include/asm/mce.h8
-rw-r--r--arch/x86/include/asm/olpc.h19
-rw-r--r--arch/x86/include/asm/perf_event.h11
-rw-r--r--arch/x86/kernel/acpi/sleep.c4
-rw-r--r--arch/x86/kernel/acpi/sleep.h2
-rw-r--r--arch/x86/kernel/acpi/wakeup_32.S4
-rw-r--r--arch/x86/kernel/acpi/wakeup_64.S4
-rw-r--r--arch/x86/kernel/alternative.c2
-rw-r--r--arch/x86/kernel/apic/io_apic.c14
-rw-r--r--arch/x86/kernel/cpu/common.c2
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce-severity.c7
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce.c43
-rw-r--r--arch/x86/kernel/cpu/perf_event.c89
-rw-r--r--arch/x86/kernel/cpu/perf_event.h20
-rw-r--r--arch/x86/kernel/cpu/perf_event_amd_ibs.c4
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c10
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_ds.c7
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_uncore.c253
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_uncore.h48
-rw-r--r--arch/x86/kernel/irq.c1
-rw-r--r--arch/x86/kernel/kdebugfs.c6
-rw-r--r--arch/x86/kvm/i8259.c17
-rw-r--r--arch/x86/kvm/vmx.c20
-rw-r--r--arch/x86/kvm/x86.c4
-rw-r--r--arch/x86/mm/hugetlbpage.c21
-rw-r--r--arch/x86/mm/pageattr.c10
-rw-r--r--arch/x86/mm/srat.c15
-rw-r--r--arch/x86/platform/efi/efi.c30
-rw-r--r--arch/x86/platform/olpc/olpc-xo1-pm.c16
-rw-r--r--arch/x86/platform/olpc/olpc-xo1-sci.c1
-rw-r--r--arch/x86/platform/olpc/olpc-xo15-sci.c1
-rw-r--r--arch/x86/platform/olpc/olpc.c190
-rw-r--r--arch/x86/realmode/rm/Makefile2
-rw-r--r--arch/x86/syscalls/syscall_64.tbl8
-rw-r--r--arch/x86/um/asm/ptrace.h6
-rw-r--r--arch/x86/xen/p2m.c5
310 files changed, 4279 insertions, 4170 deletions
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index d5b9b5e645cc..9944dedee5b1 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -18,6 +18,8 @@ config ALPHA
18 select ARCH_HAVE_NMI_SAFE_CMPXCHG 18 select ARCH_HAVE_NMI_SAFE_CMPXCHG
19 select GENERIC_SMP_IDLE_THREAD 19 select GENERIC_SMP_IDLE_THREAD
20 select GENERIC_CMOS_UPDATE 20 select GENERIC_CMOS_UPDATE
21 select GENERIC_STRNCPY_FROM_USER
22 select GENERIC_STRNLEN_USER
21 help 23 help
22 The Alpha is a 64-bit general-purpose processor designed and 24 The Alpha is a 64-bit general-purpose processor designed and
23 marketed by the Digital Equipment Corporation of blessed memory, 25 marketed by the Digital Equipment Corporation of blessed memory,
diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h
index 3bb7ffeae3bc..c2cbe4fc391c 100644
--- a/arch/alpha/include/asm/atomic.h
+++ b/arch/alpha/include/asm/atomic.h
@@ -14,8 +14,8 @@
14 */ 14 */
15 15
16 16
17#define ATOMIC_INIT(i) ( (atomic_t) { (i) } ) 17#define ATOMIC_INIT(i) { (i) }
18#define ATOMIC64_INIT(i) ( (atomic64_t) { (i) } ) 18#define ATOMIC64_INIT(i) { (i) }
19 19
20#define atomic_read(v) (*(volatile int *)&(v)->counter) 20#define atomic_read(v) (*(volatile int *)&(v)->counter)
21#define atomic64_read(v) (*(volatile long *)&(v)->counter) 21#define atomic64_read(v) (*(volatile long *)&(v)->counter)
diff --git a/arch/alpha/include/asm/fpu.h b/arch/alpha/include/asm/fpu.h
index db00f7885faa..e477bcd5b94a 100644
--- a/arch/alpha/include/asm/fpu.h
+++ b/arch/alpha/include/asm/fpu.h
@@ -1,7 +1,9 @@
1#ifndef __ASM_ALPHA_FPU_H 1#ifndef __ASM_ALPHA_FPU_H
2#define __ASM_ALPHA_FPU_H 2#define __ASM_ALPHA_FPU_H
3 3
4#ifdef __KERNEL__
4#include <asm/special_insns.h> 5#include <asm/special_insns.h>
6#endif
5 7
6/* 8/*
7 * Alpha floating-point control register defines: 9 * Alpha floating-point control register defines:
diff --git a/arch/alpha/include/asm/ptrace.h b/arch/alpha/include/asm/ptrace.h
index fd698a174f26..b87755a19554 100644
--- a/arch/alpha/include/asm/ptrace.h
+++ b/arch/alpha/include/asm/ptrace.h
@@ -76,7 +76,10 @@ struct switch_stack {
76#define task_pt_regs(task) \ 76#define task_pt_regs(task) \
77 ((struct pt_regs *) (task_stack_page(task) + 2*PAGE_SIZE) - 1) 77 ((struct pt_regs *) (task_stack_page(task) + 2*PAGE_SIZE) - 1)
78 78
79#define force_successful_syscall_return() (task_pt_regs(current)->r0 = 0) 79#define current_pt_regs() \
80 ((struct pt_regs *) ((char *)current_thread_info() + 2*PAGE_SIZE) - 1)
81
82#define force_successful_syscall_return() (current_pt_regs()->r0 = 0)
80 83
81#endif 84#endif
82 85
diff --git a/arch/alpha/include/asm/socket.h b/arch/alpha/include/asm/socket.h
index dcb221a4b5be..7d2f75be932e 100644
--- a/arch/alpha/include/asm/socket.h
+++ b/arch/alpha/include/asm/socket.h
@@ -76,9 +76,11 @@
76/* Instruct lower device to use last 4-bytes of skb data as FCS */ 76/* Instruct lower device to use last 4-bytes of skb data as FCS */
77#define SO_NOFCS 43 77#define SO_NOFCS 43
78 78
79#ifdef __KERNEL__
79/* O_NONBLOCK clashes with the bits used for socket types. Therefore we 80/* O_NONBLOCK clashes with the bits used for socket types. Therefore we
80 * have to define SOCK_NONBLOCK to a different value here. 81 * have to define SOCK_NONBLOCK to a different value here.
81 */ 82 */
82#define SOCK_NONBLOCK 0x40000000 83#define SOCK_NONBLOCK 0x40000000
84#endif /* __KERNEL__ */
83 85
84#endif /* _ASM_SOCKET_H */ 86#endif /* _ASM_SOCKET_H */
diff --git a/arch/alpha/include/asm/uaccess.h b/arch/alpha/include/asm/uaccess.h
index b49ec2f8d6e3..766fdfde2b7a 100644
--- a/arch/alpha/include/asm/uaccess.h
+++ b/arch/alpha/include/asm/uaccess.h
@@ -433,36 +433,12 @@ clear_user(void __user *to, long len)
433#undef __module_address 433#undef __module_address
434#undef __module_call 434#undef __module_call
435 435
436/* Returns: -EFAULT if exception before terminator, N if the entire 436#define user_addr_max() \
437 buffer filled, else strlen. */ 437 (segment_eq(get_fs(), USER_DS) ? TASK_SIZE : ~0UL)
438 438
439extern long __strncpy_from_user(char *__to, const char __user *__from, long __to_len); 439extern long strncpy_from_user(char *dest, const char __user *src, long count);
440 440extern __must_check long strlen_user(const char __user *str);
441extern inline long 441extern __must_check long strnlen_user(const char __user *str, long n);
442strncpy_from_user(char *to, const char __user *from, long n)
443{
444 long ret = -EFAULT;
445 if (__access_ok((unsigned long)from, 0, get_fs()))
446 ret = __strncpy_from_user(to, from, n);
447 return ret;
448}
449
450/* Returns: 0 if bad, string length+1 (memory size) of string if ok */
451extern long __strlen_user(const char __user *);
452
453extern inline long strlen_user(const char __user *str)
454{
455 return access_ok(VERIFY_READ,str,0) ? __strlen_user(str) : 0;
456}
457
458/* Returns: 0 if exception before NUL or reaching the supplied limit (N),
459 * a value greater than N if the limit would be exceeded, else strlen. */
460extern long __strnlen_user(const char __user *, long);
461
462extern inline long strnlen_user(const char __user *str, long n)
463{
464 return access_ok(VERIFY_READ,str,0) ? __strnlen_user(str, n) : 0;
465}
466 442
467/* 443/*
468 * About the exception table: 444 * About the exception table:
diff --git a/arch/alpha/include/asm/unistd.h b/arch/alpha/include/asm/unistd.h
index 633b23b0664a..a31a78eac9b9 100644
--- a/arch/alpha/include/asm/unistd.h
+++ b/arch/alpha/include/asm/unistd.h
@@ -465,10 +465,12 @@
465#define __NR_setns 501 465#define __NR_setns 501
466#define __NR_accept4 502 466#define __NR_accept4 502
467#define __NR_sendmmsg 503 467#define __NR_sendmmsg 503
468#define __NR_process_vm_readv 504
469#define __NR_process_vm_writev 505
468 470
469#ifdef __KERNEL__ 471#ifdef __KERNEL__
470 472
471#define NR_SYSCALLS 504 473#define NR_SYSCALLS 506
472 474
473#define __ARCH_WANT_OLD_READDIR 475#define __ARCH_WANT_OLD_READDIR
474#define __ARCH_WANT_STAT64 476#define __ARCH_WANT_STAT64
diff --git a/arch/alpha/include/asm/word-at-a-time.h b/arch/alpha/include/asm/word-at-a-time.h
new file mode 100644
index 000000000000..6b340d0f1521
--- /dev/null
+++ b/arch/alpha/include/asm/word-at-a-time.h
@@ -0,0 +1,55 @@
1#ifndef _ASM_WORD_AT_A_TIME_H
2#define _ASM_WORD_AT_A_TIME_H
3
4#include <asm/compiler.h>
5
6/*
7 * word-at-a-time interface for Alpha.
8 */
9
10/*
11 * We do not use the word_at_a_time struct on Alpha, but it needs to be
12 * implemented to humour the generic code.
13 */
14struct word_at_a_time {
15 const unsigned long unused;
16};
17
18#define WORD_AT_A_TIME_CONSTANTS { 0 }
19
20/* Return nonzero if val has a zero */
21static inline unsigned long has_zero(unsigned long val, unsigned long *bits, const struct word_at_a_time *c)
22{
23 unsigned long zero_locations = __kernel_cmpbge(0, val);
24 *bits = zero_locations;
25 return zero_locations;
26}
27
28static inline unsigned long prep_zero_mask(unsigned long val, unsigned long bits, const struct word_at_a_time *c)
29{
30 return bits;
31}
32
33#define create_zero_mask(bits) (bits)
34
35static inline unsigned long find_zero(unsigned long bits)
36{
37#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67)
38 /* Simple if have CIX instructions */
39 return __kernel_cttz(bits);
40#else
41 unsigned long t1, t2, t3;
42 /* Retain lowest set bit only */
43 bits &= -bits;
44 /* Binary search for lowest set bit */
45 t1 = bits & 0xf0;
46 t2 = bits & 0xcc;
47 t3 = bits & 0xaa;
48 if (t1) t1 = 4;
49 if (t2) t2 = 2;
50 if (t3) t3 = 1;
51 return t1 + t2 + t3;
52#endif
53}
54
55#endif /* _ASM_WORD_AT_A_TIME_H */
diff --git a/arch/alpha/kernel/alpha_ksyms.c b/arch/alpha/kernel/alpha_ksyms.c
index d96e742d4dc2..15fa821d09cd 100644
--- a/arch/alpha/kernel/alpha_ksyms.c
+++ b/arch/alpha/kernel/alpha_ksyms.c
@@ -52,7 +52,6 @@ EXPORT_SYMBOL(alpha_write_fp_reg_s);
52 52
53/* entry.S */ 53/* entry.S */
54EXPORT_SYMBOL(kernel_thread); 54EXPORT_SYMBOL(kernel_thread);
55EXPORT_SYMBOL(kernel_execve);
56 55
57/* Networking helper routines. */ 56/* Networking helper routines. */
58EXPORT_SYMBOL(csum_tcpudp_magic); 57EXPORT_SYMBOL(csum_tcpudp_magic);
@@ -74,8 +73,6 @@ EXPORT_SYMBOL(alpha_fp_emul);
74 */ 73 */
75EXPORT_SYMBOL(__copy_user); 74EXPORT_SYMBOL(__copy_user);
76EXPORT_SYMBOL(__do_clear_user); 75EXPORT_SYMBOL(__do_clear_user);
77EXPORT_SYMBOL(__strncpy_from_user);
78EXPORT_SYMBOL(__strnlen_user);
79 76
80/* 77/*
81 * SMP-specific symbols. 78 * SMP-specific symbols.
diff --git a/arch/alpha/kernel/entry.S b/arch/alpha/kernel/entry.S
index 6d159cee5f2f..ec0da0567ab5 100644
--- a/arch/alpha/kernel/entry.S
+++ b/arch/alpha/kernel/entry.S
@@ -663,58 +663,6 @@ kernel_thread:
663 br ret_to_kernel 663 br ret_to_kernel
664.end kernel_thread 664.end kernel_thread
665 665
666/*
667 * kernel_execve(path, argv, envp)
668 */
669 .align 4
670 .globl kernel_execve
671 .ent kernel_execve
672kernel_execve:
673 /* We can be called from a module. */
674 ldgp $gp, 0($27)
675 lda $sp, -(32+SIZEOF_PT_REGS+8)($sp)
676 .frame $sp, 32+SIZEOF_PT_REGS+8, $26, 0
677 stq $26, 0($sp)
678 stq $16, 8($sp)
679 stq $17, 16($sp)
680 stq $18, 24($sp)
681 .prologue 1
682
683 lda $16, 32($sp)
684 lda $17, 0
685 lda $18, SIZEOF_PT_REGS
686 bsr $26, memset !samegp
687
688 /* Avoid the HAE being gratuitously wrong, which would cause us
689 to do the whole turn off interrupts thing and restore it. */
690 ldq $2, alpha_mv+HAE_CACHE
691 stq $2, 152+32($sp)
692
693 ldq $16, 8($sp)
694 ldq $17, 16($sp)
695 ldq $18, 24($sp)
696 lda $19, 32($sp)
697 bsr $26, do_execve !samegp
698
699 ldq $26, 0($sp)
700 bne $0, 1f /* error! */
701
702 /* Move the temporary pt_regs struct from its current location
703 to the top of the kernel stack frame. See copy_thread for
704 details for a normal process. */
705 lda $16, 0x4000 - SIZEOF_PT_REGS($8)
706 lda $17, 32($sp)
707 lda $18, SIZEOF_PT_REGS
708 bsr $26, memmove !samegp
709
710 /* Take that over as our new stack frame and visit userland! */
711 lda $sp, 0x4000 - SIZEOF_PT_REGS($8)
712 br $31, ret_from_sys_call
713
7141: lda $sp, 32+SIZEOF_PT_REGS+8($sp)
715 ret
716.end kernel_execve
717
718 666
719/* 667/*
720 * Special system calls. Most of these are special in that they either 668 * Special system calls. Most of these are special in that they either
@@ -797,115 +745,6 @@ sys_rt_sigreturn:
797.end sys_rt_sigreturn 745.end sys_rt_sigreturn
798 746
799 .align 4 747 .align 4
800 .globl sys_sethae
801 .ent sys_sethae
802sys_sethae:
803 .prologue 0
804 stq $16, 152($sp)
805 ret
806.end sys_sethae
807
808 .align 4
809 .globl osf_getpriority
810 .ent osf_getpriority
811osf_getpriority:
812 lda $sp, -16($sp)
813 stq $26, 0($sp)
814 .prologue 0
815
816 jsr $26, sys_getpriority
817
818 ldq $26, 0($sp)
819 blt $0, 1f
820
821 /* Return value is the unbiased priority, i.e. 20 - prio.
822 This does result in negative return values, so signal
823 no error by writing into the R0 slot. */
824 lda $1, 20
825 stq $31, 16($sp)
826 subl $1, $0, $0
827 unop
828
8291: lda $sp, 16($sp)
830 ret
831.end osf_getpriority
832
833 .align 4
834 .globl sys_getxuid
835 .ent sys_getxuid
836sys_getxuid:
837 .prologue 0
838 ldq $2, TI_TASK($8)
839 ldq $3, TASK_CRED($2)
840 ldl $0, CRED_UID($3)
841 ldl $1, CRED_EUID($3)
842 stq $1, 80($sp)
843 ret
844.end sys_getxuid
845
846 .align 4
847 .globl sys_getxgid
848 .ent sys_getxgid
849sys_getxgid:
850 .prologue 0
851 ldq $2, TI_TASK($8)
852 ldq $3, TASK_CRED($2)
853 ldl $0, CRED_GID($3)
854 ldl $1, CRED_EGID($3)
855 stq $1, 80($sp)
856 ret
857.end sys_getxgid
858
859 .align 4
860 .globl sys_getxpid
861 .ent sys_getxpid
862sys_getxpid:
863 .prologue 0
864 ldq $2, TI_TASK($8)
865
866 /* See linux/kernel/timer.c sys_getppid for discussion
867 about this loop. */
868 ldq $3, TASK_GROUP_LEADER($2)
869 ldq $4, TASK_REAL_PARENT($3)
870 ldl $0, TASK_TGID($2)
8711: ldl $1, TASK_TGID($4)
872#ifdef CONFIG_SMP
873 mov $4, $5
874 mb
875 ldq $3, TASK_GROUP_LEADER($2)
876 ldq $4, TASK_REAL_PARENT($3)
877 cmpeq $4, $5, $5
878 beq $5, 1b
879#endif
880 stq $1, 80($sp)
881 ret
882.end sys_getxpid
883
884 .align 4
885 .globl sys_alpha_pipe
886 .ent sys_alpha_pipe
887sys_alpha_pipe:
888 lda $sp, -16($sp)
889 stq $26, 0($sp)
890 .prologue 0
891
892 mov $31, $17
893 lda $16, 8($sp)
894 jsr $26, do_pipe_flags
895
896 ldq $26, 0($sp)
897 bne $0, 1f
898
899 /* The return values are in $0 and $20. */
900 ldl $1, 12($sp)
901 ldl $0, 8($sp)
902
903 stq $1, 80+16($sp)
9041: lda $sp, 16($sp)
905 ret
906.end sys_alpha_pipe
907
908 .align 4
909 .globl sys_execve 748 .globl sys_execve
910 .ent sys_execve 749 .ent sys_execve
911sys_execve: 750sys_execve:
diff --git a/arch/alpha/kernel/osf_sys.c b/arch/alpha/kernel/osf_sys.c
index 98a103621af6..bc1acdda7a5e 100644
--- a/arch/alpha/kernel/osf_sys.c
+++ b/arch/alpha/kernel/osf_sys.c
@@ -1404,3 +1404,52 @@ SYSCALL_DEFINE3(osf_writev, unsigned long, fd,
1404} 1404}
1405 1405
1406#endif 1406#endif
1407
1408SYSCALL_DEFINE2(osf_getpriority, int, which, int, who)
1409{
1410 int prio = sys_getpriority(which, who);
1411 if (prio >= 0) {
1412 /* Return value is the unbiased priority, i.e. 20 - prio.
1413 This does result in negative return values, so signal
1414 no error */
1415 force_successful_syscall_return();
1416 prio = 20 - prio;
1417 }
1418 return prio;
1419}
1420
1421SYSCALL_DEFINE0(getxuid)
1422{
1423 current_pt_regs()->r20 = sys_geteuid();
1424 return sys_getuid();
1425}
1426
1427SYSCALL_DEFINE0(getxgid)
1428{
1429 current_pt_regs()->r20 = sys_getegid();
1430 return sys_getgid();
1431}
1432
1433SYSCALL_DEFINE0(getxpid)
1434{
1435 current_pt_regs()->r20 = sys_getppid();
1436 return sys_getpid();
1437}
1438
1439SYSCALL_DEFINE0(alpha_pipe)
1440{
1441 int fd[2];
1442 int res = do_pipe_flags(fd, 0);
1443 if (!res) {
1444 /* The return values are in $0 and $20. */
1445 current_pt_regs()->r20 = fd[1];
1446 res = fd[0];
1447 }
1448 return res;
1449}
1450
1451SYSCALL_DEFINE1(sethae, unsigned long, val)
1452{
1453 current_pt_regs()->hae = val;
1454 return 0;
1455}
diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c
index 153d3fce3e8e..d6fde98b74b3 100644
--- a/arch/alpha/kernel/process.c
+++ b/arch/alpha/kernel/process.c
@@ -455,3 +455,22 @@ get_wchan(struct task_struct *p)
455 } 455 }
456 return pc; 456 return pc;
457} 457}
458
459int kernel_execve(const char *path, const char *const argv[], const char *const envp[])
460{
461 /* Avoid the HAE being gratuitously wrong, which would cause us
462 to do the whole turn off interrupts thing and restore it. */
463 struct pt_regs regs = {.hae = alpha_mv.hae_cache};
464 int err = do_execve(path, argv, envp, &regs);
465 if (!err) {
466 struct pt_regs *p = current_pt_regs();
467 /* copy regs to normal position and off to userland we go... */
468 *p = regs;
469 __asm__ __volatile__ (
470 "mov %0, $sp;"
471 "br $31, ret_from_sys_call"
472 : : "r"(p));
473 }
474 return err;
475}
476EXPORT_SYMBOL(kernel_execve);
diff --git a/arch/alpha/kernel/systbls.S b/arch/alpha/kernel/systbls.S
index 87835235f114..2ac6b45c3e00 100644
--- a/arch/alpha/kernel/systbls.S
+++ b/arch/alpha/kernel/systbls.S
@@ -111,7 +111,7 @@ sys_call_table:
111 .quad sys_socket 111 .quad sys_socket
112 .quad sys_connect 112 .quad sys_connect
113 .quad sys_accept 113 .quad sys_accept
114 .quad osf_getpriority /* 100 */ 114 .quad sys_osf_getpriority /* 100 */
115 .quad sys_send 115 .quad sys_send
116 .quad sys_recv 116 .quad sys_recv
117 .quad sys_sigreturn 117 .quad sys_sigreturn
@@ -522,6 +522,8 @@ sys_call_table:
522 .quad sys_setns 522 .quad sys_setns
523 .quad sys_accept4 523 .quad sys_accept4
524 .quad sys_sendmmsg 524 .quad sys_sendmmsg
525 .quad sys_process_vm_readv
526 .quad sys_process_vm_writev /* 505 */
525 527
526 .size sys_call_table, . - sys_call_table 528 .size sys_call_table, . - sys_call_table
527 .type sys_call_table, @object 529 .type sys_call_table, @object
diff --git a/arch/alpha/lib/Makefile b/arch/alpha/lib/Makefile
index c0a83ab62b78..59660743237c 100644
--- a/arch/alpha/lib/Makefile
+++ b/arch/alpha/lib/Makefile
@@ -31,8 +31,6 @@ lib-y = __divqu.o __remqu.o __divlu.o __remlu.o \
31 $(ev6-y)memchr.o \ 31 $(ev6-y)memchr.o \
32 $(ev6-y)copy_user.o \ 32 $(ev6-y)copy_user.o \
33 $(ev6-y)clear_user.o \ 33 $(ev6-y)clear_user.o \
34 $(ev6-y)strncpy_from_user.o \
35 $(ev67-y)strlen_user.o \
36 $(ev6-y)csum_ipv6_magic.o \ 34 $(ev6-y)csum_ipv6_magic.o \
37 $(ev6-y)clear_page.o \ 35 $(ev6-y)clear_page.o \
38 $(ev6-y)copy_page.o \ 36 $(ev6-y)copy_page.o \
diff --git a/arch/alpha/lib/ev6-strncpy_from_user.S b/arch/alpha/lib/ev6-strncpy_from_user.S
deleted file mode 100644
index d2e28178cacc..000000000000
--- a/arch/alpha/lib/ev6-strncpy_from_user.S
+++ /dev/null
@@ -1,424 +0,0 @@
1/*
2 * arch/alpha/lib/ev6-strncpy_from_user.S
3 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
4 *
5 * Just like strncpy except in the return value:
6 *
7 * -EFAULT if an exception occurs before the terminator is copied.
8 * N if the buffer filled.
9 *
10 * Otherwise the length of the string is returned.
11 *
12 * Much of the information about 21264 scheduling/coding comes from:
13 * Compiler Writer's Guide for the Alpha 21264
14 * abbreviated as 'CWG' in other comments here
15 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
16 * Scheduling notation:
17 * E - either cluster
18 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
19 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
20 * A bunch of instructions got moved and temp registers were changed
21 * to aid in scheduling. Control flow was also re-arranged to eliminate
22 * branches, and to provide longer code sequences to enable better scheduling.
23 * A total rewrite (using byte load/stores for start & tail sequences)
24 * is desirable, but very difficult to do without a from-scratch rewrite.
25 * Save that for the future.
26 */
27
28
29#include <asm/errno.h>
30#include <asm/regdef.h>
31
32
33/* Allow an exception for an insn; exit if we get one. */
34#define EX(x,y...) \
35 99: x,##y; \
36 .section __ex_table,"a"; \
37 .long 99b - .; \
38 lda $31, $exception-99b($0); \
39 .previous
40
41
42 .set noat
43 .set noreorder
44 .text
45
46 .globl __strncpy_from_user
47 .ent __strncpy_from_user
48 .frame $30, 0, $26
49 .prologue 0
50
51 .align 4
52__strncpy_from_user:
53 and a0, 7, t3 # E : find dest misalignment
54 beq a2, $zerolength # U :
55
56 /* Are source and destination co-aligned? */
57 mov a0, v0 # E : save the string start
58 xor a0, a1, t4 # E :
59 EX( ldq_u t1, 0(a1) ) # L : Latency=3 load first quadword
60 ldq_u t0, 0(a0) # L : load first (partial) aligned dest quadword
61
62 addq a2, t3, a2 # E : bias count by dest misalignment
63 subq a2, 1, a3 # E :
64 addq zero, 1, t10 # E :
65 and t4, 7, t4 # E : misalignment between the two
66
67 and a3, 7, t6 # E : number of tail bytes
68 sll t10, t6, t10 # E : t10 = bitmask of last count byte
69 bne t4, $unaligned # U :
70 lda t2, -1 # E : build a mask against false zero
71
72 /*
73 * We are co-aligned; take care of a partial first word.
74 * On entry to this basic block:
75 * t0 == the first destination word for masking back in
76 * t1 == the first source word.
77 */
78
79 srl a3, 3, a2 # E : a2 = loop counter = (count - 1)/8
80 addq a1, 8, a1 # E :
81 mskqh t2, a1, t2 # U : detection in the src word
82 nop
83
84 /* Create the 1st output word and detect 0's in the 1st input word. */
85 mskqh t1, a1, t3 # U :
86 mskql t0, a1, t0 # U : assemble the first output word
87 ornot t1, t2, t2 # E :
88 nop
89
90 cmpbge zero, t2, t8 # E : bits set iff null found
91 or t0, t3, t0 # E :
92 beq a2, $a_eoc # U :
93 bne t8, $a_eos # U : 2nd branch in a quad. Bad.
94
95 /* On entry to this basic block:
96 * t0 == a source quad not containing a null.
97 * a0 - current aligned destination address
98 * a1 - current aligned source address
99 * a2 - count of quadwords to move.
100 * NOTE: Loop improvement - unrolling this is going to be
101 * a huge win, since we're going to stall otherwise.
102 * Fix this later. For _really_ large copies, look
103 * at using wh64 on a look-ahead basis. See the code
104 * in clear_user.S and copy_user.S.
105 * Presumably, since (a0) and (a1) do not overlap (by C definition)
106 * Lots of nops here:
107 * - Separate loads from stores
108 * - Keep it to 1 branch/quadpack so the branch predictor
109 * can train.
110 */
111$a_loop:
112 stq_u t0, 0(a0) # L :
113 addq a0, 8, a0 # E :
114 nop
115 subq a2, 1, a2 # E :
116
117 EX( ldq_u t0, 0(a1) ) # L :
118 addq a1, 8, a1 # E :
119 cmpbge zero, t0, t8 # E : Stall 2 cycles on t0
120 beq a2, $a_eoc # U :
121
122 beq t8, $a_loop # U :
123 nop
124 nop
125 nop
126
127 /* Take care of the final (partial) word store. At this point
128 * the end-of-count bit is set in t8 iff it applies.
129 *
130 * On entry to this basic block we have:
131 * t0 == the source word containing the null
132 * t8 == the cmpbge mask that found it.
133 */
134$a_eos:
135 negq t8, t12 # E : find low bit set
136 and t8, t12, t12 # E :
137
138 /* We're doing a partial word store and so need to combine
139 our source and original destination words. */
140 ldq_u t1, 0(a0) # L :
141 subq t12, 1, t6 # E :
142
143 or t12, t6, t8 # E :
144 zapnot t0, t8, t0 # U : clear src bytes > null
145 zap t1, t8, t1 # U : clear dst bytes <= null
146 or t0, t1, t0 # E :
147
148 stq_u t0, 0(a0) # L :
149 br $finish_up # L0 :
150 nop
151 nop
152
153 /* Add the end-of-count bit to the eos detection bitmask. */
154 .align 4
155$a_eoc:
156 or t10, t8, t8
157 br $a_eos
158 nop
159 nop
160
161
162/* The source and destination are not co-aligned. Align the destination
163 and cope. We have to be very careful about not reading too much and
164 causing a SEGV. */
165
166 .align 4
167$u_head:
168 /* We know just enough now to be able to assemble the first
169 full source word. We can still find a zero at the end of it
170 that prevents us from outputting the whole thing.
171
172 On entry to this basic block:
173 t0 == the first dest word, unmasked
174 t1 == the shifted low bits of the first source word
175 t6 == bytemask that is -1 in dest word bytes */
176
177 EX( ldq_u t2, 8(a1) ) # L : load second src word
178 addq a1, 8, a1 # E :
179 mskql t0, a0, t0 # U : mask trailing garbage in dst
180 extqh t2, a1, t4 # U :
181
182 or t1, t4, t1 # E : first aligned src word complete
183 mskqh t1, a0, t1 # U : mask leading garbage in src
184 or t0, t1, t0 # E : first output word complete
185 or t0, t6, t6 # E : mask original data for zero test
186
187 cmpbge zero, t6, t8 # E :
188 beq a2, $u_eocfin # U :
189 bne t8, $u_final # U : bad news - 2nd branch in a quad
190 lda t6, -1 # E : mask out the bits we have
191
192 mskql t6, a1, t6 # U : already seen
193 stq_u t0, 0(a0) # L : store first output word
194 or t6, t2, t2 # E :
195 cmpbge zero, t2, t8 # E : find nulls in second partial
196
197 addq a0, 8, a0 # E :
198 subq a2, 1, a2 # E :
199 bne t8, $u_late_head_exit # U :
200 nop
201
202 /* Finally, we've got all the stupid leading edge cases taken care
203 of and we can set up to enter the main loop. */
204
205 extql t2, a1, t1 # U : position hi-bits of lo word
206 EX( ldq_u t2, 8(a1) ) # L : read next high-order source word
207 addq a1, 8, a1 # E :
208 cmpbge zero, t2, t8 # E :
209
210 beq a2, $u_eoc # U :
211 bne t8, $u_eos # U :
212 nop
213 nop
214
215 /* Unaligned copy main loop. In order to avoid reading too much,
216 the loop is structured to detect zeros in aligned source words.
217 This has, unfortunately, effectively pulled half of a loop
218 iteration out into the head and half into the tail, but it does
219 prevent nastiness from accumulating in the very thing we want
220 to run as fast as possible.
221
222 On entry to this basic block:
223 t1 == the shifted high-order bits from the previous source word
224 t2 == the unshifted current source word
225
226 We further know that t2 does not contain a null terminator. */
227
228 /*
229 * Extra nops here:
230 * separate load quads from store quads
231 * only one branch/quad to permit predictor training
232 */
233
234 .align 4
235$u_loop:
236 extqh t2, a1, t0 # U : extract high bits for current word
237 addq a1, 8, a1 # E :
238 extql t2, a1, t3 # U : extract low bits for next time
239 addq a0, 8, a0 # E :
240
241 or t0, t1, t0 # E : current dst word now complete
242 EX( ldq_u t2, 0(a1) ) # L : load high word for next time
243 subq a2, 1, a2 # E :
244 nop
245
246 stq_u t0, -8(a0) # L : save the current word
247 mov t3, t1 # E :
248 cmpbge zero, t2, t8 # E : test new word for eos
249 beq a2, $u_eoc # U :
250
251 beq t8, $u_loop # U :
252 nop
253 nop
254 nop
255
256 /* We've found a zero somewhere in the source word we just read.
257 If it resides in the lower half, we have one (probably partial)
258 word to write out, and if it resides in the upper half, we
259 have one full and one partial word left to write out.
260
261 On entry to this basic block:
262 t1 == the shifted high-order bits from the previous source word
263 t2 == the unshifted current source word. */
264 .align 4
265$u_eos:
266 extqh t2, a1, t0 # U :
267 or t0, t1, t0 # E : first (partial) source word complete
268 cmpbge zero, t0, t8 # E : is the null in this first bit?
269 nop
270
271 bne t8, $u_final # U :
272 stq_u t0, 0(a0) # L : the null was in the high-order bits
273 addq a0, 8, a0 # E :
274 subq a2, 1, a2 # E :
275
276 .align 4
277$u_late_head_exit:
278 extql t2, a1, t0 # U :
279 cmpbge zero, t0, t8 # E :
280 or t8, t10, t6 # E :
281 cmoveq a2, t6, t8 # E :
282
283 /* Take care of a final (probably partial) result word.
284 On entry to this basic block:
285 t0 == assembled source word
286 t8 == cmpbge mask that found the null. */
287 .align 4
288$u_final:
289 negq t8, t6 # E : isolate low bit set
290 and t6, t8, t12 # E :
291 ldq_u t1, 0(a0) # L :
292 subq t12, 1, t6 # E :
293
294 or t6, t12, t8 # E :
295 zapnot t0, t8, t0 # U : kill source bytes > null
296 zap t1, t8, t1 # U : kill dest bytes <= null
297 or t0, t1, t0 # E :
298
299 stq_u t0, 0(a0) # E :
300 br $finish_up # U :
301 nop
302 nop
303
304 .align 4
305$u_eoc: # end-of-count
306 extqh t2, a1, t0 # U :
307 or t0, t1, t0 # E :
308 cmpbge zero, t0, t8 # E :
309 nop
310
311 .align 4
312$u_eocfin: # end-of-count, final word
313 or t10, t8, t8 # E :
314 br $u_final # U :
315 nop
316 nop
317
318 /* Unaligned copy entry point. */
319 .align 4
320$unaligned:
321
322 srl a3, 3, a2 # U : a2 = loop counter = (count - 1)/8
323 and a0, 7, t4 # E : find dest misalignment
324 and a1, 7, t5 # E : find src misalignment
325 mov zero, t0 # E :
326
327 /* Conditionally load the first destination word and a bytemask
328 with 0xff indicating that the destination byte is sacrosanct. */
329
330 mov zero, t6 # E :
331 beq t4, 1f # U :
332 ldq_u t0, 0(a0) # L :
333 lda t6, -1 # E :
334
335 mskql t6, a0, t6 # E :
336 nop
337 nop
338 nop
339
340 .align 4
3411:
342 subq a1, t4, a1 # E : sub dest misalignment from src addr
343 /* If source misalignment is larger than dest misalignment, we need
344 extra startup checks to avoid SEGV. */
345 cmplt t4, t5, t12 # E :
346 extql t1, a1, t1 # U : shift src into place
347 lda t2, -1 # E : for creating masks later
348
349 beq t12, $u_head # U :
350 mskqh t2, t5, t2 # U : begin src byte validity mask
351 cmpbge zero, t1, t8 # E : is there a zero?
352 nop
353
354 extql t2, a1, t2 # U :
355 or t8, t10, t5 # E : test for end-of-count too
356 cmpbge zero, t2, t3 # E :
357 cmoveq a2, t5, t8 # E : Latency=2, extra map slot
358
359 nop # E : goes with cmov
360 andnot t8, t3, t8 # E :
361 beq t8, $u_head # U :
362 nop
363
364 /* At this point we've found a zero in the first partial word of
365 the source. We need to isolate the valid source data and mask
366 it into the original destination data. (Incidentally, we know
367 that we'll need at least one byte of that original dest word.) */
368
369 ldq_u t0, 0(a0) # L :
370 negq t8, t6 # E : build bitmask of bytes <= zero
371 mskqh t1, t4, t1 # U :
372 and t6, t8, t12 # E :
373
374 subq t12, 1, t6 # E :
375 or t6, t12, t8 # E :
376 zapnot t2, t8, t2 # U : prepare source word; mirror changes
377 zapnot t1, t8, t1 # U : to source validity mask
378
379 andnot t0, t2, t0 # E : zero place for source to reside
380 or t0, t1, t0 # E : and put it there
381 stq_u t0, 0(a0) # L :
382 nop
383
384 .align 4
385$finish_up:
386 zapnot t0, t12, t4 # U : was last byte written null?
387 and t12, 0xf0, t3 # E : binary search for the address of the
388 cmovne t4, 1, t4 # E : Latency=2, extra map slot
389 nop # E : with cmovne
390
391 and t12, 0xcc, t2 # E : last byte written
392 and t12, 0xaa, t1 # E :
393 cmovne t3, 4, t3 # E : Latency=2, extra map slot
394 nop # E : with cmovne
395
396 bic a0, 7, t0
397 cmovne t2, 2, t2 # E : Latency=2, extra map slot
398 nop # E : with cmovne
399 nop
400
401 cmovne t1, 1, t1 # E : Latency=2, extra map slot
402 nop # E : with cmovne
403 addq t0, t3, t0 # E :
404 addq t1, t2, t1 # E :
405
406 addq t0, t1, t0 # E :
407 addq t0, t4, t0 # add one if we filled the buffer
408 subq t0, v0, v0 # find string length
409 ret # L0 :
410
411 .align 4
412$zerolength:
413 nop
414 nop
415 nop
416 clr v0
417
418$exception:
419 nop
420 nop
421 nop
422 ret
423
424 .end __strncpy_from_user
diff --git a/arch/alpha/lib/ev67-strlen_user.S b/arch/alpha/lib/ev67-strlen_user.S
deleted file mode 100644
index 57e0d77b81a6..000000000000
--- a/arch/alpha/lib/ev67-strlen_user.S
+++ /dev/null
@@ -1,107 +0,0 @@
1/*
2 * arch/alpha/lib/ev67-strlen_user.S
3 * 21264 version contributed by Rick Gorton <rick.gorton@api-networks.com>
4 *
5 * Return the length of the string including the NULL terminator
6 * (strlen+1) or zero if an error occurred.
7 *
8 * In places where it is critical to limit the processing time,
9 * and the data is not trusted, strnlen_user() should be used.
10 * It will return a value greater than its second argument if
11 * that limit would be exceeded. This implementation is allowed
12 * to access memory beyond the limit, but will not cross a page
13 * boundary when doing so.
14 *
15 * Much of the information about 21264 scheduling/coding comes from:
16 * Compiler Writer's Guide for the Alpha 21264
17 * abbreviated as 'CWG' in other comments here
18 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
19 * Scheduling notation:
20 * E - either cluster
21 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
22 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
23 * Try not to change the actual algorithm if possible for consistency.
24 */
25
26#include <asm/regdef.h>
27
28
29/* Allow an exception for an insn; exit if we get one. */
30#define EX(x,y...) \
31 99: x,##y; \
32 .section __ex_table,"a"; \
33 .long 99b - .; \
34 lda v0, $exception-99b(zero); \
35 .previous
36
37
38 .set noreorder
39 .set noat
40 .text
41
42 .globl __strlen_user
43 .ent __strlen_user
44 .frame sp, 0, ra
45
46 .align 4
47__strlen_user:
48 ldah a1, 32767(zero) # do not use plain strlen_user() for strings
49 # that might be almost 2 GB long; you should
50 # be using strnlen_user() instead
51 nop
52 nop
53 nop
54
55 .globl __strnlen_user
56
57 .align 4
58__strnlen_user:
59 .prologue 0
60 EX( ldq_u t0, 0(a0) ) # L : load first quadword (a0 may be misaligned)
61 lda t1, -1(zero) # E :
62
63 insqh t1, a0, t1 # U :
64 andnot a0, 7, v0 # E :
65 or t1, t0, t0 # E :
66 subq a0, 1, a0 # E : get our +1 for the return
67
68 cmpbge zero, t0, t1 # E : t1 <- bitmask: bit i == 1 <==> i-th byte == 0
69 subq a1, 7, t2 # E :
70 subq a0, v0, t0 # E :
71 bne t1, $found # U :
72
73 addq t2, t0, t2 # E :
74 addq a1, 1, a1 # E :
75 nop # E :
76 nop # E :
77
78 .align 4
79$loop: ble t2, $limit # U :
80 EX( ldq t0, 8(v0) ) # L :
81 nop # E :
82 nop # E :
83
84 cmpbge zero, t0, t1 # E :
85 subq t2, 8, t2 # E :
86 addq v0, 8, v0 # E : addr += 8
87 beq t1, $loop # U :
88
89$found: cttz t1, t2 # U0 :
90 addq v0, t2, v0 # E :
91 subq v0, a0, v0 # E :
92 ret # L0 :
93
94$exception:
95 nop
96 nop
97 nop
98 ret
99
100 .align 4 # currently redundant
101$limit:
102 nop
103 nop
104 subq a1, t2, v0
105 ret
106
107 .end __strlen_user
diff --git a/arch/alpha/lib/strlen_user.S b/arch/alpha/lib/strlen_user.S
deleted file mode 100644
index 508a18e96479..000000000000
--- a/arch/alpha/lib/strlen_user.S
+++ /dev/null
@@ -1,91 +0,0 @@
1/*
2 * arch/alpha/lib/strlen_user.S
3 *
4 * Return the length of the string including the NUL terminator
5 * (strlen+1) or zero if an error occurred.
6 *
7 * In places where it is critical to limit the processing time,
8 * and the data is not trusted, strnlen_user() should be used.
9 * It will return a value greater than its second argument if
10 * that limit would be exceeded. This implementation is allowed
11 * to access memory beyond the limit, but will not cross a page
12 * boundary when doing so.
13 */
14
15#include <asm/regdef.h>
16
17
18/* Allow an exception for an insn; exit if we get one. */
19#define EX(x,y...) \
20 99: x,##y; \
21 .section __ex_table,"a"; \
22 .long 99b - .; \
23 lda v0, $exception-99b(zero); \
24 .previous
25
26
27 .set noreorder
28 .set noat
29 .text
30
31 .globl __strlen_user
32 .ent __strlen_user
33 .frame sp, 0, ra
34
35 .align 3
36__strlen_user:
37 ldah a1, 32767(zero) # do not use plain strlen_user() for strings
38 # that might be almost 2 GB long; you should
39 # be using strnlen_user() instead
40
41 .globl __strnlen_user
42
43 .align 3
44__strnlen_user:
45 .prologue 0
46
47 EX( ldq_u t0, 0(a0) ) # load first quadword (a0 may be misaligned)
48 lda t1, -1(zero)
49 insqh t1, a0, t1
50 andnot a0, 7, v0
51 or t1, t0, t0
52 subq a0, 1, a0 # get our +1 for the return
53 cmpbge zero, t0, t1 # t1 <- bitmask: bit i == 1 <==> i-th byte == 0
54 subq a1, 7, t2
55 subq a0, v0, t0
56 bne t1, $found
57
58 addq t2, t0, t2
59 addq a1, 1, a1
60
61 .align 3
62$loop: ble t2, $limit
63 EX( ldq t0, 8(v0) )
64 subq t2, 8, t2
65 addq v0, 8, v0 # addr += 8
66 cmpbge zero, t0, t1
67 beq t1, $loop
68
69$found: negq t1, t2 # clear all but least set bit
70 and t1, t2, t1
71
72 and t1, 0xf0, t2 # binary search for that set bit
73 and t1, 0xcc, t3
74 and t1, 0xaa, t4
75 cmovne t2, 4, t2
76 cmovne t3, 2, t3
77 cmovne t4, 1, t4
78 addq t2, t3, t2
79 addq v0, t4, v0
80 addq v0, t2, v0
81 nop # dual issue next two on ev4 and ev5
82 subq v0, a0, v0
83$exception:
84 ret
85
86 .align 3 # currently redundant
87$limit:
88 subq a1, t2, v0
89 ret
90
91 .end __strlen_user
diff --git a/arch/alpha/lib/strncpy_from_user.S b/arch/alpha/lib/strncpy_from_user.S
deleted file mode 100644
index 73ee21160ff7..000000000000
--- a/arch/alpha/lib/strncpy_from_user.S
+++ /dev/null
@@ -1,339 +0,0 @@
1/*
2 * arch/alpha/lib/strncpy_from_user.S
3 * Contributed by Richard Henderson (rth@tamu.edu)
4 *
5 * Just like strncpy except in the return value:
6 *
7 * -EFAULT if an exception occurs before the terminator is copied.
8 * N if the buffer filled.
9 *
10 * Otherwise the length of the string is returned.
11 */
12
13
14#include <asm/errno.h>
15#include <asm/regdef.h>
16
17
18/* Allow an exception for an insn; exit if we get one. */
19#define EX(x,y...) \
20 99: x,##y; \
21 .section __ex_table,"a"; \
22 .long 99b - .; \
23 lda $31, $exception-99b($0); \
24 .previous
25
26
27 .set noat
28 .set noreorder
29 .text
30
31 .globl __strncpy_from_user
32 .ent __strncpy_from_user
33 .frame $30, 0, $26
34 .prologue 0
35
36 .align 3
37$aligned:
38 /* On entry to this basic block:
39 t0 == the first destination word for masking back in
40 t1 == the first source word. */
41
42 /* Create the 1st output word and detect 0's in the 1st input word. */
43 lda t2, -1 # e1 : build a mask against false zero
44 mskqh t2, a1, t2 # e0 : detection in the src word
45 mskqh t1, a1, t3 # e0 :
46 ornot t1, t2, t2 # .. e1 :
47 mskql t0, a1, t0 # e0 : assemble the first output word
48 cmpbge zero, t2, t8 # .. e1 : bits set iff null found
49 or t0, t3, t0 # e0 :
50 beq a2, $a_eoc # .. e1 :
51 bne t8, $a_eos # .. e1 :
52
53 /* On entry to this basic block:
54 t0 == a source word not containing a null. */
55
56$a_loop:
57 stq_u t0, 0(a0) # e0 :
58 addq a0, 8, a0 # .. e1 :
59 EX( ldq_u t0, 0(a1) ) # e0 :
60 addq a1, 8, a1 # .. e1 :
61 subq a2, 1, a2 # e0 :
62 cmpbge zero, t0, t8 # .. e1 (stall)
63 beq a2, $a_eoc # e1 :
64 beq t8, $a_loop # e1 :
65
66 /* Take care of the final (partial) word store. At this point
67 the end-of-count bit is set in t8 iff it applies.
68
69 On entry to this basic block we have:
70 t0 == the source word containing the null
71 t8 == the cmpbge mask that found it. */
72
73$a_eos:
74 negq t8, t12 # e0 : find low bit set
75 and t8, t12, t12 # e1 (stall)
76
77 /* For the sake of the cache, don't read a destination word
78 if we're not going to need it. */
79 and t12, 0x80, t6 # e0 :
80 bne t6, 1f # .. e1 (zdb)
81
82 /* We're doing a partial word store and so need to combine
83 our source and original destination words. */
84 ldq_u t1, 0(a0) # e0 :
85 subq t12, 1, t6 # .. e1 :
86 or t12, t6, t8 # e0 :
87 unop #
88 zapnot t0, t8, t0 # e0 : clear src bytes > null
89 zap t1, t8, t1 # .. e1 : clear dst bytes <= null
90 or t0, t1, t0 # e1 :
91
921: stq_u t0, 0(a0)
93 br $finish_up
94
95 /* Add the end-of-count bit to the eos detection bitmask. */
96$a_eoc:
97 or t10, t8, t8
98 br $a_eos
99
100 /*** The Function Entry Point ***/
101 .align 3
102__strncpy_from_user:
103 mov a0, v0 # save the string start
104 beq a2, $zerolength
105
106 /* Are source and destination co-aligned? */
107 xor a0, a1, t1 # e0 :
108 and a0, 7, t0 # .. e1 : find dest misalignment
109 and t1, 7, t1 # e0 :
110 addq a2, t0, a2 # .. e1 : bias count by dest misalignment
111 subq a2, 1, a2 # e0 :
112 and a2, 7, t2 # e1 :
113 srl a2, 3, a2 # e0 : a2 = loop counter = (count - 1)/8
114 addq zero, 1, t10 # .. e1 :
115 sll t10, t2, t10 # e0 : t10 = bitmask of last count byte
116 bne t1, $unaligned # .. e1 :
117
118 /* We are co-aligned; take care of a partial first word. */
119
120 EX( ldq_u t1, 0(a1) ) # e0 : load first src word
121 addq a1, 8, a1 # .. e1 :
122
123 beq t0, $aligned # avoid loading dest word if not needed
124 ldq_u t0, 0(a0) # e0 :
125 br $aligned # .. e1 :
126
127
128/* The source and destination are not co-aligned. Align the destination
129 and cope. We have to be very careful about not reading too much and
130 causing a SEGV. */
131
132 .align 3
133$u_head:
134 /* We know just enough now to be able to assemble the first
135 full source word. We can still find a zero at the end of it
136 that prevents us from outputting the whole thing.
137
138 On entry to this basic block:
139 t0 == the first dest word, unmasked
140 t1 == the shifted low bits of the first source word
141 t6 == bytemask that is -1 in dest word bytes */
142
143 EX( ldq_u t2, 8(a1) ) # e0 : load second src word
144 addq a1, 8, a1 # .. e1 :
145 mskql t0, a0, t0 # e0 : mask trailing garbage in dst
146 extqh t2, a1, t4 # e0 :
147 or t1, t4, t1 # e1 : first aligned src word complete
148 mskqh t1, a0, t1 # e0 : mask leading garbage in src
149 or t0, t1, t0 # e0 : first output word complete
150 or t0, t6, t6 # e1 : mask original data for zero test
151 cmpbge zero, t6, t8 # e0 :
152 beq a2, $u_eocfin # .. e1 :
153 bne t8, $u_final # e1 :
154
155 lda t6, -1 # e1 : mask out the bits we have
156 mskql t6, a1, t6 # e0 : already seen
157 stq_u t0, 0(a0) # e0 : store first output word
158 or t6, t2, t2 # .. e1 :
159 cmpbge zero, t2, t8 # e0 : find nulls in second partial
160 addq a0, 8, a0 # .. e1 :
161 subq a2, 1, a2 # e0 :
162 bne t8, $u_late_head_exit # .. e1 :
163
164 /* Finally, we've got all the stupid leading edge cases taken care
165 of and we can set up to enter the main loop. */
166
167 extql t2, a1, t1 # e0 : position hi-bits of lo word
168 EX( ldq_u t2, 8(a1) ) # .. e1 : read next high-order source word
169 addq a1, 8, a1 # e0 :
170 cmpbge zero, t2, t8 # e1 (stall)
171 beq a2, $u_eoc # e1 :
172 bne t8, $u_eos # e1 :
173
174 /* Unaligned copy main loop. In order to avoid reading too much,
175 the loop is structured to detect zeros in aligned source words.
176 This has, unfortunately, effectively pulled half of a loop
177 iteration out into the head and half into the tail, but it does
178 prevent nastiness from accumulating in the very thing we want
179 to run as fast as possible.
180
181 On entry to this basic block:
182 t1 == the shifted high-order bits from the previous source word
183 t2 == the unshifted current source word
184
185 We further know that t2 does not contain a null terminator. */
186
187 .align 3
188$u_loop:
189 extqh t2, a1, t0 # e0 : extract high bits for current word
190 addq a1, 8, a1 # .. e1 :
191 extql t2, a1, t3 # e0 : extract low bits for next time
192 addq a0, 8, a0 # .. e1 :
193 or t0, t1, t0 # e0 : current dst word now complete
194 EX( ldq_u t2, 0(a1) ) # .. e1 : load high word for next time
195 stq_u t0, -8(a0) # e0 : save the current word
196 mov t3, t1 # .. e1 :
197 subq a2, 1, a2 # e0 :
198 cmpbge zero, t2, t8 # .. e1 : test new word for eos
199 beq a2, $u_eoc # e1 :
200 beq t8, $u_loop # e1 :
201
202 /* We've found a zero somewhere in the source word we just read.
203 If it resides in the lower half, we have one (probably partial)
204 word to write out, and if it resides in the upper half, we
205 have one full and one partial word left to write out.
206
207 On entry to this basic block:
208 t1 == the shifted high-order bits from the previous source word
209 t2 == the unshifted current source word. */
210$u_eos:
211 extqh t2, a1, t0 # e0 :
212 or t0, t1, t0 # e1 : first (partial) source word complete
213
214 cmpbge zero, t0, t8 # e0 : is the null in this first bit?
215 bne t8, $u_final # .. e1 (zdb)
216
217 stq_u t0, 0(a0) # e0 : the null was in the high-order bits
218 addq a0, 8, a0 # .. e1 :
219 subq a2, 1, a2 # e1 :
220
221$u_late_head_exit:
222 extql t2, a1, t0 # .. e0 :
223 cmpbge zero, t0, t8 # e0 :
224 or t8, t10, t6 # e1 :
225 cmoveq a2, t6, t8 # e0 :
226 nop # .. e1 :
227
228 /* Take care of a final (probably partial) result word.
229 On entry to this basic block:
230 t0 == assembled source word
231 t8 == cmpbge mask that found the null. */
232$u_final:
233 negq t8, t6 # e0 : isolate low bit set
234 and t6, t8, t12 # e1 :
235
236 and t12, 0x80, t6 # e0 : avoid dest word load if we can
237 bne t6, 1f # .. e1 (zdb)
238
239 ldq_u t1, 0(a0) # e0 :
240 subq t12, 1, t6 # .. e1 :
241 or t6, t12, t8 # e0 :
242 zapnot t0, t8, t0 # .. e1 : kill source bytes > null
243 zap t1, t8, t1 # e0 : kill dest bytes <= null
244 or t0, t1, t0 # e1 :
245
2461: stq_u t0, 0(a0) # e0 :
247 br $finish_up
248
249$u_eoc: # end-of-count
250 extqh t2, a1, t0
251 or t0, t1, t0
252 cmpbge zero, t0, t8
253
254$u_eocfin: # end-of-count, final word
255 or t10, t8, t8
256 br $u_final
257
258 /* Unaligned copy entry point. */
259 .align 3
260$unaligned:
261
262 EX( ldq_u t1, 0(a1) ) # e0 : load first source word
263
264 and a0, 7, t4 # .. e1 : find dest misalignment
265 and a1, 7, t5 # e0 : find src misalignment
266
267 /* Conditionally load the first destination word and a bytemask
268 with 0xff indicating that the destination byte is sacrosanct. */
269
270 mov zero, t0 # .. e1 :
271 mov zero, t6 # e0 :
272 beq t4, 1f # .. e1 :
273 ldq_u t0, 0(a0) # e0 :
274 lda t6, -1 # .. e1 :
275 mskql t6, a0, t6 # e0 :
2761:
277 subq a1, t4, a1 # .. e1 : sub dest misalignment from src addr
278
279 /* If source misalignment is larger than dest misalignment, we need
280 extra startup checks to avoid SEGV. */
281
282 cmplt t4, t5, t12 # e1 :
283 extql t1, a1, t1 # .. e0 : shift src into place
284 lda t2, -1 # e0 : for creating masks later
285 beq t12, $u_head # e1 :
286
287 mskqh t2, t5, t2 # e0 : begin src byte validity mask
288 cmpbge zero, t1, t8 # .. e1 : is there a zero?
289 extql t2, a1, t2 # e0 :
290 or t8, t10, t5 # .. e1 : test for end-of-count too
291 cmpbge zero, t2, t3 # e0 :
292 cmoveq a2, t5, t8 # .. e1 :
293 andnot t8, t3, t8 # e0 :
294 beq t8, $u_head # .. e1 (zdb)
295
296 /* At this point we've found a zero in the first partial word of
297 the source. We need to isolate the valid source data and mask
298 it into the original destination data. (Incidentally, we know
299 that we'll need at least one byte of that original dest word.) */
300
301 ldq_u t0, 0(a0) # e0 :
302 negq t8, t6 # .. e1 : build bitmask of bytes <= zero
303 mskqh t1, t4, t1 # e0 :
304 and t6, t8, t12 # .. e1 :
305 subq t12, 1, t6 # e0 :
306 or t6, t12, t8 # e1 :
307
308 zapnot t2, t8, t2 # e0 : prepare source word; mirror changes
309 zapnot t1, t8, t1 # .. e1 : to source validity mask
310
311 andnot t0, t2, t0 # e0 : zero place for source to reside
312 or t0, t1, t0 # e1 : and put it there
313 stq_u t0, 0(a0) # e0 :
314
315$finish_up:
316 zapnot t0, t12, t4 # was last byte written null?
317 cmovne t4, 1, t4
318
319 and t12, 0xf0, t3 # binary search for the address of the
320 and t12, 0xcc, t2 # last byte written
321 and t12, 0xaa, t1
322 bic a0, 7, t0
323 cmovne t3, 4, t3
324 cmovne t2, 2, t2
325 cmovne t1, 1, t1
326 addq t0, t3, t0
327 addq t1, t2, t1
328 addq t0, t1, t0
329 addq t0, t4, t0 # add one if we filled the buffer
330
331 subq t0, v0, v0 # find string length
332 ret
333
334$zerolength:
335 clr v0
336$exception:
337 ret
338
339 .end __strncpy_from_user
diff --git a/arch/alpha/mm/fault.c b/arch/alpha/mm/fault.c
index 5eecab1a84ef..0c4132dd3507 100644
--- a/arch/alpha/mm/fault.c
+++ b/arch/alpha/mm/fault.c
@@ -89,6 +89,8 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
89 const struct exception_table_entry *fixup; 89 const struct exception_table_entry *fixup;
90 int fault, si_code = SEGV_MAPERR; 90 int fault, si_code = SEGV_MAPERR;
91 siginfo_t info; 91 siginfo_t info;
92 unsigned int flags = (FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
93 (cause > 0 ? FAULT_FLAG_WRITE : 0));
92 94
93 /* As of EV6, a load into $31/$f31 is a prefetch, and never faults 95 /* As of EV6, a load into $31/$f31 is a prefetch, and never faults
94 (or is suppressed by the PALcode). Support that for older CPUs 96 (or is suppressed by the PALcode). Support that for older CPUs
@@ -114,6 +116,7 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
114 goto vmalloc_fault; 116 goto vmalloc_fault;
115#endif 117#endif
116 118
119retry:
117 down_read(&mm->mmap_sem); 120 down_read(&mm->mmap_sem);
118 vma = find_vma(mm, address); 121 vma = find_vma(mm, address);
119 if (!vma) 122 if (!vma)
@@ -144,8 +147,11 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
144 /* If for any reason at all we couldn't handle the fault, 147 /* If for any reason at all we couldn't handle the fault,
145 make sure we exit gracefully rather than endlessly redo 148 make sure we exit gracefully rather than endlessly redo
146 the fault. */ 149 the fault. */
147 fault = handle_mm_fault(mm, vma, address, cause > 0 ? FAULT_FLAG_WRITE : 0); 150 fault = handle_mm_fault(mm, vma, address, flags);
148 up_read(&mm->mmap_sem); 151
152 if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
153 return;
154
149 if (unlikely(fault & VM_FAULT_ERROR)) { 155 if (unlikely(fault & VM_FAULT_ERROR)) {
150 if (fault & VM_FAULT_OOM) 156 if (fault & VM_FAULT_OOM)
151 goto out_of_memory; 157 goto out_of_memory;
@@ -153,10 +159,26 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
153 goto do_sigbus; 159 goto do_sigbus;
154 BUG(); 160 BUG();
155 } 161 }
156 if (fault & VM_FAULT_MAJOR) 162
157 current->maj_flt++; 163 if (flags & FAULT_FLAG_ALLOW_RETRY) {
158 else 164 if (fault & VM_FAULT_MAJOR)
159 current->min_flt++; 165 current->maj_flt++;
166 else
167 current->min_flt++;
168 if (fault & VM_FAULT_RETRY) {
169 flags &= ~FAULT_FLAG_ALLOW_RETRY;
170
171 /* No need to up_read(&mm->mmap_sem) as we would
172 * have already released it in __lock_page_or_retry
173 * in mm/filemap.c.
174 */
175
176 goto retry;
177 }
178 }
179
180 up_read(&mm->mmap_sem);
181
160 return; 182 return;
161 183
162 /* Something tried to access memory that isn't in our memory map. 184 /* Something tried to access memory that isn't in our memory map.
@@ -186,12 +208,14 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
186 /* We ran out of memory, or some other thing happened to us that 208 /* We ran out of memory, or some other thing happened to us that
187 made us unable to handle the page fault gracefully. */ 209 made us unable to handle the page fault gracefully. */
188 out_of_memory: 210 out_of_memory:
211 up_read(&mm->mmap_sem);
189 if (!user_mode(regs)) 212 if (!user_mode(regs))
190 goto no_context; 213 goto no_context;
191 pagefault_out_of_memory(); 214 pagefault_out_of_memory();
192 return; 215 return;
193 216
194 do_sigbus: 217 do_sigbus:
218 up_read(&mm->mmap_sem);
195 /* Send a sigbus, regardless of whether we were in kernel 219 /* Send a sigbus, regardless of whether we were in kernel
196 or user mode. */ 220 or user mode. */
197 info.si_signo = SIGBUS; 221 info.si_signo = SIGBUS;
diff --git a/arch/alpha/oprofile/common.c b/arch/alpha/oprofile/common.c
index a0a5d27aa215..b8ce18f485d3 100644
--- a/arch/alpha/oprofile/common.c
+++ b/arch/alpha/oprofile/common.c
@@ -12,6 +12,7 @@
12#include <linux/smp.h> 12#include <linux/smp.h>
13#include <linux/errno.h> 13#include <linux/errno.h>
14#include <asm/ptrace.h> 14#include <asm/ptrace.h>
15#include <asm/special_insns.h>
15 16
16#include "op_impl.h" 17#include "op_impl.h"
17 18
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 7980873525b2..6d6e18fee9fe 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -38,7 +38,6 @@ config ARM
38 select HARDIRQS_SW_RESEND 38 select HARDIRQS_SW_RESEND
39 select GENERIC_IRQ_PROBE 39 select GENERIC_IRQ_PROBE
40 select GENERIC_IRQ_SHOW 40 select GENERIC_IRQ_SHOW
41 select GENERIC_IRQ_PROBE
42 select ARCH_WANT_IPC_PARSE_VERSION 41 select ARCH_WANT_IPC_PARSE_VERSION
43 select HARDIRQS_SW_RESEND 42 select HARDIRQS_SW_RESEND
44 select CPU_PM if (SUSPEND || CPU_IDLE) 43 select CPU_PM if (SUSPEND || CPU_IDLE)
@@ -126,11 +125,6 @@ config TRACE_IRQFLAGS_SUPPORT
126 bool 125 bool
127 default y 126 default y
128 127
129config GENERIC_LOCKBREAK
130 bool
131 default y
132 depends on SMP && PREEMPT
133
134config RWSEM_GENERIC_SPINLOCK 128config RWSEM_GENERIC_SPINLOCK
135 bool 129 bool
136 default y 130 default y
@@ -1151,6 +1145,7 @@ config PLAT_ORION
1151 bool 1145 bool
1152 select CLKSRC_MMIO 1146 select CLKSRC_MMIO
1153 select GENERIC_IRQ_CHIP 1147 select GENERIC_IRQ_CHIP
1148 select IRQ_DOMAIN
1154 select COMMON_CLK 1149 select COMMON_CLK
1155 1150
1156config PLAT_PXA 1151config PLAT_PXA
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index e1fa7e6edfe8..71d6b5d0daf1 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -12,7 +12,7 @@
12 * License version 2. This program is licensed "as is" without any 12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied. 13 * warranty of any kind, whether express or implied.
14 * 14 *
15 * Contains definitions specific to the Armada 370 SoC that are not 15 * Contains definitions specific to the Armada XP SoC that are not
16 * common to all Armada SoCs. 16 * common to all Armada SoCs.
17 */ 17 */
18 18
diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index a874dbfb5ae6..e6138310e5ce 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -51,11 +51,11 @@
51 51
52 dma-apbh@80004000 { 52 dma-apbh@80004000 {
53 compatible = "fsl,imx23-dma-apbh"; 53 compatible = "fsl,imx23-dma-apbh";
54 reg = <0x80004000 2000>; 54 reg = <0x80004000 0x2000>;
55 }; 55 };
56 56
57 ecc@80008000 { 57 ecc@80008000 {
58 reg = <0x80008000 2000>; 58 reg = <0x80008000 0x2000>;
59 status = "disabled"; 59 status = "disabled";
60 }; 60 };
61 61
@@ -63,7 +63,7 @@
63 compatible = "fsl,imx23-gpmi-nand"; 63 compatible = "fsl,imx23-gpmi-nand";
64 #address-cells = <1>; 64 #address-cells = <1>;
65 #size-cells = <1>; 65 #size-cells = <1>;
66 reg = <0x8000c000 2000>, <0x8000a000 2000>; 66 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
67 reg-names = "gpmi-nand", "bch"; 67 reg-names = "gpmi-nand", "bch";
68 interrupts = <13>, <56>; 68 interrupts = <13>, <56>;
69 interrupt-names = "gpmi-dma", "bch"; 69 interrupt-names = "gpmi-dma", "bch";
@@ -72,14 +72,14 @@
72 }; 72 };
73 73
74 ssp0: ssp@80010000 { 74 ssp0: ssp@80010000 {
75 reg = <0x80010000 2000>; 75 reg = <0x80010000 0x2000>;
76 interrupts = <15 14>; 76 interrupts = <15 14>;
77 fsl,ssp-dma-channel = <1>; 77 fsl,ssp-dma-channel = <1>;
78 status = "disabled"; 78 status = "disabled";
79 }; 79 };
80 80
81 etm@80014000 { 81 etm@80014000 {
82 reg = <0x80014000 2000>; 82 reg = <0x80014000 0x2000>;
83 status = "disabled"; 83 status = "disabled";
84 }; 84 };
85 85
@@ -87,7 +87,7 @@
87 #address-cells = <1>; 87 #address-cells = <1>;
88 #size-cells = <0>; 88 #size-cells = <0>;
89 compatible = "fsl,imx23-pinctrl", "simple-bus"; 89 compatible = "fsl,imx23-pinctrl", "simple-bus";
90 reg = <0x80018000 2000>; 90 reg = <0x80018000 0x2000>;
91 91
92 gpio0: gpio@0 { 92 gpio0: gpio@0 {
93 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio"; 93 compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
@@ -273,32 +273,32 @@
273 }; 273 };
274 274
275 emi@80020000 { 275 emi@80020000 {
276 reg = <0x80020000 2000>; 276 reg = <0x80020000 0x2000>;
277 status = "disabled"; 277 status = "disabled";
278 }; 278 };
279 279
280 dma-apbx@80024000 { 280 dma-apbx@80024000 {
281 compatible = "fsl,imx23-dma-apbx"; 281 compatible = "fsl,imx23-dma-apbx";
282 reg = <0x80024000 2000>; 282 reg = <0x80024000 0x2000>;
283 }; 283 };
284 284
285 dcp@80028000 { 285 dcp@80028000 {
286 reg = <0x80028000 2000>; 286 reg = <0x80028000 0x2000>;
287 status = "disabled"; 287 status = "disabled";
288 }; 288 };
289 289
290 pxp@8002a000 { 290 pxp@8002a000 {
291 reg = <0x8002a000 2000>; 291 reg = <0x8002a000 0x2000>;
292 status = "disabled"; 292 status = "disabled";
293 }; 293 };
294 294
295 ocotp@8002c000 { 295 ocotp@8002c000 {
296 reg = <0x8002c000 2000>; 296 reg = <0x8002c000 0x2000>;
297 status = "disabled"; 297 status = "disabled";
298 }; 298 };
299 299
300 axi-ahb@8002e000 { 300 axi-ahb@8002e000 {
301 reg = <0x8002e000 2000>; 301 reg = <0x8002e000 0x2000>;
302 status = "disabled"; 302 status = "disabled";
303 }; 303 };
304 304
@@ -310,14 +310,14 @@
310 }; 310 };
311 311
312 ssp1: ssp@80034000 { 312 ssp1: ssp@80034000 {
313 reg = <0x80034000 2000>; 313 reg = <0x80034000 0x2000>;
314 interrupts = <2 20>; 314 interrupts = <2 20>;
315 fsl,ssp-dma-channel = <2>; 315 fsl,ssp-dma-channel = <2>;
316 status = "disabled"; 316 status = "disabled";
317 }; 317 };
318 318
319 tvenc@80038000 { 319 tvenc@80038000 {
320 reg = <0x80038000 2000>; 320 reg = <0x80038000 0x2000>;
321 status = "disabled"; 321 status = "disabled";
322 }; 322 };
323 }; 323 };
@@ -330,37 +330,37 @@
330 ranges; 330 ranges;
331 331
332 clkctl@80040000 { 332 clkctl@80040000 {
333 reg = <0x80040000 2000>; 333 reg = <0x80040000 0x2000>;
334 status = "disabled"; 334 status = "disabled";
335 }; 335 };
336 336
337 saif0: saif@80042000 { 337 saif0: saif@80042000 {
338 reg = <0x80042000 2000>; 338 reg = <0x80042000 0x2000>;
339 status = "disabled"; 339 status = "disabled";
340 }; 340 };
341 341
342 power@80044000 { 342 power@80044000 {
343 reg = <0x80044000 2000>; 343 reg = <0x80044000 0x2000>;
344 status = "disabled"; 344 status = "disabled";
345 }; 345 };
346 346
347 saif1: saif@80046000 { 347 saif1: saif@80046000 {
348 reg = <0x80046000 2000>; 348 reg = <0x80046000 0x2000>;
349 status = "disabled"; 349 status = "disabled";
350 }; 350 };
351 351
352 audio-out@80048000 { 352 audio-out@80048000 {
353 reg = <0x80048000 2000>; 353 reg = <0x80048000 0x2000>;
354 status = "disabled"; 354 status = "disabled";
355 }; 355 };
356 356
357 audio-in@8004c000 { 357 audio-in@8004c000 {
358 reg = <0x8004c000 2000>; 358 reg = <0x8004c000 0x2000>;
359 status = "disabled"; 359 status = "disabled";
360 }; 360 };
361 361
362 lradc@80050000 { 362 lradc@80050000 {
363 reg = <0x80050000 2000>; 363 reg = <0x80050000 0x2000>;
364 status = "disabled"; 364 status = "disabled";
365 }; 365 };
366 366
@@ -370,26 +370,26 @@
370 }; 370 };
371 371
372 i2c@80058000 { 372 i2c@80058000 {
373 reg = <0x80058000 2000>; 373 reg = <0x80058000 0x2000>;
374 status = "disabled"; 374 status = "disabled";
375 }; 375 };
376 376
377 rtc@8005c000 { 377 rtc@8005c000 {
378 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc"; 378 compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
379 reg = <0x8005c000 2000>; 379 reg = <0x8005c000 0x2000>;
380 interrupts = <22>; 380 interrupts = <22>;
381 }; 381 };
382 382
383 pwm: pwm@80064000 { 383 pwm: pwm@80064000 {
384 compatible = "fsl,imx23-pwm"; 384 compatible = "fsl,imx23-pwm";
385 reg = <0x80064000 2000>; 385 reg = <0x80064000 0x2000>;
386 #pwm-cells = <2>; 386 #pwm-cells = <2>;
387 fsl,pwm-number = <5>; 387 fsl,pwm-number = <5>;
388 status = "disabled"; 388 status = "disabled";
389 }; 389 };
390 390
391 timrot@80068000 { 391 timrot@80068000 {
392 reg = <0x80068000 2000>; 392 reg = <0x80068000 0x2000>;
393 status = "disabled"; 393 status = "disabled";
394 }; 394 };
395 395
@@ -429,7 +429,7 @@
429 ranges; 429 ranges;
430 430
431 usbctrl@80080000 { 431 usbctrl@80080000 {
432 reg = <0x80080000 0x10000>; 432 reg = <0x80080000 0x40000>;
433 status = "disabled"; 433 status = "disabled";
434 }; 434 };
435 }; 435 };
diff --git a/arch/arm/boot/dts/imx27-3ds.dts b/arch/arm/boot/dts/imx27-3ds.dts
index d3f8296e19e0..0a8978a40ece 100644
--- a/arch/arm/boot/dts/imx27-3ds.dts
+++ b/arch/arm/boot/dts/imx27-3ds.dts
@@ -27,7 +27,7 @@
27 status = "okay"; 27 status = "okay";
28 }; 28 };
29 29
30 uart@1000a000 { 30 uart1: serial@1000a000 {
31 fsl,uart-has-rtscts; 31 fsl,uart-has-rtscts;
32 status = "okay"; 32 status = "okay";
33 }; 33 };
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index 00bae3aad5ab..5303ab680a34 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -19,6 +19,12 @@
19 serial3 = &uart4; 19 serial3 = &uart4;
20 serial4 = &uart5; 20 serial4 = &uart5;
21 serial5 = &uart6; 21 serial5 = &uart6;
22 gpio0 = &gpio1;
23 gpio1 = &gpio2;
24 gpio2 = &gpio3;
25 gpio3 = &gpio4;
26 gpio4 = &gpio5;
27 gpio5 = &gpio6;
22 }; 28 };
23 29
24 avic: avic-interrupt-controller@e0000000 { 30 avic: avic-interrupt-controller@e0000000 {
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 787efac68da8..3fa6d190fab4 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -57,18 +57,18 @@
57 }; 57 };
58 58
59 hsadc@80002000 { 59 hsadc@80002000 {
60 reg = <0x80002000 2000>; 60 reg = <0x80002000 0x2000>;
61 interrupts = <13 87>; 61 interrupts = <13 87>;
62 status = "disabled"; 62 status = "disabled";
63 }; 63 };
64 64
65 dma-apbh@80004000 { 65 dma-apbh@80004000 {
66 compatible = "fsl,imx28-dma-apbh"; 66 compatible = "fsl,imx28-dma-apbh";
67 reg = <0x80004000 2000>; 67 reg = <0x80004000 0x2000>;
68 }; 68 };
69 69
70 perfmon@80006000 { 70 perfmon@80006000 {
71 reg = <0x80006000 800>; 71 reg = <0x80006000 0x800>;
72 interrupts = <27>; 72 interrupts = <27>;
73 status = "disabled"; 73 status = "disabled";
74 }; 74 };
@@ -77,7 +77,7 @@
77 compatible = "fsl,imx28-gpmi-nand"; 77 compatible = "fsl,imx28-gpmi-nand";
78 #address-cells = <1>; 78 #address-cells = <1>;
79 #size-cells = <1>; 79 #size-cells = <1>;
80 reg = <0x8000c000 2000>, <0x8000a000 2000>; 80 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
81 reg-names = "gpmi-nand", "bch"; 81 reg-names = "gpmi-nand", "bch";
82 interrupts = <88>, <41>; 82 interrupts = <88>, <41>;
83 interrupt-names = "gpmi-dma", "bch"; 83 interrupt-names = "gpmi-dma", "bch";
@@ -86,28 +86,28 @@
86 }; 86 };
87 87
88 ssp0: ssp@80010000 { 88 ssp0: ssp@80010000 {
89 reg = <0x80010000 2000>; 89 reg = <0x80010000 0x2000>;
90 interrupts = <96 82>; 90 interrupts = <96 82>;
91 fsl,ssp-dma-channel = <0>; 91 fsl,ssp-dma-channel = <0>;
92 status = "disabled"; 92 status = "disabled";
93 }; 93 };
94 94
95 ssp1: ssp@80012000 { 95 ssp1: ssp@80012000 {
96 reg = <0x80012000 2000>; 96 reg = <0x80012000 0x2000>;
97 interrupts = <97 83>; 97 interrupts = <97 83>;
98 fsl,ssp-dma-channel = <1>; 98 fsl,ssp-dma-channel = <1>;
99 status = "disabled"; 99 status = "disabled";
100 }; 100 };
101 101
102 ssp2: ssp@80014000 { 102 ssp2: ssp@80014000 {
103 reg = <0x80014000 2000>; 103 reg = <0x80014000 0x2000>;
104 interrupts = <98 84>; 104 interrupts = <98 84>;
105 fsl,ssp-dma-channel = <2>; 105 fsl,ssp-dma-channel = <2>;
106 status = "disabled"; 106 status = "disabled";
107 }; 107 };
108 108
109 ssp3: ssp@80016000 { 109 ssp3: ssp@80016000 {
110 reg = <0x80016000 2000>; 110 reg = <0x80016000 0x2000>;
111 interrupts = <99 85>; 111 interrupts = <99 85>;
112 fsl,ssp-dma-channel = <3>; 112 fsl,ssp-dma-channel = <3>;
113 status = "disabled"; 113 status = "disabled";
@@ -117,7 +117,7 @@
117 #address-cells = <1>; 117 #address-cells = <1>;
118 #size-cells = <0>; 118 #size-cells = <0>;
119 compatible = "fsl,imx28-pinctrl", "simple-bus"; 119 compatible = "fsl,imx28-pinctrl", "simple-bus";
120 reg = <0x80018000 2000>; 120 reg = <0x80018000 0x2000>;
121 121
122 gpio0: gpio@0 { 122 gpio0: gpio@0 {
123 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio"; 123 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
@@ -510,96 +510,96 @@
510 }; 510 };
511 511
512 digctl@8001c000 { 512 digctl@8001c000 {
513 reg = <0x8001c000 2000>; 513 reg = <0x8001c000 0x2000>;
514 interrupts = <89>; 514 interrupts = <89>;
515 status = "disabled"; 515 status = "disabled";
516 }; 516 };
517 517
518 etm@80022000 { 518 etm@80022000 {
519 reg = <0x80022000 2000>; 519 reg = <0x80022000 0x2000>;
520 status = "disabled"; 520 status = "disabled";
521 }; 521 };
522 522
523 dma-apbx@80024000 { 523 dma-apbx@80024000 {
524 compatible = "fsl,imx28-dma-apbx"; 524 compatible = "fsl,imx28-dma-apbx";
525 reg = <0x80024000 2000>; 525 reg = <0x80024000 0x2000>;
526 }; 526 };
527 527
528 dcp@80028000 { 528 dcp@80028000 {
529 reg = <0x80028000 2000>; 529 reg = <0x80028000 0x2000>;
530 interrupts = <52 53 54>; 530 interrupts = <52 53 54>;
531 status = "disabled"; 531 status = "disabled";
532 }; 532 };
533 533
534 pxp@8002a000 { 534 pxp@8002a000 {
535 reg = <0x8002a000 2000>; 535 reg = <0x8002a000 0x2000>;
536 interrupts = <39>; 536 interrupts = <39>;
537 status = "disabled"; 537 status = "disabled";
538 }; 538 };
539 539
540 ocotp@8002c000 { 540 ocotp@8002c000 {
541 reg = <0x8002c000 2000>; 541 reg = <0x8002c000 0x2000>;
542 status = "disabled"; 542 status = "disabled";
543 }; 543 };
544 544
545 axi-ahb@8002e000 { 545 axi-ahb@8002e000 {
546 reg = <0x8002e000 2000>; 546 reg = <0x8002e000 0x2000>;
547 status = "disabled"; 547 status = "disabled";
548 }; 548 };
549 549
550 lcdif@80030000 { 550 lcdif@80030000 {
551 compatible = "fsl,imx28-lcdif"; 551 compatible = "fsl,imx28-lcdif";
552 reg = <0x80030000 2000>; 552 reg = <0x80030000 0x2000>;
553 interrupts = <38 86>; 553 interrupts = <38 86>;
554 status = "disabled"; 554 status = "disabled";
555 }; 555 };
556 556
557 can0: can@80032000 { 557 can0: can@80032000 {
558 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan"; 558 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
559 reg = <0x80032000 2000>; 559 reg = <0x80032000 0x2000>;
560 interrupts = <8>; 560 interrupts = <8>;
561 status = "disabled"; 561 status = "disabled";
562 }; 562 };
563 563
564 can1: can@80034000 { 564 can1: can@80034000 {
565 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan"; 565 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
566 reg = <0x80034000 2000>; 566 reg = <0x80034000 0x2000>;
567 interrupts = <9>; 567 interrupts = <9>;
568 status = "disabled"; 568 status = "disabled";
569 }; 569 };
570 570
571 simdbg@8003c000 { 571 simdbg@8003c000 {
572 reg = <0x8003c000 200>; 572 reg = <0x8003c000 0x200>;
573 status = "disabled"; 573 status = "disabled";
574 }; 574 };
575 575
576 simgpmisel@8003c200 { 576 simgpmisel@8003c200 {
577 reg = <0x8003c200 100>; 577 reg = <0x8003c200 0x100>;
578 status = "disabled"; 578 status = "disabled";
579 }; 579 };
580 580
581 simsspsel@8003c300 { 581 simsspsel@8003c300 {
582 reg = <0x8003c300 100>; 582 reg = <0x8003c300 0x100>;
583 status = "disabled"; 583 status = "disabled";
584 }; 584 };
585 585
586 simmemsel@8003c400 { 586 simmemsel@8003c400 {
587 reg = <0x8003c400 100>; 587 reg = <0x8003c400 0x100>;
588 status = "disabled"; 588 status = "disabled";
589 }; 589 };
590 590
591 gpiomon@8003c500 { 591 gpiomon@8003c500 {
592 reg = <0x8003c500 100>; 592 reg = <0x8003c500 0x100>;
593 status = "disabled"; 593 status = "disabled";
594 }; 594 };
595 595
596 simenet@8003c700 { 596 simenet@8003c700 {
597 reg = <0x8003c700 100>; 597 reg = <0x8003c700 0x100>;
598 status = "disabled"; 598 status = "disabled";
599 }; 599 };
600 600
601 armjtag@8003c800 { 601 armjtag@8003c800 {
602 reg = <0x8003c800 100>; 602 reg = <0x8003c800 0x100>;
603 status = "disabled"; 603 status = "disabled";
604 }; 604 };
605 }; 605 };
@@ -612,45 +612,45 @@
612 ranges; 612 ranges;
613 613
614 clkctl@80040000 { 614 clkctl@80040000 {
615 reg = <0x80040000 2000>; 615 reg = <0x80040000 0x2000>;
616 status = "disabled"; 616 status = "disabled";
617 }; 617 };
618 618
619 saif0: saif@80042000 { 619 saif0: saif@80042000 {
620 compatible = "fsl,imx28-saif"; 620 compatible = "fsl,imx28-saif";
621 reg = <0x80042000 2000>; 621 reg = <0x80042000 0x2000>;
622 interrupts = <59 80>; 622 interrupts = <59 80>;
623 fsl,saif-dma-channel = <4>; 623 fsl,saif-dma-channel = <4>;
624 status = "disabled"; 624 status = "disabled";
625 }; 625 };
626 626
627 power@80044000 { 627 power@80044000 {
628 reg = <0x80044000 2000>; 628 reg = <0x80044000 0x2000>;
629 status = "disabled"; 629 status = "disabled";
630 }; 630 };
631 631
632 saif1: saif@80046000 { 632 saif1: saif@80046000 {
633 compatible = "fsl,imx28-saif"; 633 compatible = "fsl,imx28-saif";
634 reg = <0x80046000 2000>; 634 reg = <0x80046000 0x2000>;
635 interrupts = <58 81>; 635 interrupts = <58 81>;
636 fsl,saif-dma-channel = <5>; 636 fsl,saif-dma-channel = <5>;
637 status = "disabled"; 637 status = "disabled";
638 }; 638 };
639 639
640 lradc@80050000 { 640 lradc@80050000 {
641 reg = <0x80050000 2000>; 641 reg = <0x80050000 0x2000>;
642 status = "disabled"; 642 status = "disabled";
643 }; 643 };
644 644
645 spdif@80054000 { 645 spdif@80054000 {
646 reg = <0x80054000 2000>; 646 reg = <0x80054000 0x2000>;
647 interrupts = <45 66>; 647 interrupts = <45 66>;
648 status = "disabled"; 648 status = "disabled";
649 }; 649 };
650 650
651 rtc@80056000 { 651 rtc@80056000 {
652 compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc"; 652 compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
653 reg = <0x80056000 2000>; 653 reg = <0x80056000 0x2000>;
654 interrupts = <29>; 654 interrupts = <29>;
655 }; 655 };
656 656
@@ -658,7 +658,7 @@
658 #address-cells = <1>; 658 #address-cells = <1>;
659 #size-cells = <0>; 659 #size-cells = <0>;
660 compatible = "fsl,imx28-i2c"; 660 compatible = "fsl,imx28-i2c";
661 reg = <0x80058000 2000>; 661 reg = <0x80058000 0x2000>;
662 interrupts = <111 68>; 662 interrupts = <111 68>;
663 clock-frequency = <100000>; 663 clock-frequency = <100000>;
664 status = "disabled"; 664 status = "disabled";
@@ -668,7 +668,7 @@
668 #address-cells = <1>; 668 #address-cells = <1>;
669 #size-cells = <0>; 669 #size-cells = <0>;
670 compatible = "fsl,imx28-i2c"; 670 compatible = "fsl,imx28-i2c";
671 reg = <0x8005a000 2000>; 671 reg = <0x8005a000 0x2000>;
672 interrupts = <110 69>; 672 interrupts = <110 69>;
673 clock-frequency = <100000>; 673 clock-frequency = <100000>;
674 status = "disabled"; 674 status = "disabled";
@@ -676,14 +676,14 @@
676 676
677 pwm: pwm@80064000 { 677 pwm: pwm@80064000 {
678 compatible = "fsl,imx28-pwm", "fsl,imx23-pwm"; 678 compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
679 reg = <0x80064000 2000>; 679 reg = <0x80064000 0x2000>;
680 #pwm-cells = <2>; 680 #pwm-cells = <2>;
681 fsl,pwm-number = <8>; 681 fsl,pwm-number = <8>;
682 status = "disabled"; 682 status = "disabled";
683 }; 683 };
684 684
685 timrot@80068000 { 685 timrot@80068000 {
686 reg = <0x80068000 2000>; 686 reg = <0x80068000 0x2000>;
687 status = "disabled"; 687 status = "disabled";
688 }; 688 };
689 689
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index de065b5976e6..cd86177a3ea2 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -53,7 +53,7 @@
53 spi-max-frequency = <6000000>; 53 spi-max-frequency = <6000000>;
54 reg = <0>; 54 reg = <0>;
55 interrupt-parent = <&gpio1>; 55 interrupt-parent = <&gpio1>;
56 interrupts = <8>; 56 interrupts = <8 0x4>;
57 57
58 regulators { 58 regulators {
59 sw1_reg: sw1 { 59 sw1_reg: sw1 {
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 53cbaa3d4f90..aba28dc87fc8 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -17,6 +17,10 @@
17 serial0 = &uart1; 17 serial0 = &uart1;
18 serial1 = &uart2; 18 serial1 = &uart2;
19 serial2 = &uart3; 19 serial2 = &uart3;
20 gpio0 = &gpio1;
21 gpio1 = &gpio2;
22 gpio2 = &gpio3;
23 gpio3 = &gpio4;
20 }; 24 };
21 25
22 tzic: tz-interrupt-controller@e0000000 { 26 tzic: tz-interrupt-controller@e0000000 {
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
index 5b8eafcdbeec..da895e93a999 100644
--- a/arch/arm/boot/dts/imx53-ard.dts
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -64,12 +64,32 @@
64 reg = <0xf4000000 0x2000000>; 64 reg = <0xf4000000 0x2000000>;
65 phy-mode = "mii"; 65 phy-mode = "mii";
66 interrupt-parent = <&gpio2>; 66 interrupt-parent = <&gpio2>;
67 interrupts = <31>; 67 interrupts = <31 0x8>;
68 reg-io-width = <4>; 68 reg-io-width = <4>;
69 /*
70 * VDD33A and VDDVARIO of LAN9220 are supplied by
71 * SW4_3V3 of LTC3589. Before the regulator driver
72 * for this PMIC is available, we use a fixed dummy
73 * 3V3 regulator to get LAN9220 driver probing work.
74 */
75 vdd33a-supply = <&reg_3p3v>;
76 vddvario-supply = <&reg_3p3v>;
69 smsc,irq-push-pull; 77 smsc,irq-push-pull;
70 }; 78 };
71 }; 79 };
72 80
81 regulators {
82 compatible = "simple-bus";
83
84 reg_3p3v: 3p3v {
85 compatible = "regulator-fixed";
86 regulator-name = "3P3V";
87 regulator-min-microvolt = <3300000>;
88 regulator-max-microvolt = <3300000>;
89 regulator-always-on;
90 };
91 };
92
73 gpio-keys { 93 gpio-keys {
74 compatible = "gpio-keys"; 94 compatible = "gpio-keys";
75 95
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index fc79cdc4b4e6..cd37165edce5 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -19,6 +19,13 @@
19 serial2 = &uart3; 19 serial2 = &uart3;
20 serial3 = &uart4; 20 serial3 = &uart4;
21 serial4 = &uart5; 21 serial4 = &uart5;
22 gpio0 = &gpio1;
23 gpio1 = &gpio2;
24 gpio2 = &gpio3;
25 gpio3 = &gpio4;
26 gpio4 = &gpio5;
27 gpio5 = &gpio6;
28 gpio6 = &gpio7;
22 }; 29 };
23 30
24 tzic: tz-interrupt-controller@0fffc000 { 31 tzic: tz-interrupt-controller@0fffc000 {
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
index d42e851ceb97..72f30f3e6171 100644
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -53,6 +53,7 @@
53 fsl,pins = < 53 fsl,pins = <
54 144 0x80000000 /* MX6Q_PAD_EIM_D22__GPIO_3_22 */ 54 144 0x80000000 /* MX6Q_PAD_EIM_D22__GPIO_3_22 */
55 121 0x80000000 /* MX6Q_PAD_EIM_D19__GPIO_3_19 */ 55 121 0x80000000 /* MX6Q_PAD_EIM_D19__GPIO_3_19 */
56 953 0x80000000 /* MX6Q_PAD_GPIO_0__CCM_CLKO */
56 >; 57 >;
57 }; 58 };
58 }; 59 };
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 3d3c64b014e6..fd57079f71a9 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -19,6 +19,13 @@
19 serial2 = &uart3; 19 serial2 = &uart3;
20 serial3 = &uart4; 20 serial3 = &uart4;
21 serial4 = &uart5; 21 serial4 = &uart5;
22 gpio0 = &gpio1;
23 gpio1 = &gpio2;
24 gpio2 = &gpio3;
25 gpio3 = &gpio4;
26 gpio4 = &gpio5;
27 gpio5 = &gpio6;
28 gpio6 = &gpio7;
22 }; 29 };
23 30
24 cpus { 31 cpus {
diff --git a/arch/arm/boot/dts/kirkwood-dns320.dts b/arch/arm/boot/dts/kirkwood-dns320.dts
index 9a33077130e8..5bb0bf39d3b8 100644
--- a/arch/arm/boot/dts/kirkwood-dns320.dts
+++ b/arch/arm/boot/dts/kirkwood-dns320.dts
@@ -1,6 +1,6 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/include/ "kirkwood.dtsi" 3/include/ "kirkwood-dnskw.dtsi"
4 4
5/ { 5/ {
6 model = "D-Link DNS-320 NAS (Rev A1)"; 6 model = "D-Link DNS-320 NAS (Rev A1)";
@@ -15,6 +15,31 @@
15 bootargs = "console=ttyS0,115200n8 earlyprintk"; 15 bootargs = "console=ttyS0,115200n8 earlyprintk";
16 }; 16 };
17 17
18 gpio-leds {
19 compatible = "gpio-leds";
20 blue-power {
21 label = "dns320:blue:power";
22 gpios = <&gpio0 26 1>; /* GPIO 26 Active Low */
23 linux,default-trigger = "default-on";
24 };
25 blue-usb {
26 label = "dns320:blue:usb";
27 gpios = <&gpio1 11 1>; /* GPIO 43 Active Low */
28 };
29 orange-l_hdd {
30 label = "dns320:orange:l_hdd";
31 gpios = <&gpio0 28 1>; /* GPIO 28 Active Low */
32 };
33 orange-r_hdd {
34 label = "dns320:orange:r_hdd";
35 gpios = <&gpio0 27 1>; /* GPIO 27 Active Low */
36 };
37 orange-usb {
38 label = "dns320:orange:usb";
39 gpios = <&gpio1 3 1>; /* GPIO 35 Active Low */
40 };
41 };
42
18 ocp@f1000000 { 43 ocp@f1000000 {
19 serial@12000 { 44 serial@12000 {
20 clock-frequency = <166666667>; 45 clock-frequency = <166666667>;
@@ -25,40 +50,5 @@
25 clock-frequency = <166666667>; 50 clock-frequency = <166666667>;
26 status = "okay"; 51 status = "okay";
27 }; 52 };
28
29 nand@3000000 {
30 status = "okay";
31
32 partition@0 {
33 label = "u-boot";
34 reg = <0x0000000 0x100000>;
35 read-only;
36 };
37
38 partition@100000 {
39 label = "uImage";
40 reg = <0x0100000 0x500000>;
41 };
42
43 partition@600000 {
44 label = "ramdisk";
45 reg = <0x0600000 0x500000>;
46 };
47
48 partition@b00000 {
49 label = "image";
50 reg = <0x0b00000 0x6600000>;
51 };
52
53 partition@7100000 {
54 label = "mini firmware";
55 reg = <0x7100000 0xa00000>;
56 };
57
58 partition@7b00000 {
59 label = "config";
60 reg = <0x7b00000 0x500000>;
61 };
62 };
63 }; 53 };
64}; 54};
diff --git a/arch/arm/boot/dts/kirkwood-dns325.dts b/arch/arm/boot/dts/kirkwood-dns325.dts
index 16734c1b5dfe..d430713ea9b9 100644
--- a/arch/arm/boot/dts/kirkwood-dns325.dts
+++ b/arch/arm/boot/dts/kirkwood-dns325.dts
@@ -1,6 +1,6 @@
1/dts-v1/; 1/dts-v1/;
2 2
3/include/ "kirkwood.dtsi" 3/include/ "kirkwood-dnskw.dtsi"
4 4
5/ { 5/ {
6 model = "D-Link DNS-325 NAS (Rev A1)"; 6 model = "D-Link DNS-325 NAS (Rev A1)";
@@ -15,45 +15,43 @@
15 bootargs = "console=ttyS0,115200n8 earlyprintk"; 15 bootargs = "console=ttyS0,115200n8 earlyprintk";
16 }; 16 };
17 17
18 ocp@f1000000 { 18 gpio-leds {
19 serial@12000 { 19 compatible = "gpio-leds";
20 clock-frequency = <200000000>; 20 white-power {
21 status = "okay"; 21 label = "dns325:white:power";
22 gpios = <&gpio0 26 1>; /* GPIO 26 Active Low */
23 linux,default-trigger = "default-on";
24 };
25 white-usb {
26 label = "dns325:white:usb";
27 gpios = <&gpio1 11 1>; /* GPIO 43 Active Low */
28 };
29 red-l_hdd {
30 label = "dns325:red:l_hdd";
31 gpios = <&gpio0 28 1>; /* GPIO 28 Active Low */
22 }; 32 };
33 red-r_hdd {
34 label = "dns325:red:r_hdd";
35 gpios = <&gpio0 27 1>; /* GPIO 27 Active Low */
36 };
37 red-usb {
38 label = "dns325:red:usb";
39 gpios = <&gpio0 29 1>; /* GPIO 29 Active Low */
40 };
41 };
23 42
24 nand@3000000 { 43 ocp@f1000000 {
44 i2c@11000 {
25 status = "okay"; 45 status = "okay";
26 46
27 partition@0 { 47 lm75: lm75@48 {
28 label = "u-boot"; 48 compatible = "national,lm75";
29 reg = <0x0000000 0x100000>; 49 reg = <0x48>;
30 read-only;
31 };
32
33 partition@100000 {
34 label = "uImage";
35 reg = <0x0100000 0x500000>;
36 };
37
38 partition@600000 {
39 label = "ramdisk";
40 reg = <0x0600000 0x500000>;
41 };
42
43 partition@b00000 {
44 label = "image";
45 reg = <0x0b00000 0x6600000>;
46 };
47
48 partition@7100000 {
49 label = "mini firmware";
50 reg = <0x7100000 0xa00000>;
51 };
52
53 partition@7b00000 {
54 label = "config";
55 reg = <0x7b00000 0x500000>;
56 }; 50 };
57 }; 51 };
52 serial@12000 {
53 clock-frequency = <200000000>;
54 status = "okay";
55 };
58 }; 56 };
59}; 57};
diff --git a/arch/arm/boot/dts/kirkwood-dnskw.dtsi b/arch/arm/boot/dts/kirkwood-dnskw.dtsi
new file mode 100644
index 000000000000..7408655f91b5
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-dnskw.dtsi
@@ -0,0 +1,69 @@
1/include/ "kirkwood.dtsi"
2
3/ {
4 model = "D-Link DNS NASes (kirkwood-based)";
5 compatible = "dlink,dns-kirkwood", "marvell,kirkwood-88f6281", "marvell,kirkwood";
6
7 gpio_keys {
8 compatible = "gpio-keys";
9 #address-cells = <1>;
10 #size-cells = <0>;
11 button@1 {
12 label = "Power button";
13 linux,code = <116>;
14 gpios = <&gpio1 2 1>;
15 };
16 button@2 {
17 label = "USB unmount button";
18 linux,code = <161>;
19 gpios = <&gpio1 15 1>;
20 };
21 button@3 {
22 label = "Reset button";
23 linux,code = <0x198>;
24 gpios = <&gpio1 16 1>;
25 };
26 };
27
28 ocp@f1000000 {
29 sata@80000 {
30 status = "okay";
31 nr-ports = <2>;
32 };
33
34 nand@3000000 {
35 status = "okay";
36
37 partition@0 {
38 label = "u-boot";
39 reg = <0x0000000 0x100000>;
40 read-only;
41 };
42
43 partition@100000 {
44 label = "uImage";
45 reg = <0x0100000 0x500000>;
46 };
47
48 partition@600000 {
49 label = "ramdisk";
50 reg = <0x0600000 0x500000>;
51 };
52
53 partition@b00000 {
54 label = "image";
55 reg = <0x0b00000 0x6600000>;
56 };
57
58 partition@7100000 {
59 label = "mini firmware";
60 reg = <0x7100000 0xa00000>;
61 };
62
63 partition@7b00000 {
64 label = "config";
65 reg = <0x7b00000 0x500000>;
66 };
67 };
68 };
69};
diff --git a/arch/arm/boot/dts/kirkwood-dreamplug.dts b/arch/arm/boot/dts/kirkwood-dreamplug.dts
index 78b0f06a09a2..26e281fbf6bc 100644
--- a/arch/arm/boot/dts/kirkwood-dreamplug.dts
+++ b/arch/arm/boot/dts/kirkwood-dreamplug.dts
@@ -20,5 +20,55 @@
20 clock-frequency = <200000000>; 20 clock-frequency = <200000000>;
21 status = "ok"; 21 status = "ok";
22 }; 22 };
23
24 spi@10600 {
25 status = "okay";
26
27 m25p40@0 {
28 #address-cells = <1>;
29 #size-cells = <1>;
30 compatible = "mx25l1606e";
31 reg = <0>;
32 spi-max-frequency = <50000000>;
33 mode = <0>;
34
35 partition@0 {
36 reg = <0x0 0x80000>;
37 label = "u-boot";
38 };
39
40 partition@100000 {
41 reg = <0x100000 0x10000>;
42 label = "u-boot env";
43 };
44
45 partition@180000 {
46 reg = <0x180000 0x10000>;
47 label = "dtb";
48 };
49 };
50 };
51
52 sata@80000 {
53 status = "okay";
54 nr-ports = <1>;
55 };
56 };
57
58 gpio-leds {
59 compatible = "gpio-leds";
60
61 bluetooth {
62 label = "dreamplug:blue:bluetooth";
63 gpios = <&gpio1 15 1>;
64 };
65 wifi {
66 label = "dreamplug:green:wifi";
67 gpios = <&gpio1 16 1>;
68 };
69 wifi-ap {
70 label = "dreamplug:green:wifi_ap";
71 gpios = <&gpio1 17 1>;
72 };
23 }; 73 };
24}; 74};
diff --git a/arch/arm/boot/dts/kirkwood-goflexnet.dts b/arch/arm/boot/dts/kirkwood-goflexnet.dts
new file mode 100644
index 000000000000..7c8238fbb6f9
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-goflexnet.dts
@@ -0,0 +1,99 @@
1/dts-v1/;
2
3/include/ "kirkwood.dtsi"
4
5/ {
6 model = "Seagate GoFlex Net";
7 compatible = "seagate,goflexnet", "marvell,kirkwood-88f6281", "marvell,kirkwood";
8
9 memory {
10 device_type = "memory";
11 reg = <0x00000000 0x8000000>;
12 };
13
14 chosen {
15 bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10";
16 };
17
18 ocp@f1000000 {
19 serial@12000 {
20 clock-frequency = <200000000>;
21 status = "ok";
22 };
23
24 nand@3000000 {
25 status = "okay";
26
27 partition@0 {
28 label = "u-boot";
29 reg = <0x0000000 0x100000>;
30 read-only;
31 };
32
33 partition@100000 {
34 label = "uImage";
35 reg = <0x0100000 0x400000>;
36 };
37
38 partition@500000 {
39 label = "pogoplug";
40 reg = <0x0500000 0x2000000>;
41 };
42
43 partition@2500000 {
44 label = "root";
45 reg = <0x02500000 0xd800000>;
46 };
47 };
48 sata@80000 {
49 status = "okay";
50 nr-ports = <2>;
51 };
52
53 };
54 gpio-leds {
55 compatible = "gpio-leds";
56
57 health {
58 label = "status:green:health";
59 gpios = <&gpio1 14 1>;
60 linux,default-trigger = "default-on";
61 };
62 fault {
63 label = "status:orange:fault";
64 gpios = <&gpio1 15 1>;
65 };
66 left0 {
67 label = "status:white:left0";
68 gpios = <&gpio1 10 0>;
69 };
70 left1 {
71 label = "status:white:left1";
72 gpios = <&gpio1 11 0>;
73 };
74 left2 {
75 label = "status:white:left2";
76 gpios = <&gpio1 12 0>;
77 };
78 left3 {
79 label = "status:white:left3";
80 gpios = <&gpio1 13 0>;
81 };
82 right0 {
83 label = "status:white:right0";
84 gpios = <&gpio1 6 0>;
85 };
86 right1 {
87 label = "status:white:right1";
88 gpios = <&gpio1 7 0>;
89 };
90 right2 {
91 label = "status:white:right2";
92 gpios = <&gpio1 8 0>;
93 };
94 right3 {
95 label = "status:white:right3";
96 gpios = <&gpio1 9 0>;
97 };
98 };
99};
diff --git a/arch/arm/boot/dts/kirkwood-ib62x0.dts b/arch/arm/boot/dts/kirkwood-ib62x0.dts
index f59dcf6dc45f..66794ed75ff1 100644
--- a/arch/arm/boot/dts/kirkwood-ib62x0.dts
+++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts
@@ -21,6 +21,11 @@
21 status = "okay"; 21 status = "okay";
22 }; 22 };
23 23
24 sata@80000 {
25 status = "okay";
26 nr-ports = <2>;
27 };
28
24 nand@3000000 { 29 nand@3000000 {
25 status = "okay"; 30 status = "okay";
26 31
@@ -41,4 +46,37 @@
41 46
42 }; 47 };
43 }; 48 };
49
50 gpio_keys {
51 compatible = "gpio-keys";
52 #address-cells = <1>;
53 #size-cells = <0>;
54 button@1 {
55 label = "USB Copy";
56 linux,code = <133>;
57 gpios = <&gpio0 29 1>;
58 };
59 button@2 {
60 label = "Reset";
61 linux,code = <0x198>;
62 gpios = <&gpio0 28 1>;
63 };
64 };
65 gpio-leds {
66 compatible = "gpio-leds";
67
68 green-os {
69 label = "ib62x0:green:os";
70 gpios = <&gpio0 25 0>;
71 linux,default-trigger = "default-on";
72 };
73 red-os {
74 label = "ib62x0:red:os";
75 gpios = <&gpio0 22 0>;
76 };
77 usb-copy {
78 label = "ib62x0:red:usb_copy";
79 gpios = <&gpio0 27 0>;
80 };
81 };
44}; 82};
diff --git a/arch/arm/boot/dts/kirkwood-iconnect.dts b/arch/arm/boot/dts/kirkwood-iconnect.dts
index 026a1f82d813..52d947045106 100644
--- a/arch/arm/boot/dts/kirkwood-iconnect.dts
+++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
@@ -18,9 +18,51 @@
18 }; 18 };
19 19
20 ocp@f1000000 { 20 ocp@f1000000 {
21 i2c@11000 {
22 status = "okay";
23
24 lm63: lm63@4c {
25 compatible = "national,lm63";
26 reg = <0x4c>;
27 };
28 };
21 serial@12000 { 29 serial@12000 {
22 clock-frequency = <200000000>; 30 clock-frequency = <200000000>;
23 status = "ok"; 31 status = "ok";
24 }; 32 };
25 }; 33 };
34 gpio-leds {
35 compatible = "gpio-leds";
36
37 led-level {
38 label = "led_level";
39 gpios = <&gpio1 9 0>;
40 linux,default-trigger = "default-on";
41 };
42 power-blue {
43 label = "power:blue";
44 gpios = <&gpio1 11 0>;
45 linux,default-trigger = "timer";
46 };
47 usb1 {
48 label = "usb1:blue";
49 gpios = <&gpio1 12 0>;
50 };
51 usb2 {
52 label = "usb2:blue";
53 gpios = <&gpio1 13 0>;
54 };
55 usb3 {
56 label = "usb3:blue";
57 gpios = <&gpio1 14 0>;
58 };
59 usb4 {
60 label = "usb4:blue";
61 gpios = <&gpio1 15 0>;
62 };
63 otb {
64 label = "otb:blue";
65 gpios = <&gpio1 16 0>;
66 };
67 };
26}; 68};
diff --git a/arch/arm/boot/dts/kirkwood-lschlv2.dts b/arch/arm/boot/dts/kirkwood-lschlv2.dts
new file mode 100644
index 000000000000..9510c9ea666c
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-lschlv2.dts
@@ -0,0 +1,20 @@
1/dts-v1/;
2
3/include/ "kirkwood-lsxl.dtsi"
4
5/ {
6 model = "Buffalo Linkstation LS-CHLv2";
7 compatible = "buffalo,lschlv2", "buffalo,lsxl", "marvell,kirkwood-88f6281", "marvell,kirkwood";
8
9 memory {
10 device_type = "memory";
11 reg = <0x00000000 0x4000000>;
12 };
13
14 ocp@f1000000 {
15 serial@12000 {
16 clock-frequency = <166666667>;
17 status = "okay";
18 };
19 };
20};
diff --git a/arch/arm/boot/dts/kirkwood-lsxhl.dts b/arch/arm/boot/dts/kirkwood-lsxhl.dts
new file mode 100644
index 000000000000..739019c4cba9
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-lsxhl.dts
@@ -0,0 +1,20 @@
1/dts-v1/;
2
3/include/ "kirkwood-lsxl.dtsi"
4
5/ {
6 model = "Buffalo Linkstation LS-XHL";
7 compatible = "buffalo,lsxhl", "buffalo,lsxl", "marvell,kirkwood-88f6281", "marvell,kirkwood";
8
9 memory {
10 device_type = "memory";
11 reg = <0x00000000 0x10000000>;
12 };
13
14 ocp@f1000000 {
15 serial@12000 {
16 clock-frequency = <200000000>;
17 status = "okay";
18 };
19 };
20};
diff --git a/arch/arm/boot/dts/kirkwood-lsxl.dtsi b/arch/arm/boot/dts/kirkwood-lsxl.dtsi
new file mode 100644
index 000000000000..8ac51c08269d
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-lsxl.dtsi
@@ -0,0 +1,95 @@
1/include/ "kirkwood.dtsi"
2
3/ {
4 chosen {
5 bootargs = "console=ttyS0,115200n8 earlyprintk";
6 };
7
8 ocp@f1000000 {
9 sata@80000 {
10 status = "okay";
11 nr-ports = <1>;
12 };
13
14 spi@10600 {
15 status = "okay";
16
17 m25p40@0 {
18 #address-cells = <1>;
19 #size-cells = <1>;
20 compatible = "m25p40";
21 reg = <0>;
22 spi-max-frequency = <25000000>;
23 mode = <0>;
24
25 partition@0 {
26 reg = <0x0 0x60000>;
27 label = "uboot";
28 read-only;
29 };
30
31 partition@60000 {
32 reg = <0x60000 0x10000>;
33 label = "dtb";
34 read-only;
35 };
36
37 partition@70000 {
38 reg = <0x70000 0x10000>;
39 label = "uboot_env";
40 };
41 };
42 };
43 };
44
45 gpio_keys {
46 compatible = "gpio-keys";
47 #address-cells = <1>;
48 #size-cells = <0>;
49 button@1 {
50 label = "Function Button";
51 linux,code = <132>;
52 gpios = <&gpio1 9 1>;
53 };
54 button@2 {
55 label = "Power-on Switch";
56 linux,code = <116>;
57 gpios = <&gpio1 10 1>;
58 };
59 button@3 {
60 label = "Power-auto Switch";
61 linux,code = <142>;
62 gpios = <&gpio1 11 1>;
63 };
64 };
65
66 gpio_leds {
67 compatible = "gpio-leds";
68
69 led@1 {
70 label = "lschlv2:blue:func";
71 gpios = <&gpio1 4 1>;
72 };
73
74 led@2 {
75 label = "lschlv2:red:alarm";
76 gpios = <&gpio1 5 1>;
77 };
78
79 led@3 {
80 label = "lschlv2:amber:info";
81 gpios = <&gpio1 6 1>;
82 };
83
84 led@4 {
85 label = "lschlv2:blue:power";
86 gpios = <&gpio1 7 1>;
87 linux,default-trigger = "default-on";
88 };
89
90 led@5 {
91 label = "lschlv2:red:func";
92 gpios = <&gpio1 16 1>;
93 };
94 };
95};
diff --git a/arch/arm/boot/dts/kirkwood-ts219-6281.dts b/arch/arm/boot/dts/kirkwood-ts219-6281.dts
new file mode 100644
index 000000000000..ccbf32757800
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-ts219-6281.dts
@@ -0,0 +1,21 @@
1/dts-v1/;
2
3/include/ "kirkwood-ts219.dtsi"
4
5/ {
6 gpio_keys {
7 compatible = "gpio-keys";
8 #address-cells = <1>;
9 #size-cells = <0>;
10 button@1 {
11 label = "USB Copy";
12 linux,code = <133>;
13 gpios = <&gpio0 15 1>;
14 };
15 button@2 {
16 label = "Reset";
17 linux,code = <0x198>;
18 gpios = <&gpio0 16 1>;
19 };
20 };
21}; \ No newline at end of file
diff --git a/arch/arm/boot/dts/kirkwood-ts219-6282.dts b/arch/arm/boot/dts/kirkwood-ts219-6282.dts
new file mode 100644
index 000000000000..fbe9932161a1
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-ts219-6282.dts
@@ -0,0 +1,21 @@
1/dts-v1/;
2
3/include/ "kirkwood-ts219.dtsi"
4
5/ {
6 gpio_keys {
7 compatible = "gpio-keys";
8 #address-cells = <1>;
9 #size-cells = <0>;
10 button@1 {
11 label = "USB Copy";
12 linux,code = <133>;
13 gpios = <&gpio1 11 1>;
14 };
15 button@2 {
16 label = "Reset";
17 linux,code = <0x198>;
18 gpios = <&gpio1 5 1>;
19 };
20 };
21}; \ No newline at end of file
diff --git a/arch/arm/boot/dts/kirkwood-ts219.dtsi b/arch/arm/boot/dts/kirkwood-ts219.dtsi
new file mode 100644
index 000000000000..64ea27cb3298
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-ts219.dtsi
@@ -0,0 +1,78 @@
1/include/ "kirkwood.dtsi"
2
3/ {
4 model = "QNAP TS219 family";
5 compatible = "qnap,ts219", "marvell,kirkwood";
6
7 memory {
8 device_type = "memory";
9 reg = <0x00000000 0x20000000>;
10 };
11
12 chosen {
13 bootargs = "console=ttyS0,115200n8";
14 };
15
16 ocp@f1000000 {
17 i2c@11000 {
18 status = "okay";
19 clock-frequency = <400000>;
20
21 s35390a: s35390a@30 {
22 compatible = "s35390a";
23 reg = <0x30>;
24 };
25 };
26 serial@12000 {
27 clock-frequency = <200000000>;
28 status = "okay";
29 };
30 serial@12100 {
31 clock-frequency = <200000000>;
32 status = "okay";
33 };
34 spi@10600 {
35 status = "okay";
36
37 m25p128@0 {
38 #address-cells = <1>;
39 #size-cells = <1>;
40 compatible = "m25p128";
41 reg = <0>;
42 spi-max-frequency = <20000000>;
43 mode = <0>;
44
45 partition@0000000 {
46 reg = <0x00000000 0x00080000>;
47 label = "U-Boot";
48 };
49
50 partition@00200000 {
51 reg = <0x00200000 0x00200000>;
52 label = "Kernel";
53 };
54
55 partition@00400000 {
56 reg = <0x00400000 0x00900000>;
57 label = "RootFS1";
58 };
59 partition@00d00000 {
60 reg = <0x00d00000 0x00300000>;
61 label = "RootFS2";
62 };
63 partition@00040000 {
64 reg = <0x00080000 0x00040000>;
65 label = "U-Boot Config";
66 };
67 partition@000c0000 {
68 reg = <0x000c0000 0x00140000>;
69 label = "NAS Config";
70 };
71 };
72 };
73 sata@80000 {
74 status = "okay";
75 nr-ports = <2>;
76 };
77 };
78};
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index f95dbc190ab6..cef9616f330a 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -2,6 +2,15 @@
2 2
3/ { 3/ {
4 compatible = "marvell,kirkwood"; 4 compatible = "marvell,kirkwood";
5 interrupt-parent = <&intc>;
6
7 intc: interrupt-controller {
8 compatible = "marvell,orion-intc", "marvell,intc";
9 interrupt-controller;
10 #interrupt-cells = <1>;
11 reg = <0xf1020204 0x04>,
12 <0xf1020214 0x04>;
13 };
5 14
6 ocp@f1000000 { 15 ocp@f1000000 {
7 compatible = "simple-bus"; 16 compatible = "simple-bus";
@@ -9,6 +18,24 @@
9 #address-cells = <1>; 18 #address-cells = <1>;
10 #size-cells = <1>; 19 #size-cells = <1>;
11 20
21 gpio0: gpio@10100 {
22 compatible = "marvell,orion-gpio";
23 #gpio-cells = <2>;
24 gpio-controller;
25 reg = <0x10100 0x40>;
26 ngpio = <32>;
27 interrupts = <35>, <36>, <37>, <38>;
28 };
29
30 gpio1: gpio@10140 {
31 compatible = "marvell,orion-gpio";
32 #gpio-cells = <2>;
33 gpio-controller;
34 reg = <0x10140 0x40>;
35 ngpio = <18>;
36 interrupts = <39>, <40>, <41>;
37 };
38
12 serial@12000 { 39 serial@12000 {
13 compatible = "ns16550a"; 40 compatible = "ns16550a";
14 reg = <0x12000 0x100>; 41 reg = <0x12000 0x100>;
@@ -33,6 +60,29 @@
33 interrupts = <53>; 60 interrupts = <53>;
34 }; 61 };
35 62
63 spi@10600 {
64 compatible = "marvell,orion-spi";
65 #address-cells = <1>;
66 #size-cells = <0>;
67 cell-index = <0>;
68 interrupts = <23>;
69 reg = <0x10600 0x28>;
70 status = "disabled";
71 };
72
73 wdt@20300 {
74 compatible = "marvell,orion-wdt";
75 reg = <0x20300 0x28>;
76 status = "okay";
77 };
78
79 sata@80000 {
80 compatible = "marvell,orion-sata";
81 reg = <0x80000 0x5000>;
82 interrupts = <21>;
83 status = "disabled";
84 };
85
36 nand@3000000 { 86 nand@3000000 {
37 #address-cells = <1>; 87 #address-cells = <1>;
38 #size-cells = <1>; 88 #size-cells = <1>;
@@ -45,5 +95,15 @@
45 /* set partition map and/or chip-delay in board dts */ 95 /* set partition map and/or chip-delay in board dts */
46 status = "disabled"; 96 status = "disabled";
47 }; 97 };
98
99 i2c@11000 {
100 compatible = "marvell,mv64xxx-i2c";
101 reg = <0x11000 0x20>;
102 #address-cells = <1>;
103 #size-cells = <0>;
104 interrupts = <29>;
105 clock-frequency = <100000>;
106 status = "disabled";
107 };
48 }; 108 };
49}; 109};
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index f725b9637b33..3c9f32f9b6b4 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -192,6 +192,7 @@ CONFIG_RTC_DRV_MC13XXX=y
192CONFIG_RTC_DRV_MXC=y 192CONFIG_RTC_DRV_MXC=y
193CONFIG_DMADEVICES=y 193CONFIG_DMADEVICES=y
194CONFIG_IMX_SDMA=y 194CONFIG_IMX_SDMA=y
195CONFIG_MXS_DMA=y
195CONFIG_COMMON_CLK_DEBUG=y 196CONFIG_COMMON_CLK_DEBUG=y
196# CONFIG_IOMMU_SUPPORT is not set 197# CONFIG_IOMMU_SUPPORT is not set
197CONFIG_EXT2_FS=y 198CONFIG_EXT2_FS=y
diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig
index ccdb6357fb74..4edcfb4e4dee 100644
--- a/arch/arm/configs/mxs_defconfig
+++ b/arch/arm/configs/mxs_defconfig
@@ -34,7 +34,6 @@ CONFIG_NO_HZ=y
34CONFIG_HIGH_RES_TIMERS=y 34CONFIG_HIGH_RES_TIMERS=y
35CONFIG_PREEMPT_VOLUNTARY=y 35CONFIG_PREEMPT_VOLUNTARY=y
36CONFIG_AEABI=y 36CONFIG_AEABI=y
37CONFIG_DEFAULT_MMAP_MIN_ADDR=65536
38CONFIG_AUTO_ZRELADDR=y 37CONFIG_AUTO_ZRELADDR=y
39CONFIG_FPE_NWFPE=y 38CONFIG_FPE_NWFPE=y
40CONFIG_NET=y 39CONFIG_NET=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index b152de79fd95..e58edc36b406 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -193,6 +193,8 @@ CONFIG_MMC_OMAP_HS=y
193CONFIG_RTC_CLASS=y 193CONFIG_RTC_CLASS=y
194CONFIG_RTC_DRV_TWL92330=y 194CONFIG_RTC_DRV_TWL92330=y
195CONFIG_RTC_DRV_TWL4030=y 195CONFIG_RTC_DRV_TWL4030=y
196CONFIG_DMADEVICES=y
197CONFIG_DMA_OMAP=y
196CONFIG_EXT2_FS=y 198CONFIG_EXT2_FS=y
197CONFIG_EXT3_FS=y 199CONFIG_EXT3_FS=y
198# CONFIG_EXT3_FS_XATTR is not set 200# CONFIG_EXT3_FS_XATTR is not set
diff --git a/arch/arm/configs/tct_hammer_defconfig b/arch/arm/configs/tct_hammer_defconfig
index 1d24f8458bef..71277a1591ba 100644
--- a/arch/arm/configs/tct_hammer_defconfig
+++ b/arch/arm/configs/tct_hammer_defconfig
@@ -7,7 +7,7 @@ CONFIG_SYSFS_DEPRECATED_V2=y
7CONFIG_BLK_DEV_INITRD=y 7CONFIG_BLK_DEV_INITRD=y
8CONFIG_EXPERT=y 8CONFIG_EXPERT=y
9# CONFIG_KALLSYMS is not set 9# CONFIG_KALLSYMS is not set
10# CONFIG_BUG is not set 10# CONFIG_BUGVERBOSE is not set
11# CONFIG_ELF_CORE is not set 11# CONFIG_ELF_CORE is not set
12# CONFIG_SHMEM is not set 12# CONFIG_SHMEM is not set
13CONFIG_SLOB=y 13CONFIG_SLOB=y
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index 004c1bc95d2b..e4448e16046d 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -215,7 +215,9 @@ static inline void vivt_flush_cache_mm(struct mm_struct *mm)
215static inline void 215static inline void
216vivt_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) 216vivt_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
217{ 217{
218 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) 218 struct mm_struct *mm = vma->vm_mm;
219
220 if (!mm || cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm)))
219 __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end), 221 __cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end),
220 vma->vm_flags); 222 vma->vm_flags);
221} 223}
@@ -223,7 +225,9 @@ vivt_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned
223static inline void 225static inline void
224vivt_flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn) 226vivt_flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn)
225{ 227{
226 if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { 228 struct mm_struct *mm = vma->vm_mm;
229
230 if (!mm || cpumask_test_cpu(smp_processor_id(), mm_cpumask(mm))) {
227 unsigned long addr = user_addr & PAGE_MASK; 231 unsigned long addr = user_addr & PAGE_MASK;
228 __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags); 232 __cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags);
229 } 233 }
diff --git a/arch/arm/include/asm/mutex.h b/arch/arm/include/asm/mutex.h
index 93226cf23ae0..b1479fd04a95 100644
--- a/arch/arm/include/asm/mutex.h
+++ b/arch/arm/include/asm/mutex.h
@@ -7,121 +7,10 @@
7 */ 7 */
8#ifndef _ASM_MUTEX_H 8#ifndef _ASM_MUTEX_H
9#define _ASM_MUTEX_H 9#define _ASM_MUTEX_H
10
11#if __LINUX_ARM_ARCH__ < 6
12/* On pre-ARMv6 hardware the swp based implementation is the most efficient. */
13# include <asm-generic/mutex-xchg.h>
14#else
15
16/* 10/*
17 * Attempting to lock a mutex on ARMv6+ can be done with a bastardized 11 * On pre-ARMv6 hardware this results in a swp-based implementation,
18 * atomic decrement (it is not a reliable atomic decrement but it satisfies 12 * which is the most efficient. For ARMv6+, we emit a pair of exclusive
19 * the defined semantics for our purpose, while being smaller and faster 13 * accesses instead.
20 * than a real atomic decrement or atomic swap. The idea is to attempt
21 * decrementing the lock value only once. If once decremented it isn't zero,
22 * or if its store-back fails due to a dispute on the exclusive store, we
23 * simply bail out immediately through the slow path where the lock will be
24 * reattempted until it succeeds.
25 */ 14 */
26static inline void 15#include <asm-generic/mutex-xchg.h>
27__mutex_fastpath_lock(atomic_t *count, void (*fail_fn)(atomic_t *))
28{
29 int __ex_flag, __res;
30
31 __asm__ (
32
33 "ldrex %0, [%2] \n\t"
34 "sub %0, %0, #1 \n\t"
35 "strex %1, %0, [%2] "
36
37 : "=&r" (__res), "=&r" (__ex_flag)
38 : "r" (&(count)->counter)
39 : "cc","memory" );
40
41 __res |= __ex_flag;
42 if (unlikely(__res != 0))
43 fail_fn(count);
44}
45
46static inline int
47__mutex_fastpath_lock_retval(atomic_t *count, int (*fail_fn)(atomic_t *))
48{
49 int __ex_flag, __res;
50
51 __asm__ (
52
53 "ldrex %0, [%2] \n\t"
54 "sub %0, %0, #1 \n\t"
55 "strex %1, %0, [%2] "
56
57 : "=&r" (__res), "=&r" (__ex_flag)
58 : "r" (&(count)->counter)
59 : "cc","memory" );
60
61 __res |= __ex_flag;
62 if (unlikely(__res != 0))
63 __res = fail_fn(count);
64 return __res;
65}
66
67/*
68 * Same trick is used for the unlock fast path. However the original value,
69 * rather than the result, is used to test for success in order to have
70 * better generated assembly.
71 */
72static inline void
73__mutex_fastpath_unlock(atomic_t *count, void (*fail_fn)(atomic_t *))
74{
75 int __ex_flag, __res, __orig;
76
77 __asm__ (
78
79 "ldrex %0, [%3] \n\t"
80 "add %1, %0, #1 \n\t"
81 "strex %2, %1, [%3] "
82
83 : "=&r" (__orig), "=&r" (__res), "=&r" (__ex_flag)
84 : "r" (&(count)->counter)
85 : "cc","memory" );
86
87 __orig |= __ex_flag;
88 if (unlikely(__orig != 0))
89 fail_fn(count);
90}
91
92/*
93 * If the unlock was done on a contended lock, or if the unlock simply fails
94 * then the mutex remains locked.
95 */
96#define __mutex_slowpath_needs_to_unlock() 1
97
98/*
99 * For __mutex_fastpath_trylock we use another construct which could be
100 * described as a "single value cmpxchg".
101 *
102 * This provides the needed trylock semantics like cmpxchg would, but it is
103 * lighter and less generic than a true cmpxchg implementation.
104 */
105static inline int
106__mutex_fastpath_trylock(atomic_t *count, int (*fail_fn)(atomic_t *))
107{
108 int __ex_flag, __res, __orig;
109
110 __asm__ (
111
112 "1: ldrex %0, [%3] \n\t"
113 "subs %1, %0, #1 \n\t"
114 "strexeq %2, %1, [%3] \n\t"
115 "movlt %0, #0 \n\t"
116 "cmpeq %2, #0 \n\t"
117 "bgt 1b "
118
119 : "=&r" (__orig), "=&r" (__res), "=&r" (__ex_flag)
120 : "r" (&count->counter)
121 : "cc", "memory" );
122
123 return __orig;
124}
125
126#endif
127#endif 16#endif
diff --git a/arch/arm/include/asm/pgtable.h b/arch/arm/include/asm/pgtable.h
index f66626d71e7d..41dc31f834c3 100644
--- a/arch/arm/include/asm/pgtable.h
+++ b/arch/arm/include/asm/pgtable.h
@@ -195,6 +195,18 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
195 195
196#define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0) 196#define pte_clear(mm,addr,ptep) set_pte_ext(ptep, __pte(0), 0)
197 197
198#define pte_none(pte) (!pte_val(pte))
199#define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT)
200#define pte_write(pte) (!(pte_val(pte) & L_PTE_RDONLY))
201#define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY)
202#define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG)
203#define pte_exec(pte) (!(pte_val(pte) & L_PTE_XN))
204#define pte_special(pte) (0)
205
206#define pte_present_user(pte) \
207 ((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \
208 (L_PTE_PRESENT | L_PTE_USER))
209
198#if __LINUX_ARM_ARCH__ < 6 210#if __LINUX_ARM_ARCH__ < 6
199static inline void __sync_icache_dcache(pte_t pteval) 211static inline void __sync_icache_dcache(pte_t pteval)
200{ 212{
@@ -206,25 +218,15 @@ extern void __sync_icache_dcache(pte_t pteval);
206static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, 218static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
207 pte_t *ptep, pte_t pteval) 219 pte_t *ptep, pte_t pteval)
208{ 220{
209 if (addr >= TASK_SIZE) 221 unsigned long ext = 0;
210 set_pte_ext(ptep, pteval, 0); 222
211 else { 223 if (addr < TASK_SIZE && pte_present_user(pteval)) {
212 __sync_icache_dcache(pteval); 224 __sync_icache_dcache(pteval);
213 set_pte_ext(ptep, pteval, PTE_EXT_NG); 225 ext |= PTE_EXT_NG;
214 } 226 }
215}
216 227
217#define pte_none(pte) (!pte_val(pte)) 228 set_pte_ext(ptep, pteval, ext);
218#define pte_present(pte) (pte_val(pte) & L_PTE_PRESENT) 229}
219#define pte_write(pte) (!(pte_val(pte) & L_PTE_RDONLY))
220#define pte_dirty(pte) (pte_val(pte) & L_PTE_DIRTY)
221#define pte_young(pte) (pte_val(pte) & L_PTE_YOUNG)
222#define pte_exec(pte) (!(pte_val(pte) & L_PTE_XN))
223#define pte_special(pte) (0)
224
225#define pte_present_user(pte) \
226 ((pte_val(pte) & (L_PTE_PRESENT | L_PTE_USER)) == \
227 (L_PTE_PRESENT | L_PTE_USER))
228 230
229#define PTE_BIT_FUNC(fn,op) \ 231#define PTE_BIT_FUNC(fn,op) \
230static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; } 232static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
@@ -251,13 +253,13 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
251 * 253 *
252 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 254 * 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
253 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 255 * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
254 * <--------------- offset --------------------> <- type --> 0 0 0 256 * <--------------- offset ----------------------> < type -> 0 0 0
255 * 257 *
256 * This gives us up to 63 swap files and 32GB per swap file. Note that 258 * This gives us up to 31 swap files and 64GB per swap file. Note that
257 * the offset field is always non-zero. 259 * the offset field is always non-zero.
258 */ 260 */
259#define __SWP_TYPE_SHIFT 3 261#define __SWP_TYPE_SHIFT 3
260#define __SWP_TYPE_BITS 6 262#define __SWP_TYPE_BITS 5
261#define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1) 263#define __SWP_TYPE_MASK ((1 << __SWP_TYPE_BITS) - 1)
262#define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT) 264#define __SWP_OFFSET_SHIFT (__SWP_TYPE_BITS + __SWP_TYPE_SHIFT)
263 265
diff --git a/arch/arm/include/asm/sched_clock.h b/arch/arm/include/asm/sched_clock.h
index e3f757263438..05b8e82ec9f5 100644
--- a/arch/arm/include/asm/sched_clock.h
+++ b/arch/arm/include/asm/sched_clock.h
@@ -10,5 +10,7 @@
10 10
11extern void sched_clock_postinit(void); 11extern void sched_clock_postinit(void);
12extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate); 12extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
13extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
14 unsigned long rate);
13 15
14#endif 16#endif
diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h
index 23ebc0c82a39..24d284a1bfc7 100644
--- a/arch/arm/include/asm/setup.h
+++ b/arch/arm/include/asm/setup.h
@@ -196,7 +196,7 @@ static const struct tagtable __tagtable_##fn __tag = { tag, fn }
196 196
197struct membank { 197struct membank {
198 phys_addr_t start; 198 phys_addr_t start;
199 unsigned long size; 199 phys_addr_t size;
200 unsigned int highmem; 200 unsigned int highmem;
201}; 201};
202 202
@@ -217,7 +217,7 @@ extern struct meminfo meminfo;
217#define bank_phys_end(bank) ((bank)->start + (bank)->size) 217#define bank_phys_end(bank) ((bank)->start + (bank)->size)
218#define bank_phys_size(bank) (bank)->size 218#define bank_phys_size(bank) (bank)->size
219 219
220extern int arm_add_memory(phys_addr_t start, unsigned long size); 220extern int arm_add_memory(phys_addr_t start, phys_addr_t size);
221extern void early_print(const char *str, ...); 221extern void early_print(const char *str, ...);
222extern void dump_machine_table(void); 222extern void dump_machine_table(void);
223 223
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 0d1851ca6eb9..0f82098c9bfe 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -244,6 +244,19 @@ svc_preempt:
244 b 1b 244 b 1b
245#endif 245#endif
246 246
247__und_fault:
248 @ Correct the PC such that it is pointing at the instruction
249 @ which caused the fault. If the faulting instruction was ARM
250 @ the PC will be pointing at the next instruction, and have to
251 @ subtract 4. Otherwise, it is Thumb, and the PC will be
252 @ pointing at the second half of the Thumb instruction. We
253 @ have to subtract 2.
254 ldr r2, [r0, #S_PC]
255 sub r2, r2, r1
256 str r2, [r0, #S_PC]
257 b do_undefinstr
258ENDPROC(__und_fault)
259
247 .align 5 260 .align 5
248__und_svc: 261__und_svc:
249#ifdef CONFIG_KPROBES 262#ifdef CONFIG_KPROBES
@@ -261,25 +274,32 @@ __und_svc:
261 @ 274 @
262 @ r0 - instruction 275 @ r0 - instruction
263 @ 276 @
264#ifndef CONFIG_THUMB2_KERNEL 277#ifndef CONFIG_THUMB2_KERNEL
265 ldr r0, [r4, #-4] 278 ldr r0, [r4, #-4]
266#else 279#else
280 mov r1, #2
267 ldrh r0, [r4, #-2] @ Thumb instruction at LR - 2 281 ldrh r0, [r4, #-2] @ Thumb instruction at LR - 2
268 cmp r0, #0xe800 @ 32-bit instruction if xx >= 0 282 cmp r0, #0xe800 @ 32-bit instruction if xx >= 0
269 ldrhhs r9, [r4] @ bottom 16 bits 283 blo __und_svc_fault
270 orrhs r0, r9, r0, lsl #16 284 ldrh r9, [r4] @ bottom 16 bits
285 add r4, r4, #2
286 str r4, [sp, #S_PC]
287 orr r0, r9, r0, lsl #16
271#endif 288#endif
272 adr r9, BSYM(1f) 289 adr r9, BSYM(__und_svc_finish)
273 mov r2, r4 290 mov r2, r4
274 bl call_fpe 291 bl call_fpe
275 292
293 mov r1, #4 @ PC correction to apply
294__und_svc_fault:
276 mov r0, sp @ struct pt_regs *regs 295 mov r0, sp @ struct pt_regs *regs
277 bl do_undefinstr 296 bl __und_fault
278 297
279 @ 298 @
280 @ IRQs off again before pulling preserved data off the stack 299 @ IRQs off again before pulling preserved data off the stack
281 @ 300 @
2821: disable_irq_notrace 301__und_svc_finish:
302 disable_irq_notrace
283 303
284 @ 304 @
285 @ restore SPSR and restart the instruction 305 @ restore SPSR and restart the instruction
@@ -423,25 +443,33 @@ __und_usr:
423 mov r2, r4 443 mov r2, r4
424 mov r3, r5 444 mov r3, r5
425 445
446 @ r2 = regs->ARM_pc, which is either 2 or 4 bytes ahead of the
447 @ faulting instruction depending on Thumb mode.
448 @ r3 = regs->ARM_cpsr
426 @ 449 @
427 @ fall through to the emulation code, which returns using r9 if 450 @ The emulation code returns using r9 if it has emulated the
428 @ it has emulated the instruction, or the more conventional lr 451 @ instruction, or the more conventional lr if we are to treat
429 @ if we are to treat this as a real undefined instruction 452 @ this as a real undefined instruction
430 @
431 @ r0 - instruction
432 @ 453 @
433 adr r9, BSYM(ret_from_exception) 454 adr r9, BSYM(ret_from_exception)
434 adr lr, BSYM(__und_usr_unknown) 455
435 tst r3, #PSR_T_BIT @ Thumb mode? 456 tst r3, #PSR_T_BIT @ Thumb mode?
436 itet eq @ explicit IT needed for the 1f label 457 bne __und_usr_thumb
437 subeq r4, r2, #4 @ ARM instr at LR - 4 458 sub r4, r2, #4 @ ARM instr at LR - 4
438 subne r4, r2, #2 @ Thumb instr at LR - 2 4591: ldrt r0, [r4]
4391: ldreqt r0, [r4]
440#ifdef CONFIG_CPU_ENDIAN_BE8 460#ifdef CONFIG_CPU_ENDIAN_BE8
441 reveq r0, r0 @ little endian instruction 461 rev r0, r0 @ little endian instruction
442#endif 462#endif
443 beq call_fpe 463 @ r0 = 32-bit ARM instruction which caused the exception
464 @ r2 = PC value for the following instruction (:= regs->ARM_pc)
465 @ r4 = PC value for the faulting instruction
466 @ lr = 32-bit undefined instruction function
467 adr lr, BSYM(__und_usr_fault_32)
468 b call_fpe
469
470__und_usr_thumb:
444 @ Thumb instruction 471 @ Thumb instruction
472 sub r4, r2, #2 @ First half of thumb instr at LR - 2
445#if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7 473#if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7
446/* 474/*
447 * Thumb-2 instruction handling. Note that because pre-v6 and >= v6 platforms 475 * Thumb-2 instruction handling. Note that because pre-v6 and >= v6 platforms
@@ -455,7 +483,7 @@ __und_usr:
455 ldr r5, .LCcpu_architecture 483 ldr r5, .LCcpu_architecture
456 ldr r5, [r5] 484 ldr r5, [r5]
457 cmp r5, #CPU_ARCH_ARMv7 485 cmp r5, #CPU_ARCH_ARMv7
458 blo __und_usr_unknown 486 blo __und_usr_fault_16 @ 16bit undefined instruction
459/* 487/*
460 * The following code won't get run unless the running CPU really is v7, so 488 * The following code won't get run unless the running CPU really is v7, so
461 * coding round the lack of ldrht on older arches is pointless. Temporarily 489 * coding round the lack of ldrht on older arches is pointless. Temporarily
@@ -463,15 +491,18 @@ __und_usr:
463 */ 491 */
464 .arch armv6t2 492 .arch armv6t2
465#endif 493#endif
4662: 4942: ldrht r5, [r4]
467 ARM( ldrht r5, [r4], #2 )
468 THUMB( ldrht r5, [r4] )
469 THUMB( add r4, r4, #2 )
470 cmp r5, #0xe800 @ 32bit instruction if xx != 0 495 cmp r5, #0xe800 @ 32bit instruction if xx != 0
471 blo __und_usr_unknown 496 blo __und_usr_fault_16 @ 16bit undefined instruction
4723: ldrht r0, [r4] 4973: ldrht r0, [r2]
473 add r2, r2, #2 @ r2 is PC + 2, make it PC + 4 498 add r2, r2, #2 @ r2 is PC + 2, make it PC + 4
499 str r2, [sp, #S_PC] @ it's a 2x16bit instr, update
474 orr r0, r0, r5, lsl #16 500 orr r0, r0, r5, lsl #16
501 adr lr, BSYM(__und_usr_fault_32)
502 @ r0 = the two 16-bit Thumb instructions which caused the exception
503 @ r2 = PC value for the following Thumb instruction (:= regs->ARM_pc)
504 @ r4 = PC value for the first 16-bit Thumb instruction
505 @ lr = 32bit undefined instruction function
475 506
476#if __LINUX_ARM_ARCH__ < 7 507#if __LINUX_ARM_ARCH__ < 7
477/* If the target arch was overridden, change it back: */ 508/* If the target arch was overridden, change it back: */
@@ -482,17 +513,13 @@ __und_usr:
482#endif 513#endif
483#endif /* __LINUX_ARM_ARCH__ < 7 */ 514#endif /* __LINUX_ARM_ARCH__ < 7 */
484#else /* !(CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7) */ 515#else /* !(CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7) */
485 b __und_usr_unknown 516 b __und_usr_fault_16
486#endif 517#endif
487 UNWIND(.fnend ) 518 UNWIND(.fnend)
488ENDPROC(__und_usr) 519ENDPROC(__und_usr)
489 520
490 @
491 @ fallthrough to call_fpe
492 @
493
494/* 521/*
495 * The out of line fixup for the ldrt above. 522 * The out of line fixup for the ldrt instructions above.
496 */ 523 */
497 .pushsection .fixup, "ax" 524 .pushsection .fixup, "ax"
498 .align 2 525 .align 2
@@ -524,11 +551,12 @@ ENDPROC(__und_usr)
524 * NEON handler code. 551 * NEON handler code.
525 * 552 *
526 * Emulators may wish to make use of the following registers: 553 * Emulators may wish to make use of the following registers:
527 * r0 = instruction opcode. 554 * r0 = instruction opcode (32-bit ARM or two 16-bit Thumb)
528 * r2 = PC+4 555 * r2 = PC value to resume execution after successful emulation
529 * r9 = normal "successful" return address 556 * r9 = normal "successful" return address
530 * r10 = this threads thread_info structure. 557 * r10 = this threads thread_info structure
531 * lr = unrecognised instruction return address 558 * lr = unrecognised instruction return address
559 * IRQs disabled, FIQs enabled.
532 */ 560 */
533 @ 561 @
534 @ Fall-through from Thumb-2 __und_usr 562 @ Fall-through from Thumb-2 __und_usr
@@ -659,12 +687,17 @@ ENTRY(no_fp)
659 mov pc, lr 687 mov pc, lr
660ENDPROC(no_fp) 688ENDPROC(no_fp)
661 689
662__und_usr_unknown: 690__und_usr_fault_32:
663 enable_irq 691 mov r1, #4
692 b 1f
693__und_usr_fault_16:
694 mov r1, #2
6951: enable_irq
664 mov r0, sp 696 mov r0, sp
665 adr lr, BSYM(ret_from_exception) 697 adr lr, BSYM(ret_from_exception)
666 b do_undefinstr 698 b __und_fault
667ENDPROC(__und_usr_unknown) 699ENDPROC(__und_usr_fault_32)
700ENDPROC(__und_usr_fault_16)
668 701
669 .align 5 702 .align 5
670__pabt_usr: 703__pabt_usr:
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
index 49d9f9305247..978eac57e04a 100644
--- a/arch/arm/kernel/entry-common.S
+++ b/arch/arm/kernel/entry-common.S
@@ -51,23 +51,15 @@ ret_fast_syscall:
51fast_work_pending: 51fast_work_pending:
52 str r0, [sp, #S_R0+S_OFF]! @ returned r0 52 str r0, [sp, #S_R0+S_OFF]! @ returned r0
53work_pending: 53work_pending:
54 tst r1, #_TIF_NEED_RESCHED
55 bne work_resched
56 /*
57 * TIF_SIGPENDING or TIF_NOTIFY_RESUME must've been set if we got here
58 */
59 ldr r2, [sp, #S_PSR]
60 mov r0, sp @ 'regs' 54 mov r0, sp @ 'regs'
61 tst r2, #15 @ are we returning to user mode?
62 bne no_work_pending @ no? just leave, then...
63 mov r2, why @ 'syscall' 55 mov r2, why @ 'syscall'
64 tst r1, #_TIF_SIGPENDING @ delivering a signal? 56 bl do_work_pending
65 movne why, #0 @ prevent further restarts 57 cmp r0, #0
66 bl do_notify_resume 58 beq no_work_pending
67 b ret_slow_syscall @ Check work again 59 movlt scno, #(__NR_restart_syscall - __NR_SYSCALL_BASE)
60 ldmia sp, {r0 - r6} @ have to reload r0 - r6
61 b local_restart @ ... and off we go
68 62
69work_resched:
70 bl schedule
71/* 63/*
72 * "slow" syscall return path. "why" tells us if this was a real syscall. 64 * "slow" syscall return path. "why" tells us if this was a real syscall.
73 */ 65 */
@@ -409,6 +401,7 @@ ENTRY(vector_swi)
409 eor scno, scno, #__NR_SYSCALL_BASE @ check OS number 401 eor scno, scno, #__NR_SYSCALL_BASE @ check OS number
410#endif 402#endif
411 403
404local_restart:
412 ldr r10, [tsk, #TI_FLAGS] @ check for syscall tracing 405 ldr r10, [tsk, #TI_FLAGS] @ check for syscall tracing
413 stmdb sp!, {r4, r5} @ push fifth and sixth args 406 stmdb sp!, {r4, r5} @ push fifth and sixth args
414 407
@@ -450,7 +443,8 @@ __sys_trace:
450 mov scno, r0 @ syscall number (possibly new) 443 mov scno, r0 @ syscall number (possibly new)
451 add r1, sp, #S_R0 + S_OFF @ pointer to regs 444 add r1, sp, #S_R0 + S_OFF @ pointer to regs
452 cmp scno, #NR_syscalls @ check upper syscall limit 445 cmp scno, #NR_syscalls @ check upper syscall limit
453 ldmccia r1, {r0 - r3} @ have to reload r0 - r3 446 ldmccia r1, {r0 - r6} @ have to reload r0 - r6
447 stmccia sp, {r4, r5} @ and update the stack args
454 ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine 448 ldrcc pc, [tbl, scno, lsl #2] @ call sys_* routine
455 b 2b 449 b 2b
456 450
diff --git a/arch/arm/kernel/ftrace.c b/arch/arm/kernel/ftrace.c
index df0bf0c8cb79..34e56647dcee 100644
--- a/arch/arm/kernel/ftrace.c
+++ b/arch/arm/kernel/ftrace.c
@@ -179,19 +179,20 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr,
179 old = *parent; 179 old = *parent;
180 *parent = return_hooker; 180 *parent = return_hooker;
181 181
182 err = ftrace_push_return_trace(old, self_addr, &trace.depth,
183 frame_pointer);
184 if (err == -EBUSY) {
185 *parent = old;
186 return;
187 }
188
189 trace.func = self_addr; 182 trace.func = self_addr;
183 trace.depth = current->curr_ret_stack + 1;
190 184
191 /* Only trace if the calling function expects to */ 185 /* Only trace if the calling function expects to */
192 if (!ftrace_graph_entry(&trace)) { 186 if (!ftrace_graph_entry(&trace)) {
193 current->curr_ret_stack--;
194 *parent = old; 187 *parent = old;
188 return;
189 }
190
191 err = ftrace_push_return_trace(old, self_addr, &trace.depth,
192 frame_pointer);
193 if (err == -EBUSY) {
194 *parent = old;
195 return;
195 } 196 }
196} 197}
197 198
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index 19c95ea65b2f..693b744fd572 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -247,6 +247,7 @@ void machine_shutdown(void)
247void machine_halt(void) 247void machine_halt(void)
248{ 248{
249 machine_shutdown(); 249 machine_shutdown();
250 local_irq_disable();
250 while (1); 251 while (1);
251} 252}
252 253
@@ -268,6 +269,7 @@ void machine_restart(char *cmd)
268 269
269 /* Whoops - the platform was unable to reboot. Tell the user! */ 270 /* Whoops - the platform was unable to reboot. Tell the user! */
270 printk("Reboot failed -- System halted\n"); 271 printk("Reboot failed -- System halted\n");
272 local_irq_disable();
271 while (1); 273 while (1);
272} 274}
273 275
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index dab711e6e1ca..3e0fc5f7ed4b 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -25,6 +25,7 @@
25#include <linux/regset.h> 25#include <linux/regset.h>
26#include <linux/audit.h> 26#include <linux/audit.h>
27#include <linux/tracehook.h> 27#include <linux/tracehook.h>
28#include <linux/unistd.h>
28 29
29#include <asm/pgtable.h> 30#include <asm/pgtable.h>
30#include <asm/traps.h> 31#include <asm/traps.h>
diff --git a/arch/arm/kernel/sched_clock.c b/arch/arm/kernel/sched_clock.c
index 27d186abbc06..f4515393248d 100644
--- a/arch/arm/kernel/sched_clock.c
+++ b/arch/arm/kernel/sched_clock.c
@@ -21,6 +21,8 @@ struct clock_data {
21 u32 epoch_cyc_copy; 21 u32 epoch_cyc_copy;
22 u32 mult; 22 u32 mult;
23 u32 shift; 23 u32 shift;
24 bool suspended;
25 bool needs_suspend;
24}; 26};
25 27
26static void sched_clock_poll(unsigned long wrap_ticks); 28static void sched_clock_poll(unsigned long wrap_ticks);
@@ -49,6 +51,9 @@ static unsigned long long cyc_to_sched_clock(u32 cyc, u32 mask)
49 u64 epoch_ns; 51 u64 epoch_ns;
50 u32 epoch_cyc; 52 u32 epoch_cyc;
51 53
54 if (cd.suspended)
55 return cd.epoch_ns;
56
52 /* 57 /*
53 * Load the epoch_cyc and epoch_ns atomically. We do this by 58 * Load the epoch_cyc and epoch_ns atomically. We do this by
54 * ensuring that we always write epoch_cyc, epoch_ns and 59 * ensuring that we always write epoch_cyc, epoch_ns and
@@ -98,6 +103,13 @@ static void sched_clock_poll(unsigned long wrap_ticks)
98 update_sched_clock(); 103 update_sched_clock();
99} 104}
100 105
106void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
107 unsigned long rate)
108{
109 setup_sched_clock(read, bits, rate);
110 cd.needs_suspend = true;
111}
112
101void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) 113void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
102{ 114{
103 unsigned long r, w; 115 unsigned long r, w;
@@ -169,11 +181,23 @@ void __init sched_clock_postinit(void)
169static int sched_clock_suspend(void) 181static int sched_clock_suspend(void)
170{ 182{
171 sched_clock_poll(sched_clock_timer.data); 183 sched_clock_poll(sched_clock_timer.data);
184 if (cd.needs_suspend)
185 cd.suspended = true;
172 return 0; 186 return 0;
173} 187}
174 188
189static void sched_clock_resume(void)
190{
191 if (cd.needs_suspend) {
192 cd.epoch_cyc = read_sched_clock();
193 cd.epoch_cyc_copy = cd.epoch_cyc;
194 cd.suspended = false;
195 }
196}
197
175static struct syscore_ops sched_clock_ops = { 198static struct syscore_ops sched_clock_ops = {
176 .suspend = sched_clock_suspend, 199 .suspend = sched_clock_suspend,
200 .resume = sched_clock_resume,
177}; 201};
178 202
179static int __init sched_clock_syscore_init(void) 203static int __init sched_clock_syscore_init(void)
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index e15d83bb4ea3..a81dcecc7343 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -508,7 +508,7 @@ void __init dump_machine_table(void)
508 /* can't use cpu_relax() here as it may require MMU setup */; 508 /* can't use cpu_relax() here as it may require MMU setup */;
509} 509}
510 510
511int __init arm_add_memory(phys_addr_t start, unsigned long size) 511int __init arm_add_memory(phys_addr_t start, phys_addr_t size)
512{ 512{
513 struct membank *bank = &meminfo.bank[meminfo.nr_banks]; 513 struct membank *bank = &meminfo.bank[meminfo.nr_banks];
514 514
@@ -538,7 +538,7 @@ int __init arm_add_memory(phys_addr_t start, unsigned long size)
538 } 538 }
539#endif 539#endif
540 540
541 bank->size = size & PAGE_MASK; 541 bank->size = size & ~(phys_addr_t)(PAGE_SIZE - 1);
542 542
543 /* 543 /*
544 * Check whether this memory region has non-zero size or 544 * Check whether this memory region has non-zero size or
@@ -558,7 +558,7 @@ int __init arm_add_memory(phys_addr_t start, unsigned long size)
558static int __init early_mem(char *p) 558static int __init early_mem(char *p)
559{ 559{
560 static int usermem __initdata = 0; 560 static int usermem __initdata = 0;
561 unsigned long size; 561 phys_addr_t size;
562 phys_addr_t start; 562 phys_addr_t start;
563 char *endp; 563 char *endp;
564 564
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index 536c5d6b340b..f27789e4e38a 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -27,7 +27,6 @@
27 */ 27 */
28#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)) 28#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE))
29#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)) 29#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE))
30#define SWI_SYS_RESTART (0xef000000|__NR_restart_syscall|__NR_OABI_SYSCALL_BASE)
31 30
32/* 31/*
33 * With EABI, the syscall number has to be loaded into r7. 32 * With EABI, the syscall number has to be loaded into r7.
@@ -48,18 +47,6 @@ const unsigned long sigreturn_codes[7] = {
48}; 47};
49 48
50/* 49/*
51 * Either we support OABI only, or we have EABI with the OABI
52 * compat layer enabled. In the later case we don't know if
53 * user space is EABI or not, and if not we must not clobber r7.
54 * Always using the OABI syscall solves that issue and works for
55 * all those cases.
56 */
57const unsigned long syscall_restart_code[2] = {
58 SWI_SYS_RESTART, /* swi __NR_restart_syscall */
59 0xe49df004, /* ldr pc, [sp], #4 */
60};
61
62/*
63 * atomically swap in the new signal mask, and wait for a signal. 50 * atomically swap in the new signal mask, and wait for a signal.
64 */ 51 */
65asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask) 52asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask)
@@ -582,12 +569,13 @@ handle_signal(unsigned long sig, struct k_sigaction *ka,
582 * the kernel can handle, and then we build all the user-level signal handling 569 * the kernel can handle, and then we build all the user-level signal handling
583 * stack-frames in one go after that. 570 * stack-frames in one go after that.
584 */ 571 */
585static void do_signal(struct pt_regs *regs, int syscall) 572static int do_signal(struct pt_regs *regs, int syscall)
586{ 573{
587 unsigned int retval = 0, continue_addr = 0, restart_addr = 0; 574 unsigned int retval = 0, continue_addr = 0, restart_addr = 0;
588 struct k_sigaction ka; 575 struct k_sigaction ka;
589 siginfo_t info; 576 siginfo_t info;
590 int signr; 577 int signr;
578 int restart = 0;
591 579
592 /* 580 /*
593 * If we were from a system call, check for system call restarting... 581 * If we were from a system call, check for system call restarting...
@@ -602,15 +590,15 @@ static void do_signal(struct pt_regs *regs, int syscall)
602 * debugger will see the already changed PSW. 590 * debugger will see the already changed PSW.
603 */ 591 */
604 switch (retval) { 592 switch (retval) {
593 case -ERESTART_RESTARTBLOCK:
594 restart -= 2;
605 case -ERESTARTNOHAND: 595 case -ERESTARTNOHAND:
606 case -ERESTARTSYS: 596 case -ERESTARTSYS:
607 case -ERESTARTNOINTR: 597 case -ERESTARTNOINTR:
598 restart++;
608 regs->ARM_r0 = regs->ARM_ORIG_r0; 599 regs->ARM_r0 = regs->ARM_ORIG_r0;
609 regs->ARM_pc = restart_addr; 600 regs->ARM_pc = restart_addr;
610 break; 601 break;
611 case -ERESTART_RESTARTBLOCK:
612 regs->ARM_r0 = -EINTR;
613 break;
614 } 602 }
615 } 603 }
616 604
@@ -619,14 +607,17 @@ static void do_signal(struct pt_regs *regs, int syscall)
619 * point the debugger may change all our registers ... 607 * point the debugger may change all our registers ...
620 */ 608 */
621 signr = get_signal_to_deliver(&info, &ka, regs, NULL); 609 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
610 /*
611 * Depending on the signal settings we may need to revert the
612 * decision to restart the system call. But skip this if a
613 * debugger has chosen to restart at a different PC.
614 */
615 if (regs->ARM_pc != restart_addr)
616 restart = 0;
622 if (signr > 0) { 617 if (signr > 0) {
623 /* 618 if (unlikely(restart)) {
624 * Depending on the signal settings we may need to revert the 619 if (retval == -ERESTARTNOHAND ||
625 * decision to restart the system call. But skip this if a 620 retval == -ERESTART_RESTARTBLOCK
626 * debugger has chosen to restart at a different PC.
627 */
628 if (regs->ARM_pc == restart_addr) {
629 if (retval == -ERESTARTNOHAND
630 || (retval == -ERESTARTSYS 621 || (retval == -ERESTARTSYS
631 && !(ka.sa.sa_flags & SA_RESTART))) { 622 && !(ka.sa.sa_flags & SA_RESTART))) {
632 regs->ARM_r0 = -EINTR; 623 regs->ARM_r0 = -EINTR;
@@ -635,52 +626,43 @@ static void do_signal(struct pt_regs *regs, int syscall)
635 } 626 }
636 627
637 handle_signal(signr, &ka, &info, regs); 628 handle_signal(signr, &ka, &info, regs);
638 return; 629 return 0;
639 }
640
641 if (syscall) {
642 /*
643 * Handle restarting a different system call. As above,
644 * if a debugger has chosen to restart at a different PC,
645 * ignore the restart.
646 */
647 if (retval == -ERESTART_RESTARTBLOCK
648 && regs->ARM_pc == continue_addr) {
649 if (thumb_mode(regs)) {
650 regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE;
651 regs->ARM_pc -= 2;
652 } else {
653#if defined(CONFIG_AEABI) && !defined(CONFIG_OABI_COMPAT)
654 regs->ARM_r7 = __NR_restart_syscall;
655 regs->ARM_pc -= 4;
656#else
657 u32 __user *usp;
658
659 regs->ARM_sp -= 4;
660 usp = (u32 __user *)regs->ARM_sp;
661
662 if (put_user(regs->ARM_pc, usp) == 0) {
663 regs->ARM_pc = KERN_RESTART_CODE;
664 } else {
665 regs->ARM_sp += 4;
666 force_sigsegv(0, current);
667 }
668#endif
669 }
670 }
671 } 630 }
672 631
673 restore_saved_sigmask(); 632 restore_saved_sigmask();
633 if (unlikely(restart))
634 regs->ARM_pc = continue_addr;
635 return restart;
674} 636}
675 637
676asmlinkage void 638asmlinkage int
677do_notify_resume(struct pt_regs *regs, unsigned int thread_flags, int syscall) 639do_work_pending(struct pt_regs *regs, unsigned int thread_flags, int syscall)
678{ 640{
679 if (thread_flags & _TIF_SIGPENDING) 641 do {
680 do_signal(regs, syscall); 642 if (likely(thread_flags & _TIF_NEED_RESCHED)) {
681 643 schedule();
682 if (thread_flags & _TIF_NOTIFY_RESUME) { 644 } else {
683 clear_thread_flag(TIF_NOTIFY_RESUME); 645 if (unlikely(!user_mode(regs)))
684 tracehook_notify_resume(regs); 646 return 0;
685 } 647 local_irq_enable();
648 if (thread_flags & _TIF_SIGPENDING) {
649 int restart = do_signal(regs, syscall);
650 if (unlikely(restart)) {
651 /*
652 * Restart without handlers.
653 * Deal with it without leaving
654 * the kernel space.
655 */
656 return restart;
657 }
658 syscall = 0;
659 } else {
660 clear_thread_flag(TIF_NOTIFY_RESUME);
661 tracehook_notify_resume(regs);
662 }
663 }
664 local_irq_disable();
665 thread_flags = current_thread_info()->flags;
666 } while (thread_flags & _TIF_WORK_MASK);
667 return 0;
686} 668}
diff --git a/arch/arm/kernel/signal.h b/arch/arm/kernel/signal.h
index 6fcfe8398aa4..5ff067b7c752 100644
--- a/arch/arm/kernel/signal.h
+++ b/arch/arm/kernel/signal.h
@@ -8,7 +8,5 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500) 10#define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500)
11#define KERN_RESTART_CODE (KERN_SIGRETURN_CODE + sizeof(sigreturn_codes))
12 11
13extern const unsigned long sigreturn_codes[7]; 12extern const unsigned long sigreturn_codes[7];
14extern const unsigned long syscall_restart_code[2];
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
index aea74f5bc34a..ebd8ad274d76 100644
--- a/arch/arm/kernel/smp.c
+++ b/arch/arm/kernel/smp.c
@@ -563,7 +563,8 @@ void smp_send_stop(void)
563 563
564 cpumask_copy(&mask, cpu_online_mask); 564 cpumask_copy(&mask, cpu_online_mask);
565 cpumask_clear_cpu(smp_processor_id(), &mask); 565 cpumask_clear_cpu(smp_processor_id(), &mask);
566 smp_cross_call(&mask, IPI_CPU_STOP); 566 if (!cpumask_empty(&mask))
567 smp_cross_call(&mask, IPI_CPU_STOP);
567 568
568 /* Wait up to one second for other CPUs to stop */ 569 /* Wait up to one second for other CPUs to stop */
569 timeout = USEC_PER_SEC; 570 timeout = USEC_PER_SEC;
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index 198b08456e90..26c12c6440fc 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -321,7 +321,7 @@ void store_cpu_topology(unsigned int cpuid)
321 * init_cpu_topology is called at boot when only one cpu is running 321 * init_cpu_topology is called at boot when only one cpu is running
322 * which prevent simultaneous write access to cpu_topology array 322 * which prevent simultaneous write access to cpu_topology array
323 */ 323 */
324void init_cpu_topology(void) 324void __init init_cpu_topology(void)
325{ 325{
326 unsigned int cpu; 326 unsigned int cpu;
327 327
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 8b97d739b17b..f7945218b8c6 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -402,18 +402,10 @@ static int call_undef_hook(struct pt_regs *regs, unsigned int instr)
402 402
403asmlinkage void __exception do_undefinstr(struct pt_regs *regs) 403asmlinkage void __exception do_undefinstr(struct pt_regs *regs)
404{ 404{
405 unsigned int correction = thumb_mode(regs) ? 2 : 4;
406 unsigned int instr; 405 unsigned int instr;
407 siginfo_t info; 406 siginfo_t info;
408 void __user *pc; 407 void __user *pc;
409 408
410 /*
411 * According to the ARM ARM, PC is 2 or 4 bytes ahead,
412 * depending whether we're in Thumb mode or not.
413 * Correct this offset.
414 */
415 regs->ARM_pc -= correction;
416
417 pc = (void __user *)instruction_pointer(regs); 409 pc = (void __user *)instruction_pointer(regs);
418 410
419 if (processor_mode(regs) == SVC_MODE) { 411 if (processor_mode(regs) == SVC_MODE) {
@@ -852,8 +844,6 @@ void __init early_trap_init(void *vectors_base)
852 */ 844 */
853 memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE), 845 memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE),
854 sigreturn_codes, sizeof(sigreturn_codes)); 846 sigreturn_codes, sizeof(sigreturn_codes));
855 memcpy((void *)(vectors + KERN_RESTART_CODE - CONFIG_VECTORS_BASE),
856 syscall_restart_code, sizeof(syscall_restart_code));
857 847
858 flush_icache_range(vectors, vectors + PAGE_SIZE); 848 flush_icache_range(vectors, vectors + PAGE_SIZE);
859 modify_domain(DOMAIN_USER, DOMAIN_CLIENT); 849 modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
diff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile
index 2473fd1fd51c..af72969820b4 100644
--- a/arch/arm/lib/Makefile
+++ b/arch/arm/lib/Makefile
@@ -16,13 +16,30 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \
16 call_with_stack.o 16 call_with_stack.o
17 17
18mmu-y := clear_user.o copy_page.o getuser.o putuser.o 18mmu-y := clear_user.o copy_page.o getuser.o putuser.o
19mmu-y += copy_from_user.o copy_to_user.o 19
20# the code in uaccess.S is not preemption safe and
21# probably faster on ARMv3 only
22ifeq ($(CONFIG_PREEMPT),y)
23 mmu-y += copy_from_user.o copy_to_user.o
24else
25ifneq ($(CONFIG_CPU_32v3),y)
26 mmu-y += copy_from_user.o copy_to_user.o
27else
28 mmu-y += uaccess.o
29endif
30endif
20 31
21# using lib_ here won't override already available weak symbols 32# using lib_ here won't override already available weak symbols
22obj-$(CONFIG_UACCESS_WITH_MEMCPY) += uaccess_with_memcpy.o 33obj-$(CONFIG_UACCESS_WITH_MEMCPY) += uaccess_with_memcpy.o
23 34
24lib-$(CONFIG_MMU) += $(mmu-y) 35lib-$(CONFIG_MMU) += $(mmu-y)
25lib-y += io-readsw-armv4.o io-writesw-armv4.o 36
37ifeq ($(CONFIG_CPU_32v3),y)
38 lib-y += io-readsw-armv3.o io-writesw-armv3.o
39else
40 lib-y += io-readsw-armv4.o io-writesw-armv4.o
41endif
42
26lib-$(CONFIG_ARCH_RPC) += ecard.o io-acorn.o floppydma.o 43lib-$(CONFIG_ARCH_RPC) += ecard.o io-acorn.o floppydma.o
27lib-$(CONFIG_ARCH_SHARK) += io-shark.o 44lib-$(CONFIG_ARCH_SHARK) += io-shark.o
28 45
diff --git a/arch/arm/lib/io-readsw-armv3.S b/arch/arm/lib/io-readsw-armv3.S
new file mode 100644
index 000000000000..88487c8c4f23
--- /dev/null
+++ b/arch/arm/lib/io-readsw-armv3.S
@@ -0,0 +1,106 @@
1/*
2 * linux/arch/arm/lib/io-readsw-armv3.S
3 *
4 * Copyright (C) 1995-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/linkage.h>
11#include <asm/assembler.h>
12
13.Linsw_bad_alignment:
14 adr r0, .Linsw_bad_align_msg
15 mov r2, lr
16 b panic
17.Linsw_bad_align_msg:
18 .asciz "insw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
19 .align
20
21.Linsw_align: tst r1, #1
22 bne .Linsw_bad_alignment
23
24 ldr r3, [r0]
25 strb r3, [r1], #1
26 mov r3, r3, lsr #8
27 strb r3, [r1], #1
28
29 subs r2, r2, #1
30 moveq pc, lr
31
32ENTRY(__raw_readsw)
33 teq r2, #0 @ do we have to check for the zero len?
34 moveq pc, lr
35 tst r1, #3
36 bne .Linsw_align
37
38.Linsw_aligned: mov ip, #0xff
39 orr ip, ip, ip, lsl #8
40 stmfd sp!, {r4, r5, r6, lr}
41
42 subs r2, r2, #8
43 bmi .Lno_insw_8
44
45.Linsw_8_lp: ldr r3, [r0]
46 and r3, r3, ip
47 ldr r4, [r0]
48 orr r3, r3, r4, lsl #16
49
50 ldr r4, [r0]
51 and r4, r4, ip
52 ldr r5, [r0]
53 orr r4, r4, r5, lsl #16
54
55 ldr r5, [r0]
56 and r5, r5, ip
57 ldr r6, [r0]
58 orr r5, r5, r6, lsl #16
59
60 ldr r6, [r0]
61 and r6, r6, ip
62 ldr lr, [r0]
63 orr r6, r6, lr, lsl #16
64
65 stmia r1!, {r3 - r6}
66
67 subs r2, r2, #8
68 bpl .Linsw_8_lp
69
70 tst r2, #7
71 ldmeqfd sp!, {r4, r5, r6, pc}
72
73.Lno_insw_8: tst r2, #4
74 beq .Lno_insw_4
75
76 ldr r3, [r0]
77 and r3, r3, ip
78 ldr r4, [r0]
79 orr r3, r3, r4, lsl #16
80
81 ldr r4, [r0]
82 and r4, r4, ip
83 ldr r5, [r0]
84 orr r4, r4, r5, lsl #16
85
86 stmia r1!, {r3, r4}
87
88.Lno_insw_4: tst r2, #2
89 beq .Lno_insw_2
90
91 ldr r3, [r0]
92 and r3, r3, ip
93 ldr r4, [r0]
94 orr r3, r3, r4, lsl #16
95
96 str r3, [r1], #4
97
98.Lno_insw_2: tst r2, #1
99 ldrne r3, [r0]
100 strneb r3, [r1], #1
101 movne r3, r3, lsr #8
102 strneb r3, [r1]
103
104 ldmfd sp!, {r4, r5, r6, pc}
105
106
diff --git a/arch/arm/lib/io-writesw-armv3.S b/arch/arm/lib/io-writesw-armv3.S
new file mode 100644
index 000000000000..49b800419e32
--- /dev/null
+++ b/arch/arm/lib/io-writesw-armv3.S
@@ -0,0 +1,126 @@
1/*
2 * linux/arch/arm/lib/io-writesw-armv3.S
3 *
4 * Copyright (C) 1995-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/linkage.h>
11#include <asm/assembler.h>
12
13.Loutsw_bad_alignment:
14 adr r0, .Loutsw_bad_align_msg
15 mov r2, lr
16 b panic
17.Loutsw_bad_align_msg:
18 .asciz "outsw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
19 .align
20
21.Loutsw_align: tst r1, #1
22 bne .Loutsw_bad_alignment
23
24 add r1, r1, #2
25
26 ldr r3, [r1, #-4]
27 mov r3, r3, lsr #16
28 orr r3, r3, r3, lsl #16
29 str r3, [r0]
30 subs r2, r2, #1
31 moveq pc, lr
32
33ENTRY(__raw_writesw)
34 teq r2, #0 @ do we have to check for the zero len?
35 moveq pc, lr
36 tst r1, #3
37 bne .Loutsw_align
38
39 stmfd sp!, {r4, r5, r6, lr}
40
41 subs r2, r2, #8
42 bmi .Lno_outsw_8
43
44.Loutsw_8_lp: ldmia r1!, {r3, r4, r5, r6}
45
46 mov ip, r3, lsl #16
47 orr ip, ip, ip, lsr #16
48 str ip, [r0]
49
50 mov ip, r3, lsr #16
51 orr ip, ip, ip, lsl #16
52 str ip, [r0]
53
54 mov ip, r4, lsl #16
55 orr ip, ip, ip, lsr #16
56 str ip, [r0]
57
58 mov ip, r4, lsr #16
59 orr ip, ip, ip, lsl #16
60 str ip, [r0]
61
62 mov ip, r5, lsl #16
63 orr ip, ip, ip, lsr #16
64 str ip, [r0]
65
66 mov ip, r5, lsr #16
67 orr ip, ip, ip, lsl #16
68 str ip, [r0]
69
70 mov ip, r6, lsl #16
71 orr ip, ip, ip, lsr #16
72 str ip, [r0]
73
74 mov ip, r6, lsr #16
75 orr ip, ip, ip, lsl #16
76 str ip, [r0]
77
78 subs r2, r2, #8
79 bpl .Loutsw_8_lp
80
81 tst r2, #7
82 ldmeqfd sp!, {r4, r5, r6, pc}
83
84.Lno_outsw_8: tst r2, #4
85 beq .Lno_outsw_4
86
87 ldmia r1!, {r3, r4}
88
89 mov ip, r3, lsl #16
90 orr ip, ip, ip, lsr #16
91 str ip, [r0]
92
93 mov ip, r3, lsr #16
94 orr ip, ip, ip, lsl #16
95 str ip, [r0]
96
97 mov ip, r4, lsl #16
98 orr ip, ip, ip, lsr #16
99 str ip, [r0]
100
101 mov ip, r4, lsr #16
102 orr ip, ip, ip, lsl #16
103 str ip, [r0]
104
105.Lno_outsw_4: tst r2, #2
106 beq .Lno_outsw_2
107
108 ldr r3, [r1], #4
109
110 mov ip, r3, lsl #16
111 orr ip, ip, ip, lsr #16
112 str ip, [r0]
113
114 mov ip, r3, lsr #16
115 orr ip, ip, ip, lsl #16
116 str ip, [r0]
117
118.Lno_outsw_2: tst r2, #1
119
120 ldrne r3, [r1]
121
122 movne ip, r3, lsl #16
123 orrne ip, ip, ip, lsr #16
124 strne ip, [r0]
125
126 ldmfd sp!, {r4, r5, r6, pc}
diff --git a/arch/arm/lib/uaccess.S b/arch/arm/lib/uaccess.S
new file mode 100644
index 000000000000..5c908b1cb8ed
--- /dev/null
+++ b/arch/arm/lib/uaccess.S
@@ -0,0 +1,564 @@
1/*
2 * linux/arch/arm/lib/uaccess.S
3 *
4 * Copyright (C) 1995, 1996,1997,1998 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Routines to block copy data to/from user memory
11 * These are highly optimised both for the 4k page size
12 * and for various alignments.
13 */
14#include <linux/linkage.h>
15#include <asm/assembler.h>
16#include <asm/errno.h>
17#include <asm/domain.h>
18
19 .text
20
21#define PAGE_SHIFT 12
22
23/* Prototype: int __copy_to_user(void *to, const char *from, size_t n)
24 * Purpose : copy a block to user memory from kernel memory
25 * Params : to - user memory
26 * : from - kernel memory
27 * : n - number of bytes to copy
28 * Returns : Number of bytes NOT copied.
29 */
30
31.Lc2u_dest_not_aligned:
32 rsb ip, ip, #4
33 cmp ip, #2
34 ldrb r3, [r1], #1
35USER( TUSER( strb) r3, [r0], #1) @ May fault
36 ldrgeb r3, [r1], #1
37USER( TUSER( strgeb) r3, [r0], #1) @ May fault
38 ldrgtb r3, [r1], #1
39USER( TUSER( strgtb) r3, [r0], #1) @ May fault
40 sub r2, r2, ip
41 b .Lc2u_dest_aligned
42
43ENTRY(__copy_to_user)
44 stmfd sp!, {r2, r4 - r7, lr}
45 cmp r2, #4
46 blt .Lc2u_not_enough
47 ands ip, r0, #3
48 bne .Lc2u_dest_not_aligned
49.Lc2u_dest_aligned:
50
51 ands ip, r1, #3
52 bne .Lc2u_src_not_aligned
53/*
54 * Seeing as there has to be at least 8 bytes to copy, we can
55 * copy one word, and force a user-mode page fault...
56 */
57
58.Lc2u_0fupi: subs r2, r2, #4
59 addmi ip, r2, #4
60 bmi .Lc2u_0nowords
61 ldr r3, [r1], #4
62USER( TUSER( str) r3, [r0], #4) @ May fault
63 mov ip, r0, lsl #32 - PAGE_SHIFT @ On each page, use a ld/st??t instruction
64 rsb ip, ip, #0
65 movs ip, ip, lsr #32 - PAGE_SHIFT
66 beq .Lc2u_0fupi
67/*
68 * ip = max no. of bytes to copy before needing another "strt" insn
69 */
70 cmp r2, ip
71 movlt ip, r2
72 sub r2, r2, ip
73 subs ip, ip, #32
74 blt .Lc2u_0rem8lp
75
76.Lc2u_0cpy8lp: ldmia r1!, {r3 - r6}
77 stmia r0!, {r3 - r6} @ Shouldnt fault
78 ldmia r1!, {r3 - r6}
79 subs ip, ip, #32
80 stmia r0!, {r3 - r6} @ Shouldnt fault
81 bpl .Lc2u_0cpy8lp
82
83.Lc2u_0rem8lp: cmn ip, #16
84 ldmgeia r1!, {r3 - r6}
85 stmgeia r0!, {r3 - r6} @ Shouldnt fault
86 tst ip, #8
87 ldmneia r1!, {r3 - r4}
88 stmneia r0!, {r3 - r4} @ Shouldnt fault
89 tst ip, #4
90 ldrne r3, [r1], #4
91 TUSER( strne) r3, [r0], #4 @ Shouldnt fault
92 ands ip, ip, #3
93 beq .Lc2u_0fupi
94.Lc2u_0nowords: teq ip, #0
95 beq .Lc2u_finished
96.Lc2u_nowords: cmp ip, #2
97 ldrb r3, [r1], #1
98USER( TUSER( strb) r3, [r0], #1) @ May fault
99 ldrgeb r3, [r1], #1
100USER( TUSER( strgeb) r3, [r0], #1) @ May fault
101 ldrgtb r3, [r1], #1
102USER( TUSER( strgtb) r3, [r0], #1) @ May fault
103 b .Lc2u_finished
104
105.Lc2u_not_enough:
106 movs ip, r2
107 bne .Lc2u_nowords
108.Lc2u_finished: mov r0, #0
109 ldmfd sp!, {r2, r4 - r7, pc}
110
111.Lc2u_src_not_aligned:
112 bic r1, r1, #3
113 ldr r7, [r1], #4
114 cmp ip, #2
115 bgt .Lc2u_3fupi
116 beq .Lc2u_2fupi
117.Lc2u_1fupi: subs r2, r2, #4
118 addmi ip, r2, #4
119 bmi .Lc2u_1nowords
120 mov r3, r7, pull #8
121 ldr r7, [r1], #4
122 orr r3, r3, r7, push #24
123USER( TUSER( str) r3, [r0], #4) @ May fault
124 mov ip, r0, lsl #32 - PAGE_SHIFT
125 rsb ip, ip, #0
126 movs ip, ip, lsr #32 - PAGE_SHIFT
127 beq .Lc2u_1fupi
128 cmp r2, ip
129 movlt ip, r2
130 sub r2, r2, ip
131 subs ip, ip, #16
132 blt .Lc2u_1rem8lp
133
134.Lc2u_1cpy8lp: mov r3, r7, pull #8
135 ldmia r1!, {r4 - r7}
136 subs ip, ip, #16
137 orr r3, r3, r4, push #24
138 mov r4, r4, pull #8
139 orr r4, r4, r5, push #24
140 mov r5, r5, pull #8
141 orr r5, r5, r6, push #24
142 mov r6, r6, pull #8
143 orr r6, r6, r7, push #24
144 stmia r0!, {r3 - r6} @ Shouldnt fault
145 bpl .Lc2u_1cpy8lp
146
147.Lc2u_1rem8lp: tst ip, #8
148 movne r3, r7, pull #8
149 ldmneia r1!, {r4, r7}
150 orrne r3, r3, r4, push #24
151 movne r4, r4, pull #8
152 orrne r4, r4, r7, push #24
153 stmneia r0!, {r3 - r4} @ Shouldnt fault
154 tst ip, #4
155 movne r3, r7, pull #8
156 ldrne r7, [r1], #4
157 orrne r3, r3, r7, push #24
158 TUSER( strne) r3, [r0], #4 @ Shouldnt fault
159 ands ip, ip, #3
160 beq .Lc2u_1fupi
161.Lc2u_1nowords: mov r3, r7, get_byte_1
162 teq ip, #0
163 beq .Lc2u_finished
164 cmp ip, #2
165USER( TUSER( strb) r3, [r0], #1) @ May fault
166 movge r3, r7, get_byte_2
167USER( TUSER( strgeb) r3, [r0], #1) @ May fault
168 movgt r3, r7, get_byte_3
169USER( TUSER( strgtb) r3, [r0], #1) @ May fault
170 b .Lc2u_finished
171
172.Lc2u_2fupi: subs r2, r2, #4
173 addmi ip, r2, #4
174 bmi .Lc2u_2nowords
175 mov r3, r7, pull #16
176 ldr r7, [r1], #4
177 orr r3, r3, r7, push #16
178USER( TUSER( str) r3, [r0], #4) @ May fault
179 mov ip, r0, lsl #32 - PAGE_SHIFT
180 rsb ip, ip, #0
181 movs ip, ip, lsr #32 - PAGE_SHIFT
182 beq .Lc2u_2fupi
183 cmp r2, ip
184 movlt ip, r2
185 sub r2, r2, ip
186 subs ip, ip, #16
187 blt .Lc2u_2rem8lp
188
189.Lc2u_2cpy8lp: mov r3, r7, pull #16
190 ldmia r1!, {r4 - r7}
191 subs ip, ip, #16
192 orr r3, r3, r4, push #16
193 mov r4, r4, pull #16
194 orr r4, r4, r5, push #16
195 mov r5, r5, pull #16
196 orr r5, r5, r6, push #16
197 mov r6, r6, pull #16
198 orr r6, r6, r7, push #16
199 stmia r0!, {r3 - r6} @ Shouldnt fault
200 bpl .Lc2u_2cpy8lp
201
202.Lc2u_2rem8lp: tst ip, #8
203 movne r3, r7, pull #16
204 ldmneia r1!, {r4, r7}
205 orrne r3, r3, r4, push #16
206 movne r4, r4, pull #16
207 orrne r4, r4, r7, push #16
208 stmneia r0!, {r3 - r4} @ Shouldnt fault
209 tst ip, #4
210 movne r3, r7, pull #16
211 ldrne r7, [r1], #4
212 orrne r3, r3, r7, push #16
213 TUSER( strne) r3, [r0], #4 @ Shouldnt fault
214 ands ip, ip, #3
215 beq .Lc2u_2fupi
216.Lc2u_2nowords: mov r3, r7, get_byte_2
217 teq ip, #0
218 beq .Lc2u_finished
219 cmp ip, #2
220USER( TUSER( strb) r3, [r0], #1) @ May fault
221 movge r3, r7, get_byte_3
222USER( TUSER( strgeb) r3, [r0], #1) @ May fault
223 ldrgtb r3, [r1], #0
224USER( TUSER( strgtb) r3, [r0], #1) @ May fault
225 b .Lc2u_finished
226
227.Lc2u_3fupi: subs r2, r2, #4
228 addmi ip, r2, #4
229 bmi .Lc2u_3nowords
230 mov r3, r7, pull #24
231 ldr r7, [r1], #4
232 orr r3, r3, r7, push #8
233USER( TUSER( str) r3, [r0], #4) @ May fault
234 mov ip, r0, lsl #32 - PAGE_SHIFT
235 rsb ip, ip, #0
236 movs ip, ip, lsr #32 - PAGE_SHIFT
237 beq .Lc2u_3fupi
238 cmp r2, ip
239 movlt ip, r2
240 sub r2, r2, ip
241 subs ip, ip, #16
242 blt .Lc2u_3rem8lp
243
244.Lc2u_3cpy8lp: mov r3, r7, pull #24
245 ldmia r1!, {r4 - r7}
246 subs ip, ip, #16
247 orr r3, r3, r4, push #8
248 mov r4, r4, pull #24
249 orr r4, r4, r5, push #8
250 mov r5, r5, pull #24
251 orr r5, r5, r6, push #8
252 mov r6, r6, pull #24
253 orr r6, r6, r7, push #8
254 stmia r0!, {r3 - r6} @ Shouldnt fault
255 bpl .Lc2u_3cpy8lp
256
257.Lc2u_3rem8lp: tst ip, #8
258 movne r3, r7, pull #24
259 ldmneia r1!, {r4, r7}
260 orrne r3, r3, r4, push #8
261 movne r4, r4, pull #24
262 orrne r4, r4, r7, push #8
263 stmneia r0!, {r3 - r4} @ Shouldnt fault
264 tst ip, #4
265 movne r3, r7, pull #24
266 ldrne r7, [r1], #4
267 orrne r3, r3, r7, push #8
268 TUSER( strne) r3, [r0], #4 @ Shouldnt fault
269 ands ip, ip, #3
270 beq .Lc2u_3fupi
271.Lc2u_3nowords: mov r3, r7, get_byte_3
272 teq ip, #0
273 beq .Lc2u_finished
274 cmp ip, #2
275USER( TUSER( strb) r3, [r0], #1) @ May fault
276 ldrgeb r3, [r1], #1
277USER( TUSER( strgeb) r3, [r0], #1) @ May fault
278 ldrgtb r3, [r1], #0
279USER( TUSER( strgtb) r3, [r0], #1) @ May fault
280 b .Lc2u_finished
281ENDPROC(__copy_to_user)
282
283 .pushsection .fixup,"ax"
284 .align 0
2859001: ldmfd sp!, {r0, r4 - r7, pc}
286 .popsection
287
288/* Prototype: unsigned long __copy_from_user(void *to,const void *from,unsigned long n);
289 * Purpose : copy a block from user memory to kernel memory
290 * Params : to - kernel memory
291 * : from - user memory
292 * : n - number of bytes to copy
293 * Returns : Number of bytes NOT copied.
294 */
295.Lcfu_dest_not_aligned:
296 rsb ip, ip, #4
297 cmp ip, #2
298USER( TUSER( ldrb) r3, [r1], #1) @ May fault
299 strb r3, [r0], #1
300USER( TUSER( ldrgeb) r3, [r1], #1) @ May fault
301 strgeb r3, [r0], #1
302USER( TUSER( ldrgtb) r3, [r1], #1) @ May fault
303 strgtb r3, [r0], #1
304 sub r2, r2, ip
305 b .Lcfu_dest_aligned
306
307ENTRY(__copy_from_user)
308 stmfd sp!, {r0, r2, r4 - r7, lr}
309 cmp r2, #4
310 blt .Lcfu_not_enough
311 ands ip, r0, #3
312 bne .Lcfu_dest_not_aligned
313.Lcfu_dest_aligned:
314 ands ip, r1, #3
315 bne .Lcfu_src_not_aligned
316
317/*
318 * Seeing as there has to be at least 8 bytes to copy, we can
319 * copy one word, and force a user-mode page fault...
320 */
321
322.Lcfu_0fupi: subs r2, r2, #4
323 addmi ip, r2, #4
324 bmi .Lcfu_0nowords
325USER( TUSER( ldr) r3, [r1], #4)
326 str r3, [r0], #4
327 mov ip, r1, lsl #32 - PAGE_SHIFT @ On each page, use a ld/st??t instruction
328 rsb ip, ip, #0
329 movs ip, ip, lsr #32 - PAGE_SHIFT
330 beq .Lcfu_0fupi
331/*
332 * ip = max no. of bytes to copy before needing another "strt" insn
333 */
334 cmp r2, ip
335 movlt ip, r2
336 sub r2, r2, ip
337 subs ip, ip, #32
338 blt .Lcfu_0rem8lp
339
340.Lcfu_0cpy8lp: ldmia r1!, {r3 - r6} @ Shouldnt fault
341 stmia r0!, {r3 - r6}
342 ldmia r1!, {r3 - r6} @ Shouldnt fault
343 subs ip, ip, #32
344 stmia r0!, {r3 - r6}
345 bpl .Lcfu_0cpy8lp
346
347.Lcfu_0rem8lp: cmn ip, #16
348 ldmgeia r1!, {r3 - r6} @ Shouldnt fault
349 stmgeia r0!, {r3 - r6}
350 tst ip, #8
351 ldmneia r1!, {r3 - r4} @ Shouldnt fault
352 stmneia r0!, {r3 - r4}
353 tst ip, #4
354 TUSER( ldrne) r3, [r1], #4 @ Shouldnt fault
355 strne r3, [r0], #4
356 ands ip, ip, #3
357 beq .Lcfu_0fupi
358.Lcfu_0nowords: teq ip, #0
359 beq .Lcfu_finished
360.Lcfu_nowords: cmp ip, #2
361USER( TUSER( ldrb) r3, [r1], #1) @ May fault
362 strb r3, [r0], #1
363USER( TUSER( ldrgeb) r3, [r1], #1) @ May fault
364 strgeb r3, [r0], #1
365USER( TUSER( ldrgtb) r3, [r1], #1) @ May fault
366 strgtb r3, [r0], #1
367 b .Lcfu_finished
368
369.Lcfu_not_enough:
370 movs ip, r2
371 bne .Lcfu_nowords
372.Lcfu_finished: mov r0, #0
373 add sp, sp, #8
374 ldmfd sp!, {r4 - r7, pc}
375
376.Lcfu_src_not_aligned:
377 bic r1, r1, #3
378USER( TUSER( ldr) r7, [r1], #4) @ May fault
379 cmp ip, #2
380 bgt .Lcfu_3fupi
381 beq .Lcfu_2fupi
382.Lcfu_1fupi: subs r2, r2, #4
383 addmi ip, r2, #4
384 bmi .Lcfu_1nowords
385 mov r3, r7, pull #8
386USER( TUSER( ldr) r7, [r1], #4) @ May fault
387 orr r3, r3, r7, push #24
388 str r3, [r0], #4
389 mov ip, r1, lsl #32 - PAGE_SHIFT
390 rsb ip, ip, #0
391 movs ip, ip, lsr #32 - PAGE_SHIFT
392 beq .Lcfu_1fupi
393 cmp r2, ip
394 movlt ip, r2
395 sub r2, r2, ip
396 subs ip, ip, #16
397 blt .Lcfu_1rem8lp
398
399.Lcfu_1cpy8lp: mov r3, r7, pull #8
400 ldmia r1!, {r4 - r7} @ Shouldnt fault
401 subs ip, ip, #16
402 orr r3, r3, r4, push #24
403 mov r4, r4, pull #8
404 orr r4, r4, r5, push #24
405 mov r5, r5, pull #8
406 orr r5, r5, r6, push #24
407 mov r6, r6, pull #8
408 orr r6, r6, r7, push #24
409 stmia r0!, {r3 - r6}
410 bpl .Lcfu_1cpy8lp
411
412.Lcfu_1rem8lp: tst ip, #8
413 movne r3, r7, pull #8
414 ldmneia r1!, {r4, r7} @ Shouldnt fault
415 orrne r3, r3, r4, push #24
416 movne r4, r4, pull #8
417 orrne r4, r4, r7, push #24
418 stmneia r0!, {r3 - r4}
419 tst ip, #4
420 movne r3, r7, pull #8
421USER( TUSER( ldrne) r7, [r1], #4) @ May fault
422 orrne r3, r3, r7, push #24
423 strne r3, [r0], #4
424 ands ip, ip, #3
425 beq .Lcfu_1fupi
426.Lcfu_1nowords: mov r3, r7, get_byte_1
427 teq ip, #0
428 beq .Lcfu_finished
429 cmp ip, #2
430 strb r3, [r0], #1
431 movge r3, r7, get_byte_2
432 strgeb r3, [r0], #1
433 movgt r3, r7, get_byte_3
434 strgtb r3, [r0], #1
435 b .Lcfu_finished
436
437.Lcfu_2fupi: subs r2, r2, #4
438 addmi ip, r2, #4
439 bmi .Lcfu_2nowords
440 mov r3, r7, pull #16
441USER( TUSER( ldr) r7, [r1], #4) @ May fault
442 orr r3, r3, r7, push #16
443 str r3, [r0], #4
444 mov ip, r1, lsl #32 - PAGE_SHIFT
445 rsb ip, ip, #0
446 movs ip, ip, lsr #32 - PAGE_SHIFT
447 beq .Lcfu_2fupi
448 cmp r2, ip
449 movlt ip, r2
450 sub r2, r2, ip
451 subs ip, ip, #16
452 blt .Lcfu_2rem8lp
453
454
455.Lcfu_2cpy8lp: mov r3, r7, pull #16
456 ldmia r1!, {r4 - r7} @ Shouldnt fault
457 subs ip, ip, #16
458 orr r3, r3, r4, push #16
459 mov r4, r4, pull #16
460 orr r4, r4, r5, push #16
461 mov r5, r5, pull #16
462 orr r5, r5, r6, push #16
463 mov r6, r6, pull #16
464 orr r6, r6, r7, push #16
465 stmia r0!, {r3 - r6}
466 bpl .Lcfu_2cpy8lp
467
468.Lcfu_2rem8lp: tst ip, #8
469 movne r3, r7, pull #16
470 ldmneia r1!, {r4, r7} @ Shouldnt fault
471 orrne r3, r3, r4, push #16
472 movne r4, r4, pull #16
473 orrne r4, r4, r7, push #16
474 stmneia r0!, {r3 - r4}
475 tst ip, #4
476 movne r3, r7, pull #16
477USER( TUSER( ldrne) r7, [r1], #4) @ May fault
478 orrne r3, r3, r7, push #16
479 strne r3, [r0], #4
480 ands ip, ip, #3
481 beq .Lcfu_2fupi
482.Lcfu_2nowords: mov r3, r7, get_byte_2
483 teq ip, #0
484 beq .Lcfu_finished
485 cmp ip, #2
486 strb r3, [r0], #1
487 movge r3, r7, get_byte_3
488 strgeb r3, [r0], #1
489USER( TUSER( ldrgtb) r3, [r1], #0) @ May fault
490 strgtb r3, [r0], #1
491 b .Lcfu_finished
492
493.Lcfu_3fupi: subs r2, r2, #4
494 addmi ip, r2, #4
495 bmi .Lcfu_3nowords
496 mov r3, r7, pull #24
497USER( TUSER( ldr) r7, [r1], #4) @ May fault
498 orr r3, r3, r7, push #8
499 str r3, [r0], #4
500 mov ip, r1, lsl #32 - PAGE_SHIFT
501 rsb ip, ip, #0
502 movs ip, ip, lsr #32 - PAGE_SHIFT
503 beq .Lcfu_3fupi
504 cmp r2, ip
505 movlt ip, r2
506 sub r2, r2, ip
507 subs ip, ip, #16
508 blt .Lcfu_3rem8lp
509
510.Lcfu_3cpy8lp: mov r3, r7, pull #24
511 ldmia r1!, {r4 - r7} @ Shouldnt fault
512 orr r3, r3, r4, push #8
513 mov r4, r4, pull #24
514 orr r4, r4, r5, push #8
515 mov r5, r5, pull #24
516 orr r5, r5, r6, push #8
517 mov r6, r6, pull #24
518 orr r6, r6, r7, push #8
519 stmia r0!, {r3 - r6}
520 subs ip, ip, #16
521 bpl .Lcfu_3cpy8lp
522
523.Lcfu_3rem8lp: tst ip, #8
524 movne r3, r7, pull #24
525 ldmneia r1!, {r4, r7} @ Shouldnt fault
526 orrne r3, r3, r4, push #8
527 movne r4, r4, pull #24
528 orrne r4, r4, r7, push #8
529 stmneia r0!, {r3 - r4}
530 tst ip, #4
531 movne r3, r7, pull #24
532USER( TUSER( ldrne) r7, [r1], #4) @ May fault
533 orrne r3, r3, r7, push #8
534 strne r3, [r0], #4
535 ands ip, ip, #3
536 beq .Lcfu_3fupi
537.Lcfu_3nowords: mov r3, r7, get_byte_3
538 teq ip, #0
539 beq .Lcfu_finished
540 cmp ip, #2
541 strb r3, [r0], #1
542USER( TUSER( ldrgeb) r3, [r1], #1) @ May fault
543 strgeb r3, [r0], #1
544USER( TUSER( ldrgtb) r3, [r1], #1) @ May fault
545 strgtb r3, [r0], #1
546 b .Lcfu_finished
547ENDPROC(__copy_from_user)
548
549 .pushsection .fixup,"ax"
550 .align 0
551 /*
552 * We took an exception. r0 contains a pointer to
553 * the byte not copied.
554 */
5559001: ldr r2, [sp], #4 @ void *to
556 sub r2, r0, r2 @ bytes copied
557 ldr r1, [sp], #4 @ unsigned long count
558 subs r4, r1, r2 @ bytes left to copy
559 movne r1, r4
560 blne __memzero
561 mov r0, r4
562 ldmfd sp!, {r4 - r7, pc}
563 .popsection
564
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 5de69f2fcca9..f6b9fc70161b 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -162,38 +162,6 @@ static void __init davinci_ntosd2_map_io(void)
162 dm644x_init(); 162 dm644x_init();
163} 163}
164 164
165/*
166 I2C initialization
167*/
168static struct davinci_i2c_platform_data ntosd2_i2c_pdata = {
169 .bus_freq = 20 /* kHz */,
170 .bus_delay = 100 /* usec */,
171};
172
173static struct i2c_board_info __initdata ntosd2_i2c_info[] = {
174};
175
176static int ntosd2_init_i2c(void)
177{
178 int status;
179
180 davinci_init_i2c(&ntosd2_i2c_pdata);
181 status = gpio_request(NTOSD2_MSP430_IRQ, ntosd2_i2c_info[0].type);
182 if (status == 0) {
183 status = gpio_direction_input(NTOSD2_MSP430_IRQ);
184 if (status == 0) {
185 status = gpio_to_irq(NTOSD2_MSP430_IRQ);
186 if (status > 0) {
187 ntosd2_i2c_info[0].irq = status;
188 i2c_register_board_info(1,
189 ntosd2_i2c_info,
190 ARRAY_SIZE(ntosd2_i2c_info));
191 }
192 }
193 }
194 return status;
195}
196
197static struct davinci_mmc_config davinci_ntosd2_mmc_config = { 165static struct davinci_mmc_config davinci_ntosd2_mmc_config = {
198 .wires = 4, 166 .wires = 4,
199 .version = MMC_CTLR_VERSION_1 167 .version = MMC_CTLR_VERSION_1
@@ -218,7 +186,6 @@ static __init void davinci_ntosd2_init(void)
218{ 186{
219 struct clk *aemif_clk; 187 struct clk *aemif_clk;
220 struct davinci_soc_info *soc_info = &davinci_soc_info; 188 struct davinci_soc_info *soc_info = &davinci_soc_info;
221 int status;
222 189
223 aemif_clk = clk_get(NULL, "aemif"); 190 aemif_clk = clk_get(NULL, "aemif");
224 clk_enable(aemif_clk); 191 clk_enable(aemif_clk);
@@ -242,12 +209,6 @@ static __init void davinci_ntosd2_init(void)
242 platform_add_devices(davinci_ntosd2_devices, 209 platform_add_devices(davinci_ntosd2_devices,
243 ARRAY_SIZE(davinci_ntosd2_devices)); 210 ARRAY_SIZE(davinci_ntosd2_devices));
244 211
245 /* Initialize I2C interface specific for this board */
246 status = ntosd2_init_i2c();
247 if (status < 0)
248 pr_warning("davinci_ntosd2_init: msp430 irq setup failed:"
249 " %d\n", status);
250
251 davinci_serial_init(&uart_config); 212 davinci_serial_init(&uart_config);
252 dm644x_init_asp(&dm644x_ntosd2_snd_data); 213 dm644x_init_asp(&dm644x_ntosd2_snd_data);
253 214
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index d1624a315c9a..783eab6845c4 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -546,6 +546,7 @@ static struct lcd_ctrl_config lcd_cfg = {
546 .sync_edge = 0, 546 .sync_edge = 0,
547 .sync_ctrl = 1, 547 .sync_ctrl = 1,
548 .raster_order = 0, 548 .raster_order = 0,
549 .fifo_th = 6,
549}; 550};
550 551
551struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = { 552struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata = {
diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index f07fd16e0c9b..9bc97a5baaa8 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -20,22 +20,6 @@
20#include <mach/bridge-regs.h> 20#include <mach/bridge-regs.h>
21#include "common.h" 21#include "common.h"
22 22
23static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
24{
25 int irqoff;
26 BUG_ON(irq < IRQ_DOVE_GPIO_0_7 || irq > IRQ_DOVE_HIGH_GPIO);
27
28 irqoff = irq <= IRQ_DOVE_GPIO_16_23 ? irq - IRQ_DOVE_GPIO_0_7 :
29 3 + irq - IRQ_DOVE_GPIO_24_31;
30
31 orion_gpio_irq_handler(irqoff << 3);
32 if (irq == IRQ_DOVE_HIGH_GPIO) {
33 orion_gpio_irq_handler(40);
34 orion_gpio_irq_handler(48);
35 orion_gpio_irq_handler(56);
36 }
37}
38
39static void pmu_irq_mask(struct irq_data *d) 23static void pmu_irq_mask(struct irq_data *d)
40{ 24{
41 int pin = irq_to_pmu(d->irq); 25 int pin = irq_to_pmu(d->irq);
@@ -90,6 +74,27 @@ static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc)
90 } 74 }
91} 75}
92 76
77static int __initdata gpio0_irqs[4] = {
78 IRQ_DOVE_GPIO_0_7,
79 IRQ_DOVE_GPIO_8_15,
80 IRQ_DOVE_GPIO_16_23,
81 IRQ_DOVE_GPIO_24_31,
82};
83
84static int __initdata gpio1_irqs[4] = {
85 IRQ_DOVE_HIGH_GPIO,
86 0,
87 0,
88 0,
89};
90
91static int __initdata gpio2_irqs[4] = {
92 0,
93 0,
94 0,
95 0,
96};
97
93void __init dove_init_irq(void) 98void __init dove_init_irq(void)
94{ 99{
95 int i; 100 int i;
@@ -100,19 +105,14 @@ void __init dove_init_irq(void)
100 /* 105 /*
101 * Initialize gpiolib for GPIOs 0-71. 106 * Initialize gpiolib for GPIOs 0-71.
102 */ 107 */
103 orion_gpio_init(0, 32, DOVE_GPIO_LO_VIRT_BASE, 0, 108 orion_gpio_init(NULL, 0, 32, (void __iomem *)DOVE_GPIO_LO_VIRT_BASE, 0,
104 IRQ_DOVE_GPIO_START); 109 IRQ_DOVE_GPIO_START, gpio0_irqs);
105 irq_set_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler); 110
106 irq_set_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler); 111 orion_gpio_init(NULL, 32, 32, (void __iomem *)DOVE_GPIO_HI_VIRT_BASE, 0,
107 irq_set_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler); 112 IRQ_DOVE_GPIO_START + 32, gpio1_irqs);
108 irq_set_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler); 113
109 114 orion_gpio_init(NULL, 64, 8, (void __iomem *)DOVE_GPIO2_VIRT_BASE, 0,
110 orion_gpio_init(32, 32, DOVE_GPIO_HI_VIRT_BASE, 0, 115 IRQ_DOVE_GPIO_START + 64, gpio2_irqs);
111 IRQ_DOVE_GPIO_START + 32);
112 irq_set_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler);
113
114 orion_gpio_init(64, 8, DOVE_GPIO2_VIRT_BASE, 0,
115 IRQ_DOVE_GPIO_START + 64);
116 116
117 /* 117 /*
118 * Mask and clear PMU interrupts 118 * Mask and clear PMU interrupts
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index 373c3c00d24c..c0bc83a7663e 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -115,7 +115,7 @@ static __init int exynos_pm_dt_parse_domains(void)
115} 115}
116#endif /* CONFIG_OF */ 116#endif /* CONFIG_OF */
117 117
118static __init void exynos_pm_add_dev_to_genpd(struct platform_device *pdev, 118static __init __maybe_unused void exynos_pm_add_dev_to_genpd(struct platform_device *pdev,
119 struct exynos_pm_domain *pd) 119 struct exynos_pm_domain *pd)
120{ 120{
121 if (pdev->dev.bus) { 121 if (pdev->dev.bus) {
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 7aa6313fb167..f69ca4680049 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -223,7 +223,7 @@ int __init mx27_clocks_init(unsigned long fref)
223 clk_register_clkdev(clk[per3_gate], "per", "imx-fb.0"); 223 clk_register_clkdev(clk[per3_gate], "per", "imx-fb.0");
224 clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0"); 224 clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
225 clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0"); 225 clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0");
226 clk_register_clkdev(clk[csi_ahb_gate], NULL, "mx2-camera.0"); 226 clk_register_clkdev(clk[csi_ahb_gate], "ahb", "mx2-camera.0");
227 clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc"); 227 clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
228 clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc"); 228 clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc");
229 clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc"); 229 clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc");
@@ -250,8 +250,10 @@ int __init mx27_clocks_init(unsigned long fref)
250 clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx-i2c.1"); 250 clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx-i2c.1");
251 clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0"); 251 clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0");
252 clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad"); 252 clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad");
253 clk_register_clkdev(clk[emma_ahb_gate], "ahb", "imx-emma"); 253 clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "mx2-camera.0");
254 clk_register_clkdev(clk[emma_ipg_gate], "ipg", "imx-emma"); 254 clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "mx2-camera.0");
255 clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0");
256 clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0");
255 clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL); 257 clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL);
256 clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL); 258 clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL);
257 clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL); 259 clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL);
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index 8e19e70f90f9..1253af2d9971 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -130,7 +130,7 @@ int __init mx31_clocks_init(unsigned long fref)
130 clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0"); 130 clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0");
131 clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core"); 131 clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
132 clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb"); 132 clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
133 clk_register_clkdev(clk[kpp_gate], "kpp", NULL); 133 clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
134 clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.0"); 134 clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.0");
135 clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.0"); 135 clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.0");
136 clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0"); 136 clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0");
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index f6086693ebd2..4bdcaa97bd98 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -303,6 +303,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
303 clk_prepare_enable(clk[aips_tz2]); /* fec */ 303 clk_prepare_enable(clk[aips_tz2]); /* fec */
304 clk_prepare_enable(clk[spba]); 304 clk_prepare_enable(clk[spba]);
305 clk_prepare_enable(clk[emi_fast_gate]); /* fec */ 305 clk_prepare_enable(clk[emi_fast_gate]); /* fec */
306 clk_prepare_enable(clk[emi_slow_gate]); /* eim */
306 clk_prepare_enable(clk[tmax1]); 307 clk_prepare_enable(clk[tmax1]);
307 clk_prepare_enable(clk[tmax2]); /* esdhc2, fec */ 308 clk_prepare_enable(clk[tmax2]); /* esdhc2, fec */
308 clk_prepare_enable(clk[tmax3]); /* esdhc1, esdhc4 */ 309 clk_prepare_enable(clk[tmax3]); /* esdhc1, esdhc4 */
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index ebf680bebdf2..3fa6c51390da 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -11,6 +11,7 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/device.h> 13#include <linux/device.h>
14#include <linux/export.h>
14#include <linux/spinlock.h> 15#include <linux/spinlock.h>
15#include <linux/interrupt.h> 16#include <linux/interrupt.h>
16#include <linux/irq.h> 17#include <linux/irq.h>
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index 7b1055c8e0b9..3b2267529f5e 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -456,7 +456,7 @@ static void __init ap_init_timer(void)
456 456
457 clk = clk_get_sys("ap_timer", NULL); 457 clk = clk_get_sys("ap_timer", NULL);
458 BUG_ON(IS_ERR(clk)); 458 BUG_ON(IS_ERR(clk));
459 clk_enable(clk); 459 clk_prepare_enable(clk);
460 rate = clk_get_rate(clk); 460 rate = clk_get_rate(clk);
461 461
462 writel(0, TIMER0_VA_BASE + TIMER_CTRL); 462 writel(0, TIMER0_VA_BASE + TIMER_CTRL);
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig
index 199764fe0fb0..ca5c15a4e626 100644
--- a/arch/arm/mach-kirkwood/Kconfig
+++ b/arch/arm/mach-kirkwood/Kconfig
@@ -80,6 +80,35 @@ config MACH_IB62X0_DT
80 RaidSonic IB-NAS6210 & IB-NAS6220 devices, using 80 RaidSonic IB-NAS6210 & IB-NAS6220 devices, using
81 Flattened Device Tree. 81 Flattened Device Tree.
82 82
83config MACH_TS219_DT
84 bool "Device Tree for QNAP TS-11X, TS-21X NAS"
85 select ARCH_KIRKWOOD_DT
86 select ARM_APPENDED_DTB
87 select ARM_ATAG_DTB_COMPAT
88 help
89 Say 'Y' here if you want your kernel to support the QNAP
90 TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and
91 TS-219P+ Turbo NAS devices using Fattened Device Tree.
92 There are two different Device Tree descriptions, depending
93 on if the device is based on an if the board uses the MV6281
94 or MV6282. If you have the wrong one, the buttons will not
95 work.
96
97config MACH_GOFLEXNET_DT
98 bool "Seagate GoFlex Net (Flattened Device Tree)"
99 select ARCH_KIRKWOOD_DT
100 help
101 Say 'Y' here if you want your kernel to support the
102 Seagate GoFlex Net (Flattened Device Tree).
103
104config MACH_LSXL_DT
105 bool "Buffalo Linkstation LS-XHL, LS-CHLv2 (Flattened Device Tree)"
106 select ARCH_KIRKWOOD_DT
107 help
108 Say 'Y' here if you want your kernel to support the
109 Buffalo Linkstation LS-XHL & LS-CHLv2 devices, using
110 Flattened Device Tree.
111
83config MACH_TS219 112config MACH_TS219
84 bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS" 113 bool "QNAP TS-110, TS-119, TS-119P+, TS-210, TS-219, TS-219P and TS-219P+ Turbo NAS"
85 help 114 help
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile
index d2b05907b10e..055c85a1cc46 100644
--- a/arch/arm/mach-kirkwood/Makefile
+++ b/arch/arm/mach-kirkwood/Makefile
@@ -25,3 +25,6 @@ obj-$(CONFIG_MACH_DREAMPLUG_DT) += board-dreamplug.o
25obj-$(CONFIG_MACH_ICONNECT_DT) += board-iconnect.o 25obj-$(CONFIG_MACH_ICONNECT_DT) += board-iconnect.o
26obj-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += board-dnskw.o 26obj-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += board-dnskw.o
27obj-$(CONFIG_MACH_IB62X0_DT) += board-ib62x0.o 27obj-$(CONFIG_MACH_IB62X0_DT) += board-ib62x0.o
28obj-$(CONFIG_MACH_TS219_DT) += board-ts219.o tsx1x-common.o
29obj-$(CONFIG_MACH_GOFLEXNET_DT) += board-goflexnet.o
30obj-$(CONFIG_MACH_LSXL_DT) += board-lsxl.o
diff --git a/arch/arm/mach-kirkwood/Makefile.boot b/arch/arm/mach-kirkwood/Makefile.boot
index 02edbdf5b065..a5717558ee89 100644
--- a/arch/arm/mach-kirkwood/Makefile.boot
+++ b/arch/arm/mach-kirkwood/Makefile.boot
@@ -7,3 +7,7 @@ dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns320.dtb
7dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb 7dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb
8dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb 8dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb
9dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb 9dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb
10dtb-$(CONFIG_MACH_TS219_DT) += kirkwood-qnap-ts219.dtb
11dtb-$(CONFIG_MACH_GOFLEXNET_DT) += kirkwood-goflexnet.dtb
12dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb
13dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb
diff --git a/arch/arm/mach-kirkwood/board-dnskw.c b/arch/arm/mach-kirkwood/board-dnskw.c
index 58c2d68f9443..4ab35065a144 100644
--- a/arch/arm/mach-kirkwood/board-dnskw.c
+++ b/arch/arm/mach-kirkwood/board-dnskw.c
@@ -14,13 +14,11 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/i2c.h>
18#include <linux/ata_platform.h> 17#include <linux/ata_platform.h>
19#include <linux/mv643xx_eth.h> 18#include <linux/mv643xx_eth.h>
20#include <linux/of.h> 19#include <linux/of.h>
21#include <linux/gpio.h> 20#include <linux/gpio.h>
22#include <linux/input.h> 21#include <linux/input.h>
23#include <linux/gpio_keys.h>
24#include <linux/gpio-fan.h> 22#include <linux/gpio-fan.h>
25#include <linux/leds.h> 23#include <linux/leds.h>
26#include <asm/mach-types.h> 24#include <asm/mach-types.h>
@@ -35,10 +33,6 @@ static struct mv643xx_eth_platform_data dnskw_ge00_data = {
35 .phy_addr = MV643XX_ETH_PHY_ADDR(8), 33 .phy_addr = MV643XX_ETH_PHY_ADDR(8),
36}; 34};
37 35
38static struct mv_sata_platform_data dnskw_sata_data = {
39 .n_ports = 2,
40};
41
42static unsigned int dnskw_mpp_config[] __initdata = { 36static unsigned int dnskw_mpp_config[] __initdata = {
43 MPP13_UART1_TXD, /* Custom ... */ 37 MPP13_UART1_TXD, /* Custom ... */
44 MPP14_UART1_RXD, /* ... Controller (DNS-320 only) */ 38 MPP14_UART1_RXD, /* ... Controller (DNS-320 only) */
@@ -73,132 +67,6 @@ static unsigned int dnskw_mpp_config[] __initdata = {
73 0 67 0
74}; 68};
75 69
76static struct gpio_led dns325_led_pins[] = {
77 {
78 .name = "dns325:white:power",
79 .gpio = 26,
80 .active_low = 1,
81 .default_trigger = "default-on",
82 },
83 {
84 .name = "dns325:white:usb",
85 .gpio = 43,
86 .active_low = 1,
87 },
88 {
89 .name = "dns325:red:l_hdd",
90 .gpio = 28,
91 .active_low = 1,
92 },
93 {
94 .name = "dns325:red:r_hdd",
95 .gpio = 27,
96 .active_low = 1,
97 },
98 {
99 .name = "dns325:red:usb",
100 .gpio = 29,
101 .active_low = 1,
102 },
103};
104
105static struct gpio_led_platform_data dns325_led_data = {
106 .num_leds = ARRAY_SIZE(dns325_led_pins),
107 .leds = dns325_led_pins,
108};
109
110static struct platform_device dns325_led_device = {
111 .name = "leds-gpio",
112 .id = -1,
113 .dev = {
114 .platform_data = &dns325_led_data,
115 },
116};
117
118static struct gpio_led dns320_led_pins[] = {
119 {
120 .name = "dns320:blue:power",
121 .gpio = 26,
122 .active_low = 1,
123 .default_trigger = "default-on",
124 },
125 {
126 .name = "dns320:blue:usb",
127 .gpio = 43,
128 .active_low = 1,
129 },
130 {
131 .name = "dns320:orange:l_hdd",
132 .gpio = 28,
133 .active_low = 1,
134 },
135 {
136 .name = "dns320:orange:r_hdd",
137 .gpio = 27,
138 .active_low = 1,
139 },
140 {
141 .name = "dns320:orange:usb",
142 .gpio = 35,
143 .active_low = 1,
144 },
145};
146
147static struct gpio_led_platform_data dns320_led_data = {
148 .num_leds = ARRAY_SIZE(dns320_led_pins),
149 .leds = dns320_led_pins,
150};
151
152static struct platform_device dns320_led_device = {
153 .name = "leds-gpio",
154 .id = -1,
155 .dev = {
156 .platform_data = &dns320_led_data,
157 },
158};
159
160static struct i2c_board_info dns325_i2c_board_info[] __initdata = {
161 {
162 I2C_BOARD_INFO("lm75", 0x48),
163 },
164 /* Something at 0x0c also */
165};
166
167static struct gpio_keys_button dnskw_button_pins[] = {
168 {
169 .code = KEY_POWER,
170 .gpio = 34,
171 .desc = "Power button",
172 .active_low = 1,
173 },
174 {
175 .code = KEY_EJECTCD,
176 .gpio = 47,
177 .desc = "USB unmount button",
178 .active_low = 1,
179 },
180 {
181 .code = KEY_RESTART,
182 .gpio = 48,
183 .desc = "Reset button",
184 .active_low = 1,
185 },
186};
187
188static struct gpio_keys_platform_data dnskw_button_data = {
189 .buttons = dnskw_button_pins,
190 .nbuttons = ARRAY_SIZE(dnskw_button_pins),
191};
192
193static struct platform_device dnskw_button_device = {
194 .name = "gpio-keys",
195 .id = -1,
196 .num_resources = 0,
197 .dev = {
198 .platform_data = &dnskw_button_data,
199 }
200};
201
202/* Fan: ADDA AD045HB-G73 40mm 6000rpm@5v */ 70/* Fan: ADDA AD045HB-G73 40mm 6000rpm@5v */
203static struct gpio_fan_speed dnskw_fan_speed[] = { 71static struct gpio_fan_speed dnskw_fan_speed[] = {
204 { 0, 0 }, 72 { 0, 0 },
@@ -245,20 +113,9 @@ void __init dnskw_init(void)
245 113
246 kirkwood_ehci_init(); 114 kirkwood_ehci_init();
247 kirkwood_ge00_init(&dnskw_ge00_data); 115 kirkwood_ge00_init(&dnskw_ge00_data);
248 kirkwood_sata_init(&dnskw_sata_data);
249 kirkwood_i2c_init();
250 116
251 platform_device_register(&dnskw_button_device);
252 platform_device_register(&dnskw_fan_device); 117 platform_device_register(&dnskw_fan_device);
253 118
254 if (of_machine_is_compatible("dlink,dns-325")) {
255 i2c_register_board_info(0, dns325_i2c_board_info,
256 ARRAY_SIZE(dns325_i2c_board_info));
257 platform_device_register(&dns325_led_device);
258
259 } else if (of_machine_is_compatible("dlink,dns-320"))
260 platform_device_register(&dns320_led_device);
261
262 /* Register power-off GPIO. */ 119 /* Register power-off GPIO. */
263 if (gpio_request(36, "dnskw:power:off") == 0 120 if (gpio_request(36, "dnskw:power:off") == 0
264 && gpio_direction_output(36, 0) == 0) 121 && gpio_direction_output(36, 0) == 0)
diff --git a/arch/arm/mach-kirkwood/board-dreamplug.c b/arch/arm/mach-kirkwood/board-dreamplug.c
index 55e357ab2923..aeb234d0d0e3 100644
--- a/arch/arm/mach-kirkwood/board-dreamplug.c
+++ b/arch/arm/mach-kirkwood/board-dreamplug.c
@@ -14,7 +14,6 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/platform_device.h> 16#include <linux/platform_device.h>
17#include <linux/mtd/partitions.h>
18#include <linux/ata_platform.h> 17#include <linux/ata_platform.h>
19#include <linux/mv643xx_eth.h> 18#include <linux/mv643xx_eth.h>
20#include <linux/of.h> 19#include <linux/of.h>
@@ -23,7 +22,6 @@
23#include <linux/of_irq.h> 22#include <linux/of_irq.h>
24#include <linux/of_platform.h> 23#include <linux/of_platform.h>
25#include <linux/gpio.h> 24#include <linux/gpio.h>
26#include <linux/leds.h>
27#include <linux/mtd/physmap.h> 25#include <linux/mtd/physmap.h>
28#include <linux/spi/flash.h> 26#include <linux/spi/flash.h>
29#include <linux/spi/spi.h> 27#include <linux/spi/spi.h>
@@ -36,42 +34,6 @@
36#include "common.h" 34#include "common.h"
37#include "mpp.h" 35#include "mpp.h"
38 36
39struct mtd_partition dreamplug_partitions[] = {
40 {
41 .name = "u-boot",
42 .size = SZ_512K,
43 .offset = 0,
44 },
45 {
46 .name = "u-boot env",
47 .size = SZ_64K,
48 .offset = SZ_512K + SZ_512K,
49 },
50 {
51 .name = "dtb",
52 .size = SZ_64K,
53 .offset = SZ_512K + SZ_512K + SZ_512K,
54 },
55};
56
57static const struct flash_platform_data dreamplug_spi_slave_data = {
58 .type = "mx25l1606e",
59 .name = "spi_flash",
60 .parts = dreamplug_partitions,
61 .nr_parts = ARRAY_SIZE(dreamplug_partitions),
62};
63
64static struct spi_board_info __initdata dreamplug_spi_slave_info[] = {
65 {
66 .modalias = "m25p80",
67 .platform_data = &dreamplug_spi_slave_data,
68 .irq = -1,
69 .max_speed_hz = 50000000,
70 .bus_num = 0,
71 .chip_select = 0,
72 },
73};
74
75static struct mv643xx_eth_platform_data dreamplug_ge00_data = { 37static struct mv643xx_eth_platform_data dreamplug_ge00_data = {
76 .phy_addr = MV643XX_ETH_PHY_ADDR(0), 38 .phy_addr = MV643XX_ETH_PHY_ADDR(0),
77}; 39};
@@ -80,45 +42,10 @@ static struct mv643xx_eth_platform_data dreamplug_ge01_data = {
80 .phy_addr = MV643XX_ETH_PHY_ADDR(1), 42 .phy_addr = MV643XX_ETH_PHY_ADDR(1),
81}; 43};
82 44
83static struct mv_sata_platform_data dreamplug_sata_data = {
84 .n_ports = 1,
85};
86
87static struct mvsdio_platform_data dreamplug_mvsdio_data = { 45static struct mvsdio_platform_data dreamplug_mvsdio_data = {
88 /* unfortunately the CD signal has not been connected */ 46 /* unfortunately the CD signal has not been connected */
89}; 47};
90 48
91static struct gpio_led dreamplug_led_pins[] = {
92 {
93 .name = "dreamplug:blue:bluetooth",
94 .gpio = 47,
95 .active_low = 1,
96 },
97 {
98 .name = "dreamplug:green:wifi",
99 .gpio = 48,
100 .active_low = 1,
101 },
102 {
103 .name = "dreamplug:green:wifi_ap",
104 .gpio = 49,
105 .active_low = 1,
106 },
107};
108
109static struct gpio_led_platform_data dreamplug_led_data = {
110 .leds = dreamplug_led_pins,
111 .num_leds = ARRAY_SIZE(dreamplug_led_pins),
112};
113
114static struct platform_device dreamplug_leds = {
115 .name = "leds-gpio",
116 .id = -1,
117 .dev = {
118 .platform_data = &dreamplug_led_data,
119 }
120};
121
122static unsigned int dreamplug_mpp_config[] __initdata = { 49static unsigned int dreamplug_mpp_config[] __initdata = {
123 MPP0_SPI_SCn, 50 MPP0_SPI_SCn,
124 MPP1_SPI_MOSI, 51 MPP1_SPI_MOSI,
@@ -137,15 +64,8 @@ void __init dreamplug_init(void)
137 */ 64 */
138 kirkwood_mpp_conf(dreamplug_mpp_config); 65 kirkwood_mpp_conf(dreamplug_mpp_config);
139 66
140 spi_register_board_info(dreamplug_spi_slave_info,
141 ARRAY_SIZE(dreamplug_spi_slave_info));
142 kirkwood_spi_init();
143
144 kirkwood_ehci_init(); 67 kirkwood_ehci_init();
145 kirkwood_ge00_init(&dreamplug_ge00_data); 68 kirkwood_ge00_init(&dreamplug_ge00_data);
146 kirkwood_ge01_init(&dreamplug_ge01_data); 69 kirkwood_ge01_init(&dreamplug_ge01_data);
147 kirkwood_sata_init(&dreamplug_sata_data);
148 kirkwood_sdio_init(&dreamplug_mvsdio_data); 70 kirkwood_sdio_init(&dreamplug_mvsdio_data);
149
150 platform_device_register(&dreamplug_leds);
151} 71}
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index edc3f8a9d45e..e4eb450de301 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -18,6 +18,7 @@
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <asm/mach/map.h> 19#include <asm/mach/map.h>
20#include <mach/bridge-regs.h> 20#include <mach/bridge-regs.h>
21#include <plat/irq.h>
21#include "common.h" 22#include "common.h"
22 23
23static struct of_device_id kirkwood_dt_match_table[] __initdata = { 24static struct of_device_id kirkwood_dt_match_table[] __initdata = {
@@ -25,6 +26,16 @@ static struct of_device_id kirkwood_dt_match_table[] __initdata = {
25 { } 26 { }
26}; 27};
27 28
29struct of_dev_auxdata kirkwood_auxdata_lookup[] __initdata = {
30 OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL),
31 OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0",
32 NULL),
33 OF_DEV_AUXDATA("marvell,orion-wdt", 0xf1020300, "orion_wdt", NULL),
34 OF_DEV_AUXDATA("marvell,orion-sata", 0xf1080000, "sata_mv.0", NULL),
35 OF_DEV_AUXDATA("marvell,orion-nand", 0xf4000000, "orion_nand", NULL),
36 {},
37};
38
28static void __init kirkwood_dt_init(void) 39static void __init kirkwood_dt_init(void)
29{ 40{
30 pr_info("Kirkwood: %s, TCLK=%d.\n", kirkwood_id(), kirkwood_tclk); 41 pr_info("Kirkwood: %s, TCLK=%d.\n", kirkwood_id(), kirkwood_tclk);
@@ -47,7 +58,6 @@ static void __init kirkwood_dt_init(void)
47 kirkwood_clk_init(); 58 kirkwood_clk_init();
48 59
49 /* internal devices that every board has */ 60 /* internal devices that every board has */
50 kirkwood_wdt_init();
51 kirkwood_xor0_init(); 61 kirkwood_xor0_init();
52 kirkwood_xor1_init(); 62 kirkwood_xor1_init();
53 kirkwood_crypto_init(); 63 kirkwood_crypto_init();
@@ -68,7 +78,17 @@ static void __init kirkwood_dt_init(void)
68 if (of_machine_is_compatible("raidsonic,ib-nas62x0")) 78 if (of_machine_is_compatible("raidsonic,ib-nas62x0"))
69 ib62x0_init(); 79 ib62x0_init();
70 80
71 of_platform_populate(NULL, kirkwood_dt_match_table, NULL, NULL); 81 if (of_machine_is_compatible("qnap,ts219"))
82 qnap_dt_ts219_init();
83
84 if (of_machine_is_compatible("seagate,goflexnet"))
85 goflexnet_init();
86
87 if (of_machine_is_compatible("buffalo,lsxl"))
88 lsxl_init();
89
90 of_platform_populate(NULL, kirkwood_dt_match_table,
91 kirkwood_auxdata_lookup, NULL);
72} 92}
73 93
74static const char *kirkwood_dt_board_compat[] = { 94static const char *kirkwood_dt_board_compat[] = {
@@ -77,6 +97,9 @@ static const char *kirkwood_dt_board_compat[] = {
77 "dlink,dns-325", 97 "dlink,dns-325",
78 "iom,iconnect", 98 "iom,iconnect",
79 "raidsonic,ib-nas62x0", 99 "raidsonic,ib-nas62x0",
100 "qnap,ts219",
101 "seagate,goflexnet",
102 "buffalo,lsxl",
80 NULL 103 NULL
81}; 104};
82 105
@@ -84,7 +107,7 @@ DT_MACHINE_START(KIRKWOOD_DT, "Marvell Kirkwood (Flattened Device Tree)")
84 /* Maintainer: Jason Cooper <jason@lakedaemon.net> */ 107 /* Maintainer: Jason Cooper <jason@lakedaemon.net> */
85 .map_io = kirkwood_map_io, 108 .map_io = kirkwood_map_io,
86 .init_early = kirkwood_init_early, 109 .init_early = kirkwood_init_early,
87 .init_irq = kirkwood_init_irq, 110 .init_irq = orion_dt_init_irq,
88 .timer = &kirkwood_timer, 111 .timer = &kirkwood_timer,
89 .init_machine = kirkwood_dt_init, 112 .init_machine = kirkwood_dt_init,
90 .restart = kirkwood_restart, 113 .restart = kirkwood_restart,
diff --git a/arch/arm/mach-kirkwood/board-goflexnet.c b/arch/arm/mach-kirkwood/board-goflexnet.c
new file mode 100644
index 000000000000..413e2c8ef5fe
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-goflexnet.c
@@ -0,0 +1,71 @@
1/*
2 * Copyright 2012 (C), Jason Cooper <jason@lakedaemon.net>
3 *
4 * arch/arm/mach-kirkwood/board-goflexnet.c
5 *
6 * Seagate GoFlext Net Board Init for drivers not converted to
7 * flattened device tree yet.
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 *
13 * Copied and modified for Seagate GoFlex Net support by
14 * Joshua Coombs <josh.coombs@gmail.com> based on ArchLinux ARM's
15 * GoFlex kernel patches.
16 *
17 */
18
19#include <linux/kernel.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/ata_platform.h>
23#include <linux/mv643xx_eth.h>
24#include <linux/of.h>
25#include <linux/of_address.h>
26#include <linux/of_fdt.h>
27#include <linux/of_irq.h>
28#include <linux/of_platform.h>
29#include <linux/gpio.h>
30#include <asm/mach-types.h>
31#include <asm/mach/arch.h>
32#include <asm/mach/map.h>
33#include <mach/kirkwood.h>
34#include <mach/bridge-regs.h>
35#include <plat/mvsdio.h>
36#include "common.h"
37#include "mpp.h"
38
39static struct mv643xx_eth_platform_data goflexnet_ge00_data = {
40 .phy_addr = MV643XX_ETH_PHY_ADDR(0),
41};
42
43static unsigned int goflexnet_mpp_config[] __initdata = {
44 MPP29_GPIO, /* USB Power Enable */
45 MPP47_GPIO, /* LED Orange */
46 MPP46_GPIO, /* LED Green */
47 MPP45_GPIO, /* LED Left Capacity 3 */
48 MPP44_GPIO, /* LED Left Capacity 2 */
49 MPP43_GPIO, /* LED Left Capacity 1 */
50 MPP42_GPIO, /* LED Left Capacity 0 */
51 MPP41_GPIO, /* LED Right Capacity 3 */
52 MPP40_GPIO, /* LED Right Capacity 2 */
53 MPP39_GPIO, /* LED Right Capacity 1 */
54 MPP38_GPIO, /* LED Right Capacity 0 */
55 0
56};
57
58void __init goflexnet_init(void)
59{
60 /*
61 * Basic setup. Needs to be called early.
62 */
63 kirkwood_mpp_conf(goflexnet_mpp_config);
64
65 if (gpio_request(29, "USB Power Enable") != 0 ||
66 gpio_direction_output(29, 1) != 0)
67 pr_err("can't setup GPIO 29 (USB Power Enable)\n");
68 kirkwood_ehci_init();
69
70 kirkwood_ge00_init(&goflexnet_ge00_data);
71}
diff --git a/arch/arm/mach-kirkwood/board-ib62x0.c b/arch/arm/mach-kirkwood/board-ib62x0.c
index eddf1df8891f..cfc47f80e734 100644
--- a/arch/arm/mach-kirkwood/board-ib62x0.c
+++ b/arch/arm/mach-kirkwood/board-ib62x0.c
@@ -18,9 +18,7 @@
18#include <linux/ata_platform.h> 18#include <linux/ata_platform.h>
19#include <linux/mv643xx_eth.h> 19#include <linux/mv643xx_eth.h>
20#include <linux/gpio.h> 20#include <linux/gpio.h>
21#include <linux/gpio_keys.h>
22#include <linux/input.h> 21#include <linux/input.h>
23#include <linux/leds.h>
24#include <asm/mach-types.h> 22#include <asm/mach-types.h>
25#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
26#include <mach/kirkwood.h> 24#include <mach/kirkwood.h>
@@ -33,10 +31,6 @@ static struct mv643xx_eth_platform_data ib62x0_ge00_data = {
33 .phy_addr = MV643XX_ETH_PHY_ADDR(8), 31 .phy_addr = MV643XX_ETH_PHY_ADDR(8),
34}; 32};
35 33
36static struct mv_sata_platform_data ib62x0_sata_data = {
37 .n_ports = 2,
38};
39
40static unsigned int ib62x0_mpp_config[] __initdata = { 34static unsigned int ib62x0_mpp_config[] __initdata = {
41 MPP0_NF_IO2, 35 MPP0_NF_IO2,
42 MPP1_NF_IO3, 36 MPP1_NF_IO3,
@@ -55,69 +49,6 @@ static unsigned int ib62x0_mpp_config[] __initdata = {
55 0 49 0
56}; 50};
57 51
58static struct gpio_led ib62x0_led_pins[] = {
59 {
60 .name = "ib62x0:green:os",
61 .default_trigger = "default-on",
62 .gpio = 25,
63 .active_low = 0,
64 },
65 {
66 .name = "ib62x0:red:os",
67 .default_trigger = "none",
68 .gpio = 22,
69 .active_low = 0,
70 },
71 {
72 .name = "ib62x0:red:usb_copy",
73 .default_trigger = "none",
74 .gpio = 27,
75 .active_low = 0,
76 },
77};
78
79static struct gpio_led_platform_data ib62x0_led_data = {
80 .leds = ib62x0_led_pins,
81 .num_leds = ARRAY_SIZE(ib62x0_led_pins),
82};
83
84static struct platform_device ib62x0_led_device = {
85 .name = "leds-gpio",
86 .id = -1,
87 .dev = {
88 .platform_data = &ib62x0_led_data,
89 }
90};
91
92static struct gpio_keys_button ib62x0_button_pins[] = {
93 {
94 .code = KEY_COPY,
95 .gpio = 29,
96 .desc = "USB Copy",
97 .active_low = 1,
98 },
99 {
100 .code = KEY_RESTART,
101 .gpio = 28,
102 .desc = "Reset",
103 .active_low = 1,
104 },
105};
106
107static struct gpio_keys_platform_data ib62x0_button_data = {
108 .buttons = ib62x0_button_pins,
109 .nbuttons = ARRAY_SIZE(ib62x0_button_pins),
110};
111
112static struct platform_device ib62x0_button_device = {
113 .name = "gpio-keys",
114 .id = -1,
115 .num_resources = 0,
116 .dev = {
117 .platform_data = &ib62x0_button_data,
118 }
119};
120
121static void ib62x0_power_off(void) 52static void ib62x0_power_off(void)
122{ 53{
123 gpio_set_value(IB62X0_GPIO_POWER_OFF, 1); 54 gpio_set_value(IB62X0_GPIO_POWER_OFF, 1);
@@ -132,9 +63,6 @@ void __init ib62x0_init(void)
132 63
133 kirkwood_ehci_init(); 64 kirkwood_ehci_init();
134 kirkwood_ge00_init(&ib62x0_ge00_data); 65 kirkwood_ge00_init(&ib62x0_ge00_data);
135 kirkwood_sata_init(&ib62x0_sata_data);
136 platform_device_register(&ib62x0_led_device);
137 platform_device_register(&ib62x0_button_device);
138 if (gpio_request(IB62X0_GPIO_POWER_OFF, "ib62x0:power:off") == 0 && 66 if (gpio_request(IB62X0_GPIO_POWER_OFF, "ib62x0:power:off") == 0 &&
139 gpio_direction_output(IB62X0_GPIO_POWER_OFF, 0) == 0) 67 gpio_direction_output(IB62X0_GPIO_POWER_OFF, 0) == 0)
140 pm_power_off = ib62x0_power_off; 68 pm_power_off = ib62x0_power_off;
diff --git a/arch/arm/mach-kirkwood/board-iconnect.c b/arch/arm/mach-kirkwood/board-iconnect.c
index b0d3cc49269d..d7a9198ed300 100644
--- a/arch/arm/mach-kirkwood/board-iconnect.c
+++ b/arch/arm/mach-kirkwood/board-iconnect.c
@@ -19,8 +19,6 @@
19#include <linux/mtd/partitions.h> 19#include <linux/mtd/partitions.h>
20#include <linux/mv643xx_eth.h> 20#include <linux/mv643xx_eth.h>
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <linux/leds.h>
23#include <linux/i2c.h>
24#include <linux/input.h> 22#include <linux/input.h>
25#include <linux/gpio_keys.h> 23#include <linux/gpio_keys.h>
26#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
@@ -32,50 +30,6 @@ static struct mv643xx_eth_platform_data iconnect_ge00_data = {
32 .phy_addr = MV643XX_ETH_PHY_ADDR(11), 30 .phy_addr = MV643XX_ETH_PHY_ADDR(11),
33}; 31};
34 32
35static struct gpio_led iconnect_led_pins[] = {
36 {
37 .name = "led_level",
38 .gpio = 41,
39 .default_trigger = "default-on",
40 }, {
41 .name = "power:blue",
42 .gpio = 42,
43 .default_trigger = "timer",
44 }, {
45 .name = "power:red",
46 .gpio = 43,
47 }, {
48 .name = "usb1:blue",
49 .gpio = 44,
50 }, {
51 .name = "usb2:blue",
52 .gpio = 45,
53 }, {
54 .name = "usb3:blue",
55 .gpio = 46,
56 }, {
57 .name = "usb4:blue",
58 .gpio = 47,
59 }, {
60 .name = "otb:blue",
61 .gpio = 48,
62 },
63};
64
65static struct gpio_led_platform_data iconnect_led_data = {
66 .leds = iconnect_led_pins,
67 .num_leds = ARRAY_SIZE(iconnect_led_pins),
68 .gpio_blink_set = orion_gpio_led_blink_set,
69};
70
71static struct platform_device iconnect_leds = {
72 .name = "leds-gpio",
73 .id = -1,
74 .dev = {
75 .platform_data = &iconnect_led_data,
76 }
77};
78
79static unsigned int iconnect_mpp_config[] __initdata = { 33static unsigned int iconnect_mpp_config[] __initdata = {
80 MPP12_GPIO, 34 MPP12_GPIO,
81 MPP35_GPIO, 35 MPP35_GPIO,
@@ -90,12 +44,6 @@ static unsigned int iconnect_mpp_config[] __initdata = {
90 0 44 0
91}; 45};
92 46
93static struct i2c_board_info __initdata iconnect_board_info[] = {
94 {
95 I2C_BOARD_INFO("lm63", 0x4c),
96 },
97};
98
99static struct mtd_partition iconnect_nand_parts[] = { 47static struct mtd_partition iconnect_nand_parts[] = {
100 { 48 {
101 .name = "flash", 49 .name = "flash",
@@ -142,15 +90,11 @@ void __init iconnect_init(void)
142{ 90{
143 kirkwood_mpp_conf(iconnect_mpp_config); 91 kirkwood_mpp_conf(iconnect_mpp_config);
144 kirkwood_nand_init(ARRAY_AND_SIZE(iconnect_nand_parts), 25); 92 kirkwood_nand_init(ARRAY_AND_SIZE(iconnect_nand_parts), 25);
145 kirkwood_i2c_init();
146 i2c_register_board_info(0, iconnect_board_info,
147 ARRAY_SIZE(iconnect_board_info));
148 93
149 kirkwood_ehci_init(); 94 kirkwood_ehci_init();
150 kirkwood_ge00_init(&iconnect_ge00_data); 95 kirkwood_ge00_init(&iconnect_ge00_data);
151 96
152 platform_device_register(&iconnect_button_device); 97 platform_device_register(&iconnect_button_device);
153 platform_device_register(&iconnect_leds);
154} 98}
155 99
156static int __init iconnect_pci_init(void) 100static int __init iconnect_pci_init(void)
diff --git a/arch/arm/mach-kirkwood/board-lsxl.c b/arch/arm/mach-kirkwood/board-lsxl.c
new file mode 100644
index 000000000000..83d8975592f8
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-lsxl.c
@@ -0,0 +1,135 @@
1/*
2 * Copyright 2012 (C), Michael Walle <michael@walle.cc>
3 *
4 * arch/arm/mach-kirkwood/board-lsxl.c
5 *
6 * Buffalo Linkstation LS-XHL and LS-CHLv2 init for drivers not
7 * converted to flattened device tree yet.
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/platform_device.h>
17#include <linux/mtd/partitions.h>
18#include <linux/ata_platform.h>
19#include <linux/spi/flash.h>
20#include <linux/spi/spi.h>
21#include <linux/mv643xx_eth.h>
22#include <linux/gpio.h>
23#include <linux/gpio-fan.h>
24#include <linux/input.h>
25#include <asm/mach-types.h>
26#include <asm/mach/arch.h>
27#include <mach/kirkwood.h>
28#include "common.h"
29#include "mpp.h"
30
31static struct mv643xx_eth_platform_data lsxl_ge00_data = {
32 .phy_addr = MV643XX_ETH_PHY_ADDR(0),
33};
34
35static struct mv643xx_eth_platform_data lsxl_ge01_data = {
36 .phy_addr = MV643XX_ETH_PHY_ADDR(8),
37};
38
39static unsigned int lsxl_mpp_config[] __initdata = {
40 MPP10_GPO, /* HDD Power Enable */
41 MPP11_GPIO, /* USB Vbus Enable */
42 MPP18_GPO, /* FAN High Enable# */
43 MPP19_GPO, /* FAN Low Enable# */
44 MPP36_GPIO, /* Function Blue LED */
45 MPP37_GPIO, /* Alarm LED */
46 MPP38_GPIO, /* Info LED */
47 MPP39_GPIO, /* Power LED */
48 MPP40_GPIO, /* Fan Lock */
49 MPP41_GPIO, /* Function Button */
50 MPP42_GPIO, /* Power Switch */
51 MPP43_GPIO, /* Power Auto Switch */
52 MPP48_GPIO, /* Function Red LED */
53 0
54};
55
56#define LSXL_GPIO_FAN_HIGH 18
57#define LSXL_GPIO_FAN_LOW 19
58#define LSXL_GPIO_FAN_LOCK 40
59
60static struct gpio_fan_alarm lsxl_alarm = {
61 .gpio = LSXL_GPIO_FAN_LOCK,
62};
63
64static struct gpio_fan_speed lsxl_speeds[] = {
65 {
66 .rpm = 0,
67 .ctrl_val = 3,
68 }, {
69 .rpm = 1500,
70 .ctrl_val = 1,
71 }, {
72 .rpm = 3250,
73 .ctrl_val = 2,
74 }, {
75 .rpm = 5000,
76 .ctrl_val = 0,
77 }
78};
79
80static int lsxl_gpio_list[] = {
81 LSXL_GPIO_FAN_HIGH, LSXL_GPIO_FAN_LOW,
82};
83
84static struct gpio_fan_platform_data lsxl_fan_data = {
85 .num_ctrl = ARRAY_SIZE(lsxl_gpio_list),
86 .ctrl = lsxl_gpio_list,
87 .alarm = &lsxl_alarm,
88 .num_speed = ARRAY_SIZE(lsxl_speeds),
89 .speed = lsxl_speeds,
90};
91
92static struct platform_device lsxl_fan_device = {
93 .name = "gpio-fan",
94 .id = -1,
95 .num_resources = 0,
96 .dev = {
97 .platform_data = &lsxl_fan_data,
98 },
99};
100
101/*
102 * On the LS-XHL/LS-CHLv2, the shutdown process is following:
103 * - Userland monitors key events until the power switch goes to off position
104 * - The board reboots
105 * - U-boot starts and goes into an idle mode waiting for the user
106 * to move the switch to ON position
107 *
108 */
109static void lsxl_power_off(void)
110{
111 kirkwood_restart('h', NULL);
112}
113
114#define LSXL_GPIO_HDD_POWER 10
115#define LSXL_GPIO_USB_POWER 11
116
117void __init lsxl_init(void)
118{
119 /*
120 * Basic setup. Needs to be called early.
121 */
122 kirkwood_mpp_conf(lsxl_mpp_config);
123
124 /* usb and sata power on */
125 gpio_set_value(LSXL_GPIO_USB_POWER, 1);
126 gpio_set_value(LSXL_GPIO_HDD_POWER, 1);
127
128 kirkwood_ehci_init();
129 kirkwood_ge00_init(&lsxl_ge00_data);
130 kirkwood_ge01_init(&lsxl_ge01_data);
131 platform_device_register(&lsxl_fan_device);
132
133 /* register power-off method */
134 pm_power_off = lsxl_power_off;
135}
diff --git a/arch/arm/mach-kirkwood/board-ts219.c b/arch/arm/mach-kirkwood/board-ts219.c
new file mode 100644
index 000000000000..1750e68506c1
--- /dev/null
+++ b/arch/arm/mach-kirkwood/board-ts219.c
@@ -0,0 +1,82 @@
1/*
2 *
3 * QNAP TS-11x/TS-21x Turbo NAS Board Setup via DT
4 *
5 * Copyright (C) 2012 Andrew Lunn <andrew@lunn.ch>
6 *
7 * Based on the board file ts219-setup.c:
8 *
9 * Copyright (C) 2009 Martin Michlmayr <tbm@cyrius.com>
10 * Copyright (C) 2008 Byron Bradley <byron.bbradley@gmail.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/mv643xx_eth.h>
22#include <linux/ata_platform.h>
23#include <linux/gpio_keys.h>
24#include <linux/input.h>
25#include <asm/mach-types.h>
26#include <asm/mach/arch.h>
27#include <mach/kirkwood.h>
28#include "common.h"
29#include "mpp.h"
30#include "tsx1x-common.h"
31
32static struct mv643xx_eth_platform_data qnap_ts219_ge00_data = {
33 .phy_addr = MV643XX_ETH_PHY_ADDR(8),
34};
35
36static unsigned int qnap_ts219_mpp_config[] __initdata = {
37 MPP0_SPI_SCn,
38 MPP1_SPI_MOSI,
39 MPP2_SPI_SCK,
40 MPP3_SPI_MISO,
41 MPP4_SATA1_ACTn,
42 MPP5_SATA0_ACTn,
43 MPP8_TW0_SDA,
44 MPP9_TW0_SCK,
45 MPP10_UART0_TXD,
46 MPP11_UART0_RXD,
47 MPP13_UART1_TXD, /* PIC controller */
48 MPP14_UART1_RXD, /* PIC controller */
49 MPP15_GPIO, /* USB Copy button (on devices with 88F6281) */
50 MPP16_GPIO, /* Reset button (on devices with 88F6281) */
51 MPP36_GPIO, /* RAM: 0: 256 MB, 1: 512 MB */
52 MPP37_GPIO, /* Reset button (on devices with 88F6282) */
53 MPP43_GPIO, /* USB Copy button (on devices with 88F6282) */
54 MPP44_GPIO, /* Board ID: 0: TS-11x, 1: TS-21x */
55 0
56};
57
58void __init qnap_dt_ts219_init(void)
59{
60 u32 dev, rev;
61
62 kirkwood_mpp_conf(qnap_ts219_mpp_config);
63
64 kirkwood_pcie_id(&dev, &rev);
65 if (dev == MV88F6282_DEV_ID)
66 qnap_ts219_ge00_data.phy_addr = MV643XX_ETH_PHY_ADDR(0);
67
68 kirkwood_ge00_init(&qnap_ts219_ge00_data);
69 kirkwood_ehci_init();
70
71 pm_power_off = qnap_tsx1x_power_off;
72}
73
74/* FIXME: Will not work with DT. Maybe use MPP40_GPIO? */
75static int __init ts219_pci_init(void)
76{
77 if (machine_is_ts219())
78 kirkwood_pcie_init(KW_PCIE0);
79
80 return 0;
81}
82subsys_initcall(ts219_pci_init);
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index c9201539ffbd..c4b64adcbfce 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -17,6 +17,7 @@
17#include <linux/dma-mapping.h> 17#include <linux/dma-mapping.h>
18#include <linux/clk-provider.h> 18#include <linux/clk-provider.h>
19#include <linux/spinlock.h> 19#include <linux/spinlock.h>
20#include <linux/mv643xx_i2c.h>
20#include <net/dsa.h> 21#include <net/dsa.h>
21#include <asm/page.h> 22#include <asm/page.h>
22#include <asm/timex.h> 23#include <asm/timex.h>
@@ -276,6 +277,7 @@ void __init kirkwood_clk_init(void)
276 orion_clkdev_add("0", "pcie", pex0); 277 orion_clkdev_add("0", "pcie", pex0);
277 orion_clkdev_add("1", "pcie", pex1); 278 orion_clkdev_add("1", "pcie", pex1);
278 orion_clkdev_add(NULL, "kirkwood-i2s", audio); 279 orion_clkdev_add(NULL, "kirkwood-i2s", audio);
280 orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", runit);
279 281
280 /* Marvell says runit is used by SPI, UART, NAND, TWSI, ..., 282 /* Marvell says runit is used by SPI, UART, NAND, TWSI, ...,
281 * so should never be gated. 283 * so should never be gated.
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 9248fa2c165b..304dd1abfdca 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -58,6 +58,11 @@ void dreamplug_init(void);
58#else 58#else
59static inline void dreamplug_init(void) {}; 59static inline void dreamplug_init(void) {};
60#endif 60#endif
61#ifdef CONFIG_MACH_TS219_DT
62void qnap_dt_ts219_init(void);
63#else
64static inline void qnap_dt_ts219_init(void) {};
65#endif
61 66
62#ifdef CONFIG_MACH_DLINK_KIRKWOOD_DT 67#ifdef CONFIG_MACH_DLINK_KIRKWOOD_DT
63void dnskw_init(void); 68void dnskw_init(void);
@@ -77,6 +82,18 @@ void ib62x0_init(void);
77static inline void ib62x0_init(void) {}; 82static inline void ib62x0_init(void) {};
78#endif 83#endif
79 84
85#ifdef CONFIG_MACH_GOFLEXNET_DT
86void goflexnet_init(void);
87#else
88static inline void goflexnet_init(void) {};
89#endif
90
91#ifdef CONFIG_MACH_LSXL_DT
92void lsxl_init(void);
93#else
94static inline void lsxl_init(void) {};
95#endif
96
80/* early init functions not converted to fdt yet */ 97/* early init functions not converted to fdt yet */
81char *kirkwood_id(void); 98char *kirkwood_id(void);
82void kirkwood_l2_init(void); 99void kirkwood_l2_init(void);
diff --git a/arch/arm/mach-kirkwood/irq.c b/arch/arm/mach-kirkwood/irq.c
index c4c68e5b94f1..720063ffa19d 100644
--- a/arch/arm/mach-kirkwood/irq.c
+++ b/arch/arm/mach-kirkwood/irq.c
@@ -9,20 +9,23 @@
9 */ 9 */
10#include <linux/gpio.h> 10#include <linux/gpio.h>
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/irq.h> 12#include <linux/irq.h>
14#include <linux/io.h>
15#include <mach/bridge-regs.h> 13#include <mach/bridge-regs.h>
16#include <plat/irq.h> 14#include <plat/irq.h>
17#include "common.h"
18 15
19static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 16static int __initdata gpio0_irqs[4] = {
20{ 17 IRQ_KIRKWOOD_GPIO_LOW_0_7,
21 BUG_ON(irq < IRQ_KIRKWOOD_GPIO_LOW_0_7); 18 IRQ_KIRKWOOD_GPIO_LOW_8_15,
22 BUG_ON(irq > IRQ_KIRKWOOD_GPIO_HIGH_16_23); 19 IRQ_KIRKWOOD_GPIO_LOW_16_23,
20 IRQ_KIRKWOOD_GPIO_LOW_24_31,
21};
23 22
24 orion_gpio_irq_handler((irq - IRQ_KIRKWOOD_GPIO_LOW_0_7) << 3); 23static int __initdata gpio1_irqs[4] = {
25} 24 IRQ_KIRKWOOD_GPIO_HIGH_0_7,
25 IRQ_KIRKWOOD_GPIO_HIGH_8_15,
26 IRQ_KIRKWOOD_GPIO_HIGH_16_23,
27 0,
28};
26 29
27void __init kirkwood_init_irq(void) 30void __init kirkwood_init_irq(void)
28{ 31{
@@ -32,17 +35,8 @@ void __init kirkwood_init_irq(void)
32 /* 35 /*
33 * Initialize gpiolib for GPIOs 0-49. 36 * Initialize gpiolib for GPIOs 0-49.
34 */ 37 */
35 orion_gpio_init(0, 32, GPIO_LOW_VIRT_BASE, 0, 38 orion_gpio_init(NULL, 0, 32, (void __iomem *)GPIO_LOW_VIRT_BASE, 0,
36 IRQ_KIRKWOOD_GPIO_START); 39 IRQ_KIRKWOOD_GPIO_START, gpio0_irqs);
37 irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler); 40 orion_gpio_init(NULL, 32, 18, (void __iomem *)GPIO_HIGH_VIRT_BASE, 0,
38 irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler); 41 IRQ_KIRKWOOD_GPIO_START + 32, gpio1_irqs);
39 irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler);
40 irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler);
41
42 orion_gpio_init(32, 18, GPIO_HIGH_VIRT_BASE, 0,
43 IRQ_KIRKWOOD_GPIO_START + 32);
44 irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler);
45 irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler);
46 irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23,
47 gpio_irq_handler);
48} 42}
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index f516e74ce0d5..5c3d61ee729a 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -14,6 +14,7 @@
14#include <asm/mach/arch.h> 14#include <asm/mach/arch.h>
15#include <asm/mach-types.h> 15#include <asm/mach-types.h>
16 16
17#include <mach/irqs.h>
17#include <mach/pxa168.h> 18#include <mach/pxa168.h>
18#include <mach/mfp-pxa168.h> 19#include <mach/mfp-pxa168.h>
19 20
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index e421b701663b..eff9a750bbe2 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -9,19 +9,17 @@
9 */ 9 */
10#include <linux/gpio.h> 10#include <linux/gpio.h>
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/pci.h>
14#include <linux/irq.h> 12#include <linux/irq.h>
15#include <mach/bridge-regs.h> 13#include <mach/bridge-regs.h>
16#include <plat/irq.h> 14#include <plat/irq.h>
17#include "common.h" 15#include "common.h"
18 16
19static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 17static int __initdata gpio0_irqs[4] = {
20{ 18 IRQ_MV78XX0_GPIO_0_7,
21 BUG_ON(irq < IRQ_MV78XX0_GPIO_0_7 || irq > IRQ_MV78XX0_GPIO_24_31); 19 IRQ_MV78XX0_GPIO_8_15,
22 20 IRQ_MV78XX0_GPIO_16_23,
23 orion_gpio_irq_handler((irq - IRQ_MV78XX0_GPIO_0_7) << 3); 21 IRQ_MV78XX0_GPIO_24_31,
24} 22};
25 23
26void __init mv78xx0_init_irq(void) 24void __init mv78xx0_init_irq(void)
27{ 25{
@@ -34,11 +32,7 @@ void __init mv78xx0_init_irq(void)
34 * registers for core #1 are at an offset of 0x18 from those of 32 * registers for core #1 are at an offset of 0x18 from those of
35 * core #0.) 33 * core #0.)
36 */ 34 */
37 orion_gpio_init(0, 32, GPIO_VIRT_BASE, 35 orion_gpio_init(NULL, 0, 32, (void __iomem *)GPIO_VIRT_BASE,
38 mv78xx0_core_index() ? 0x18 : 0, 36 mv78xx0_core_index() ? 0x18 : 0,
39 IRQ_MV78XX0_GPIO_START); 37 IRQ_MV78XX0_GPIO_START, gpio0_irqs);
40 irq_set_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler);
41 irq_set_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler);
42 irq_set_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler);
43 irq_set_chained_handler(IRQ_MV78XX0_GPIO_24_31, gpio_irq_handler);
44} 38}
diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig
index ccdf83b17cf1..9a8bbda195b2 100644
--- a/arch/arm/mach-mxs/Kconfig
+++ b/arch/arm/mach-mxs/Kconfig
@@ -2,9 +2,6 @@ if ARCH_MXS
2 2
3source "arch/arm/mach-mxs/devices/Kconfig" 3source "arch/arm/mach-mxs/devices/Kconfig"
4 4
5config MXS_OCOTP
6 bool
7
8config SOC_IMX23 5config SOC_IMX23
9 bool 6 bool
10 select ARM_AMBA 7 select ARM_AMBA
@@ -66,7 +63,6 @@ config MACH_MX28EVK
66 select MXS_HAVE_PLATFORM_MXS_SAIF 63 select MXS_HAVE_PLATFORM_MXS_SAIF
67 select MXS_HAVE_PLATFORM_MXS_I2C 64 select MXS_HAVE_PLATFORM_MXS_I2C
68 select MXS_HAVE_PLATFORM_RTC_STMP3XXX 65 select MXS_HAVE_PLATFORM_RTC_STMP3XXX
69 select MXS_OCOTP
70 help 66 help
71 Include support for MX28EVK platform. This includes specific 67 Include support for MX28EVK platform. This includes specific
72 configurations for the board and its peripherals. 68 configurations for the board and its peripherals.
@@ -94,7 +90,6 @@ config MODULE_M28
94 select MXS_HAVE_PLATFORM_MXS_I2C 90 select MXS_HAVE_PLATFORM_MXS_I2C
95 select MXS_HAVE_PLATFORM_MXS_MMC 91 select MXS_HAVE_PLATFORM_MXS_MMC
96 select MXS_HAVE_PLATFORM_MXSFB 92 select MXS_HAVE_PLATFORM_MXSFB
97 select MXS_OCOTP
98 93
99config MODULE_APX4 94config MODULE_APX4
100 bool 95 bool
@@ -106,7 +101,6 @@ config MODULE_APX4
106 select MXS_HAVE_PLATFORM_MXS_I2C 101 select MXS_HAVE_PLATFORM_MXS_I2C
107 select MXS_HAVE_PLATFORM_MXS_MMC 102 select MXS_HAVE_PLATFORM_MXS_MMC
108 select MXS_HAVE_PLATFORM_MXS_SAIF 103 select MXS_HAVE_PLATFORM_MXS_SAIF
109 select MXS_OCOTP
110 104
111config MACH_TX28 105config MACH_TX28
112 bool "Ka-Ro TX28 module" 106 bool "Ka-Ro TX28 module"
diff --git a/arch/arm/mach-mxs/Makefile b/arch/arm/mach-mxs/Makefile
index e41590ccb437..fed3695a1339 100644
--- a/arch/arm/mach-mxs/Makefile
+++ b/arch/arm/mach-mxs/Makefile
@@ -1,7 +1,6 @@
1# Common support 1# Common support
2obj-y := devices.o icoll.o iomux.o system.o timer.o mm.o 2obj-y := devices.o icoll.o iomux.o ocotp.o system.o timer.o mm.o
3 3
4obj-$(CONFIG_MXS_OCOTP) += ocotp.o
5obj-$(CONFIG_PM) += pm.o 4obj-$(CONFIG_PM) += pm.o
6 5
7obj-$(CONFIG_MACH_MXS_DT) += mach-mxs.o 6obj-$(CONFIG_MACH_MXS_DT) += mach-mxs.o
diff --git a/arch/arm/mach-omap1/board-h2-mmc.c b/arch/arm/mach-omap1/board-h2-mmc.c
index da0e37d40823..e1362ce48497 100644
--- a/arch/arm/mach-omap1/board-h2-mmc.c
+++ b/arch/arm/mach-omap1/board-h2-mmc.c
@@ -54,7 +54,6 @@ static struct omap_mmc_platform_data mmc1_data = {
54 .nr_slots = 1, 54 .nr_slots = 1,
55 .init = mmc_late_init, 55 .init = mmc_late_init,
56 .cleanup = mmc_cleanup, 56 .cleanup = mmc_cleanup,
57 .dma_mask = 0xffffffff,
58 .slots[0] = { 57 .slots[0] = {
59 .set_power = mmc_set_power, 58 .set_power = mmc_set_power,
60 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 59 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
diff --git a/arch/arm/mach-omap1/board-h3-mmc.c b/arch/arm/mach-omap1/board-h3-mmc.c
index f8242aa9b763..c74daace8cd6 100644
--- a/arch/arm/mach-omap1/board-h3-mmc.c
+++ b/arch/arm/mach-omap1/board-h3-mmc.c
@@ -36,7 +36,6 @@ static int mmc_set_power(struct device *dev, int slot, int power_on,
36 */ 36 */
37static struct omap_mmc_platform_data mmc1_data = { 37static struct omap_mmc_platform_data mmc1_data = {
38 .nr_slots = 1, 38 .nr_slots = 1,
39 .dma_mask = 0xffffffff,
40 .slots[0] = { 39 .slots[0] = {
41 .set_power = mmc_set_power, 40 .set_power = mmc_set_power,
42 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, 41 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c
index 4007a372481b..2c0ca8fc3380 100644
--- a/arch/arm/mach-omap1/board-nokia770.c
+++ b/arch/arm/mach-omap1/board-nokia770.c
@@ -185,7 +185,6 @@ static int nokia770_mmc_get_cover_state(struct device *dev, int slot)
185 185
186static struct omap_mmc_platform_data nokia770_mmc2_data = { 186static struct omap_mmc_platform_data nokia770_mmc2_data = {
187 .nr_slots = 1, 187 .nr_slots = 1,
188 .dma_mask = 0xffffffff,
189 .max_freq = 12000000, 188 .max_freq = 12000000,
190 .slots[0] = { 189 .slots[0] = {
191 .set_power = nokia770_mmc_set_power, 190 .set_power = nokia770_mmc_set_power,
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index dd0fbf76ac79..dd2db025f778 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -62,6 +62,7 @@ config ARCH_OMAP4
62 select PM_OPP if PM 62 select PM_OPP if PM
63 select USB_ARCH_HAS_EHCI if USB_SUPPORT 63 select USB_ARCH_HAS_EHCI if USB_SUPPORT
64 select ARM_CPU_SUSPEND if PM 64 select ARM_CPU_SUSPEND if PM
65 select ARCH_NEEDS_CPU_IDLE_COUPLED
65 66
66config SOC_OMAP5 67config SOC_OMAP5
67 bool "TI OMAP5" 68 bool "TI OMAP5"
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 2c5d0ed75285..677357ff61ac 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -468,7 +468,6 @@ static struct omap_mmc_platform_data mmc1_data = {
468 .cleanup = n8x0_mmc_cleanup, 468 .cleanup = n8x0_mmc_cleanup,
469 .shutdown = n8x0_mmc_shutdown, 469 .shutdown = n8x0_mmc_shutdown,
470 .max_freq = 24000000, 470 .max_freq = 24000000,
471 .dma_mask = 0xffffffff,
472 .slots[0] = { 471 .slots[0] = {
473 .wires = 4, 472 .wires = 4,
474 .set_power = n8x0_mmc_set_power, 473 .set_power = n8x0_mmc_set_power,
diff --git a/arch/arm/mach-omap2/cpuidle44xx.c b/arch/arm/mach-omap2/cpuidle44xx.c
index 02d15bbd4e35..ee05e193fc61 100644
--- a/arch/arm/mach-omap2/cpuidle44xx.c
+++ b/arch/arm/mach-omap2/cpuidle44xx.c
@@ -21,6 +21,7 @@
21#include "common.h" 21#include "common.h"
22#include "pm.h" 22#include "pm.h"
23#include "prm.h" 23#include "prm.h"
24#include "clockdomain.h"
24 25
25/* Machine specific information */ 26/* Machine specific information */
26struct omap4_idle_statedata { 27struct omap4_idle_statedata {
@@ -47,10 +48,14 @@ static struct omap4_idle_statedata omap4_idle_data[] = {
47 }, 48 },
48}; 49};
49 50
50static struct powerdomain *mpu_pd, *cpu0_pd, *cpu1_pd; 51static struct powerdomain *mpu_pd, *cpu_pd[NR_CPUS];
52static struct clockdomain *cpu_clkdm[NR_CPUS];
53
54static atomic_t abort_barrier;
55static bool cpu_done[NR_CPUS];
51 56
52/** 57/**
53 * omap4_enter_idle - Programs OMAP4 to enter the specified state 58 * omap4_enter_idle_coupled_[simple/coupled] - OMAP4 cpuidle entry functions
54 * @dev: cpuidle device 59 * @dev: cpuidle device
55 * @drv: cpuidle driver 60 * @drv: cpuidle driver
56 * @index: the index of state to be entered 61 * @index: the index of state to be entered
@@ -59,60 +64,84 @@ static struct powerdomain *mpu_pd, *cpu0_pd, *cpu1_pd;
59 * specified low power state selected by the governor. 64 * specified low power state selected by the governor.
60 * Returns the amount of time spent in the low power state. 65 * Returns the amount of time spent in the low power state.
61 */ 66 */
62static int omap4_enter_idle(struct cpuidle_device *dev, 67static int omap4_enter_idle_simple(struct cpuidle_device *dev,
68 struct cpuidle_driver *drv,
69 int index)
70{
71 local_fiq_disable();
72 omap_do_wfi();
73 local_fiq_enable();
74
75 return index;
76}
77
78static int omap4_enter_idle_coupled(struct cpuidle_device *dev,
63 struct cpuidle_driver *drv, 79 struct cpuidle_driver *drv,
64 int index) 80 int index)
65{ 81{
66 struct omap4_idle_statedata *cx = &omap4_idle_data[index]; 82 struct omap4_idle_statedata *cx = &omap4_idle_data[index];
67 u32 cpu1_state;
68 int cpu_id = smp_processor_id(); 83 int cpu_id = smp_processor_id();
69 84
70 local_fiq_disable(); 85 local_fiq_disable();
71 86
72 /* 87 /*
73 * CPU0 has to stay ON (i.e in C1) until CPU1 is OFF state. 88 * CPU0 has to wait and stay ON until CPU1 is OFF state.
74 * This is necessary to honour hardware recommondation 89 * This is necessary to honour hardware recommondation
75 * of triggeing all the possible low power modes once CPU1 is 90 * of triggeing all the possible low power modes once CPU1 is
76 * out of coherency and in OFF mode. 91 * out of coherency and in OFF mode.
77 * Update dev->last_state so that governor stats reflects right
78 * data.
79 */ 92 */
80 cpu1_state = pwrdm_read_pwrst(cpu1_pd); 93 if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
81 if (cpu1_state != PWRDM_POWER_OFF) { 94 while (pwrdm_read_pwrst(cpu_pd[1]) != PWRDM_POWER_OFF) {
82 index = drv->safe_state_index; 95 cpu_relax();
83 cx = &omap4_idle_data[index]; 96
97 /*
98 * CPU1 could have already entered & exited idle
99 * without hitting off because of a wakeup
100 * or a failed attempt to hit off mode. Check for
101 * that here, otherwise we could spin forever
102 * waiting for CPU1 off.
103 */
104 if (cpu_done[1])
105 goto fail;
106
107 }
84 } 108 }
85 109
86 if (index > 0) 110 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id);
87 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id);
88 111
89 /* 112 /*
90 * Call idle CPU PM enter notifier chain so that 113 * Call idle CPU PM enter notifier chain so that
91 * VFP and per CPU interrupt context is saved. 114 * VFP and per CPU interrupt context is saved.
92 */ 115 */
93 if (cx->cpu_state == PWRDM_POWER_OFF) 116 cpu_pm_enter();
94 cpu_pm_enter(); 117
95 118 if (dev->cpu == 0) {
96 pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state); 119 pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
97 omap_set_pwrdm_state(mpu_pd, cx->mpu_state); 120 omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
98 121
99 /* 122 /*
100 * Call idle CPU cluster PM enter notifier chain 123 * Call idle CPU cluster PM enter notifier chain
101 * to save GIC and wakeupgen context. 124 * to save GIC and wakeupgen context.
102 */ 125 */
103 if ((cx->mpu_state == PWRDM_POWER_RET) && 126 if ((cx->mpu_state == PWRDM_POWER_RET) &&
104 (cx->mpu_logic_state == PWRDM_POWER_OFF)) 127 (cx->mpu_logic_state == PWRDM_POWER_OFF))
105 cpu_cluster_pm_enter(); 128 cpu_cluster_pm_enter();
129 }
106 130
107 omap4_enter_lowpower(dev->cpu, cx->cpu_state); 131 omap4_enter_lowpower(dev->cpu, cx->cpu_state);
132 cpu_done[dev->cpu] = true;
133
134 /* Wakeup CPU1 only if it is not offlined */
135 if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
136 clkdm_wakeup(cpu_clkdm[1]);
137 clkdm_allow_idle(cpu_clkdm[1]);
138 }
108 139
109 /* 140 /*
110 * Call idle CPU PM exit notifier chain to restore 141 * Call idle CPU PM exit notifier chain to restore
111 * VFP and per CPU IRQ context. Only CPU0 state is 142 * VFP and per CPU IRQ context.
112 * considered since CPU1 is managed by CPU hotplug.
113 */ 143 */
114 if (pwrdm_read_prev_pwrst(cpu0_pd) == PWRDM_POWER_OFF) 144 cpu_pm_exit();
115 cpu_pm_exit();
116 145
117 /* 146 /*
118 * Call idle CPU cluster PM exit notifier chain 147 * Call idle CPU cluster PM exit notifier chain
@@ -121,8 +150,11 @@ static int omap4_enter_idle(struct cpuidle_device *dev,
121 if (omap4_mpuss_read_prev_context_state()) 150 if (omap4_mpuss_read_prev_context_state())
122 cpu_cluster_pm_exit(); 151 cpu_cluster_pm_exit();
123 152
124 if (index > 0) 153 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id);
125 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id); 154
155fail:
156 cpuidle_coupled_parallel_barrier(dev, &abort_barrier);
157 cpu_done[dev->cpu] = false;
126 158
127 local_fiq_enable(); 159 local_fiq_enable();
128 160
@@ -141,7 +173,7 @@ struct cpuidle_driver omap4_idle_driver = {
141 .exit_latency = 2 + 2, 173 .exit_latency = 2 + 2,
142 .target_residency = 5, 174 .target_residency = 5,
143 .flags = CPUIDLE_FLAG_TIME_VALID, 175 .flags = CPUIDLE_FLAG_TIME_VALID,
144 .enter = omap4_enter_idle, 176 .enter = omap4_enter_idle_simple,
145 .name = "C1", 177 .name = "C1",
146 .desc = "MPUSS ON" 178 .desc = "MPUSS ON"
147 }, 179 },
@@ -149,8 +181,8 @@ struct cpuidle_driver omap4_idle_driver = {
149 /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */ 181 /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
150 .exit_latency = 328 + 440, 182 .exit_latency = 328 + 440,
151 .target_residency = 960, 183 .target_residency = 960,
152 .flags = CPUIDLE_FLAG_TIME_VALID, 184 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED,
153 .enter = omap4_enter_idle, 185 .enter = omap4_enter_idle_coupled,
154 .name = "C2", 186 .name = "C2",
155 .desc = "MPUSS CSWR", 187 .desc = "MPUSS CSWR",
156 }, 188 },
@@ -158,8 +190,8 @@ struct cpuidle_driver omap4_idle_driver = {
158 /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */ 190 /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
159 .exit_latency = 460 + 518, 191 .exit_latency = 460 + 518,
160 .target_residency = 1100, 192 .target_residency = 1100,
161 .flags = CPUIDLE_FLAG_TIME_VALID, 193 .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED,
162 .enter = omap4_enter_idle, 194 .enter = omap4_enter_idle_coupled,
163 .name = "C3", 195 .name = "C3",
164 .desc = "MPUSS OSWR", 196 .desc = "MPUSS OSWR",
165 }, 197 },
@@ -168,6 +200,16 @@ struct cpuidle_driver omap4_idle_driver = {
168 .safe_state_index = 0, 200 .safe_state_index = 0,
169}; 201};
170 202
203/*
204 * For each cpu, setup the broadcast timer because local timers
205 * stops for the states above C1.
206 */
207static void omap_setup_broadcast_timer(void *arg)
208{
209 int cpu = smp_processor_id();
210 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &cpu);
211}
212
171/** 213/**
172 * omap4_idle_init - Init routine for OMAP4 idle 214 * omap4_idle_init - Init routine for OMAP4 idle
173 * 215 *
@@ -180,19 +222,30 @@ int __init omap4_idle_init(void)
180 unsigned int cpu_id = 0; 222 unsigned int cpu_id = 0;
181 223
182 mpu_pd = pwrdm_lookup("mpu_pwrdm"); 224 mpu_pd = pwrdm_lookup("mpu_pwrdm");
183 cpu0_pd = pwrdm_lookup("cpu0_pwrdm"); 225 cpu_pd[0] = pwrdm_lookup("cpu0_pwrdm");
184 cpu1_pd = pwrdm_lookup("cpu1_pwrdm"); 226 cpu_pd[1] = pwrdm_lookup("cpu1_pwrdm");
185 if ((!mpu_pd) || (!cpu0_pd) || (!cpu1_pd)) 227 if ((!mpu_pd) || (!cpu_pd[0]) || (!cpu_pd[1]))
186 return -ENODEV; 228 return -ENODEV;
187 229
188 dev = &per_cpu(omap4_idle_dev, cpu_id); 230 cpu_clkdm[0] = clkdm_lookup("mpu0_clkdm");
189 dev->cpu = cpu_id; 231 cpu_clkdm[1] = clkdm_lookup("mpu1_clkdm");
232 if (!cpu_clkdm[0] || !cpu_clkdm[1])
233 return -ENODEV;
234
235 /* Configure the broadcast timer on each cpu */
236 on_each_cpu(omap_setup_broadcast_timer, NULL, 1);
237
238 for_each_cpu(cpu_id, cpu_online_mask) {
239 dev = &per_cpu(omap4_idle_dev, cpu_id);
240 dev->cpu = cpu_id;
241 dev->coupled_cpus = *cpu_online_mask;
190 242
191 cpuidle_register_driver(&omap4_idle_driver); 243 cpuidle_register_driver(&omap4_idle_driver);
192 244
193 if (cpuidle_register_device(dev)) { 245 if (cpuidle_register_device(dev)) {
194 pr_err("%s: CPUidle register device failed\n", __func__); 246 pr_err("%s: CPUidle register failed\n", __func__);
195 return -EIO; 247 return -EIO;
248 }
196 } 249 }
197 250
198 return 0; 251 return 0;
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 5fb47a14f4ba..af1ed7d24a1f 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -37,6 +37,7 @@
37 37
38#define DISPC_CONTROL 0x0040 38#define DISPC_CONTROL 0x0040
39#define DISPC_CONTROL2 0x0238 39#define DISPC_CONTROL2 0x0238
40#define DISPC_CONTROL3 0x0848
40#define DISPC_IRQSTATUS 0x0018 41#define DISPC_IRQSTATUS 0x0018
41 42
42#define DSS_SYSCONFIG 0x10 43#define DSS_SYSCONFIG 0x10
@@ -52,6 +53,7 @@
52#define EVSYNC_EVEN_IRQ_SHIFT 2 53#define EVSYNC_EVEN_IRQ_SHIFT 2
53#define EVSYNC_ODD_IRQ_SHIFT 3 54#define EVSYNC_ODD_IRQ_SHIFT 3
54#define FRAMEDONE2_IRQ_SHIFT 22 55#define FRAMEDONE2_IRQ_SHIFT 22
56#define FRAMEDONE3_IRQ_SHIFT 30
55#define FRAMEDONETV_IRQ_SHIFT 24 57#define FRAMEDONETV_IRQ_SHIFT 24
56 58
57/* 59/*
@@ -376,7 +378,7 @@ int __init omap_display_init(struct omap_dss_board_info *board_data)
376static void dispc_disable_outputs(void) 378static void dispc_disable_outputs(void)
377{ 379{
378 u32 v, irq_mask = 0; 380 u32 v, irq_mask = 0;
379 bool lcd_en, digit_en, lcd2_en = false; 381 bool lcd_en, digit_en, lcd2_en = false, lcd3_en = false;
380 int i; 382 int i;
381 struct omap_dss_dispc_dev_attr *da; 383 struct omap_dss_dispc_dev_attr *da;
382 struct omap_hwmod *oh; 384 struct omap_hwmod *oh;
@@ -405,7 +407,13 @@ static void dispc_disable_outputs(void)
405 lcd2_en = v & LCD_EN_MASK; 407 lcd2_en = v & LCD_EN_MASK;
406 } 408 }
407 409
408 if (!(lcd_en | digit_en | lcd2_en)) 410 /* store value of LCDENABLE for LCD3 */
411 if (da->manager_count > 3) {
412 v = omap_hwmod_read(oh, DISPC_CONTROL3);
413 lcd3_en = v & LCD_EN_MASK;
414 }
415
416 if (!(lcd_en | digit_en | lcd2_en | lcd3_en))
409 return; /* no managers currently enabled */ 417 return; /* no managers currently enabled */
410 418
411 /* 419 /*
@@ -426,10 +434,12 @@ static void dispc_disable_outputs(void)
426 434
427 if (lcd2_en) 435 if (lcd2_en)
428 irq_mask |= 1 << FRAMEDONE2_IRQ_SHIFT; 436 irq_mask |= 1 << FRAMEDONE2_IRQ_SHIFT;
437 if (lcd3_en)
438 irq_mask |= 1 << FRAMEDONE3_IRQ_SHIFT;
429 439
430 /* 440 /*
431 * clear any previous FRAMEDONE, FRAMEDONETV, 441 * clear any previous FRAMEDONE, FRAMEDONETV,
432 * EVSYNC_EVEN/ODD or FRAMEDONE2 interrupts 442 * EVSYNC_EVEN/ODD, FRAMEDONE2 or FRAMEDONE3 interrupts
433 */ 443 */
434 omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS); 444 omap_hwmod_write(irq_mask, oh, DISPC_IRQSTATUS);
435 445
@@ -445,12 +455,19 @@ static void dispc_disable_outputs(void)
445 omap_hwmod_write(v, oh, DISPC_CONTROL2); 455 omap_hwmod_write(v, oh, DISPC_CONTROL2);
446 } 456 }
447 457
458 /* disable LCD3 manager */
459 if (da->manager_count > 3) {
460 v = omap_hwmod_read(oh, DISPC_CONTROL3);
461 v &= ~LCD_EN_MASK;
462 omap_hwmod_write(v, oh, DISPC_CONTROL3);
463 }
464
448 i = 0; 465 i = 0;
449 while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) != 466 while ((omap_hwmod_read(oh, DISPC_IRQSTATUS) & irq_mask) !=
450 irq_mask) { 467 irq_mask) {
451 i++; 468 i++;
452 if (i > FRAMEDONE_IRQ_TIMEOUT) { 469 if (i > FRAMEDONE_IRQ_TIMEOUT) {
453 pr_err("didn't get FRAMEDONE1/2 or TV interrupt\n"); 470 pr_err("didn't get FRAMEDONE1/2/3 or TV interrupt\n");
454 break; 471 break;
455 } 472 }
456 mdelay(1); 473 mdelay(1);
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index be697d4e0843..a9675d8d1822 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -315,7 +315,6 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
315 mmc->slots[0].caps = c->caps; 315 mmc->slots[0].caps = c->caps;
316 mmc->slots[0].pm_caps = c->pm_caps; 316 mmc->slots[0].pm_caps = c->pm_caps;
317 mmc->slots[0].internal_clock = !c->ext_clock; 317 mmc->slots[0].internal_clock = !c->ext_clock;
318 mmc->dma_mask = 0xffffffff;
319 mmc->max_freq = c->max_freq; 318 mmc->max_freq = c->max_freq;
320 if (cpu_is_omap44xx()) 319 if (cpu_is_omap44xx())
321 mmc->reg_offset = OMAP4_MMC_REG_OFFSET; 320 mmc->reg_offset = OMAP4_MMC_REG_OFFSET;
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 13d20c8a283d..2ff6d41ec6c6 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -130,6 +130,7 @@ static struct clock_event_device clockevent_gpt = {
130 .name = "gp_timer", 130 .name = "gp_timer",
131 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, 131 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
132 .shift = 32, 132 .shift = 32,
133 .rating = 300,
133 .set_next_event = omap2_gp_timer_set_next_event, 134 .set_next_event = omap2_gp_timer_set_next_event,
134 .set_mode = omap2_gp_timer_set_mode, 135 .set_mode = omap2_gp_timer_set_mode,
135}; 136};
@@ -223,7 +224,8 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
223 clockevent_delta2ns(3, &clockevent_gpt); 224 clockevent_delta2ns(3, &clockevent_gpt);
224 /* Timer internal resynch latency. */ 225 /* Timer internal resynch latency. */
225 226
226 clockevent_gpt.cpumask = cpumask_of(0); 227 clockevent_gpt.cpumask = cpu_possible_mask;
228 clockevent_gpt.irq = omap_dm_timer_get_irq(&clkev);
227 clockevents_register_device(&clockevent_gpt); 229 clockevents_register_device(&clockevent_gpt);
228 230
229 pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", 231 pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n",
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c
index b1b45fff776e..17da7091d310 100644
--- a/arch/arm/mach-orion5x/irq.c
+++ b/arch/arm/mach-orion5x/irq.c
@@ -11,19 +11,16 @@
11 */ 11 */
12#include <linux/gpio.h> 12#include <linux/gpio.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/irq.h> 14#include <linux/irq.h>
16#include <linux/io.h>
17#include <mach/bridge-regs.h> 15#include <mach/bridge-regs.h>
18#include <plat/irq.h> 16#include <plat/irq.h>
19#include "common.h"
20 17
21static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 18static int __initdata gpio0_irqs[4] = {
22{ 19 IRQ_ORION5X_GPIO_0_7,
23 BUG_ON(irq < IRQ_ORION5X_GPIO_0_7 || irq > IRQ_ORION5X_GPIO_24_31); 20 IRQ_ORION5X_GPIO_8_15,
24 21 IRQ_ORION5X_GPIO_16_23,
25 orion_gpio_irq_handler((irq - IRQ_ORION5X_GPIO_0_7) << 3); 22 IRQ_ORION5X_GPIO_24_31,
26} 23};
27 24
28void __init orion5x_init_irq(void) 25void __init orion5x_init_irq(void)
29{ 26{
@@ -32,9 +29,6 @@ void __init orion5x_init_irq(void)
32 /* 29 /*
33 * Initialize gpiolib for GPIOs 0-31. 30 * Initialize gpiolib for GPIOs 0-31.
34 */ 31 */
35 orion_gpio_init(0, 32, GPIO_VIRT_BASE, 0, IRQ_ORION5X_GPIO_START); 32 orion_gpio_init(NULL, 0, 32, (void __iomem *)GPIO_VIRT_BASE, 0,
36 irq_set_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler); 33 IRQ_ORION5X_GPIO_START, gpio0_irqs);
37 irq_set_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler);
38 irq_set_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler);
39 irq_set_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler);
40} 34}
diff --git a/arch/arm/mach-prima2/timer.c b/arch/arm/mach-prima2/timer.c
index 0d024b1e916d..f224107de7bc 100644
--- a/arch/arm/mach-prima2/timer.c
+++ b/arch/arm/mach-prima2/timer.c
@@ -132,11 +132,11 @@ static void sirfsoc_clocksource_resume(struct clocksource *cs)
132{ 132{
133 int i; 133 int i;
134 134
135 for (i = 0; i < SIRFSOC_TIMER_REG_CNT; i++) 135 for (i = 0; i < SIRFSOC_TIMER_REG_CNT - 2; i++)
136 writel_relaxed(sirfsoc_timer_reg_val[i], sirfsoc_timer_base + sirfsoc_timer_reg_list[i]); 136 writel_relaxed(sirfsoc_timer_reg_val[i], sirfsoc_timer_base + sirfsoc_timer_reg_list[i]);
137 137
138 writel_relaxed(sirfsoc_timer_reg_val[i - 2], sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO); 138 writel_relaxed(sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT - 2], sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_LO);
139 writel_relaxed(sirfsoc_timer_reg_val[i - 1], sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI); 139 writel_relaxed(sirfsoc_timer_reg_val[SIRFSOC_TIMER_REG_CNT - 1], sirfsoc_timer_base + SIRFSOC_TIMER_COUNTER_HI);
140} 140}
141 141
142static struct clock_event_device sirfsoc_clockevent = { 142static struct clock_event_device sirfsoc_clockevent = {
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 5905ed130e94..d89d87ae144c 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -953,12 +953,12 @@ static struct i2c_board_info raumfeld_connector_i2c_board_info __initdata = {
953 953
954static struct eeti_ts_platform_data eeti_ts_pdata = { 954static struct eeti_ts_platform_data eeti_ts_pdata = {
955 .irq_active_high = 1, 955 .irq_active_high = 1,
956 .irq_gpio = GPIO_TOUCH_IRQ,
956}; 957};
957 958
958static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = { 959static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = {
959 .type = "eeti_ts", 960 .type = "eeti_ts",
960 .addr = 0x0a, 961 .addr = 0x0a,
961 .irq = PXA_GPIO_TO_IRQ(GPIO_TOUCH_IRQ),
962 .platform_data = &eeti_ts_pdata, 962 .platform_data = &eeti_ts_pdata,
963}; 963};
964 964
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index e24961109b70..d56b0f7f2b20 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -483,7 +483,7 @@ config MACH_NEO1973_GTA02
483 select I2C 483 select I2C
484 select POWER_SUPPLY 484 select POWER_SUPPLY
485 select MACH_NEO1973 485 select MACH_NEO1973
486 select S3C2410_PWM 486 select S3C24XX_PWM
487 select S3C_DEV_USB_HOST 487 select S3C_DEV_USB_HOST
488 help 488 help
489 Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone 489 Say Y here if you are using the Openmoko GTA02 / Freerunner GSM Phone
@@ -493,7 +493,7 @@ config MACH_RX1950
493 select S3C24XX_DCLK 493 select S3C24XX_DCLK
494 select PM_H1940 if PM 494 select PM_H1940 if PM
495 select I2C 495 select I2C
496 select S3C2410_PWM 496 select S3C24XX_PWM
497 select S3C_DEV_NAND 497 select S3C_DEV_NAND
498 select S3C2410_IOTIMING if S3C2440_CPUFREQ 498 select S3C2410_IOTIMING if S3C2440_CPUFREQ
499 select S3C2440_XTAL_16934400 499 select S3C2440_XTAL_16934400
diff --git a/arch/arm/mach-sa1100/leds-hackkit.c b/arch/arm/mach-sa1100/leds-hackkit.c
index 6a2352436e62..f8e47235babe 100644
--- a/arch/arm/mach-sa1100/leds-hackkit.c
+++ b/arch/arm/mach-sa1100/leds-hackkit.c
@@ -10,6 +10,7 @@
10 * as cpu led, the green one is used as timer led. 10 * as cpu led, the green one is used as timer led.
11 */ 11 */
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/io.h>
13 14
14#include <mach/hardware.h> 15#include <mach/hardware.h>
15#include <asm/leds.h> 16#include <asm/leds.h>
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index 0f882ecb7d81..6ec300549960 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -120,182 +120,156 @@ struct pl08x_channel_data spear300_dma_info[] = {
120 .min_signal = 2, 120 .min_signal = 2,
121 .max_signal = 2, 121 .max_signal = 2,
122 .muxval = 0, 122 .muxval = 0,
123 .cctl = 0,
124 .periph_buses = PL08X_AHB1, 123 .periph_buses = PL08X_AHB1,
125 }, { 124 }, {
126 .bus_id = "uart0_tx", 125 .bus_id = "uart0_tx",
127 .min_signal = 3, 126 .min_signal = 3,
128 .max_signal = 3, 127 .max_signal = 3,
129 .muxval = 0, 128 .muxval = 0,
130 .cctl = 0,
131 .periph_buses = PL08X_AHB1, 129 .periph_buses = PL08X_AHB1,
132 }, { 130 }, {
133 .bus_id = "ssp0_rx", 131 .bus_id = "ssp0_rx",
134 .min_signal = 8, 132 .min_signal = 8,
135 .max_signal = 8, 133 .max_signal = 8,
136 .muxval = 0, 134 .muxval = 0,
137 .cctl = 0,
138 .periph_buses = PL08X_AHB1, 135 .periph_buses = PL08X_AHB1,
139 }, { 136 }, {
140 .bus_id = "ssp0_tx", 137 .bus_id = "ssp0_tx",
141 .min_signal = 9, 138 .min_signal = 9,
142 .max_signal = 9, 139 .max_signal = 9,
143 .muxval = 0, 140 .muxval = 0,
144 .cctl = 0,
145 .periph_buses = PL08X_AHB1, 141 .periph_buses = PL08X_AHB1,
146 }, { 142 }, {
147 .bus_id = "i2c_rx", 143 .bus_id = "i2c_rx",
148 .min_signal = 10, 144 .min_signal = 10,
149 .max_signal = 10, 145 .max_signal = 10,
150 .muxval = 0, 146 .muxval = 0,
151 .cctl = 0,
152 .periph_buses = PL08X_AHB1, 147 .periph_buses = PL08X_AHB1,
153 }, { 148 }, {
154 .bus_id = "i2c_tx", 149 .bus_id = "i2c_tx",
155 .min_signal = 11, 150 .min_signal = 11,
156 .max_signal = 11, 151 .max_signal = 11,
157 .muxval = 0, 152 .muxval = 0,
158 .cctl = 0,
159 .periph_buses = PL08X_AHB1, 153 .periph_buses = PL08X_AHB1,
160 }, { 154 }, {
161 .bus_id = "irda", 155 .bus_id = "irda",
162 .min_signal = 12, 156 .min_signal = 12,
163 .max_signal = 12, 157 .max_signal = 12,
164 .muxval = 0, 158 .muxval = 0,
165 .cctl = 0,
166 .periph_buses = PL08X_AHB1, 159 .periph_buses = PL08X_AHB1,
167 }, { 160 }, {
168 .bus_id = "adc", 161 .bus_id = "adc",
169 .min_signal = 13, 162 .min_signal = 13,
170 .max_signal = 13, 163 .max_signal = 13,
171 .muxval = 0, 164 .muxval = 0,
172 .cctl = 0,
173 .periph_buses = PL08X_AHB1, 165 .periph_buses = PL08X_AHB1,
174 }, { 166 }, {
175 .bus_id = "to_jpeg", 167 .bus_id = "to_jpeg",
176 .min_signal = 14, 168 .min_signal = 14,
177 .max_signal = 14, 169 .max_signal = 14,
178 .muxval = 0, 170 .muxval = 0,
179 .cctl = 0,
180 .periph_buses = PL08X_AHB1, 171 .periph_buses = PL08X_AHB1,
181 }, { 172 }, {
182 .bus_id = "from_jpeg", 173 .bus_id = "from_jpeg",
183 .min_signal = 15, 174 .min_signal = 15,
184 .max_signal = 15, 175 .max_signal = 15,
185 .muxval = 0, 176 .muxval = 0,
186 .cctl = 0,
187 .periph_buses = PL08X_AHB1, 177 .periph_buses = PL08X_AHB1,
188 }, { 178 }, {
189 .bus_id = "ras0_rx", 179 .bus_id = "ras0_rx",
190 .min_signal = 0, 180 .min_signal = 0,
191 .max_signal = 0, 181 .max_signal = 0,
192 .muxval = 1, 182 .muxval = 1,
193 .cctl = 0,
194 .periph_buses = PL08X_AHB1, 183 .periph_buses = PL08X_AHB1,
195 }, { 184 }, {
196 .bus_id = "ras0_tx", 185 .bus_id = "ras0_tx",
197 .min_signal = 1, 186 .min_signal = 1,
198 .max_signal = 1, 187 .max_signal = 1,
199 .muxval = 1, 188 .muxval = 1,
200 .cctl = 0,
201 .periph_buses = PL08X_AHB1, 189 .periph_buses = PL08X_AHB1,
202 }, { 190 }, {
203 .bus_id = "ras1_rx", 191 .bus_id = "ras1_rx",
204 .min_signal = 2, 192 .min_signal = 2,
205 .max_signal = 2, 193 .max_signal = 2,
206 .muxval = 1, 194 .muxval = 1,
207 .cctl = 0,
208 .periph_buses = PL08X_AHB1, 195 .periph_buses = PL08X_AHB1,
209 }, { 196 }, {
210 .bus_id = "ras1_tx", 197 .bus_id = "ras1_tx",
211 .min_signal = 3, 198 .min_signal = 3,
212 .max_signal = 3, 199 .max_signal = 3,
213 .muxval = 1, 200 .muxval = 1,
214 .cctl = 0,
215 .periph_buses = PL08X_AHB1, 201 .periph_buses = PL08X_AHB1,
216 }, { 202 }, {
217 .bus_id = "ras2_rx", 203 .bus_id = "ras2_rx",
218 .min_signal = 4, 204 .min_signal = 4,
219 .max_signal = 4, 205 .max_signal = 4,
220 .muxval = 1, 206 .muxval = 1,
221 .cctl = 0,
222 .periph_buses = PL08X_AHB1, 207 .periph_buses = PL08X_AHB1,
223 }, { 208 }, {
224 .bus_id = "ras2_tx", 209 .bus_id = "ras2_tx",
225 .min_signal = 5, 210 .min_signal = 5,
226 .max_signal = 5, 211 .max_signal = 5,
227 .muxval = 1, 212 .muxval = 1,
228 .cctl = 0,
229 .periph_buses = PL08X_AHB1, 213 .periph_buses = PL08X_AHB1,
230 }, { 214 }, {
231 .bus_id = "ras3_rx", 215 .bus_id = "ras3_rx",
232 .min_signal = 6, 216 .min_signal = 6,
233 .max_signal = 6, 217 .max_signal = 6,
234 .muxval = 1, 218 .muxval = 1,
235 .cctl = 0,
236 .periph_buses = PL08X_AHB1, 219 .periph_buses = PL08X_AHB1,
237 }, { 220 }, {
238 .bus_id = "ras3_tx", 221 .bus_id = "ras3_tx",
239 .min_signal = 7, 222 .min_signal = 7,
240 .max_signal = 7, 223 .max_signal = 7,
241 .muxval = 1, 224 .muxval = 1,
242 .cctl = 0,
243 .periph_buses = PL08X_AHB1, 225 .periph_buses = PL08X_AHB1,
244 }, { 226 }, {
245 .bus_id = "ras4_rx", 227 .bus_id = "ras4_rx",
246 .min_signal = 8, 228 .min_signal = 8,
247 .max_signal = 8, 229 .max_signal = 8,
248 .muxval = 1, 230 .muxval = 1,
249 .cctl = 0,
250 .periph_buses = PL08X_AHB1, 231 .periph_buses = PL08X_AHB1,
251 }, { 232 }, {
252 .bus_id = "ras4_tx", 233 .bus_id = "ras4_tx",
253 .min_signal = 9, 234 .min_signal = 9,
254 .max_signal = 9, 235 .max_signal = 9,
255 .muxval = 1, 236 .muxval = 1,
256 .cctl = 0,
257 .periph_buses = PL08X_AHB1, 237 .periph_buses = PL08X_AHB1,
258 }, { 238 }, {
259 .bus_id = "ras5_rx", 239 .bus_id = "ras5_rx",
260 .min_signal = 10, 240 .min_signal = 10,
261 .max_signal = 10, 241 .max_signal = 10,
262 .muxval = 1, 242 .muxval = 1,
263 .cctl = 0,
264 .periph_buses = PL08X_AHB1, 243 .periph_buses = PL08X_AHB1,
265 }, { 244 }, {
266 .bus_id = "ras5_tx", 245 .bus_id = "ras5_tx",
267 .min_signal = 11, 246 .min_signal = 11,
268 .max_signal = 11, 247 .max_signal = 11,
269 .muxval = 1, 248 .muxval = 1,
270 .cctl = 0,
271 .periph_buses = PL08X_AHB1, 249 .periph_buses = PL08X_AHB1,
272 }, { 250 }, {
273 .bus_id = "ras6_rx", 251 .bus_id = "ras6_rx",
274 .min_signal = 12, 252 .min_signal = 12,
275 .max_signal = 12, 253 .max_signal = 12,
276 .muxval = 1, 254 .muxval = 1,
277 .cctl = 0,
278 .periph_buses = PL08X_AHB1, 255 .periph_buses = PL08X_AHB1,
279 }, { 256 }, {
280 .bus_id = "ras6_tx", 257 .bus_id = "ras6_tx",
281 .min_signal = 13, 258 .min_signal = 13,
282 .max_signal = 13, 259 .max_signal = 13,
283 .muxval = 1, 260 .muxval = 1,
284 .cctl = 0,
285 .periph_buses = PL08X_AHB1, 261 .periph_buses = PL08X_AHB1,
286 }, { 262 }, {
287 .bus_id = "ras7_rx", 263 .bus_id = "ras7_rx",
288 .min_signal = 14, 264 .min_signal = 14,
289 .max_signal = 14, 265 .max_signal = 14,
290 .muxval = 1, 266 .muxval = 1,
291 .cctl = 0,
292 .periph_buses = PL08X_AHB1, 267 .periph_buses = PL08X_AHB1,
293 }, { 268 }, {
294 .bus_id = "ras7_tx", 269 .bus_id = "ras7_tx",
295 .min_signal = 15, 270 .min_signal = 15,
296 .max_signal = 15, 271 .max_signal = 15,
297 .muxval = 1, 272 .muxval = 1,
298 .cctl = 0,
299 .periph_buses = PL08X_AHB1, 273 .periph_buses = PL08X_AHB1,
300 }, 274 },
301}; 275};
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index bbcf4571d361..1d0e435b9045 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -205,182 +205,156 @@ struct pl08x_channel_data spear310_dma_info[] = {
205 .min_signal = 2, 205 .min_signal = 2,
206 .max_signal = 2, 206 .max_signal = 2,
207 .muxval = 0, 207 .muxval = 0,
208 .cctl = 0,
209 .periph_buses = PL08X_AHB1, 208 .periph_buses = PL08X_AHB1,
210 }, { 209 }, {
211 .bus_id = "uart0_tx", 210 .bus_id = "uart0_tx",
212 .min_signal = 3, 211 .min_signal = 3,
213 .max_signal = 3, 212 .max_signal = 3,
214 .muxval = 0, 213 .muxval = 0,
215 .cctl = 0,
216 .periph_buses = PL08X_AHB1, 214 .periph_buses = PL08X_AHB1,
217 }, { 215 }, {
218 .bus_id = "ssp0_rx", 216 .bus_id = "ssp0_rx",
219 .min_signal = 8, 217 .min_signal = 8,
220 .max_signal = 8, 218 .max_signal = 8,
221 .muxval = 0, 219 .muxval = 0,
222 .cctl = 0,
223 .periph_buses = PL08X_AHB1, 220 .periph_buses = PL08X_AHB1,
224 }, { 221 }, {
225 .bus_id = "ssp0_tx", 222 .bus_id = "ssp0_tx",
226 .min_signal = 9, 223 .min_signal = 9,
227 .max_signal = 9, 224 .max_signal = 9,
228 .muxval = 0, 225 .muxval = 0,
229 .cctl = 0,
230 .periph_buses = PL08X_AHB1, 226 .periph_buses = PL08X_AHB1,
231 }, { 227 }, {
232 .bus_id = "i2c_rx", 228 .bus_id = "i2c_rx",
233 .min_signal = 10, 229 .min_signal = 10,
234 .max_signal = 10, 230 .max_signal = 10,
235 .muxval = 0, 231 .muxval = 0,
236 .cctl = 0,
237 .periph_buses = PL08X_AHB1, 232 .periph_buses = PL08X_AHB1,
238 }, { 233 }, {
239 .bus_id = "i2c_tx", 234 .bus_id = "i2c_tx",
240 .min_signal = 11, 235 .min_signal = 11,
241 .max_signal = 11, 236 .max_signal = 11,
242 .muxval = 0, 237 .muxval = 0,
243 .cctl = 0,
244 .periph_buses = PL08X_AHB1, 238 .periph_buses = PL08X_AHB1,
245 }, { 239 }, {
246 .bus_id = "irda", 240 .bus_id = "irda",
247 .min_signal = 12, 241 .min_signal = 12,
248 .max_signal = 12, 242 .max_signal = 12,
249 .muxval = 0, 243 .muxval = 0,
250 .cctl = 0,
251 .periph_buses = PL08X_AHB1, 244 .periph_buses = PL08X_AHB1,
252 }, { 245 }, {
253 .bus_id = "adc", 246 .bus_id = "adc",
254 .min_signal = 13, 247 .min_signal = 13,
255 .max_signal = 13, 248 .max_signal = 13,
256 .muxval = 0, 249 .muxval = 0,
257 .cctl = 0,
258 .periph_buses = PL08X_AHB1, 250 .periph_buses = PL08X_AHB1,
259 }, { 251 }, {
260 .bus_id = "to_jpeg", 252 .bus_id = "to_jpeg",
261 .min_signal = 14, 253 .min_signal = 14,
262 .max_signal = 14, 254 .max_signal = 14,
263 .muxval = 0, 255 .muxval = 0,
264 .cctl = 0,
265 .periph_buses = PL08X_AHB1, 256 .periph_buses = PL08X_AHB1,
266 }, { 257 }, {
267 .bus_id = "from_jpeg", 258 .bus_id = "from_jpeg",
268 .min_signal = 15, 259 .min_signal = 15,
269 .max_signal = 15, 260 .max_signal = 15,
270 .muxval = 0, 261 .muxval = 0,
271 .cctl = 0,
272 .periph_buses = PL08X_AHB1, 262 .periph_buses = PL08X_AHB1,
273 }, { 263 }, {
274 .bus_id = "uart1_rx", 264 .bus_id = "uart1_rx",
275 .min_signal = 0, 265 .min_signal = 0,
276 .max_signal = 0, 266 .max_signal = 0,
277 .muxval = 1, 267 .muxval = 1,
278 .cctl = 0,
279 .periph_buses = PL08X_AHB1, 268 .periph_buses = PL08X_AHB1,
280 }, { 269 }, {
281 .bus_id = "uart1_tx", 270 .bus_id = "uart1_tx",
282 .min_signal = 1, 271 .min_signal = 1,
283 .max_signal = 1, 272 .max_signal = 1,
284 .muxval = 1, 273 .muxval = 1,
285 .cctl = 0,
286 .periph_buses = PL08X_AHB1, 274 .periph_buses = PL08X_AHB1,
287 }, { 275 }, {
288 .bus_id = "uart2_rx", 276 .bus_id = "uart2_rx",
289 .min_signal = 2, 277 .min_signal = 2,
290 .max_signal = 2, 278 .max_signal = 2,
291 .muxval = 1, 279 .muxval = 1,
292 .cctl = 0,
293 .periph_buses = PL08X_AHB1, 280 .periph_buses = PL08X_AHB1,
294 }, { 281 }, {
295 .bus_id = "uart2_tx", 282 .bus_id = "uart2_tx",
296 .min_signal = 3, 283 .min_signal = 3,
297 .max_signal = 3, 284 .max_signal = 3,
298 .muxval = 1, 285 .muxval = 1,
299 .cctl = 0,
300 .periph_buses = PL08X_AHB1, 286 .periph_buses = PL08X_AHB1,
301 }, { 287 }, {
302 .bus_id = "uart3_rx", 288 .bus_id = "uart3_rx",
303 .min_signal = 4, 289 .min_signal = 4,
304 .max_signal = 4, 290 .max_signal = 4,
305 .muxval = 1, 291 .muxval = 1,
306 .cctl = 0,
307 .periph_buses = PL08X_AHB1, 292 .periph_buses = PL08X_AHB1,
308 }, { 293 }, {
309 .bus_id = "uart3_tx", 294 .bus_id = "uart3_tx",
310 .min_signal = 5, 295 .min_signal = 5,
311 .max_signal = 5, 296 .max_signal = 5,
312 .muxval = 1, 297 .muxval = 1,
313 .cctl = 0,
314 .periph_buses = PL08X_AHB1, 298 .periph_buses = PL08X_AHB1,
315 }, { 299 }, {
316 .bus_id = "uart4_rx", 300 .bus_id = "uart4_rx",
317 .min_signal = 6, 301 .min_signal = 6,
318 .max_signal = 6, 302 .max_signal = 6,
319 .muxval = 1, 303 .muxval = 1,
320 .cctl = 0,
321 .periph_buses = PL08X_AHB1, 304 .periph_buses = PL08X_AHB1,
322 }, { 305 }, {
323 .bus_id = "uart4_tx", 306 .bus_id = "uart4_tx",
324 .min_signal = 7, 307 .min_signal = 7,
325 .max_signal = 7, 308 .max_signal = 7,
326 .muxval = 1, 309 .muxval = 1,
327 .cctl = 0,
328 .periph_buses = PL08X_AHB1, 310 .periph_buses = PL08X_AHB1,
329 }, { 311 }, {
330 .bus_id = "uart5_rx", 312 .bus_id = "uart5_rx",
331 .min_signal = 8, 313 .min_signal = 8,
332 .max_signal = 8, 314 .max_signal = 8,
333 .muxval = 1, 315 .muxval = 1,
334 .cctl = 0,
335 .periph_buses = PL08X_AHB1, 316 .periph_buses = PL08X_AHB1,
336 }, { 317 }, {
337 .bus_id = "uart5_tx", 318 .bus_id = "uart5_tx",
338 .min_signal = 9, 319 .min_signal = 9,
339 .max_signal = 9, 320 .max_signal = 9,
340 .muxval = 1, 321 .muxval = 1,
341 .cctl = 0,
342 .periph_buses = PL08X_AHB1, 322 .periph_buses = PL08X_AHB1,
343 }, { 323 }, {
344 .bus_id = "ras5_rx", 324 .bus_id = "ras5_rx",
345 .min_signal = 10, 325 .min_signal = 10,
346 .max_signal = 10, 326 .max_signal = 10,
347 .muxval = 1, 327 .muxval = 1,
348 .cctl = 0,
349 .periph_buses = PL08X_AHB1, 328 .periph_buses = PL08X_AHB1,
350 }, { 329 }, {
351 .bus_id = "ras5_tx", 330 .bus_id = "ras5_tx",
352 .min_signal = 11, 331 .min_signal = 11,
353 .max_signal = 11, 332 .max_signal = 11,
354 .muxval = 1, 333 .muxval = 1,
355 .cctl = 0,
356 .periph_buses = PL08X_AHB1, 334 .periph_buses = PL08X_AHB1,
357 }, { 335 }, {
358 .bus_id = "ras6_rx", 336 .bus_id = "ras6_rx",
359 .min_signal = 12, 337 .min_signal = 12,
360 .max_signal = 12, 338 .max_signal = 12,
361 .muxval = 1, 339 .muxval = 1,
362 .cctl = 0,
363 .periph_buses = PL08X_AHB1, 340 .periph_buses = PL08X_AHB1,
364 }, { 341 }, {
365 .bus_id = "ras6_tx", 342 .bus_id = "ras6_tx",
366 .min_signal = 13, 343 .min_signal = 13,
367 .max_signal = 13, 344 .max_signal = 13,
368 .muxval = 1, 345 .muxval = 1,
369 .cctl = 0,
370 .periph_buses = PL08X_AHB1, 346 .periph_buses = PL08X_AHB1,
371 }, { 347 }, {
372 .bus_id = "ras7_rx", 348 .bus_id = "ras7_rx",
373 .min_signal = 14, 349 .min_signal = 14,
374 .max_signal = 14, 350 .max_signal = 14,
375 .muxval = 1, 351 .muxval = 1,
376 .cctl = 0,
377 .periph_buses = PL08X_AHB1, 352 .periph_buses = PL08X_AHB1,
378 }, { 353 }, {
379 .bus_id = "ras7_tx", 354 .bus_id = "ras7_tx",
380 .min_signal = 15, 355 .min_signal = 15,
381 .max_signal = 15, 356 .max_signal = 15,
382 .muxval = 1, 357 .muxval = 1,
383 .cctl = 0,
384 .periph_buses = PL08X_AHB1, 358 .periph_buses = PL08X_AHB1,
385 }, 359 },
386}; 360};
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index 88d483bcd66a..fd823c624575 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -213,182 +213,156 @@ struct pl08x_channel_data spear320_dma_info[] = {
213 .min_signal = 2, 213 .min_signal = 2,
214 .max_signal = 2, 214 .max_signal = 2,
215 .muxval = 0, 215 .muxval = 0,
216 .cctl = 0,
217 .periph_buses = PL08X_AHB1, 216 .periph_buses = PL08X_AHB1,
218 }, { 217 }, {
219 .bus_id = "uart0_tx", 218 .bus_id = "uart0_tx",
220 .min_signal = 3, 219 .min_signal = 3,
221 .max_signal = 3, 220 .max_signal = 3,
222 .muxval = 0, 221 .muxval = 0,
223 .cctl = 0,
224 .periph_buses = PL08X_AHB1, 222 .periph_buses = PL08X_AHB1,
225 }, { 223 }, {
226 .bus_id = "ssp0_rx", 224 .bus_id = "ssp0_rx",
227 .min_signal = 8, 225 .min_signal = 8,
228 .max_signal = 8, 226 .max_signal = 8,
229 .muxval = 0, 227 .muxval = 0,
230 .cctl = 0,
231 .periph_buses = PL08X_AHB1, 228 .periph_buses = PL08X_AHB1,
232 }, { 229 }, {
233 .bus_id = "ssp0_tx", 230 .bus_id = "ssp0_tx",
234 .min_signal = 9, 231 .min_signal = 9,
235 .max_signal = 9, 232 .max_signal = 9,
236 .muxval = 0, 233 .muxval = 0,
237 .cctl = 0,
238 .periph_buses = PL08X_AHB1, 234 .periph_buses = PL08X_AHB1,
239 }, { 235 }, {
240 .bus_id = "i2c0_rx", 236 .bus_id = "i2c0_rx",
241 .min_signal = 10, 237 .min_signal = 10,
242 .max_signal = 10, 238 .max_signal = 10,
243 .muxval = 0, 239 .muxval = 0,
244 .cctl = 0,
245 .periph_buses = PL08X_AHB1, 240 .periph_buses = PL08X_AHB1,
246 }, { 241 }, {
247 .bus_id = "i2c0_tx", 242 .bus_id = "i2c0_tx",
248 .min_signal = 11, 243 .min_signal = 11,
249 .max_signal = 11, 244 .max_signal = 11,
250 .muxval = 0, 245 .muxval = 0,
251 .cctl = 0,
252 .periph_buses = PL08X_AHB1, 246 .periph_buses = PL08X_AHB1,
253 }, { 247 }, {
254 .bus_id = "irda", 248 .bus_id = "irda",
255 .min_signal = 12, 249 .min_signal = 12,
256 .max_signal = 12, 250 .max_signal = 12,
257 .muxval = 0, 251 .muxval = 0,
258 .cctl = 0,
259 .periph_buses = PL08X_AHB1, 252 .periph_buses = PL08X_AHB1,
260 }, { 253 }, {
261 .bus_id = "adc", 254 .bus_id = "adc",
262 .min_signal = 13, 255 .min_signal = 13,
263 .max_signal = 13, 256 .max_signal = 13,
264 .muxval = 0, 257 .muxval = 0,
265 .cctl = 0,
266 .periph_buses = PL08X_AHB1, 258 .periph_buses = PL08X_AHB1,
267 }, { 259 }, {
268 .bus_id = "to_jpeg", 260 .bus_id = "to_jpeg",
269 .min_signal = 14, 261 .min_signal = 14,
270 .max_signal = 14, 262 .max_signal = 14,
271 .muxval = 0, 263 .muxval = 0,
272 .cctl = 0,
273 .periph_buses = PL08X_AHB1, 264 .periph_buses = PL08X_AHB1,
274 }, { 265 }, {
275 .bus_id = "from_jpeg", 266 .bus_id = "from_jpeg",
276 .min_signal = 15, 267 .min_signal = 15,
277 .max_signal = 15, 268 .max_signal = 15,
278 .muxval = 0, 269 .muxval = 0,
279 .cctl = 0,
280 .periph_buses = PL08X_AHB1, 270 .periph_buses = PL08X_AHB1,
281 }, { 271 }, {
282 .bus_id = "ssp1_rx", 272 .bus_id = "ssp1_rx",
283 .min_signal = 0, 273 .min_signal = 0,
284 .max_signal = 0, 274 .max_signal = 0,
285 .muxval = 1, 275 .muxval = 1,
286 .cctl = 0,
287 .periph_buses = PL08X_AHB2, 276 .periph_buses = PL08X_AHB2,
288 }, { 277 }, {
289 .bus_id = "ssp1_tx", 278 .bus_id = "ssp1_tx",
290 .min_signal = 1, 279 .min_signal = 1,
291 .max_signal = 1, 280 .max_signal = 1,
292 .muxval = 1, 281 .muxval = 1,
293 .cctl = 0,
294 .periph_buses = PL08X_AHB2, 282 .periph_buses = PL08X_AHB2,
295 }, { 283 }, {
296 .bus_id = "ssp2_rx", 284 .bus_id = "ssp2_rx",
297 .min_signal = 2, 285 .min_signal = 2,
298 .max_signal = 2, 286 .max_signal = 2,
299 .muxval = 1, 287 .muxval = 1,
300 .cctl = 0,
301 .periph_buses = PL08X_AHB2, 288 .periph_buses = PL08X_AHB2,
302 }, { 289 }, {
303 .bus_id = "ssp2_tx", 290 .bus_id = "ssp2_tx",
304 .min_signal = 3, 291 .min_signal = 3,
305 .max_signal = 3, 292 .max_signal = 3,
306 .muxval = 1, 293 .muxval = 1,
307 .cctl = 0,
308 .periph_buses = PL08X_AHB2, 294 .periph_buses = PL08X_AHB2,
309 }, { 295 }, {
310 .bus_id = "uart1_rx", 296 .bus_id = "uart1_rx",
311 .min_signal = 4, 297 .min_signal = 4,
312 .max_signal = 4, 298 .max_signal = 4,
313 .muxval = 1, 299 .muxval = 1,
314 .cctl = 0,
315 .periph_buses = PL08X_AHB2, 300 .periph_buses = PL08X_AHB2,
316 }, { 301 }, {
317 .bus_id = "uart1_tx", 302 .bus_id = "uart1_tx",
318 .min_signal = 5, 303 .min_signal = 5,
319 .max_signal = 5, 304 .max_signal = 5,
320 .muxval = 1, 305 .muxval = 1,
321 .cctl = 0,
322 .periph_buses = PL08X_AHB2, 306 .periph_buses = PL08X_AHB2,
323 }, { 307 }, {
324 .bus_id = "uart2_rx", 308 .bus_id = "uart2_rx",
325 .min_signal = 6, 309 .min_signal = 6,
326 .max_signal = 6, 310 .max_signal = 6,
327 .muxval = 1, 311 .muxval = 1,
328 .cctl = 0,
329 .periph_buses = PL08X_AHB2, 312 .periph_buses = PL08X_AHB2,
330 }, { 313 }, {
331 .bus_id = "uart2_tx", 314 .bus_id = "uart2_tx",
332 .min_signal = 7, 315 .min_signal = 7,
333 .max_signal = 7, 316 .max_signal = 7,
334 .muxval = 1, 317 .muxval = 1,
335 .cctl = 0,
336 .periph_buses = PL08X_AHB2, 318 .periph_buses = PL08X_AHB2,
337 }, { 319 }, {
338 .bus_id = "i2c1_rx", 320 .bus_id = "i2c1_rx",
339 .min_signal = 8, 321 .min_signal = 8,
340 .max_signal = 8, 322 .max_signal = 8,
341 .muxval = 1, 323 .muxval = 1,
342 .cctl = 0,
343 .periph_buses = PL08X_AHB2, 324 .periph_buses = PL08X_AHB2,
344 }, { 325 }, {
345 .bus_id = "i2c1_tx", 326 .bus_id = "i2c1_tx",
346 .min_signal = 9, 327 .min_signal = 9,
347 .max_signal = 9, 328 .max_signal = 9,
348 .muxval = 1, 329 .muxval = 1,
349 .cctl = 0,
350 .periph_buses = PL08X_AHB2, 330 .periph_buses = PL08X_AHB2,
351 }, { 331 }, {
352 .bus_id = "i2c2_rx", 332 .bus_id = "i2c2_rx",
353 .min_signal = 10, 333 .min_signal = 10,
354 .max_signal = 10, 334 .max_signal = 10,
355 .muxval = 1, 335 .muxval = 1,
356 .cctl = 0,
357 .periph_buses = PL08X_AHB2, 336 .periph_buses = PL08X_AHB2,
358 }, { 337 }, {
359 .bus_id = "i2c2_tx", 338 .bus_id = "i2c2_tx",
360 .min_signal = 11, 339 .min_signal = 11,
361 .max_signal = 11, 340 .max_signal = 11,
362 .muxval = 1, 341 .muxval = 1,
363 .cctl = 0,
364 .periph_buses = PL08X_AHB2, 342 .periph_buses = PL08X_AHB2,
365 }, { 343 }, {
366 .bus_id = "i2s_rx", 344 .bus_id = "i2s_rx",
367 .min_signal = 12, 345 .min_signal = 12,
368 .max_signal = 12, 346 .max_signal = 12,
369 .muxval = 1, 347 .muxval = 1,
370 .cctl = 0,
371 .periph_buses = PL08X_AHB2, 348 .periph_buses = PL08X_AHB2,
372 }, { 349 }, {
373 .bus_id = "i2s_tx", 350 .bus_id = "i2s_tx",
374 .min_signal = 13, 351 .min_signal = 13,
375 .max_signal = 13, 352 .max_signal = 13,
376 .muxval = 1, 353 .muxval = 1,
377 .cctl = 0,
378 .periph_buses = PL08X_AHB2, 354 .periph_buses = PL08X_AHB2,
379 }, { 355 }, {
380 .bus_id = "rs485_rx", 356 .bus_id = "rs485_rx",
381 .min_signal = 14, 357 .min_signal = 14,
382 .max_signal = 14, 358 .max_signal = 14,
383 .muxval = 1, 359 .muxval = 1,
384 .cctl = 0,
385 .periph_buses = PL08X_AHB2, 360 .periph_buses = PL08X_AHB2,
386 }, { 361 }, {
387 .bus_id = "rs485_tx", 362 .bus_id = "rs485_tx",
388 .min_signal = 15, 363 .min_signal = 15,
389 .max_signal = 15, 364 .max_signal = 15,
390 .muxval = 1, 365 .muxval = 1,
391 .cctl = 0,
392 .periph_buses = PL08X_AHB2, 366 .periph_buses = PL08X_AHB2,
393 }, 367 },
394}; 368};
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index 66db5f13af84..98144baf8883 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -46,7 +46,8 @@ struct pl022_ssp_controller pl022_plat_data = {
46struct pl08x_platform_data pl080_plat_data = { 46struct pl08x_platform_data pl080_plat_data = {
47 .memcpy_channel = { 47 .memcpy_channel = {
48 .bus_id = "memcpy", 48 .bus_id = "memcpy",
49 .cctl = (PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | \ 49 .cctl_memcpy =
50 (PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | \
50 PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT | \ 51 PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT | \
51 PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | \ 52 PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | \
52 PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | \ 53 PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | \
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index 9af67d003c62..5a5a52db252b 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -36,336 +36,288 @@ static struct pl08x_channel_data spear600_dma_info[] = {
36 .min_signal = 0, 36 .min_signal = 0,
37 .max_signal = 0, 37 .max_signal = 0,
38 .muxval = 0, 38 .muxval = 0,
39 .cctl = 0,
40 .periph_buses = PL08X_AHB1, 39 .periph_buses = PL08X_AHB1,
41 }, { 40 }, {
42 .bus_id = "ssp1_tx", 41 .bus_id = "ssp1_tx",
43 .min_signal = 1, 42 .min_signal = 1,
44 .max_signal = 1, 43 .max_signal = 1,
45 .muxval = 0, 44 .muxval = 0,
46 .cctl = 0,
47 .periph_buses = PL08X_AHB1, 45 .periph_buses = PL08X_AHB1,
48 }, { 46 }, {
49 .bus_id = "uart0_rx", 47 .bus_id = "uart0_rx",
50 .min_signal = 2, 48 .min_signal = 2,
51 .max_signal = 2, 49 .max_signal = 2,
52 .muxval = 0, 50 .muxval = 0,
53 .cctl = 0,
54 .periph_buses = PL08X_AHB1, 51 .periph_buses = PL08X_AHB1,
55 }, { 52 }, {
56 .bus_id = "uart0_tx", 53 .bus_id = "uart0_tx",
57 .min_signal = 3, 54 .min_signal = 3,
58 .max_signal = 3, 55 .max_signal = 3,
59 .muxval = 0, 56 .muxval = 0,
60 .cctl = 0,
61 .periph_buses = PL08X_AHB1, 57 .periph_buses = PL08X_AHB1,
62 }, { 58 }, {
63 .bus_id = "uart1_rx", 59 .bus_id = "uart1_rx",
64 .min_signal = 4, 60 .min_signal = 4,
65 .max_signal = 4, 61 .max_signal = 4,
66 .muxval = 0, 62 .muxval = 0,
67 .cctl = 0,
68 .periph_buses = PL08X_AHB1, 63 .periph_buses = PL08X_AHB1,
69 }, { 64 }, {
70 .bus_id = "uart1_tx", 65 .bus_id = "uart1_tx",
71 .min_signal = 5, 66 .min_signal = 5,
72 .max_signal = 5, 67 .max_signal = 5,
73 .muxval = 0, 68 .muxval = 0,
74 .cctl = 0,
75 .periph_buses = PL08X_AHB1, 69 .periph_buses = PL08X_AHB1,
76 }, { 70 }, {
77 .bus_id = "ssp2_rx", 71 .bus_id = "ssp2_rx",
78 .min_signal = 6, 72 .min_signal = 6,
79 .max_signal = 6, 73 .max_signal = 6,
80 .muxval = 0, 74 .muxval = 0,
81 .cctl = 0,
82 .periph_buses = PL08X_AHB2, 75 .periph_buses = PL08X_AHB2,
83 }, { 76 }, {
84 .bus_id = "ssp2_tx", 77 .bus_id = "ssp2_tx",
85 .min_signal = 7, 78 .min_signal = 7,
86 .max_signal = 7, 79 .max_signal = 7,
87 .muxval = 0, 80 .muxval = 0,
88 .cctl = 0,
89 .periph_buses = PL08X_AHB2, 81 .periph_buses = PL08X_AHB2,
90 }, { 82 }, {
91 .bus_id = "ssp0_rx", 83 .bus_id = "ssp0_rx",
92 .min_signal = 8, 84 .min_signal = 8,
93 .max_signal = 8, 85 .max_signal = 8,
94 .muxval = 0, 86 .muxval = 0,
95 .cctl = 0,
96 .periph_buses = PL08X_AHB1, 87 .periph_buses = PL08X_AHB1,
97 }, { 88 }, {
98 .bus_id = "ssp0_tx", 89 .bus_id = "ssp0_tx",
99 .min_signal = 9, 90 .min_signal = 9,
100 .max_signal = 9, 91 .max_signal = 9,
101 .muxval = 0, 92 .muxval = 0,
102 .cctl = 0,
103 .periph_buses = PL08X_AHB1, 93 .periph_buses = PL08X_AHB1,
104 }, { 94 }, {
105 .bus_id = "i2c_rx", 95 .bus_id = "i2c_rx",
106 .min_signal = 10, 96 .min_signal = 10,
107 .max_signal = 10, 97 .max_signal = 10,
108 .muxval = 0, 98 .muxval = 0,
109 .cctl = 0,
110 .periph_buses = PL08X_AHB1, 99 .periph_buses = PL08X_AHB1,
111 }, { 100 }, {
112 .bus_id = "i2c_tx", 101 .bus_id = "i2c_tx",
113 .min_signal = 11, 102 .min_signal = 11,
114 .max_signal = 11, 103 .max_signal = 11,
115 .muxval = 0, 104 .muxval = 0,
116 .cctl = 0,
117 .periph_buses = PL08X_AHB1, 105 .periph_buses = PL08X_AHB1,
118 }, { 106 }, {
119 .bus_id = "irda", 107 .bus_id = "irda",
120 .min_signal = 12, 108 .min_signal = 12,
121 .max_signal = 12, 109 .max_signal = 12,
122 .muxval = 0, 110 .muxval = 0,
123 .cctl = 0,
124 .periph_buses = PL08X_AHB1, 111 .periph_buses = PL08X_AHB1,
125 }, { 112 }, {
126 .bus_id = "adc", 113 .bus_id = "adc",
127 .min_signal = 13, 114 .min_signal = 13,
128 .max_signal = 13, 115 .max_signal = 13,
129 .muxval = 0, 116 .muxval = 0,
130 .cctl = 0,
131 .periph_buses = PL08X_AHB2, 117 .periph_buses = PL08X_AHB2,
132 }, { 118 }, {
133 .bus_id = "to_jpeg", 119 .bus_id = "to_jpeg",
134 .min_signal = 14, 120 .min_signal = 14,
135 .max_signal = 14, 121 .max_signal = 14,
136 .muxval = 0, 122 .muxval = 0,
137 .cctl = 0,
138 .periph_buses = PL08X_AHB1, 123 .periph_buses = PL08X_AHB1,
139 }, { 124 }, {
140 .bus_id = "from_jpeg", 125 .bus_id = "from_jpeg",
141 .min_signal = 15, 126 .min_signal = 15,
142 .max_signal = 15, 127 .max_signal = 15,
143 .muxval = 0, 128 .muxval = 0,
144 .cctl = 0,
145 .periph_buses = PL08X_AHB1, 129 .periph_buses = PL08X_AHB1,
146 }, { 130 }, {
147 .bus_id = "ras0_rx", 131 .bus_id = "ras0_rx",
148 .min_signal = 0, 132 .min_signal = 0,
149 .max_signal = 0, 133 .max_signal = 0,
150 .muxval = 1, 134 .muxval = 1,
151 .cctl = 0,
152 .periph_buses = PL08X_AHB1, 135 .periph_buses = PL08X_AHB1,
153 }, { 136 }, {
154 .bus_id = "ras0_tx", 137 .bus_id = "ras0_tx",
155 .min_signal = 1, 138 .min_signal = 1,
156 .max_signal = 1, 139 .max_signal = 1,
157 .muxval = 1, 140 .muxval = 1,
158 .cctl = 0,
159 .periph_buses = PL08X_AHB1, 141 .periph_buses = PL08X_AHB1,
160 }, { 142 }, {
161 .bus_id = "ras1_rx", 143 .bus_id = "ras1_rx",
162 .min_signal = 2, 144 .min_signal = 2,
163 .max_signal = 2, 145 .max_signal = 2,
164 .muxval = 1, 146 .muxval = 1,
165 .cctl = 0,
166 .periph_buses = PL08X_AHB1, 147 .periph_buses = PL08X_AHB1,
167 }, { 148 }, {
168 .bus_id = "ras1_tx", 149 .bus_id = "ras1_tx",
169 .min_signal = 3, 150 .min_signal = 3,
170 .max_signal = 3, 151 .max_signal = 3,
171 .muxval = 1, 152 .muxval = 1,
172 .cctl = 0,
173 .periph_buses = PL08X_AHB1, 153 .periph_buses = PL08X_AHB1,
174 }, { 154 }, {
175 .bus_id = "ras2_rx", 155 .bus_id = "ras2_rx",
176 .min_signal = 4, 156 .min_signal = 4,
177 .max_signal = 4, 157 .max_signal = 4,
178 .muxval = 1, 158 .muxval = 1,
179 .cctl = 0,
180 .periph_buses = PL08X_AHB1, 159 .periph_buses = PL08X_AHB1,
181 }, { 160 }, {
182 .bus_id = "ras2_tx", 161 .bus_id = "ras2_tx",
183 .min_signal = 5, 162 .min_signal = 5,
184 .max_signal = 5, 163 .max_signal = 5,
185 .muxval = 1, 164 .muxval = 1,
186 .cctl = 0,
187 .periph_buses = PL08X_AHB1, 165 .periph_buses = PL08X_AHB1,
188 }, { 166 }, {
189 .bus_id = "ras3_rx", 167 .bus_id = "ras3_rx",
190 .min_signal = 6, 168 .min_signal = 6,
191 .max_signal = 6, 169 .max_signal = 6,
192 .muxval = 1, 170 .muxval = 1,
193 .cctl = 0,
194 .periph_buses = PL08X_AHB1, 171 .periph_buses = PL08X_AHB1,
195 }, { 172 }, {
196 .bus_id = "ras3_tx", 173 .bus_id = "ras3_tx",
197 .min_signal = 7, 174 .min_signal = 7,
198 .max_signal = 7, 175 .max_signal = 7,
199 .muxval = 1, 176 .muxval = 1,
200 .cctl = 0,
201 .periph_buses = PL08X_AHB1, 177 .periph_buses = PL08X_AHB1,
202 }, { 178 }, {
203 .bus_id = "ras4_rx", 179 .bus_id = "ras4_rx",
204 .min_signal = 8, 180 .min_signal = 8,
205 .max_signal = 8, 181 .max_signal = 8,
206 .muxval = 1, 182 .muxval = 1,
207 .cctl = 0,
208 .periph_buses = PL08X_AHB1, 183 .periph_buses = PL08X_AHB1,
209 }, { 184 }, {
210 .bus_id = "ras4_tx", 185 .bus_id = "ras4_tx",
211 .min_signal = 9, 186 .min_signal = 9,
212 .max_signal = 9, 187 .max_signal = 9,
213 .muxval = 1, 188 .muxval = 1,
214 .cctl = 0,
215 .periph_buses = PL08X_AHB1, 189 .periph_buses = PL08X_AHB1,
216 }, { 190 }, {
217 .bus_id = "ras5_rx", 191 .bus_id = "ras5_rx",
218 .min_signal = 10, 192 .min_signal = 10,
219 .max_signal = 10, 193 .max_signal = 10,
220 .muxval = 1, 194 .muxval = 1,
221 .cctl = 0,
222 .periph_buses = PL08X_AHB1, 195 .periph_buses = PL08X_AHB1,
223 }, { 196 }, {
224 .bus_id = "ras5_tx", 197 .bus_id = "ras5_tx",
225 .min_signal = 11, 198 .min_signal = 11,
226 .max_signal = 11, 199 .max_signal = 11,
227 .muxval = 1, 200 .muxval = 1,
228 .cctl = 0,
229 .periph_buses = PL08X_AHB1, 201 .periph_buses = PL08X_AHB1,
230 }, { 202 }, {
231 .bus_id = "ras6_rx", 203 .bus_id = "ras6_rx",
232 .min_signal = 12, 204 .min_signal = 12,
233 .max_signal = 12, 205 .max_signal = 12,
234 .muxval = 1, 206 .muxval = 1,
235 .cctl = 0,
236 .periph_buses = PL08X_AHB1, 207 .periph_buses = PL08X_AHB1,
237 }, { 208 }, {
238 .bus_id = "ras6_tx", 209 .bus_id = "ras6_tx",
239 .min_signal = 13, 210 .min_signal = 13,
240 .max_signal = 13, 211 .max_signal = 13,
241 .muxval = 1, 212 .muxval = 1,
242 .cctl = 0,
243 .periph_buses = PL08X_AHB1, 213 .periph_buses = PL08X_AHB1,
244 }, { 214 }, {
245 .bus_id = "ras7_rx", 215 .bus_id = "ras7_rx",
246 .min_signal = 14, 216 .min_signal = 14,
247 .max_signal = 14, 217 .max_signal = 14,
248 .muxval = 1, 218 .muxval = 1,
249 .cctl = 0,
250 .periph_buses = PL08X_AHB1, 219 .periph_buses = PL08X_AHB1,
251 }, { 220 }, {
252 .bus_id = "ras7_tx", 221 .bus_id = "ras7_tx",
253 .min_signal = 15, 222 .min_signal = 15,
254 .max_signal = 15, 223 .max_signal = 15,
255 .muxval = 1, 224 .muxval = 1,
256 .cctl = 0,
257 .periph_buses = PL08X_AHB1, 225 .periph_buses = PL08X_AHB1,
258 }, { 226 }, {
259 .bus_id = "ext0_rx", 227 .bus_id = "ext0_rx",
260 .min_signal = 0, 228 .min_signal = 0,
261 .max_signal = 0, 229 .max_signal = 0,
262 .muxval = 2, 230 .muxval = 2,
263 .cctl = 0,
264 .periph_buses = PL08X_AHB2, 231 .periph_buses = PL08X_AHB2,
265 }, { 232 }, {
266 .bus_id = "ext0_tx", 233 .bus_id = "ext0_tx",
267 .min_signal = 1, 234 .min_signal = 1,
268 .max_signal = 1, 235 .max_signal = 1,
269 .muxval = 2, 236 .muxval = 2,
270 .cctl = 0,
271 .periph_buses = PL08X_AHB2, 237 .periph_buses = PL08X_AHB2,
272 }, { 238 }, {
273 .bus_id = "ext1_rx", 239 .bus_id = "ext1_rx",
274 .min_signal = 2, 240 .min_signal = 2,
275 .max_signal = 2, 241 .max_signal = 2,
276 .muxval = 2, 242 .muxval = 2,
277 .cctl = 0,
278 .periph_buses = PL08X_AHB2, 243 .periph_buses = PL08X_AHB2,
279 }, { 244 }, {
280 .bus_id = "ext1_tx", 245 .bus_id = "ext1_tx",
281 .min_signal = 3, 246 .min_signal = 3,
282 .max_signal = 3, 247 .max_signal = 3,
283 .muxval = 2, 248 .muxval = 2,
284 .cctl = 0,
285 .periph_buses = PL08X_AHB2, 249 .periph_buses = PL08X_AHB2,
286 }, { 250 }, {
287 .bus_id = "ext2_rx", 251 .bus_id = "ext2_rx",
288 .min_signal = 4, 252 .min_signal = 4,
289 .max_signal = 4, 253 .max_signal = 4,
290 .muxval = 2, 254 .muxval = 2,
291 .cctl = 0,
292 .periph_buses = PL08X_AHB2, 255 .periph_buses = PL08X_AHB2,
293 }, { 256 }, {
294 .bus_id = "ext2_tx", 257 .bus_id = "ext2_tx",
295 .min_signal = 5, 258 .min_signal = 5,
296 .max_signal = 5, 259 .max_signal = 5,
297 .muxval = 2, 260 .muxval = 2,
298 .cctl = 0,
299 .periph_buses = PL08X_AHB2, 261 .periph_buses = PL08X_AHB2,
300 }, { 262 }, {
301 .bus_id = "ext3_rx", 263 .bus_id = "ext3_rx",
302 .min_signal = 6, 264 .min_signal = 6,
303 .max_signal = 6, 265 .max_signal = 6,
304 .muxval = 2, 266 .muxval = 2,
305 .cctl = 0,
306 .periph_buses = PL08X_AHB2, 267 .periph_buses = PL08X_AHB2,
307 }, { 268 }, {
308 .bus_id = "ext3_tx", 269 .bus_id = "ext3_tx",
309 .min_signal = 7, 270 .min_signal = 7,
310 .max_signal = 7, 271 .max_signal = 7,
311 .muxval = 2, 272 .muxval = 2,
312 .cctl = 0,
313 .periph_buses = PL08X_AHB2, 273 .periph_buses = PL08X_AHB2,
314 }, { 274 }, {
315 .bus_id = "ext4_rx", 275 .bus_id = "ext4_rx",
316 .min_signal = 8, 276 .min_signal = 8,
317 .max_signal = 8, 277 .max_signal = 8,
318 .muxval = 2, 278 .muxval = 2,
319 .cctl = 0,
320 .periph_buses = PL08X_AHB2, 279 .periph_buses = PL08X_AHB2,
321 }, { 280 }, {
322 .bus_id = "ext4_tx", 281 .bus_id = "ext4_tx",
323 .min_signal = 9, 282 .min_signal = 9,
324 .max_signal = 9, 283 .max_signal = 9,
325 .muxval = 2, 284 .muxval = 2,
326 .cctl = 0,
327 .periph_buses = PL08X_AHB2, 285 .periph_buses = PL08X_AHB2,
328 }, { 286 }, {
329 .bus_id = "ext5_rx", 287 .bus_id = "ext5_rx",
330 .min_signal = 10, 288 .min_signal = 10,
331 .max_signal = 10, 289 .max_signal = 10,
332 .muxval = 2, 290 .muxval = 2,
333 .cctl = 0,
334 .periph_buses = PL08X_AHB2, 291 .periph_buses = PL08X_AHB2,
335 }, { 292 }, {
336 .bus_id = "ext5_tx", 293 .bus_id = "ext5_tx",
337 .min_signal = 11, 294 .min_signal = 11,
338 .max_signal = 11, 295 .max_signal = 11,
339 .muxval = 2, 296 .muxval = 2,
340 .cctl = 0,
341 .periph_buses = PL08X_AHB2, 297 .periph_buses = PL08X_AHB2,
342 }, { 298 }, {
343 .bus_id = "ext6_rx", 299 .bus_id = "ext6_rx",
344 .min_signal = 12, 300 .min_signal = 12,
345 .max_signal = 12, 301 .max_signal = 12,
346 .muxval = 2, 302 .muxval = 2,
347 .cctl = 0,
348 .periph_buses = PL08X_AHB2, 303 .periph_buses = PL08X_AHB2,
349 }, { 304 }, {
350 .bus_id = "ext6_tx", 305 .bus_id = "ext6_tx",
351 .min_signal = 13, 306 .min_signal = 13,
352 .max_signal = 13, 307 .max_signal = 13,
353 .muxval = 2, 308 .muxval = 2,
354 .cctl = 0,
355 .periph_buses = PL08X_AHB2, 309 .periph_buses = PL08X_AHB2,
356 }, { 310 }, {
357 .bus_id = "ext7_rx", 311 .bus_id = "ext7_rx",
358 .min_signal = 14, 312 .min_signal = 14,
359 .max_signal = 14, 313 .max_signal = 14,
360 .muxval = 2, 314 .muxval = 2,
361 .cctl = 0,
362 .periph_buses = PL08X_AHB2, 315 .periph_buses = PL08X_AHB2,
363 }, { 316 }, {
364 .bus_id = "ext7_tx", 317 .bus_id = "ext7_tx",
365 .min_signal = 15, 318 .min_signal = 15,
366 .max_signal = 15, 319 .max_signal = 15,
367 .muxval = 2, 320 .muxval = 2,
368 .cctl = 0,
369 .periph_buses = PL08X_AHB2, 321 .periph_buses = PL08X_AHB2,
370 }, 322 },
371}; 323};
@@ -373,7 +325,8 @@ static struct pl08x_channel_data spear600_dma_info[] = {
373struct pl08x_platform_data pl080_plat_data = { 325struct pl08x_platform_data pl080_plat_data = {
374 .memcpy_channel = { 326 .memcpy_channel = {
375 .bus_id = "memcpy", 327 .bus_id = "memcpy",
376 .cctl = (PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | \ 328 .cctl_memcpy =
329 (PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | \
377 PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT | \ 330 PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT | \
378 PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | \ 331 PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | \
379 PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | \ 332 PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | \
diff --git a/arch/arm/mach-tegra/board-harmony-power.c b/arch/arm/mach-tegra/board-harmony-power.c
index 8fd387bf31f0..b7344beec102 100644
--- a/arch/arm/mach-tegra/board-harmony-power.c
+++ b/arch/arm/mach-tegra/board-harmony-power.c
@@ -51,7 +51,7 @@ static struct regulator_init_data ldo0_data = {
51 .consumer_supplies = tps658621_ldo0_supply, 51 .consumer_supplies = tps658621_ldo0_supply,
52}; 52};
53 53
54#define HARMONY_REGULATOR_INIT(_id, _name, _supply, _minmv, _maxmv) \ 54#define HARMONY_REGULATOR_INIT(_id, _name, _supply, _minmv, _maxmv, _on)\
55 static struct regulator_init_data _id##_data = { \ 55 static struct regulator_init_data _id##_data = { \
56 .supply_regulator = _supply, \ 56 .supply_regulator = _supply, \
57 .constraints = { \ 57 .constraints = { \
@@ -63,21 +63,22 @@ static struct regulator_init_data ldo0_data = {
63 .valid_ops_mask = (REGULATOR_CHANGE_MODE | \ 63 .valid_ops_mask = (REGULATOR_CHANGE_MODE | \
64 REGULATOR_CHANGE_STATUS | \ 64 REGULATOR_CHANGE_STATUS | \
65 REGULATOR_CHANGE_VOLTAGE), \ 65 REGULATOR_CHANGE_VOLTAGE), \
66 .always_on = _on, \
66 }, \ 67 }, \
67 } 68 }
68 69
69HARMONY_REGULATOR_INIT(sm0, "vdd_sm0", "vdd_sys", 725, 1500); 70HARMONY_REGULATOR_INIT(sm0, "vdd_sm0", "vdd_sys", 725, 1500, 1);
70HARMONY_REGULATOR_INIT(sm1, "vdd_sm1", "vdd_sys", 725, 1500); 71HARMONY_REGULATOR_INIT(sm1, "vdd_sm1", "vdd_sys", 725, 1500, 1);
71HARMONY_REGULATOR_INIT(sm2, "vdd_sm2", "vdd_sys", 3000, 4550); 72HARMONY_REGULATOR_INIT(sm2, "vdd_sm2", "vdd_sys", 3000, 4550, 1);
72HARMONY_REGULATOR_INIT(ldo1, "vdd_ldo1", "vdd_sm2", 725, 1500); 73HARMONY_REGULATOR_INIT(ldo1, "vdd_ldo1", "vdd_sm2", 725, 1500, 1);
73HARMONY_REGULATOR_INIT(ldo2, "vdd_ldo2", "vdd_sm2", 725, 1500); 74HARMONY_REGULATOR_INIT(ldo2, "vdd_ldo2", "vdd_sm2", 725, 1500, 0);
74HARMONY_REGULATOR_INIT(ldo3, "vdd_ldo3", "vdd_sm2", 1250, 3300); 75HARMONY_REGULATOR_INIT(ldo3, "vdd_ldo3", "vdd_sm2", 1250, 3300, 1);
75HARMONY_REGULATOR_INIT(ldo4, "vdd_ldo4", "vdd_sm2", 1700, 2475); 76HARMONY_REGULATOR_INIT(ldo4, "vdd_ldo4", "vdd_sm2", 1700, 2475, 1);
76HARMONY_REGULATOR_INIT(ldo5, "vdd_ldo5", NULL, 1250, 3300); 77HARMONY_REGULATOR_INIT(ldo5, "vdd_ldo5", NULL, 1250, 3300, 1);
77HARMONY_REGULATOR_INIT(ldo6, "vdd_ldo6", "vdd_sm2", 1250, 3300); 78HARMONY_REGULATOR_INIT(ldo6, "vdd_ldo6", "vdd_sm2", 1250, 3300, 0);
78HARMONY_REGULATOR_INIT(ldo7, "vdd_ldo7", "vdd_sm2", 1250, 3300); 79HARMONY_REGULATOR_INIT(ldo7, "vdd_ldo7", "vdd_sm2", 1250, 3300, 0);
79HARMONY_REGULATOR_INIT(ldo8, "vdd_ldo8", "vdd_sm2", 1250, 3300); 80HARMONY_REGULATOR_INIT(ldo8, "vdd_ldo8", "vdd_sm2", 1250, 3300, 0);
80HARMONY_REGULATOR_INIT(ldo9, "vdd_ldo9", "vdd_sm2", 1250, 3300); 81HARMONY_REGULATOR_INIT(ldo9, "vdd_ldo9", "vdd_sm2", 1250, 3300, 1);
81 82
82#define TPS_REG(_id, _data) \ 83#define TPS_REG(_id, _data) \
83 { \ 84 { \
@@ -119,9 +120,10 @@ static struct i2c_board_info __initdata harmony_regulators[] = {
119 120
120int __init harmony_regulator_init(void) 121int __init harmony_regulator_init(void)
121{ 122{
123 regulator_register_always_on(0, "vdd_sys",
124 NULL, 0, 5000000);
125
122 if (machine_is_harmony()) { 126 if (machine_is_harmony()) {
123 regulator_register_always_on(0, "vdd_sys",
124 NULL, 0, 5000000);
125 i2c_register_board_info(3, harmony_regulators, 1); 127 i2c_register_board_info(3, harmony_regulators, 1);
126 } else { /* Harmony, booted using device tree */ 128 } else { /* Harmony, booted using device tree */
127 struct device_node *np; 129 struct device_node *np;
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index c2cdf6500f75..4e7d1182e8a3 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -358,7 +358,7 @@ void __init dma_contiguous_remap(void)
358 if (end > arm_lowmem_limit) 358 if (end > arm_lowmem_limit)
359 end = arm_lowmem_limit; 359 end = arm_lowmem_limit;
360 if (start >= end) 360 if (start >= end)
361 return; 361 continue;
362 362
363 map.pfn = __phys_to_pfn(start); 363 map.pfn = __phys_to_pfn(start);
364 map.virtual = __phys_to_virt(start); 364 map.virtual = __phys_to_virt(start);
@@ -423,7 +423,7 @@ static void *__alloc_from_pool(size_t size, struct page **ret_page)
423 unsigned int pageno; 423 unsigned int pageno;
424 unsigned long flags; 424 unsigned long flags;
425 void *ptr = NULL; 425 void *ptr = NULL;
426 size_t align; 426 unsigned long align_mask;
427 427
428 if (!pool->vaddr) { 428 if (!pool->vaddr) {
429 WARN(1, "coherent pool not initialised!\n"); 429 WARN(1, "coherent pool not initialised!\n");
@@ -435,11 +435,11 @@ static void *__alloc_from_pool(size_t size, struct page **ret_page)
435 * small, so align them to their order in pages, minimum is a page 435 * small, so align them to their order in pages, minimum is a page
436 * size. This helps reduce fragmentation of the DMA space. 436 * size. This helps reduce fragmentation of the DMA space.
437 */ 437 */
438 align = PAGE_SIZE << get_order(size); 438 align_mask = (1 << get_order(size)) - 1;
439 439
440 spin_lock_irqsave(&pool->lock, flags); 440 spin_lock_irqsave(&pool->lock, flags);
441 pageno = bitmap_find_next_zero_area(pool->bitmap, pool->nr_pages, 441 pageno = bitmap_find_next_zero_area(pool->bitmap, pool->nr_pages,
442 0, count, (1 << align) - 1); 442 0, count, align_mask);
443 if (pageno < pool->nr_pages) { 443 if (pageno < pool->nr_pages) {
444 bitmap_set(pool->bitmap, pageno, count); 444 bitmap_set(pool->bitmap, pageno, count);
445 ptr = pool->vaddr + PAGE_SIZE * pageno; 445 ptr = pool->vaddr + PAGE_SIZE * pageno;
@@ -648,12 +648,12 @@ void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
648 648
649 if (arch_is_coherent() || nommu()) { 649 if (arch_is_coherent() || nommu()) {
650 __dma_free_buffer(page, size); 650 __dma_free_buffer(page, size);
651 } else if (__free_from_pool(cpu_addr, size)) {
652 return;
651 } else if (!IS_ENABLED(CONFIG_CMA)) { 653 } else if (!IS_ENABLED(CONFIG_CMA)) {
652 __dma_free_remap(cpu_addr, size); 654 __dma_free_remap(cpu_addr, size);
653 __dma_free_buffer(page, size); 655 __dma_free_buffer(page, size);
654 } else { 656 } else {
655 if (__free_from_pool(cpu_addr, size))
656 return;
657 /* 657 /*
658 * Non-atomic allocations cannot be freed with IRQs disabled 658 * Non-atomic allocations cannot be freed with IRQs disabled
659 */ 659 */
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 77458548e031..40ca11ed6e5f 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -231,8 +231,6 @@ void __sync_icache_dcache(pte_t pteval)
231 struct page *page; 231 struct page *page;
232 struct address_space *mapping; 232 struct address_space *mapping;
233 233
234 if (!pte_present_user(pteval))
235 return;
236 if (cache_is_vipt_nonaliasing() && !pte_exec(pteval)) 234 if (cache_is_vipt_nonaliasing() && !pte_exec(pteval))
237 /* only flush non-aliasing VIPT caches for exec mappings */ 235 /* only flush non-aliasing VIPT caches for exec mappings */
238 return; 236 return;
diff --git a/arch/arm/mm/tlb-v7.S b/arch/arm/mm/tlb-v7.S
index 845f461f8ec1..ea94765acf9a 100644
--- a/arch/arm/mm/tlb-v7.S
+++ b/arch/arm/mm/tlb-v7.S
@@ -39,10 +39,18 @@ ENTRY(v7wbi_flush_user_tlb_range)
39 mov r0, r0, lsr #PAGE_SHIFT @ align address 39 mov r0, r0, lsr #PAGE_SHIFT @ align address
40 mov r1, r1, lsr #PAGE_SHIFT 40 mov r1, r1, lsr #PAGE_SHIFT
41 asid r3, r3 @ mask ASID 41 asid r3, r3 @ mask ASID
42#ifdef CONFIG_ARM_ERRATA_720789
43 ALT_SMP(W(mov) r3, #0 )
44 ALT_UP(W(nop) )
45#endif
42 orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA 46 orr r0, r3, r0, lsl #PAGE_SHIFT @ Create initial MVA
43 mov r1, r1, lsl #PAGE_SHIFT 47 mov r1, r1, lsl #PAGE_SHIFT
441: 481:
49#ifdef CONFIG_ARM_ERRATA_720789
50 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
51#else
45 ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable) 52 ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable)
53#endif
46 ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA 54 ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA
47 55
48 add r0, r0, #PAGE_SZ 56 add r0, r0, #PAGE_SZ
@@ -67,7 +75,11 @@ ENTRY(v7wbi_flush_kern_tlb_range)
67 mov r0, r0, lsl #PAGE_SHIFT 75 mov r0, r0, lsl #PAGE_SHIFT
68 mov r1, r1, lsl #PAGE_SHIFT 76 mov r1, r1, lsl #PAGE_SHIFT
691: 771:
78#ifdef CONFIG_ARM_ERRATA_720789
79 ALT_SMP(mcr p15, 0, r0, c8, c3, 3) @ TLB invalidate U MVA all ASID (shareable)
80#else
70 ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable) 81 ALT_SMP(mcr p15, 0, r0, c8, c3, 1) @ TLB invalidate U MVA (shareable)
82#endif
71 ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA 83 ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA
72 add r0, r0, #PAGE_SZ 84 add r0, r0, #PAGE_SZ
73 cmp r0, r1 85 cmp r0, r1
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c
index c2193178210b..3ed1adbc09f8 100644
--- a/arch/arm/plat-mxc/tzic.c
+++ b/arch/arm/plat-mxc/tzic.c
@@ -23,6 +23,7 @@
23 23
24#include <mach/hardware.h> 24#include <mach/hardware.h>
25#include <mach/common.h> 25#include <mach/common.h>
26#include <mach/irqs.h>
26 27
27#include "irq-common.h" 28#include "irq-common.h"
28 29
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index 5493bd95da5e..eb3e4d555343 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -81,8 +81,6 @@ struct omap_mmc_platform_data {
81 /* Return context loss count due to PM states changing */ 81 /* Return context loss count due to PM states changing */
82 int (*get_context_loss_count)(struct device *dev); 82 int (*get_context_loss_count)(struct device *dev);
83 83
84 u64 dma_mask;
85
86 /* Integrating attributes from the omap_hwmod layer */ 84 /* Integrating attributes from the omap_hwmod layer */
87 u8 controller_flags; 85 u8 controller_flags;
88 86
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index c1793786aea9..d245a87dc014 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -47,6 +47,7 @@ void __init orion_clkdev_init(struct clk *tclk)
47 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk); 47 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk);
48 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk); 48 orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk);
49 orion_clkdev_add(NULL, "orion_wdt", tclk); 49 orion_clkdev_add(NULL, "orion_wdt", tclk);
50 orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", tclk);
50} 51}
51 52
52/* Fill in the resources structure and link it into the platform 53/* Fill in the resources structure and link it into the platform
diff --git a/arch/arm/plat-orion/gpio.c b/arch/arm/plat-orion/gpio.c
index af95af257301..dfda74fae6f2 100644
--- a/arch/arm/plat-orion/gpio.c
+++ b/arch/arm/plat-orion/gpio.c
@@ -8,15 +8,22 @@
8 * warranty of any kind, whether express or implied. 8 * warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11#define DEBUG
12
11#include <linux/kernel.h> 13#include <linux/kernel.h>
12#include <linux/init.h> 14#include <linux/init.h>
13#include <linux/irq.h> 15#include <linux/irq.h>
16#include <linux/irqdomain.h>
14#include <linux/module.h> 17#include <linux/module.h>
15#include <linux/spinlock.h> 18#include <linux/spinlock.h>
16#include <linux/bitops.h> 19#include <linux/bitops.h>
17#include <linux/io.h> 20#include <linux/io.h>
18#include <linux/gpio.h> 21#include <linux/gpio.h>
19#include <linux/leds.h> 22#include <linux/leds.h>
23#include <linux/of.h>
24#include <linux/of_irq.h>
25#include <linux/of_address.h>
26#include <plat/gpio.h>
20 27
21/* 28/*
22 * GPIO unit register offsets. 29 * GPIO unit register offsets.
@@ -38,6 +45,7 @@ struct orion_gpio_chip {
38 unsigned long valid_output; 45 unsigned long valid_output;
39 int mask_offset; 46 int mask_offset;
40 int secondary_irq_base; 47 int secondary_irq_base;
48 struct irq_domain *domain;
41}; 49};
42 50
43static void __iomem *GPIO_OUT(struct orion_gpio_chip *ochip) 51static void __iomem *GPIO_OUT(struct orion_gpio_chip *ochip)
@@ -222,10 +230,10 @@ static int orion_gpio_to_irq(struct gpio_chip *chip, unsigned pin)
222 struct orion_gpio_chip *ochip = 230 struct orion_gpio_chip *ochip =
223 container_of(chip, struct orion_gpio_chip, chip); 231 container_of(chip, struct orion_gpio_chip, chip);
224 232
225 return ochip->secondary_irq_base + pin; 233 return irq_create_mapping(ochip->domain,
234 ochip->secondary_irq_base + pin);
226} 235}
227 236
228
229/* 237/*
230 * Orion-specific GPIO API extensions. 238 * Orion-specific GPIO API extensions.
231 */ 239 */
@@ -353,12 +361,10 @@ static int gpio_irq_set_type(struct irq_data *d, u32 type)
353 int pin; 361 int pin;
354 u32 u; 362 u32 u;
355 363
356 pin = d->irq - gc->irq_base; 364 pin = d->hwirq - ochip->secondary_irq_base;
357 365
358 u = readl(GPIO_IO_CONF(ochip)) & (1 << pin); 366 u = readl(GPIO_IO_CONF(ochip)) & (1 << pin);
359 if (!u) { 367 if (!u) {
360 printk(KERN_ERR "orion gpio_irq_set_type failed "
361 "(irq %d, pin %d).\n", d->irq, pin);
362 return -EINVAL; 368 return -EINVAL;
363 } 369 }
364 370
@@ -397,17 +403,53 @@ static int gpio_irq_set_type(struct irq_data *d, u32 type)
397 u &= ~(1 << pin); /* rising */ 403 u &= ~(1 << pin); /* rising */
398 writel(u, GPIO_IN_POL(ochip)); 404 writel(u, GPIO_IN_POL(ochip));
399 } 405 }
400
401 return 0; 406 return 0;
402} 407}
403 408
404void __init orion_gpio_init(int gpio_base, int ngpio, 409static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
405 u32 base, int mask_offset, int secondary_irq_base) 410{
411 struct orion_gpio_chip *ochip = irq_get_handler_data(irq);
412 u32 cause, type;
413 int i;
414
415 if (ochip == NULL)
416 return;
417
418 cause = readl(GPIO_DATA_IN(ochip)) & readl(GPIO_LEVEL_MASK(ochip));
419 cause |= readl(GPIO_EDGE_CAUSE(ochip)) & readl(GPIO_EDGE_MASK(ochip));
420
421 for (i = 0; i < ochip->chip.ngpio; i++) {
422 int irq;
423
424 irq = ochip->secondary_irq_base + i;
425
426 if (!(cause & (1 << i)))
427 continue;
428
429 type = irqd_get_trigger_type(irq_get_irq_data(irq));
430 if ((type & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) {
431 /* Swap polarity (race with GPIO line) */
432 u32 polarity;
433
434 polarity = readl(GPIO_IN_POL(ochip));
435 polarity ^= 1 << i;
436 writel(polarity, GPIO_IN_POL(ochip));
437 }
438 generic_handle_irq(irq);
439 }
440}
441
442void __init orion_gpio_init(struct device_node *np,
443 int gpio_base, int ngpio,
444 void __iomem *base, int mask_offset,
445 int secondary_irq_base,
446 int irqs[4])
406{ 447{
407 struct orion_gpio_chip *ochip; 448 struct orion_gpio_chip *ochip;
408 struct irq_chip_generic *gc; 449 struct irq_chip_generic *gc;
409 struct irq_chip_type *ct; 450 struct irq_chip_type *ct;
410 char gc_label[16]; 451 char gc_label[16];
452 int i;
411 453
412 if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips)) 454 if (orion_gpio_chip_count == ARRAY_SIZE(orion_gpio_chips))
413 return; 455 return;
@@ -426,6 +468,10 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
426 ochip->chip.base = gpio_base; 468 ochip->chip.base = gpio_base;
427 ochip->chip.ngpio = ngpio; 469 ochip->chip.ngpio = ngpio;
428 ochip->chip.can_sleep = 0; 470 ochip->chip.can_sleep = 0;
471#ifdef CONFIG_OF
472 ochip->chip.of_node = np;
473#endif
474
429 spin_lock_init(&ochip->lock); 475 spin_lock_init(&ochip->lock);
430 ochip->base = (void __iomem *)base; 476 ochip->base = (void __iomem *)base;
431 ochip->valid_input = 0; 477 ochip->valid_input = 0;
@@ -435,8 +481,6 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
435 481
436 gpiochip_add(&ochip->chip); 482 gpiochip_add(&ochip->chip);
437 483
438 orion_gpio_chip_count++;
439
440 /* 484 /*
441 * Mask and clear GPIO interrupts. 485 * Mask and clear GPIO interrupts.
442 */ 486 */
@@ -444,16 +488,28 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
444 writel(0, GPIO_EDGE_MASK(ochip)); 488 writel(0, GPIO_EDGE_MASK(ochip));
445 writel(0, GPIO_LEVEL_MASK(ochip)); 489 writel(0, GPIO_LEVEL_MASK(ochip));
446 490
447 gc = irq_alloc_generic_chip("orion_gpio_irq", 2, secondary_irq_base, 491 /* Setup the interrupt handlers. Each chip can have up to 4
492 * interrupt handlers, with each handler dealing with 8 GPIO
493 * pins. */
494
495 for (i = 0; i < 4; i++) {
496 if (irqs[i]) {
497 irq_set_handler_data(irqs[i], ochip);
498 irq_set_chained_handler(irqs[i], gpio_irq_handler);
499 }
500 }
501
502 gc = irq_alloc_generic_chip("orion_gpio_irq", 2,
503 secondary_irq_base,
448 ochip->base, handle_level_irq); 504 ochip->base, handle_level_irq);
449 gc->private = ochip; 505 gc->private = ochip;
450
451 ct = gc->chip_types; 506 ct = gc->chip_types;
452 ct->regs.mask = ochip->mask_offset + GPIO_LEVEL_MASK_OFF; 507 ct->regs.mask = ochip->mask_offset + GPIO_LEVEL_MASK_OFF;
453 ct->type = IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW; 508 ct->type = IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW;
454 ct->chip.irq_mask = irq_gc_mask_clr_bit; 509 ct->chip.irq_mask = irq_gc_mask_clr_bit;
455 ct->chip.irq_unmask = irq_gc_mask_set_bit; 510 ct->chip.irq_unmask = irq_gc_mask_set_bit;
456 ct->chip.irq_set_type = gpio_irq_set_type; 511 ct->chip.irq_set_type = gpio_irq_set_type;
512 ct->chip.name = ochip->chip.label;
457 513
458 ct++; 514 ct++;
459 ct->regs.mask = ochip->mask_offset + GPIO_EDGE_MASK_OFF; 515 ct->regs.mask = ochip->mask_offset + GPIO_EDGE_MASK_OFF;
@@ -464,41 +520,69 @@ void __init orion_gpio_init(int gpio_base, int ngpio,
464 ct->chip.irq_unmask = irq_gc_mask_set_bit; 520 ct->chip.irq_unmask = irq_gc_mask_set_bit;
465 ct->chip.irq_set_type = gpio_irq_set_type; 521 ct->chip.irq_set_type = gpio_irq_set_type;
466 ct->handler = handle_edge_irq; 522 ct->handler = handle_edge_irq;
523 ct->chip.name = ochip->chip.label;
467 524
468 irq_setup_generic_chip(gc, IRQ_MSK(ngpio), IRQ_GC_INIT_MASK_CACHE, 525 irq_setup_generic_chip(gc, IRQ_MSK(ngpio), IRQ_GC_INIT_MASK_CACHE,
469 IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE); 526 IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
470}
471 527
472void orion_gpio_irq_handler(int pinoff) 528 /* Setup irq domain on top of the generic chip. */
473{ 529 ochip->domain = irq_domain_add_legacy(np,
474 struct orion_gpio_chip *ochip; 530 ochip->chip.ngpio,
475 u32 cause, type; 531 ochip->secondary_irq_base,
476 int i; 532 ochip->secondary_irq_base,
477 533 &irq_domain_simple_ops,
478 ochip = orion_gpio_chip_find(pinoff); 534 ochip);
479 if (ochip == NULL) 535 if (!ochip->domain)
480 return; 536 panic("%s: couldn't allocate irq domain (DT).\n",
481 537 ochip->chip.label);
482 cause = readl(GPIO_DATA_IN(ochip)) & readl(GPIO_LEVEL_MASK(ochip));
483 cause |= readl(GPIO_EDGE_CAUSE(ochip)) & readl(GPIO_EDGE_MASK(ochip));
484
485 for (i = 0; i < ochip->chip.ngpio; i++) {
486 int irq;
487 538
488 irq = ochip->secondary_irq_base + i; 539 orion_gpio_chip_count++;
540}
489 541
490 if (!(cause & (1 << i))) 542#ifdef CONFIG_OF
491 continue; 543static void __init orion_gpio_of_init_one(struct device_node *np,
544 int irq_gpio_base)
545{
546 int ngpio, gpio_base, mask_offset;
547 void __iomem *base;
548 int ret, i;
549 int irqs[4];
550 int secondary_irq_base;
551
552 ret = of_property_read_u32(np, "ngpio", &ngpio);
553 if (ret)
554 goto out;
555 ret = of_property_read_u32(np, "mask-offset", &mask_offset);
556 if (ret == -EINVAL)
557 mask_offset = 0;
558 else
559 goto out;
560 base = of_iomap(np, 0);
561 if (!base)
562 goto out;
563
564 secondary_irq_base = irq_gpio_base + (32 * orion_gpio_chip_count);
565 gpio_base = 32 * orion_gpio_chip_count;
566
567 /* Get the interrupt numbers. Each chip can have up to 4
568 * interrupt handlers, with each handler dealing with 8 GPIO
569 * pins. */
570
571 for (i = 0; i < 4; i++)
572 irqs[i] = irq_of_parse_and_map(np, i);
573
574 orion_gpio_init(np, gpio_base, ngpio, base, mask_offset,
575 secondary_irq_base, irqs);
576 return;
577out:
578 pr_err("%s: %s: missing mandatory property\n", __func__, np->name);
579}
492 580
493 type = irqd_get_trigger_type(irq_get_irq_data(irq)); 581void __init orion_gpio_of_init(int irq_gpio_base)
494 if ((type & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) { 582{
495 /* Swap polarity (race with GPIO line) */ 583 struct device_node *np;
496 u32 polarity;
497 584
498 polarity = readl(GPIO_IN_POL(ochip)); 585 for_each_compatible_node(np, NULL, "marvell,orion-gpio")
499 polarity ^= 1 << i; 586 orion_gpio_of_init_one(np, irq_gpio_base);
500 writel(polarity, GPIO_IN_POL(ochip));
501 }
502 generic_handle_irq(irq);
503 }
504} 587}
588#endif
diff --git a/arch/arm/plat-orion/include/plat/gpio.h b/arch/arm/plat-orion/include/plat/gpio.h
index bec0c98ce41f..81c6fc8a7b28 100644
--- a/arch/arm/plat-orion/include/plat/gpio.h
+++ b/arch/arm/plat-orion/include/plat/gpio.h
@@ -13,7 +13,7 @@
13 13
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/types.h> 15#include <linux/types.h>
16 16#include <linux/irqdomain.h>
17/* 17/*
18 * Orion-specific GPIO API extensions. 18 * Orion-specific GPIO API extensions.
19 */ 19 */
@@ -27,13 +27,11 @@ int orion_gpio_led_blink_set(unsigned gpio, int state,
27void orion_gpio_set_valid(unsigned pin, int mode); 27void orion_gpio_set_valid(unsigned pin, int mode);
28 28
29/* Initialize gpiolib. */ 29/* Initialize gpiolib. */
30void __init orion_gpio_init(int gpio_base, int ngpio, 30void __init orion_gpio_init(struct device_node *np,
31 u32 base, int mask_offset, int secondary_irq_base); 31 int gpio_base, int ngpio,
32 32 void __iomem *base, int mask_offset,
33/* 33 int secondary_irq_base,
34 * GPIO interrupt handling. 34 int irq[4]);
35 */
36void orion_gpio_irq_handler(int irqoff);
37
38 35
36void __init orion_gpio_of_init(int irq_gpio_base);
39#endif 37#endif
diff --git a/arch/arm/plat-orion/include/plat/irq.h b/arch/arm/plat-orion/include/plat/irq.h
index f05eeab94968..50547e417936 100644
--- a/arch/arm/plat-orion/include/plat/irq.h
+++ b/arch/arm/plat-orion/include/plat/irq.h
@@ -12,6 +12,5 @@
12#define __PLAT_IRQ_H 12#define __PLAT_IRQ_H
13 13
14void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr); 14void orion_irq_init(unsigned int irq_start, void __iomem *maskaddr);
15 15void __init orion_dt_init_irq(void);
16
17#endif 16#endif
diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c
index 2d5b9c1ef389..d751964def4c 100644
--- a/arch/arm/plat-orion/irq.c
+++ b/arch/arm/plat-orion/irq.c
@@ -11,8 +11,12 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/irqdomain.h>
14#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/of_address.h>
17#include <linux/of_irq.h>
15#include <plat/irq.h> 18#include <plat/irq.h>
19#include <plat/gpio.h>
16 20
17void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) 21void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
18{ 22{
@@ -32,3 +36,39 @@ void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr)
32 irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE, 36 irq_setup_generic_chip(gc, IRQ_MSK(32), IRQ_GC_INIT_MASK_CACHE,
33 IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE); 37 IRQ_NOREQUEST, IRQ_LEVEL | IRQ_NOPROBE);
34} 38}
39
40#ifdef CONFIG_OF
41static int __init orion_add_irq_domain(struct device_node *np,
42 struct device_node *interrupt_parent)
43{
44 int i = 0, irq_gpio;
45 void __iomem *base;
46
47 do {
48 base = of_iomap(np, i);
49 if (base) {
50 orion_irq_init(i * 32, base);
51 i++;
52 }
53 } while (base);
54
55 irq_domain_add_legacy(np, i * 32, 0, 0,
56 &irq_domain_simple_ops, NULL);
57
58 irq_gpio = i * 32;
59 orion_gpio_of_init(irq_gpio);
60
61 return 0;
62}
63
64static const struct of_device_id orion_irq_match[] = {
65 { .compatible = "marvell,orion-intc",
66 .data = orion_add_irq_domain, },
67 {},
68};
69
70void __init orion_dt_init_irq(void)
71{
72 of_irq_init(orion_irq_match);
73}
74#endif
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 7aca31c1df1f..9c3b90c3538e 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -403,7 +403,8 @@ config S5P_DEV_USB_EHCI
403 403
404config S3C24XX_PWM 404config S3C24XX_PWM
405 bool "PWM device support" 405 bool "PWM device support"
406 select HAVE_PWM 406 select PWM
407 select PWM_SAMSUNG
407 help 408 help
408 Support for exporting the PWM timer blocks via the pwm device 409 Support for exporting the PWM timer blocks via the pwm device
409 system 410 system
diff --git a/arch/arm/plat-spear/include/plat/pl080.h b/arch/arm/plat-spear/include/plat/pl080.h
index 2bc6b54460a8..eb6590ded40d 100644
--- a/arch/arm/plat-spear/include/plat/pl080.h
+++ b/arch/arm/plat-spear/include/plat/pl080.h
@@ -14,8 +14,8 @@
14#ifndef __PLAT_PL080_H 14#ifndef __PLAT_PL080_H
15#define __PLAT_PL080_H 15#define __PLAT_PL080_H
16 16
17struct pl08x_dma_chan; 17struct pl08x_channel_data;
18int pl080_get_signal(struct pl08x_dma_chan *ch); 18int pl080_get_signal(const struct pl08x_channel_data *cd);
19void pl080_put_signal(struct pl08x_dma_chan *ch); 19void pl080_put_signal(const struct pl08x_channel_data *cd, int signal);
20 20
21#endif /* __PLAT_PL080_H */ 21#endif /* __PLAT_PL080_H */
diff --git a/arch/arm/plat-spear/pl080.c b/arch/arm/plat-spear/pl080.c
index 12cf27f935f9..cfa1199d0f4a 100644
--- a/arch/arm/plat-spear/pl080.c
+++ b/arch/arm/plat-spear/pl080.c
@@ -27,9 +27,8 @@ struct {
27 unsigned char val; 27 unsigned char val;
28} signals[16] = {{0, 0}, }; 28} signals[16] = {{0, 0}, };
29 29
30int pl080_get_signal(struct pl08x_dma_chan *ch) 30int pl080_get_signal(const struct pl08x_channel_data *cd)
31{ 31{
32 const struct pl08x_channel_data *cd = ch->cd;
33 unsigned int signal = cd->min_signal, val; 32 unsigned int signal = cd->min_signal, val;
34 unsigned long flags; 33 unsigned long flags;
35 34
@@ -63,18 +62,17 @@ int pl080_get_signal(struct pl08x_dma_chan *ch)
63 return signal; 62 return signal;
64} 63}
65 64
66void pl080_put_signal(struct pl08x_dma_chan *ch) 65void pl080_put_signal(const struct pl08x_channel_data *cd, int signal)
67{ 66{
68 const struct pl08x_channel_data *cd = ch->cd;
69 unsigned long flags; 67 unsigned long flags;
70 68
71 spin_lock_irqsave(&lock, flags); 69 spin_lock_irqsave(&lock, flags);
72 70
73 /* if signal is not used */ 71 /* if signal is not used */
74 if (!signals[cd->min_signal].busy) 72 if (!signals[signal].busy)
75 BUG(); 73 BUG();
76 74
77 signals[cd->min_signal].busy--; 75 signals[signal].busy--;
78 76
79 spin_unlock_irqrestore(&lock, flags); 77 spin_unlock_irqrestore(&lock, flags);
80} 78}
diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S
index 4fa9903b83cf..cc926c985981 100644
--- a/arch/arm/vfp/entry.S
+++ b/arch/arm/vfp/entry.S
@@ -7,18 +7,20 @@
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as 8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 *
11 * Basic entry code, called from the kernel's undefined instruction trap.
12 * r0 = faulted instruction
13 * r5 = faulted PC+4
14 * r9 = successful return
15 * r10 = thread_info structure
16 * lr = failure return
17 */ 10 */
18#include <asm/thread_info.h> 11#include <asm/thread_info.h>
19#include <asm/vfpmacros.h> 12#include <asm/vfpmacros.h>
20#include "../kernel/entry-header.S" 13#include "../kernel/entry-header.S"
21 14
15@ VFP entry point.
16@
17@ r0 = instruction opcode (32-bit ARM or two 16-bit Thumb)
18@ r2 = PC value to resume execution after successful emulation
19@ r9 = normal "successful" return address
20@ r10 = this threads thread_info structure
21@ lr = unrecognised instruction return address
22@ IRQs disabled.
23@
22ENTRY(do_vfp) 24ENTRY(do_vfp)
23#ifdef CONFIG_PREEMPT 25#ifdef CONFIG_PREEMPT
24 ldr r4, [r10, #TI_PREEMPT] @ get preempt count 26 ldr r4, [r10, #TI_PREEMPT] @ get preempt count
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index d50f0e486cf2..ea0349f63586 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
@@ -62,13 +62,13 @@
62 62
63@ VFP hardware support entry point. 63@ VFP hardware support entry point.
64@ 64@
65@ r0 = faulted instruction 65@ r0 = instruction opcode (32-bit ARM or two 16-bit Thumb)
66@ r2 = faulted PC+4 66@ r2 = PC value to resume execution after successful emulation
67@ r9 = successful return 67@ r9 = normal "successful" return address
68@ r10 = vfp_state union 68@ r10 = vfp_state union
69@ r11 = CPU number 69@ r11 = CPU number
70@ lr = failure return 70@ lr = unrecognised instruction return address
71 71@ IRQs enabled.
72ENTRY(vfp_support_entry) 72ENTRY(vfp_support_entry)
73 DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10 73 DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10
74 74
@@ -162,9 +162,12 @@ vfp_hw_state_valid:
162 @ exception before retrying branch 162 @ exception before retrying branch
163 @ out before setting an FPEXC that 163 @ out before setting an FPEXC that
164 @ stops us reading stuff 164 @ stops us reading stuff
165 VFPFMXR FPEXC, r1 @ restore FPEXC last 165 VFPFMXR FPEXC, r1 @ Restore FPEXC last
166 sub r2, r2, #4 166 sub r2, r2, #4 @ Retry current instruction - if Thumb
167 str r2, [sp, #S_PC] @ retry the instruction 167 str r2, [sp, #S_PC] @ mode it's two 16-bit instructions,
168 @ else it's one 32-bit instruction, so
169 @ always subtract 4 from the following
170 @ instruction address.
168#ifdef CONFIG_PREEMPT 171#ifdef CONFIG_PREEMPT
169 get_thread_info r10 172 get_thread_info r10
170 ldr r4, [r10, #TI_PREEMPT] @ get preempt count 173 ldr r4, [r10, #TI_PREEMPT] @ get preempt count
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
index 586961929e96..c834b32af275 100644
--- a/arch/arm/vfp/vfpmodule.c
+++ b/arch/arm/vfp/vfpmodule.c
@@ -457,10 +457,16 @@ static int vfp_pm_suspend(void)
457 457
458 /* disable, just in case */ 458 /* disable, just in case */
459 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); 459 fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN);
460 } else if (vfp_current_hw_state[ti->cpu]) {
461#ifndef CONFIG_SMP
462 fmxr(FPEXC, fpexc | FPEXC_EN);
463 vfp_save_state(vfp_current_hw_state[ti->cpu], fpexc);
464 fmxr(FPEXC, fpexc);
465#endif
460 } 466 }
461 467
462 /* clear any information we had about last context state */ 468 /* clear any information we had about last context state */
463 memset(vfp_current_hw_state, 0, sizeof(vfp_current_hw_state)); 469 vfp_current_hw_state[ti->cpu] = NULL;
464 470
465 return 0; 471 return 0;
466} 472}
@@ -713,8 +719,10 @@ static int __init vfp_init(void)
713 if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100) 719 if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100)
714 elf_hwcap |= HWCAP_NEON; 720 elf_hwcap |= HWCAP_NEON;
715#endif 721#endif
722#ifdef CONFIG_VFPv3
716 if ((fmrx(MVFR1) & 0xf0000000) == 0x10000000) 723 if ((fmrx(MVFR1) & 0xf0000000) == 0x10000000)
717 elf_hwcap |= HWCAP_VFPv4; 724 elf_hwcap |= HWCAP_VFPv4;
725#endif
718 } 726 }
719 } 727 }
720 return 0; 728 return 0;
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index ada8f0fc71e4..fb96e607adcf 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -52,7 +52,6 @@ EXPORT_SYMBOL(reserved_mem_dcache_on);
52#ifdef CONFIG_MTD_UCLINUX 52#ifdef CONFIG_MTD_UCLINUX
53extern struct map_info uclinux_ram_map; 53extern struct map_info uclinux_ram_map;
54unsigned long memory_mtd_end, memory_mtd_start, mtd_size; 54unsigned long memory_mtd_end, memory_mtd_start, mtd_size;
55unsigned long _ebss;
56EXPORT_SYMBOL(memory_mtd_end); 55EXPORT_SYMBOL(memory_mtd_end);
57EXPORT_SYMBOL(memory_mtd_start); 56EXPORT_SYMBOL(memory_mtd_start);
58EXPORT_SYMBOL(mtd_size); 57EXPORT_SYMBOL(mtd_size);
diff --git a/arch/c6x/Kconfig b/arch/c6x/Kconfig
index 052f81a76239..983c859e40b7 100644
--- a/arch/c6x/Kconfig
+++ b/arch/c6x/Kconfig
@@ -6,6 +6,7 @@
6config C6X 6config C6X
7 def_bool y 7 def_bool y
8 select CLKDEV_LOOKUP 8 select CLKDEV_LOOKUP
9 select GENERIC_ATOMIC64
9 select GENERIC_IRQ_SHOW 10 select GENERIC_IRQ_SHOW
10 select HAVE_ARCH_TRACEHOOK 11 select HAVE_ARCH_TRACEHOOK
11 select HAVE_DMA_API_DEBUG 12 select HAVE_DMA_API_DEBUG
diff --git a/arch/c6x/include/asm/cache.h b/arch/c6x/include/asm/cache.h
index 6d521d96d941..09c5a0f5f4d1 100644
--- a/arch/c6x/include/asm/cache.h
+++ b/arch/c6x/include/asm/cache.h
@@ -1,7 +1,7 @@
1/* 1/*
2 * Port on Texas Instruments TMS320C6x architecture 2 * Port on Texas Instruments TMS320C6x architecture
3 * 3 *
4 * Copyright (C) 2005, 2006, 2009, 2010 Texas Instruments Incorporated 4 * Copyright (C) 2005, 2006, 2009, 2010, 2012 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) 5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
@@ -16,9 +16,14 @@
16/* 16/*
17 * Cache line size 17 * Cache line size
18 */ 18 */
19#define L1D_CACHE_BYTES 64 19#define L1D_CACHE_SHIFT 6
20#define L1P_CACHE_BYTES 32 20#define L1D_CACHE_BYTES (1 << L1D_CACHE_SHIFT)
21#define L2_CACHE_BYTES 128 21
22#define L1P_CACHE_SHIFT 5
23#define L1P_CACHE_BYTES (1 << L1P_CACHE_SHIFT)
24
25#define L2_CACHE_SHIFT 7
26#define L2_CACHE_BYTES (1 << L2_CACHE_SHIFT)
22 27
23/* 28/*
24 * L2 used as cache 29 * L2 used as cache
@@ -29,7 +34,8 @@
29 * For practical reasons the L1_CACHE_BYTES defines should not be smaller than 34 * For practical reasons the L1_CACHE_BYTES defines should not be smaller than
30 * the L2 line size 35 * the L2 line size
31 */ 36 */
32#define L1_CACHE_BYTES L2_CACHE_BYTES 37#define L1_CACHE_SHIFT L2_CACHE_SHIFT
38#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
33 39
34#define L2_CACHE_ALIGN_LOW(x) \ 40#define L2_CACHE_ALIGN_LOW(x) \
35 (((x) & ~(L2_CACHE_BYTES - 1))) 41 (((x) & ~(L2_CACHE_BYTES - 1)))
diff --git a/arch/ia64/configs/generic_defconfig b/arch/ia64/configs/generic_defconfig
index 954d81e2e837..7913695b2fcb 100644
--- a/arch/ia64/configs/generic_defconfig
+++ b/arch/ia64/configs/generic_defconfig
@@ -234,5 +234,4 @@ CONFIG_CRYPTO_PCBC=m
234CONFIG_CRYPTO_MD5=y 234CONFIG_CRYPTO_MD5=y
235# CONFIG_CRYPTO_ANSI_CPRNG is not set 235# CONFIG_CRYPTO_ANSI_CPRNG is not set
236CONFIG_CRC_T10DIF=y 236CONFIG_CRC_T10DIF=y
237CONFIG_MISC_DEVICES=y
238CONFIG_INTEL_IOMMU=y 237CONFIG_INTEL_IOMMU=y
diff --git a/arch/ia64/configs/gensparse_defconfig b/arch/ia64/configs/gensparse_defconfig
index 91c41ecfa6d9..f8e913365423 100644
--- a/arch/ia64/configs/gensparse_defconfig
+++ b/arch/ia64/configs/gensparse_defconfig
@@ -209,4 +209,3 @@ CONFIG_MAGIC_SYSRQ=y
209CONFIG_DEBUG_KERNEL=y 209CONFIG_DEBUG_KERNEL=y
210CONFIG_DEBUG_MUTEXES=y 210CONFIG_DEBUG_MUTEXES=y
211CONFIG_CRYPTO_MD5=y 211CONFIG_CRYPTO_MD5=y
212CONFIG_MISC_DEVICES=y
diff --git a/arch/ia64/kernel/acpi.c b/arch/ia64/kernel/acpi.c
index 6f38b6120d96..440578850ae5 100644
--- a/arch/ia64/kernel/acpi.c
+++ b/arch/ia64/kernel/acpi.c
@@ -497,7 +497,7 @@ acpi_numa_processor_affinity_init(struct acpi_srat_cpu_affinity *pa)
497 srat_num_cpus++; 497 srat_num_cpus++;
498} 498}
499 499
500void __init 500int __init
501acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma) 501acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
502{ 502{
503 unsigned long paddr, size; 503 unsigned long paddr, size;
@@ -512,7 +512,7 @@ acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
512 512
513 /* Ignore disabled entries */ 513 /* Ignore disabled entries */
514 if (!(ma->flags & ACPI_SRAT_MEM_ENABLED)) 514 if (!(ma->flags & ACPI_SRAT_MEM_ENABLED))
515 return; 515 return -1;
516 516
517 /* record this node in proximity bitmap */ 517 /* record this node in proximity bitmap */
518 pxm_bit_set(pxm); 518 pxm_bit_set(pxm);
@@ -531,6 +531,7 @@ acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
531 p->size = size; 531 p->size = size;
532 p->nid = pxm; 532 p->nid = pxm;
533 num_node_memblks++; 533 num_node_memblks++;
534 return 0;
534} 535}
535 536
536void __init acpi_numa_arch_fixup(void) 537void __init acpi_numa_arch_fixup(void)
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 0b0f8b8c4a26..b22df9410dce 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -5,6 +5,7 @@ config M68K
5 select HAVE_AOUT if MMU 5 select HAVE_AOUT if MMU
6 select HAVE_GENERIC_HARDIRQS 6 select HAVE_GENERIC_HARDIRQS
7 select GENERIC_IRQ_SHOW 7 select GENERIC_IRQ_SHOW
8 select GENERIC_ATOMIC64
8 select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS 9 select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
9 select GENERIC_CPU_DEVICES 10 select GENERIC_CPU_DEVICES
10 select GENERIC_STRNCPY_FROM_USER if MMU 11 select GENERIC_STRNCPY_FROM_USER if MMU
@@ -54,18 +55,6 @@ config ZONE_DMA
54 bool 55 bool
55 default y 56 default y
56 57
57config CPU_HAS_NO_BITFIELDS
58 bool
59
60config CPU_HAS_NO_MULDIV64
61 bool
62
63config CPU_HAS_ADDRESS_SPACES
64 bool
65
66config FPU
67 bool
68
69config HZ 58config HZ
70 int 59 int
71 default 1000 if CLEOPATRA 60 default 1000 if CLEOPATRA
diff --git a/arch/m68k/Kconfig.cpu b/arch/m68k/Kconfig.cpu
index 43a9f8f1b8eb..c4eb79edecec 100644
--- a/arch/m68k/Kconfig.cpu
+++ b/arch/m68k/Kconfig.cpu
@@ -28,6 +28,7 @@ config COLDFIRE
28 select CPU_HAS_NO_BITFIELDS 28 select CPU_HAS_NO_BITFIELDS
29 select CPU_HAS_NO_MULDIV64 29 select CPU_HAS_NO_MULDIV64
30 select GENERIC_CSUM 30 select GENERIC_CSUM
31 select HAVE_CLK
31 32
32endchoice 33endchoice
33 34
@@ -37,6 +38,7 @@ config M68000
37 bool 38 bool
38 select CPU_HAS_NO_BITFIELDS 39 select CPU_HAS_NO_BITFIELDS
39 select CPU_HAS_NO_MULDIV64 40 select CPU_HAS_NO_MULDIV64
41 select CPU_HAS_NO_UNALIGNED
40 select GENERIC_CSUM 42 select GENERIC_CSUM
41 help 43 help
42 The Freescale (was Motorola) 68000 CPU is the first generation of 44 The Freescale (was Motorola) 68000 CPU is the first generation of
@@ -48,6 +50,7 @@ config M68000
48config MCPU32 50config MCPU32
49 bool 51 bool
50 select CPU_HAS_NO_BITFIELDS 52 select CPU_HAS_NO_BITFIELDS
53 select CPU_HAS_NO_UNALIGNED
51 help 54 help
52 The Freescale (was then Motorola) CPU32 is a CPU core that is 55 The Freescale (was then Motorola) CPU32 is a CPU core that is
53 based on the 68020 processor. For the most part it is used in 56 based on the 68020 processor. For the most part it is used in
@@ -56,7 +59,6 @@ config MCPU32
56config M68020 59config M68020
57 bool "68020 support" 60 bool "68020 support"
58 depends on MMU 61 depends on MMU
59 select GENERIC_ATOMIC64
60 select CPU_HAS_ADDRESS_SPACES 62 select CPU_HAS_ADDRESS_SPACES
61 help 63 help
62 If you anticipate running this kernel on a computer with a MC68020 64 If you anticipate running this kernel on a computer with a MC68020
@@ -67,7 +69,6 @@ config M68020
67config M68030 69config M68030
68 bool "68030 support" 70 bool "68030 support"
69 depends on MMU && !MMU_SUN3 71 depends on MMU && !MMU_SUN3
70 select GENERIC_ATOMIC64
71 select CPU_HAS_ADDRESS_SPACES 72 select CPU_HAS_ADDRESS_SPACES
72 help 73 help
73 If you anticipate running this kernel on a computer with a MC68030 74 If you anticipate running this kernel on a computer with a MC68030
@@ -77,7 +78,6 @@ config M68030
77config M68040 78config M68040
78 bool "68040 support" 79 bool "68040 support"
79 depends on MMU && !MMU_SUN3 80 depends on MMU && !MMU_SUN3
80 select GENERIC_ATOMIC64
81 select CPU_HAS_ADDRESS_SPACES 81 select CPU_HAS_ADDRESS_SPACES
82 help 82 help
83 If you anticipate running this kernel on a computer with a MC68LC040 83 If you anticipate running this kernel on a computer with a MC68LC040
@@ -88,7 +88,6 @@ config M68040
88config M68060 88config M68060
89 bool "68060 support" 89 bool "68060 support"
90 depends on MMU && !MMU_SUN3 90 depends on MMU && !MMU_SUN3
91 select GENERIC_ATOMIC64
92 select CPU_HAS_ADDRESS_SPACES 91 select CPU_HAS_ADDRESS_SPACES
93 help 92 help
94 If you anticipate running this kernel on a computer with a MC68060 93 If you anticipate running this kernel on a computer with a MC68060
@@ -376,6 +375,18 @@ config NODES_SHIFT
376 default "3" 375 default "3"
377 depends on !SINGLE_MEMORY_CHUNK 376 depends on !SINGLE_MEMORY_CHUNK
378 377
378config CPU_HAS_NO_BITFIELDS
379 bool
380
381config CPU_HAS_NO_MULDIV64
382 bool
383
384config CPU_HAS_NO_UNALIGNED
385 bool
386
387config CPU_HAS_ADDRESS_SPACES
388 bool
389
379config FPU 390config FPU
380 bool 391 bool
381 392
diff --git a/arch/m68k/apollo/config.c b/arch/m68k/apollo/config.c
index 0a30406b9442..f5565d6eeb8e 100644
--- a/arch/m68k/apollo/config.c
+++ b/arch/m68k/apollo/config.c
@@ -177,8 +177,8 @@ irqreturn_t dn_timer_int(int irq, void *dev_id)
177 177
178 timer_handler(irq, dev_id); 178 timer_handler(irq, dev_id);
179 179
180 x=*(volatile unsigned char *)(timer+3); 180 x = *(volatile unsigned char *)(apollo_timer + 3);
181 x=*(volatile unsigned char *)(timer+5); 181 x = *(volatile unsigned char *)(apollo_timer + 5);
182 182
183 return IRQ_HANDLED; 183 return IRQ_HANDLED;
184} 184}
@@ -186,17 +186,17 @@ irqreturn_t dn_timer_int(int irq, void *dev_id)
186void dn_sched_init(irq_handler_t timer_routine) 186void dn_sched_init(irq_handler_t timer_routine)
187{ 187{
188 /* program timer 1 */ 188 /* program timer 1 */
189 *(volatile unsigned char *)(timer+3)=0x01; 189 *(volatile unsigned char *)(apollo_timer + 3) = 0x01;
190 *(volatile unsigned char *)(timer+1)=0x40; 190 *(volatile unsigned char *)(apollo_timer + 1) = 0x40;
191 *(volatile unsigned char *)(timer+5)=0x09; 191 *(volatile unsigned char *)(apollo_timer + 5) = 0x09;
192 *(volatile unsigned char *)(timer+7)=0xc4; 192 *(volatile unsigned char *)(apollo_timer + 7) = 0xc4;
193 193
194 /* enable IRQ of PIC B */ 194 /* enable IRQ of PIC B */
195 *(volatile unsigned char *)(pica+1)&=(~8); 195 *(volatile unsigned char *)(pica+1)&=(~8);
196 196
197#if 0 197#if 0
198 printk("*(0x10803) %02x\n",*(volatile unsigned char *)(timer+0x3)); 198 printk("*(0x10803) %02x\n",*(volatile unsigned char *)(apollo_timer + 0x3));
199 printk("*(0x10803) %02x\n",*(volatile unsigned char *)(timer+0x3)); 199 printk("*(0x10803) %02x\n",*(volatile unsigned char *)(apollo_timer + 0x3));
200#endif 200#endif
201 201
202 if (request_irq(IRQ_APOLLO, dn_timer_int, 0, "time", timer_routine)) 202 if (request_irq(IRQ_APOLLO, dn_timer_int, 0, "time", timer_routine))
diff --git a/arch/m68k/include/asm/Kbuild b/arch/m68k/include/asm/Kbuild
index eafa2539a8ee..a74e5d95c384 100644
--- a/arch/m68k/include/asm/Kbuild
+++ b/arch/m68k/include/asm/Kbuild
@@ -1,4 +1,29 @@
1include include/asm-generic/Kbuild.asm 1include include/asm-generic/Kbuild.asm
2header-y += cachectl.h 2header-y += cachectl.h
3 3
4generic-y += bitsperlong.h
5generic-y += cputime.h
6generic-y += device.h
7generic-y += emergency-restart.h
8generic-y += errno.h
9generic-y += futex.h
10generic-y += ioctl.h
11generic-y += ipcbuf.h
12generic-y += irq_regs.h
13generic-y += kdebug.h
14generic-y += kmap_types.h
15generic-y += kvm_para.h
16generic-y += local64.h
17generic-y += local.h
18generic-y += mman.h
19generic-y += mutex.h
20generic-y += percpu.h
21generic-y += resource.h
22generic-y += scatterlist.h
23generic-y += sections.h
24generic-y += siginfo.h
25generic-y += statfs.h
26generic-y += topology.h
27generic-y += types.h
4generic-y += word-at-a-time.h 28generic-y += word-at-a-time.h
29generic-y += xor.h
diff --git a/arch/m68k/include/asm/MC68332.h b/arch/m68k/include/asm/MC68332.h
deleted file mode 100644
index 6bb8f02685a2..000000000000
--- a/arch/m68k/include/asm/MC68332.h
+++ /dev/null
@@ -1,152 +0,0 @@
1
2/* include/asm-m68knommu/MC68332.h: '332 control registers
3 *
4 * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com>,
5 *
6 */
7
8#ifndef _MC68332_H_
9#define _MC68332_H_
10
11#define BYTE_REF(addr) (*((volatile unsigned char*)addr))
12#define WORD_REF(addr) (*((volatile unsigned short*)addr))
13
14#define PORTE_ADDR 0xfffa11
15#define PORTE BYTE_REF(PORTE_ADDR)
16#define DDRE_ADDR 0xfffa15
17#define DDRE BYTE_REF(DDRE_ADDR)
18#define PEPAR_ADDR 0xfffa17
19#define PEPAR BYTE_REF(PEPAR_ADDR)
20
21#define PORTF_ADDR 0xfffa19
22#define PORTF BYTE_REF(PORTF_ADDR)
23#define DDRF_ADDR 0xfffa1d
24#define DDRF BYTE_REF(DDRF_ADDR)
25#define PFPAR_ADDR 0xfffa1f
26#define PFPAR BYTE_REF(PFPAR_ADDR)
27
28#define PORTQS_ADDR 0xfffc15
29#define PORTQS BYTE_REF(PORTQS_ADDR)
30#define DDRQS_ADDR 0xfffc17
31#define DDRQS BYTE_REF(DDRQS_ADDR)
32#define PQSPAR_ADDR 0xfffc16
33#define PQSPAR BYTE_REF(PQSPAR_ADDR)
34
35#define CSPAR0_ADDR 0xFFFA44
36#define CSPAR0 WORD_REF(CSPAR0_ADDR)
37#define CSPAR1_ADDR 0xFFFA46
38#define CSPAR1 WORD_REF(CSPAR1_ADDR)
39#define CSARBT_ADDR 0xFFFA48
40#define CSARBT WORD_REF(CSARBT_ADDR)
41#define CSOPBT_ADDR 0xFFFA4A
42#define CSOPBT WORD_REF(CSOPBT_ADDR)
43#define CSBAR0_ADDR 0xFFFA4C
44#define CSBAR0 WORD_REF(CSBAR0_ADDR)
45#define CSOR0_ADDR 0xFFFA4E
46#define CSOR0 WORD_REF(CSOR0_ADDR)
47#define CSBAR1_ADDR 0xFFFA50
48#define CSBAR1 WORD_REF(CSBAR1_ADDR)
49#define CSOR1_ADDR 0xFFFA52
50#define CSOR1 WORD_REF(CSOR1_ADDR)
51#define CSBAR2_ADDR 0xFFFA54
52#define CSBAR2 WORD_REF(CSBAR2_ADDR)
53#define CSOR2_ADDR 0xFFFA56
54#define CSOR2 WORD_REF(CSOR2_ADDR)
55#define CSBAR3_ADDR 0xFFFA58
56#define CSBAR3 WORD_REF(CSBAR3_ADDR)
57#define CSOR3_ADDR 0xFFFA5A
58#define CSOR3 WORD_REF(CSOR3_ADDR)
59#define CSBAR4_ADDR 0xFFFA5C
60#define CSBAR4 WORD_REF(CSBAR4_ADDR)
61#define CSOR4_ADDR 0xFFFA5E
62#define CSOR4 WORD_REF(CSOR4_ADDR)
63#define CSBAR5_ADDR 0xFFFA60
64#define CSBAR5 WORD_REF(CSBAR5_ADDR)
65#define CSOR5_ADDR 0xFFFA62
66#define CSOR5 WORD_REF(CSOR5_ADDR)
67#define CSBAR6_ADDR 0xFFFA64
68#define CSBAR6 WORD_REF(CSBAR6_ADDR)
69#define CSOR6_ADDR 0xFFFA66
70#define CSOR6 WORD_REF(CSOR6_ADDR)
71#define CSBAR7_ADDR 0xFFFA68
72#define CSBAR7 WORD_REF(CSBAR7_ADDR)
73#define CSOR7_ADDR 0xFFFA6A
74#define CSOR7 WORD_REF(CSOR7_ADDR)
75#define CSBAR8_ADDR 0xFFFA6C
76#define CSBAR8 WORD_REF(CSBAR8_ADDR)
77#define CSOR8_ADDR 0xFFFA6E
78#define CSOR8 WORD_REF(CSOR8_ADDR)
79#define CSBAR9_ADDR 0xFFFA70
80#define CSBAR9 WORD_REF(CSBAR9_ADDR)
81#define CSOR9_ADDR 0xFFFA72
82#define CSOR9 WORD_REF(CSOR9_ADDR)
83#define CSBAR10_ADDR 0xFFFA74
84#define CSBAR10 WORD_REF(CSBAR10_ADDR)
85#define CSOR10_ADDR 0xFFFA76
86#define CSOR10 WORD_REF(CSOR10_ADDR)
87
88#define CSOR_MODE_ASYNC 0x0000
89#define CSOR_MODE_SYNC 0x8000
90#define CSOR_MODE_MASK 0x8000
91#define CSOR_BYTE_DISABLE 0x0000
92#define CSOR_BYTE_UPPER 0x4000
93#define CSOR_BYTE_LOWER 0x2000
94#define CSOR_BYTE_BOTH 0x6000
95#define CSOR_BYTE_MASK 0x6000
96#define CSOR_RW_RSVD 0x0000
97#define CSOR_RW_READ 0x0800
98#define CSOR_RW_WRITE 0x1000
99#define CSOR_RW_BOTH 0x1800
100#define CSOR_RW_MASK 0x1800
101#define CSOR_STROBE_DS 0x0400
102#define CSOR_STROBE_AS 0x0000
103#define CSOR_STROBE_MASK 0x0400
104#define CSOR_DSACK_WAIT(x) (wait << 6)
105#define CSOR_DSACK_FTERM (14 << 6)
106#define CSOR_DSACK_EXTERNAL (15 << 6)
107#define CSOR_DSACK_MASK 0x03c0
108#define CSOR_SPACE_CPU 0x0000
109#define CSOR_SPACE_USER 0x0010
110#define CSOR_SPACE_SU 0x0020
111#define CSOR_SPACE_BOTH 0x0030
112#define CSOR_SPACE_MASK 0x0030
113#define CSOR_IPL_ALL 0x0000
114#define CSOR_IPL_PRIORITY(x) (x << 1)
115#define CSOR_IPL_MASK 0x000e
116#define CSOR_AVEC_ON 0x0001
117#define CSOR_AVEC_OFF 0x0000
118#define CSOR_AVEC_MASK 0x0001
119
120#define CSBAR_ADDR(x) ((addr >> 11) << 3)
121#define CSBAR_ADDR_MASK 0xfff8
122#define CSBAR_BLKSIZE_2K 0x0000
123#define CSBAR_BLKSIZE_8K 0x0001
124#define CSBAR_BLKSIZE_16K 0x0002
125#define CSBAR_BLKSIZE_64K 0x0003
126#define CSBAR_BLKSIZE_128K 0x0004
127#define CSBAR_BLKSIZE_256K 0x0005
128#define CSBAR_BLKSIZE_512K 0x0006
129#define CSBAR_BLKSIZE_1M 0x0007
130#define CSBAR_BLKSIZE_MASK 0x0007
131
132#define CSPAR_DISC 0
133#define CSPAR_ALT 1
134#define CSPAR_CS8 2
135#define CSPAR_CS16 3
136#define CSPAR_MASK 3
137
138#define CSPAR0_CSBOOT(x) (x << 0)
139#define CSPAR0_CS0(x) (x << 2)
140#define CSPAR0_CS1(x) (x << 4)
141#define CSPAR0_CS2(x) (x << 6)
142#define CSPAR0_CS3(x) (x << 8)
143#define CSPAR0_CS4(x) (x << 10)
144#define CSPAR0_CS5(x) (x << 12)
145
146#define CSPAR1_CS6(x) (x << 0)
147#define CSPAR1_CS7(x) (x << 2)
148#define CSPAR1_CS8(x) (x << 4)
149#define CSPAR1_CS9(x) (x << 6)
150#define CSPAR1_CS10(x) (x << 8)
151
152#endif
diff --git a/arch/m68k/include/asm/apollodma.h b/arch/m68k/include/asm/apollodma.h
deleted file mode 100644
index 954adc851adb..000000000000
--- a/arch/m68k/include/asm/apollodma.h
+++ /dev/null
@@ -1,248 +0,0 @@
1/*
2 * linux/include/asm/dma.h: Defines for using and allocating dma channels.
3 * Written by Hennus Bergman, 1992.
4 * High DMA channel support & info by Hannu Savolainen
5 * and John Boyd, Nov. 1992.
6 */
7
8#ifndef _ASM_APOLLO_DMA_H
9#define _ASM_APOLLO_DMA_H
10
11#include <asm/apollohw.h> /* need byte IO */
12#include <linux/spinlock.h> /* And spinlocks */
13#include <linux/delay.h>
14
15
16#define dma_outb(val,addr) (*((volatile unsigned char *)(addr+IO_BASE)) = (val))
17#define dma_inb(addr) (*((volatile unsigned char *)(addr+IO_BASE)))
18
19/*
20 * NOTES about DMA transfers:
21 *
22 * controller 1: channels 0-3, byte operations, ports 00-1F
23 * controller 2: channels 4-7, word operations, ports C0-DF
24 *
25 * - ALL registers are 8 bits only, regardless of transfer size
26 * - channel 4 is not used - cascades 1 into 2.
27 * - channels 0-3 are byte - addresses/counts are for physical bytes
28 * - channels 5-7 are word - addresses/counts are for physical words
29 * - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
30 * - transfer count loaded to registers is 1 less than actual count
31 * - controller 2 offsets are all even (2x offsets for controller 1)
32 * - page registers for 5-7 don't use data bit 0, represent 128K pages
33 * - page registers for 0-3 use bit 0, represent 64K pages
34 *
35 * DMA transfers are limited to the lower 16MB of _physical_ memory.
36 * Note that addresses loaded into registers must be _physical_ addresses,
37 * not logical addresses (which may differ if paging is active).
38 *
39 * Address mapping for channels 0-3:
40 *
41 * A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses)
42 * | ... | | ... | | ... |
43 * | ... | | ... | | ... |
44 * | ... | | ... | | ... |
45 * P7 ... P0 A7 ... A0 A7 ... A0
46 * | Page | Addr MSB | Addr LSB | (DMA registers)
47 *
48 * Address mapping for channels 5-7:
49 *
50 * A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses)
51 * | ... | \ \ ... \ \ \ ... \ \
52 * | ... | \ \ ... \ \ \ ... \ (not used)
53 * | ... | \ \ ... \ \ \ ... \
54 * P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0
55 * | Page | Addr MSB | Addr LSB | (DMA registers)
56 *
57 * Again, channels 5-7 transfer _physical_ words (16 bits), so addresses
58 * and counts _must_ be word-aligned (the lowest address bit is _ignored_ at
59 * the hardware level, so odd-byte transfers aren't possible).
60 *
61 * Transfer count (_not # bytes_) is limited to 64K, represented as actual
62 * count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more,
63 * and up to 128K bytes may be transferred on channels 5-7 in one operation.
64 *
65 */
66
67#define MAX_DMA_CHANNELS 8
68
69/* The maximum address that we can perform a DMA transfer to on this platform */#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x1000000)
70
71/* 8237 DMA controllers */
72#define IO_DMA1_BASE 0x10C00 /* 8 bit slave DMA, channels 0..3 */
73#define IO_DMA2_BASE 0x10D00 /* 16 bit master DMA, ch 4(=slave input)..7 */
74
75/* DMA controller registers */
76#define DMA1_CMD_REG (IO_DMA1_BASE+0x08) /* command register (w) */
77#define DMA1_STAT_REG (IO_DMA1_BASE+0x08) /* status register (r) */
78#define DMA1_REQ_REG (IO_DMA1_BASE+0x09) /* request register (w) */
79#define DMA1_MASK_REG (IO_DMA1_BASE+0x0A) /* single-channel mask (w) */
80#define DMA1_MODE_REG (IO_DMA1_BASE+0x0B) /* mode register (w) */
81#define DMA1_CLEAR_FF_REG (IO_DMA1_BASE+0x0C) /* clear pointer flip-flop (w) */
82#define DMA1_TEMP_REG (IO_DMA1_BASE+0x0D) /* Temporary Register (r) */
83#define DMA1_RESET_REG (IO_DMA1_BASE+0x0D) /* Master Clear (w) */
84#define DMA1_CLR_MASK_REG (IO_DMA1_BASE+0x0E) /* Clear Mask */
85#define DMA1_MASK_ALL_REG (IO_DMA1_BASE+0x0F) /* all-channels mask (w) */
86
87#define DMA2_CMD_REG (IO_DMA2_BASE+0x10) /* command register (w) */
88#define DMA2_STAT_REG (IO_DMA2_BASE+0x10) /* status register (r) */
89#define DMA2_REQ_REG (IO_DMA2_BASE+0x12) /* request register (w) */
90#define DMA2_MASK_REG (IO_DMA2_BASE+0x14) /* single-channel mask (w) */
91#define DMA2_MODE_REG (IO_DMA2_BASE+0x16) /* mode register (w) */
92#define DMA2_CLEAR_FF_REG (IO_DMA2_BASE+0x18) /* clear pointer flip-flop (w) */
93#define DMA2_TEMP_REG (IO_DMA2_BASE+0x1A) /* Temporary Register (r) */
94#define DMA2_RESET_REG (IO_DMA2_BASE+0x1A) /* Master Clear (w) */
95#define DMA2_CLR_MASK_REG (IO_DMA2_BASE+0x1C) /* Clear Mask */
96#define DMA2_MASK_ALL_REG (IO_DMA2_BASE+0x1E) /* all-channels mask (w) */
97
98#define DMA_ADDR_0 (IO_DMA1_BASE+0x00) /* DMA address registers */
99#define DMA_ADDR_1 (IO_DMA1_BASE+0x02)
100#define DMA_ADDR_2 (IO_DMA1_BASE+0x04)
101#define DMA_ADDR_3 (IO_DMA1_BASE+0x06)
102#define DMA_ADDR_4 (IO_DMA2_BASE+0x00)
103#define DMA_ADDR_5 (IO_DMA2_BASE+0x04)
104#define DMA_ADDR_6 (IO_DMA2_BASE+0x08)
105#define DMA_ADDR_7 (IO_DMA2_BASE+0x0C)
106
107#define DMA_CNT_0 (IO_DMA1_BASE+0x01) /* DMA count registers */
108#define DMA_CNT_1 (IO_DMA1_BASE+0x03)
109#define DMA_CNT_2 (IO_DMA1_BASE+0x05)
110#define DMA_CNT_3 (IO_DMA1_BASE+0x07)
111#define DMA_CNT_4 (IO_DMA2_BASE+0x02)
112#define DMA_CNT_5 (IO_DMA2_BASE+0x06)
113#define DMA_CNT_6 (IO_DMA2_BASE+0x0A)
114#define DMA_CNT_7 (IO_DMA2_BASE+0x0E)
115
116#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
117#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
118#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
119
120#define DMA_AUTOINIT 0x10
121
122#define DMA_8BIT 0
123#define DMA_16BIT 1
124#define DMA_BUSMASTER 2
125
126extern spinlock_t dma_spin_lock;
127
128static __inline__ unsigned long claim_dma_lock(void)
129{
130 unsigned long flags;
131 spin_lock_irqsave(&dma_spin_lock, flags);
132 return flags;
133}
134
135static __inline__ void release_dma_lock(unsigned long flags)
136{
137 spin_unlock_irqrestore(&dma_spin_lock, flags);
138}
139
140/* enable/disable a specific DMA channel */
141static __inline__ void enable_dma(unsigned int dmanr)
142{
143 if (dmanr<=3)
144 dma_outb(dmanr, DMA1_MASK_REG);
145 else
146 dma_outb(dmanr & 3, DMA2_MASK_REG);
147}
148
149static __inline__ void disable_dma(unsigned int dmanr)
150{
151 if (dmanr<=3)
152 dma_outb(dmanr | 4, DMA1_MASK_REG);
153 else
154 dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);
155}
156
157/* Clear the 'DMA Pointer Flip Flop'.
158 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
159 * Use this once to initialize the FF to a known state.
160 * After that, keep track of it. :-)
161 * --- In order to do that, the DMA routines below should ---
162 * --- only be used while holding the DMA lock ! ---
163 */
164static __inline__ void clear_dma_ff(unsigned int dmanr)
165{
166 if (dmanr<=3)
167 dma_outb(0, DMA1_CLEAR_FF_REG);
168 else
169 dma_outb(0, DMA2_CLEAR_FF_REG);
170}
171
172/* set mode (above) for a specific DMA channel */
173static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
174{
175 if (dmanr<=3)
176 dma_outb(mode | dmanr, DMA1_MODE_REG);
177 else
178 dma_outb(mode | (dmanr&3), DMA2_MODE_REG);
179}
180
181/* Set transfer address & page bits for specific DMA channel.
182 * Assumes dma flipflop is clear.
183 */
184static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
185{
186 if (dmanr <= 3) {
187 dma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
188 dma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
189 } else {
190 dma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
191 dma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
192 }
193}
194
195
196/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
197 * a specific DMA channel.
198 * You must ensure the parameters are valid.
199 * NOTE: from a manual: "the number of transfers is one more
200 * than the initial word count"! This is taken into account.
201 * Assumes dma flip-flop is clear.
202 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
203 */
204static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
205{
206 count--;
207 if (dmanr <= 3) {
208 dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
209 dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
210 } else {
211 dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
212 dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
213 }
214}
215
216
217/* Get DMA residue count. After a DMA transfer, this
218 * should return zero. Reading this while a DMA transfer is
219 * still in progress will return unpredictable results.
220 * If called before the channel has been used, it may return 1.
221 * Otherwise, it returns the number of _bytes_ left to transfer.
222 *
223 * Assumes DMA flip-flop is clear.
224 */
225static __inline__ int get_dma_residue(unsigned int dmanr)
226{
227 unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
228 : ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
229
230 /* using short to get 16-bit wrap around */
231 unsigned short count;
232
233 count = 1 + dma_inb(io_port);
234 count += dma_inb(io_port) << 8;
235
236 return (dmanr<=3)? count : (count<<1);
237}
238
239
240/* These are in kernel/dma.c: */
241extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */
242extern void free_dma(unsigned int dmanr); /* release it again */
243
244/* These are in arch/m68k/apollo/dma.c: */
245extern unsigned short dma_map_page(unsigned long phys_addr,int count,int type);
246extern void dma_unmap_page(unsigned short dma_addr);
247
248#endif /* _ASM_APOLLO_DMA_H */
diff --git a/arch/m68k/include/asm/apollohw.h b/arch/m68k/include/asm/apollohw.h
index a1373b9aa281..635ef4f89010 100644
--- a/arch/m68k/include/asm/apollohw.h
+++ b/arch/m68k/include/asm/apollohw.h
@@ -98,7 +98,7 @@ extern u_long timer_physaddr;
98#define cpuctrl (*(volatile unsigned int *)(IO_BASE + cpuctrl_physaddr)) 98#define cpuctrl (*(volatile unsigned int *)(IO_BASE + cpuctrl_physaddr))
99#define pica (IO_BASE + pica_physaddr) 99#define pica (IO_BASE + pica_physaddr)
100#define picb (IO_BASE + picb_physaddr) 100#define picb (IO_BASE + picb_physaddr)
101#define timer (IO_BASE + timer_physaddr) 101#define apollo_timer (IO_BASE + timer_physaddr)
102#define addr_xlat_map ((unsigned short *)(IO_BASE + 0x17000)) 102#define addr_xlat_map ((unsigned short *)(IO_BASE + 0x17000))
103 103
104#define isaIO2mem(x) (((((x) & 0x3f8) << 7) | (((x) & 0xfc00) >> 6) | ((x) & 0x7)) + 0x40000 + IO_BASE) 104#define isaIO2mem(x) (((((x) & 0x3f8) << 7) | (((x) & 0xfc00) >> 6) | ((x) & 0x7)) + 0x40000 + IO_BASE)
diff --git a/arch/m68k/include/asm/bitsperlong.h b/arch/m68k/include/asm/bitsperlong.h
deleted file mode 100644
index 6dc0bb0c13b2..000000000000
--- a/arch/m68k/include/asm/bitsperlong.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/bitsperlong.h>
diff --git a/arch/m68k/include/asm/cputime.h b/arch/m68k/include/asm/cputime.h
deleted file mode 100644
index c79c5e892305..000000000000
--- a/arch/m68k/include/asm/cputime.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __M68K_CPUTIME_H
2#define __M68K_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __M68K_CPUTIME_H */
diff --git a/arch/m68k/include/asm/delay.h b/arch/m68k/include/asm/delay.h
index 9c09becfd4c9..12d8fe4f1d30 100644
--- a/arch/m68k/include/asm/delay.h
+++ b/arch/m68k/include/asm/delay.h
@@ -43,7 +43,7 @@ static inline void __delay(unsigned long loops)
43extern void __bad_udelay(void); 43extern void __bad_udelay(void);
44 44
45 45
46#if defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE) 46#ifdef CONFIG_CPU_HAS_NO_MULDIV64
47/* 47/*
48 * The simpler m68k and ColdFire processors do not have a 32*32->64 48 * The simpler m68k and ColdFire processors do not have a 32*32->64
49 * multiply instruction. So we need to handle them a little differently. 49 * multiply instruction. So we need to handle them a little differently.
diff --git a/arch/m68k/include/asm/device.h b/arch/m68k/include/asm/device.h
deleted file mode 100644
index d8f9872b0e2d..000000000000
--- a/arch/m68k/include/asm/device.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/arch/m68k/include/asm/emergency-restart.h b/arch/m68k/include/asm/emergency-restart.h
deleted file mode 100644
index 108d8c48e42e..000000000000
--- a/arch/m68k/include/asm/emergency-restart.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/arch/m68k/include/asm/errno.h b/arch/m68k/include/asm/errno.h
deleted file mode 100644
index 0d4e188d6ef6..000000000000
--- a/arch/m68k/include/asm/errno.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _M68K_ERRNO_H
2#define _M68K_ERRNO_H
3
4#include <asm-generic/errno.h>
5
6#endif /* _M68K_ERRNO_H */
diff --git a/arch/m68k/include/asm/futex.h b/arch/m68k/include/asm/futex.h
deleted file mode 100644
index 6a332a9f099c..000000000000
--- a/arch/m68k/include/asm/futex.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_FUTEX_H
2#define _ASM_FUTEX_H
3
4#include <asm-generic/futex.h>
5
6#endif
diff --git a/arch/m68k/include/asm/ioctl.h b/arch/m68k/include/asm/ioctl.h
deleted file mode 100644
index b279fe06dfe5..000000000000
--- a/arch/m68k/include/asm/ioctl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ioctl.h>
diff --git a/arch/m68k/include/asm/ipcbuf.h b/arch/m68k/include/asm/ipcbuf.h
deleted file mode 100644
index 84c7e51cb6d0..000000000000
--- a/arch/m68k/include/asm/ipcbuf.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ipcbuf.h>
diff --git a/arch/m68k/include/asm/irq_regs.h b/arch/m68k/include/asm/irq_regs.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/arch/m68k/include/asm/irq_regs.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/irq_regs.h>
diff --git a/arch/m68k/include/asm/kdebug.h b/arch/m68k/include/asm/kdebug.h
deleted file mode 100644
index 6ece1b037665..000000000000
--- a/arch/m68k/include/asm/kdebug.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kdebug.h>
diff --git a/arch/m68k/include/asm/kmap_types.h b/arch/m68k/include/asm/kmap_types.h
deleted file mode 100644
index 3413cc1390ec..000000000000
--- a/arch/m68k/include/asm/kmap_types.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_M68K_KMAP_TYPES_H
2#define __ASM_M68K_KMAP_TYPES_H
3
4#include <asm-generic/kmap_types.h>
5
6#endif /* __ASM_M68K_KMAP_TYPES_H */
diff --git a/arch/m68k/include/asm/kvm_para.h b/arch/m68k/include/asm/kvm_para.h
deleted file mode 100644
index 14fab8f0b957..000000000000
--- a/arch/m68k/include/asm/kvm_para.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kvm_para.h>
diff --git a/arch/m68k/include/asm/local.h b/arch/m68k/include/asm/local.h
deleted file mode 100644
index 6c259263e1f0..000000000000
--- a/arch/m68k/include/asm/local.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_M68K_LOCAL_H
2#define _ASM_M68K_LOCAL_H
3
4#include <asm-generic/local.h>
5
6#endif /* _ASM_M68K_LOCAL_H */
diff --git a/arch/m68k/include/asm/local64.h b/arch/m68k/include/asm/local64.h
deleted file mode 100644
index 36c93b5cc239..000000000000
--- a/arch/m68k/include/asm/local64.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/local64.h>
diff --git a/arch/m68k/include/asm/mac_mouse.h b/arch/m68k/include/asm/mac_mouse.h
deleted file mode 100644
index 39a5c292eaee..000000000000
--- a/arch/m68k/include/asm/mac_mouse.h
+++ /dev/null
@@ -1,23 +0,0 @@
1#ifndef _ASM_MAC_MOUSE_H
2#define _ASM_MAC_MOUSE_H
3
4/*
5 * linux/include/asm-m68k/mac_mouse.h
6 * header file for Macintosh ADB mouse driver
7 * 27-10-97 Michael Schmitz
8 * copied from:
9 * header file for Atari Mouse driver
10 * by Robert de Vries (robert@and.nl) on 19Jul93
11 */
12
13struct mouse_status {
14 char buttons;
15 short dx;
16 short dy;
17 int ready;
18 int active;
19 wait_queue_head_t wait;
20 struct fasync_struct *fasyncptr;
21};
22
23#endif
diff --git a/arch/m68k/include/asm/mcfmbus.h b/arch/m68k/include/asm/mcfmbus.h
deleted file mode 100644
index 319899c47a2c..000000000000
--- a/arch/m68k/include/asm/mcfmbus.h
+++ /dev/null
@@ -1,77 +0,0 @@
1/****************************************************************************/
2
3/*
4 * mcfmbus.h -- Coldfire MBUS support defines.
5 *
6 * (C) Copyright 1999, Martin Floeer (mfloeer@axcent.de)
7 */
8
9/****************************************************************************/
10
11
12#ifndef mcfmbus_h
13#define mcfmbus_h
14
15
16#define MCFMBUS_BASE 0x280
17#define MCFMBUS_IRQ_VECTOR 0x19
18#define MCFMBUS_IRQ 0x1
19#define MCFMBUS_CLK 0x3f
20#define MCFMBUS_IRQ_LEVEL 0x07 /*IRQ Level 1*/
21#define MCFMBUS_ADDRESS 0x01
22
23
24/*
25* Define the 5307 MBUS register set addresses
26*/
27
28#define MCFMBUS_MADR 0x00
29#define MCFMBUS_MFDR 0x04
30#define MCFMBUS_MBCR 0x08
31#define MCFMBUS_MBSR 0x0C
32#define MCFMBUS_MBDR 0x10
33
34
35#define MCFMBUS_MADR_ADDR(a) (((a)&0x7F)<<0x01) /*Slave Address*/
36
37#define MCFMBUS_MFDR_MBC(a) ((a)&0x3F) /*M-Bus Clock*/
38
39/*
40* Define bit flags in Control Register
41*/
42
43#define MCFMBUS_MBCR_MEN (0x80) /* M-Bus Enable */
44#define MCFMBUS_MBCR_MIEN (0x40) /* M-Bus Interrupt Enable */
45#define MCFMBUS_MBCR_MSTA (0x20) /* Master/Slave Mode Select Bit */
46#define MCFMBUS_MBCR_MTX (0x10) /* Transmit/Rcv Mode Select Bit */
47#define MCFMBUS_MBCR_TXAK (0x08) /* Transmit Acknowledge Enable */
48#define MCFMBUS_MBCR_RSTA (0x04) /* Repeat Start */
49
50/*
51* Define bit flags in Status Register
52*/
53
54#define MCFMBUS_MBSR_MCF (0x80) /* Data Transfer Complete */
55#define MCFMBUS_MBSR_MAAS (0x40) /* Addressed as a Slave */
56#define MCFMBUS_MBSR_MBB (0x20) /* Bus Busy */
57#define MCFMBUS_MBSR_MAL (0x10) /* Arbitration Lost */
58#define MCFMBUS_MBSR_SRW (0x04) /* Slave Transmit */
59#define MCFMBUS_MBSR_MIF (0x02) /* M-Bus Interrupt */
60#define MCFMBUS_MBSR_RXAK (0x01) /* No Acknowledge Received */
61
62/*
63* Define bit flags in DATA I/O Register
64*/
65
66#define MCFMBUS_MBDR_READ (0x01) /* 1=read 0=write MBUS */
67
68#define MBUSIOCSCLOCK 1
69#define MBUSIOCGCLOCK 2
70#define MBUSIOCSADDR 3
71#define MBUSIOCGADDR 4
72#define MBUSIOCSSLADDR 5
73#define MBUSIOCGSLADDR 6
74#define MBUSIOCSSUBADDR 7
75#define MBUSIOCGSUBADDR 8
76
77#endif
diff --git a/arch/m68k/include/asm/mman.h b/arch/m68k/include/asm/mman.h
deleted file mode 100644
index 8eebf89f5ab1..000000000000
--- a/arch/m68k/include/asm/mman.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/mman.h>
diff --git a/arch/m68k/include/asm/mutex.h b/arch/m68k/include/asm/mutex.h
deleted file mode 100644
index 458c1f7fbc18..000000000000
--- a/arch/m68k/include/asm/mutex.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/arch/m68k/include/asm/percpu.h b/arch/m68k/include/asm/percpu.h
deleted file mode 100644
index 0859d048faf5..000000000000
--- a/arch/m68k/include/asm/percpu.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_M68K_PERCPU_H
2#define __ASM_M68K_PERCPU_H
3
4#include <asm-generic/percpu.h>
5
6#endif /* __ASM_M68K_PERCPU_H */
diff --git a/arch/m68k/include/asm/resource.h b/arch/m68k/include/asm/resource.h
deleted file mode 100644
index e7d35019f337..000000000000
--- a/arch/m68k/include/asm/resource.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _M68K_RESOURCE_H
2#define _M68K_RESOURCE_H
3
4#include <asm-generic/resource.h>
5
6#endif /* _M68K_RESOURCE_H */
diff --git a/arch/m68k/include/asm/sbus.h b/arch/m68k/include/asm/sbus.h
deleted file mode 100644
index bfe3ba147f2e..000000000000
--- a/arch/m68k/include/asm/sbus.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * some sbus structures and macros to make usage of sbus drivers possible
3 */
4
5#ifndef __M68K_SBUS_H
6#define __M68K_SBUS_H
7
8struct sbus_dev {
9 struct {
10 unsigned int which_io;
11 unsigned int phys_addr;
12 } reg_addrs[1];
13};
14
15/* sbus IO functions stolen from include/asm-sparc/io.h for the serial driver */
16/* No SBUS on the Sun3, kludge -- sam */
17
18static inline void _sbus_writeb(unsigned char val, unsigned long addr)
19{
20 *(volatile unsigned char *)addr = val;
21}
22
23static inline unsigned char _sbus_readb(unsigned long addr)
24{
25 return *(volatile unsigned char *)addr;
26}
27
28static inline void _sbus_writel(unsigned long val, unsigned long addr)
29{
30 *(volatile unsigned long *)addr = val;
31
32}
33
34extern inline unsigned long _sbus_readl(unsigned long addr)
35{
36 return *(volatile unsigned long *)addr;
37}
38
39
40#define sbus_readb(a) _sbus_readb((unsigned long)a)
41#define sbus_writeb(v, a) _sbus_writeb(v, (unsigned long)a)
42#define sbus_readl(a) _sbus_readl((unsigned long)a)
43#define sbus_writel(v, a) _sbus_writel(v, (unsigned long)a)
44
45#endif
diff --git a/arch/m68k/include/asm/scatterlist.h b/arch/m68k/include/asm/scatterlist.h
deleted file mode 100644
index 312505452a1e..000000000000
--- a/arch/m68k/include/asm/scatterlist.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _M68K_SCATTERLIST_H
2#define _M68K_SCATTERLIST_H
3
4#include <asm-generic/scatterlist.h>
5
6#endif /* !(_M68K_SCATTERLIST_H) */
diff --git a/arch/m68k/include/asm/sections.h b/arch/m68k/include/asm/sections.h
deleted file mode 100644
index 5277e52715ec..000000000000
--- a/arch/m68k/include/asm/sections.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef _ASM_M68K_SECTIONS_H
2#define _ASM_M68K_SECTIONS_H
3
4#include <asm-generic/sections.h>
5
6extern char _sbss[], _ebss[];
7
8#endif /* _ASM_M68K_SECTIONS_H */
diff --git a/arch/m68k/include/asm/shm.h b/arch/m68k/include/asm/shm.h
deleted file mode 100644
index fa56ec84a126..000000000000
--- a/arch/m68k/include/asm/shm.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef _M68K_SHM_H
2#define _M68K_SHM_H
3
4
5/* format of page table entries that correspond to shared memory pages
6 currently out in swap space (see also mm/swap.c):
7 bits 0-1 (PAGE_PRESENT) is = 0
8 bits 8..2 (SWP_TYPE) are = SHM_SWP_TYPE
9 bits 31..9 are used like this:
10 bits 15..9 (SHM_ID) the id of the shared memory segment
11 bits 30..16 (SHM_IDX) the index of the page within the shared memory segment
12 (actually only bits 25..16 get used since SHMMAX is so low)
13 bit 31 (SHM_READ_ONLY) flag whether the page belongs to a read-only attach
14*/
15/* on the m68k both bits 0 and 1 must be zero */
16/* format on the sun3 is similar, but bits 30, 31 are set to zero and all
17 others are reduced by 2. --m */
18
19#ifndef CONFIG_SUN3
20#define SHM_ID_SHIFT 9
21#else
22#define SHM_ID_SHIFT 7
23#endif
24#define _SHM_ID_BITS 7
25#define SHM_ID_MASK ((1<<_SHM_ID_BITS)-1)
26
27#define SHM_IDX_SHIFT (SHM_ID_SHIFT+_SHM_ID_BITS)
28#define _SHM_IDX_BITS 15
29#define SHM_IDX_MASK ((1<<_SHM_IDX_BITS)-1)
30
31#endif /* _M68K_SHM_H */
diff --git a/arch/m68k/include/asm/siginfo.h b/arch/m68k/include/asm/siginfo.h
deleted file mode 100644
index 851d3d784b53..000000000000
--- a/arch/m68k/include/asm/siginfo.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _M68K_SIGINFO_H
2#define _M68K_SIGINFO_H
3
4#include <asm-generic/siginfo.h>
5
6#endif
diff --git a/arch/m68k/include/asm/statfs.h b/arch/m68k/include/asm/statfs.h
deleted file mode 100644
index 08d93f14e061..000000000000
--- a/arch/m68k/include/asm/statfs.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _M68K_STATFS_H
2#define _M68K_STATFS_H
3
4#include <asm-generic/statfs.h>
5
6#endif /* _M68K_STATFS_H */
diff --git a/arch/m68k/include/asm/topology.h b/arch/m68k/include/asm/topology.h
deleted file mode 100644
index ca173e9f26ff..000000000000
--- a/arch/m68k/include/asm/topology.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_M68K_TOPOLOGY_H
2#define _ASM_M68K_TOPOLOGY_H
3
4#include <asm-generic/topology.h>
5
6#endif /* _ASM_M68K_TOPOLOGY_H */
diff --git a/arch/m68k/include/asm/types.h b/arch/m68k/include/asm/types.h
deleted file mode 100644
index 89705adcbd52..000000000000
--- a/arch/m68k/include/asm/types.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef _M68K_TYPES_H
2#define _M68K_TYPES_H
3
4/*
5 * This file is never included by application software unless
6 * explicitly requested (e.g., via linux/types.h) in which case the
7 * application is Linux specific so (user-) name space pollution is
8 * not a major issue. However, for interoperability, libraries still
9 * need to be careful to avoid a name clashes.
10 */
11#include <asm-generic/int-ll64.h>
12
13/*
14 * These aren't exported outside the kernel to avoid name space clashes
15 */
16#ifdef __KERNEL__
17
18#define BITS_PER_LONG 32
19
20#endif /* __KERNEL__ */
21
22#endif /* _M68K_TYPES_H */
diff --git a/arch/m68k/include/asm/unaligned.h b/arch/m68k/include/asm/unaligned.h
index f4043ae63db1..2b3ca0bf7a0d 100644
--- a/arch/m68k/include/asm/unaligned.h
+++ b/arch/m68k/include/asm/unaligned.h
@@ -2,7 +2,7 @@
2#define _ASM_M68K_UNALIGNED_H 2#define _ASM_M68K_UNALIGNED_H
3 3
4 4
5#if defined(CONFIG_COLDFIRE) || defined(CONFIG_M68000) 5#ifdef CONFIG_CPU_HAS_NO_UNALIGNED
6#include <linux/unaligned/be_struct.h> 6#include <linux/unaligned/be_struct.h>
7#include <linux/unaligned/le_byteshift.h> 7#include <linux/unaligned/le_byteshift.h>
8#include <linux/unaligned/generic.h> 8#include <linux/unaligned/generic.h>
@@ -12,7 +12,7 @@
12 12
13#else 13#else
14/* 14/*
15 * The m68k can do unaligned accesses itself. 15 * The m68k can do unaligned accesses itself.
16 */ 16 */
17#include <linux/unaligned/access_ok.h> 17#include <linux/unaligned/access_ok.h>
18#include <linux/unaligned/generic.h> 18#include <linux/unaligned/generic.h>
diff --git a/arch/m68k/include/asm/xor.h b/arch/m68k/include/asm/xor.h
deleted file mode 100644
index c82eb12a5b18..000000000000
--- a/arch/m68k/include/asm/xor.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/xor.h>
diff --git a/arch/m68k/kernel/setup_no.c b/arch/m68k/kernel/setup_no.c
index 7dc186b7a85f..71fb29938dba 100644
--- a/arch/m68k/kernel/setup_no.c
+++ b/arch/m68k/kernel/setup_no.c
@@ -218,13 +218,10 @@ void __init setup_arch(char **cmdline_p)
218 printk(KERN_INFO "Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)\n"); 218 printk(KERN_INFO "Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)\n");
219#endif 219#endif
220 220
221 pr_debug("KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x " 221 pr_debug("KERNEL -> TEXT=0x%p-0x%p DATA=0x%p-0x%p BSS=0x%p-0x%p\n",
222 "BSS=0x%06x-0x%06x\n", (int) &_stext, (int) &_etext, 222 _stext, _etext, _sdata, _edata, __bss_start, __bss_stop);
223 (int) &_sdata, (int) &_edata, 223 pr_debug("MEMORY -> ROMFS=0x%p-0x%06lx MEM=0x%06lx-0x%06lx\n ",
224 (int) &_sbss, (int) &_ebss); 224 __bss_stop, memory_start, memory_start, memory_end);
225 pr_debug("MEMORY -> ROMFS=0x%06x-0x%06x MEM=0x%06x-0x%06x\n ",
226 (int) &_ebss, (int) memory_start,
227 (int) memory_start, (int) memory_end);
228 225
229 /* Keep a copy of command line */ 226 /* Keep a copy of command line */
230 *cmdline_p = &command_line[0]; 227 *cmdline_p = &command_line[0];
diff --git a/arch/m68k/kernel/sys_m68k.c b/arch/m68k/kernel/sys_m68k.c
index 8623f8dc16f8..9a5932ec3689 100644
--- a/arch/m68k/kernel/sys_m68k.c
+++ b/arch/m68k/kernel/sys_m68k.c
@@ -479,9 +479,13 @@ sys_atomic_cmpxchg_32(unsigned long newval, int oldval, int d3, int d4, int d5,
479 goto bad_access; 479 goto bad_access;
480 } 480 }
481 481
482 mem_value = *mem; 482 /*
483 * No need to check for EFAULT; we know that the page is
484 * present and writable.
485 */
486 __get_user(mem_value, mem);
483 if (mem_value == oldval) 487 if (mem_value == oldval)
484 *mem = newval; 488 __put_user(newval, mem);
485 489
486 pte_unmap_unlock(pte, ptl); 490 pte_unmap_unlock(pte, ptl);
487 up_read(&mm->mmap_sem); 491 up_read(&mm->mmap_sem);
diff --git a/arch/m68k/kernel/vmlinux-nommu.lds b/arch/m68k/kernel/vmlinux-nommu.lds
index 40e02d9c38b4..06a763f49fd3 100644
--- a/arch/m68k/kernel/vmlinux-nommu.lds
+++ b/arch/m68k/kernel/vmlinux-nommu.lds
@@ -78,9 +78,7 @@ SECTIONS {
78 __init_end = .; 78 __init_end = .;
79 } 79 }
80 80
81 _sbss = .;
82 BSS_SECTION(0, 0, 0) 81 BSS_SECTION(0, 0, 0)
83 _ebss = .;
84 82
85 _end = .; 83 _end = .;
86 84
diff --git a/arch/m68k/kernel/vmlinux-std.lds b/arch/m68k/kernel/vmlinux-std.lds
index 63407c836826..d0993594f558 100644
--- a/arch/m68k/kernel/vmlinux-std.lds
+++ b/arch/m68k/kernel/vmlinux-std.lds
@@ -31,9 +31,7 @@ SECTIONS
31 31
32 RW_DATA_SECTION(16, PAGE_SIZE, THREAD_SIZE) 32 RW_DATA_SECTION(16, PAGE_SIZE, THREAD_SIZE)
33 33
34 _sbss = .;
35 BSS_SECTION(0, 0, 0) 34 BSS_SECTION(0, 0, 0)
36 _ebss = .;
37 35
38 _edata = .; /* End of data section */ 36 _edata = .; /* End of data section */
39 37
diff --git a/arch/m68k/kernel/vmlinux-sun3.lds b/arch/m68k/kernel/vmlinux-sun3.lds
index ad0f46d64c0b..8080469ee6c1 100644
--- a/arch/m68k/kernel/vmlinux-sun3.lds
+++ b/arch/m68k/kernel/vmlinux-sun3.lds
@@ -44,9 +44,7 @@ __init_begin = .;
44 . = ALIGN(PAGE_SIZE); 44 . = ALIGN(PAGE_SIZE);
45 __init_end = .; 45 __init_end = .;
46 46
47 _sbss = .;
48 BSS_SECTION(0, 0, 0) 47 BSS_SECTION(0, 0, 0)
49 _ebss = .;
50 48
51 _end = . ; 49 _end = . ;
52 50
diff --git a/arch/m68k/lib/muldi3.c b/arch/m68k/lib/muldi3.c
index 79e928a525d0..ee5f0b1b5c5d 100644
--- a/arch/m68k/lib/muldi3.c
+++ b/arch/m68k/lib/muldi3.c
@@ -19,7 +19,7 @@ along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330, 19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */ 20Boston, MA 02111-1307, USA. */
21 21
22#if defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE) 22#ifdef CONFIG_CPU_HAS_NO_MULDIV64
23 23
24#define SI_TYPE_SIZE 32 24#define SI_TYPE_SIZE 32
25#define __BITS4 (SI_TYPE_SIZE / 4) 25#define __BITS4 (SI_TYPE_SIZE / 4)
diff --git a/arch/m68k/mm/init_mm.c b/arch/m68k/mm/init_mm.c
index f77f258dce3a..282f9de68966 100644
--- a/arch/m68k/mm/init_mm.c
+++ b/arch/m68k/mm/init_mm.c
@@ -104,7 +104,7 @@ void __init print_memmap(void)
104 MLK_ROUNDUP(__init_begin, __init_end), 104 MLK_ROUNDUP(__init_begin, __init_end),
105 MLK_ROUNDUP(_stext, _etext), 105 MLK_ROUNDUP(_stext, _etext),
106 MLK_ROUNDUP(_sdata, _edata), 106 MLK_ROUNDUP(_sdata, _edata),
107 MLK_ROUNDUP(_sbss, _ebss)); 107 MLK_ROUNDUP(__bss_start, __bss_stop));
108} 108}
109 109
110void __init mem_init(void) 110void __init mem_init(void)
diff --git a/arch/m68k/mm/init_no.c b/arch/m68k/mm/init_no.c
index 345ec0d83e3d..688e3664aea0 100644
--- a/arch/m68k/mm/init_no.c
+++ b/arch/m68k/mm/init_no.c
@@ -91,7 +91,7 @@ void __init mem_init(void)
91 totalram_pages = free_all_bootmem(); 91 totalram_pages = free_all_bootmem();
92 92
93 codek = (_etext - _stext) >> 10; 93 codek = (_etext - _stext) >> 10;
94 datak = (_ebss - _sdata) >> 10; 94 datak = (__bss_stop - _sdata) >> 10;
95 initk = (__init_begin - __init_end) >> 10; 95 initk = (__init_begin - __init_end) >> 10;
96 96
97 tmp = nr_free_pages() << PAGE_SHIFT; 97 tmp = nr_free_pages() << PAGE_SHIFT;
diff --git a/arch/m68k/platform/68328/head-de2.S b/arch/m68k/platform/68328/head-de2.S
index f632fdcb93e9..537d3245b539 100644
--- a/arch/m68k/platform/68328/head-de2.S
+++ b/arch/m68k/platform/68328/head-de2.S
@@ -60,8 +60,8 @@ _start:
60 * Move ROM filesystem above bss :-) 60 * Move ROM filesystem above bss :-)
61 */ 61 */
62 62
63 moveal #_sbss, %a0 /* romfs at the start of bss */ 63 moveal #__bss_start, %a0 /* romfs at the start of bss */
64 moveal #_ebss, %a1 /* Set up destination */ 64 moveal #__bss_stop, %a1 /* Set up destination */
65 movel %a0, %a2 /* Copy of bss start */ 65 movel %a0, %a2 /* Copy of bss start */
66 66
67 movel 8(%a0), %d1 /* Get size of ROMFS */ 67 movel 8(%a0), %d1 /* Get size of ROMFS */
@@ -84,8 +84,8 @@ _start:
84 * Initialize BSS segment to 0 84 * Initialize BSS segment to 0
85 */ 85 */
86 86
87 lea _sbss, %a0 87 lea __bss_start, %a0
88 lea _ebss, %a1 88 lea __bss_stop, %a1
89 89
90 /* Copy 0 to %a0 until %a0 == %a1 */ 90 /* Copy 0 to %a0 until %a0 == %a1 */
912: cmpal %a0, %a1 912: cmpal %a0, %a1
diff --git a/arch/m68k/platform/68328/head-pilot.S b/arch/m68k/platform/68328/head-pilot.S
index 2ebfd6420818..45a9dad29e3d 100644
--- a/arch/m68k/platform/68328/head-pilot.S
+++ b/arch/m68k/platform/68328/head-pilot.S
@@ -110,7 +110,7 @@ L0:
110 movel #CONFIG_VECTORBASE, %d7 110 movel #CONFIG_VECTORBASE, %d7
111 addl #16, %d7 111 addl #16, %d7
112 moveal %d7, %a0 112 moveal %d7, %a0
113 moveal #_ebss, %a1 113 moveal #__bss_stop, %a1
114 lea %a1@(512), %a2 114 lea %a1@(512), %a2
115 115
116 DBG_PUTC('C') 116 DBG_PUTC('C')
@@ -138,8 +138,8 @@ LD1:
138 138
139 DBG_PUTC('E') 139 DBG_PUTC('E')
140 140
141 moveal #_sbss, %a0 141 moveal #__bss_start, %a0
142 moveal #_ebss, %a1 142 moveal #__bss_stop, %a1
143 143
144 /* Copy 0 to %a0 until %a0 == %a1 */ 144 /* Copy 0 to %a0 until %a0 == %a1 */
145L1: 145L1:
@@ -150,7 +150,7 @@ L1:
150 DBG_PUTC('F') 150 DBG_PUTC('F')
151 151
152 /* Copy command line from end of bss to command line */ 152 /* Copy command line from end of bss to command line */
153 moveal #_ebss, %a0 153 moveal #__bss_stop, %a0
154 moveal #command_line, %a1 154 moveal #command_line, %a1
155 lea %a1@(512), %a2 155 lea %a1@(512), %a2
156 156
@@ -165,7 +165,7 @@ L3:
165 165
166 movel #_sdata, %d0 166 movel #_sdata, %d0
167 movel %d0, _rambase 167 movel %d0, _rambase
168 movel #_ebss, %d0 168 movel #__bss_stop, %d0
169 movel %d0, _ramstart 169 movel %d0, _ramstart
170 170
171 movel %a4, %d0 171 movel %a4, %d0
diff --git a/arch/m68k/platform/68328/head-ram.S b/arch/m68k/platform/68328/head-ram.S
index 7f1aeeacb219..5189ef926098 100644
--- a/arch/m68k/platform/68328/head-ram.S
+++ b/arch/m68k/platform/68328/head-ram.S
@@ -76,8 +76,8 @@ pclp3:
76 beq pclp3 76 beq pclp3
77#endif /* DEBUG */ 77#endif /* DEBUG */
78 moveal #0x007ffff0, %ssp 78 moveal #0x007ffff0, %ssp
79 moveal #_sbss, %a0 79 moveal #__bss_start, %a0
80 moveal #_ebss, %a1 80 moveal #__bss_stop, %a1
81 81
82 /* Copy 0 to %a0 until %a0 >= %a1 */ 82 /* Copy 0 to %a0 until %a0 >= %a1 */
83L1: 83L1:
diff --git a/arch/m68k/platform/68328/head-rom.S b/arch/m68k/platform/68328/head-rom.S
index a5ff96d0295f..3dff98ba2e97 100644
--- a/arch/m68k/platform/68328/head-rom.S
+++ b/arch/m68k/platform/68328/head-rom.S
@@ -59,8 +59,8 @@ _stext: movew #0x2700,%sr
59 cmpal %a1, %a2 59 cmpal %a1, %a2
60 bhi 1b 60 bhi 1b
61 61
62 moveal #_sbss, %a0 62 moveal #__bss_start, %a0
63 moveal #_ebss, %a1 63 moveal #__bss_stop, %a1
64 /* Copy 0 to %a0 until %a0 == %a1 */ 64 /* Copy 0 to %a0 until %a0 == %a1 */
65 65
661: 661:
@@ -70,7 +70,7 @@ _stext: movew #0x2700,%sr
70 70
71 movel #_sdata, %d0 71 movel #_sdata, %d0
72 movel %d0, _rambase 72 movel %d0, _rambase
73 movel #_ebss, %d0 73 movel #__bss_stop, %d0
74 movel %d0, _ramstart 74 movel %d0, _ramstart
75 movel #RAMEND-CONFIG_MEMORY_RESERVE*0x100000, %d0 75 movel #RAMEND-CONFIG_MEMORY_RESERVE*0x100000, %d0
76 movel %d0, _ramend 76 movel %d0, _ramend
diff --git a/arch/m68k/platform/68360/head-ram.S b/arch/m68k/platform/68360/head-ram.S
index 8eb94fb6b971..acd213170d80 100644
--- a/arch/m68k/platform/68360/head-ram.S
+++ b/arch/m68k/platform/68360/head-ram.S
@@ -219,8 +219,8 @@ LD1:
219 cmp.l #_edata, %a1 219 cmp.l #_edata, %a1
220 blt LD1 220 blt LD1
221 221
222 moveal #_sbss, %a0 222 moveal #__bss_start, %a0
223 moveal #_ebss, %a1 223 moveal #__bss_stop, %a1
224 224
225 /* Copy 0 to %a0 until %a0 == %a1 */ 225 /* Copy 0 to %a0 until %a0 == %a1 */
226L1: 226L1:
@@ -234,7 +234,7 @@ load_quicc:
234store_ram_size: 234store_ram_size:
235 /* Set ram size information */ 235 /* Set ram size information */
236 move.l #_sdata, _rambase 236 move.l #_sdata, _rambase
237 move.l #_ebss, _ramstart 237 move.l #__bss_stop, _ramstart
238 move.l #RAMEND, %d0 238 move.l #RAMEND, %d0
239 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/ 239 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
240 move.l %d0, _ramend /* Different from RAMEND.*/ 240 move.l %d0, _ramend /* Different from RAMEND.*/
diff --git a/arch/m68k/platform/68360/head-rom.S b/arch/m68k/platform/68360/head-rom.S
index 97510e55b802..dfc756d99886 100644
--- a/arch/m68k/platform/68360/head-rom.S
+++ b/arch/m68k/platform/68360/head-rom.S
@@ -13,7 +13,7 @@
13 */ 13 */
14 14
15.global _stext 15.global _stext
16.global _sbss 16.global __bss_start
17.global _start 17.global _start
18 18
19.global _rambase 19.global _rambase
@@ -229,8 +229,8 @@ LD1:
229 cmp.l #_edata, %a1 229 cmp.l #_edata, %a1
230 blt LD1 230 blt LD1
231 231
232 moveal #_sbss, %a0 232 moveal #__bss_start, %a0
233 moveal #_ebss, %a1 233 moveal #__bss_stop, %a1
234 234
235 /* Copy 0 to %a0 until %a0 == %a1 */ 235 /* Copy 0 to %a0 until %a0 == %a1 */
236L1: 236L1:
@@ -244,7 +244,7 @@ load_quicc:
244store_ram_size: 244store_ram_size:
245 /* Set ram size information */ 245 /* Set ram size information */
246 move.l #_sdata, _rambase 246 move.l #_sdata, _rambase
247 move.l #_ebss, _ramstart 247 move.l #__bss_stop, _ramstart
248 move.l #RAMEND, %d0 248 move.l #RAMEND, %d0
249 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/ 249 sub.l #0x1000, %d0 /* Reserve 4K for stack space.*/
250 move.l %d0, _ramend /* Different from RAMEND.*/ 250 move.l %d0, _ramend /* Different from RAMEND.*/
diff --git a/arch/m68k/platform/coldfire/head.S b/arch/m68k/platform/coldfire/head.S
index 4e0c9eb3bd1f..b88f5716f357 100644
--- a/arch/m68k/platform/coldfire/head.S
+++ b/arch/m68k/platform/coldfire/head.S
@@ -230,8 +230,8 @@ _vstart:
230 /* 230 /*
231 * Move ROM filesystem above bss :-) 231 * Move ROM filesystem above bss :-)
232 */ 232 */
233 lea _sbss,%a0 /* get start of bss */ 233 lea __bss_start,%a0 /* get start of bss */
234 lea _ebss,%a1 /* set up destination */ 234 lea __bss_stop,%a1 /* set up destination */
235 movel %a0,%a2 /* copy of bss start */ 235 movel %a0,%a2 /* copy of bss start */
236 236
237 movel 8(%a0),%d0 /* get size of ROMFS */ 237 movel 8(%a0),%d0 /* get size of ROMFS */
@@ -249,7 +249,7 @@ _copy_romfs:
249 bne _copy_romfs 249 bne _copy_romfs
250 250
251#else /* CONFIG_ROMFS_FS */ 251#else /* CONFIG_ROMFS_FS */
252 lea _ebss,%a1 252 lea __bss_stop,%a1
253 movel %a1,_ramstart 253 movel %a1,_ramstart
254#endif /* CONFIG_ROMFS_FS */ 254#endif /* CONFIG_ROMFS_FS */
255 255
@@ -257,8 +257,8 @@ _copy_romfs:
257 /* 257 /*
258 * Zero out the bss region. 258 * Zero out the bss region.
259 */ 259 */
260 lea _sbss,%a0 /* get start of bss */ 260 lea __bss_start,%a0 /* get start of bss */
261 lea _ebss,%a1 /* get end of bss */ 261 lea __bss_stop,%a1 /* get end of bss */
262 clrl %d0 /* set value */ 262 clrl %d0 /* set value */
263_clear_bss: 263_clear_bss:
264 movel %d0,(%a0)+ /* clear each word */ 264 movel %d0,(%a0)+ /* clear each word */
diff --git a/arch/m68k/sun3/prom/init.c b/arch/m68k/sun3/prom/init.c
index d8e6349336b4..eeba067d565f 100644
--- a/arch/m68k/sun3/prom/init.c
+++ b/arch/m68k/sun3/prom/init.c
@@ -22,57 +22,13 @@ int prom_root_node;
22struct linux_nodeops *prom_nodeops; 22struct linux_nodeops *prom_nodeops;
23 23
24/* You must call prom_init() before you attempt to use any of the 24/* You must call prom_init() before you attempt to use any of the
25 * routines in the prom library. It returns 0 on success, 1 on 25 * routines in the prom library.
26 * failure. It gets passed the pointer to the PROM vector. 26 * It gets passed the pointer to the PROM vector.
27 */ 27 */
28 28
29extern void prom_meminit(void);
30extern void prom_ranges_init(void);
31
32void __init prom_init(struct linux_romvec *rp) 29void __init prom_init(struct linux_romvec *rp)
33{ 30{
34 romvec = rp; 31 romvec = rp;
35#ifndef CONFIG_SUN3
36 switch(romvec->pv_romvers) {
37 case 0:
38 prom_vers = PROM_V0;
39 break;
40 case 2:
41 prom_vers = PROM_V2;
42 break;
43 case 3:
44 prom_vers = PROM_V3;
45 break;
46 case 4:
47 prom_vers = PROM_P1275;
48 prom_printf("PROMLIB: Sun IEEE Prom not supported yet\n");
49 prom_halt();
50 break;
51 default:
52 prom_printf("PROMLIB: Bad PROM version %d\n",
53 romvec->pv_romvers);
54 prom_halt();
55 break;
56 };
57
58 prom_rev = romvec->pv_plugin_revision;
59 prom_prev = romvec->pv_printrev;
60 prom_nodeops = romvec->pv_nodeops;
61
62 prom_root_node = prom_getsibling(0);
63 if((prom_root_node == 0) || (prom_root_node == -1))
64 prom_halt();
65
66 if((((unsigned long) prom_nodeops) == 0) ||
67 (((unsigned long) prom_nodeops) == -1))
68 prom_halt();
69
70 prom_meminit();
71
72 prom_ranges_init();
73#endif
74// printk("PROMLIB: Sun Boot Prom Version %d Revision %d\n",
75// romvec->pv_romvers, prom_rev);
76 32
77 /* Initialization successful. */ 33 /* Initialization successful. */
78 return; 34 return;
diff --git a/arch/microblaze/include/asm/sections.h b/arch/microblaze/include/asm/sections.h
index 4487e150b455..c07ed5d2a820 100644
--- a/arch/microblaze/include/asm/sections.h
+++ b/arch/microblaze/include/asm/sections.h
@@ -18,10 +18,6 @@ extern char _ssbss[], _esbss[];
18extern unsigned long __ivt_start[], __ivt_end[]; 18extern unsigned long __ivt_start[], __ivt_end[];
19extern char _etext[], _stext[]; 19extern char _etext[], _stext[];
20 20
21# ifdef CONFIG_MTD_UCLINUX
22extern char *_ebss;
23# endif
24
25extern u32 _fdt_start[], _fdt_end[]; 21extern u32 _fdt_start[], _fdt_end[];
26 22
27# endif /* !__ASSEMBLY__ */ 23# endif /* !__ASSEMBLY__ */
diff --git a/arch/microblaze/kernel/microblaze_ksyms.c b/arch/microblaze/kernel/microblaze_ksyms.c
index bb4907c828dc..2b25bcf05c00 100644
--- a/arch/microblaze/kernel/microblaze_ksyms.c
+++ b/arch/microblaze/kernel/microblaze_ksyms.c
@@ -21,9 +21,6 @@
21#include <linux/ftrace.h> 21#include <linux/ftrace.h>
22#include <linux/uaccess.h> 22#include <linux/uaccess.h>
23 23
24extern char *_ebss;
25EXPORT_SYMBOL_GPL(_ebss);
26
27#ifdef CONFIG_FUNCTION_TRACER 24#ifdef CONFIG_FUNCTION_TRACER
28extern void _mcount(void); 25extern void _mcount(void);
29EXPORT_SYMBOL(_mcount); 26EXPORT_SYMBOL(_mcount);
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
index 16d8dfd9094b..4da971d4392f 100644
--- a/arch/microblaze/kernel/setup.c
+++ b/arch/microblaze/kernel/setup.c
@@ -121,7 +121,7 @@ void __init machine_early_init(const char *cmdline, unsigned int ram,
121 121
122 /* Move ROMFS out of BSS before clearing it */ 122 /* Move ROMFS out of BSS before clearing it */
123 if (romfs_size > 0) { 123 if (romfs_size > 0) {
124 memmove(&_ebss, (int *)romfs_base, romfs_size); 124 memmove(&__bss_stop, (int *)romfs_base, romfs_size);
125 klimit += romfs_size; 125 klimit += romfs_size;
126 } 126 }
127#endif 127#endif
@@ -165,7 +165,7 @@ void __init machine_early_init(const char *cmdline, unsigned int ram,
165 BUG_ON(romfs_size < 0); /* What else can we do? */ 165 BUG_ON(romfs_size < 0); /* What else can we do? */
166 166
167 printk("Moved 0x%08x bytes from 0x%08x to 0x%08x\n", 167 printk("Moved 0x%08x bytes from 0x%08x to 0x%08x\n",
168 romfs_size, romfs_base, (unsigned)&_ebss); 168 romfs_size, romfs_base, (unsigned)&__bss_stop);
169 169
170 printk("New klimit: 0x%08x\n", (unsigned)klimit); 170 printk("New klimit: 0x%08x\n", (unsigned)klimit);
171#endif 171#endif
diff --git a/arch/microblaze/kernel/vmlinux.lds.S b/arch/microblaze/kernel/vmlinux.lds.S
index 109e9d86ade4..936d01a689d7 100644
--- a/arch/microblaze/kernel/vmlinux.lds.S
+++ b/arch/microblaze/kernel/vmlinux.lds.S
@@ -131,7 +131,6 @@ SECTIONS {
131 *(COMMON) 131 *(COMMON)
132 . = ALIGN (4) ; 132 . = ALIGN (4) ;
133 __bss_stop = . ; 133 __bss_stop = . ;
134 _ebss = . ;
135 } 134 }
136 . = ALIGN(PAGE_SIZE); 135 . = ALIGN(PAGE_SIZE);
137 _end = .; 136 _end = .;
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index e3efc06e6409..331d574df99c 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -77,6 +77,7 @@ config AR7
77 select SYS_SUPPORTS_ZBOOT_UART16550 77 select SYS_SUPPORTS_ZBOOT_UART16550
78 select ARCH_REQUIRE_GPIOLIB 78 select ARCH_REQUIRE_GPIOLIB
79 select VLYNQ 79 select VLYNQ
80 select HAVE_CLK
80 help 81 help
81 Support for the Texas Instruments AR7 System-on-a-Chip 82 Support for the Texas Instruments AR7 System-on-a-Chip
82 family: TNETD7100, 7200 and 7300. 83 family: TNETD7100, 7200 and 7300.
@@ -124,6 +125,7 @@ config BCM63XX
124 select SYS_HAS_EARLY_PRINTK 125 select SYS_HAS_EARLY_PRINTK
125 select SWAP_IO_SPACE 126 select SWAP_IO_SPACE
126 select ARCH_REQUIRE_GPIOLIB 127 select ARCH_REQUIRE_GPIOLIB
128 select HAVE_CLK
127 help 129 help
128 Support for BCM63XX based boards 130 Support for BCM63XX based boards
129 131
diff --git a/arch/mips/include/asm/clock.h b/arch/mips/include/asm/clock.h
index 83894aa7932c..c9456e7a7283 100644
--- a/arch/mips/include/asm/clock.h
+++ b/arch/mips/include/asm/clock.h
@@ -50,15 +50,4 @@ void clk_recalc_rate(struct clk *);
50int clk_register(struct clk *); 50int clk_register(struct clk *);
51void clk_unregister(struct clk *); 51void clk_unregister(struct clk *);
52 52
53/* the exported API, in addition to clk_set_rate */
54/**
55 * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
56 * @clk: clock source
57 * @rate: desired clock rate in Hz
58 * @algo_id: algorithm id to be passed down to ops->set_rate
59 *
60 * Returns success (0) or negative errno.
61 */
62int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
63
64#endif /* __ASM_MIPS_CLOCK_H */ 53#endif /* __ASM_MIPS_CLOCK_H */
diff --git a/arch/mips/include/asm/mach-loongson/loongson.h b/arch/mips/include/asm/mach-loongson/loongson.h
index 06367c37e1b2..5222a007bc21 100644
--- a/arch/mips/include/asm/mach-loongson/loongson.h
+++ b/arch/mips/include/asm/mach-loongson/loongson.h
@@ -245,7 +245,6 @@ static inline void do_perfcnt_IRQ(void)
245 245
246#ifdef CONFIG_CPU_SUPPORTS_CPUFREQ 246#ifdef CONFIG_CPU_SUPPORTS_CPUFREQ
247#include <linux/cpufreq.h> 247#include <linux/cpufreq.h>
248extern void loongson2_cpu_wait(void);
249extern struct cpufreq_frequency_table loongson2_clockmod_table[]; 248extern struct cpufreq_frequency_table loongson2_clockmod_table[];
250 249
251/* Chip Config */ 250/* Chip Config */
diff --git a/arch/mips/kernel/cpufreq/Makefile b/arch/mips/kernel/cpufreq/Makefile
index c3479a432efe..05a5715ee38c 100644
--- a/arch/mips/kernel/cpufreq/Makefile
+++ b/arch/mips/kernel/cpufreq/Makefile
@@ -2,4 +2,4 @@
2# Makefile for the Linux/MIPS cpufreq. 2# Makefile for the Linux/MIPS cpufreq.
3# 3#
4 4
5obj-$(CONFIG_LOONGSON2_CPUFREQ) += loongson2_cpufreq.o loongson2_clock.o 5obj-$(CONFIG_LOONGSON2_CPUFREQ) += loongson2_cpufreq.o
diff --git a/arch/mips/kernel/cpufreq/loongson2_cpufreq.c b/arch/mips/kernel/cpufreq/loongson2_cpufreq.c
index ae5db206347c..e7c98e2b78b6 100644
--- a/arch/mips/kernel/cpufreq/loongson2_cpufreq.c
+++ b/arch/mips/kernel/cpufreq/loongson2_cpufreq.c
@@ -19,7 +19,7 @@
19 19
20#include <asm/clock.h> 20#include <asm/clock.h>
21 21
22#include <loongson.h> 22#include <asm/mach-loongson/loongson.h>
23 23
24static uint nowait; 24static uint nowait;
25 25
@@ -181,6 +181,25 @@ static struct platform_driver platform_driver = {
181 .id_table = platform_device_ids, 181 .id_table = platform_device_ids,
182}; 182};
183 183
184/*
185 * This is the simple version of Loongson-2 wait, Maybe we need do this in
186 * interrupt disabled context.
187 */
188
189static DEFINE_SPINLOCK(loongson2_wait_lock);
190
191static void loongson2_cpu_wait(void)
192{
193 unsigned long flags;
194 u32 cpu_freq;
195
196 spin_lock_irqsave(&loongson2_wait_lock, flags);
197 cpu_freq = LOONGSON_CHIPCFG0;
198 LOONGSON_CHIPCFG0 &= ~0x7; /* Put CPU into wait mode */
199 LOONGSON_CHIPCFG0 = cpu_freq; /* Restore CPU state */
200 spin_unlock_irqrestore(&loongson2_wait_lock, flags);
201}
202
184static int __init cpufreq_init(void) 203static int __init cpufreq_init(void)
185{ 204{
186 int ret; 205 int ret;
diff --git a/arch/mips/lantiq/clk.c b/arch/mips/lantiq/clk.c
index d3bcc33f4699..ce2f129b081f 100644
--- a/arch/mips/lantiq/clk.c
+++ b/arch/mips/lantiq/clk.c
@@ -135,6 +135,11 @@ void clk_deactivate(struct clk *clk)
135} 135}
136EXPORT_SYMBOL(clk_deactivate); 136EXPORT_SYMBOL(clk_deactivate);
137 137
138struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
139{
140 return NULL;
141}
142
138static inline u32 get_counter_resolution(void) 143static inline u32 get_counter_resolution(void)
139{ 144{
140 u32 res; 145 u32 res;
diff --git a/arch/mips/lantiq/prom.c b/arch/mips/lantiq/prom.c
index d185e8477fdf..6cfd6117fbfd 100644
--- a/arch/mips/lantiq/prom.c
+++ b/arch/mips/lantiq/prom.c
@@ -8,7 +8,10 @@
8 8
9#include <linux/export.h> 9#include <linux/export.h>
10#include <linux/clk.h> 10#include <linux/clk.h>
11#include <linux/bootmem.h>
11#include <linux/of_platform.h> 12#include <linux/of_platform.h>
13#include <linux/of_fdt.h>
14
12#include <asm/bootinfo.h> 15#include <asm/bootinfo.h>
13#include <asm/time.h> 16#include <asm/time.h>
14 17
@@ -70,6 +73,25 @@ void __init plat_mem_setup(void)
70 __dt_setup_arch(&__dtb_start); 73 __dt_setup_arch(&__dtb_start);
71} 74}
72 75
76void __init device_tree_init(void)
77{
78 unsigned long base, size;
79
80 if (!initial_boot_params)
81 return;
82
83 base = virt_to_phys((void *)initial_boot_params);
84 size = be32_to_cpu(initial_boot_params->totalsize);
85
86 /* Before we do anything, lets reserve the dt blob */
87 reserve_bootmem(base, size, BOOTMEM_DEFAULT);
88
89 unflatten_device_tree();
90
91 /* free the space reserved for the dt blob */
92 free_bootmem(base, size);
93}
94
73void __init prom_init(void) 95void __init prom_init(void)
74{ 96{
75 /* call the soc specific detetcion code and get it to fill soc_info */ 97 /* call the soc specific detetcion code and get it to fill soc_info */
diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c
index 83780f7c842b..befbb760ab76 100644
--- a/arch/mips/lantiq/xway/sysctrl.c
+++ b/arch/mips/lantiq/xway/sysctrl.c
@@ -20,10 +20,12 @@
20 20
21/* clock control register */ 21/* clock control register */
22#define CGU_IFCCR 0x0018 22#define CGU_IFCCR 0x0018
23#define CGU_IFCCR_VR9 0x0024
23/* system clock register */ 24/* system clock register */
24#define CGU_SYS 0x0010 25#define CGU_SYS 0x0010
25/* pci control register */ 26/* pci control register */
26#define CGU_PCICR 0x0034 27#define CGU_PCICR 0x0034
28#define CGU_PCICR_VR9 0x0038
27/* ephy configuration register */ 29/* ephy configuration register */
28#define CGU_EPHY 0x10 30#define CGU_EPHY 0x10
29/* power control register */ 31/* power control register */
@@ -80,6 +82,9 @@ static void __iomem *pmu_membase;
80void __iomem *ltq_cgu_membase; 82void __iomem *ltq_cgu_membase;
81void __iomem *ltq_ebu_membase; 83void __iomem *ltq_ebu_membase;
82 84
85static u32 ifccr = CGU_IFCCR;
86static u32 pcicr = CGU_PCICR;
87
83/* legacy function kept alive to ease clkdev transition */ 88/* legacy function kept alive to ease clkdev transition */
84void ltq_pmu_enable(unsigned int module) 89void ltq_pmu_enable(unsigned int module)
85{ 90{
@@ -103,14 +108,14 @@ EXPORT_SYMBOL(ltq_pmu_disable);
103/* enable a hw clock */ 108/* enable a hw clock */
104static int cgu_enable(struct clk *clk) 109static int cgu_enable(struct clk *clk)
105{ 110{
106 ltq_cgu_w32(ltq_cgu_r32(CGU_IFCCR) | clk->bits, CGU_IFCCR); 111 ltq_cgu_w32(ltq_cgu_r32(ifccr) | clk->bits, ifccr);
107 return 0; 112 return 0;
108} 113}
109 114
110/* disable a hw clock */ 115/* disable a hw clock */
111static void cgu_disable(struct clk *clk) 116static void cgu_disable(struct clk *clk)
112{ 117{
113 ltq_cgu_w32(ltq_cgu_r32(CGU_IFCCR) & ~clk->bits, CGU_IFCCR); 118 ltq_cgu_w32(ltq_cgu_r32(ifccr) & ~clk->bits, ifccr);
114} 119}
115 120
116/* enable a clock gate */ 121/* enable a clock gate */
@@ -138,22 +143,22 @@ static void pmu_disable(struct clk *clk)
138/* the pci enable helper */ 143/* the pci enable helper */
139static int pci_enable(struct clk *clk) 144static int pci_enable(struct clk *clk)
140{ 145{
141 unsigned int ifccr = ltq_cgu_r32(CGU_IFCCR); 146 unsigned int val = ltq_cgu_r32(ifccr);
142 /* set bus clock speed */ 147 /* set bus clock speed */
143 if (of_machine_is_compatible("lantiq,ar9")) { 148 if (of_machine_is_compatible("lantiq,ar9")) {
144 ifccr &= ~0x1f00000; 149 val &= ~0x1f00000;
145 if (clk->rate == CLOCK_33M) 150 if (clk->rate == CLOCK_33M)
146 ifccr |= 0xe00000; 151 val |= 0xe00000;
147 else 152 else
148 ifccr |= 0x700000; /* 62.5M */ 153 val |= 0x700000; /* 62.5M */
149 } else { 154 } else {
150 ifccr &= ~0xf00000; 155 val &= ~0xf00000;
151 if (clk->rate == CLOCK_33M) 156 if (clk->rate == CLOCK_33M)
152 ifccr |= 0x800000; 157 val |= 0x800000;
153 else 158 else
154 ifccr |= 0x400000; /* 62.5M */ 159 val |= 0x400000; /* 62.5M */
155 } 160 }
156 ltq_cgu_w32(ifccr, CGU_IFCCR); 161 ltq_cgu_w32(val, ifccr);
157 pmu_enable(clk); 162 pmu_enable(clk);
158 return 0; 163 return 0;
159} 164}
@@ -161,18 +166,16 @@ static int pci_enable(struct clk *clk)
161/* enable the external clock as a source */ 166/* enable the external clock as a source */
162static int pci_ext_enable(struct clk *clk) 167static int pci_ext_enable(struct clk *clk)
163{ 168{
164 ltq_cgu_w32(ltq_cgu_r32(CGU_IFCCR) & ~(1 << 16), 169 ltq_cgu_w32(ltq_cgu_r32(ifccr) & ~(1 << 16), ifccr);
165 CGU_IFCCR); 170 ltq_cgu_w32((1 << 30), pcicr);
166 ltq_cgu_w32((1 << 30), CGU_PCICR);
167 return 0; 171 return 0;
168} 172}
169 173
170/* disable the external clock as a source */ 174/* disable the external clock as a source */
171static void pci_ext_disable(struct clk *clk) 175static void pci_ext_disable(struct clk *clk)
172{ 176{
173 ltq_cgu_w32(ltq_cgu_r32(CGU_IFCCR) | (1 << 16), 177 ltq_cgu_w32(ltq_cgu_r32(ifccr) | (1 << 16), ifccr);
174 CGU_IFCCR); 178 ltq_cgu_w32((1 << 31) | (1 << 30), pcicr);
175 ltq_cgu_w32((1 << 31) | (1 << 30), CGU_PCICR);
176} 179}
177 180
178/* enable a clockout source */ 181/* enable a clockout source */
@@ -184,11 +187,11 @@ static int clkout_enable(struct clk *clk)
184 for (i = 0; i < 4; i++) { 187 for (i = 0; i < 4; i++) {
185 if (clk->rates[i] == clk->rate) { 188 if (clk->rates[i] == clk->rate) {
186 int shift = 14 - (2 * clk->module); 189 int shift = 14 - (2 * clk->module);
187 unsigned int ifccr = ltq_cgu_r32(CGU_IFCCR); 190 unsigned int val = ltq_cgu_r32(ifccr);
188 191
189 ifccr &= ~(3 << shift); 192 val &= ~(3 << shift);
190 ifccr |= i << shift; 193 val |= i << shift;
191 ltq_cgu_w32(ifccr, CGU_IFCCR); 194 ltq_cgu_w32(val, ifccr);
192 return 0; 195 return 0;
193 } 196 }
194 } 197 }
@@ -336,8 +339,12 @@ void __init ltq_soc_init(void)
336 clkdev_add_clkout(); 339 clkdev_add_clkout();
337 340
338 /* add the soc dependent clocks */ 341 /* add the soc dependent clocks */
339 if (!of_machine_is_compatible("lantiq,vr9")) 342 if (of_machine_is_compatible("lantiq,vr9")) {
343 ifccr = CGU_IFCCR_VR9;
344 pcicr = CGU_PCICR_VR9;
345 } else {
340 clkdev_add_pmu("1e180000.etop", NULL, 0, PMU_PPE); 346 clkdev_add_pmu("1e180000.etop", NULL, 0, PMU_PPE);
347 }
341 348
342 if (!of_machine_is_compatible("lantiq,ase")) { 349 if (!of_machine_is_compatible("lantiq,ase")) {
343 clkdev_add_pmu("1e100c00.serial", NULL, 0, PMU_ASC1); 350 clkdev_add_pmu("1e100c00.serial", NULL, 0, PMU_ASC1);
diff --git a/arch/mips/loongson/Kconfig b/arch/mips/loongson/Kconfig
index aca93eed8779..263beb9322a8 100644
--- a/arch/mips/loongson/Kconfig
+++ b/arch/mips/loongson/Kconfig
@@ -41,6 +41,7 @@ config LEMOTE_MACH2F
41 select CSRC_R4K if ! MIPS_EXTERNAL_TIMER 41 select CSRC_R4K if ! MIPS_EXTERNAL_TIMER
42 select DMA_NONCOHERENT 42 select DMA_NONCOHERENT
43 select GENERIC_ISA_DMA_SUPPORT_BROKEN 43 select GENERIC_ISA_DMA_SUPPORT_BROKEN
44 select HAVE_CLK
44 select HW_HAS_PCI 45 select HW_HAS_PCI
45 select I8259 46 select I8259
46 select IRQ_CPU 47 select IRQ_CPU
diff --git a/arch/mips/loongson/lemote-2f/Makefile b/arch/mips/loongson/lemote-2f/Makefile
index 8699a53f0477..4f9eaa328a16 100644
--- a/arch/mips/loongson/lemote-2f/Makefile
+++ b/arch/mips/loongson/lemote-2f/Makefile
@@ -2,7 +2,7 @@
2# Makefile for lemote loongson2f family machines 2# Makefile for lemote loongson2f family machines
3# 3#
4 4
5obj-y += machtype.o irq.o reset.o ec_kb3310b.o 5obj-y += clock.o machtype.o irq.o reset.o ec_kb3310b.o
6 6
7# 7#
8# Suspend Support 8# Suspend Support
diff --git a/arch/mips/kernel/cpufreq/loongson2_clock.c b/arch/mips/loongson/lemote-2f/clock.c
index 5426779d9fdb..bc739d4bab2e 100644
--- a/arch/mips/kernel/cpufreq/loongson2_clock.c
+++ b/arch/mips/loongson/lemote-2f/clock.c
@@ -6,14 +6,17 @@
6 * License. See the file "COPYING" in the main directory of this archive 6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details. 7 * for more details.
8 */ 8 */
9 9#include <linux/clk.h>
10#include <linux/module.h>
11#include <linux/cpufreq.h> 10#include <linux/cpufreq.h>
12#include <linux/platform_device.h> 11#include <linux/errno.h>
12#include <linux/export.h>
13#include <linux/init.h>
14#include <linux/list.h>
15#include <linux/mutex.h>
16#include <linux/spinlock.h>
13 17
14#include <asm/clock.h> 18#include <asm/clock.h>
15 19#include <asm/mach-loongson/loongson.h>
16#include <loongson.h>
17 20
18static LIST_HEAD(clock_list); 21static LIST_HEAD(clock_list);
19static DEFINE_SPINLOCK(clock_lock); 22static DEFINE_SPINLOCK(clock_lock);
@@ -89,12 +92,6 @@ EXPORT_SYMBOL(clk_put);
89 92
90int clk_set_rate(struct clk *clk, unsigned long rate) 93int clk_set_rate(struct clk *clk, unsigned long rate)
91{ 94{
92 return clk_set_rate_ex(clk, rate, 0);
93}
94EXPORT_SYMBOL_GPL(clk_set_rate);
95
96int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
97{
98 int ret = 0; 95 int ret = 0;
99 int regval; 96 int regval;
100 int i; 97 int i;
@@ -103,7 +100,7 @@ int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
103 unsigned long flags; 100 unsigned long flags;
104 101
105 spin_lock_irqsave(&clock_lock, flags); 102 spin_lock_irqsave(&clock_lock, flags);
106 ret = clk->ops->set_rate(clk, rate, algo_id); 103 ret = clk->ops->set_rate(clk, rate, 0);
107 spin_unlock_irqrestore(&clock_lock, flags); 104 spin_unlock_irqrestore(&clock_lock, flags);
108 } 105 }
109 106
@@ -129,7 +126,7 @@ int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
129 126
130 return ret; 127 return ret;
131} 128}
132EXPORT_SYMBOL_GPL(clk_set_rate_ex); 129EXPORT_SYMBOL_GPL(clk_set_rate);
133 130
134long clk_round_rate(struct clk *clk, unsigned long rate) 131long clk_round_rate(struct clk *clk, unsigned long rate)
135{ 132{
@@ -146,26 +143,3 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
146 return rate; 143 return rate;
147} 144}
148EXPORT_SYMBOL_GPL(clk_round_rate); 145EXPORT_SYMBOL_GPL(clk_round_rate);
149
150/*
151 * This is the simple version of Loongson-2 wait, Maybe we need do this in
152 * interrupt disabled content
153 */
154
155DEFINE_SPINLOCK(loongson2_wait_lock);
156void loongson2_cpu_wait(void)
157{
158 u32 cpu_freq;
159 unsigned long flags;
160
161 spin_lock_irqsave(&loongson2_wait_lock, flags);
162 cpu_freq = LOONGSON_CHIPCFG0;
163 LOONGSON_CHIPCFG0 &= ~0x7; /* Put CPU into wait mode */
164 LOONGSON_CHIPCFG0 = cpu_freq; /* Restore CPU state */
165 spin_unlock_irqrestore(&loongson2_wait_lock, flags);
166}
167EXPORT_SYMBOL_GPL(loongson2_cpu_wait);
168
169MODULE_AUTHOR("Yanhua <yanh@lemote.com>");
170MODULE_DESCRIPTION("cpufreq driver for Loongson 2F");
171MODULE_LICENSE("GPL");
diff --git a/arch/mips/loongson1/Kconfig b/arch/mips/loongson1/Kconfig
index 237fa214de9f..a9a14d6e81af 100644
--- a/arch/mips/loongson1/Kconfig
+++ b/arch/mips/loongson1/Kconfig
@@ -15,6 +15,7 @@ config LOONGSON1_LS1B
15 select SYS_SUPPORTS_LITTLE_ENDIAN 15 select SYS_SUPPORTS_LITTLE_ENDIAN
16 select SYS_SUPPORTS_HIGHMEM 16 select SYS_SUPPORTS_HIGHMEM
17 select SYS_HAS_EARLY_PRINTK 17 select SYS_HAS_EARLY_PRINTK
18 select HAVE_CLK
18 19
19endchoice 20endchoice
20 21
diff --git a/arch/mips/loongson1/common/clock.c b/arch/mips/loongson1/common/clock.c
index 2d98fb030596..1bbbbec12085 100644
--- a/arch/mips/loongson1/common/clock.c
+++ b/arch/mips/loongson1/common/clock.c
@@ -38,12 +38,28 @@ struct clk *clk_get(struct device *dev, const char *name)
38} 38}
39EXPORT_SYMBOL(clk_get); 39EXPORT_SYMBOL(clk_get);
40 40
41int clk_enable(struct clk *clk)
42{
43 return 0;
44}
45EXPORT_SYMBOL(clk_enable);
46
47void clk_disable(struct clk *clk)
48{
49}
50EXPORT_SYMBOL(clk_disable);
51
41unsigned long clk_get_rate(struct clk *clk) 52unsigned long clk_get_rate(struct clk *clk)
42{ 53{
43 return clk->rate; 54 return clk->rate;
44} 55}
45EXPORT_SYMBOL(clk_get_rate); 56EXPORT_SYMBOL(clk_get_rate);
46 57
58void clk_put(struct clk *clk)
59{
60}
61EXPORT_SYMBOL(clk_put);
62
47static void pll_clk_init(struct clk *clk) 63static void pll_clk_init(struct clk *clk)
48{ 64{
49 u32 pll; 65 u32 pll;
diff --git a/arch/mips/txx9/Kconfig b/arch/mips/txx9/Kconfig
index 852ae4bb7a85..6d40bc783459 100644
--- a/arch/mips/txx9/Kconfig
+++ b/arch/mips/txx9/Kconfig
@@ -20,6 +20,7 @@ config MACH_TXX9
20 select SYS_SUPPORTS_32BIT_KERNEL 20 select SYS_SUPPORTS_32BIT_KERNEL
21 select SYS_SUPPORTS_LITTLE_ENDIAN 21 select SYS_SUPPORTS_LITTLE_ENDIAN
22 select SYS_SUPPORTS_BIG_ENDIAN 22 select SYS_SUPPORTS_BIG_ENDIAN
23 select HAVE_CLK
23 24
24config TOSHIBA_JMR3927 25config TOSHIBA_JMR3927
25 bool "Toshiba JMR-TX3927 board" 26 bool "Toshiba JMR-TX3927 board"
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index d544d7816df3..dba1ce235da5 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -186,10 +186,13 @@ static void spufs_prune_dir(struct dentry *dir)
186static int spufs_rmdir(struct inode *parent, struct dentry *dir) 186static int spufs_rmdir(struct inode *parent, struct dentry *dir)
187{ 187{
188 /* remove all entries */ 188 /* remove all entries */
189 int res;
189 spufs_prune_dir(dir); 190 spufs_prune_dir(dir);
190 d_drop(dir); 191 d_drop(dir);
191 192 res = simple_rmdir(parent, dir);
192 return simple_rmdir(parent, dir); 193 /* We have to give up the mm_struct */
194 spu_forget(SPUFS_I(dir->d_inode)->i_ctx);
195 return res;
193} 196}
194 197
195static int spufs_fill_dir(struct dentry *dir, 198static int spufs_fill_dir(struct dentry *dir,
@@ -245,9 +248,6 @@ static int spufs_dir_close(struct inode *inode, struct file *file)
245 mutex_unlock(&parent->i_mutex); 248 mutex_unlock(&parent->i_mutex);
246 WARN_ON(ret); 249 WARN_ON(ret);
247 250
248 /* We have to give up the mm_struct */
249 spu_forget(ctx);
250
251 return dcache_dir_close(inode, file); 251 return dcache_dir_close(inode, file);
252} 252}
253 253
@@ -450,28 +450,24 @@ spufs_create_context(struct inode *inode, struct dentry *dentry,
450 struct spu_context *neighbor; 450 struct spu_context *neighbor;
451 struct path path = {.mnt = mnt, .dentry = dentry}; 451 struct path path = {.mnt = mnt, .dentry = dentry};
452 452
453 ret = -EPERM;
454 if ((flags & SPU_CREATE_NOSCHED) && 453 if ((flags & SPU_CREATE_NOSCHED) &&
455 !capable(CAP_SYS_NICE)) 454 !capable(CAP_SYS_NICE))
456 goto out_unlock; 455 return -EPERM;
457 456
458 ret = -EINVAL;
459 if ((flags & (SPU_CREATE_NOSCHED | SPU_CREATE_ISOLATE)) 457 if ((flags & (SPU_CREATE_NOSCHED | SPU_CREATE_ISOLATE))
460 == SPU_CREATE_ISOLATE) 458 == SPU_CREATE_ISOLATE)
461 goto out_unlock; 459 return -EINVAL;
462 460
463 ret = -ENODEV;
464 if ((flags & SPU_CREATE_ISOLATE) && !isolated_loader) 461 if ((flags & SPU_CREATE_ISOLATE) && !isolated_loader)
465 goto out_unlock; 462 return -ENODEV;
466 463
467 gang = NULL; 464 gang = NULL;
468 neighbor = NULL; 465 neighbor = NULL;
469 affinity = flags & (SPU_CREATE_AFFINITY_MEM | SPU_CREATE_AFFINITY_SPU); 466 affinity = flags & (SPU_CREATE_AFFINITY_MEM | SPU_CREATE_AFFINITY_SPU);
470 if (affinity) { 467 if (affinity) {
471 gang = SPUFS_I(inode)->i_gang; 468 gang = SPUFS_I(inode)->i_gang;
472 ret = -EINVAL;
473 if (!gang) 469 if (!gang)
474 goto out_unlock; 470 return -EINVAL;
475 mutex_lock(&gang->aff_mutex); 471 mutex_lock(&gang->aff_mutex);
476 neighbor = spufs_assert_affinity(flags, gang, aff_filp); 472 neighbor = spufs_assert_affinity(flags, gang, aff_filp);
477 if (IS_ERR(neighbor)) { 473 if (IS_ERR(neighbor)) {
@@ -492,22 +488,12 @@ spufs_create_context(struct inode *inode, struct dentry *dentry,
492 } 488 }
493 489
494 ret = spufs_context_open(&path); 490 ret = spufs_context_open(&path);
495 if (ret < 0) { 491 if (ret < 0)
496 WARN_ON(spufs_rmdir(inode, dentry)); 492 WARN_ON(spufs_rmdir(inode, dentry));
497 if (affinity)
498 mutex_unlock(&gang->aff_mutex);
499 mutex_unlock(&inode->i_mutex);
500 spu_forget(SPUFS_I(dentry->d_inode)->i_ctx);
501 goto out;
502 }
503 493
504out_aff_unlock: 494out_aff_unlock:
505 if (affinity) 495 if (affinity)
506 mutex_unlock(&gang->aff_mutex); 496 mutex_unlock(&gang->aff_mutex);
507out_unlock:
508 mutex_unlock(&inode->i_mutex);
509out:
510 dput(dentry);
511 return ret; 497 return ret;
512} 498}
513 499
@@ -580,18 +566,13 @@ static int spufs_create_gang(struct inode *inode,
580 int ret; 566 int ret;
581 567
582 ret = spufs_mkgang(inode, dentry, mode & S_IRWXUGO); 568 ret = spufs_mkgang(inode, dentry, mode & S_IRWXUGO);
583 if (ret) 569 if (!ret) {
584 goto out; 570 ret = spufs_gang_open(&path);
585 571 if (ret < 0) {
586 ret = spufs_gang_open(&path); 572 int err = simple_rmdir(inode, dentry);
587 if (ret < 0) { 573 WARN_ON(err);
588 int err = simple_rmdir(inode, dentry); 574 }
589 WARN_ON(err);
590 } 575 }
591
592out:
593 mutex_unlock(&inode->i_mutex);
594 dput(dentry);
595 return ret; 576 return ret;
596} 577}
597 578
@@ -601,40 +582,32 @@ static struct file_system_type spufs_type;
601long spufs_create(struct path *path, struct dentry *dentry, 582long spufs_create(struct path *path, struct dentry *dentry,
602 unsigned int flags, umode_t mode, struct file *filp) 583 unsigned int flags, umode_t mode, struct file *filp)
603{ 584{
585 struct inode *dir = path->dentry->d_inode;
604 int ret; 586 int ret;
605 587
606 ret = -EINVAL;
607 /* check if we are on spufs */ 588 /* check if we are on spufs */
608 if (path->dentry->d_sb->s_type != &spufs_type) 589 if (path->dentry->d_sb->s_type != &spufs_type)
609 goto out; 590 return -EINVAL;
610 591
611 /* don't accept undefined flags */ 592 /* don't accept undefined flags */
612 if (flags & (~SPU_CREATE_FLAG_ALL)) 593 if (flags & (~SPU_CREATE_FLAG_ALL))
613 goto out; 594 return -EINVAL;
614 595
615 /* only threads can be underneath a gang */ 596 /* only threads can be underneath a gang */
616 if (path->dentry != path->dentry->d_sb->s_root) { 597 if (path->dentry != path->dentry->d_sb->s_root)
617 if ((flags & SPU_CREATE_GANG) || 598 if ((flags & SPU_CREATE_GANG) || !SPUFS_I(dir)->i_gang)
618 !SPUFS_I(path->dentry->d_inode)->i_gang) 599 return -EINVAL;
619 goto out;
620 }
621 600
622 mode &= ~current_umask(); 601 mode &= ~current_umask();
623 602
624 if (flags & SPU_CREATE_GANG) 603 if (flags & SPU_CREATE_GANG)
625 ret = spufs_create_gang(path->dentry->d_inode, 604 ret = spufs_create_gang(dir, dentry, path->mnt, mode);
626 dentry, path->mnt, mode);
627 else 605 else
628 ret = spufs_create_context(path->dentry->d_inode, 606 ret = spufs_create_context(dir, dentry, path->mnt, flags, mode,
629 dentry, path->mnt, flags, mode,
630 filp); 607 filp);
631 if (ret >= 0) 608 if (ret >= 0)
632 fsnotify_mkdir(path->dentry->d_inode, dentry); 609 fsnotify_mkdir(dir, dentry);
633 return ret;
634 610
635out:
636 mutex_unlock(&path->dentry->d_inode->i_mutex);
637 dput(dentry);
638 return ret; 611 return ret;
639} 612}
640 613
diff --git a/arch/powerpc/platforms/cell/spufs/syscalls.c b/arch/powerpc/platforms/cell/spufs/syscalls.c
index 5665dcc382c7..5b7d8ffbf890 100644
--- a/arch/powerpc/platforms/cell/spufs/syscalls.c
+++ b/arch/powerpc/platforms/cell/spufs/syscalls.c
@@ -70,7 +70,7 @@ static long do_spu_create(const char __user *pathname, unsigned int flags,
70 ret = PTR_ERR(dentry); 70 ret = PTR_ERR(dentry);
71 if (!IS_ERR(dentry)) { 71 if (!IS_ERR(dentry)) {
72 ret = spufs_create(&path, dentry, flags, mode, neighbor); 72 ret = spufs_create(&path, dentry, flags, mode, neighbor);
73 path_put(&path); 73 done_path_create(&path, dentry);
74 } 74 }
75 75
76 return ret; 76 return ret;
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 76de6b68487c..107610e01a29 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -124,6 +124,7 @@ config S390
124 select GENERIC_TIME_VSYSCALL 124 select GENERIC_TIME_VSYSCALL
125 select GENERIC_CLOCKEVENTS 125 select GENERIC_CLOCKEVENTS
126 select KTIME_SCALAR if 32BIT 126 select KTIME_SCALAR if 32BIT
127 select HAVE_ARCH_SECCOMP_FILTER
127 128
128config SCHED_OMIT_FRAME_POINTER 129config SCHED_OMIT_FRAME_POINTER
129 def_bool y 130 def_bool y
diff --git a/arch/s390/include/asm/sparsemem.h b/arch/s390/include/asm/sparsemem.h
index 0fb34027d3f6..a60d085ddb4d 100644
--- a/arch/s390/include/asm/sparsemem.h
+++ b/arch/s390/include/asm/sparsemem.h
@@ -4,13 +4,11 @@
4#ifdef CONFIG_64BIT 4#ifdef CONFIG_64BIT
5 5
6#define SECTION_SIZE_BITS 28 6#define SECTION_SIZE_BITS 28
7#define MAX_PHYSADDR_BITS 46
8#define MAX_PHYSMEM_BITS 46 7#define MAX_PHYSMEM_BITS 46
9 8
10#else 9#else
11 10
12#define SECTION_SIZE_BITS 25 11#define SECTION_SIZE_BITS 25
13#define MAX_PHYSADDR_BITS 31
14#define MAX_PHYSMEM_BITS 31 12#define MAX_PHYSMEM_BITS 31
15 13
16#endif /* CONFIG_64BIT */ 14#endif /* CONFIG_64BIT */
diff --git a/arch/s390/include/asm/syscall.h b/arch/s390/include/asm/syscall.h
index fb214dd9b7e0..fe7b99759e12 100644
--- a/arch/s390/include/asm/syscall.h
+++ b/arch/s390/include/asm/syscall.h
@@ -12,6 +12,7 @@
12#ifndef _ASM_SYSCALL_H 12#ifndef _ASM_SYSCALL_H
13#define _ASM_SYSCALL_H 1 13#define _ASM_SYSCALL_H 1
14 14
15#include <linux/audit.h>
15#include <linux/sched.h> 16#include <linux/sched.h>
16#include <linux/err.h> 17#include <linux/err.h>
17#include <asm/ptrace.h> 18#include <asm/ptrace.h>
@@ -87,4 +88,13 @@ static inline void syscall_set_arguments(struct task_struct *task,
87 regs->orig_gpr2 = args[0]; 88 regs->orig_gpr2 = args[0];
88} 89}
89 90
91static inline int syscall_get_arch(struct task_struct *task,
92 struct pt_regs *regs)
93{
94#ifdef CONFIG_COMPAT
95 if (test_tsk_thread_flag(task, TIF_31BIT))
96 return AUDIT_ARCH_S390;
97#endif
98 return sizeof(long) == 8 ? AUDIT_ARCH_S390X : AUDIT_ARCH_S390;
99}
90#endif /* _ASM_SYSCALL_H */ 100#endif /* _ASM_SYSCALL_H */
diff --git a/arch/s390/kernel/compat_linux.c b/arch/s390/kernel/compat_linux.c
index d1225089a4bb..f606d935f495 100644
--- a/arch/s390/kernel/compat_linux.c
+++ b/arch/s390/kernel/compat_linux.c
@@ -620,7 +620,6 @@ asmlinkage unsigned long old32_mmap(struct mmap_arg_struct_emu31 __user *arg)
620 return -EFAULT; 620 return -EFAULT;
621 if (a.offset & ~PAGE_MASK) 621 if (a.offset & ~PAGE_MASK)
622 return -EINVAL; 622 return -EINVAL;
623 a.addr = (unsigned long) compat_ptr(a.addr);
624 return sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, 623 return sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd,
625 a.offset >> PAGE_SHIFT); 624 a.offset >> PAGE_SHIFT);
626} 625}
@@ -631,7 +630,6 @@ asmlinkage long sys32_mmap2(struct mmap_arg_struct_emu31 __user *arg)
631 630
632 if (copy_from_user(&a, arg, sizeof(a))) 631 if (copy_from_user(&a, arg, sizeof(a)))
633 return -EFAULT; 632 return -EFAULT;
634 a.addr = (unsigned long) compat_ptr(a.addr);
635 return sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset); 633 return sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset);
636} 634}
637 635
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index e835d6d5b7fd..2d82cfcbce5b 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -1635,7 +1635,7 @@ ENTRY(compat_sys_process_vm_readv_wrapper)
1635 llgfr %r6,%r6 # unsigned long 1635 llgfr %r6,%r6 # unsigned long
1636 llgf %r0,164(%r15) # unsigned long 1636 llgf %r0,164(%r15) # unsigned long
1637 stg %r0,160(%r15) 1637 stg %r0,160(%r15)
1638 jg sys_process_vm_readv 1638 jg compat_sys_process_vm_readv
1639 1639
1640ENTRY(compat_sys_process_vm_writev_wrapper) 1640ENTRY(compat_sys_process_vm_writev_wrapper)
1641 lgfr %r2,%r2 # compat_pid_t 1641 lgfr %r2,%r2 # compat_pid_t
@@ -1645,4 +1645,4 @@ ENTRY(compat_sys_process_vm_writev_wrapper)
1645 llgfr %r6,%r6 # unsigned long 1645 llgfr %r6,%r6 # unsigned long
1646 llgf %r0,164(%r15) # unsigned long 1646 llgf %r0,164(%r15) # unsigned long
1647 stg %r0,160(%r15) 1647 stg %r0,160(%r15)
1648 jg sys_process_vm_writev 1648 jg compat_sys_process_vm_writev
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c
index f4eb37680b91..e4be113fbac6 100644
--- a/arch/s390/kernel/ptrace.c
+++ b/arch/s390/kernel/ptrace.c
@@ -719,7 +719,11 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
719 long ret = 0; 719 long ret = 0;
720 720
721 /* Do the secure computing check first. */ 721 /* Do the secure computing check first. */
722 secure_computing_strict(regs->gprs[2]); 722 if (secure_computing(regs->gprs[2])) {
723 /* seccomp failures shouldn't expose any additional code. */
724 ret = -1;
725 goto out;
726 }
723 727
724 /* 728 /*
725 * The sysc_tracesys code in entry.S stored the system 729 * The sysc_tracesys code in entry.S stored the system
@@ -745,6 +749,7 @@ asmlinkage long do_syscall_trace_enter(struct pt_regs *regs)
745 regs->gprs[2], regs->orig_gpr2, 749 regs->gprs[2], regs->orig_gpr2,
746 regs->gprs[3], regs->gprs[4], 750 regs->gprs[3], regs->gprs[4],
747 regs->gprs[5]); 751 regs->gprs[5]);
752out:
748 return ret ?: regs->gprs[2]; 753 return ret ?: regs->gprs[2];
749} 754}
750 755
diff --git a/arch/s390/kernel/sys_s390.c b/arch/s390/kernel/sys_s390.c
index b4a29eee41b8..d0964d22adb5 100644
--- a/arch/s390/kernel/sys_s390.c
+++ b/arch/s390/kernel/sys_s390.c
@@ -81,11 +81,12 @@ SYSCALL_DEFINE1(s390_personality, unsigned int, personality)
81{ 81{
82 unsigned int ret; 82 unsigned int ret;
83 83
84 if (current->personality == PER_LINUX32 && personality == PER_LINUX) 84 if (personality(current->personality) == PER_LINUX32 &&
85 personality = PER_LINUX32; 85 personality(personality) == PER_LINUX)
86 personality |= PER_LINUX32;
86 ret = sys_personality(personality); 87 ret = sys_personality(personality);
87 if (ret == PER_LINUX32) 88 if (personality(ret) == PER_LINUX32)
88 ret = PER_LINUX; 89 ret &= ~PER_LINUX32;
89 90
90 return ret; 91 return ret;
91} 92}
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 7048c03490d9..fb5805745ace 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -57,6 +57,7 @@ config SH_7724_SOLUTION_ENGINE
57 depends on CPU_SUBTYPE_SH7724 57 depends on CPU_SUBTYPE_SH7724
58 select ARCH_REQUIRE_GPIOLIB 58 select ARCH_REQUIRE_GPIOLIB
59 select SND_SOC_AK4642 if SND_SIMPLE_CARD 59 select SND_SOC_AK4642 if SND_SIMPLE_CARD
60 select REGULATOR_FIXED_VOLTAGE if REGULATOR
60 help 61 help
61 Select 7724 SolutionEngine if configuring for a Hitachi SH7724 62 Select 7724 SolutionEngine if configuring for a Hitachi SH7724
62 evaluation board. 63 evaluation board.
@@ -140,6 +141,7 @@ config SH_RSK
140 bool "Renesas Starter Kit" 141 bool "Renesas Starter Kit"
141 depends on CPU_SUBTYPE_SH7201 || CPU_SUBTYPE_SH7203 || \ 142 depends on CPU_SUBTYPE_SH7201 || CPU_SUBTYPE_SH7203 || \
142 CPU_SUBTYPE_SH7264 || CPU_SUBTYPE_SH7269 143 CPU_SUBTYPE_SH7264 || CPU_SUBTYPE_SH7269
144 select REGULATOR_FIXED_VOLTAGE if REGULATOR
143 help 145 help
144 Select this option if configuring for any of the RSK+ MCU 146 Select this option if configuring for any of the RSK+ MCU
145 evaluation platforms. 147 evaluation platforms.
@@ -159,6 +161,7 @@ config SH_SDK7786
159 select NO_IOPORT if !PCI 161 select NO_IOPORT if !PCI
160 select ARCH_WANT_OPTIONAL_GPIOLIB 162 select ARCH_WANT_OPTIONAL_GPIOLIB
161 select HAVE_SRAM_POOL 163 select HAVE_SRAM_POOL
164 select REGULATOR_FIXED_VOLTAGE if REGULATOR
162 help 165 help
163 Select SDK7786 if configuring for a Renesas Technology Europe 166 Select SDK7786 if configuring for a Renesas Technology Europe
164 SH7786-65nm board. 167 SH7786-65nm board.
@@ -173,6 +176,7 @@ config SH_SH7757LCR
173 bool "SH7757LCR" 176 bool "SH7757LCR"
174 depends on CPU_SUBTYPE_SH7757 177 depends on CPU_SUBTYPE_SH7757
175 select ARCH_REQUIRE_GPIOLIB 178 select ARCH_REQUIRE_GPIOLIB
179 select REGULATOR_FIXED_VOLTAGE if REGULATOR
176 180
177config SH_SH7785LCR 181config SH_SH7785LCR
178 bool "SH7785LCR" 182 bool "SH7785LCR"
@@ -206,6 +210,7 @@ config SH_MIGOR
206 bool "Migo-R" 210 bool "Migo-R"
207 depends on CPU_SUBTYPE_SH7722 211 depends on CPU_SUBTYPE_SH7722
208 select ARCH_REQUIRE_GPIOLIB 212 select ARCH_REQUIRE_GPIOLIB
213 select REGULATOR_FIXED_VOLTAGE if REGULATOR
209 help 214 help
210 Select Migo-R if configuring for the SH7722 Migo-R platform 215 Select Migo-R if configuring for the SH7722 Migo-R platform
211 by Renesas System Solutions Asia Pte. Ltd. 216 by Renesas System Solutions Asia Pte. Ltd.
@@ -214,6 +219,7 @@ config SH_AP325RXA
214 bool "AP-325RXA" 219 bool "AP-325RXA"
215 depends on CPU_SUBTYPE_SH7723 220 depends on CPU_SUBTYPE_SH7723
216 select ARCH_REQUIRE_GPIOLIB 221 select ARCH_REQUIRE_GPIOLIB
222 select REGULATOR_FIXED_VOLTAGE if REGULATOR
217 help 223 help
218 Renesas "AP-325RXA" support. 224 Renesas "AP-325RXA" support.
219 Compatible with ALGO SYSTEM CO.,LTD. "AP-320A" 225 Compatible with ALGO SYSTEM CO.,LTD. "AP-320A"
@@ -222,6 +228,7 @@ config SH_KFR2R09
222 bool "KFR2R09" 228 bool "KFR2R09"
223 depends on CPU_SUBTYPE_SH7724 229 depends on CPU_SUBTYPE_SH7724
224 select ARCH_REQUIRE_GPIOLIB 230 select ARCH_REQUIRE_GPIOLIB
231 select REGULATOR_FIXED_VOLTAGE if REGULATOR
225 help 232 help
226 "Kit For R2R for 2009" support. 233 "Kit For R2R for 2009" support.
227 234
@@ -230,6 +237,7 @@ config SH_ECOVEC
230 depends on CPU_SUBTYPE_SH7724 237 depends on CPU_SUBTYPE_SH7724
231 select ARCH_REQUIRE_GPIOLIB 238 select ARCH_REQUIRE_GPIOLIB
232 select SND_SOC_DA7210 if SND_SIMPLE_CARD 239 select SND_SOC_DA7210 if SND_SIMPLE_CARD
240 select REGULATOR_FIXED_VOLTAGE if REGULATOR
233 help 241 help
234 Renesas "R0P7724LC0011/21RL (EcoVec)" support. 242 Renesas "R0P7724LC0011/21RL (EcoVec)" support.
235 243
@@ -305,6 +313,7 @@ config SH_MAGIC_PANEL_R2
305 bool "Magic Panel R2" 313 bool "Magic Panel R2"
306 depends on CPU_SUBTYPE_SH7720 314 depends on CPU_SUBTYPE_SH7720
307 select ARCH_REQUIRE_GPIOLIB 315 select ARCH_REQUIRE_GPIOLIB
316 select REGULATOR_FIXED_VOLTAGE if REGULATOR
308 help 317 help
309 Select Magic Panel R2 if configuring for Magic Panel R2. 318 Select Magic Panel R2 if configuring for Magic Panel R2.
310 319
@@ -316,6 +325,7 @@ config SH_CAYMAN
316config SH_POLARIS 325config SH_POLARIS
317 bool "SMSC Polaris" 326 bool "SMSC Polaris"
318 select CPU_HAS_IPR_IRQ 327 select CPU_HAS_IPR_IRQ
328 select REGULATOR_FIXED_VOLTAGE if REGULATOR
319 depends on CPU_SUBTYPE_SH7709 329 depends on CPU_SUBTYPE_SH7709
320 help 330 help
321 Select if configuring for an SMSC Polaris development board 331 Select if configuring for an SMSC Polaris development board
@@ -323,6 +333,7 @@ config SH_POLARIS
323config SH_SH2007 333config SH_SH2007
324 bool "SH-2007 board" 334 bool "SH-2007 board"
325 select NO_IOPORT 335 select NO_IOPORT
336 select REGULATOR_FIXED_VOLTAGE if REGULATOR
326 depends on CPU_SUBTYPE_SH7780 337 depends on CPU_SUBTYPE_SH7780
327 help 338 help
328 SH-2007 is a single-board computer based around SH7780 chip 339 SH-2007 is a single-board computer based around SH7780 chip
@@ -334,6 +345,7 @@ config SH_SH2007
334config SH_APSH4A3A 345config SH_APSH4A3A
335 bool "AP-SH4A-3A" 346 bool "AP-SH4A-3A"
336 select SH_ALPHA_BOARD 347 select SH_ALPHA_BOARD
348 select REGULATOR_FIXED_VOLTAGE if REGULATOR
337 depends on CPU_SUBTYPE_SH7785 349 depends on CPU_SUBTYPE_SH7785
338 help 350 help
339 Select AP-SH4A-3A if configuring for an ALPHAPROJECT AP-SH4A-3A. 351 Select AP-SH4A-3A if configuring for an ALPHAPROJECT AP-SH4A-3A.
@@ -342,6 +354,7 @@ config SH_APSH4AD0A
342 bool "AP-SH4AD-0A" 354 bool "AP-SH4AD-0A"
343 select SH_ALPHA_BOARD 355 select SH_ALPHA_BOARD
344 select SYS_SUPPORTS_PCI 356 select SYS_SUPPORTS_PCI
357 select REGULATOR_FIXED_VOLTAGE if REGULATOR
345 depends on CPU_SUBTYPE_SH7786 358 depends on CPU_SUBTYPE_SH7786
346 help 359 help
347 Select AP-SH4AD-0A if configuring for an ALPHAPROJECT AP-SH4AD-0A. 360 Select AP-SH4AD-0A if configuring for an ALPHAPROJECT AP-SH4AD-0A.
diff --git a/arch/sh/boards/board-apsh4a3a.c b/arch/sh/boards/board-apsh4a3a.c
index 2823619c6006..0a39c241628a 100644
--- a/arch/sh/boards/board-apsh4a3a.c
+++ b/arch/sh/boards/board-apsh4a3a.c
@@ -13,6 +13,8 @@
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/mtd/physmap.h> 15#include <linux/mtd/physmap.h>
16#include <linux/regulator/fixed.h>
17#include <linux/regulator/machine.h>
16#include <linux/smsc911x.h> 18#include <linux/smsc911x.h>
17#include <linux/irq.h> 19#include <linux/irq.h>
18#include <linux/clk.h> 20#include <linux/clk.h>
@@ -66,6 +68,12 @@ static struct platform_device nor_flash_device = {
66 .resource = nor_flash_resources, 68 .resource = nor_flash_resources,
67}; 69};
68 70
71/* Dummy supplies, where voltage doesn't matter */
72static struct regulator_consumer_supply dummy_supplies[] = {
73 REGULATOR_SUPPLY("vddvario", "smsc911x"),
74 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
75};
76
69static struct resource smsc911x_resources[] = { 77static struct resource smsc911x_resources[] = {
70 [0] = { 78 [0] = {
71 .name = "smsc911x-memory", 79 .name = "smsc911x-memory",
@@ -105,6 +113,8 @@ static struct platform_device *apsh4a3a_devices[] __initdata = {
105 113
106static int __init apsh4a3a_devices_setup(void) 114static int __init apsh4a3a_devices_setup(void)
107{ 115{
116 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
117
108 return platform_add_devices(apsh4a3a_devices, 118 return platform_add_devices(apsh4a3a_devices,
109 ARRAY_SIZE(apsh4a3a_devices)); 119 ARRAY_SIZE(apsh4a3a_devices));
110} 120}
diff --git a/arch/sh/boards/board-apsh4ad0a.c b/arch/sh/boards/board-apsh4ad0a.c
index b4d6292a9247..92eac3a99187 100644
--- a/arch/sh/boards/board-apsh4ad0a.c
+++ b/arch/sh/boards/board-apsh4ad0a.c
@@ -12,12 +12,20 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/platform_device.h> 13#include <linux/platform_device.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/regulator/fixed.h>
16#include <linux/regulator/machine.h>
15#include <linux/smsc911x.h> 17#include <linux/smsc911x.h>
16#include <linux/irq.h> 18#include <linux/irq.h>
17#include <linux/clk.h> 19#include <linux/clk.h>
18#include <asm/machvec.h> 20#include <asm/machvec.h>
19#include <asm/sizes.h> 21#include <asm/sizes.h>
20 22
23/* Dummy supplies, where voltage doesn't matter */
24static struct regulator_consumer_supply dummy_supplies[] = {
25 REGULATOR_SUPPLY("vddvario", "smsc911x"),
26 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
27};
28
21static struct resource smsc911x_resources[] = { 29static struct resource smsc911x_resources[] = {
22 [0] = { 30 [0] = {
23 .name = "smsc911x-memory", 31 .name = "smsc911x-memory",
@@ -56,6 +64,8 @@ static struct platform_device *apsh4ad0a_devices[] __initdata = {
56 64
57static int __init apsh4ad0a_devices_setup(void) 65static int __init apsh4ad0a_devices_setup(void)
58{ 66{
67 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
68
59 return platform_add_devices(apsh4ad0a_devices, 69 return platform_add_devices(apsh4ad0a_devices,
60 ARRAY_SIZE(apsh4ad0a_devices)); 70 ARRAY_SIZE(apsh4ad0a_devices));
61} 71}
diff --git a/arch/sh/boards/board-magicpanelr2.c b/arch/sh/boards/board-magicpanelr2.c
index 90568f9de3a4..20500858b56c 100644
--- a/arch/sh/boards/board-magicpanelr2.c
+++ b/arch/sh/boards/board-magicpanelr2.c
@@ -14,6 +14,8 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/gpio.h> 16#include <linux/gpio.h>
17#include <linux/regulator/fixed.h>
18#include <linux/regulator/machine.h>
17#include <linux/smsc911x.h> 19#include <linux/smsc911x.h>
18#include <linux/mtd/mtd.h> 20#include <linux/mtd/mtd.h>
19#include <linux/mtd/partitions.h> 21#include <linux/mtd/partitions.h>
@@ -24,6 +26,12 @@
24#include <asm/heartbeat.h> 26#include <asm/heartbeat.h>
25#include <cpu/sh7720.h> 27#include <cpu/sh7720.h>
26 28
29/* Dummy supplies, where voltage doesn't matter */
30static struct regulator_consumer_supply dummy_supplies[] = {
31 REGULATOR_SUPPLY("vddvario", "smsc911x"),
32 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
33};
34
27#define LAN9115_READY (__raw_readl(0xA8000084UL) & 0x00000001UL) 35#define LAN9115_READY (__raw_readl(0xA8000084UL) & 0x00000001UL)
28 36
29/* Wait until reset finished. Timeout is 100ms. */ 37/* Wait until reset finished. Timeout is 100ms. */
@@ -348,6 +356,8 @@ static struct platform_device *mpr2_devices[] __initdata = {
348 356
349static int __init mpr2_devices_setup(void) 357static int __init mpr2_devices_setup(void)
350{ 358{
359 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
360
351 return platform_add_devices(mpr2_devices, ARRAY_SIZE(mpr2_devices)); 361 return platform_add_devices(mpr2_devices, ARRAY_SIZE(mpr2_devices));
352} 362}
353device_initcall(mpr2_devices_setup); 363device_initcall(mpr2_devices_setup);
diff --git a/arch/sh/boards/board-polaris.c b/arch/sh/boards/board-polaris.c
index 0978ae2e4847..37a08d094727 100644
--- a/arch/sh/boards/board-polaris.c
+++ b/arch/sh/boards/board-polaris.c
@@ -9,6 +9,8 @@
9#include <linux/interrupt.h> 9#include <linux/interrupt.h>
10#include <linux/irq.h> 10#include <linux/irq.h>
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/regulator/fixed.h>
13#include <linux/regulator/machine.h>
12#include <linux/smsc911x.h> 14#include <linux/smsc911x.h>
13#include <linux/io.h> 15#include <linux/io.h>
14#include <asm/irq.h> 16#include <asm/irq.h>
@@ -22,6 +24,12 @@
22#define AREA5_WAIT_CTRL (0x1C00) 24#define AREA5_WAIT_CTRL (0x1C00)
23#define WAIT_STATES_10 (0x7) 25#define WAIT_STATES_10 (0x7)
24 26
27/* Dummy supplies, where voltage doesn't matter */
28static struct regulator_consumer_supply dummy_supplies[] = {
29 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
30 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
31};
32
25static struct resource smsc911x_resources[] = { 33static struct resource smsc911x_resources[] = {
26 [0] = { 34 [0] = {
27 .name = "smsc911x-memory", 35 .name = "smsc911x-memory",
@@ -88,6 +96,8 @@ static int __init polaris_initialise(void)
88 96
89 printk(KERN_INFO "Configuring Polaris external bus\n"); 97 printk(KERN_INFO "Configuring Polaris external bus\n");
90 98
99 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
100
91 /* Configure area 5 with 2 wait states */ 101 /* Configure area 5 with 2 wait states */
92 wcr = __raw_readw(WCR2); 102 wcr = __raw_readw(WCR2);
93 wcr &= (~AREA5_WAIT_CTRL); 103 wcr &= (~AREA5_WAIT_CTRL);
diff --git a/arch/sh/boards/board-sh2007.c b/arch/sh/boards/board-sh2007.c
index b90b78f6a829..1980bb7e5780 100644
--- a/arch/sh/boards/board-sh2007.c
+++ b/arch/sh/boards/board-sh2007.c
@@ -6,6 +6,8 @@
6 */ 6 */
7#include <linux/init.h> 7#include <linux/init.h>
8#include <linux/irq.h> 8#include <linux/irq.h>
9#include <linux/regulator/fixed.h>
10#include <linux/regulator/machine.h>
9#include <linux/smsc911x.h> 11#include <linux/smsc911x.h>
10#include <linux/platform_device.h> 12#include <linux/platform_device.h>
11#include <linux/ata_platform.h> 13#include <linux/ata_platform.h>
@@ -13,6 +15,14 @@
13#include <asm/machvec.h> 15#include <asm/machvec.h>
14#include <mach/sh2007.h> 16#include <mach/sh2007.h>
15 17
18/* Dummy supplies, where voltage doesn't matter */
19static struct regulator_consumer_supply dummy_supplies[] = {
20 REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
21 REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
22 REGULATOR_SUPPLY("vddvario", "smsc911x.1"),
23 REGULATOR_SUPPLY("vdd33a", "smsc911x.1"),
24};
25
16struct smsc911x_platform_config smc911x_info = { 26struct smsc911x_platform_config smc911x_info = {
17 .flags = SMSC911X_USE_32BIT, 27 .flags = SMSC911X_USE_32BIT,
18 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 28 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
@@ -98,6 +108,8 @@ static struct platform_device *sh2007_devices[] __initdata = {
98 108
99static int __init sh2007_io_init(void) 109static int __init sh2007_io_init(void)
100{ 110{
111 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
112
101 platform_add_devices(sh2007_devices, ARRAY_SIZE(sh2007_devices)); 113 platform_add_devices(sh2007_devices, ARRAY_SIZE(sh2007_devices));
102 return 0; 114 return 0;
103} 115}
diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c
index 5087f8bb4cff..41f86702eb9f 100644
--- a/arch/sh/boards/board-sh7757lcr.c
+++ b/arch/sh/boards/board-sh7757lcr.c
@@ -12,6 +12,8 @@
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/gpio.h> 13#include <linux/gpio.h>
14#include <linux/irq.h> 14#include <linux/irq.h>
15#include <linux/regulator/fixed.h>
16#include <linux/regulator/machine.h>
15#include <linux/spi/spi.h> 17#include <linux/spi/spi.h>
16#include <linux/spi/flash.h> 18#include <linux/spi/flash.h>
17#include <linux/io.h> 19#include <linux/io.h>
@@ -199,6 +201,15 @@ static struct platform_device sh7757_eth_giga1_device = {
199 }, 201 },
200}; 202};
201 203
204/* Fixed 3.3V regulator to be used by SDHI0, MMCIF */
205static struct regulator_consumer_supply fixed3v3_power_consumers[] =
206{
207 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
208 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
209 REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
210 REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
211};
212
202/* SH_MMCIF */ 213/* SH_MMCIF */
203static struct resource sh_mmcif_resources[] = { 214static struct resource sh_mmcif_resources[] = {
204 [0] = { 215 [0] = {
@@ -329,6 +340,9 @@ static struct spi_board_info spi_board_info[] = {
329 340
330static int __init sh7757lcr_devices_setup(void) 341static int __init sh7757lcr_devices_setup(void)
331{ 342{
343 regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
344 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
345
332 /* RGMII (PTA) */ 346 /* RGMII (PTA) */
333 gpio_request(GPIO_FN_ET0_MDC, NULL); 347 gpio_request(GPIO_FN_ET0_MDC, NULL);
334 gpio_request(GPIO_FN_ET0_MDIO, NULL); 348 gpio_request(GPIO_FN_ET0_MDIO, NULL);
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c
index f33ebf447073..9e963c1d1447 100644
--- a/arch/sh/boards/mach-ap325rxa/setup.c
+++ b/arch/sh/boards/mach-ap325rxa/setup.c
@@ -20,6 +20,8 @@
20#include <linux/mtd/sh_flctl.h> 20#include <linux/mtd/sh_flctl.h>
21#include <linux/delay.h> 21#include <linux/delay.h>
22#include <linux/i2c.h> 22#include <linux/i2c.h>
23#include <linux/regulator/fixed.h>
24#include <linux/regulator/machine.h>
23#include <linux/smsc911x.h> 25#include <linux/smsc911x.h>
24#include <linux/gpio.h> 26#include <linux/gpio.h>
25#include <linux/videodev2.h> 27#include <linux/videodev2.h>
@@ -34,6 +36,12 @@
34#include <asm/suspend.h> 36#include <asm/suspend.h>
35#include <cpu/sh7723.h> 37#include <cpu/sh7723.h>
36 38
39/* Dummy supplies, where voltage doesn't matter */
40static struct regulator_consumer_supply dummy_supplies[] = {
41 REGULATOR_SUPPLY("vddvario", "smsc911x"),
42 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
43};
44
37static struct smsc911x_platform_config smsc911x_config = { 45static struct smsc911x_platform_config smsc911x_config = {
38 .phy_interface = PHY_INTERFACE_MODE_MII, 46 .phy_interface = PHY_INTERFACE_MODE_MII,
39 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, 47 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
@@ -423,6 +431,15 @@ static struct platform_device ceu_device = {
423 }, 431 },
424}; 432};
425 433
434/* Fixed 3.3V regulators to be used by SDHI0, SDHI1 */
435static struct regulator_consumer_supply fixed3v3_power_consumers[] =
436{
437 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
438 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
439 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
440 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
441};
442
426static struct resource sdhi0_cn3_resources[] = { 443static struct resource sdhi0_cn3_resources[] = {
427 [0] = { 444 [0] = {
428 .name = "SDHI0", 445 .name = "SDHI0",
@@ -544,6 +561,10 @@ static int __init ap325rxa_devices_setup(void)
544 &ap325rxa_sdram_leave_start, 561 &ap325rxa_sdram_leave_start,
545 &ap325rxa_sdram_leave_end); 562 &ap325rxa_sdram_leave_end);
546 563
564 regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
565 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
566 regulator_register_fixed(1, dummy_supplies, ARRAY_SIZE(dummy_supplies));
567
547 /* LD3 and LD4 LEDs */ 568 /* LD3 and LD4 LEDs */
548 gpio_request(GPIO_PTX5, NULL); /* RUN */ 569 gpio_request(GPIO_PTX5, NULL); /* RUN */
549 gpio_direction_output(GPIO_PTX5, 1); 570 gpio_direction_output(GPIO_PTX5, 1);
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
index 4158d70c0dea..64559e8af14b 100644
--- a/arch/sh/boards/mach-ecovec24/setup.c
+++ b/arch/sh/boards/mach-ecovec24/setup.c
@@ -19,6 +19,8 @@
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/delay.h> 21#include <linux/delay.h>
22#include <linux/regulator/fixed.h>
23#include <linux/regulator/machine.h>
22#include <linux/usb/r8a66597.h> 24#include <linux/usb/r8a66597.h>
23#include <linux/usb/renesas_usbhs.h> 25#include <linux/usb/renesas_usbhs.h>
24#include <linux/i2c.h> 26#include <linux/i2c.h>
@@ -242,9 +244,17 @@ static int usbhs_get_id(struct platform_device *pdev)
242 return gpio_get_value(GPIO_PTB3); 244 return gpio_get_value(GPIO_PTB3);
243} 245}
244 246
247static void usbhs_phy_reset(struct platform_device *pdev)
248{
249 /* enable vbus if HOST */
250 if (!gpio_get_value(GPIO_PTB3))
251 gpio_set_value(GPIO_PTB5, 1);
252}
253
245static struct renesas_usbhs_platform_info usbhs_info = { 254static struct renesas_usbhs_platform_info usbhs_info = {
246 .platform_callback = { 255 .platform_callback = {
247 .get_id = usbhs_get_id, 256 .get_id = usbhs_get_id,
257 .phy_reset = usbhs_phy_reset,
248 }, 258 },
249 .driver_param = { 259 .driver_param = {
250 .buswait_bwait = 4, 260 .buswait_bwait = 4,
@@ -518,10 +528,86 @@ static struct i2c_board_info ts_i2c_clients = {
518 .irq = IRQ0, 528 .irq = IRQ0,
519}; 529};
520 530
531static struct regulator_consumer_supply cn12_power_consumers[] =
532{
533 REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"),
534 REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"),
535 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
536 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
537};
538
539static struct regulator_init_data cn12_power_init_data = {
540 .constraints = {
541 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
542 },
543 .num_consumer_supplies = ARRAY_SIZE(cn12_power_consumers),
544 .consumer_supplies = cn12_power_consumers,
545};
546
547static struct fixed_voltage_config cn12_power_info = {
548 .supply_name = "CN12 SD/MMC Vdd",
549 .microvolts = 3300000,
550 .gpio = GPIO_PTB7,
551 .enable_high = 1,
552 .init_data = &cn12_power_init_data,
553};
554
555static struct platform_device cn12_power = {
556 .name = "reg-fixed-voltage",
557 .id = 0,
558 .dev = {
559 .platform_data = &cn12_power_info,
560 },
561};
562
521#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE) 563#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
522/* SDHI0 */ 564/* SDHI0 */
565static struct regulator_consumer_supply sdhi0_power_consumers[] =
566{
567 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
568 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
569};
570
571static struct regulator_init_data sdhi0_power_init_data = {
572 .constraints = {
573 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
574 },
575 .num_consumer_supplies = ARRAY_SIZE(sdhi0_power_consumers),
576 .consumer_supplies = sdhi0_power_consumers,
577};
578
579static struct fixed_voltage_config sdhi0_power_info = {
580 .supply_name = "CN11 SD/MMC Vdd",
581 .microvolts = 3300000,
582 .gpio = GPIO_PTB6,
583 .enable_high = 1,
584 .init_data = &sdhi0_power_init_data,
585};
586
587static struct platform_device sdhi0_power = {
588 .name = "reg-fixed-voltage",
589 .id = 1,
590 .dev = {
591 .platform_data = &sdhi0_power_info,
592 },
593};
594
523static void sdhi0_set_pwr(struct platform_device *pdev, int state) 595static void sdhi0_set_pwr(struct platform_device *pdev, int state)
524{ 596{
597 static int power_gpio = -EINVAL;
598
599 if (power_gpio < 0) {
600 int ret = gpio_request(GPIO_PTB6, NULL);
601 if (!ret) {
602 power_gpio = GPIO_PTB6;
603 gpio_direction_output(power_gpio, 0);
604 }
605 }
606
607 /*
608 * Toggle the GPIO regardless, whether we managed to grab it above or
609 * the fixed regulator driver did.
610 */
525 gpio_set_value(GPIO_PTB6, state); 611 gpio_set_value(GPIO_PTB6, state);
526} 612}
527 613
@@ -562,13 +648,27 @@ static struct platform_device sdhi0_device = {
562 }, 648 },
563}; 649};
564 650
565#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) 651static void cn12_set_pwr(struct platform_device *pdev, int state)
566/* SDHI1 */
567static void sdhi1_set_pwr(struct platform_device *pdev, int state)
568{ 652{
653 static int power_gpio = -EINVAL;
654
655 if (power_gpio < 0) {
656 int ret = gpio_request(GPIO_PTB7, NULL);
657 if (!ret) {
658 power_gpio = GPIO_PTB7;
659 gpio_direction_output(power_gpio, 0);
660 }
661 }
662
663 /*
664 * Toggle the GPIO regardless, whether we managed to grab it above or
665 * the fixed regulator driver did.
666 */
569 gpio_set_value(GPIO_PTB7, state); 667 gpio_set_value(GPIO_PTB7, state);
570} 668}
571 669
670#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
671/* SDHI1 */
572static int sdhi1_get_cd(struct platform_device *pdev) 672static int sdhi1_get_cd(struct platform_device *pdev)
573{ 673{
574 return !gpio_get_value(GPIO_PTW7); 674 return !gpio_get_value(GPIO_PTW7);
@@ -579,7 +679,7 @@ static struct sh_mobile_sdhi_info sdhi1_info = {
579 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, 679 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
580 .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD | 680 .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD |
581 MMC_CAP_NEEDS_POLL, 681 MMC_CAP_NEEDS_POLL,
582 .set_pwr = sdhi1_set_pwr, 682 .set_pwr = cn12_set_pwr,
583 .get_cd = sdhi1_get_cd, 683 .get_cd = sdhi1_get_cd,
584}; 684};
585 685
@@ -899,14 +999,9 @@ static struct platform_device vou_device = {
899 999
900#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE) 1000#if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE)
901/* SH_MMCIF */ 1001/* SH_MMCIF */
902static void mmcif_set_pwr(struct platform_device *pdev, int state)
903{
904 gpio_set_value(GPIO_PTB7, state);
905}
906
907static void mmcif_down_pwr(struct platform_device *pdev) 1002static void mmcif_down_pwr(struct platform_device *pdev)
908{ 1003{
909 gpio_set_value(GPIO_PTB7, 0); 1004 cn12_set_pwr(pdev, 0);
910} 1005}
911 1006
912static struct resource sh_mmcif_resources[] = { 1007static struct resource sh_mmcif_resources[] = {
@@ -929,7 +1024,7 @@ static struct resource sh_mmcif_resources[] = {
929}; 1024};
930 1025
931static struct sh_mmcif_plat_data sh_mmcif_plat = { 1026static struct sh_mmcif_plat_data sh_mmcif_plat = {
932 .set_pwr = mmcif_set_pwr, 1027 .set_pwr = cn12_set_pwr,
933 .down_pwr = mmcif_down_pwr, 1028 .down_pwr = mmcif_down_pwr,
934 .sup_pclk = 0, /* SH7724: Max Pclk/2 */ 1029 .sup_pclk = 0, /* SH7724: Max Pclk/2 */
935 .caps = MMC_CAP_4_BIT_DATA | 1030 .caps = MMC_CAP_4_BIT_DATA |
@@ -960,7 +1055,9 @@ static struct platform_device *ecovec_devices[] __initdata = {
960 &ceu0_device, 1055 &ceu0_device,
961 &ceu1_device, 1056 &ceu1_device,
962 &keysc_device, 1057 &keysc_device,
1058 &cn12_power,
963#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE) 1059#if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
1060 &sdhi0_power,
964 &sdhi0_device, 1061 &sdhi0_device,
965#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) 1062#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
966 &sdhi1_device, 1063 &sdhi1_device,
@@ -1258,8 +1355,6 @@ static int __init arch_setup(void)
1258 gpio_request(GPIO_FN_SDHI0D2, NULL); 1355 gpio_request(GPIO_FN_SDHI0D2, NULL);
1259 gpio_request(GPIO_FN_SDHI0D1, NULL); 1356 gpio_request(GPIO_FN_SDHI0D1, NULL);
1260 gpio_request(GPIO_FN_SDHI0D0, NULL); 1357 gpio_request(GPIO_FN_SDHI0D0, NULL);
1261 gpio_request(GPIO_PTB6, NULL);
1262 gpio_direction_output(GPIO_PTB6, 0);
1263#else 1358#else
1264 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ 1359 /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */
1265 gpio_request(GPIO_FN_MSIOF0_TXD, NULL); 1360 gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
@@ -1288,8 +1383,6 @@ static int __init arch_setup(void)
1288 gpio_request(GPIO_FN_MMC_D0, NULL); 1383 gpio_request(GPIO_FN_MMC_D0, NULL);
1289 gpio_request(GPIO_FN_MMC_CLK, NULL); 1384 gpio_request(GPIO_FN_MMC_CLK, NULL);
1290 gpio_request(GPIO_FN_MMC_CMD, NULL); 1385 gpio_request(GPIO_FN_MMC_CMD, NULL);
1291 gpio_request(GPIO_PTB7, NULL);
1292 gpio_direction_output(GPIO_PTB7, 0);
1293 1386
1294 cn12_enabled = true; 1387 cn12_enabled = true;
1295#elif defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE) 1388#elif defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
@@ -1301,8 +1394,6 @@ static int __init arch_setup(void)
1301 gpio_request(GPIO_FN_SDHI1D2, NULL); 1394 gpio_request(GPIO_FN_SDHI1D2, NULL);
1302 gpio_request(GPIO_FN_SDHI1D1, NULL); 1395 gpio_request(GPIO_FN_SDHI1D1, NULL);
1303 gpio_request(GPIO_FN_SDHI1D0, NULL); 1396 gpio_request(GPIO_FN_SDHI1D0, NULL);
1304 gpio_request(GPIO_PTB7, NULL);
1305 gpio_direction_output(GPIO_PTB7, 0);
1306 1397
1307 /* Card-detect, used on CN12 with SDHI1 */ 1398 /* Card-detect, used on CN12 with SDHI1 */
1308 gpio_request(GPIO_PTW7, NULL); 1399 gpio_request(GPIO_PTW7, NULL);
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
index 43a179ce9afc..f2a4304fbe23 100644
--- a/arch/sh/boards/mach-kfr2r09/setup.c
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -21,6 +21,8 @@
21#include <linux/input.h> 21#include <linux/input.h>
22#include <linux/input/sh_keysc.h> 22#include <linux/input/sh_keysc.h>
23#include <linux/i2c.h> 23#include <linux/i2c.h>
24#include <linux/regulator/fixed.h>
25#include <linux/regulator/machine.h>
24#include <linux/usb/r8a66597.h> 26#include <linux/usb/r8a66597.h>
25#include <linux/videodev2.h> 27#include <linux/videodev2.h>
26#include <linux/sh_intc.h> 28#include <linux/sh_intc.h>
@@ -341,6 +343,13 @@ static struct platform_device kfr2r09_camera = {
341 }, 343 },
342}; 344};
343 345
346/* Fixed 3.3V regulator to be used by SDHI0 */
347static struct regulator_consumer_supply fixed3v3_power_consumers[] =
348{
349 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
350 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
351};
352
344static struct resource kfr2r09_sh_sdhi0_resources[] = { 353static struct resource kfr2r09_sh_sdhi0_resources[] = {
345 [0] = { 354 [0] = {
346 .name = "SDHI0", 355 .name = "SDHI0",
@@ -523,6 +532,9 @@ static int __init kfr2r09_devices_setup(void)
523 &kfr2r09_sdram_leave_start, 532 &kfr2r09_sdram_leave_start,
524 &kfr2r09_sdram_leave_end); 533 &kfr2r09_sdram_leave_end);
525 534
535 regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
536 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
537
526 /* enable SCIF1 serial port for YC401 console support */ 538 /* enable SCIF1 serial port for YC401 console support */
527 gpio_request(GPIO_FN_SCIF1_RXD, NULL); 539 gpio_request(GPIO_FN_SCIF1_RXD, NULL);
528 gpio_request(GPIO_FN_SCIF1_TXD, NULL); 540 gpio_request(GPIO_FN_SCIF1_TXD, NULL);
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index a8a1ca741c85..8b73194ed2ce 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -17,6 +17,8 @@
17#include <linux/mtd/physmap.h> 17#include <linux/mtd/physmap.h>
18#include <linux/mtd/nand.h> 18#include <linux/mtd/nand.h>
19#include <linux/i2c.h> 19#include <linux/i2c.h>
20#include <linux/regulator/fixed.h>
21#include <linux/regulator/machine.h>
20#include <linux/smc91x.h> 22#include <linux/smc91x.h>
21#include <linux/delay.h> 23#include <linux/delay.h>
22#include <linux/clk.h> 24#include <linux/clk.h>
@@ -386,6 +388,13 @@ static struct platform_device migor_ceu_device = {
386 }, 388 },
387}; 389};
388 390
391/* Fixed 3.3V regulator to be used by SDHI0 */
392static struct regulator_consumer_supply fixed3v3_power_consumers[] =
393{
394 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
395 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
396};
397
389static struct resource sdhi_cn9_resources[] = { 398static struct resource sdhi_cn9_resources[] = {
390 [0] = { 399 [0] = {
391 .name = "SDHI", 400 .name = "SDHI",
@@ -498,6 +507,10 @@ static int __init migor_devices_setup(void)
498 &migor_sdram_enter_end, 507 &migor_sdram_enter_end,
499 &migor_sdram_leave_start, 508 &migor_sdram_leave_start,
500 &migor_sdram_leave_end); 509 &migor_sdram_leave_end);
510
511 regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
512 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
513
501 /* Let D11 LED show STATUS0 */ 514 /* Let D11 LED show STATUS0 */
502 gpio_request(GPIO_FN_STATUS0, NULL); 515 gpio_request(GPIO_FN_STATUS0, NULL);
503 516
diff --git a/arch/sh/boards/mach-rsk/setup.c b/arch/sh/boards/mach-rsk/setup.c
index 895f030070d3..2685ea03b064 100644
--- a/arch/sh/boards/mach-rsk/setup.c
+++ b/arch/sh/boards/mach-rsk/setup.c
@@ -16,9 +16,17 @@
16#include <linux/mtd/partitions.h> 16#include <linux/mtd/partitions.h>
17#include <linux/mtd/physmap.h> 17#include <linux/mtd/physmap.h>
18#include <linux/mtd/map.h> 18#include <linux/mtd/map.h>
19#include <linux/regulator/fixed.h>
20#include <linux/regulator/machine.h>
19#include <asm/machvec.h> 21#include <asm/machvec.h>
20#include <asm/io.h> 22#include <asm/io.h>
21 23
24/* Dummy supplies, where voltage doesn't matter */
25static struct regulator_consumer_supply dummy_supplies[] = {
26 REGULATOR_SUPPLY("vddvario", "smsc911x"),
27 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
28};
29
22static const char *part_probes[] = { "cmdlinepart", NULL }; 30static const char *part_probes[] = { "cmdlinepart", NULL };
23 31
24static struct mtd_partition rsk_partitions[] = { 32static struct mtd_partition rsk_partitions[] = {
@@ -67,6 +75,8 @@ static struct platform_device *rsk_devices[] __initdata = {
67 75
68static int __init rsk_devices_setup(void) 76static int __init rsk_devices_setup(void)
69{ 77{
78 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
79
70 return platform_add_devices(rsk_devices, 80 return platform_add_devices(rsk_devices,
71 ARRAY_SIZE(rsk_devices)); 81 ARRAY_SIZE(rsk_devices));
72} 82}
diff --git a/arch/sh/boards/mach-sdk7786/setup.c b/arch/sh/boards/mach-sdk7786/setup.c
index 27a2314f50ac..c29268bfd34a 100644
--- a/arch/sh/boards/mach-sdk7786/setup.c
+++ b/arch/sh/boards/mach-sdk7786/setup.c
@@ -11,6 +11,8 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/io.h> 13#include <linux/io.h>
14#include <linux/regulator/fixed.h>
15#include <linux/regulator/machine.h>
14#include <linux/smsc911x.h> 16#include <linux/smsc911x.h>
15#include <linux/i2c.h> 17#include <linux/i2c.h>
16#include <linux/irq.h> 18#include <linux/irq.h>
@@ -38,6 +40,12 @@ static struct platform_device heartbeat_device = {
38 .resource = &heartbeat_resource, 40 .resource = &heartbeat_resource,
39}; 41};
40 42
43/* Dummy supplies, where voltage doesn't matter */
44static struct regulator_consumer_supply dummy_supplies[] = {
45 REGULATOR_SUPPLY("vddvario", "smsc911x"),
46 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
47};
48
41static struct resource smsc911x_resources[] = { 49static struct resource smsc911x_resources[] = {
42 [0] = { 50 [0] = {
43 .name = "smsc911x-memory", 51 .name = "smsc911x-memory",
@@ -236,6 +244,8 @@ static void __init sdk7786_setup(char **cmdline_p)
236{ 244{
237 pr_info("Renesas Technology Europe SDK7786 support:\n"); 245 pr_info("Renesas Technology Europe SDK7786 support:\n");
238 246
247 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
248
239 sdk7786_fpga_init(); 249 sdk7786_fpga_init();
240 sdk7786_nmi_init(); 250 sdk7786_nmi_init();
241 251
diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c
index ffbf5bc7366b..35f6efa3ac0e 100644
--- a/arch/sh/boards/mach-se/7724/setup.c
+++ b/arch/sh/boards/mach-se/7724/setup.c
@@ -18,6 +18,8 @@
18#include <linux/mmc/sh_mobile_sdhi.h> 18#include <linux/mmc/sh_mobile_sdhi.h>
19#include <linux/mtd/physmap.h> 19#include <linux/mtd/physmap.h>
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/regulator/fixed.h>
22#include <linux/regulator/machine.h>
21#include <linux/smc91x.h> 23#include <linux/smc91x.h>
22#include <linux/gpio.h> 24#include <linux/gpio.h>
23#include <linux/input.h> 25#include <linux/input.h>
@@ -454,6 +456,15 @@ static struct platform_device sh7724_usb1_gadget_device = {
454 .resource = sh7724_usb1_gadget_resources, 456 .resource = sh7724_usb1_gadget_resources,
455}; 457};
456 458
459/* Fixed 3.3V regulator to be used by SDHI0, SDHI1 */
460static struct regulator_consumer_supply fixed3v3_power_consumers[] =
461{
462 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
463 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
464 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
465 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
466};
467
457static struct resource sdhi0_cn7_resources[] = { 468static struct resource sdhi0_cn7_resources[] = {
458 [0] = { 469 [0] = {
459 .name = "SDHI0", 470 .name = "SDHI0",
@@ -684,6 +695,10 @@ static int __init devices_setup(void)
684 &ms7724se_sdram_enter_end, 695 &ms7724se_sdram_enter_end,
685 &ms7724se_sdram_leave_start, 696 &ms7724se_sdram_leave_start,
686 &ms7724se_sdram_leave_end); 697 &ms7724se_sdram_leave_end);
698
699 regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
700 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
701
687 /* Reset Release */ 702 /* Reset Release */
688 fpga_out = __raw_readw(FPGA_OUT); 703 fpga_out = __raw_readw(FPGA_OUT);
689 /* bit4: NTSC_PDN, bit5: NTSC_RESET */ 704 /* bit4: NTSC_PDN, bit5: NTSC_RESET */
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index 4c171f13b0e8..b22565623142 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -335,7 +335,7 @@ static int dmae_irq_init(void)
335 335
336 for (n = 0; n < NR_DMAE; n++) { 336 for (n = 0; n < NR_DMAE; n++) {
337 int i = request_irq(get_dma_error_irq(n), dma_err, 337 int i = request_irq(get_dma_error_irq(n), dma_err,
338 IRQF_SHARED, dmae_name[n], NULL); 338 IRQF_SHARED, dmae_name[n], (void *)dmae_name[n]);
339 if (unlikely(i < 0)) { 339 if (unlikely(i < 0)) {
340 printk(KERN_ERR "%s request_irq fail\n", dmae_name[n]); 340 printk(KERN_ERR "%s request_irq fail\n", dmae_name[n]);
341 return i; 341 return i;
diff --git a/arch/sh/include/asm/sections.h b/arch/sh/include/asm/sections.h
index 4a5350037c8f..1b6199740e98 100644
--- a/arch/sh/include/asm/sections.h
+++ b/arch/sh/include/asm/sections.h
@@ -6,7 +6,6 @@
6extern long __nosave_begin, __nosave_end; 6extern long __nosave_begin, __nosave_end;
7extern long __machvec_start, __machvec_end; 7extern long __machvec_start, __machvec_end;
8extern char __uncached_start, __uncached_end; 8extern char __uncached_start, __uncached_end;
9extern char _ebss[];
10extern char __start_eh_frame[], __stop_eh_frame[]; 9extern char __start_eh_frame[], __stop_eh_frame[];
11 10
12#endif /* __ASM_SH_SECTIONS_H */ 11#endif /* __ASM_SH_SECTIONS_H */
diff --git a/arch/sh/include/cpu-sh2a/cpu/sh7269.h b/arch/sh/include/cpu-sh2a/cpu/sh7269.h
index 48d14498e774..2a0ca8780f0d 100644
--- a/arch/sh/include/cpu-sh2a/cpu/sh7269.h
+++ b/arch/sh/include/cpu-sh2a/cpu/sh7269.h
@@ -183,18 +183,30 @@ enum {
183 GPIO_FN_DV_DATA1, GPIO_FN_DV_DATA0, 183 GPIO_FN_DV_DATA1, GPIO_FN_DV_DATA0,
184 GPIO_FN_LCD_CLK, GPIO_FN_LCD_EXTCLK, 184 GPIO_FN_LCD_CLK, GPIO_FN_LCD_EXTCLK,
185 GPIO_FN_LCD_VSYNC, GPIO_FN_LCD_HSYNC, GPIO_FN_LCD_DE, 185 GPIO_FN_LCD_VSYNC, GPIO_FN_LCD_HSYNC, GPIO_FN_LCD_DE,
186 GPIO_FN_LCD_DATA23, GPIO_FN_LCD_DATA22, 186 GPIO_FN_LCD_DATA23_PG23, GPIO_FN_LCD_DATA22_PG22,
187 GPIO_FN_LCD_DATA21, GPIO_FN_LCD_DATA20, 187 GPIO_FN_LCD_DATA21_PG21, GPIO_FN_LCD_DATA20_PG20,
188 GPIO_FN_LCD_DATA19, GPIO_FN_LCD_DATA18, 188 GPIO_FN_LCD_DATA19_PG19, GPIO_FN_LCD_DATA18_PG18,
189 GPIO_FN_LCD_DATA17, GPIO_FN_LCD_DATA16, 189 GPIO_FN_LCD_DATA17_PG17, GPIO_FN_LCD_DATA16_PG16,
190 GPIO_FN_LCD_DATA15, GPIO_FN_LCD_DATA14, 190 GPIO_FN_LCD_DATA15_PG15, GPIO_FN_LCD_DATA14_PG14,
191 GPIO_FN_LCD_DATA13, GPIO_FN_LCD_DATA12, 191 GPIO_FN_LCD_DATA13_PG13, GPIO_FN_LCD_DATA12_PG12,
192 GPIO_FN_LCD_DATA11, GPIO_FN_LCD_DATA10, 192 GPIO_FN_LCD_DATA11_PG11, GPIO_FN_LCD_DATA10_PG10,
193 GPIO_FN_LCD_DATA9, GPIO_FN_LCD_DATA8, 193 GPIO_FN_LCD_DATA9_PG9, GPIO_FN_LCD_DATA8_PG8,
194 GPIO_FN_LCD_DATA7, GPIO_FN_LCD_DATA6, 194 GPIO_FN_LCD_DATA7_PG7, GPIO_FN_LCD_DATA6_PG6,
195 GPIO_FN_LCD_DATA5, GPIO_FN_LCD_DATA4, 195 GPIO_FN_LCD_DATA5_PG5, GPIO_FN_LCD_DATA4_PG4,
196 GPIO_FN_LCD_DATA3, GPIO_FN_LCD_DATA2, 196 GPIO_FN_LCD_DATA3_PG3, GPIO_FN_LCD_DATA2_PG2,
197 GPIO_FN_LCD_DATA1, GPIO_FN_LCD_DATA0, 197 GPIO_FN_LCD_DATA1_PG1, GPIO_FN_LCD_DATA0_PG0,
198 GPIO_FN_LCD_DATA23_PJ23, GPIO_FN_LCD_DATA22_PJ22,
199 GPIO_FN_LCD_DATA21_PJ21, GPIO_FN_LCD_DATA20_PJ20,
200 GPIO_FN_LCD_DATA19_PJ19, GPIO_FN_LCD_DATA18_PJ18,
201 GPIO_FN_LCD_DATA17_PJ17, GPIO_FN_LCD_DATA16_PJ16,
202 GPIO_FN_LCD_DATA15_PJ15, GPIO_FN_LCD_DATA14_PJ14,
203 GPIO_FN_LCD_DATA13_PJ13, GPIO_FN_LCD_DATA12_PJ12,
204 GPIO_FN_LCD_DATA11_PJ11, GPIO_FN_LCD_DATA10_PJ10,
205 GPIO_FN_LCD_DATA9_PJ9, GPIO_FN_LCD_DATA8_PJ8,
206 GPIO_FN_LCD_DATA7_PJ7, GPIO_FN_LCD_DATA6_PJ6,
207 GPIO_FN_LCD_DATA5_PJ5, GPIO_FN_LCD_DATA4_PJ4,
208 GPIO_FN_LCD_DATA3_PJ3, GPIO_FN_LCD_DATA2_PJ2,
209 GPIO_FN_LCD_DATA1_PJ1, GPIO_FN_LCD_DATA0_PJ0,
198 GPIO_FN_LCD_M_DISP, 210 GPIO_FN_LCD_M_DISP,
199}; 211};
200 212
diff --git a/arch/sh/include/cpu-sh4/cpu/sh7757.h b/arch/sh/include/cpu-sh4/cpu/sh7757.h
index 41f9f8b9db73..5340f3bc1863 100644
--- a/arch/sh/include/cpu-sh4/cpu/sh7757.h
+++ b/arch/sh/include/cpu-sh4/cpu/sh7757.h
@@ -283,5 +283,7 @@ enum {
283 SHDMA_SLAVE_RIIC8_RX, 283 SHDMA_SLAVE_RIIC8_RX,
284 SHDMA_SLAVE_RIIC9_TX, 284 SHDMA_SLAVE_RIIC9_TX,
285 SHDMA_SLAVE_RIIC9_RX, 285 SHDMA_SLAVE_RIIC9_RX,
286 SHDMA_SLAVE_RSPI_TX,
287 SHDMA_SLAVE_RSPI_RX,
286}; 288};
287#endif /* __ASM_SH7757_H__ */ 289#endif /* __ASM_SH7757_H__ */
diff --git a/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c b/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c
index f25127c46eca..039e4587dd9b 100644
--- a/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c
+++ b/arch/sh/kernel/cpu/sh2a/pinmux-sh7269.c
@@ -758,12 +758,22 @@ enum {
758 DV_DATA3_MARK, DV_DATA2_MARK, DV_DATA1_MARK, DV_DATA0_MARK, 758 DV_DATA3_MARK, DV_DATA2_MARK, DV_DATA1_MARK, DV_DATA0_MARK,
759 LCD_CLK_MARK, LCD_EXTCLK_MARK, 759 LCD_CLK_MARK, LCD_EXTCLK_MARK,
760 LCD_VSYNC_MARK, LCD_HSYNC_MARK, LCD_DE_MARK, 760 LCD_VSYNC_MARK, LCD_HSYNC_MARK, LCD_DE_MARK,
761 LCD_DATA23_MARK, LCD_DATA22_MARK, LCD_DATA21_MARK, LCD_DATA20_MARK, 761 LCD_DATA23_PG23_MARK, LCD_DATA22_PG22_MARK, LCD_DATA21_PG21_MARK,
762 LCD_DATA19_MARK, LCD_DATA18_MARK, LCD_DATA17_MARK, LCD_DATA16_MARK, 762 LCD_DATA20_PG20_MARK, LCD_DATA19_PG19_MARK, LCD_DATA18_PG18_MARK,
763 LCD_DATA15_MARK, LCD_DATA14_MARK, LCD_DATA13_MARK, LCD_DATA12_MARK, 763 LCD_DATA17_PG17_MARK, LCD_DATA16_PG16_MARK, LCD_DATA15_PG15_MARK,
764 LCD_DATA11_MARK, LCD_DATA10_MARK, LCD_DATA9_MARK, LCD_DATA8_MARK, 764 LCD_DATA14_PG14_MARK, LCD_DATA13_PG13_MARK, LCD_DATA12_PG12_MARK,
765 LCD_DATA7_MARK, LCD_DATA6_MARK, LCD_DATA5_MARK, LCD_DATA4_MARK, 765 LCD_DATA11_PG11_MARK, LCD_DATA10_PG10_MARK, LCD_DATA9_PG9_MARK,
766 LCD_DATA3_MARK, LCD_DATA2_MARK, LCD_DATA1_MARK, LCD_DATA0_MARK, 766 LCD_DATA8_PG8_MARK, LCD_DATA7_PG7_MARK, LCD_DATA6_PG6_MARK,
767 LCD_DATA5_PG5_MARK, LCD_DATA4_PG4_MARK, LCD_DATA3_PG3_MARK,
768 LCD_DATA2_PG2_MARK, LCD_DATA1_PG1_MARK, LCD_DATA0_PG0_MARK,
769 LCD_DATA23_PJ23_MARK, LCD_DATA22_PJ22_MARK, LCD_DATA21_PJ21_MARK,
770 LCD_DATA20_PJ20_MARK, LCD_DATA19_PJ19_MARK, LCD_DATA18_PJ18_MARK,
771 LCD_DATA17_PJ17_MARK, LCD_DATA16_PJ16_MARK, LCD_DATA15_PJ15_MARK,
772 LCD_DATA14_PJ14_MARK, LCD_DATA13_PJ13_MARK, LCD_DATA12_PJ12_MARK,
773 LCD_DATA11_PJ11_MARK, LCD_DATA10_PJ10_MARK, LCD_DATA9_PJ9_MARK,
774 LCD_DATA8_PJ8_MARK, LCD_DATA7_PJ7_MARK, LCD_DATA6_PJ6_MARK,
775 LCD_DATA5_PJ5_MARK, LCD_DATA4_PJ4_MARK, LCD_DATA3_PJ3_MARK,
776 LCD_DATA2_PJ2_MARK, LCD_DATA1_PJ1_MARK, LCD_DATA0_PJ0_MARK,
767 LCD_TCON6_MARK, LCD_TCON5_MARK, LCD_TCON4_MARK, 777 LCD_TCON6_MARK, LCD_TCON5_MARK, LCD_TCON4_MARK,
768 LCD_TCON3_MARK, LCD_TCON2_MARK, LCD_TCON1_MARK, LCD_TCON0_MARK, 778 LCD_TCON3_MARK, LCD_TCON2_MARK, LCD_TCON1_MARK, LCD_TCON0_MARK,
769 LCD_M_DISP_MARK, 779 LCD_M_DISP_MARK,
@@ -1036,6 +1046,7 @@ static pinmux_enum_t pinmux_data[] = {
1036 1046
1037 PINMUX_DATA(PF1_DATA, PF1MD_000), 1047 PINMUX_DATA(PF1_DATA, PF1MD_000),
1038 PINMUX_DATA(BACK_MARK, PF1MD_001), 1048 PINMUX_DATA(BACK_MARK, PF1MD_001),
1049 PINMUX_DATA(SSL10_MARK, PF1MD_011),
1039 PINMUX_DATA(TIOC4B_MARK, PF1MD_100), 1050 PINMUX_DATA(TIOC4B_MARK, PF1MD_100),
1040 PINMUX_DATA(DACK0_MARK, PF1MD_101), 1051 PINMUX_DATA(DACK0_MARK, PF1MD_101),
1041 1052
@@ -1049,47 +1060,50 @@ static pinmux_enum_t pinmux_data[] = {
1049 PINMUX_DATA(PG27_DATA, PG27MD_00), 1060 PINMUX_DATA(PG27_DATA, PG27MD_00),
1050 PINMUX_DATA(LCD_TCON2_MARK, PG27MD_10), 1061 PINMUX_DATA(LCD_TCON2_MARK, PG27MD_10),
1051 PINMUX_DATA(LCD_EXTCLK_MARK, PG27MD_11), 1062 PINMUX_DATA(LCD_EXTCLK_MARK, PG27MD_11),
1063 PINMUX_DATA(LCD_DE_MARK, PG27MD_11),
1052 1064
1053 PINMUX_DATA(PG26_DATA, PG26MD_00), 1065 PINMUX_DATA(PG26_DATA, PG26MD_00),
1054 PINMUX_DATA(LCD_TCON1_MARK, PG26MD_10), 1066 PINMUX_DATA(LCD_TCON1_MARK, PG26MD_10),
1067 PINMUX_DATA(LCD_HSYNC_MARK, PG26MD_10),
1055 1068
1056 PINMUX_DATA(PG25_DATA, PG25MD_00), 1069 PINMUX_DATA(PG25_DATA, PG25MD_00),
1057 PINMUX_DATA(LCD_TCON0_MARK, PG25MD_10), 1070 PINMUX_DATA(LCD_TCON0_MARK, PG25MD_10),
1071 PINMUX_DATA(LCD_VSYNC_MARK, PG25MD_10),
1058 1072
1059 PINMUX_DATA(PG24_DATA, PG24MD_00), 1073 PINMUX_DATA(PG24_DATA, PG24MD_00),
1060 PINMUX_DATA(LCD_CLK_MARK, PG24MD_10), 1074 PINMUX_DATA(LCD_CLK_MARK, PG24MD_10),
1061 1075
1062 PINMUX_DATA(PG23_DATA, PG23MD_000), 1076 PINMUX_DATA(PG23_DATA, PG23MD_000),
1063 PINMUX_DATA(LCD_DATA23_MARK, PG23MD_010), 1077 PINMUX_DATA(LCD_DATA23_PG23_MARK, PG23MD_010),
1064 PINMUX_DATA(LCD_TCON6_MARK, PG23MD_011), 1078 PINMUX_DATA(LCD_TCON6_MARK, PG23MD_011),
1065 PINMUX_DATA(TXD5_MARK, PG23MD_100), 1079 PINMUX_DATA(TXD5_MARK, PG23MD_100),
1066 1080
1067 PINMUX_DATA(PG22_DATA, PG22MD_000), 1081 PINMUX_DATA(PG22_DATA, PG22MD_000),
1068 PINMUX_DATA(LCD_DATA22_MARK, PG22MD_010), 1082 PINMUX_DATA(LCD_DATA22_PG22_MARK, PG22MD_010),
1069 PINMUX_DATA(LCD_TCON5_MARK, PG22MD_011), 1083 PINMUX_DATA(LCD_TCON5_MARK, PG22MD_011),
1070 PINMUX_DATA(RXD5_MARK, PG22MD_100), 1084 PINMUX_DATA(RXD5_MARK, PG22MD_100),
1071 1085
1072 PINMUX_DATA(PG21_DATA, PG21MD_000), 1086 PINMUX_DATA(PG21_DATA, PG21MD_000),
1073 PINMUX_DATA(DV_DATA7_MARK, PG21MD_001), 1087 PINMUX_DATA(DV_DATA7_MARK, PG21MD_001),
1074 PINMUX_DATA(LCD_DATA21_MARK, PG21MD_010), 1088 PINMUX_DATA(LCD_DATA21_PG21_MARK, PG21MD_010),
1075 PINMUX_DATA(LCD_TCON4_MARK, PG21MD_011), 1089 PINMUX_DATA(LCD_TCON4_MARK, PG21MD_011),
1076 PINMUX_DATA(TXD4_MARK, PG21MD_100), 1090 PINMUX_DATA(TXD4_MARK, PG21MD_100),
1077 1091
1078 PINMUX_DATA(PG20_DATA, PG20MD_000), 1092 PINMUX_DATA(PG20_DATA, PG20MD_000),
1079 PINMUX_DATA(DV_DATA6_MARK, PG20MD_001), 1093 PINMUX_DATA(DV_DATA6_MARK, PG20MD_001),
1080 PINMUX_DATA(LCD_DATA20_MARK, PG21MD_010), 1094 PINMUX_DATA(LCD_DATA20_PG20_MARK, PG21MD_010),
1081 PINMUX_DATA(LCD_TCON3_MARK, PG20MD_011), 1095 PINMUX_DATA(LCD_TCON3_MARK, PG20MD_011),
1082 PINMUX_DATA(RXD4_MARK, PG20MD_100), 1096 PINMUX_DATA(RXD4_MARK, PG20MD_100),
1083 1097
1084 PINMUX_DATA(PG19_DATA, PG19MD_000), 1098 PINMUX_DATA(PG19_DATA, PG19MD_000),
1085 PINMUX_DATA(DV_DATA5_MARK, PG19MD_001), 1099 PINMUX_DATA(DV_DATA5_MARK, PG19MD_001),
1086 PINMUX_DATA(LCD_DATA19_MARK, PG19MD_010), 1100 PINMUX_DATA(LCD_DATA19_PG19_MARK, PG19MD_010),
1087 PINMUX_DATA(SPDIF_OUT_MARK, PG19MD_011), 1101 PINMUX_DATA(SPDIF_OUT_MARK, PG19MD_011),
1088 PINMUX_DATA(SCK5_MARK, PG19MD_100), 1102 PINMUX_DATA(SCK5_MARK, PG19MD_100),
1089 1103
1090 PINMUX_DATA(PG18_DATA, PG18MD_000), 1104 PINMUX_DATA(PG18_DATA, PG18MD_000),
1091 PINMUX_DATA(DV_DATA4_MARK, PG18MD_001), 1105 PINMUX_DATA(DV_DATA4_MARK, PG18MD_001),
1092 PINMUX_DATA(LCD_DATA18_MARK, PG18MD_010), 1106 PINMUX_DATA(LCD_DATA18_PG18_MARK, PG18MD_010),
1093 PINMUX_DATA(SPDIF_IN_MARK, PG18MD_011), 1107 PINMUX_DATA(SPDIF_IN_MARK, PG18MD_011),
1094 PINMUX_DATA(SCK4_MARK, PG18MD_100), 1108 PINMUX_DATA(SCK4_MARK, PG18MD_100),
1095 1109
@@ -1097,103 +1111,103 @@ static pinmux_enum_t pinmux_data[] = {
1097// we're going with 2 bits 1111// we're going with 2 bits
1098 PINMUX_DATA(PG17_DATA, PG17MD_00), 1112 PINMUX_DATA(PG17_DATA, PG17MD_00),
1099 PINMUX_DATA(WE3ICIOWRAHDQMUU_MARK, PG17MD_01), 1113 PINMUX_DATA(WE3ICIOWRAHDQMUU_MARK, PG17MD_01),
1100 PINMUX_DATA(LCD_DATA17_MARK, PG17MD_10), 1114 PINMUX_DATA(LCD_DATA17_PG17_MARK, PG17MD_10),
1101 1115
1102// TODO hardware manual has PG16 3 bits wide in reg picture and 2 bits in description 1116// TODO hardware manual has PG16 3 bits wide in reg picture and 2 bits in description
1103// we're going with 2 bits 1117// we're going with 2 bits
1104 PINMUX_DATA(PG16_DATA, PG16MD_00), 1118 PINMUX_DATA(PG16_DATA, PG16MD_00),
1105 PINMUX_DATA(WE2ICIORDDQMUL_MARK, PG16MD_01), 1119 PINMUX_DATA(WE2ICIORDDQMUL_MARK, PG16MD_01),
1106 PINMUX_DATA(LCD_DATA16_MARK, PG16MD_10), 1120 PINMUX_DATA(LCD_DATA16_PG16_MARK, PG16MD_10),
1107 1121
1108 PINMUX_DATA(PG15_DATA, PG15MD_00), 1122 PINMUX_DATA(PG15_DATA, PG15MD_00),
1109 PINMUX_DATA(D31_MARK, PG15MD_01), 1123 PINMUX_DATA(D31_MARK, PG15MD_01),
1110 PINMUX_DATA(LCD_DATA15_MARK, PG15MD_10), 1124 PINMUX_DATA(LCD_DATA15_PG15_MARK, PG15MD_10),
1111 PINMUX_DATA(PINT7_PG_MARK, PG15MD_11), 1125 PINMUX_DATA(PINT7_PG_MARK, PG15MD_11),
1112 1126
1113 PINMUX_DATA(PG14_DATA, PG14MD_00), 1127 PINMUX_DATA(PG14_DATA, PG14MD_00),
1114 PINMUX_DATA(D30_MARK, PG14MD_01), 1128 PINMUX_DATA(D30_MARK, PG14MD_01),
1115 PINMUX_DATA(LCD_DATA14_MARK, PG14MD_10), 1129 PINMUX_DATA(LCD_DATA14_PG14_MARK, PG14MD_10),
1116 PINMUX_DATA(PINT6_PG_MARK, PG14MD_11), 1130 PINMUX_DATA(PINT6_PG_MARK, PG14MD_11),
1117 1131
1118 PINMUX_DATA(PG13_DATA, PG13MD_00), 1132 PINMUX_DATA(PG13_DATA, PG13MD_00),
1119 PINMUX_DATA(D29_MARK, PG13MD_01), 1133 PINMUX_DATA(D29_MARK, PG13MD_01),
1120 PINMUX_DATA(LCD_DATA13_MARK, PG13MD_10), 1134 PINMUX_DATA(LCD_DATA13_PG13_MARK, PG13MD_10),
1121 PINMUX_DATA(PINT5_PG_MARK, PG13MD_11), 1135 PINMUX_DATA(PINT5_PG_MARK, PG13MD_11),
1122 1136
1123 PINMUX_DATA(PG12_DATA, PG12MD_00), 1137 PINMUX_DATA(PG12_DATA, PG12MD_00),
1124 PINMUX_DATA(D28_MARK, PG12MD_01), 1138 PINMUX_DATA(D28_MARK, PG12MD_01),
1125 PINMUX_DATA(LCD_DATA12_MARK, PG12MD_10), 1139 PINMUX_DATA(LCD_DATA12_PG12_MARK, PG12MD_10),
1126 PINMUX_DATA(PINT4_PG_MARK, PG12MD_11), 1140 PINMUX_DATA(PINT4_PG_MARK, PG12MD_11),
1127 1141
1128 PINMUX_DATA(PG11_DATA, PG11MD_000), 1142 PINMUX_DATA(PG11_DATA, PG11MD_000),
1129 PINMUX_DATA(D27_MARK, PG11MD_001), 1143 PINMUX_DATA(D27_MARK, PG11MD_001),
1130 PINMUX_DATA(LCD_DATA11_MARK, PG11MD_010), 1144 PINMUX_DATA(LCD_DATA11_PG11_MARK, PG11MD_010),
1131 PINMUX_DATA(PINT3_PG_MARK, PG11MD_011), 1145 PINMUX_DATA(PINT3_PG_MARK, PG11MD_011),
1132 PINMUX_DATA(TIOC3D_MARK, PG11MD_100), 1146 PINMUX_DATA(TIOC3D_MARK, PG11MD_100),
1133 1147
1134 PINMUX_DATA(PG10_DATA, PG10MD_000), 1148 PINMUX_DATA(PG10_DATA, PG10MD_000),
1135 PINMUX_DATA(D26_MARK, PG10MD_001), 1149 PINMUX_DATA(D26_MARK, PG10MD_001),
1136 PINMUX_DATA(LCD_DATA10_MARK, PG10MD_010), 1150 PINMUX_DATA(LCD_DATA10_PG10_MARK, PG10MD_010),
1137 PINMUX_DATA(PINT2_PG_MARK, PG10MD_011), 1151 PINMUX_DATA(PINT2_PG_MARK, PG10MD_011),
1138 PINMUX_DATA(TIOC3C_MARK, PG10MD_100), 1152 PINMUX_DATA(TIOC3C_MARK, PG10MD_100),
1139 1153
1140 PINMUX_DATA(PG9_DATA, PG9MD_000), 1154 PINMUX_DATA(PG9_DATA, PG9MD_000),
1141 PINMUX_DATA(D25_MARK, PG9MD_001), 1155 PINMUX_DATA(D25_MARK, PG9MD_001),
1142 PINMUX_DATA(LCD_DATA9_MARK, PG9MD_010), 1156 PINMUX_DATA(LCD_DATA9_PG9_MARK, PG9MD_010),
1143 PINMUX_DATA(PINT1_PG_MARK, PG9MD_011), 1157 PINMUX_DATA(PINT1_PG_MARK, PG9MD_011),
1144 PINMUX_DATA(TIOC3B_MARK, PG9MD_100), 1158 PINMUX_DATA(TIOC3B_MARK, PG9MD_100),
1145 1159
1146 PINMUX_DATA(PG8_DATA, PG8MD_000), 1160 PINMUX_DATA(PG8_DATA, PG8MD_000),
1147 PINMUX_DATA(D24_MARK, PG8MD_001), 1161 PINMUX_DATA(D24_MARK, PG8MD_001),
1148 PINMUX_DATA(LCD_DATA8_MARK, PG8MD_010), 1162 PINMUX_DATA(LCD_DATA8_PG8_MARK, PG8MD_010),
1149 PINMUX_DATA(PINT0_PG_MARK, PG8MD_011), 1163 PINMUX_DATA(PINT0_PG_MARK, PG8MD_011),
1150 PINMUX_DATA(TIOC3A_MARK, PG8MD_100), 1164 PINMUX_DATA(TIOC3A_MARK, PG8MD_100),
1151 1165
1152 PINMUX_DATA(PG7_DATA, PG7MD_000), 1166 PINMUX_DATA(PG7_DATA, PG7MD_000),
1153 PINMUX_DATA(D23_MARK, PG7MD_001), 1167 PINMUX_DATA(D23_MARK, PG7MD_001),
1154 PINMUX_DATA(LCD_DATA7_MARK, PG7MD_010), 1168 PINMUX_DATA(LCD_DATA7_PG7_MARK, PG7MD_010),
1155 PINMUX_DATA(IRQ7_PG_MARK, PG7MD_011), 1169 PINMUX_DATA(IRQ7_PG_MARK, PG7MD_011),
1156 PINMUX_DATA(TIOC2B_MARK, PG7MD_100), 1170 PINMUX_DATA(TIOC2B_MARK, PG7MD_100),
1157 1171
1158 PINMUX_DATA(PG6_DATA, PG6MD_000), 1172 PINMUX_DATA(PG6_DATA, PG6MD_000),
1159 PINMUX_DATA(D22_MARK, PG6MD_001), 1173 PINMUX_DATA(D22_MARK, PG6MD_001),
1160 PINMUX_DATA(LCD_DATA6_MARK, PG6MD_010), 1174 PINMUX_DATA(LCD_DATA6_PG6_MARK, PG6MD_010),
1161 PINMUX_DATA(IRQ6_PG_MARK, PG6MD_011), 1175 PINMUX_DATA(IRQ6_PG_MARK, PG6MD_011),
1162 PINMUX_DATA(TIOC2A_MARK, PG6MD_100), 1176 PINMUX_DATA(TIOC2A_MARK, PG6MD_100),
1163 1177
1164 PINMUX_DATA(PG5_DATA, PG5MD_000), 1178 PINMUX_DATA(PG5_DATA, PG5MD_000),
1165 PINMUX_DATA(D21_MARK, PG5MD_001), 1179 PINMUX_DATA(D21_MARK, PG5MD_001),
1166 PINMUX_DATA(LCD_DATA5_MARK, PG5MD_010), 1180 PINMUX_DATA(LCD_DATA5_PG5_MARK, PG5MD_010),
1167 PINMUX_DATA(IRQ5_PG_MARK, PG5MD_011), 1181 PINMUX_DATA(IRQ5_PG_MARK, PG5MD_011),
1168 PINMUX_DATA(TIOC1B_MARK, PG5MD_100), 1182 PINMUX_DATA(TIOC1B_MARK, PG5MD_100),
1169 1183
1170 PINMUX_DATA(PG4_DATA, PG4MD_000), 1184 PINMUX_DATA(PG4_DATA, PG4MD_000),
1171 PINMUX_DATA(D20_MARK, PG4MD_001), 1185 PINMUX_DATA(D20_MARK, PG4MD_001),
1172 PINMUX_DATA(LCD_DATA4_MARK, PG4MD_010), 1186 PINMUX_DATA(LCD_DATA4_PG4_MARK, PG4MD_010),
1173 PINMUX_DATA(IRQ4_PG_MARK, PG4MD_011), 1187 PINMUX_DATA(IRQ4_PG_MARK, PG4MD_011),
1174 PINMUX_DATA(TIOC1A_MARK, PG4MD_100), 1188 PINMUX_DATA(TIOC1A_MARK, PG4MD_100),
1175 1189
1176 PINMUX_DATA(PG3_DATA, PG3MD_000), 1190 PINMUX_DATA(PG3_DATA, PG3MD_000),
1177 PINMUX_DATA(D19_MARK, PG3MD_001), 1191 PINMUX_DATA(D19_MARK, PG3MD_001),
1178 PINMUX_DATA(LCD_DATA3_MARK, PG3MD_010), 1192 PINMUX_DATA(LCD_DATA3_PG3_MARK, PG3MD_010),
1179 PINMUX_DATA(IRQ3_PG_MARK, PG3MD_011), 1193 PINMUX_DATA(IRQ3_PG_MARK, PG3MD_011),
1180 PINMUX_DATA(TIOC0D_MARK, PG3MD_100), 1194 PINMUX_DATA(TIOC0D_MARK, PG3MD_100),
1181 1195
1182 PINMUX_DATA(PG2_DATA, PG2MD_000), 1196 PINMUX_DATA(PG2_DATA, PG2MD_000),
1183 PINMUX_DATA(D18_MARK, PG2MD_001), 1197 PINMUX_DATA(D18_MARK, PG2MD_001),
1184 PINMUX_DATA(LCD_DATA2_MARK, PG2MD_010), 1198 PINMUX_DATA(LCD_DATA2_PG2_MARK, PG2MD_010),
1185 PINMUX_DATA(IRQ2_PG_MARK, PG2MD_011), 1199 PINMUX_DATA(IRQ2_PG_MARK, PG2MD_011),
1186 PINMUX_DATA(TIOC0C_MARK, PG2MD_100), 1200 PINMUX_DATA(TIOC0C_MARK, PG2MD_100),
1187 1201
1188 PINMUX_DATA(PG1_DATA, PG1MD_000), 1202 PINMUX_DATA(PG1_DATA, PG1MD_000),
1189 PINMUX_DATA(D17_MARK, PG1MD_001), 1203 PINMUX_DATA(D17_MARK, PG1MD_001),
1190 PINMUX_DATA(LCD_DATA1_MARK, PG1MD_010), 1204 PINMUX_DATA(LCD_DATA1_PG1_MARK, PG1MD_010),
1191 PINMUX_DATA(IRQ1_PG_MARK, PG1MD_011), 1205 PINMUX_DATA(IRQ1_PG_MARK, PG1MD_011),
1192 PINMUX_DATA(TIOC0B_MARK, PG1MD_100), 1206 PINMUX_DATA(TIOC0B_MARK, PG1MD_100),
1193 1207
1194 PINMUX_DATA(PG0_DATA, PG0MD_000), 1208 PINMUX_DATA(PG0_DATA, PG0MD_000),
1195 PINMUX_DATA(D16_MARK, PG0MD_001), 1209 PINMUX_DATA(D16_MARK, PG0MD_001),
1196 PINMUX_DATA(LCD_DATA0_MARK, PG0MD_010), 1210 PINMUX_DATA(LCD_DATA0_PG0_MARK, PG0MD_010),
1197 PINMUX_DATA(IRQ0_PG_MARK, PG0MD_011), 1211 PINMUX_DATA(IRQ0_PG_MARK, PG0MD_011),
1198 PINMUX_DATA(TIOC0A_MARK, PG0MD_100), 1212 PINMUX_DATA(TIOC0A_MARK, PG0MD_100),
1199 1213
@@ -1275,14 +1289,14 @@ static pinmux_enum_t pinmux_data[] = {
1275 1289
1276 PINMUX_DATA(PJ23_DATA, PJ23MD_000), 1290 PINMUX_DATA(PJ23_DATA, PJ23MD_000),
1277 PINMUX_DATA(DV_DATA23_MARK, PJ23MD_001), 1291 PINMUX_DATA(DV_DATA23_MARK, PJ23MD_001),
1278 PINMUX_DATA(LCD_DATA23_MARK, PJ23MD_010), 1292 PINMUX_DATA(LCD_DATA23_PJ23_MARK, PJ23MD_010),
1279 PINMUX_DATA(LCD_TCON6_MARK, PJ23MD_011), 1293 PINMUX_DATA(LCD_TCON6_MARK, PJ23MD_011),
1280 PINMUX_DATA(IRQ3_PJ_MARK, PJ23MD_100), 1294 PINMUX_DATA(IRQ3_PJ_MARK, PJ23MD_100),
1281 PINMUX_DATA(CTX1_MARK, PJ23MD_101), 1295 PINMUX_DATA(CTX1_MARK, PJ23MD_101),
1282 1296
1283 PINMUX_DATA(PJ22_DATA, PJ22MD_000), 1297 PINMUX_DATA(PJ22_DATA, PJ22MD_000),
1284 PINMUX_DATA(DV_DATA22_MARK, PJ22MD_001), 1298 PINMUX_DATA(DV_DATA22_MARK, PJ22MD_001),
1285 PINMUX_DATA(LCD_DATA22_MARK, PJ22MD_010), 1299 PINMUX_DATA(LCD_DATA22_PJ22_MARK, PJ22MD_010),
1286 PINMUX_DATA(LCD_TCON5_MARK, PJ22MD_011), 1300 PINMUX_DATA(LCD_TCON5_MARK, PJ22MD_011),
1287 PINMUX_DATA(IRQ2_PJ_MARK, PJ22MD_100), 1301 PINMUX_DATA(IRQ2_PJ_MARK, PJ22MD_100),
1288 PINMUX_DATA(CRX1_MARK, PJ22MD_101), 1302 PINMUX_DATA(CRX1_MARK, PJ22MD_101),
@@ -1290,14 +1304,14 @@ static pinmux_enum_t pinmux_data[] = {
1290 1304
1291 PINMUX_DATA(PJ21_DATA, PJ21MD_000), 1305 PINMUX_DATA(PJ21_DATA, PJ21MD_000),
1292 PINMUX_DATA(DV_DATA21_MARK, PJ21MD_001), 1306 PINMUX_DATA(DV_DATA21_MARK, PJ21MD_001),
1293 PINMUX_DATA(LCD_DATA21_MARK, PJ21MD_010), 1307 PINMUX_DATA(LCD_DATA21_PJ21_MARK, PJ21MD_010),
1294 PINMUX_DATA(LCD_TCON4_MARK, PJ21MD_011), 1308 PINMUX_DATA(LCD_TCON4_MARK, PJ21MD_011),
1295 PINMUX_DATA(IRQ1_PJ_MARK, PJ21MD_100), 1309 PINMUX_DATA(IRQ1_PJ_MARK, PJ21MD_100),
1296 PINMUX_DATA(CTX2_MARK, PJ21MD_101), 1310 PINMUX_DATA(CTX2_MARK, PJ21MD_101),
1297 1311
1298 PINMUX_DATA(PJ20_DATA, PJ20MD_000), 1312 PINMUX_DATA(PJ20_DATA, PJ20MD_000),
1299 PINMUX_DATA(DV_DATA20_MARK, PJ20MD_001), 1313 PINMUX_DATA(DV_DATA20_MARK, PJ20MD_001),
1300 PINMUX_DATA(LCD_DATA20_MARK, PJ20MD_010), 1314 PINMUX_DATA(LCD_DATA20_PJ20_MARK, PJ20MD_010),
1301 PINMUX_DATA(LCD_TCON3_MARK, PJ20MD_011), 1315 PINMUX_DATA(LCD_TCON3_MARK, PJ20MD_011),
1302 PINMUX_DATA(IRQ0_PJ_MARK, PJ20MD_100), 1316 PINMUX_DATA(IRQ0_PJ_MARK, PJ20MD_100),
1303 PINMUX_DATA(CRX2_MARK, PJ20MD_101), 1317 PINMUX_DATA(CRX2_MARK, PJ20MD_101),
@@ -1305,7 +1319,7 @@ static pinmux_enum_t pinmux_data[] = {
1305 1319
1306 PINMUX_DATA(PJ19_DATA, PJ19MD_000), 1320 PINMUX_DATA(PJ19_DATA, PJ19MD_000),
1307 PINMUX_DATA(DV_DATA19_MARK, PJ19MD_001), 1321 PINMUX_DATA(DV_DATA19_MARK, PJ19MD_001),
1308 PINMUX_DATA(LCD_DATA19_MARK, PJ19MD_010), 1322 PINMUX_DATA(LCD_DATA19_PJ19_MARK, PJ19MD_010),
1309 PINMUX_DATA(MISO0_PJ19_MARK, PJ19MD_011), 1323 PINMUX_DATA(MISO0_PJ19_MARK, PJ19MD_011),
1310 PINMUX_DATA(TIOC0D_MARK, PJ19MD_100), 1324 PINMUX_DATA(TIOC0D_MARK, PJ19MD_100),
1311 PINMUX_DATA(SIOFRXD_MARK, PJ19MD_101), 1325 PINMUX_DATA(SIOFRXD_MARK, PJ19MD_101),
@@ -1313,126 +1327,126 @@ static pinmux_enum_t pinmux_data[] = {
1313 1327
1314 PINMUX_DATA(PJ18_DATA, PJ18MD_000), 1328 PINMUX_DATA(PJ18_DATA, PJ18MD_000),
1315 PINMUX_DATA(DV_DATA18_MARK, PJ18MD_001), 1329 PINMUX_DATA(DV_DATA18_MARK, PJ18MD_001),
1316 PINMUX_DATA(LCD_DATA18_MARK, PJ18MD_010), 1330 PINMUX_DATA(LCD_DATA18_PJ18_MARK, PJ18MD_010),
1317 PINMUX_DATA(MOSI0_PJ18_MARK, PJ18MD_011), 1331 PINMUX_DATA(MOSI0_PJ18_MARK, PJ18MD_011),
1318 PINMUX_DATA(TIOC0C_MARK, PJ18MD_100), 1332 PINMUX_DATA(TIOC0C_MARK, PJ18MD_100),
1319 PINMUX_DATA(SIOFTXD_MARK, PJ18MD_101), 1333 PINMUX_DATA(SIOFTXD_MARK, PJ18MD_101),
1320 1334
1321 PINMUX_DATA(PJ17_DATA, PJ17MD_000), 1335 PINMUX_DATA(PJ17_DATA, PJ17MD_000),
1322 PINMUX_DATA(DV_DATA17_MARK, PJ17MD_001), 1336 PINMUX_DATA(DV_DATA17_MARK, PJ17MD_001),
1323 PINMUX_DATA(LCD_DATA17_MARK, PJ17MD_010), 1337 PINMUX_DATA(LCD_DATA17_PJ17_MARK, PJ17MD_010),
1324 PINMUX_DATA(SSL00_PJ17_MARK, PJ17MD_011), 1338 PINMUX_DATA(SSL00_PJ17_MARK, PJ17MD_011),
1325 PINMUX_DATA(TIOC0B_MARK, PJ17MD_100), 1339 PINMUX_DATA(TIOC0B_MARK, PJ17MD_100),
1326 PINMUX_DATA(SIOFSYNC_MARK, PJ17MD_101), 1340 PINMUX_DATA(SIOFSYNC_MARK, PJ17MD_101),
1327 1341
1328 PINMUX_DATA(PJ16_DATA, PJ16MD_000), 1342 PINMUX_DATA(PJ16_DATA, PJ16MD_000),
1329 PINMUX_DATA(DV_DATA16_MARK, PJ16MD_001), 1343 PINMUX_DATA(DV_DATA16_MARK, PJ16MD_001),
1330 PINMUX_DATA(LCD_DATA16_MARK, PJ16MD_010), 1344 PINMUX_DATA(LCD_DATA16_PJ16_MARK, PJ16MD_010),
1331 PINMUX_DATA(RSPCK0_PJ16_MARK, PJ16MD_011), 1345 PINMUX_DATA(RSPCK0_PJ16_MARK, PJ16MD_011),
1332 PINMUX_DATA(TIOC0A_MARK, PJ16MD_100), 1346 PINMUX_DATA(TIOC0A_MARK, PJ16MD_100),
1333 PINMUX_DATA(SIOFSCK_MARK, PJ16MD_101), 1347 PINMUX_DATA(SIOFSCK_MARK, PJ16MD_101),
1334 1348
1335 PINMUX_DATA(PJ15_DATA, PJ15MD_000), 1349 PINMUX_DATA(PJ15_DATA, PJ15MD_000),
1336 PINMUX_DATA(DV_DATA15_MARK, PJ15MD_001), 1350 PINMUX_DATA(DV_DATA15_MARK, PJ15MD_001),
1337 PINMUX_DATA(LCD_DATA15_MARK, PJ15MD_010), 1351 PINMUX_DATA(LCD_DATA15_PJ15_MARK, PJ15MD_010),
1338 PINMUX_DATA(PINT7_PJ_MARK, PJ15MD_011), 1352 PINMUX_DATA(PINT7_PJ_MARK, PJ15MD_011),
1339 PINMUX_DATA(PWM2H_MARK, PJ15MD_100), 1353 PINMUX_DATA(PWM2H_MARK, PJ15MD_100),
1340 PINMUX_DATA(TXD7_MARK, PJ15MD_101), 1354 PINMUX_DATA(TXD7_MARK, PJ15MD_101),
1341 1355
1342 PINMUX_DATA(PJ14_DATA, PJ14MD_000), 1356 PINMUX_DATA(PJ14_DATA, PJ14MD_000),
1343 PINMUX_DATA(DV_DATA14_MARK, PJ14MD_001), 1357 PINMUX_DATA(DV_DATA14_MARK, PJ14MD_001),
1344 PINMUX_DATA(LCD_DATA14_MARK, PJ14MD_010), 1358 PINMUX_DATA(LCD_DATA14_PJ14_MARK, PJ14MD_010),
1345 PINMUX_DATA(PINT6_PJ_MARK, PJ14MD_011), 1359 PINMUX_DATA(PINT6_PJ_MARK, PJ14MD_011),
1346 PINMUX_DATA(PWM2G_MARK, PJ14MD_100), 1360 PINMUX_DATA(PWM2G_MARK, PJ14MD_100),
1347 PINMUX_DATA(TXD6_MARK, PJ14MD_101), 1361 PINMUX_DATA(TXD6_MARK, PJ14MD_101),
1348 1362
1349 PINMUX_DATA(PJ13_DATA, PJ13MD_000), 1363 PINMUX_DATA(PJ13_DATA, PJ13MD_000),
1350 PINMUX_DATA(DV_DATA13_MARK, PJ13MD_001), 1364 PINMUX_DATA(DV_DATA13_MARK, PJ13MD_001),
1351 PINMUX_DATA(LCD_DATA13_MARK, PJ13MD_010), 1365 PINMUX_DATA(LCD_DATA13_PJ13_MARK, PJ13MD_010),
1352 PINMUX_DATA(PINT5_PJ_MARK, PJ13MD_011), 1366 PINMUX_DATA(PINT5_PJ_MARK, PJ13MD_011),
1353 PINMUX_DATA(PWM2F_MARK, PJ13MD_100), 1367 PINMUX_DATA(PWM2F_MARK, PJ13MD_100),
1354 PINMUX_DATA(TXD5_MARK, PJ13MD_101), 1368 PINMUX_DATA(TXD5_MARK, PJ13MD_101),
1355 1369
1356 PINMUX_DATA(PJ12_DATA, PJ12MD_000), 1370 PINMUX_DATA(PJ12_DATA, PJ12MD_000),
1357 PINMUX_DATA(DV_DATA12_MARK, PJ12MD_001), 1371 PINMUX_DATA(DV_DATA12_MARK, PJ12MD_001),
1358 PINMUX_DATA(LCD_DATA12_MARK, PJ12MD_010), 1372 PINMUX_DATA(LCD_DATA12_PJ12_MARK, PJ12MD_010),
1359 PINMUX_DATA(PINT4_PJ_MARK, PJ12MD_011), 1373 PINMUX_DATA(PINT4_PJ_MARK, PJ12MD_011),
1360 PINMUX_DATA(PWM2E_MARK, PJ12MD_100), 1374 PINMUX_DATA(PWM2E_MARK, PJ12MD_100),
1361 PINMUX_DATA(SCK7_MARK, PJ12MD_101), 1375 PINMUX_DATA(SCK7_MARK, PJ12MD_101),
1362 1376
1363 PINMUX_DATA(PJ11_DATA, PJ11MD_000), 1377 PINMUX_DATA(PJ11_DATA, PJ11MD_000),
1364 PINMUX_DATA(DV_DATA11_MARK, PJ11MD_001), 1378 PINMUX_DATA(DV_DATA11_MARK, PJ11MD_001),
1365 PINMUX_DATA(LCD_DATA11_MARK, PJ11MD_010), 1379 PINMUX_DATA(LCD_DATA11_PJ11_MARK, PJ11MD_010),
1366 PINMUX_DATA(PINT3_PJ_MARK, PJ11MD_011), 1380 PINMUX_DATA(PINT3_PJ_MARK, PJ11MD_011),
1367 PINMUX_DATA(PWM2D_MARK, PJ11MD_100), 1381 PINMUX_DATA(PWM2D_MARK, PJ11MD_100),
1368 PINMUX_DATA(SCK6_MARK, PJ11MD_101), 1382 PINMUX_DATA(SCK6_MARK, PJ11MD_101),
1369 1383
1370 PINMUX_DATA(PJ10_DATA, PJ10MD_000), 1384 PINMUX_DATA(PJ10_DATA, PJ10MD_000),
1371 PINMUX_DATA(DV_DATA10_MARK, PJ10MD_001), 1385 PINMUX_DATA(DV_DATA10_MARK, PJ10MD_001),
1372 PINMUX_DATA(LCD_DATA10_MARK, PJ10MD_010), 1386 PINMUX_DATA(LCD_DATA10_PJ10_MARK, PJ10MD_010),
1373 PINMUX_DATA(PINT2_PJ_MARK, PJ10MD_011), 1387 PINMUX_DATA(PINT2_PJ_MARK, PJ10MD_011),
1374 PINMUX_DATA(PWM2C_MARK, PJ10MD_100), 1388 PINMUX_DATA(PWM2C_MARK, PJ10MD_100),
1375 PINMUX_DATA(SCK5_MARK, PJ10MD_101), 1389 PINMUX_DATA(SCK5_MARK, PJ10MD_101),
1376 1390
1377 PINMUX_DATA(PJ9_DATA, PJ9MD_000), 1391 PINMUX_DATA(PJ9_DATA, PJ9MD_000),
1378 PINMUX_DATA(DV_DATA9_MARK, PJ9MD_001), 1392 PINMUX_DATA(DV_DATA9_MARK, PJ9MD_001),
1379 PINMUX_DATA(LCD_DATA9_MARK, PJ9MD_010), 1393 PINMUX_DATA(LCD_DATA9_PJ9_MARK, PJ9MD_010),
1380 PINMUX_DATA(PINT1_PJ_MARK, PJ9MD_011), 1394 PINMUX_DATA(PINT1_PJ_MARK, PJ9MD_011),
1381 PINMUX_DATA(PWM2B_MARK, PJ9MD_100), 1395 PINMUX_DATA(PWM2B_MARK, PJ9MD_100),
1382 PINMUX_DATA(RTS5_MARK, PJ9MD_101), 1396 PINMUX_DATA(RTS5_MARK, PJ9MD_101),
1383 1397
1384 PINMUX_DATA(PJ8_DATA, PJ8MD_000), 1398 PINMUX_DATA(PJ8_DATA, PJ8MD_000),
1385 PINMUX_DATA(DV_DATA8_MARK, PJ8MD_001), 1399 PINMUX_DATA(DV_DATA8_MARK, PJ8MD_001),
1386 PINMUX_DATA(LCD_DATA8_MARK, PJ8MD_010), 1400 PINMUX_DATA(LCD_DATA8_PJ8_MARK, PJ8MD_010),
1387 PINMUX_DATA(PINT0_PJ_MARK, PJ8MD_011), 1401 PINMUX_DATA(PINT0_PJ_MARK, PJ8MD_011),
1388 PINMUX_DATA(PWM2A_MARK, PJ8MD_100), 1402 PINMUX_DATA(PWM2A_MARK, PJ8MD_100),
1389 PINMUX_DATA(CTS5_MARK, PJ8MD_101), 1403 PINMUX_DATA(CTS5_MARK, PJ8MD_101),
1390 1404
1391 PINMUX_DATA(PJ7_DATA, PJ7MD_000), 1405 PINMUX_DATA(PJ7_DATA, PJ7MD_000),
1392 PINMUX_DATA(DV_DATA7_MARK, PJ7MD_001), 1406 PINMUX_DATA(DV_DATA7_MARK, PJ7MD_001),
1393 PINMUX_DATA(LCD_DATA7_MARK, PJ7MD_010), 1407 PINMUX_DATA(LCD_DATA7_PJ7_MARK, PJ7MD_010),
1394 PINMUX_DATA(SD_D2_MARK, PJ7MD_011), 1408 PINMUX_DATA(SD_D2_MARK, PJ7MD_011),
1395 PINMUX_DATA(PWM1H_MARK, PJ7MD_100), 1409 PINMUX_DATA(PWM1H_MARK, PJ7MD_100),
1396 1410
1397 PINMUX_DATA(PJ6_DATA, PJ6MD_000), 1411 PINMUX_DATA(PJ6_DATA, PJ6MD_000),
1398 PINMUX_DATA(DV_DATA6_MARK, PJ6MD_001), 1412 PINMUX_DATA(DV_DATA6_MARK, PJ6MD_001),
1399 PINMUX_DATA(LCD_DATA6_MARK, PJ6MD_010), 1413 PINMUX_DATA(LCD_DATA6_PJ6_MARK, PJ6MD_010),
1400 PINMUX_DATA(SD_D3_MARK, PJ6MD_011), 1414 PINMUX_DATA(SD_D3_MARK, PJ6MD_011),
1401 PINMUX_DATA(PWM1G_MARK, PJ6MD_100), 1415 PINMUX_DATA(PWM1G_MARK, PJ6MD_100),
1402 1416
1403 PINMUX_DATA(PJ5_DATA, PJ5MD_000), 1417 PINMUX_DATA(PJ5_DATA, PJ5MD_000),
1404 PINMUX_DATA(DV_DATA5_MARK, PJ5MD_001), 1418 PINMUX_DATA(DV_DATA5_MARK, PJ5MD_001),
1405 PINMUX_DATA(LCD_DATA5_MARK, PJ5MD_010), 1419 PINMUX_DATA(LCD_DATA5_PJ5_MARK, PJ5MD_010),
1406 PINMUX_DATA(SD_CMD_MARK, PJ5MD_011), 1420 PINMUX_DATA(SD_CMD_MARK, PJ5MD_011),
1407 PINMUX_DATA(PWM1F_MARK, PJ5MD_100), 1421 PINMUX_DATA(PWM1F_MARK, PJ5MD_100),
1408 1422
1409 PINMUX_DATA(PJ4_DATA, PJ4MD_000), 1423 PINMUX_DATA(PJ4_DATA, PJ4MD_000),
1410 PINMUX_DATA(DV_DATA4_MARK, PJ4MD_001), 1424 PINMUX_DATA(DV_DATA4_MARK, PJ4MD_001),
1411 PINMUX_DATA(LCD_DATA4_MARK, PJ4MD_010), 1425 PINMUX_DATA(LCD_DATA4_PJ4_MARK, PJ4MD_010),
1412 PINMUX_DATA(SD_CLK_MARK, PJ4MD_011), 1426 PINMUX_DATA(SD_CLK_MARK, PJ4MD_011),
1413 PINMUX_DATA(PWM1E_MARK, PJ4MD_100), 1427 PINMUX_DATA(PWM1E_MARK, PJ4MD_100),
1414 1428
1415 PINMUX_DATA(PJ3_DATA, PJ3MD_000), 1429 PINMUX_DATA(PJ3_DATA, PJ3MD_000),
1416 PINMUX_DATA(DV_DATA3_MARK, PJ3MD_001), 1430 PINMUX_DATA(DV_DATA3_MARK, PJ3MD_001),
1417 PINMUX_DATA(LCD_DATA3_MARK, PJ3MD_010), 1431 PINMUX_DATA(LCD_DATA3_PJ3_MARK, PJ3MD_010),
1418 PINMUX_DATA(SD_D0_MARK, PJ3MD_011), 1432 PINMUX_DATA(SD_D0_MARK, PJ3MD_011),
1419 PINMUX_DATA(PWM1D_MARK, PJ3MD_100), 1433 PINMUX_DATA(PWM1D_MARK, PJ3MD_100),
1420 1434
1421 PINMUX_DATA(PJ2_DATA, PJ2MD_000), 1435 PINMUX_DATA(PJ2_DATA, PJ2MD_000),
1422 PINMUX_DATA(DV_DATA2_MARK, PJ2MD_001), 1436 PINMUX_DATA(DV_DATA2_MARK, PJ2MD_001),
1423 PINMUX_DATA(LCD_DATA2_MARK, PJ2MD_010), 1437 PINMUX_DATA(LCD_DATA2_PJ2_MARK, PJ2MD_010),
1424 PINMUX_DATA(SD_D1_MARK, PJ2MD_011), 1438 PINMUX_DATA(SD_D1_MARK, PJ2MD_011),
1425 PINMUX_DATA(PWM1C_MARK, PJ2MD_100), 1439 PINMUX_DATA(PWM1C_MARK, PJ2MD_100),
1426 1440
1427 PINMUX_DATA(PJ1_DATA, PJ1MD_000), 1441 PINMUX_DATA(PJ1_DATA, PJ1MD_000),
1428 PINMUX_DATA(DV_DATA1_MARK, PJ1MD_001), 1442 PINMUX_DATA(DV_DATA1_MARK, PJ1MD_001),
1429 PINMUX_DATA(LCD_DATA1_MARK, PJ1MD_010), 1443 PINMUX_DATA(LCD_DATA1_PJ1_MARK, PJ1MD_010),
1430 PINMUX_DATA(SD_WP_MARK, PJ1MD_011), 1444 PINMUX_DATA(SD_WP_MARK, PJ1MD_011),
1431 PINMUX_DATA(PWM1B_MARK, PJ1MD_100), 1445 PINMUX_DATA(PWM1B_MARK, PJ1MD_100),
1432 1446
1433 PINMUX_DATA(PJ0_DATA, PJ0MD_000), 1447 PINMUX_DATA(PJ0_DATA, PJ0MD_000),
1434 PINMUX_DATA(DV_DATA0_MARK, PJ0MD_001), 1448 PINMUX_DATA(DV_DATA0_MARK, PJ0MD_001),
1435 PINMUX_DATA(LCD_DATA0_MARK, PJ0MD_010), 1449 PINMUX_DATA(LCD_DATA0_PJ0_MARK, PJ0MD_010),
1436 PINMUX_DATA(SD_CD_MARK, PJ0MD_011), 1450 PINMUX_DATA(SD_CD_MARK, PJ0MD_011),
1437 PINMUX_DATA(PWM1A_MARK, PJ0MD_100), 1451 PINMUX_DATA(PWM1A_MARK, PJ0MD_100),
1438}; 1452};
@@ -1877,30 +1891,55 @@ static struct pinmux_gpio pinmux_gpios[] = {
1877 PINMUX_GPIO(GPIO_FN_LCD_HSYNC, LCD_HSYNC_MARK), 1891 PINMUX_GPIO(GPIO_FN_LCD_HSYNC, LCD_HSYNC_MARK),
1878 PINMUX_GPIO(GPIO_FN_LCD_DE, LCD_DE_MARK), 1892 PINMUX_GPIO(GPIO_FN_LCD_DE, LCD_DE_MARK),
1879 1893
1880 PINMUX_GPIO(GPIO_FN_LCD_DATA23, LCD_DATA23_MARK), 1894 PINMUX_GPIO(GPIO_FN_LCD_DATA23_PG23, LCD_DATA23_PG23_MARK),
1881 PINMUX_GPIO(GPIO_FN_LCD_DATA22, LCD_DATA22_MARK), 1895 PINMUX_GPIO(GPIO_FN_LCD_DATA22_PG22, LCD_DATA22_PG22_MARK),
1882 PINMUX_GPIO(GPIO_FN_LCD_DATA21, LCD_DATA21_MARK), 1896 PINMUX_GPIO(GPIO_FN_LCD_DATA21_PG21, LCD_DATA21_PG21_MARK),
1883 PINMUX_GPIO(GPIO_FN_LCD_DATA20, LCD_DATA20_MARK), 1897 PINMUX_GPIO(GPIO_FN_LCD_DATA20_PG20, LCD_DATA20_PG20_MARK),
1884 PINMUX_GPIO(GPIO_FN_LCD_DATA19, LCD_DATA19_MARK), 1898 PINMUX_GPIO(GPIO_FN_LCD_DATA19_PG19, LCD_DATA19_PG19_MARK),
1885 PINMUX_GPIO(GPIO_FN_LCD_DATA18, LCD_DATA18_MARK), 1899 PINMUX_GPIO(GPIO_FN_LCD_DATA18_PG18, LCD_DATA18_PG18_MARK),
1886 PINMUX_GPIO(GPIO_FN_LCD_DATA17, LCD_DATA17_MARK), 1900 PINMUX_GPIO(GPIO_FN_LCD_DATA17_PG17, LCD_DATA17_PG17_MARK),
1887 PINMUX_GPIO(GPIO_FN_LCD_DATA16, LCD_DATA16_MARK), 1901 PINMUX_GPIO(GPIO_FN_LCD_DATA16_PG16, LCD_DATA16_PG16_MARK),
1888 PINMUX_GPIO(GPIO_FN_LCD_DATA15, LCD_DATA15_MARK), 1902 PINMUX_GPIO(GPIO_FN_LCD_DATA15_PG15, LCD_DATA15_PG15_MARK),
1889 PINMUX_GPIO(GPIO_FN_LCD_DATA14, LCD_DATA14_MARK), 1903 PINMUX_GPIO(GPIO_FN_LCD_DATA14_PG14, LCD_DATA14_PG14_MARK),
1890 PINMUX_GPIO(GPIO_FN_LCD_DATA13, LCD_DATA13_MARK), 1904 PINMUX_GPIO(GPIO_FN_LCD_DATA13_PG13, LCD_DATA13_PG13_MARK),
1891 PINMUX_GPIO(GPIO_FN_LCD_DATA12, LCD_DATA12_MARK), 1905 PINMUX_GPIO(GPIO_FN_LCD_DATA12_PG12, LCD_DATA12_PG12_MARK),
1892 PINMUX_GPIO(GPIO_FN_LCD_DATA11, LCD_DATA11_MARK), 1906 PINMUX_GPIO(GPIO_FN_LCD_DATA11_PG11, LCD_DATA11_PG11_MARK),
1893 PINMUX_GPIO(GPIO_FN_LCD_DATA10, LCD_DATA10_MARK), 1907 PINMUX_GPIO(GPIO_FN_LCD_DATA10_PG10, LCD_DATA10_PG10_MARK),
1894 PINMUX_GPIO(GPIO_FN_LCD_DATA9, LCD_DATA9_MARK), 1908 PINMUX_GPIO(GPIO_FN_LCD_DATA9_PG9, LCD_DATA9_PG9_MARK),
1895 PINMUX_GPIO(GPIO_FN_LCD_DATA8, LCD_DATA8_MARK), 1909 PINMUX_GPIO(GPIO_FN_LCD_DATA8_PG8, LCD_DATA8_PG8_MARK),
1896 PINMUX_GPIO(GPIO_FN_LCD_DATA7, LCD_DATA7_MARK), 1910 PINMUX_GPIO(GPIO_FN_LCD_DATA7_PG7, LCD_DATA7_PG7_MARK),
1897 PINMUX_GPIO(GPIO_FN_LCD_DATA6, LCD_DATA6_MARK), 1911 PINMUX_GPIO(GPIO_FN_LCD_DATA6_PG6, LCD_DATA6_PG6_MARK),
1898 PINMUX_GPIO(GPIO_FN_LCD_DATA5, LCD_DATA5_MARK), 1912 PINMUX_GPIO(GPIO_FN_LCD_DATA5_PG5, LCD_DATA5_PG5_MARK),
1899 PINMUX_GPIO(GPIO_FN_LCD_DATA4, LCD_DATA4_MARK), 1913 PINMUX_GPIO(GPIO_FN_LCD_DATA4_PG4, LCD_DATA4_PG4_MARK),
1900 PINMUX_GPIO(GPIO_FN_LCD_DATA3, LCD_DATA3_MARK), 1914 PINMUX_GPIO(GPIO_FN_LCD_DATA3_PG3, LCD_DATA3_PG3_MARK),
1901 PINMUX_GPIO(GPIO_FN_LCD_DATA2, LCD_DATA2_MARK), 1915 PINMUX_GPIO(GPIO_FN_LCD_DATA2_PG2, LCD_DATA2_PG2_MARK),
1902 PINMUX_GPIO(GPIO_FN_LCD_DATA1, LCD_DATA1_MARK), 1916 PINMUX_GPIO(GPIO_FN_LCD_DATA1_PG1, LCD_DATA1_PG1_MARK),
1903 PINMUX_GPIO(GPIO_FN_LCD_DATA0, LCD_DATA0_MARK), 1917 PINMUX_GPIO(GPIO_FN_LCD_DATA0_PG0, LCD_DATA0_PG0_MARK),
1918
1919 PINMUX_GPIO(GPIO_FN_LCD_DATA23_PJ23, LCD_DATA23_PJ23_MARK),
1920 PINMUX_GPIO(GPIO_FN_LCD_DATA22_PJ22, LCD_DATA22_PJ22_MARK),
1921 PINMUX_GPIO(GPIO_FN_LCD_DATA21_PJ21, LCD_DATA21_PJ21_MARK),
1922 PINMUX_GPIO(GPIO_FN_LCD_DATA20_PJ20, LCD_DATA20_PJ20_MARK),
1923 PINMUX_GPIO(GPIO_FN_LCD_DATA19_PJ19, LCD_DATA19_PJ19_MARK),
1924 PINMUX_GPIO(GPIO_FN_LCD_DATA18_PJ18, LCD_DATA18_PJ18_MARK),
1925 PINMUX_GPIO(GPIO_FN_LCD_DATA17_PJ17, LCD_DATA17_PJ17_MARK),
1926 PINMUX_GPIO(GPIO_FN_LCD_DATA16_PJ16, LCD_DATA16_PJ16_MARK),
1927 PINMUX_GPIO(GPIO_FN_LCD_DATA15_PJ15, LCD_DATA15_PJ15_MARK),
1928 PINMUX_GPIO(GPIO_FN_LCD_DATA14_PJ14, LCD_DATA14_PJ14_MARK),
1929 PINMUX_GPIO(GPIO_FN_LCD_DATA13_PJ13, LCD_DATA13_PJ13_MARK),
1930 PINMUX_GPIO(GPIO_FN_LCD_DATA12_PJ12, LCD_DATA12_PJ12_MARK),
1931 PINMUX_GPIO(GPIO_FN_LCD_DATA11_PJ11, LCD_DATA11_PJ11_MARK),
1932 PINMUX_GPIO(GPIO_FN_LCD_DATA10_PJ10, LCD_DATA10_PJ10_MARK),
1933 PINMUX_GPIO(GPIO_FN_LCD_DATA9_PJ9, LCD_DATA9_PJ9_MARK),
1934 PINMUX_GPIO(GPIO_FN_LCD_DATA8_PJ8, LCD_DATA8_PJ8_MARK),
1935 PINMUX_GPIO(GPIO_FN_LCD_DATA7_PJ7, LCD_DATA7_PJ7_MARK),
1936 PINMUX_GPIO(GPIO_FN_LCD_DATA6_PJ6, LCD_DATA6_PJ6_MARK),
1937 PINMUX_GPIO(GPIO_FN_LCD_DATA5_PJ5, LCD_DATA5_PJ5_MARK),
1938 PINMUX_GPIO(GPIO_FN_LCD_DATA4_PJ4, LCD_DATA4_PJ4_MARK),
1939 PINMUX_GPIO(GPIO_FN_LCD_DATA3_PJ3, LCD_DATA3_PJ3_MARK),
1940 PINMUX_GPIO(GPIO_FN_LCD_DATA2_PJ2, LCD_DATA2_PJ2_MARK),
1941 PINMUX_GPIO(GPIO_FN_LCD_DATA1_PJ1, LCD_DATA1_PJ1_MARK),
1942 PINMUX_GPIO(GPIO_FN_LCD_DATA0_PJ0, LCD_DATA0_PJ0_MARK),
1904 1943
1905 PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK), 1944 PINMUX_GPIO(GPIO_FN_LCD_M_DISP, LCD_M_DISP_MARK),
1906}; 1945};
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index c87e78f73234..5f30f805d2f2 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -334,8 +334,8 @@ static struct clk_lookup lookups[] = {
334 CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]), 334 CLKDEV_CON_ID("tpu0", &mstp_clks[HWBLK_TPU]),
335 CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]), 335 CLKDEV_CON_ID("irda0", &mstp_clks[HWBLK_IRDA]),
336 CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]), 336 CLKDEV_CON_ID("tsif0", &mstp_clks[HWBLK_TSIF]),
337 CLKDEV_CON_ID("usb1", &mstp_clks[HWBLK_USB1]), 337 CLKDEV_DEV_ID("renesas_usbhs.1", &mstp_clks[HWBLK_USB1]),
338 CLKDEV_CON_ID("usb0", &mstp_clks[HWBLK_USB0]), 338 CLKDEV_DEV_ID("renesas_usbhs.0", &mstp_clks[HWBLK_USB0]),
339 CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]), 339 CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]),
340 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI0]), 340 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI0]),
341 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[HWBLK_SDHI1]), 341 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[HWBLK_SDHI1]),
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index 65786c7f5ded..6a868b091c2d 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -12,6 +12,7 @@
12#include <linux/platform_device.h> 12#include <linux/platform_device.h>
13#include <linux/serial.h> 13#include <linux/serial.h>
14#include <linux/serial_sci.h> 14#include <linux/serial_sci.h>
15#include <linux/sh_dma.h>
15#include <linux/sh_timer.h> 16#include <linux/sh_timer.h>
16#include <linux/sh_intc.h> 17#include <linux/sh_intc.h>
17#include <linux/uio_driver.h> 18#include <linux/uio_driver.h>
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index a7708425afa9..4a2f357f4df8 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -216,6 +216,20 @@ static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
216 TS_INDEX2VAL(XMIT_SZ_8BIT), 216 TS_INDEX2VAL(XMIT_SZ_8BIT),
217 .mid_rid = 0x42, 217 .mid_rid = 0x42,
218 }, 218 },
219 {
220 .slave_id = SHDMA_SLAVE_RSPI_TX,
221 .addr = 0xfe480004,
222 .chcr = SM_INC | 0x800 | 0x40000000 |
223 TS_INDEX2VAL(XMIT_SZ_16BIT),
224 .mid_rid = 0xc1,
225 },
226 {
227 .slave_id = SHDMA_SLAVE_RSPI_RX,
228 .addr = 0xfe480004,
229 .chcr = DM_INC | 0x800 | 0x40000000 |
230 TS_INDEX2VAL(XMIT_SZ_16BIT),
231 .mid_rid = 0xc2,
232 },
219}; 233};
220 234
221static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = { 235static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 7b57bf1dc855..ebe7a7d97215 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -273,7 +273,7 @@ void __init setup_arch(char **cmdline_p)
273 data_resource.start = virt_to_phys(_etext); 273 data_resource.start = virt_to_phys(_etext);
274 data_resource.end = virt_to_phys(_edata)-1; 274 data_resource.end = virt_to_phys(_edata)-1;
275 bss_resource.start = virt_to_phys(__bss_start); 275 bss_resource.start = virt_to_phys(__bss_start);
276 bss_resource.end = virt_to_phys(_ebss)-1; 276 bss_resource.end = virt_to_phys(__bss_stop)-1;
277 277
278#ifdef CONFIG_CMDLINE_OVERWRITE 278#ifdef CONFIG_CMDLINE_OVERWRITE
279 strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line)); 279 strlcpy(command_line, CONFIG_CMDLINE, sizeof(command_line));
diff --git a/arch/sh/kernel/sh_ksyms_32.c b/arch/sh/kernel/sh_ksyms_32.c
index 3896f26efa4a..2a0a596ebf67 100644
--- a/arch/sh/kernel/sh_ksyms_32.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
@@ -19,7 +19,6 @@ EXPORT_SYMBOL(csum_partial);
19EXPORT_SYMBOL(csum_partial_copy_generic); 19EXPORT_SYMBOL(csum_partial_copy_generic);
20EXPORT_SYMBOL(copy_page); 20EXPORT_SYMBOL(copy_page);
21EXPORT_SYMBOL(__clear_user); 21EXPORT_SYMBOL(__clear_user);
22EXPORT_SYMBOL(_ebss);
23EXPORT_SYMBOL(empty_zero_page); 22EXPORT_SYMBOL(empty_zero_page);
24 23
25#define DECLARE_EXPORT(name) \ 24#define DECLARE_EXPORT(name) \
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S
index c98905f71e28..db88cbf9eafd 100644
--- a/arch/sh/kernel/vmlinux.lds.S
+++ b/arch/sh/kernel/vmlinux.lds.S
@@ -78,7 +78,6 @@ SECTIONS
78 . = ALIGN(PAGE_SIZE); 78 . = ALIGN(PAGE_SIZE);
79 __init_end = .; 79 __init_end = .;
80 BSS_SECTION(0, PAGE_SIZE, 4) 80 BSS_SECTION(0, PAGE_SIZE, 4)
81 _ebss = .; /* uClinux MTD sucks */
82 _end = . ; 81 _end = . ;
83 82
84 STABS_DEBUG 83 STABS_DEBUG
diff --git a/arch/sh/lib/mcount.S b/arch/sh/lib/mcount.S
index 84a57761f17e..60164e65d665 100644
--- a/arch/sh/lib/mcount.S
+++ b/arch/sh/lib/mcount.S
@@ -39,7 +39,7 @@
39 * 39 *
40 * Make sure the stack pointer contains a valid address. Valid 40 * Make sure the stack pointer contains a valid address. Valid
41 * addresses for kernel stacks are anywhere after the bss 41 * addresses for kernel stacks are anywhere after the bss
42 * (after _ebss) and anywhere in init_thread_union (init_stack). 42 * (after __bss_stop) and anywhere in init_thread_union (init_stack).
43 */ 43 */
44#define STACK_CHECK() \ 44#define STACK_CHECK() \
45 mov #(THREAD_SIZE >> 10), r0; \ 45 mov #(THREAD_SIZE >> 10), r0; \
@@ -60,7 +60,7 @@
60 cmp/hi r2, r1; \ 60 cmp/hi r2, r1; \
61 bf stack_panic; \ 61 bf stack_panic; \
62 \ 62 \
63 /* If sp > _ebss then we're OK. */ \ 63 /* If sp > __bss_stop then we're OK. */ \
64 mov.l .L_ebss, r1; \ 64 mov.l .L_ebss, r1; \
65 cmp/hi r1, r15; \ 65 cmp/hi r1, r15; \
66 bt 1f; \ 66 bt 1f; \
@@ -70,7 +70,7 @@
70 cmp/hs r1, r15; \ 70 cmp/hs r1, r15; \
71 bf stack_panic; \ 71 bf stack_panic; \
72 \ 72 \
73 /* If sp > init_stack && sp < _ebss, not OK. */ \ 73 /* If sp > init_stack && sp < __bss_stop, not OK. */ \
74 add r0, r1; \ 74 add r0, r1; \
75 cmp/hs r1, r15; \ 75 cmp/hs r1, r15; \
76 bt stack_panic; \ 76 bt stack_panic; \
@@ -292,8 +292,6 @@ stack_panic:
292 nop 292 nop
293 293
294 .align 2 294 .align 2
295.L_ebss:
296 .long _ebss
297.L_init_thread_union: 295.L_init_thread_union:
298 .long init_thread_union 296 .long init_thread_union
299.Lpanic: 297.Lpanic:
diff --git a/arch/sh/mm/fault.c b/arch/sh/mm/fault.c
index 1fc25d85e515..3bdc1ad9a341 100644
--- a/arch/sh/mm/fault.c
+++ b/arch/sh/mm/fault.c
@@ -58,11 +58,15 @@ static void show_pte(struct mm_struct *mm, unsigned long addr)
58{ 58{
59 pgd_t *pgd; 59 pgd_t *pgd;
60 60
61 if (mm) 61 if (mm) {
62 pgd = mm->pgd; 62 pgd = mm->pgd;
63 else 63 } else {
64 pgd = get_TTB(); 64 pgd = get_TTB();
65 65
66 if (unlikely(!pgd))
67 pgd = swapper_pg_dir;
68 }
69
66 printk(KERN_ALERT "pgd = %p\n", pgd); 70 printk(KERN_ALERT "pgd = %p\n", pgd);
67 pgd += pgd_index(addr); 71 pgd += pgd_index(addr);
68 printk(KERN_ALERT "[%08lx] *pgd=%0*Lx", addr, 72 printk(KERN_ALERT "[%08lx] *pgd=%0*Lx", addr,
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index 0dc1f5786081..11c6c9603e71 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -502,12 +502,12 @@ SYSCALL_DEFINE1(sparc64_personality, unsigned long, personality)
502{ 502{
503 int ret; 503 int ret;
504 504
505 if (current->personality == PER_LINUX32 && 505 if (personality(current->personality) == PER_LINUX32 &&
506 personality == PER_LINUX) 506 personality(personality) == PER_LINUX)
507 personality = PER_LINUX32; 507 personality |= PER_LINUX32;
508 ret = sys_personality(personality); 508 ret = sys_personality(personality);
509 if (ret == PER_LINUX32) 509 if (personality(ret) == PER_LINUX32)
510 ret = PER_LINUX; 510 ret &= ~PER_LINUX32;
511 511
512 return ret; 512 return ret;
513} 513}
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index 6026fdd1b2ed..d58edf5fefdb 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -2020,6 +2020,9 @@ EXPORT_SYMBOL(_PAGE_CACHE);
2020#ifdef CONFIG_SPARSEMEM_VMEMMAP 2020#ifdef CONFIG_SPARSEMEM_VMEMMAP
2021unsigned long vmemmap_table[VMEMMAP_SIZE]; 2021unsigned long vmemmap_table[VMEMMAP_SIZE];
2022 2022
2023static long __meminitdata addr_start, addr_end;
2024static int __meminitdata node_start;
2025
2023int __meminit vmemmap_populate(struct page *start, unsigned long nr, int node) 2026int __meminit vmemmap_populate(struct page *start, unsigned long nr, int node)
2024{ 2027{
2025 unsigned long vstart = (unsigned long) start; 2028 unsigned long vstart = (unsigned long) start;
@@ -2050,15 +2053,30 @@ int __meminit vmemmap_populate(struct page *start, unsigned long nr, int node)
2050 2053
2051 *vmem_pp = pte_base | __pa(block); 2054 *vmem_pp = pte_base | __pa(block);
2052 2055
2053 printk(KERN_INFO "[%p-%p] page_structs=%lu " 2056 /* check to see if we have contiguous blocks */
2054 "node=%d entry=%lu/%lu\n", start, block, nr, 2057 if (addr_end != addr || node_start != node) {
2055 node, 2058 if (addr_start)
2056 addr >> VMEMMAP_CHUNK_SHIFT, 2059 printk(KERN_DEBUG " [%lx-%lx] on node %d\n",
2057 VMEMMAP_SIZE); 2060 addr_start, addr_end-1, node_start);
2061 addr_start = addr;
2062 node_start = node;
2063 }
2064 addr_end = addr + VMEMMAP_CHUNK;
2058 } 2065 }
2059 } 2066 }
2060 return 0; 2067 return 0;
2061} 2068}
2069
2070void __meminit vmemmap_populate_print_last(void)
2071{
2072 if (addr_start) {
2073 printk(KERN_DEBUG " [%lx-%lx] on node %d\n",
2074 addr_start, addr_end-1, node_start);
2075 addr_start = 0;
2076 addr_end = 0;
2077 node_start = 0;
2078 }
2079}
2062#endif /* CONFIG_SPARSEMEM_VMEMMAP */ 2080#endif /* CONFIG_SPARSEMEM_VMEMMAP */
2063 2081
2064static void prot_init_common(unsigned long page_none, 2082static void prot_init_common(unsigned long page_none,
diff --git a/arch/um/defconfig b/arch/um/defconfig
index fec0d5d27460..08107a795062 100644
--- a/arch/um/defconfig
+++ b/arch/um/defconfig
@@ -163,7 +163,7 @@ CONFIG_CGROUP_SCHED=y
163CONFIG_FAIR_GROUP_SCHED=y 163CONFIG_FAIR_GROUP_SCHED=y
164# CONFIG_CFS_BANDWIDTH is not set 164# CONFIG_CFS_BANDWIDTH is not set
165# CONFIG_RT_GROUP_SCHED is not set 165# CONFIG_RT_GROUP_SCHED is not set
166CONFIG_BLK_CGROUP=m 166CONFIG_BLK_CGROUP=y
167# CONFIG_DEBUG_BLK_CGROUP is not set 167# CONFIG_DEBUG_BLK_CGROUP is not set
168# CONFIG_CHECKPOINT_RESTORE is not set 168# CONFIG_CHECKPOINT_RESTORE is not set
169CONFIG_NAMESPACES=y 169CONFIG_NAMESPACES=y
diff --git a/arch/um/drivers/chan_kern.c b/arch/um/drivers/chan_kern.c
index 45e248c2f43c..87eebfe03c61 100644
--- a/arch/um/drivers/chan_kern.c
+++ b/arch/um/drivers/chan_kern.c
@@ -150,9 +150,11 @@ void chan_enable_winch(struct chan *chan, struct tty_struct *tty)
150static void line_timer_cb(struct work_struct *work) 150static void line_timer_cb(struct work_struct *work)
151{ 151{
152 struct line *line = container_of(work, struct line, task.work); 152 struct line *line = container_of(work, struct line, task.work);
153 struct tty_struct *tty = tty_port_tty_get(&line->port);
153 154
154 if (!line->throttled) 155 if (!line->throttled)
155 chan_interrupt(line, line->tty, line->driver->read_irq); 156 chan_interrupt(line, tty, line->driver->read_irq);
157 tty_kref_put(tty);
156} 158}
157 159
158int enable_chan(struct line *line) 160int enable_chan(struct line *line)
diff --git a/arch/um/drivers/line.c b/arch/um/drivers/line.c
index ac9d25c8dc01..bbaf2c59830a 100644
--- a/arch/um/drivers/line.c
+++ b/arch/um/drivers/line.c
@@ -19,9 +19,11 @@ static irqreturn_t line_interrupt(int irq, void *data)
19{ 19{
20 struct chan *chan = data; 20 struct chan *chan = data;
21 struct line *line = chan->line; 21 struct line *line = chan->line;
22 struct tty_struct *tty = tty_port_tty_get(&line->port);
22 23
23 if (line) 24 if (line)
24 chan_interrupt(line, line->tty, irq); 25 chan_interrupt(line, tty, irq);
26 tty_kref_put(tty);
25 return IRQ_HANDLED; 27 return IRQ_HANDLED;
26} 28}
27 29
@@ -219,92 +221,6 @@ void line_set_termios(struct tty_struct *tty, struct ktermios * old)
219 /* nothing */ 221 /* nothing */
220} 222}
221 223
222static const struct {
223 int cmd;
224 char *level;
225 char *name;
226} tty_ioctls[] = {
227 /* don't print these, they flood the log ... */
228 { TCGETS, NULL, "TCGETS" },
229 { TCSETS, NULL, "TCSETS" },
230 { TCSETSW, NULL, "TCSETSW" },
231 { TCFLSH, NULL, "TCFLSH" },
232 { TCSBRK, NULL, "TCSBRK" },
233
234 /* general tty stuff */
235 { TCSETSF, KERN_DEBUG, "TCSETSF" },
236 { TCGETA, KERN_DEBUG, "TCGETA" },
237 { TIOCMGET, KERN_DEBUG, "TIOCMGET" },
238 { TCSBRKP, KERN_DEBUG, "TCSBRKP" },
239 { TIOCMSET, KERN_DEBUG, "TIOCMSET" },
240
241 /* linux-specific ones */
242 { TIOCLINUX, KERN_INFO, "TIOCLINUX" },
243 { KDGKBMODE, KERN_INFO, "KDGKBMODE" },
244 { KDGKBTYPE, KERN_INFO, "KDGKBTYPE" },
245 { KDSIGACCEPT, KERN_INFO, "KDSIGACCEPT" },
246};
247
248int line_ioctl(struct tty_struct *tty, unsigned int cmd,
249 unsigned long arg)
250{
251 int ret;
252 int i;
253
254 ret = 0;
255 switch(cmd) {
256#ifdef TIOCGETP
257 case TIOCGETP:
258 case TIOCSETP:
259 case TIOCSETN:
260#endif
261#ifdef TIOCGETC
262 case TIOCGETC:
263 case TIOCSETC:
264#endif
265#ifdef TIOCGLTC
266 case TIOCGLTC:
267 case TIOCSLTC:
268#endif
269 /* Note: these are out of date as we now have TCGETS2 etc but this
270 whole lot should probably go away */
271 case TCGETS:
272 case TCSETSF:
273 case TCSETSW:
274 case TCSETS:
275 case TCGETA:
276 case TCSETAF:
277 case TCSETAW:
278 case TCSETA:
279 case TCXONC:
280 case TCFLSH:
281 case TIOCOUTQ:
282 case TIOCINQ:
283 case TIOCGLCKTRMIOS:
284 case TIOCSLCKTRMIOS:
285 case TIOCPKT:
286 case TIOCGSOFTCAR:
287 case TIOCSSOFTCAR:
288 return -ENOIOCTLCMD;
289#if 0
290 case TCwhatever:
291 /* do something */
292 break;
293#endif
294 default:
295 for (i = 0; i < ARRAY_SIZE(tty_ioctls); i++)
296 if (cmd == tty_ioctls[i].cmd)
297 break;
298 if (i == ARRAY_SIZE(tty_ioctls)) {
299 printk(KERN_ERR "%s: %s: unknown ioctl: 0x%x\n",
300 __func__, tty->name, cmd);
301 }
302 ret = -ENOIOCTLCMD;
303 break;
304 }
305 return ret;
306}
307
308void line_throttle(struct tty_struct *tty) 224void line_throttle(struct tty_struct *tty)
309{ 225{
310 struct line *line = tty->driver_data; 226 struct line *line = tty->driver_data;
@@ -333,7 +249,7 @@ static irqreturn_t line_write_interrupt(int irq, void *data)
333{ 249{
334 struct chan *chan = data; 250 struct chan *chan = data;
335 struct line *line = chan->line; 251 struct line *line = chan->line;
336 struct tty_struct *tty = line->tty; 252 struct tty_struct *tty;
337 int err; 253 int err;
338 254
339 /* 255 /*
@@ -352,10 +268,13 @@ static irqreturn_t line_write_interrupt(int irq, void *data)
352 } 268 }
353 spin_unlock(&line->lock); 269 spin_unlock(&line->lock);
354 270
271 tty = tty_port_tty_get(&line->port);
355 if (tty == NULL) 272 if (tty == NULL)
356 return IRQ_NONE; 273 return IRQ_NONE;
357 274
358 tty_wakeup(tty); 275 tty_wakeup(tty);
276 tty_kref_put(tty);
277
359 return IRQ_HANDLED; 278 return IRQ_HANDLED;
360} 279}
361 280
@@ -377,43 +296,14 @@ int line_setup_irq(int fd, int input, int output, struct line *line, void *data)
377 return err; 296 return err;
378} 297}
379 298
380/* 299static int line_activate(struct tty_port *port, struct tty_struct *tty)
381 * Normally, a driver like this can rely mostly on the tty layer
382 * locking, particularly when it comes to the driver structure.
383 * However, in this case, mconsole requests can come in "from the
384 * side", and race with opens and closes.
385 *
386 * mconsole config requests will want to be sure the device isn't in
387 * use, and get_config, open, and close will want a stable
388 * configuration. The checking and modification of the configuration
389 * is done under a spinlock. Checking whether the device is in use is
390 * line->tty->count > 1, also under the spinlock.
391 *
392 * line->count serves to decide whether the device should be enabled or
393 * disabled on the host. If it's equal to 0, then we are doing the
394 * first open or last close. Otherwise, open and close just return.
395 */
396
397int line_open(struct line *lines, struct tty_struct *tty)
398{ 300{
399 struct line *line = &lines[tty->index]; 301 int ret;
400 int err = -ENODEV; 302 struct line *line = tty->driver_data;
401
402 mutex_lock(&line->count_lock);
403 if (!line->valid)
404 goto out_unlock;
405
406 err = 0;
407 if (line->count++)
408 goto out_unlock;
409
410 BUG_ON(tty->driver_data);
411 tty->driver_data = line;
412 line->tty = tty;
413 303
414 err = enable_chan(line); 304 ret = enable_chan(line);
415 if (err) /* line_close() will be called by our caller */ 305 if (ret)
416 goto out_unlock; 306 return ret;
417 307
418 if (!line->sigio) { 308 if (!line->sigio) {
419 chan_enable_winch(line->chan_out, tty); 309 chan_enable_winch(line->chan_out, tty);
@@ -421,44 +311,60 @@ int line_open(struct line *lines, struct tty_struct *tty)
421 } 311 }
422 312
423 chan_window_size(line, &tty->winsize.ws_row, 313 chan_window_size(line, &tty->winsize.ws_row,
424 &tty->winsize.ws_col); 314 &tty->winsize.ws_col);
425out_unlock: 315
426 mutex_unlock(&line->count_lock); 316 return 0;
427 return err;
428} 317}
429 318
430static void unregister_winch(struct tty_struct *tty); 319static const struct tty_port_operations line_port_ops = {
320 .activate = line_activate,
321};
431 322
432void line_close(struct tty_struct *tty, struct file * filp) 323int line_open(struct tty_struct *tty, struct file *filp)
433{ 324{
434 struct line *line = tty->driver_data; 325 struct line *line = tty->driver_data;
435 326
436 /* 327 return tty_port_open(&line->port, tty, filp);
437 * If line_open fails (and tty->driver_data is never set), 328}
438 * tty_open will call line_close. So just return in this case.
439 */
440 if (line == NULL)
441 return;
442 329
443 /* We ignore the error anyway! */ 330int line_install(struct tty_driver *driver, struct tty_struct *tty,
444 flush_buffer(line); 331 struct line *line)
332{
333 int ret;
445 334
446 mutex_lock(&line->count_lock); 335 ret = tty_standard_install(driver, tty);
447 BUG_ON(!line->valid); 336 if (ret)
337 return ret;
448 338
449 if (--line->count) 339 tty->driver_data = line;
450 goto out_unlock;
451 340
452 line->tty = NULL; 341 return 0;
453 tty->driver_data = NULL; 342}
343
344static void unregister_winch(struct tty_struct *tty);
345
346void line_cleanup(struct tty_struct *tty)
347{
348 struct line *line = tty->driver_data;
454 349
455 if (line->sigio) { 350 if (line->sigio) {
456 unregister_winch(tty); 351 unregister_winch(tty);
457 line->sigio = 0; 352 line->sigio = 0;
458 } 353 }
354}
355
356void line_close(struct tty_struct *tty, struct file * filp)
357{
358 struct line *line = tty->driver_data;
459 359
460out_unlock: 360 tty_port_close(&line->port, tty, filp);
461 mutex_unlock(&line->count_lock); 361}
362
363void line_hangup(struct tty_struct *tty)
364{
365 struct line *line = tty->driver_data;
366
367 tty_port_hangup(&line->port);
462} 368}
463 369
464void close_lines(struct line *lines, int nlines) 370void close_lines(struct line *lines, int nlines)
@@ -476,9 +382,7 @@ int setup_one_line(struct line *lines, int n, char *init,
476 struct tty_driver *driver = line->driver->driver; 382 struct tty_driver *driver = line->driver->driver;
477 int err = -EINVAL; 383 int err = -EINVAL;
478 384
479 mutex_lock(&line->count_lock); 385 if (line->port.count) {
480
481 if (line->count) {
482 *error_out = "Device is already open"; 386 *error_out = "Device is already open";
483 goto out; 387 goto out;
484 } 388 }
@@ -519,7 +423,6 @@ int setup_one_line(struct line *lines, int n, char *init,
519 } 423 }
520 } 424 }
521out: 425out:
522 mutex_unlock(&line->count_lock);
523 return err; 426 return err;
524} 427}
525 428
@@ -607,13 +510,17 @@ int line_get_config(char *name, struct line *lines, unsigned int num, char *str,
607 510
608 line = &lines[dev]; 511 line = &lines[dev];
609 512
610 mutex_lock(&line->count_lock);
611 if (!line->valid) 513 if (!line->valid)
612 CONFIG_CHUNK(str, size, n, "none", 1); 514 CONFIG_CHUNK(str, size, n, "none", 1);
613 else if (line->tty == NULL) 515 else {
614 CONFIG_CHUNK(str, size, n, line->init_str, 1); 516 struct tty_struct *tty = tty_port_tty_get(&line->port);
615 else n = chan_config_string(line, str, size, error_out); 517 if (tty == NULL) {
616 mutex_unlock(&line->count_lock); 518 CONFIG_CHUNK(str, size, n, line->init_str, 1);
519 } else {
520 n = chan_config_string(line, str, size, error_out);
521 tty_kref_put(tty);
522 }
523 }
617 524
618 return n; 525 return n;
619} 526}
@@ -663,8 +570,9 @@ int register_lines(struct line_driver *line_driver,
663 driver->init_termios = tty_std_termios; 570 driver->init_termios = tty_std_termios;
664 571
665 for (i = 0; i < nlines; i++) { 572 for (i = 0; i < nlines; i++) {
573 tty_port_init(&lines[i].port);
574 lines[i].port.ops = &line_port_ops;
666 spin_lock_init(&lines[i].lock); 575 spin_lock_init(&lines[i].lock);
667 mutex_init(&lines[i].count_lock);
668 lines[i].driver = line_driver; 576 lines[i].driver = line_driver;
669 INIT_LIST_HEAD(&lines[i].chan_list); 577 INIT_LIST_HEAD(&lines[i].chan_list);
670 } 578 }
diff --git a/arch/um/drivers/line.h b/arch/um/drivers/line.h
index 0a1834719dba..bae95611e7ab 100644
--- a/arch/um/drivers/line.h
+++ b/arch/um/drivers/line.h
@@ -32,9 +32,7 @@ struct line_driver {
32}; 32};
33 33
34struct line { 34struct line {
35 struct tty_struct *tty; 35 struct tty_port port;
36 struct mutex count_lock;
37 unsigned long count;
38 int valid; 36 int valid;
39 37
40 char *init_str; 38 char *init_str;
@@ -59,7 +57,11 @@ struct line {
59}; 57};
60 58
61extern void line_close(struct tty_struct *tty, struct file * filp); 59extern void line_close(struct tty_struct *tty, struct file * filp);
62extern int line_open(struct line *lines, struct tty_struct *tty); 60extern int line_open(struct tty_struct *tty, struct file *filp);
61extern int line_install(struct tty_driver *driver, struct tty_struct *tty,
62 struct line *line);
63extern void line_cleanup(struct tty_struct *tty);
64extern void line_hangup(struct tty_struct *tty);
63extern int line_setup(char **conf, unsigned nlines, char **def, 65extern int line_setup(char **conf, unsigned nlines, char **def,
64 char *init, char *name); 66 char *init, char *name);
65extern int line_write(struct tty_struct *tty, const unsigned char *buf, 67extern int line_write(struct tty_struct *tty, const unsigned char *buf,
@@ -70,8 +72,6 @@ extern int line_chars_in_buffer(struct tty_struct *tty);
70extern void line_flush_buffer(struct tty_struct *tty); 72extern void line_flush_buffer(struct tty_struct *tty);
71extern void line_flush_chars(struct tty_struct *tty); 73extern void line_flush_chars(struct tty_struct *tty);
72extern int line_write_room(struct tty_struct *tty); 74extern int line_write_room(struct tty_struct *tty);
73extern int line_ioctl(struct tty_struct *tty, unsigned int cmd,
74 unsigned long arg);
75extern void line_throttle(struct tty_struct *tty); 75extern void line_throttle(struct tty_struct *tty);
76extern void line_unthrottle(struct tty_struct *tty); 76extern void line_unthrottle(struct tty_struct *tty);
77 77
diff --git a/arch/um/drivers/ssl.c b/arch/um/drivers/ssl.c
index e09801a1327b..7e86f0070123 100644
--- a/arch/um/drivers/ssl.c
+++ b/arch/um/drivers/ssl.c
@@ -87,40 +87,13 @@ static int ssl_remove(int n, char **error_out)
87 error_out); 87 error_out);
88} 88}
89 89
90static int ssl_open(struct tty_struct *tty, struct file *filp) 90static int ssl_install(struct tty_driver *driver, struct tty_struct *tty)
91{
92 int err = line_open(serial_lines, tty);
93
94 if (err)
95 printk(KERN_ERR "Failed to open serial line %d, err = %d\n",
96 tty->index, err);
97
98 return err;
99}
100
101#if 0
102static void ssl_flush_buffer(struct tty_struct *tty)
103{
104 return;
105}
106
107static void ssl_stop(struct tty_struct *tty)
108{
109 printk(KERN_ERR "Someone should implement ssl_stop\n");
110}
111
112static void ssl_start(struct tty_struct *tty)
113{
114 printk(KERN_ERR "Someone should implement ssl_start\n");
115}
116
117void ssl_hangup(struct tty_struct *tty)
118{ 91{
92 return line_install(driver, tty, &serial_lines[tty->index]);
119} 93}
120#endif
121 94
122static const struct tty_operations ssl_ops = { 95static const struct tty_operations ssl_ops = {
123 .open = ssl_open, 96 .open = line_open,
124 .close = line_close, 97 .close = line_close,
125 .write = line_write, 98 .write = line_write,
126 .put_char = line_put_char, 99 .put_char = line_put_char,
@@ -129,14 +102,11 @@ static const struct tty_operations ssl_ops = {
129 .flush_buffer = line_flush_buffer, 102 .flush_buffer = line_flush_buffer,
130 .flush_chars = line_flush_chars, 103 .flush_chars = line_flush_chars,
131 .set_termios = line_set_termios, 104 .set_termios = line_set_termios,
132 .ioctl = line_ioctl,
133 .throttle = line_throttle, 105 .throttle = line_throttle,
134 .unthrottle = line_unthrottle, 106 .unthrottle = line_unthrottle,
135#if 0 107 .install = ssl_install,
136 .stop = ssl_stop, 108 .cleanup = line_cleanup,
137 .start = ssl_start, 109 .hangup = line_hangup,
138 .hangup = ssl_hangup,
139#endif
140}; 110};
141 111
142/* Changed by ssl_init and referenced by ssl_exit, which are both serialized 112/* Changed by ssl_init and referenced by ssl_exit, which are both serialized
diff --git a/arch/um/drivers/stdio_console.c b/arch/um/drivers/stdio_console.c
index 7663541c372e..929b99a261f3 100644
--- a/arch/um/drivers/stdio_console.c
+++ b/arch/um/drivers/stdio_console.c
@@ -89,21 +89,17 @@ static int con_remove(int n, char **error_out)
89 return line_remove(vts, ARRAY_SIZE(vts), n, error_out); 89 return line_remove(vts, ARRAY_SIZE(vts), n, error_out);
90} 90}
91 91
92static int con_open(struct tty_struct *tty, struct file *filp)
93{
94 int err = line_open(vts, tty);
95 if (err)
96 printk(KERN_ERR "Failed to open console %d, err = %d\n",
97 tty->index, err);
98
99 return err;
100}
101
102/* Set in an initcall, checked in an exitcall */ 92/* Set in an initcall, checked in an exitcall */
103static int con_init_done = 0; 93static int con_init_done = 0;
104 94
95static int con_install(struct tty_driver *driver, struct tty_struct *tty)
96{
97 return line_install(driver, tty, &vts[tty->index]);
98}
99
105static const struct tty_operations console_ops = { 100static const struct tty_operations console_ops = {
106 .open = con_open, 101 .open = line_open,
102 .install = con_install,
107 .close = line_close, 103 .close = line_close,
108 .write = line_write, 104 .write = line_write,
109 .put_char = line_put_char, 105 .put_char = line_put_char,
@@ -112,9 +108,10 @@ static const struct tty_operations console_ops = {
112 .flush_buffer = line_flush_buffer, 108 .flush_buffer = line_flush_buffer,
113 .flush_chars = line_flush_chars, 109 .flush_chars = line_flush_chars,
114 .set_termios = line_set_termios, 110 .set_termios = line_set_termios,
115 .ioctl = line_ioctl,
116 .throttle = line_throttle, 111 .throttle = line_throttle,
117 .unthrottle = line_unthrottle, 112 .unthrottle = line_unthrottle,
113 .cleanup = line_cleanup,
114 .hangup = line_hangup,
118}; 115};
119 116
120static void uml_console_write(struct console *console, const char *string, 117static void uml_console_write(struct console *console, const char *string,
diff --git a/arch/um/drivers/ubd_kern.c b/arch/um/drivers/ubd_kern.c
index 20505cafa299..0643e5bc9f41 100644
--- a/arch/um/drivers/ubd_kern.c
+++ b/arch/um/drivers/ubd_kern.c
@@ -514,7 +514,7 @@ static inline int ubd_file_size(struct ubd *ubd_dev, __u64 *size_out)
514 goto out; 514 goto out;
515 } 515 }
516 516
517 fd = os_open_file(ubd_dev->file, global_openflags, 0); 517 fd = os_open_file(ubd_dev->file, of_read(OPENFLAGS()), 0);
518 if (fd < 0) 518 if (fd < 0)
519 return fd; 519 return fd;
520 520
diff --git a/arch/um/include/asm/ptrace-generic.h b/arch/um/include/asm/ptrace-generic.h
index e786a6a3ec5e..442f1d025dc2 100644
--- a/arch/um/include/asm/ptrace-generic.h
+++ b/arch/um/include/asm/ptrace-generic.h
@@ -37,6 +37,8 @@ extern int putreg(struct task_struct *child, int regno, unsigned long value);
37 37
38extern int arch_copy_tls(struct task_struct *new); 38extern int arch_copy_tls(struct task_struct *new);
39extern void clear_flushed_tls(struct task_struct *task); 39extern void clear_flushed_tls(struct task_struct *task);
40extern void syscall_trace_enter(struct pt_regs *regs);
41extern void syscall_trace_leave(struct pt_regs *regs);
40 42
41#endif 43#endif
42 44
diff --git a/arch/um/include/shared/as-layout.h b/arch/um/include/shared/as-layout.h
index 896e16602176..86daa5461815 100644
--- a/arch/um/include/shared/as-layout.h
+++ b/arch/um/include/shared/as-layout.h
@@ -60,7 +60,8 @@ extern unsigned long host_task_size;
60 60
61extern int linux_main(int argc, char **argv); 61extern int linux_main(int argc, char **argv);
62 62
63extern void (*sig_info[])(int, struct uml_pt_regs *); 63struct siginfo;
64extern void (*sig_info[])(int, struct siginfo *si, struct uml_pt_regs *);
64 65
65#endif 66#endif
66 67
diff --git a/arch/um/include/shared/irq_user.h b/arch/um/include/shared/irq_user.h
index c6c784df2673..2b6d703925b5 100644
--- a/arch/um/include/shared/irq_user.h
+++ b/arch/um/include/shared/irq_user.h
@@ -20,7 +20,8 @@ struct irq_fd {
20 20
21enum { IRQ_READ, IRQ_WRITE }; 21enum { IRQ_READ, IRQ_WRITE };
22 22
23extern void sigio_handler(int sig, struct uml_pt_regs *regs); 23struct siginfo;
24extern void sigio_handler(int sig, struct siginfo *unused_si, struct uml_pt_regs *regs);
24extern void free_irq_by_fd(int fd); 25extern void free_irq_by_fd(int fd);
25extern void reactivate_fd(int fd, int irqnum); 26extern void reactivate_fd(int fd, int irqnum);
26extern void deactivate_fd(int fd, int irqnum); 27extern void deactivate_fd(int fd, int irqnum);
diff --git a/arch/um/include/shared/kern_util.h b/arch/um/include/shared/kern_util.h
index 00965d06d2ca..af6b6dc868ba 100644
--- a/arch/um/include/shared/kern_util.h
+++ b/arch/um/include/shared/kern_util.h
@@ -9,6 +9,8 @@
9#include "sysdep/ptrace.h" 9#include "sysdep/ptrace.h"
10#include "sysdep/faultinfo.h" 10#include "sysdep/faultinfo.h"
11 11
12struct siginfo;
13
12extern int uml_exitcode; 14extern int uml_exitcode;
13 15
14extern int ncpus; 16extern int ncpus;
@@ -22,7 +24,7 @@ extern void free_stack(unsigned long stack, int order);
22 24
23extern int do_signal(void); 25extern int do_signal(void);
24extern void interrupt_end(void); 26extern void interrupt_end(void);
25extern void relay_signal(int sig, struct uml_pt_regs *regs); 27extern void relay_signal(int sig, struct siginfo *si, struct uml_pt_regs *regs);
26 28
27extern unsigned long segv(struct faultinfo fi, unsigned long ip, 29extern unsigned long segv(struct faultinfo fi, unsigned long ip,
28 int is_user, struct uml_pt_regs *regs); 30 int is_user, struct uml_pt_regs *regs);
@@ -33,9 +35,8 @@ extern unsigned int do_IRQ(int irq, struct uml_pt_regs *regs);
33extern int smp_sigio_handler(void); 35extern int smp_sigio_handler(void);
34extern void initial_thread_cb(void (*proc)(void *), void *arg); 36extern void initial_thread_cb(void (*proc)(void *), void *arg);
35extern int is_syscall(unsigned long addr); 37extern int is_syscall(unsigned long addr);
36extern void timer_handler(int sig, struct uml_pt_regs *regs);
37 38
38extern void timer_handler(int sig, struct uml_pt_regs *regs); 39extern void timer_handler(int sig, struct siginfo *unused_si, struct uml_pt_regs *regs);
39 40
40extern int start_uml(void); 41extern int start_uml(void);
41extern void paging_init(void); 42extern void paging_init(void);
@@ -59,9 +60,9 @@ extern unsigned long from_irq_stack(int nested);
59extern void syscall_trace(struct uml_pt_regs *regs, int entryexit); 60extern void syscall_trace(struct uml_pt_regs *regs, int entryexit);
60extern int singlestepping(void *t); 61extern int singlestepping(void *t);
61 62
62extern void segv_handler(int sig, struct uml_pt_regs *regs); 63extern void segv_handler(int sig, struct siginfo *unused_si, struct uml_pt_regs *regs);
63extern void bus_handler(int sig, struct uml_pt_regs *regs); 64extern void bus_handler(int sig, struct siginfo *si, struct uml_pt_regs *regs);
64extern void winch(int sig, struct uml_pt_regs *regs); 65extern void winch(int sig, struct siginfo *unused_si, struct uml_pt_regs *regs);
65extern void fatal_sigsegv(void) __attribute__ ((noreturn)); 66extern void fatal_sigsegv(void) __attribute__ ((noreturn));
66 67
67 68
diff --git a/arch/um/kernel/irq.c b/arch/um/kernel/irq.c
index 00506c3d5d6e..9883026f0730 100644
--- a/arch/um/kernel/irq.c
+++ b/arch/um/kernel/irq.c
@@ -30,7 +30,7 @@ static struct irq_fd **last_irq_ptr = &active_fds;
30 30
31extern void free_irqs(void); 31extern void free_irqs(void);
32 32
33void sigio_handler(int sig, struct uml_pt_regs *regs) 33void sigio_handler(int sig, struct siginfo *unused_si, struct uml_pt_regs *regs)
34{ 34{
35 struct irq_fd *irq_fd; 35 struct irq_fd *irq_fd;
36 int n; 36 int n;
diff --git a/arch/um/kernel/process.c b/arch/um/kernel/process.c
index ccb9a9d283f1..57fc7028714a 100644
--- a/arch/um/kernel/process.c
+++ b/arch/um/kernel/process.c
@@ -151,12 +151,10 @@ void new_thread_handler(void)
151 * 0 if it just exits 151 * 0 if it just exits
152 */ 152 */
153 n = run_kernel_thread(fn, arg, &current->thread.exec_buf); 153 n = run_kernel_thread(fn, arg, &current->thread.exec_buf);
154 if (n == 1) { 154 if (n == 1)
155 /* Handle any immediate reschedules or signals */
156 interrupt_end();
157 userspace(&current->thread.regs.regs); 155 userspace(&current->thread.regs.regs);
158 } 156 else
159 else do_exit(0); 157 do_exit(0);
160} 158}
161 159
162/* Called magically, see new_thread_handler above */ 160/* Called magically, see new_thread_handler above */
@@ -175,9 +173,6 @@ void fork_handler(void)
175 173
176 current->thread.prev_sched = NULL; 174 current->thread.prev_sched = NULL;
177 175
178 /* Handle any immediate reschedules or signals */
179 interrupt_end();
180
181 userspace(&current->thread.regs.regs); 176 userspace(&current->thread.regs.regs);
182} 177}
183 178
@@ -193,7 +188,7 @@ int copy_thread(unsigned long clone_flags, unsigned long sp,
193 if (current->thread.forking) { 188 if (current->thread.forking) {
194 memcpy(&p->thread.regs.regs, &regs->regs, 189 memcpy(&p->thread.regs.regs, &regs->regs,
195 sizeof(p->thread.regs.regs)); 190 sizeof(p->thread.regs.regs));
196 UPT_SET_SYSCALL_RETURN(&p->thread.regs.regs, 0); 191 PT_REGS_SET_SYSCALL_RETURN(&p->thread.regs, 0);
197 if (sp != 0) 192 if (sp != 0)
198 REGS_SP(p->thread.regs.regs.gp) = sp; 193 REGS_SP(p->thread.regs.regs.gp) = sp;
199 194
diff --git a/arch/um/kernel/ptrace.c b/arch/um/kernel/ptrace.c
index 06b190390505..694d551c8899 100644
--- a/arch/um/kernel/ptrace.c
+++ b/arch/um/kernel/ptrace.c
@@ -3,11 +3,12 @@
3 * Licensed under the GPL 3 * Licensed under the GPL
4 */ 4 */
5 5
6#include "linux/audit.h" 6#include <linux/audit.h>
7#include "linux/ptrace.h" 7#include <linux/ptrace.h>
8#include "linux/sched.h" 8#include <linux/sched.h>
9#include "asm/uaccess.h" 9#include <linux/tracehook.h>
10#include "skas_ptrace.h" 10#include <asm/uaccess.h>
11#include <skas_ptrace.h>
11 12
12 13
13 14
@@ -162,48 +163,36 @@ static void send_sigtrap(struct task_struct *tsk, struct uml_pt_regs *regs,
162 * XXX Check PT_DTRACE vs TIF_SINGLESTEP for singlestepping check and 163 * XXX Check PT_DTRACE vs TIF_SINGLESTEP for singlestepping check and
163 * PT_PTRACED vs TIF_SYSCALL_TRACE for syscall tracing check 164 * PT_PTRACED vs TIF_SYSCALL_TRACE for syscall tracing check
164 */ 165 */
165void syscall_trace(struct uml_pt_regs *regs, int entryexit) 166void syscall_trace_enter(struct pt_regs *regs)
166{ 167{
167 int is_singlestep = (current->ptrace & PT_DTRACE) && entryexit; 168 audit_syscall_entry(HOST_AUDIT_ARCH,
168 int tracesysgood; 169 UPT_SYSCALL_NR(&regs->regs),
169 170 UPT_SYSCALL_ARG1(&regs->regs),
170 if (!entryexit) 171 UPT_SYSCALL_ARG2(&regs->regs),
171 audit_syscall_entry(HOST_AUDIT_ARCH, 172 UPT_SYSCALL_ARG3(&regs->regs),
172 UPT_SYSCALL_NR(regs), 173 UPT_SYSCALL_ARG4(&regs->regs));
173 UPT_SYSCALL_ARG1(regs),
174 UPT_SYSCALL_ARG2(regs),
175 UPT_SYSCALL_ARG3(regs),
176 UPT_SYSCALL_ARG4(regs));
177 else
178 audit_syscall_exit(regs);
179
180 /* Fake a debug trap */
181 if (is_singlestep)
182 send_sigtrap(current, regs, 0);
183 174
184 if (!test_thread_flag(TIF_SYSCALL_TRACE)) 175 if (!test_thread_flag(TIF_SYSCALL_TRACE))
185 return; 176 return;
186 177
187 if (!(current->ptrace & PT_PTRACED)) 178 tracehook_report_syscall_entry(regs);
188 return; 179}
189 180
190 /* 181void syscall_trace_leave(struct pt_regs *regs)
191 * the 0x80 provides a way for the tracing parent to distinguish 182{
192 * between a syscall stop and SIGTRAP delivery 183 int ptraced = current->ptrace;
193 */
194 tracesysgood = (current->ptrace & PT_TRACESYSGOOD);
195 ptrace_notify(SIGTRAP | (tracesysgood ? 0x80 : 0));
196 184
197 if (entryexit) /* force do_signal() --> is_syscall() */ 185 audit_syscall_exit(regs);
198 set_thread_flag(TIF_SIGPENDING);
199 186
200 /* 187 /* Fake a debug trap */
201 * this isn't the same as continuing with a signal, but it will do 188 if (ptraced & PT_DTRACE)
202 * for normal use. strace only continues with a signal if the 189 send_sigtrap(current, &regs->regs, 0);
203 * stopping signal is not SIGTRAP. -brl 190
204 */ 191 if (!test_thread_flag(TIF_SYSCALL_TRACE))
205 if (current->exit_code) { 192 return;
206 send_sig(current->exit_code, current, 1); 193
207 current->exit_code = 0; 194 tracehook_report_syscall_exit(regs, 0);
208 } 195 /* force do_signal() --> is_syscall() */
196 if (ptraced & PT_PTRACED)
197 set_thread_flag(TIF_SIGPENDING);
209} 198}
diff --git a/arch/um/kernel/skas/syscall.c b/arch/um/kernel/skas/syscall.c
index 05fbeb480e0b..86368a025a96 100644
--- a/arch/um/kernel/skas/syscall.c
+++ b/arch/um/kernel/skas/syscall.c
@@ -18,7 +18,7 @@ void handle_syscall(struct uml_pt_regs *r)
18 long result; 18 long result;
19 int syscall; 19 int syscall;
20 20
21 syscall_trace(r, 0); 21 syscall_trace_enter(regs);
22 22
23 /* 23 /*
24 * This should go in the declaration of syscall, but when I do that, 24 * This should go in the declaration of syscall, but when I do that,
@@ -34,7 +34,7 @@ void handle_syscall(struct uml_pt_regs *r)
34 result = -ENOSYS; 34 result = -ENOSYS;
35 else result = EXECUTE_SYSCALL(syscall, regs); 35 else result = EXECUTE_SYSCALL(syscall, regs);
36 36
37 UPT_SET_SYSCALL_RETURN(r, result); 37 PT_REGS_SET_SYSCALL_RETURN(regs, result);
38 38
39 syscall_trace(r, 1); 39 syscall_trace_leave(regs);
40} 40}
diff --git a/arch/um/kernel/time.c b/arch/um/kernel/time.c
index d1a23fb3190d..5f76d4ba151c 100644
--- a/arch/um/kernel/time.c
+++ b/arch/um/kernel/time.c
@@ -13,7 +13,7 @@
13#include "kern_util.h" 13#include "kern_util.h"
14#include "os.h" 14#include "os.h"
15 15
16void timer_handler(int sig, struct uml_pt_regs *regs) 16void timer_handler(int sig, struct siginfo *unused_si, struct uml_pt_regs *regs)
17{ 17{
18 unsigned long flags; 18 unsigned long flags;
19 19
diff --git a/arch/um/kernel/trap.c b/arch/um/kernel/trap.c
index 3be60765c0e2..0353b98ae35a 100644
--- a/arch/um/kernel/trap.c
+++ b/arch/um/kernel/trap.c
@@ -172,7 +172,7 @@ void fatal_sigsegv(void)
172 os_dump_core(); 172 os_dump_core();
173} 173}
174 174
175void segv_handler(int sig, struct uml_pt_regs *regs) 175void segv_handler(int sig, struct siginfo *unused_si, struct uml_pt_regs *regs)
176{ 176{
177 struct faultinfo * fi = UPT_FAULTINFO(regs); 177 struct faultinfo * fi = UPT_FAULTINFO(regs);
178 178
@@ -258,8 +258,11 @@ unsigned long segv(struct faultinfo fi, unsigned long ip, int is_user,
258 return 0; 258 return 0;
259} 259}
260 260
261void relay_signal(int sig, struct uml_pt_regs *regs) 261void relay_signal(int sig, struct siginfo *si, struct uml_pt_regs *regs)
262{ 262{
263 struct faultinfo *fi;
264 struct siginfo clean_si;
265
263 if (!UPT_IS_USER(regs)) { 266 if (!UPT_IS_USER(regs)) {
264 if (sig == SIGBUS) 267 if (sig == SIGBUS)
265 printk(KERN_ERR "Bus error - the host /dev/shm or /tmp " 268 printk(KERN_ERR "Bus error - the host /dev/shm or /tmp "
@@ -269,18 +272,40 @@ void relay_signal(int sig, struct uml_pt_regs *regs)
269 272
270 arch_examine_signal(sig, regs); 273 arch_examine_signal(sig, regs);
271 274
272 current->thread.arch.faultinfo = *UPT_FAULTINFO(regs); 275 memset(&clean_si, 0, sizeof(clean_si));
273 force_sig(sig, current); 276 clean_si.si_signo = si->si_signo;
277 clean_si.si_errno = si->si_errno;
278 clean_si.si_code = si->si_code;
279 switch (sig) {
280 case SIGILL:
281 case SIGFPE:
282 case SIGSEGV:
283 case SIGBUS:
284 case SIGTRAP:
285 fi = UPT_FAULTINFO(regs);
286 clean_si.si_addr = (void __user *) FAULT_ADDRESS(*fi);
287 current->thread.arch.faultinfo = *fi;
288#ifdef __ARCH_SI_TRAPNO
289 clean_si.si_trapno = si->si_trapno;
290#endif
291 break;
292 default:
293 printk(KERN_ERR "Attempted to relay unknown signal %d (si_code = %d)\n",
294 sig, si->si_code);
295 }
296
297 force_sig_info(sig, &clean_si, current);
274} 298}
275 299
276void bus_handler(int sig, struct uml_pt_regs *regs) 300void bus_handler(int sig, struct siginfo *si, struct uml_pt_regs *regs)
277{ 301{
278 if (current->thread.fault_catcher != NULL) 302 if (current->thread.fault_catcher != NULL)
279 UML_LONGJMP(current->thread.fault_catcher, 1); 303 UML_LONGJMP(current->thread.fault_catcher, 1);
280 else relay_signal(sig, regs); 304 else
305 relay_signal(sig, si, regs);
281} 306}
282 307
283void winch(int sig, struct uml_pt_regs *regs) 308void winch(int sig, struct siginfo *unused_si, struct uml_pt_regs *regs)
284{ 309{
285 do_IRQ(WINCH_IRQ, regs); 310 do_IRQ(WINCH_IRQ, regs);
286} 311}
diff --git a/arch/um/os-Linux/internal.h b/arch/um/os-Linux/internal.h
index 2c3c3ecd8c01..0dc2c9f135f6 100644
--- a/arch/um/os-Linux/internal.h
+++ b/arch/um/os-Linux/internal.h
@@ -1 +1 @@
void alarm_handler(int, mcontext_t *); void alarm_handler(int sig, struct siginfo *unused_si, mcontext_t *mc);
diff --git a/arch/um/os-Linux/signal.c b/arch/um/os-Linux/signal.c
index 2d22f1fcd8e2..6366ce904b9b 100644
--- a/arch/um/os-Linux/signal.c
+++ b/arch/um/os-Linux/signal.c
@@ -13,8 +13,9 @@
13#include "kern_util.h" 13#include "kern_util.h"
14#include "os.h" 14#include "os.h"
15#include "sysdep/mcontext.h" 15#include "sysdep/mcontext.h"
16#include "internal.h"
16 17
17void (*sig_info[NSIG])(int, struct uml_pt_regs *) = { 18void (*sig_info[NSIG])(int, siginfo_t *, struct uml_pt_regs *) = {
18 [SIGTRAP] = relay_signal, 19 [SIGTRAP] = relay_signal,
19 [SIGFPE] = relay_signal, 20 [SIGFPE] = relay_signal,
20 [SIGILL] = relay_signal, 21 [SIGILL] = relay_signal,
@@ -24,7 +25,7 @@ void (*sig_info[NSIG])(int, struct uml_pt_regs *) = {
24 [SIGIO] = sigio_handler, 25 [SIGIO] = sigio_handler,
25 [SIGVTALRM] = timer_handler }; 26 [SIGVTALRM] = timer_handler };
26 27
27static void sig_handler_common(int sig, mcontext_t *mc) 28static void sig_handler_common(int sig, siginfo_t *si, mcontext_t *mc)
28{ 29{
29 struct uml_pt_regs r; 30 struct uml_pt_regs r;
30 int save_errno = errno; 31 int save_errno = errno;
@@ -40,7 +41,7 @@ static void sig_handler_common(int sig, mcontext_t *mc)
40 if ((sig != SIGIO) && (sig != SIGWINCH) && (sig != SIGVTALRM)) 41 if ((sig != SIGIO) && (sig != SIGWINCH) && (sig != SIGVTALRM))
41 unblock_signals(); 42 unblock_signals();
42 43
43 (*sig_info[sig])(sig, &r); 44 (*sig_info[sig])(sig, si, &r);
44 45
45 errno = save_errno; 46 errno = save_errno;
46} 47}
@@ -60,7 +61,7 @@ static void sig_handler_common(int sig, mcontext_t *mc)
60static int signals_enabled; 61static int signals_enabled;
61static unsigned int signals_pending; 62static unsigned int signals_pending;
62 63
63void sig_handler(int sig, mcontext_t *mc) 64void sig_handler(int sig, siginfo_t *si, mcontext_t *mc)
64{ 65{
65 int enabled; 66 int enabled;
66 67
@@ -72,7 +73,7 @@ void sig_handler(int sig, mcontext_t *mc)
72 73
73 block_signals(); 74 block_signals();
74 75
75 sig_handler_common(sig, mc); 76 sig_handler_common(sig, si, mc);
76 77
77 set_signals(enabled); 78 set_signals(enabled);
78} 79}
@@ -85,10 +86,10 @@ static void real_alarm_handler(mcontext_t *mc)
85 get_regs_from_mc(&regs, mc); 86 get_regs_from_mc(&regs, mc);
86 regs.is_user = 0; 87 regs.is_user = 0;
87 unblock_signals(); 88 unblock_signals();
88 timer_handler(SIGVTALRM, &regs); 89 timer_handler(SIGVTALRM, NULL, &regs);
89} 90}
90 91
91void alarm_handler(int sig, mcontext_t *mc) 92void alarm_handler(int sig, struct siginfo *unused_si, mcontext_t *mc)
92{ 93{
93 int enabled; 94 int enabled;
94 95
@@ -119,7 +120,7 @@ void set_sigstack(void *sig_stack, int size)
119 panic("enabling signal stack failed, errno = %d\n", errno); 120 panic("enabling signal stack failed, errno = %d\n", errno);
120} 121}
121 122
122static void (*handlers[_NSIG])(int sig, mcontext_t *mc) = { 123static void (*handlers[_NSIG])(int sig, siginfo_t *si, mcontext_t *mc) = {
123 [SIGSEGV] = sig_handler, 124 [SIGSEGV] = sig_handler,
124 [SIGBUS] = sig_handler, 125 [SIGBUS] = sig_handler,
125 [SIGILL] = sig_handler, 126 [SIGILL] = sig_handler,
@@ -132,7 +133,7 @@ static void (*handlers[_NSIG])(int sig, mcontext_t *mc) = {
132}; 133};
133 134
134 135
135static void hard_handler(int sig, siginfo_t *info, void *p) 136static void hard_handler(int sig, siginfo_t *si, void *p)
136{ 137{
137 struct ucontext *uc = p; 138 struct ucontext *uc = p;
138 mcontext_t *mc = &uc->uc_mcontext; 139 mcontext_t *mc = &uc->uc_mcontext;
@@ -161,7 +162,7 @@ static void hard_handler(int sig, siginfo_t *info, void *p)
161 while ((sig = ffs(pending)) != 0){ 162 while ((sig = ffs(pending)) != 0){
162 sig--; 163 sig--;
163 pending &= ~(1 << sig); 164 pending &= ~(1 << sig);
164 (*handlers[sig])(sig, mc); 165 (*handlers[sig])(sig, si, mc);
165 } 166 }
166 167
167 /* 168 /*
@@ -273,9 +274,12 @@ void unblock_signals(void)
273 * Deal with SIGIO first because the alarm handler might 274 * Deal with SIGIO first because the alarm handler might
274 * schedule, leaving the pending SIGIO stranded until we come 275 * schedule, leaving the pending SIGIO stranded until we come
275 * back here. 276 * back here.
277 *
278 * SIGIO's handler doesn't use siginfo or mcontext,
279 * so they can be NULL.
276 */ 280 */
277 if (save_pending & SIGIO_MASK) 281 if (save_pending & SIGIO_MASK)
278 sig_handler_common(SIGIO, NULL); 282 sig_handler_common(SIGIO, NULL, NULL);
279 283
280 if (save_pending & SIGVTALRM_MASK) 284 if (save_pending & SIGVTALRM_MASK)
281 real_alarm_handler(NULL); 285 real_alarm_handler(NULL);
diff --git a/arch/um/os-Linux/skas/process.c b/arch/um/os-Linux/skas/process.c
index cd65727854eb..d93bb40499f7 100644
--- a/arch/um/os-Linux/skas/process.c
+++ b/arch/um/os-Linux/skas/process.c
@@ -346,6 +346,10 @@ void userspace(struct uml_pt_regs *regs)
346 int err, status, op, pid = userspace_pid[0]; 346 int err, status, op, pid = userspace_pid[0];
347 /* To prevent races if using_sysemu changes under us.*/ 347 /* To prevent races if using_sysemu changes under us.*/
348 int local_using_sysemu; 348 int local_using_sysemu;
349 siginfo_t si;
350
351 /* Handle any immediate reschedules or signals */
352 interrupt_end();
349 353
350 if (getitimer(ITIMER_VIRTUAL, &timer)) 354 if (getitimer(ITIMER_VIRTUAL, &timer))
351 printk(UM_KERN_ERR "Failed to get itimer, errno = %d\n", errno); 355 printk(UM_KERN_ERR "Failed to get itimer, errno = %d\n", errno);
@@ -404,13 +408,17 @@ void userspace(struct uml_pt_regs *regs)
404 408
405 if (WIFSTOPPED(status)) { 409 if (WIFSTOPPED(status)) {
406 int sig = WSTOPSIG(status); 410 int sig = WSTOPSIG(status);
411
412 ptrace(PTRACE_GETSIGINFO, pid, 0, &si);
413
407 switch (sig) { 414 switch (sig) {
408 case SIGSEGV: 415 case SIGSEGV:
409 if (PTRACE_FULL_FAULTINFO || 416 if (PTRACE_FULL_FAULTINFO ||
410 !ptrace_faultinfo) { 417 !ptrace_faultinfo) {
411 get_skas_faultinfo(pid, 418 get_skas_faultinfo(pid,
412 &regs->faultinfo); 419 &regs->faultinfo);
413 (*sig_info[SIGSEGV])(SIGSEGV, regs); 420 (*sig_info[SIGSEGV])(SIGSEGV, &si,
421 regs);
414 } 422 }
415 else handle_segv(pid, regs); 423 else handle_segv(pid, regs);
416 break; 424 break;
@@ -418,14 +426,14 @@ void userspace(struct uml_pt_regs *regs)
418 handle_trap(pid, regs, local_using_sysemu); 426 handle_trap(pid, regs, local_using_sysemu);
419 break; 427 break;
420 case SIGTRAP: 428 case SIGTRAP:
421 relay_signal(SIGTRAP, regs); 429 relay_signal(SIGTRAP, &si, regs);
422 break; 430 break;
423 case SIGVTALRM: 431 case SIGVTALRM:
424 now = os_nsecs(); 432 now = os_nsecs();
425 if (now < nsecs) 433 if (now < nsecs)
426 break; 434 break;
427 block_signals(); 435 block_signals();
428 (*sig_info[sig])(sig, regs); 436 (*sig_info[sig])(sig, &si, regs);
429 unblock_signals(); 437 unblock_signals();
430 nsecs = timer.it_value.tv_sec * 438 nsecs = timer.it_value.tv_sec *
431 UM_NSEC_PER_SEC + 439 UM_NSEC_PER_SEC +
@@ -439,7 +447,7 @@ void userspace(struct uml_pt_regs *regs)
439 case SIGFPE: 447 case SIGFPE:
440 case SIGWINCH: 448 case SIGWINCH:
441 block_signals(); 449 block_signals();
442 (*sig_info[sig])(sig, regs); 450 (*sig_info[sig])(sig, &si, regs);
443 unblock_signals(); 451 unblock_signals();
444 break; 452 break;
445 default: 453 default:
diff --git a/arch/um/os-Linux/time.c b/arch/um/os-Linux/time.c
index 910499d76a67..f60238559af3 100644
--- a/arch/um/os-Linux/time.c
+++ b/arch/um/os-Linux/time.c
@@ -87,7 +87,7 @@ static int after_sleep_interval(struct timespec *ts)
87 87
88static void deliver_alarm(void) 88static void deliver_alarm(void)
89{ 89{
90 alarm_handler(SIGVTALRM, NULL); 90 alarm_handler(SIGVTALRM, NULL, NULL);
91} 91}
92 92
93static unsigned long long sleep_time(unsigned long long nsecs) 93static unsigned long long sleep_time(unsigned long long nsecs)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index ba2657c49217..8ec3a1aa4abd 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -1527,7 +1527,7 @@ config SECCOMP
1527 If unsure, say Y. Only embedded should say N here. 1527 If unsure, say Y. Only embedded should say N here.
1528 1528
1529config CC_STACKPROTECTOR 1529config CC_STACKPROTECTOR
1530 bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)" 1530 bool "Enable -fstack-protector buffer overflow detection"
1531 ---help--- 1531 ---help---
1532 This option turns on the -fstack-protector GCC feature. This 1532 This option turns on the -fstack-protector GCC feature. This
1533 feature puts, at the beginning of functions, a canary value on 1533 feature puts, at the beginning of functions, a canary value on
diff --git a/arch/x86/Makefile b/arch/x86/Makefile
index b0c5276861ec..682e9c210baa 100644
--- a/arch/x86/Makefile
+++ b/arch/x86/Makefile
@@ -27,6 +27,10 @@ ifeq ($(CONFIG_X86_32),y)
27 27
28 KBUILD_CFLAGS += -msoft-float -mregparm=3 -freg-struct-return 28 KBUILD_CFLAGS += -msoft-float -mregparm=3 -freg-struct-return
29 29
30 # Never want PIC in a 32-bit kernel, prevent breakage with GCC built
31 # with nonstandard options
32 KBUILD_CFLAGS += -fno-pic
33
30 # prevent gcc from keeping the stack 16 byte aligned 34 # prevent gcc from keeping the stack 16 byte aligned
31 KBUILD_CFLAGS += $(call cc-option,-mpreferred-stack-boundary=2) 35 KBUILD_CFLAGS += $(call cc-option,-mpreferred-stack-boundary=2)
32 36
diff --git a/arch/x86/boot/Makefile b/arch/x86/boot/Makefile
index 5a747dd884db..f7535bedc33f 100644
--- a/arch/x86/boot/Makefile
+++ b/arch/x86/boot/Makefile
@@ -57,7 +57,7 @@ KBUILD_CFLAGS := $(LINUXINCLUDE) -g -Os -D_SETUP -D__KERNEL__ \
57 -Wall -Wstrict-prototypes \ 57 -Wall -Wstrict-prototypes \
58 -march=i386 -mregparm=3 \ 58 -march=i386 -mregparm=3 \
59 -include $(srctree)/$(src)/code16gcc.h \ 59 -include $(srctree)/$(src)/code16gcc.h \
60 -fno-strict-aliasing -fomit-frame-pointer \ 60 -fno-strict-aliasing -fomit-frame-pointer -fno-pic \
61 $(call cc-option, -ffreestanding) \ 61 $(call cc-option, -ffreestanding) \
62 $(call cc-option, -fno-toplevel-reorder,\ 62 $(call cc-option, -fno-toplevel-reorder,\
63 $(call cc-option, -fno-unit-at-a-time)) \ 63 $(call cc-option, -fno-unit-at-a-time)) \
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 441520e4174f..a3ac52b29cbf 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -33,6 +33,14 @@
33#define MCI_STATUS_PCC (1ULL<<57) /* processor context corrupt */ 33#define MCI_STATUS_PCC (1ULL<<57) /* processor context corrupt */
34#define MCI_STATUS_S (1ULL<<56) /* Signaled machine check */ 34#define MCI_STATUS_S (1ULL<<56) /* Signaled machine check */
35#define MCI_STATUS_AR (1ULL<<55) /* Action required */ 35#define MCI_STATUS_AR (1ULL<<55) /* Action required */
36#define MCACOD 0xffff /* MCA Error Code */
37
38/* Architecturally defined codes from SDM Vol. 3B Chapter 15 */
39#define MCACOD_SCRUB 0x00C0 /* 0xC0-0xCF Memory Scrubbing */
40#define MCACOD_SCRUBMSK 0xfff0
41#define MCACOD_L3WB 0x017A /* L3 Explicit Writeback */
42#define MCACOD_DATA 0x0134 /* Data Load */
43#define MCACOD_INSTR 0x0150 /* Instruction Fetch */
36 44
37/* MCi_MISC register defines */ 45/* MCi_MISC register defines */
38#define MCI_MISC_ADDR_LSB(m) ((m) & 0x3f) 46#define MCI_MISC_ADDR_LSB(m) ((m) & 0x3f)
diff --git a/arch/x86/include/asm/olpc.h b/arch/x86/include/asm/olpc.h
index 87bdbca72f94..72f9adf6eca4 100644
--- a/arch/x86/include/asm/olpc.h
+++ b/arch/x86/include/asm/olpc.h
@@ -100,25 +100,6 @@ extern void olpc_xo1_pm_wakeup_clear(u16 value);
100 100
101extern int pci_olpc_init(void); 101extern int pci_olpc_init(void);
102 102
103/* EC related functions */
104
105extern int olpc_ec_cmd(unsigned char cmd, unsigned char *inbuf, size_t inlen,
106 unsigned char *outbuf, size_t outlen);
107
108/* EC commands */
109
110#define EC_FIRMWARE_REV 0x08
111#define EC_WRITE_SCI_MASK 0x1b
112#define EC_WAKE_UP_WLAN 0x24
113#define EC_WLAN_LEAVE_RESET 0x25
114#define EC_READ_EB_MODE 0x2a
115#define EC_SET_SCI_INHIBIT 0x32
116#define EC_SET_SCI_INHIBIT_RELEASE 0x34
117#define EC_WLAN_ENTER_RESET 0x35
118#define EC_WRITE_EXT_SCI_MASK 0x38
119#define EC_SCI_QUERY 0x84
120#define EC_EXT_SCI_QUERY 0x85
121
122/* SCI source values */ 103/* SCI source values */
123 104
124#define EC_SCI_SRC_EMPTY 0x00 105#define EC_SCI_SRC_EMPTY 0x00
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index dab39350e51e..cb4e43bce98a 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -196,11 +196,16 @@ static inline u32 get_ibs_caps(void) { return 0; }
196extern void perf_events_lapic_init(void); 196extern void perf_events_lapic_init(void);
197 197
198/* 198/*
199 * Abuse bit 3 of the cpu eflags register to indicate proper PEBS IP fixups. 199 * Abuse bits {3,5} of the cpu eflags register. These flags are otherwise
200 * This flag is otherwise unused and ABI specified to be 0, so nobody should 200 * unused and ABI specified to be 0, so nobody should care what we do with
201 * care what we do with it. 201 * them.
202 *
203 * EXACT - the IP points to the exact instruction that triggered the
204 * event (HW bugs exempt).
205 * VM - original X86_VM_MASK; see set_linear_ip().
202 */ 206 */
203#define PERF_EFLAGS_EXACT (1UL << 3) 207#define PERF_EFLAGS_EXACT (1UL << 3)
208#define PERF_EFLAGS_VM (1UL << 5)
204 209
205struct pt_regs; 210struct pt_regs;
206extern unsigned long perf_instruction_pointer(struct pt_regs *regs); 211extern unsigned long perf_instruction_pointer(struct pt_regs *regs);
diff --git a/arch/x86/kernel/acpi/sleep.c b/arch/x86/kernel/acpi/sleep.c
index 95bf99de9058..1b8e5a03d942 100644
--- a/arch/x86/kernel/acpi/sleep.c
+++ b/arch/x86/kernel/acpi/sleep.c
@@ -25,10 +25,6 @@ unsigned long acpi_realmode_flags;
25static char temp_stack[4096]; 25static char temp_stack[4096];
26#endif 26#endif
27 27
28asmlinkage void acpi_enter_s3(void)
29{
30 acpi_enter_sleep_state(3, wake_sleep_flags);
31}
32/** 28/**
33 * acpi_suspend_lowlevel - save kernel state 29 * acpi_suspend_lowlevel - save kernel state
34 * 30 *
diff --git a/arch/x86/kernel/acpi/sleep.h b/arch/x86/kernel/acpi/sleep.h
index 5653a5791ec9..67f59f8c6956 100644
--- a/arch/x86/kernel/acpi/sleep.h
+++ b/arch/x86/kernel/acpi/sleep.h
@@ -2,7 +2,6 @@
2 * Variables and functions used by the code in sleep.c 2 * Variables and functions used by the code in sleep.c
3 */ 3 */
4 4
5#include <linux/linkage.h>
6#include <asm/realmode.h> 5#include <asm/realmode.h>
7 6
8extern unsigned long saved_video_mode; 7extern unsigned long saved_video_mode;
@@ -11,7 +10,6 @@ extern long saved_magic;
11extern int wakeup_pmode_return; 10extern int wakeup_pmode_return;
12 11
13extern u8 wake_sleep_flags; 12extern u8 wake_sleep_flags;
14extern asmlinkage void acpi_enter_s3(void);
15 13
16extern unsigned long acpi_copy_wakeup_routine(unsigned long); 14extern unsigned long acpi_copy_wakeup_routine(unsigned long);
17extern void wakeup_long64(void); 15extern void wakeup_long64(void);
diff --git a/arch/x86/kernel/acpi/wakeup_32.S b/arch/x86/kernel/acpi/wakeup_32.S
index 72610839f03b..13ab720573e3 100644
--- a/arch/x86/kernel/acpi/wakeup_32.S
+++ b/arch/x86/kernel/acpi/wakeup_32.S
@@ -74,7 +74,9 @@ restore_registers:
74ENTRY(do_suspend_lowlevel) 74ENTRY(do_suspend_lowlevel)
75 call save_processor_state 75 call save_processor_state
76 call save_registers 76 call save_registers
77 call acpi_enter_s3 77 pushl $3
78 call acpi_enter_sleep_state
79 addl $4, %esp
78 80
79# In case of S3 failure, we'll emerge here. Jump 81# In case of S3 failure, we'll emerge here. Jump
80# to ret_point to recover 82# to ret_point to recover
diff --git a/arch/x86/kernel/acpi/wakeup_64.S b/arch/x86/kernel/acpi/wakeup_64.S
index 014d1d28c397..8ea5164cbd04 100644
--- a/arch/x86/kernel/acpi/wakeup_64.S
+++ b/arch/x86/kernel/acpi/wakeup_64.S
@@ -71,7 +71,9 @@ ENTRY(do_suspend_lowlevel)
71 movq %rsi, saved_rsi 71 movq %rsi, saved_rsi
72 72
73 addq $8, %rsp 73 addq $8, %rsp
74 call acpi_enter_s3 74 movl $3, %edi
75 xorl %eax, %eax
76 call acpi_enter_sleep_state
75 /* in case something went wrong, restore the machine status and go on */ 77 /* in case something went wrong, restore the machine status and go on */
76 jmp resume_point 78 jmp resume_point
77 79
diff --git a/arch/x86/kernel/alternative.c b/arch/x86/kernel/alternative.c
index 931280ff8299..afb7ff79a29f 100644
--- a/arch/x86/kernel/alternative.c
+++ b/arch/x86/kernel/alternative.c
@@ -224,7 +224,7 @@ void __init arch_init_ideal_nops(void)
224 ideal_nops = intel_nops; 224 ideal_nops = intel_nops;
225#endif 225#endif
226 } 226 }
227 227 break;
228 default: 228 default:
229#ifdef CONFIG_X86_64 229#ifdef CONFIG_X86_64
230 ideal_nops = k8_nops; 230 ideal_nops = k8_nops;
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 406eee784684..c265593ec2cd 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1204,7 +1204,7 @@ static void __clear_irq_vector(int irq, struct irq_cfg *cfg)
1204 BUG_ON(!cfg->vector); 1204 BUG_ON(!cfg->vector);
1205 1205
1206 vector = cfg->vector; 1206 vector = cfg->vector;
1207 for_each_cpu(cpu, cfg->domain) 1207 for_each_cpu_and(cpu, cfg->domain, cpu_online_mask)
1208 per_cpu(vector_irq, cpu)[vector] = -1; 1208 per_cpu(vector_irq, cpu)[vector] = -1;
1209 1209
1210 cfg->vector = 0; 1210 cfg->vector = 0;
@@ -1212,7 +1212,7 @@ static void __clear_irq_vector(int irq, struct irq_cfg *cfg)
1212 1212
1213 if (likely(!cfg->move_in_progress)) 1213 if (likely(!cfg->move_in_progress))
1214 return; 1214 return;
1215 for_each_cpu(cpu, cfg->old_domain) { 1215 for_each_cpu_and(cpu, cfg->old_domain, cpu_online_mask) {
1216 for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; 1216 for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS;
1217 vector++) { 1217 vector++) {
1218 if (per_cpu(vector_irq, cpu)[vector] != irq) 1218 if (per_cpu(vector_irq, cpu)[vector] != irq)
@@ -1356,6 +1356,16 @@ static void setup_ioapic_irq(unsigned int irq, struct irq_cfg *cfg,
1356 if (!IO_APIC_IRQ(irq)) 1356 if (!IO_APIC_IRQ(irq))
1357 return; 1357 return;
1358 1358
1359 /*
1360 * For legacy irqs, cfg->domain starts with cpu 0. Now that IO-APIC
1361 * can handle this irq and the apic driver is finialized at this point,
1362 * update the cfg->domain.
1363 */
1364 if (irq < legacy_pic->nr_legacy_irqs &&
1365 cpumask_equal(cfg->domain, cpumask_of(0)))
1366 apic->vector_allocation_domain(0, cfg->domain,
1367 apic->target_cpus());
1368
1359 if (assign_irq_vector(irq, cfg, apic->target_cpus())) 1369 if (assign_irq_vector(irq, cfg, apic->target_cpus()))
1360 return; 1370 return;
1361 1371
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 46d8786d655e..a5fbc3c5fccc 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -144,6 +144,8 @@ static int __init x86_xsave_setup(char *s)
144{ 144{
145 setup_clear_cpu_cap(X86_FEATURE_XSAVE); 145 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
146 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT); 146 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
147 setup_clear_cpu_cap(X86_FEATURE_AVX);
148 setup_clear_cpu_cap(X86_FEATURE_AVX2);
147 return 1; 149 return 1;
148} 150}
149__setup("noxsave", x86_xsave_setup); 151__setup("noxsave", x86_xsave_setup);
diff --git a/arch/x86/kernel/cpu/mcheck/mce-severity.c b/arch/x86/kernel/cpu/mcheck/mce-severity.c
index 413c2ced887c..13017626f9a8 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-severity.c
+++ b/arch/x86/kernel/cpu/mcheck/mce-severity.c
@@ -55,13 +55,6 @@ static struct severity {
55#define MCI_UC_S (MCI_STATUS_UC|MCI_STATUS_S) 55#define MCI_UC_S (MCI_STATUS_UC|MCI_STATUS_S)
56#define MCI_UC_SAR (MCI_STATUS_UC|MCI_STATUS_S|MCI_STATUS_AR) 56#define MCI_UC_SAR (MCI_STATUS_UC|MCI_STATUS_S|MCI_STATUS_AR)
57#define MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV) 57#define MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV)
58#define MCACOD 0xffff
59/* Architecturally defined codes from SDM Vol. 3B Chapter 15 */
60#define MCACOD_SCRUB 0x00C0 /* 0xC0-0xCF Memory Scrubbing */
61#define MCACOD_SCRUBMSK 0xfff0
62#define MCACOD_L3WB 0x017A /* L3 Explicit Writeback */
63#define MCACOD_DATA 0x0134 /* Data Load */
64#define MCACOD_INSTR 0x0150 /* Instruction Fetch */
65 58
66 MCESEV( 59 MCESEV(
67 NO, "Invalid", 60 NO, "Invalid",
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 5e095f873e3e..292d0258311c 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -103,6 +103,8 @@ DEFINE_PER_CPU(mce_banks_t, mce_poll_banks) = {
103 103
104static DEFINE_PER_CPU(struct work_struct, mce_work); 104static DEFINE_PER_CPU(struct work_struct, mce_work);
105 105
106static void (*quirk_no_way_out)(int bank, struct mce *m, struct pt_regs *regs);
107
106/* 108/*
107 * CPU/chipset specific EDAC code can register a notifier call here to print 109 * CPU/chipset specific EDAC code can register a notifier call here to print
108 * MCE errors in a human-readable form. 110 * MCE errors in a human-readable form.
@@ -650,14 +652,18 @@ EXPORT_SYMBOL_GPL(machine_check_poll);
650 * Do a quick check if any of the events requires a panic. 652 * Do a quick check if any of the events requires a panic.
651 * This decides if we keep the events around or clear them. 653 * This decides if we keep the events around or clear them.
652 */ 654 */
653static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp) 655static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp,
656 struct pt_regs *regs)
654{ 657{
655 int i, ret = 0; 658 int i, ret = 0;
656 659
657 for (i = 0; i < banks; i++) { 660 for (i = 0; i < banks; i++) {
658 m->status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i)); 661 m->status = mce_rdmsrl(MSR_IA32_MCx_STATUS(i));
659 if (m->status & MCI_STATUS_VAL) 662 if (m->status & MCI_STATUS_VAL) {
660 __set_bit(i, validp); 663 __set_bit(i, validp);
664 if (quirk_no_way_out)
665 quirk_no_way_out(i, m, regs);
666 }
661 if (mce_severity(m, tolerant, msg) >= MCE_PANIC_SEVERITY) 667 if (mce_severity(m, tolerant, msg) >= MCE_PANIC_SEVERITY)
662 ret = 1; 668 ret = 1;
663 } 669 }
@@ -1040,7 +1046,7 @@ void do_machine_check(struct pt_regs *regs, long error_code)
1040 *final = m; 1046 *final = m;
1041 1047
1042 memset(valid_banks, 0, sizeof(valid_banks)); 1048 memset(valid_banks, 0, sizeof(valid_banks));
1043 no_way_out = mce_no_way_out(&m, &msg, valid_banks); 1049 no_way_out = mce_no_way_out(&m, &msg, valid_banks, regs);
1044 1050
1045 barrier(); 1051 barrier();
1046 1052
@@ -1418,6 +1424,34 @@ static void __mcheck_cpu_init_generic(void)
1418 } 1424 }
1419} 1425}
1420 1426
1427/*
1428 * During IFU recovery Sandy Bridge -EP4S processors set the RIPV and
1429 * EIPV bits in MCG_STATUS to zero on the affected logical processor (SDM
1430 * Vol 3B Table 15-20). But this confuses both the code that determines
1431 * whether the machine check occurred in kernel or user mode, and also
1432 * the severity assessment code. Pretend that EIPV was set, and take the
1433 * ip/cs values from the pt_regs that mce_gather_info() ignored earlier.
1434 */
1435static void quirk_sandybridge_ifu(int bank, struct mce *m, struct pt_regs *regs)
1436{
1437 if (bank != 0)
1438 return;
1439 if ((m->mcgstatus & (MCG_STATUS_EIPV|MCG_STATUS_RIPV)) != 0)
1440 return;
1441 if ((m->status & (MCI_STATUS_OVER|MCI_STATUS_UC|
1442 MCI_STATUS_EN|MCI_STATUS_MISCV|MCI_STATUS_ADDRV|
1443 MCI_STATUS_PCC|MCI_STATUS_S|MCI_STATUS_AR|
1444 MCACOD)) !=
1445 (MCI_STATUS_UC|MCI_STATUS_EN|
1446 MCI_STATUS_MISCV|MCI_STATUS_ADDRV|MCI_STATUS_S|
1447 MCI_STATUS_AR|MCACOD_INSTR))
1448 return;
1449
1450 m->mcgstatus |= MCG_STATUS_EIPV;
1451 m->ip = regs->ip;
1452 m->cs = regs->cs;
1453}
1454
1421/* Add per CPU specific workarounds here */ 1455/* Add per CPU specific workarounds here */
1422static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c) 1456static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
1423{ 1457{
@@ -1515,6 +1549,9 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
1515 */ 1549 */
1516 if (c->x86 == 6 && c->x86_model <= 13 && mce_bootlog < 0) 1550 if (c->x86 == 6 && c->x86_model <= 13 && mce_bootlog < 0)
1517 mce_bootlog = 0; 1551 mce_bootlog = 0;
1552
1553 if (c->x86 == 6 && c->x86_model == 45)
1554 quirk_no_way_out = quirk_sandybridge_ifu;
1518 } 1555 }
1519 if (monarch_timeout < 0) 1556 if (monarch_timeout < 0)
1520 monarch_timeout = 0; 1557 monarch_timeout = 0;
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 29557aa06dda..915b876edd1e 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -32,6 +32,8 @@
32#include <asm/smp.h> 32#include <asm/smp.h>
33#include <asm/alternative.h> 33#include <asm/alternative.h>
34#include <asm/timer.h> 34#include <asm/timer.h>
35#include <asm/desc.h>
36#include <asm/ldt.h>
35 37
36#include "perf_event.h" 38#include "perf_event.h"
37 39
@@ -1738,6 +1740,29 @@ valid_user_frame(const void __user *fp, unsigned long size)
1738 return (__range_not_ok(fp, size, TASK_SIZE) == 0); 1740 return (__range_not_ok(fp, size, TASK_SIZE) == 0);
1739} 1741}
1740 1742
1743static unsigned long get_segment_base(unsigned int segment)
1744{
1745 struct desc_struct *desc;
1746 int idx = segment >> 3;
1747
1748 if ((segment & SEGMENT_TI_MASK) == SEGMENT_LDT) {
1749 if (idx > LDT_ENTRIES)
1750 return 0;
1751
1752 if (idx > current->active_mm->context.size)
1753 return 0;
1754
1755 desc = current->active_mm->context.ldt;
1756 } else {
1757 if (idx > GDT_ENTRIES)
1758 return 0;
1759
1760 desc = __this_cpu_ptr(&gdt_page.gdt[0]);
1761 }
1762
1763 return get_desc_base(desc + idx);
1764}
1765
1741#ifdef CONFIG_COMPAT 1766#ifdef CONFIG_COMPAT
1742 1767
1743#include <asm/compat.h> 1768#include <asm/compat.h>
@@ -1746,13 +1771,17 @@ static inline int
1746perf_callchain_user32(struct pt_regs *regs, struct perf_callchain_entry *entry) 1771perf_callchain_user32(struct pt_regs *regs, struct perf_callchain_entry *entry)
1747{ 1772{
1748 /* 32-bit process in 64-bit kernel. */ 1773 /* 32-bit process in 64-bit kernel. */
1774 unsigned long ss_base, cs_base;
1749 struct stack_frame_ia32 frame; 1775 struct stack_frame_ia32 frame;
1750 const void __user *fp; 1776 const void __user *fp;
1751 1777
1752 if (!test_thread_flag(TIF_IA32)) 1778 if (!test_thread_flag(TIF_IA32))
1753 return 0; 1779 return 0;
1754 1780
1755 fp = compat_ptr(regs->bp); 1781 cs_base = get_segment_base(regs->cs);
1782 ss_base = get_segment_base(regs->ss);
1783
1784 fp = compat_ptr(ss_base + regs->bp);
1756 while (entry->nr < PERF_MAX_STACK_DEPTH) { 1785 while (entry->nr < PERF_MAX_STACK_DEPTH) {
1757 unsigned long bytes; 1786 unsigned long bytes;
1758 frame.next_frame = 0; 1787 frame.next_frame = 0;
@@ -1765,8 +1794,8 @@ perf_callchain_user32(struct pt_regs *regs, struct perf_callchain_entry *entry)
1765 if (!valid_user_frame(fp, sizeof(frame))) 1794 if (!valid_user_frame(fp, sizeof(frame)))
1766 break; 1795 break;
1767 1796
1768 perf_callchain_store(entry, frame.return_address); 1797 perf_callchain_store(entry, cs_base + frame.return_address);
1769 fp = compat_ptr(frame.next_frame); 1798 fp = compat_ptr(ss_base + frame.next_frame);
1770 } 1799 }
1771 return 1; 1800 return 1;
1772} 1801}
@@ -1789,6 +1818,12 @@ perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)
1789 return; 1818 return;
1790 } 1819 }
1791 1820
1821 /*
1822 * We don't know what to do with VM86 stacks.. ignore them for now.
1823 */
1824 if (regs->flags & (X86_VM_MASK | PERF_EFLAGS_VM))
1825 return;
1826
1792 fp = (void __user *)regs->bp; 1827 fp = (void __user *)regs->bp;
1793 1828
1794 perf_callchain_store(entry, regs->ip); 1829 perf_callchain_store(entry, regs->ip);
@@ -1816,16 +1851,50 @@ perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)
1816 } 1851 }
1817} 1852}
1818 1853
1819unsigned long perf_instruction_pointer(struct pt_regs *regs) 1854/*
1855 * Deal with code segment offsets for the various execution modes:
1856 *
1857 * VM86 - the good olde 16 bit days, where the linear address is
1858 * 20 bits and we use regs->ip + 0x10 * regs->cs.
1859 *
1860 * IA32 - Where we need to look at GDT/LDT segment descriptor tables
1861 * to figure out what the 32bit base address is.
1862 *
1863 * X32 - has TIF_X32 set, but is running in x86_64
1864 *
1865 * X86_64 - CS,DS,SS,ES are all zero based.
1866 */
1867static unsigned long code_segment_base(struct pt_regs *regs)
1820{ 1868{
1821 unsigned long ip; 1869 /*
1870 * If we are in VM86 mode, add the segment offset to convert to a
1871 * linear address.
1872 */
1873 if (regs->flags & X86_VM_MASK)
1874 return 0x10 * regs->cs;
1875
1876 /*
1877 * For IA32 we look at the GDT/LDT segment base to convert the
1878 * effective IP to a linear address.
1879 */
1880#ifdef CONFIG_X86_32
1881 if (user_mode(regs) && regs->cs != __USER_CS)
1882 return get_segment_base(regs->cs);
1883#else
1884 if (test_thread_flag(TIF_IA32)) {
1885 if (user_mode(regs) && regs->cs != __USER32_CS)
1886 return get_segment_base(regs->cs);
1887 }
1888#endif
1889 return 0;
1890}
1822 1891
1892unsigned long perf_instruction_pointer(struct pt_regs *regs)
1893{
1823 if (perf_guest_cbs && perf_guest_cbs->is_in_guest()) 1894 if (perf_guest_cbs && perf_guest_cbs->is_in_guest())
1824 ip = perf_guest_cbs->get_guest_ip(); 1895 return perf_guest_cbs->get_guest_ip();
1825 else
1826 ip = instruction_pointer(regs);
1827 1896
1828 return ip; 1897 return regs->ip + code_segment_base(regs);
1829} 1898}
1830 1899
1831unsigned long perf_misc_flags(struct pt_regs *regs) 1900unsigned long perf_misc_flags(struct pt_regs *regs)
@@ -1838,7 +1907,7 @@ unsigned long perf_misc_flags(struct pt_regs *regs)
1838 else 1907 else
1839 misc |= PERF_RECORD_MISC_GUEST_KERNEL; 1908 misc |= PERF_RECORD_MISC_GUEST_KERNEL;
1840 } else { 1909 } else {
1841 if (!kernel_ip(regs->ip)) 1910 if (user_mode(regs))
1842 misc |= PERF_RECORD_MISC_USER; 1911 misc |= PERF_RECORD_MISC_USER;
1843 else 1912 else
1844 misc |= PERF_RECORD_MISC_KERNEL; 1913 misc |= PERF_RECORD_MISC_KERNEL;
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index 821d53b696d1..6605a81ba339 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -516,6 +516,26 @@ static inline bool kernel_ip(unsigned long ip)
516#endif 516#endif
517} 517}
518 518
519/*
520 * Not all PMUs provide the right context information to place the reported IP
521 * into full context. Specifically segment registers are typically not
522 * supplied.
523 *
524 * Assuming the address is a linear address (it is for IBS), we fake the CS and
525 * vm86 mode using the known zero-based code segment and 'fix up' the registers
526 * to reflect this.
527 *
528 * Intel PEBS/LBR appear to typically provide the effective address, nothing
529 * much we can do about that but pray and treat it like a linear address.
530 */
531static inline void set_linear_ip(struct pt_regs *regs, unsigned long ip)
532{
533 regs->cs = kernel_ip(ip) ? __KERNEL_CS : __USER_CS;
534 if (regs->flags & X86_VM_MASK)
535 regs->flags ^= (PERF_EFLAGS_VM | X86_VM_MASK);
536 regs->ip = ip;
537}
538
519#ifdef CONFIG_CPU_SUP_AMD 539#ifdef CONFIG_CPU_SUP_AMD
520 540
521int amd_pmu_init(void); 541int amd_pmu_init(void);
diff --git a/arch/x86/kernel/cpu/perf_event_amd_ibs.c b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
index da9bcdcd9856..7bfb5bec8630 100644
--- a/arch/x86/kernel/cpu/perf_event_amd_ibs.c
+++ b/arch/x86/kernel/cpu/perf_event_amd_ibs.c
@@ -13,6 +13,8 @@
13 13
14#include <asm/apic.h> 14#include <asm/apic.h>
15 15
16#include "perf_event.h"
17
16static u32 ibs_caps; 18static u32 ibs_caps;
17 19
18#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD) 20#if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD)
@@ -536,7 +538,7 @@ static int perf_ibs_handle_irq(struct perf_ibs *perf_ibs, struct pt_regs *iregs)
536 if (check_rip && (ibs_data.regs[2] & IBS_RIP_INVALID)) { 538 if (check_rip && (ibs_data.regs[2] & IBS_RIP_INVALID)) {
537 regs.flags &= ~PERF_EFLAGS_EXACT; 539 regs.flags &= ~PERF_EFLAGS_EXACT;
538 } else { 540 } else {
539 instruction_pointer_set(&regs, ibs_data.regs[1]); 541 set_linear_ip(&regs, ibs_data.regs[1]);
540 regs.flags |= PERF_EFLAGS_EXACT; 542 regs.flags |= PERF_EFLAGS_EXACT;
541 } 543 }
542 544
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 382366977d4c..7f2739e03e79 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1522,8 +1522,16 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr)
1522 arr[0].msr = MSR_CORE_PERF_GLOBAL_CTRL; 1522 arr[0].msr = MSR_CORE_PERF_GLOBAL_CTRL;
1523 arr[0].host = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask; 1523 arr[0].host = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask;
1524 arr[0].guest = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_host_mask; 1524 arr[0].guest = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_host_mask;
1525 /*
1526 * If PMU counter has PEBS enabled it is not enough to disable counter
1527 * on a guest entry since PEBS memory write can overshoot guest entry
1528 * and corrupt guest memory. Disabling PEBS solves the problem.
1529 */
1530 arr[1].msr = MSR_IA32_PEBS_ENABLE;
1531 arr[1].host = cpuc->pebs_enabled;
1532 arr[1].guest = 0;
1525 1533
1526 *nr = 1; 1534 *nr = 2;
1527 return arr; 1535 return arr;
1528} 1536}
1529 1537
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index 629ae0b7ad90..e38d97bf4259 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -499,7 +499,7 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
499 * We sampled a branch insn, rewind using the LBR stack 499 * We sampled a branch insn, rewind using the LBR stack
500 */ 500 */
501 if (ip == to) { 501 if (ip == to) {
502 regs->ip = from; 502 set_linear_ip(regs, from);
503 return 1; 503 return 1;
504 } 504 }
505 505
@@ -529,7 +529,7 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
529 } while (to < ip); 529 } while (to < ip);
530 530
531 if (to == ip) { 531 if (to == ip) {
532 regs->ip = old_to; 532 set_linear_ip(regs, old_to);
533 return 1; 533 return 1;
534 } 534 }
535 535
@@ -569,7 +569,8 @@ static void __intel_pmu_pebs_event(struct perf_event *event,
569 * A possible PERF_SAMPLE_REGS will have to transfer all regs. 569 * A possible PERF_SAMPLE_REGS will have to transfer all regs.
570 */ 570 */
571 regs = *iregs; 571 regs = *iregs;
572 regs.ip = pebs->ip; 572 regs.flags = pebs->flags;
573 set_linear_ip(&regs, pebs->ip);
573 regs.bp = pebs->bp; 574 regs.bp = pebs->bp;
574 regs.sp = pebs->sp; 575 regs.sp = pebs->sp;
575 576
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.c b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
index 7563fda9f033..0a5571080e74 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.c
@@ -796,7 +796,6 @@ static struct intel_uncore_type *nhm_msr_uncores[] = {
796 796
797DEFINE_UNCORE_FORMAT_ATTR(event5, event, "config:1-5"); 797DEFINE_UNCORE_FORMAT_ATTR(event5, event, "config:1-5");
798DEFINE_UNCORE_FORMAT_ATTR(counter, counter, "config:6-7"); 798DEFINE_UNCORE_FORMAT_ATTR(counter, counter, "config:6-7");
799DEFINE_UNCORE_FORMAT_ATTR(mm_cfg, mm_cfg, "config:63");
800DEFINE_UNCORE_FORMAT_ATTR(match, match, "config1:0-63"); 799DEFINE_UNCORE_FORMAT_ATTR(match, match, "config1:0-63");
801DEFINE_UNCORE_FORMAT_ATTR(mask, mask, "config2:0-63"); 800DEFINE_UNCORE_FORMAT_ATTR(mask, mask, "config2:0-63");
802 801
@@ -902,16 +901,21 @@ static struct attribute_group nhmex_uncore_cbox_format_group = {
902 .attrs = nhmex_uncore_cbox_formats_attr, 901 .attrs = nhmex_uncore_cbox_formats_attr,
903}; 902};
904 903
904/* msr offset for each instance of cbox */
905static unsigned nhmex_cbox_msr_offsets[] = {
906 0x0, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0, 0x240, 0x2c0,
907};
908
905static struct intel_uncore_type nhmex_uncore_cbox = { 909static struct intel_uncore_type nhmex_uncore_cbox = {
906 .name = "cbox", 910 .name = "cbox",
907 .num_counters = 6, 911 .num_counters = 6,
908 .num_boxes = 8, 912 .num_boxes = 10,
909 .perf_ctr_bits = 48, 913 .perf_ctr_bits = 48,
910 .event_ctl = NHMEX_C0_MSR_PMON_EV_SEL0, 914 .event_ctl = NHMEX_C0_MSR_PMON_EV_SEL0,
911 .perf_ctr = NHMEX_C0_MSR_PMON_CTR0, 915 .perf_ctr = NHMEX_C0_MSR_PMON_CTR0,
912 .event_mask = NHMEX_PMON_RAW_EVENT_MASK, 916 .event_mask = NHMEX_PMON_RAW_EVENT_MASK,
913 .box_ctl = NHMEX_C0_MSR_PMON_GLOBAL_CTL, 917 .box_ctl = NHMEX_C0_MSR_PMON_GLOBAL_CTL,
914 .msr_offset = NHMEX_C_MSR_OFFSET, 918 .msr_offsets = nhmex_cbox_msr_offsets,
915 .pair_ctr_ctl = 1, 919 .pair_ctr_ctl = 1,
916 .ops = &nhmex_uncore_ops, 920 .ops = &nhmex_uncore_ops,
917 .format_group = &nhmex_uncore_cbox_format_group 921 .format_group = &nhmex_uncore_cbox_format_group
@@ -1032,24 +1036,22 @@ static struct intel_uncore_type nhmex_uncore_bbox = {
1032 1036
1033static int nhmex_sbox_hw_config(struct intel_uncore_box *box, struct perf_event *event) 1037static int nhmex_sbox_hw_config(struct intel_uncore_box *box, struct perf_event *event)
1034{ 1038{
1035 struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; 1039 struct hw_perf_event *hwc = &event->hw;
1036 struct hw_perf_event_extra *reg2 = &event->hw.branch_reg; 1040 struct hw_perf_event_extra *reg1 = &hwc->extra_reg;
1041 struct hw_perf_event_extra *reg2 = &hwc->branch_reg;
1037 1042
1038 if (event->attr.config & NHMEX_S_PMON_MM_CFG_EN) { 1043 /* only TO_R_PROG_EV event uses the match/mask register */
1039 reg1->config = event->attr.config1; 1044 if ((hwc->config & NHMEX_PMON_CTL_EV_SEL_MASK) !=
1040 reg2->config = event->attr.config2; 1045 NHMEX_S_EVENT_TO_R_PROG_EV)
1041 } else { 1046 return 0;
1042 reg1->config = ~0ULL;
1043 reg2->config = ~0ULL;
1044 }
1045 1047
1046 if (box->pmu->pmu_idx == 0) 1048 if (box->pmu->pmu_idx == 0)
1047 reg1->reg = NHMEX_S0_MSR_MM_CFG; 1049 reg1->reg = NHMEX_S0_MSR_MM_CFG;
1048 else 1050 else
1049 reg1->reg = NHMEX_S1_MSR_MM_CFG; 1051 reg1->reg = NHMEX_S1_MSR_MM_CFG;
1050
1051 reg1->idx = 0; 1052 reg1->idx = 0;
1052 1053 reg1->config = event->attr.config1;
1054 reg2->config = event->attr.config2;
1053 return 0; 1055 return 0;
1054} 1056}
1055 1057
@@ -1059,8 +1061,8 @@ static void nhmex_sbox_msr_enable_event(struct intel_uncore_box *box, struct per
1059 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; 1061 struct hw_perf_event_extra *reg1 = &hwc->extra_reg;
1060 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; 1062 struct hw_perf_event_extra *reg2 = &hwc->branch_reg;
1061 1063
1062 wrmsrl(reg1->reg, 0); 1064 if (reg1->idx != EXTRA_REG_NONE) {
1063 if (reg1->config != ~0ULL || reg2->config != ~0ULL) { 1065 wrmsrl(reg1->reg, 0);
1064 wrmsrl(reg1->reg + 1, reg1->config); 1066 wrmsrl(reg1->reg + 1, reg1->config);
1065 wrmsrl(reg1->reg + 2, reg2->config); 1067 wrmsrl(reg1->reg + 2, reg2->config);
1066 wrmsrl(reg1->reg, NHMEX_S_PMON_MM_CFG_EN); 1068 wrmsrl(reg1->reg, NHMEX_S_PMON_MM_CFG_EN);
@@ -1074,7 +1076,6 @@ static struct attribute *nhmex_uncore_sbox_formats_attr[] = {
1074 &format_attr_edge.attr, 1076 &format_attr_edge.attr,
1075 &format_attr_inv.attr, 1077 &format_attr_inv.attr,
1076 &format_attr_thresh8.attr, 1078 &format_attr_thresh8.attr,
1077 &format_attr_mm_cfg.attr,
1078 &format_attr_match.attr, 1079 &format_attr_match.attr,
1079 &format_attr_mask.attr, 1080 &format_attr_mask.attr,
1080 NULL, 1081 NULL,
@@ -1142,6 +1143,9 @@ static struct extra_reg nhmex_uncore_mbox_extra_regs[] = {
1142 EVENT_EXTRA_END 1143 EVENT_EXTRA_END
1143}; 1144};
1144 1145
1146/* Nehalem-EX or Westmere-EX ? */
1147bool uncore_nhmex;
1148
1145static bool nhmex_mbox_get_shared_reg(struct intel_uncore_box *box, int idx, u64 config) 1149static bool nhmex_mbox_get_shared_reg(struct intel_uncore_box *box, int idx, u64 config)
1146{ 1150{
1147 struct intel_uncore_extra_reg *er; 1151 struct intel_uncore_extra_reg *er;
@@ -1171,18 +1175,29 @@ static bool nhmex_mbox_get_shared_reg(struct intel_uncore_box *box, int idx, u64
1171 return false; 1175 return false;
1172 1176
1173 /* mask of the shared fields */ 1177 /* mask of the shared fields */
1174 mask = NHMEX_M_PMON_ZDP_CTL_FVC_MASK; 1178 if (uncore_nhmex)
1179 mask = NHMEX_M_PMON_ZDP_CTL_FVC_MASK;
1180 else
1181 mask = WSMEX_M_PMON_ZDP_CTL_FVC_MASK;
1175 er = &box->shared_regs[EXTRA_REG_NHMEX_M_ZDP_CTL_FVC]; 1182 er = &box->shared_regs[EXTRA_REG_NHMEX_M_ZDP_CTL_FVC];
1176 1183
1177 raw_spin_lock_irqsave(&er->lock, flags); 1184 raw_spin_lock_irqsave(&er->lock, flags);
1178 /* add mask of the non-shared field if it's in use */ 1185 /* add mask of the non-shared field if it's in use */
1179 if (__BITS_VALUE(atomic_read(&er->ref), idx, 8)) 1186 if (__BITS_VALUE(atomic_read(&er->ref), idx, 8)) {
1180 mask |= NHMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx); 1187 if (uncore_nhmex)
1188 mask |= NHMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx);
1189 else
1190 mask |= WSMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx);
1191 }
1181 1192
1182 if (!atomic_read(&er->ref) || !((er->config ^ config) & mask)) { 1193 if (!atomic_read(&er->ref) || !((er->config ^ config) & mask)) {
1183 atomic_add(1 << (idx * 8), &er->ref); 1194 atomic_add(1 << (idx * 8), &er->ref);
1184 mask = NHMEX_M_PMON_ZDP_CTL_FVC_MASK | 1195 if (uncore_nhmex)
1185 NHMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx); 1196 mask = NHMEX_M_PMON_ZDP_CTL_FVC_MASK |
1197 NHMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx);
1198 else
1199 mask = WSMEX_M_PMON_ZDP_CTL_FVC_MASK |
1200 WSMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx);
1186 er->config &= ~mask; 1201 er->config &= ~mask;
1187 er->config |= (config & mask); 1202 er->config |= (config & mask);
1188 ret = true; 1203 ret = true;
@@ -1216,7 +1231,10 @@ u64 nhmex_mbox_alter_er(struct perf_event *event, int new_idx, bool modify)
1216 1231
1217 /* get the non-shared control bits and shift them */ 1232 /* get the non-shared control bits and shift them */
1218 idx = orig_idx - EXTRA_REG_NHMEX_M_ZDP_CTL_FVC; 1233 idx = orig_idx - EXTRA_REG_NHMEX_M_ZDP_CTL_FVC;
1219 config &= NHMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx); 1234 if (uncore_nhmex)
1235 config &= NHMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx);
1236 else
1237 config &= WSMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(idx);
1220 if (new_idx > orig_idx) { 1238 if (new_idx > orig_idx) {
1221 idx = new_idx - orig_idx; 1239 idx = new_idx - orig_idx;
1222 config <<= 3 * idx; 1240 config <<= 3 * idx;
@@ -1226,6 +1244,10 @@ u64 nhmex_mbox_alter_er(struct perf_event *event, int new_idx, bool modify)
1226 } 1244 }
1227 1245
1228 /* add the shared control bits back */ 1246 /* add the shared control bits back */
1247 if (uncore_nhmex)
1248 config |= NHMEX_M_PMON_ZDP_CTL_FVC_MASK & reg1->config;
1249 else
1250 config |= WSMEX_M_PMON_ZDP_CTL_FVC_MASK & reg1->config;
1229 config |= NHMEX_M_PMON_ZDP_CTL_FVC_MASK & reg1->config; 1251 config |= NHMEX_M_PMON_ZDP_CTL_FVC_MASK & reg1->config;
1230 if (modify) { 1252 if (modify) {
1231 /* adjust the main event selector */ 1253 /* adjust the main event selector */
@@ -1264,7 +1286,8 @@ again:
1264 } 1286 }
1265 1287
1266 /* for the match/mask registers */ 1288 /* for the match/mask registers */
1267 if ((uncore_box_is_fake(box) || !reg2->alloc) && 1289 if (reg2->idx != EXTRA_REG_NONE &&
1290 (uncore_box_is_fake(box) || !reg2->alloc) &&
1268 !nhmex_mbox_get_shared_reg(box, reg2->idx, reg2->config)) 1291 !nhmex_mbox_get_shared_reg(box, reg2->idx, reg2->config))
1269 goto fail; 1292 goto fail;
1270 1293
@@ -1278,7 +1301,8 @@ again:
1278 if (idx[0] != 0xff && idx[0] != __BITS_VALUE(reg1->idx, 0, 8)) 1301 if (idx[0] != 0xff && idx[0] != __BITS_VALUE(reg1->idx, 0, 8))
1279 nhmex_mbox_alter_er(event, idx[0], true); 1302 nhmex_mbox_alter_er(event, idx[0], true);
1280 reg1->alloc |= alloc; 1303 reg1->alloc |= alloc;
1281 reg2->alloc = 1; 1304 if (reg2->idx != EXTRA_REG_NONE)
1305 reg2->alloc = 1;
1282 } 1306 }
1283 return NULL; 1307 return NULL;
1284fail: 1308fail:
@@ -1342,9 +1366,6 @@ static int nhmex_mbox_hw_config(struct intel_uncore_box *box, struct perf_event
1342 struct extra_reg *er; 1366 struct extra_reg *er;
1343 unsigned msr; 1367 unsigned msr;
1344 int reg_idx = 0; 1368 int reg_idx = 0;
1345
1346 if (WARN_ON_ONCE(reg1->idx != -1))
1347 return -EINVAL;
1348 /* 1369 /*
1349 * The mbox events may require 2 extra MSRs at the most. But only 1370 * The mbox events may require 2 extra MSRs at the most. But only
1350 * the lower 32 bits in these MSRs are significant, so we can use 1371 * the lower 32 bits in these MSRs are significant, so we can use
@@ -1355,11 +1376,6 @@ static int nhmex_mbox_hw_config(struct intel_uncore_box *box, struct perf_event
1355 continue; 1376 continue;
1356 if (event->attr.config1 & ~er->valid_mask) 1377 if (event->attr.config1 & ~er->valid_mask)
1357 return -EINVAL; 1378 return -EINVAL;
1358 if (er->idx == __BITS_VALUE(reg1->idx, 0, 8) ||
1359 er->idx == __BITS_VALUE(reg1->idx, 1, 8))
1360 continue;
1361 if (WARN_ON_ONCE(reg_idx >= 2))
1362 return -EINVAL;
1363 1379
1364 msr = er->msr + type->msr_offset * box->pmu->pmu_idx; 1380 msr = er->msr + type->msr_offset * box->pmu->pmu_idx;
1365 if (WARN_ON_ONCE(msr >= 0xffff || er->idx >= 0xff)) 1381 if (WARN_ON_ONCE(msr >= 0xffff || er->idx >= 0xff))
@@ -1368,6 +1384,8 @@ static int nhmex_mbox_hw_config(struct intel_uncore_box *box, struct perf_event
1368 /* always use the 32~63 bits to pass the PLD config */ 1384 /* always use the 32~63 bits to pass the PLD config */
1369 if (er->idx == EXTRA_REG_NHMEX_M_PLD) 1385 if (er->idx == EXTRA_REG_NHMEX_M_PLD)
1370 reg_idx = 1; 1386 reg_idx = 1;
1387 else if (WARN_ON_ONCE(reg_idx > 0))
1388 return -EINVAL;
1371 1389
1372 reg1->idx &= ~(0xff << (reg_idx * 8)); 1390 reg1->idx &= ~(0xff << (reg_idx * 8));
1373 reg1->reg &= ~(0xffff << (reg_idx * 16)); 1391 reg1->reg &= ~(0xffff << (reg_idx * 16));
@@ -1376,17 +1394,21 @@ static int nhmex_mbox_hw_config(struct intel_uncore_box *box, struct perf_event
1376 reg1->config = event->attr.config1; 1394 reg1->config = event->attr.config1;
1377 reg_idx++; 1395 reg_idx++;
1378 } 1396 }
1379 /* use config2 to pass the filter config */ 1397 /*
1380 reg2->idx = EXTRA_REG_NHMEX_M_FILTER; 1398 * The mbox only provides ability to perform address matching
1381 if (event->attr.config2 & NHMEX_M_PMON_MM_CFG_EN) 1399 * for the PLD events.
1382 reg2->config = event->attr.config2; 1400 */
1383 else 1401 if (reg_idx == 2) {
1384 reg2->config = ~0ULL; 1402 reg2->idx = EXTRA_REG_NHMEX_M_FILTER;
1385 if (box->pmu->pmu_idx == 0) 1403 if (event->attr.config2 & NHMEX_M_PMON_MM_CFG_EN)
1386 reg2->reg = NHMEX_M0_MSR_PMU_MM_CFG; 1404 reg2->config = event->attr.config2;
1387 else 1405 else
1388 reg2->reg = NHMEX_M1_MSR_PMU_MM_CFG; 1406 reg2->config = ~0ULL;
1389 1407 if (box->pmu->pmu_idx == 0)
1408 reg2->reg = NHMEX_M0_MSR_PMU_MM_CFG;
1409 else
1410 reg2->reg = NHMEX_M1_MSR_PMU_MM_CFG;
1411 }
1390 return 0; 1412 return 0;
1391} 1413}
1392 1414
@@ -1422,34 +1444,36 @@ static void nhmex_mbox_msr_enable_event(struct intel_uncore_box *box, struct per
1422 wrmsrl(__BITS_VALUE(reg1->reg, 1, 16), 1444 wrmsrl(__BITS_VALUE(reg1->reg, 1, 16),
1423 nhmex_mbox_shared_reg_config(box, idx)); 1445 nhmex_mbox_shared_reg_config(box, idx));
1424 1446
1425 wrmsrl(reg2->reg, 0); 1447 if (reg2->idx != EXTRA_REG_NONE) {
1426 if (reg2->config != ~0ULL) { 1448 wrmsrl(reg2->reg, 0);
1427 wrmsrl(reg2->reg + 1, 1449 if (reg2->config != ~0ULL) {
1428 reg2->config & NHMEX_M_PMON_ADDR_MATCH_MASK); 1450 wrmsrl(reg2->reg + 1,
1429 wrmsrl(reg2->reg + 2, NHMEX_M_PMON_ADDR_MASK_MASK & 1451 reg2->config & NHMEX_M_PMON_ADDR_MATCH_MASK);
1430 (reg2->config >> NHMEX_M_PMON_ADDR_MASK_SHIFT)); 1452 wrmsrl(reg2->reg + 2, NHMEX_M_PMON_ADDR_MASK_MASK &
1431 wrmsrl(reg2->reg, NHMEX_M_PMON_MM_CFG_EN); 1453 (reg2->config >> NHMEX_M_PMON_ADDR_MASK_SHIFT));
1454 wrmsrl(reg2->reg, NHMEX_M_PMON_MM_CFG_EN);
1455 }
1432 } 1456 }
1433 1457
1434 wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT0); 1458 wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT0);
1435} 1459}
1436 1460
1437DEFINE_UNCORE_FORMAT_ATTR(count_mode, count_mode, "config:2-3"); 1461DEFINE_UNCORE_FORMAT_ATTR(count_mode, count_mode, "config:2-3");
1438DEFINE_UNCORE_FORMAT_ATTR(storage_mode, storage_mode, "config:4-5"); 1462DEFINE_UNCORE_FORMAT_ATTR(storage_mode, storage_mode, "config:4-5");
1439DEFINE_UNCORE_FORMAT_ATTR(wrap_mode, wrap_mode, "config:6"); 1463DEFINE_UNCORE_FORMAT_ATTR(wrap_mode, wrap_mode, "config:6");
1440DEFINE_UNCORE_FORMAT_ATTR(flag_mode, flag_mode, "config:7"); 1464DEFINE_UNCORE_FORMAT_ATTR(flag_mode, flag_mode, "config:7");
1441DEFINE_UNCORE_FORMAT_ATTR(inc_sel, inc_sel, "config:9-13"); 1465DEFINE_UNCORE_FORMAT_ATTR(inc_sel, inc_sel, "config:9-13");
1442DEFINE_UNCORE_FORMAT_ATTR(set_flag_sel, set_flag_sel, "config:19-21"); 1466DEFINE_UNCORE_FORMAT_ATTR(set_flag_sel, set_flag_sel, "config:19-21");
1443DEFINE_UNCORE_FORMAT_ATTR(filter_cfg, filter_cfg, "config2:63"); 1467DEFINE_UNCORE_FORMAT_ATTR(filter_cfg_en, filter_cfg_en, "config2:63");
1444DEFINE_UNCORE_FORMAT_ATTR(filter_match, filter_match, "config2:0-33"); 1468DEFINE_UNCORE_FORMAT_ATTR(filter_match, filter_match, "config2:0-33");
1445DEFINE_UNCORE_FORMAT_ATTR(filter_mask, filter_mask, "config2:34-61"); 1469DEFINE_UNCORE_FORMAT_ATTR(filter_mask, filter_mask, "config2:34-61");
1446DEFINE_UNCORE_FORMAT_ATTR(dsp, dsp, "config1:0-31"); 1470DEFINE_UNCORE_FORMAT_ATTR(dsp, dsp, "config1:0-31");
1447DEFINE_UNCORE_FORMAT_ATTR(thr, thr, "config1:0-31"); 1471DEFINE_UNCORE_FORMAT_ATTR(thr, thr, "config1:0-31");
1448DEFINE_UNCORE_FORMAT_ATTR(fvc, fvc, "config1:0-31"); 1472DEFINE_UNCORE_FORMAT_ATTR(fvc, fvc, "config1:0-31");
1449DEFINE_UNCORE_FORMAT_ATTR(pgt, pgt, "config1:0-31"); 1473DEFINE_UNCORE_FORMAT_ATTR(pgt, pgt, "config1:0-31");
1450DEFINE_UNCORE_FORMAT_ATTR(map, map, "config1:0-31"); 1474DEFINE_UNCORE_FORMAT_ATTR(map, map, "config1:0-31");
1451DEFINE_UNCORE_FORMAT_ATTR(iss, iss, "config1:0-31"); 1475DEFINE_UNCORE_FORMAT_ATTR(iss, iss, "config1:0-31");
1452DEFINE_UNCORE_FORMAT_ATTR(pld, pld, "config1:32-63"); 1476DEFINE_UNCORE_FORMAT_ATTR(pld, pld, "config1:32-63");
1453 1477
1454static struct attribute *nhmex_uncore_mbox_formats_attr[] = { 1478static struct attribute *nhmex_uncore_mbox_formats_attr[] = {
1455 &format_attr_count_mode.attr, 1479 &format_attr_count_mode.attr,
@@ -1458,7 +1482,7 @@ static struct attribute *nhmex_uncore_mbox_formats_attr[] = {
1458 &format_attr_flag_mode.attr, 1482 &format_attr_flag_mode.attr,
1459 &format_attr_inc_sel.attr, 1483 &format_attr_inc_sel.attr,
1460 &format_attr_set_flag_sel.attr, 1484 &format_attr_set_flag_sel.attr,
1461 &format_attr_filter_cfg.attr, 1485 &format_attr_filter_cfg_en.attr,
1462 &format_attr_filter_match.attr, 1486 &format_attr_filter_match.attr,
1463 &format_attr_filter_mask.attr, 1487 &format_attr_filter_mask.attr,
1464 &format_attr_dsp.attr, 1488 &format_attr_dsp.attr,
@@ -1482,6 +1506,12 @@ static struct uncore_event_desc nhmex_uncore_mbox_events[] = {
1482 { /* end: all zeroes */ }, 1506 { /* end: all zeroes */ },
1483}; 1507};
1484 1508
1509static struct uncore_event_desc wsmex_uncore_mbox_events[] = {
1510 INTEL_UNCORE_EVENT_DESC(bbox_cmds_read, "inc_sel=0xd,fvc=0x5000"),
1511 INTEL_UNCORE_EVENT_DESC(bbox_cmds_write, "inc_sel=0xd,fvc=0x5040"),
1512 { /* end: all zeroes */ },
1513};
1514
1485static struct intel_uncore_ops nhmex_uncore_mbox_ops = { 1515static struct intel_uncore_ops nhmex_uncore_mbox_ops = {
1486 NHMEX_UNCORE_OPS_COMMON_INIT(), 1516 NHMEX_UNCORE_OPS_COMMON_INIT(),
1487 .enable_event = nhmex_mbox_msr_enable_event, 1517 .enable_event = nhmex_mbox_msr_enable_event,
@@ -1513,7 +1543,7 @@ void nhmex_rbox_alter_er(struct intel_uncore_box *box, struct perf_event *event)
1513 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; 1543 struct hw_perf_event_extra *reg1 = &hwc->extra_reg;
1514 int port; 1544 int port;
1515 1545
1516 /* adjust the main event selector */ 1546 /* adjust the main event selector and extra register index */
1517 if (reg1->idx % 2) { 1547 if (reg1->idx % 2) {
1518 reg1->idx--; 1548 reg1->idx--;
1519 hwc->config -= 1 << NHMEX_R_PMON_CTL_EV_SEL_SHIFT; 1549 hwc->config -= 1 << NHMEX_R_PMON_CTL_EV_SEL_SHIFT;
@@ -1522,29 +1552,17 @@ void nhmex_rbox_alter_er(struct intel_uncore_box *box, struct perf_event *event)
1522 hwc->config += 1 << NHMEX_R_PMON_CTL_EV_SEL_SHIFT; 1552 hwc->config += 1 << NHMEX_R_PMON_CTL_EV_SEL_SHIFT;
1523 } 1553 }
1524 1554
1525 /* adjust address or config of extra register */ 1555 /* adjust extra register config */
1526 port = reg1->idx / 6 + box->pmu->pmu_idx * 4; 1556 port = reg1->idx / 6 + box->pmu->pmu_idx * 4;
1527 switch (reg1->idx % 6) { 1557 switch (reg1->idx % 6) {
1528 case 0:
1529 reg1->reg = NHMEX_R_MSR_PORTN_IPERF_CFG0(port);
1530 break;
1531 case 1:
1532 reg1->reg = NHMEX_R_MSR_PORTN_IPERF_CFG1(port);
1533 break;
1534 case 2: 1558 case 2:
1535 /* the 8~15 bits to the 0~7 bits */ 1559 /* shift the 8~15 bits to the 0~7 bits */
1536 reg1->config >>= 8; 1560 reg1->config >>= 8;
1537 break; 1561 break;
1538 case 3: 1562 case 3:
1539 /* the 0~7 bits to the 8~15 bits */ 1563 /* shift the 0~7 bits to the 8~15 bits */
1540 reg1->config <<= 8; 1564 reg1->config <<= 8;
1541 break; 1565 break;
1542 case 4:
1543 reg1->reg = NHMEX_R_MSR_PORTN_XBR_SET1_MM_CFG(port);
1544 break;
1545 case 5:
1546 reg1->reg = NHMEX_R_MSR_PORTN_XBR_SET2_MM_CFG(port);
1547 break;
1548 }; 1566 };
1549} 1567}
1550 1568
@@ -1671,7 +1689,7 @@ static int nhmex_rbox_hw_config(struct intel_uncore_box *box, struct perf_event
1671 struct hw_perf_event *hwc = &event->hw; 1689 struct hw_perf_event *hwc = &event->hw;
1672 struct hw_perf_event_extra *reg1 = &event->hw.extra_reg; 1690 struct hw_perf_event_extra *reg1 = &event->hw.extra_reg;
1673 struct hw_perf_event_extra *reg2 = &event->hw.branch_reg; 1691 struct hw_perf_event_extra *reg2 = &event->hw.branch_reg;
1674 int port, idx; 1692 int idx;
1675 1693
1676 idx = (event->hw.config & NHMEX_R_PMON_CTL_EV_SEL_MASK) >> 1694 idx = (event->hw.config & NHMEX_R_PMON_CTL_EV_SEL_MASK) >>
1677 NHMEX_R_PMON_CTL_EV_SEL_SHIFT; 1695 NHMEX_R_PMON_CTL_EV_SEL_SHIFT;
@@ -1681,27 +1699,11 @@ static int nhmex_rbox_hw_config(struct intel_uncore_box *box, struct perf_event
1681 reg1->idx = idx; 1699 reg1->idx = idx;
1682 reg1->config = event->attr.config1; 1700 reg1->config = event->attr.config1;
1683 1701
1684 port = idx / 6 + box->pmu->pmu_idx * 4; 1702 switch (idx % 6) {
1685 idx %= 6;
1686 switch (idx) {
1687 case 0:
1688 reg1->reg = NHMEX_R_MSR_PORTN_IPERF_CFG0(port);
1689 break;
1690 case 1:
1691 reg1->reg = NHMEX_R_MSR_PORTN_IPERF_CFG1(port);
1692 break;
1693 case 2:
1694 case 3:
1695 reg1->reg = NHMEX_R_MSR_PORTN_QLX_CFG(port);
1696 break;
1697 case 4: 1703 case 4:
1698 case 5: 1704 case 5:
1699 if (idx == 4)
1700 reg1->reg = NHMEX_R_MSR_PORTN_XBR_SET1_MM_CFG(port);
1701 else
1702 reg1->reg = NHMEX_R_MSR_PORTN_XBR_SET2_MM_CFG(port);
1703 reg2->config = event->attr.config2;
1704 hwc->config |= event->attr.config & (~0ULL << 32); 1705 hwc->config |= event->attr.config & (~0ULL << 32);
1706 reg2->config = event->attr.config2;
1705 break; 1707 break;
1706 }; 1708 };
1707 return 0; 1709 return 0;
@@ -1727,28 +1729,34 @@ static void nhmex_rbox_msr_enable_event(struct intel_uncore_box *box, struct per
1727 struct hw_perf_event *hwc = &event->hw; 1729 struct hw_perf_event *hwc = &event->hw;
1728 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; 1730 struct hw_perf_event_extra *reg1 = &hwc->extra_reg;
1729 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; 1731 struct hw_perf_event_extra *reg2 = &hwc->branch_reg;
1730 int idx, er_idx; 1732 int idx, port;
1731 1733
1732 idx = reg1->idx % 6; 1734 idx = reg1->idx;
1733 er_idx = idx; 1735 port = idx / 6 + box->pmu->pmu_idx * 4;
1734 if (er_idx > 2)
1735 er_idx--;
1736 er_idx += (reg1->idx / 6) * 5;
1737 1736
1738 switch (idx) { 1737 switch (idx % 6) {
1739 case 0: 1738 case 0:
1739 wrmsrl(NHMEX_R_MSR_PORTN_IPERF_CFG0(port), reg1->config);
1740 break;
1740 case 1: 1741 case 1:
1741 wrmsrl(reg1->reg, reg1->config); 1742 wrmsrl(NHMEX_R_MSR_PORTN_IPERF_CFG1(port), reg1->config);
1742 break; 1743 break;
1743 case 2: 1744 case 2:
1744 case 3: 1745 case 3:
1745 wrmsrl(reg1->reg, nhmex_rbox_shared_reg_config(box, er_idx)); 1746 wrmsrl(NHMEX_R_MSR_PORTN_QLX_CFG(port),
1747 nhmex_rbox_shared_reg_config(box, 2 + (idx / 6) * 5));
1746 break; 1748 break;
1747 case 4: 1749 case 4:
1750 wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET1_MM_CFG(port),
1751 hwc->config >> 32);
1752 wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET1_MATCH(port), reg1->config);
1753 wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET1_MASK(port), reg2->config);
1754 break;
1748 case 5: 1755 case 5:
1749 wrmsrl(reg1->reg, reg1->config); 1756 wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET2_MM_CFG(port),
1750 wrmsrl(reg1->reg + 1, hwc->config >> 32); 1757 hwc->config >> 32);
1751 wrmsrl(reg1->reg + 2, reg2->config); 1758 wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET2_MATCH(port), reg1->config);
1759 wrmsrl(NHMEX_R_MSR_PORTN_XBR_SET2_MASK(port), reg2->config);
1752 break; 1760 break;
1753 }; 1761 };
1754 1762
@@ -1756,8 +1764,8 @@ static void nhmex_rbox_msr_enable_event(struct intel_uncore_box *box, struct per
1756 (hwc->config & NHMEX_R_PMON_CTL_EV_SEL_MASK)); 1764 (hwc->config & NHMEX_R_PMON_CTL_EV_SEL_MASK));
1757} 1765}
1758 1766
1759DEFINE_UNCORE_FORMAT_ATTR(xbr_match, xbr_match, "config:32-63"); 1767DEFINE_UNCORE_FORMAT_ATTR(xbr_mm_cfg, xbr_mm_cfg, "config:32-63");
1760DEFINE_UNCORE_FORMAT_ATTR(xbr_mm_cfg, xbr_mm_cfg, "config1:0-63"); 1768DEFINE_UNCORE_FORMAT_ATTR(xbr_match, xbr_match, "config1:0-63");
1761DEFINE_UNCORE_FORMAT_ATTR(xbr_mask, xbr_mask, "config2:0-63"); 1769DEFINE_UNCORE_FORMAT_ATTR(xbr_mask, xbr_mask, "config2:0-63");
1762DEFINE_UNCORE_FORMAT_ATTR(qlx_cfg, qlx_cfg, "config1:0-15"); 1770DEFINE_UNCORE_FORMAT_ATTR(qlx_cfg, qlx_cfg, "config1:0-15");
1763DEFINE_UNCORE_FORMAT_ATTR(iperf_cfg, iperf_cfg, "config1:0-31"); 1771DEFINE_UNCORE_FORMAT_ATTR(iperf_cfg, iperf_cfg, "config1:0-31");
@@ -2303,6 +2311,7 @@ int uncore_pmu_event_init(struct perf_event *event)
2303 event->hw.idx = -1; 2311 event->hw.idx = -1;
2304 event->hw.last_tag = ~0ULL; 2312 event->hw.last_tag = ~0ULL;
2305 event->hw.extra_reg.idx = EXTRA_REG_NONE; 2313 event->hw.extra_reg.idx = EXTRA_REG_NONE;
2314 event->hw.branch_reg.idx = EXTRA_REG_NONE;
2306 2315
2307 if (event->attr.config == UNCORE_FIXED_EVENT) { 2316 if (event->attr.config == UNCORE_FIXED_EVENT) {
2308 /* no fixed counter */ 2317 /* no fixed counter */
@@ -2373,7 +2382,7 @@ static void __init uncore_type_exit(struct intel_uncore_type *type)
2373 type->attr_groups[1] = NULL; 2382 type->attr_groups[1] = NULL;
2374} 2383}
2375 2384
2376static void uncore_types_exit(struct intel_uncore_type **types) 2385static void __init uncore_types_exit(struct intel_uncore_type **types)
2377{ 2386{
2378 int i; 2387 int i;
2379 for (i = 0; types[i]; i++) 2388 for (i = 0; types[i]; i++)
@@ -2814,7 +2823,13 @@ static int __init uncore_cpu_init(void)
2814 snbep_uncore_cbox.num_boxes = max_cores; 2823 snbep_uncore_cbox.num_boxes = max_cores;
2815 msr_uncores = snbep_msr_uncores; 2824 msr_uncores = snbep_msr_uncores;
2816 break; 2825 break;
2817 case 46: 2826 case 46: /* Nehalem-EX */
2827 uncore_nhmex = true;
2828 case 47: /* Westmere-EX aka. Xeon E7 */
2829 if (!uncore_nhmex)
2830 nhmex_uncore_mbox.event_descs = wsmex_uncore_mbox_events;
2831 if (nhmex_uncore_cbox.num_boxes > max_cores)
2832 nhmex_uncore_cbox.num_boxes = max_cores;
2818 msr_uncores = nhmex_msr_uncores; 2833 msr_uncores = nhmex_msr_uncores;
2819 break; 2834 break;
2820 default: 2835 default:
diff --git a/arch/x86/kernel/cpu/perf_event_intel_uncore.h b/arch/x86/kernel/cpu/perf_event_intel_uncore.h
index f3851892e077..5b81c1856aac 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_uncore.h
+++ b/arch/x86/kernel/cpu/perf_event_intel_uncore.h
@@ -5,7 +5,7 @@
5#include "perf_event.h" 5#include "perf_event.h"
6 6
7#define UNCORE_PMU_NAME_LEN 32 7#define UNCORE_PMU_NAME_LEN 32
8#define UNCORE_PMU_HRTIMER_INTERVAL (60 * NSEC_PER_SEC) 8#define UNCORE_PMU_HRTIMER_INTERVAL (60LL * NSEC_PER_SEC)
9 9
10#define UNCORE_FIXED_EVENT 0xff 10#define UNCORE_FIXED_EVENT 0xff
11#define UNCORE_PMC_IDX_MAX_GENERIC 8 11#define UNCORE_PMC_IDX_MAX_GENERIC 8
@@ -230,6 +230,7 @@
230#define NHMEX_S1_MSR_MASK 0xe5a 230#define NHMEX_S1_MSR_MASK 0xe5a
231 231
232#define NHMEX_S_PMON_MM_CFG_EN (0x1ULL << 63) 232#define NHMEX_S_PMON_MM_CFG_EN (0x1ULL << 63)
233#define NHMEX_S_EVENT_TO_R_PROG_EV 0
233 234
234/* NHM-EX Mbox */ 235/* NHM-EX Mbox */
235#define NHMEX_M0_MSR_GLOBAL_CTL 0xca0 236#define NHMEX_M0_MSR_GLOBAL_CTL 0xca0
@@ -275,18 +276,12 @@
275 NHMEX_M_PMON_CTL_INC_SEL_MASK | \ 276 NHMEX_M_PMON_CTL_INC_SEL_MASK | \
276 NHMEX_M_PMON_CTL_SET_FLAG_SEL_MASK) 277 NHMEX_M_PMON_CTL_SET_FLAG_SEL_MASK)
277 278
278 279#define NHMEX_M_PMON_ZDP_CTL_FVC_MASK (((1 << 11) - 1) | (1 << 23))
279#define NHMEX_M_PMON_ZDP_CTL_FVC_FVID_MASK 0x1f
280#define NHMEX_M_PMON_ZDP_CTL_FVC_BCMD_MASK (0x7 << 5)
281#define NHMEX_M_PMON_ZDP_CTL_FVC_RSP_MASK (0x7 << 8)
282#define NHMEX_M_PMON_ZDP_CTL_FVC_PBOX_INIT_ERR (1 << 23)
283#define NHMEX_M_PMON_ZDP_CTL_FVC_MASK \
284 (NHMEX_M_PMON_ZDP_CTL_FVC_FVID_MASK | \
285 NHMEX_M_PMON_ZDP_CTL_FVC_BCMD_MASK | \
286 NHMEX_M_PMON_ZDP_CTL_FVC_RSP_MASK | \
287 NHMEX_M_PMON_ZDP_CTL_FVC_PBOX_INIT_ERR)
288#define NHMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(n) (0x7 << (11 + 3 * (n))) 280#define NHMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(n) (0x7 << (11 + 3 * (n)))
289 281
282#define WSMEX_M_PMON_ZDP_CTL_FVC_MASK (((1 << 12) - 1) | (1 << 24))
283#define WSMEX_M_PMON_ZDP_CTL_FVC_EVENT_MASK(n) (0x7 << (12 + 3 * (n)))
284
290/* 285/*
291 * use the 9~13 bits to select event If the 7th bit is not set, 286 * use the 9~13 bits to select event If the 7th bit is not set,
292 * otherwise use the 19~21 bits to select event. 287 * otherwise use the 19~21 bits to select event.
@@ -368,6 +363,7 @@ struct intel_uncore_type {
368 unsigned num_shared_regs:8; 363 unsigned num_shared_regs:8;
369 unsigned single_fixed:1; 364 unsigned single_fixed:1;
370 unsigned pair_ctr_ctl:1; 365 unsigned pair_ctr_ctl:1;
366 unsigned *msr_offsets;
371 struct event_constraint unconstrainted; 367 struct event_constraint unconstrainted;
372 struct event_constraint *constraints; 368 struct event_constraint *constraints;
373 struct intel_uncore_pmu *pmus; 369 struct intel_uncore_pmu *pmus;
@@ -485,29 +481,31 @@ unsigned uncore_pci_perf_ctr(struct intel_uncore_box *box, int idx)
485 return idx * 8 + box->pmu->type->perf_ctr; 481 return idx * 8 + box->pmu->type->perf_ctr;
486} 482}
487 483
488static inline 484static inline unsigned uncore_msr_box_offset(struct intel_uncore_box *box)
489unsigned uncore_msr_box_ctl(struct intel_uncore_box *box) 485{
486 struct intel_uncore_pmu *pmu = box->pmu;
487 return pmu->type->msr_offsets ?
488 pmu->type->msr_offsets[pmu->pmu_idx] :
489 pmu->type->msr_offset * pmu->pmu_idx;
490}
491
492static inline unsigned uncore_msr_box_ctl(struct intel_uncore_box *box)
490{ 493{
491 if (!box->pmu->type->box_ctl) 494 if (!box->pmu->type->box_ctl)
492 return 0; 495 return 0;
493 return box->pmu->type->box_ctl + 496 return box->pmu->type->box_ctl + uncore_msr_box_offset(box);
494 box->pmu->type->msr_offset * box->pmu->pmu_idx;
495} 497}
496 498
497static inline 499static inline unsigned uncore_msr_fixed_ctl(struct intel_uncore_box *box)
498unsigned uncore_msr_fixed_ctl(struct intel_uncore_box *box)
499{ 500{
500 if (!box->pmu->type->fixed_ctl) 501 if (!box->pmu->type->fixed_ctl)
501 return 0; 502 return 0;
502 return box->pmu->type->fixed_ctl + 503 return box->pmu->type->fixed_ctl + uncore_msr_box_offset(box);
503 box->pmu->type->msr_offset * box->pmu->pmu_idx;
504} 504}
505 505
506static inline 506static inline unsigned uncore_msr_fixed_ctr(struct intel_uncore_box *box)
507unsigned uncore_msr_fixed_ctr(struct intel_uncore_box *box)
508{ 507{
509 return box->pmu->type->fixed_ctr + 508 return box->pmu->type->fixed_ctr + uncore_msr_box_offset(box);
510 box->pmu->type->msr_offset * box->pmu->pmu_idx;
511} 509}
512 510
513static inline 511static inline
@@ -515,7 +513,7 @@ unsigned uncore_msr_event_ctl(struct intel_uncore_box *box, int idx)
515{ 513{
516 return box->pmu->type->event_ctl + 514 return box->pmu->type->event_ctl +
517 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) + 515 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) +
518 box->pmu->type->msr_offset * box->pmu->pmu_idx; 516 uncore_msr_box_offset(box);
519} 517}
520 518
521static inline 519static inline
@@ -523,7 +521,7 @@ unsigned uncore_msr_perf_ctr(struct intel_uncore_box *box, int idx)
523{ 521{
524 return box->pmu->type->perf_ctr + 522 return box->pmu->type->perf_ctr +
525 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) + 523 (box->pmu->type->pair_ctr_ctl ? 2 * idx : idx) +
526 box->pmu->type->msr_offset * box->pmu->pmu_idx; 524 uncore_msr_box_offset(box);
527} 525}
528 526
529static inline 527static inline
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 1f5f1d5d2a02..7ad683d78645 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -328,6 +328,7 @@ void fixup_irqs(void)
328 chip->irq_retrigger(data); 328 chip->irq_retrigger(data);
329 raw_spin_unlock(&desc->lock); 329 raw_spin_unlock(&desc->lock);
330 } 330 }
331 __this_cpu_write(vector_irq[vector], -1);
331 } 332 }
332} 333}
333#endif 334#endif
diff --git a/arch/x86/kernel/kdebugfs.c b/arch/x86/kernel/kdebugfs.c
index 1d5d31ea686b..dc1404bf8e4b 100644
--- a/arch/x86/kernel/kdebugfs.c
+++ b/arch/x86/kernel/kdebugfs.c
@@ -107,7 +107,7 @@ static int __init create_setup_data_nodes(struct dentry *parent)
107{ 107{
108 struct setup_data_node *node; 108 struct setup_data_node *node;
109 struct setup_data *data; 109 struct setup_data *data;
110 int error = -ENOMEM; 110 int error;
111 struct dentry *d; 111 struct dentry *d;
112 struct page *pg; 112 struct page *pg;
113 u64 pa_data; 113 u64 pa_data;
@@ -121,8 +121,10 @@ static int __init create_setup_data_nodes(struct dentry *parent)
121 121
122 while (pa_data) { 122 while (pa_data) {
123 node = kmalloc(sizeof(*node), GFP_KERNEL); 123 node = kmalloc(sizeof(*node), GFP_KERNEL);
124 if (!node) 124 if (!node) {
125 error = -ENOMEM;
125 goto err_dir; 126 goto err_dir;
127 }
126 128
127 pg = pfn_to_page((pa_data+sizeof(*data)-1) >> PAGE_SHIFT); 129 pg = pfn_to_page((pa_data+sizeof(*data)-1) >> PAGE_SHIFT);
128 if (PageHighMem(pg)) { 130 if (PageHighMem(pg)) {
diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c
index 1df8fb9e1d5d..e498b18f010c 100644
--- a/arch/x86/kvm/i8259.c
+++ b/arch/x86/kvm/i8259.c
@@ -316,6 +316,11 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val)
316 addr &= 1; 316 addr &= 1;
317 if (addr == 0) { 317 if (addr == 0) {
318 if (val & 0x10) { 318 if (val & 0x10) {
319 u8 edge_irr = s->irr & ~s->elcr;
320 int i;
321 bool found;
322 struct kvm_vcpu *vcpu;
323
319 s->init4 = val & 1; 324 s->init4 = val & 1;
320 s->last_irr = 0; 325 s->last_irr = 0;
321 s->irr &= s->elcr; 326 s->irr &= s->elcr;
@@ -333,6 +338,18 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val)
333 if (val & 0x08) 338 if (val & 0x08)
334 pr_pic_unimpl( 339 pr_pic_unimpl(
335 "level sensitive irq not supported"); 340 "level sensitive irq not supported");
341
342 kvm_for_each_vcpu(i, vcpu, s->pics_state->kvm)
343 if (kvm_apic_accept_pic_intr(vcpu)) {
344 found = true;
345 break;
346 }
347
348
349 if (found)
350 for (irq = 0; irq < PIC_NUM_PINS/2; irq++)
351 if (edge_irr & (1 << irq))
352 pic_clear_isr(s, irq);
336 } else if (val & 0x08) { 353 } else if (val & 0x08) {
337 if (val & 0x04) 354 if (val & 0x04)
338 s->poll = 1; 355 s->poll = 1;
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index c39b60707e02..c00f03de1b79 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -1488,13 +1488,6 @@ static void __vmx_load_host_state(struct vcpu_vmx *vmx)
1488 loadsegment(ds, vmx->host_state.ds_sel); 1488 loadsegment(ds, vmx->host_state.ds_sel);
1489 loadsegment(es, vmx->host_state.es_sel); 1489 loadsegment(es, vmx->host_state.es_sel);
1490 } 1490 }
1491#else
1492 /*
1493 * The sysexit path does not restore ds/es, so we must set them to
1494 * a reasonable value ourselves.
1495 */
1496 loadsegment(ds, __USER_DS);
1497 loadsegment(es, __USER_DS);
1498#endif 1491#endif
1499 reload_tss(); 1492 reload_tss();
1500#ifdef CONFIG_X86_64 1493#ifdef CONFIG_X86_64
@@ -6370,6 +6363,19 @@ static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu)
6370#endif 6363#endif
6371 ); 6364 );
6372 6365
6366#ifndef CONFIG_X86_64
6367 /*
6368 * The sysexit path does not restore ds/es, so we must set them to
6369 * a reasonable value ourselves.
6370 *
6371 * We can't defer this to vmx_load_host_state() since that function
6372 * may be executed in interrupt context, which saves and restore segments
6373 * around it, nullifying its effect.
6374 */
6375 loadsegment(ds, __USER_DS);
6376 loadsegment(es, __USER_DS);
6377#endif
6378
6373 vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP) 6379 vcpu->arch.regs_avail = ~((1 << VCPU_REGS_RIP) | (1 << VCPU_REGS_RSP)
6374 | (1 << VCPU_EXREG_RFLAGS) 6380 | (1 << VCPU_EXREG_RFLAGS)
6375 | (1 << VCPU_EXREG_CPL) 6381 | (1 << VCPU_EXREG_CPL)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 59b59508ff07..42bce48f6928 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -925,6 +925,10 @@ static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
925 */ 925 */
926 getboottime(&boot); 926 getboottime(&boot);
927 927
928 if (kvm->arch.kvmclock_offset) {
929 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
930 boot = timespec_sub(boot, ts);
931 }
928 wc.sec = boot.tv_sec; 932 wc.sec = boot.tv_sec;
929 wc.nsec = boot.tv_nsec; 933 wc.nsec = boot.tv_nsec;
930 wc.version = version; 934 wc.version = version;
diff --git a/arch/x86/mm/hugetlbpage.c b/arch/x86/mm/hugetlbpage.c
index f6679a7fb8ca..b91e48512425 100644
--- a/arch/x86/mm/hugetlbpage.c
+++ b/arch/x86/mm/hugetlbpage.c
@@ -56,9 +56,16 @@ static int vma_shareable(struct vm_area_struct *vma, unsigned long addr)
56} 56}
57 57
58/* 58/*
59 * search for a shareable pmd page for hugetlb. 59 * Search for a shareable pmd page for hugetlb. In any case calls pmd_alloc()
60 * and returns the corresponding pte. While this is not necessary for the
61 * !shared pmd case because we can allocate the pmd later as well, it makes the
62 * code much cleaner. pmd allocation is essential for the shared case because
63 * pud has to be populated inside the same i_mmap_mutex section - otherwise
64 * racing tasks could either miss the sharing (see huge_pte_offset) or select a
65 * bad pmd for sharing.
60 */ 66 */
61static void huge_pmd_share(struct mm_struct *mm, unsigned long addr, pud_t *pud) 67static pte_t *
68huge_pmd_share(struct mm_struct *mm, unsigned long addr, pud_t *pud)
62{ 69{
63 struct vm_area_struct *vma = find_vma(mm, addr); 70 struct vm_area_struct *vma = find_vma(mm, addr);
64 struct address_space *mapping = vma->vm_file->f_mapping; 71 struct address_space *mapping = vma->vm_file->f_mapping;
@@ -68,9 +75,10 @@ static void huge_pmd_share(struct mm_struct *mm, unsigned long addr, pud_t *pud)
68 struct vm_area_struct *svma; 75 struct vm_area_struct *svma;
69 unsigned long saddr; 76 unsigned long saddr;
70 pte_t *spte = NULL; 77 pte_t *spte = NULL;
78 pte_t *pte;
71 79
72 if (!vma_shareable(vma, addr)) 80 if (!vma_shareable(vma, addr))
73 return; 81 return (pte_t *)pmd_alloc(mm, pud, addr);
74 82
75 mutex_lock(&mapping->i_mmap_mutex); 83 mutex_lock(&mapping->i_mmap_mutex);
76 vma_prio_tree_foreach(svma, &iter, &mapping->i_mmap, idx, idx) { 84 vma_prio_tree_foreach(svma, &iter, &mapping->i_mmap, idx, idx) {
@@ -97,7 +105,9 @@ static void huge_pmd_share(struct mm_struct *mm, unsigned long addr, pud_t *pud)
97 put_page(virt_to_page(spte)); 105 put_page(virt_to_page(spte));
98 spin_unlock(&mm->page_table_lock); 106 spin_unlock(&mm->page_table_lock);
99out: 107out:
108 pte = (pte_t *)pmd_alloc(mm, pud, addr);
100 mutex_unlock(&mapping->i_mmap_mutex); 109 mutex_unlock(&mapping->i_mmap_mutex);
110 return pte;
101} 111}
102 112
103/* 113/*
@@ -142,8 +152,9 @@ pte_t *huge_pte_alloc(struct mm_struct *mm,
142 } else { 152 } else {
143 BUG_ON(sz != PMD_SIZE); 153 BUG_ON(sz != PMD_SIZE);
144 if (pud_none(*pud)) 154 if (pud_none(*pud))
145 huge_pmd_share(mm, addr, pud); 155 pte = huge_pmd_share(mm, addr, pud);
146 pte = (pte_t *) pmd_alloc(mm, pud, addr); 156 else
157 pte = (pte_t *)pmd_alloc(mm, pud, addr);
147 } 158 }
148 } 159 }
149 BUG_ON(pte && !pte_none(*pte) && !pte_huge(*pte)); 160 BUG_ON(pte && !pte_none(*pte) && !pte_huge(*pte));
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index 931930a96160..a718e0d23503 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -919,13 +919,11 @@ static int change_page_attr_set_clr(unsigned long *addr, int numpages,
919 919
920 /* 920 /*
921 * On success we use clflush, when the CPU supports it to 921 * On success we use clflush, when the CPU supports it to
922 * avoid the wbindv. If the CPU does not support it, in the 922 * avoid the wbindv. If the CPU does not support it and in the
923 * error case, and during early boot (for EFI) we fall back 923 * error case we fall back to cpa_flush_all (which uses
924 * to cpa_flush_all (which uses wbinvd): 924 * wbindv):
925 */ 925 */
926 if (early_boot_irqs_disabled) 926 if (!ret && cpu_has_clflush) {
927 __cpa_flush_all((void *)(long)cache);
928 else if (!ret && cpu_has_clflush) {
929 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) { 927 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
930 cpa_flush_array(addr, numpages, cache, 928 cpa_flush_array(addr, numpages, cache,
931 cpa.flags, pages); 929 cpa.flags, pages);
diff --git a/arch/x86/mm/srat.c b/arch/x86/mm/srat.c
index 4599c3e8bcb6..4ddf497ca65b 100644
--- a/arch/x86/mm/srat.c
+++ b/arch/x86/mm/srat.c
@@ -142,23 +142,23 @@ static inline int save_add_info(void) {return 0;}
142#endif 142#endif
143 143
144/* Callback for parsing of the Proximity Domain <-> Memory Area mappings */ 144/* Callback for parsing of the Proximity Domain <-> Memory Area mappings */
145void __init 145int __init
146acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma) 146acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
147{ 147{
148 u64 start, end; 148 u64 start, end;
149 int node, pxm; 149 int node, pxm;
150 150
151 if (srat_disabled()) 151 if (srat_disabled())
152 return; 152 return -1;
153 if (ma->header.length != sizeof(struct acpi_srat_mem_affinity)) { 153 if (ma->header.length != sizeof(struct acpi_srat_mem_affinity)) {
154 bad_srat(); 154 bad_srat();
155 return; 155 return -1;
156 } 156 }
157 if ((ma->flags & ACPI_SRAT_MEM_ENABLED) == 0) 157 if ((ma->flags & ACPI_SRAT_MEM_ENABLED) == 0)
158 return; 158 return -1;
159 159
160 if ((ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE) && !save_add_info()) 160 if ((ma->flags & ACPI_SRAT_MEM_HOT_PLUGGABLE) && !save_add_info())
161 return; 161 return -1;
162 start = ma->base_address; 162 start = ma->base_address;
163 end = start + ma->length; 163 end = start + ma->length;
164 pxm = ma->proximity_domain; 164 pxm = ma->proximity_domain;
@@ -168,12 +168,12 @@ acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
168 if (node < 0) { 168 if (node < 0) {
169 printk(KERN_ERR "SRAT: Too many proximity domains.\n"); 169 printk(KERN_ERR "SRAT: Too many proximity domains.\n");
170 bad_srat(); 170 bad_srat();
171 return; 171 return -1;
172 } 172 }
173 173
174 if (numa_add_memblk(node, start, end) < 0) { 174 if (numa_add_memblk(node, start, end) < 0) {
175 bad_srat(); 175 bad_srat();
176 return; 176 return -1;
177 } 177 }
178 178
179 node_set(node, numa_nodes_parsed); 179 node_set(node, numa_nodes_parsed);
@@ -181,6 +181,7 @@ acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
181 printk(KERN_INFO "SRAT: Node %u PXM %u [mem %#010Lx-%#010Lx]\n", 181 printk(KERN_INFO "SRAT: Node %u PXM %u [mem %#010Lx-%#010Lx]\n",
182 node, pxm, 182 node, pxm,
183 (unsigned long long) start, (unsigned long long) end - 1); 183 (unsigned long long) start, (unsigned long long) end - 1);
184 return 0;
184} 185}
185 186
186void __init acpi_numa_arch_fixup(void) {} 187void __init acpi_numa_arch_fixup(void) {}
diff --git a/arch/x86/platform/efi/efi.c b/arch/x86/platform/efi/efi.c
index 2dc29f51e75a..92660edaa1e7 100644
--- a/arch/x86/platform/efi/efi.c
+++ b/arch/x86/platform/efi/efi.c
@@ -234,7 +234,22 @@ static efi_status_t __init phys_efi_set_virtual_address_map(
234 return status; 234 return status;
235} 235}
236 236
237static int efi_set_rtc_mmss(unsigned long nowtime) 237static efi_status_t __init phys_efi_get_time(efi_time_t *tm,
238 efi_time_cap_t *tc)
239{
240 unsigned long flags;
241 efi_status_t status;
242
243 spin_lock_irqsave(&rtc_lock, flags);
244 efi_call_phys_prelog();
245 status = efi_call_phys2(efi_phys.get_time, virt_to_phys(tm),
246 virt_to_phys(tc));
247 efi_call_phys_epilog();
248 spin_unlock_irqrestore(&rtc_lock, flags);
249 return status;
250}
251
252int efi_set_rtc_mmss(unsigned long nowtime)
238{ 253{
239 int real_seconds, real_minutes; 254 int real_seconds, real_minutes;
240 efi_status_t status; 255 efi_status_t status;
@@ -263,7 +278,7 @@ static int efi_set_rtc_mmss(unsigned long nowtime)
263 return 0; 278 return 0;
264} 279}
265 280
266static unsigned long efi_get_time(void) 281unsigned long efi_get_time(void)
267{ 282{
268 efi_status_t status; 283 efi_status_t status;
269 efi_time_t eft; 284 efi_time_t eft;
@@ -606,13 +621,18 @@ static int __init efi_runtime_init(void)
606 } 621 }
607 /* 622 /*
608 * We will only need *early* access to the following 623 * We will only need *early* access to the following
609 * EFI runtime service before set_virtual_address_map 624 * two EFI runtime services before set_virtual_address_map
610 * is invoked. 625 * is invoked.
611 */ 626 */
627 efi_phys.get_time = (efi_get_time_t *)runtime->get_time;
612 efi_phys.set_virtual_address_map = 628 efi_phys.set_virtual_address_map =
613 (efi_set_virtual_address_map_t *) 629 (efi_set_virtual_address_map_t *)
614 runtime->set_virtual_address_map; 630 runtime->set_virtual_address_map;
615 631 /*
632 * Make efi_get_time can be called before entering
633 * virtual mode.
634 */
635 efi.get_time = phys_efi_get_time;
616 early_iounmap(runtime, sizeof(efi_runtime_services_t)); 636 early_iounmap(runtime, sizeof(efi_runtime_services_t));
617 637
618 return 0; 638 return 0;
@@ -700,10 +720,12 @@ void __init efi_init(void)
700 efi_enabled = 0; 720 efi_enabled = 0;
701 return; 721 return;
702 } 722 }
723#ifdef CONFIG_X86_32
703 if (efi_native) { 724 if (efi_native) {
704 x86_platform.get_wallclock = efi_get_time; 725 x86_platform.get_wallclock = efi_get_time;
705 x86_platform.set_wallclock = efi_set_rtc_mmss; 726 x86_platform.set_wallclock = efi_set_rtc_mmss;
706 } 727 }
728#endif
707 729
708#if EFI_DEBUG 730#if EFI_DEBUG
709 print_efi_memmap(); 731 print_efi_memmap();
diff --git a/arch/x86/platform/olpc/olpc-xo1-pm.c b/arch/x86/platform/olpc/olpc-xo1-pm.c
index 0ce8616c88ae..d75582d1aa55 100644
--- a/arch/x86/platform/olpc/olpc-xo1-pm.c
+++ b/arch/x86/platform/olpc/olpc-xo1-pm.c
@@ -18,6 +18,7 @@
18#include <linux/pm.h> 18#include <linux/pm.h>
19#include <linux/mfd/core.h> 19#include <linux/mfd/core.h>
20#include <linux/suspend.h> 20#include <linux/suspend.h>
21#include <linux/olpc-ec.h>
21 22
22#include <asm/io.h> 23#include <asm/io.h>
23#include <asm/olpc.h> 24#include <asm/olpc.h>
@@ -51,16 +52,11 @@ EXPORT_SYMBOL_GPL(olpc_xo1_pm_wakeup_clear);
51static int xo1_power_state_enter(suspend_state_t pm_state) 52static int xo1_power_state_enter(suspend_state_t pm_state)
52{ 53{
53 unsigned long saved_sci_mask; 54 unsigned long saved_sci_mask;
54 int r;
55 55
56 /* Only STR is supported */ 56 /* Only STR is supported */
57 if (pm_state != PM_SUSPEND_MEM) 57 if (pm_state != PM_SUSPEND_MEM)
58 return -EINVAL; 58 return -EINVAL;
59 59
60 r = olpc_ec_cmd(EC_SET_SCI_INHIBIT, NULL, 0, NULL, 0);
61 if (r)
62 return r;
63
64 /* 60 /*
65 * Save SCI mask (this gets lost since PM1_EN is used as a mask for 61 * Save SCI mask (this gets lost since PM1_EN is used as a mask for
66 * wakeup events, which is not necessarily the same event set) 62 * wakeup events, which is not necessarily the same event set)
@@ -76,16 +72,6 @@ static int xo1_power_state_enter(suspend_state_t pm_state)
76 /* Restore SCI mask (using dword access to CS5536_PM1_EN) */ 72 /* Restore SCI mask (using dword access to CS5536_PM1_EN) */
77 outl(saved_sci_mask, acpi_base + CS5536_PM1_STS); 73 outl(saved_sci_mask, acpi_base + CS5536_PM1_STS);
78 74
79 /* Tell the EC to stop inhibiting SCIs */
80 olpc_ec_cmd(EC_SET_SCI_INHIBIT_RELEASE, NULL, 0, NULL, 0);
81
82 /*
83 * Tell the wireless module to restart USB communication.
84 * Must be done twice.
85 */
86 olpc_ec_cmd(EC_WAKE_UP_WLAN, NULL, 0, NULL, 0);
87 olpc_ec_cmd(EC_WAKE_UP_WLAN, NULL, 0, NULL, 0);
88
89 return 0; 75 return 0;
90} 76}
91 77
diff --git a/arch/x86/platform/olpc/olpc-xo1-sci.c b/arch/x86/platform/olpc/olpc-xo1-sci.c
index 04b8c73659c5..63d4aa40956e 100644
--- a/arch/x86/platform/olpc/olpc-xo1-sci.c
+++ b/arch/x86/platform/olpc/olpc-xo1-sci.c
@@ -23,6 +23,7 @@
23#include <linux/power_supply.h> 23#include <linux/power_supply.h>
24#include <linux/suspend.h> 24#include <linux/suspend.h>
25#include <linux/workqueue.h> 25#include <linux/workqueue.h>
26#include <linux/olpc-ec.h>
26 27
27#include <asm/io.h> 28#include <asm/io.h>
28#include <asm/msr.h> 29#include <asm/msr.h>
diff --git a/arch/x86/platform/olpc/olpc-xo15-sci.c b/arch/x86/platform/olpc/olpc-xo15-sci.c
index 599be499fdf7..2fdca25905ae 100644
--- a/arch/x86/platform/olpc/olpc-xo15-sci.c
+++ b/arch/x86/platform/olpc/olpc-xo15-sci.c
@@ -13,6 +13,7 @@
13#include <linux/slab.h> 13#include <linux/slab.h>
14#include <linux/workqueue.h> 14#include <linux/workqueue.h>
15#include <linux/power_supply.h> 15#include <linux/power_supply.h>
16#include <linux/olpc-ec.h>
16 17
17#include <acpi/acpi_bus.h> 18#include <acpi/acpi_bus.h>
18#include <acpi/acpi_drivers.h> 19#include <acpi/acpi_drivers.h>
diff --git a/arch/x86/platform/olpc/olpc.c b/arch/x86/platform/olpc/olpc.c
index a4bee53c2e54..27376081ddec 100644
--- a/arch/x86/platform/olpc/olpc.c
+++ b/arch/x86/platform/olpc/olpc.c
@@ -14,14 +14,13 @@
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/delay.h> 16#include <linux/delay.h>
17#include <linux/spinlock.h>
18#include <linux/io.h> 17#include <linux/io.h>
19#include <linux/string.h> 18#include <linux/string.h>
20#include <linux/platform_device.h> 19#include <linux/platform_device.h>
21#include <linux/of.h> 20#include <linux/of.h>
22#include <linux/syscore_ops.h> 21#include <linux/syscore_ops.h>
23#include <linux/debugfs.h>
24#include <linux/mutex.h> 22#include <linux/mutex.h>
23#include <linux/olpc-ec.h>
25 24
26#include <asm/geode.h> 25#include <asm/geode.h>
27#include <asm/setup.h> 26#include <asm/setup.h>
@@ -31,17 +30,6 @@
31struct olpc_platform_t olpc_platform_info; 30struct olpc_platform_t olpc_platform_info;
32EXPORT_SYMBOL_GPL(olpc_platform_info); 31EXPORT_SYMBOL_GPL(olpc_platform_info);
33 32
34static DEFINE_SPINLOCK(ec_lock);
35
36/* debugfs interface to EC commands */
37#define EC_MAX_CMD_ARGS (5 + 1) /* cmd byte + 5 args */
38#define EC_MAX_CMD_REPLY (8)
39
40static struct dentry *ec_debugfs_dir;
41static DEFINE_MUTEX(ec_debugfs_cmd_lock);
42static unsigned char ec_debugfs_resp[EC_MAX_CMD_REPLY];
43static unsigned int ec_debugfs_resp_bytes;
44
45/* EC event mask to be applied during suspend (defining wakeup sources). */ 33/* EC event mask to be applied during suspend (defining wakeup sources). */
46static u16 ec_wakeup_mask; 34static u16 ec_wakeup_mask;
47 35
@@ -125,16 +113,13 @@ static int __wait_on_obf(unsigned int line, unsigned int port, int desired)
125 * <http://wiki.laptop.org/go/Ec_specification>. Unfortunately, while 113 * <http://wiki.laptop.org/go/Ec_specification>. Unfortunately, while
126 * OpenFirmware's source is available, the EC's is not. 114 * OpenFirmware's source is available, the EC's is not.
127 */ 115 */
128int olpc_ec_cmd(unsigned char cmd, unsigned char *inbuf, size_t inlen, 116static int olpc_xo1_ec_cmd(u8 cmd, u8 *inbuf, size_t inlen, u8 *outbuf,
129 unsigned char *outbuf, size_t outlen) 117 size_t outlen, void *arg)
130{ 118{
131 unsigned long flags;
132 int ret = -EIO; 119 int ret = -EIO;
133 int i; 120 int i;
134 int restarts = 0; 121 int restarts = 0;
135 122
136 spin_lock_irqsave(&ec_lock, flags);
137
138 /* Clear OBF */ 123 /* Clear OBF */
139 for (i = 0; i < 10 && (obf_status(0x6c) == 1); i++) 124 for (i = 0; i < 10 && (obf_status(0x6c) == 1); i++)
140 inb(0x68); 125 inb(0x68);
@@ -198,10 +183,8 @@ restart:
198 183
199 ret = 0; 184 ret = 0;
200err: 185err:
201 spin_unlock_irqrestore(&ec_lock, flags);
202 return ret; 186 return ret;
203} 187}
204EXPORT_SYMBOL_GPL(olpc_ec_cmd);
205 188
206void olpc_ec_wakeup_set(u16 value) 189void olpc_ec_wakeup_set(u16 value)
207{ 190{
@@ -280,96 +263,6 @@ int olpc_ec_sci_query(u16 *sci_value)
280} 263}
281EXPORT_SYMBOL_GPL(olpc_ec_sci_query); 264EXPORT_SYMBOL_GPL(olpc_ec_sci_query);
282 265
283static ssize_t ec_debugfs_cmd_write(struct file *file, const char __user *buf,
284 size_t size, loff_t *ppos)
285{
286 int i, m;
287 unsigned char ec_cmd[EC_MAX_CMD_ARGS];
288 unsigned int ec_cmd_int[EC_MAX_CMD_ARGS];
289 char cmdbuf[64];
290 int ec_cmd_bytes;
291
292 mutex_lock(&ec_debugfs_cmd_lock);
293
294 size = simple_write_to_buffer(cmdbuf, sizeof(cmdbuf), ppos, buf, size);
295
296 m = sscanf(cmdbuf, "%x:%u %x %x %x %x %x", &ec_cmd_int[0],
297 &ec_debugfs_resp_bytes,
298 &ec_cmd_int[1], &ec_cmd_int[2], &ec_cmd_int[3],
299 &ec_cmd_int[4], &ec_cmd_int[5]);
300 if (m < 2 || ec_debugfs_resp_bytes > EC_MAX_CMD_REPLY) {
301 /* reset to prevent overflow on read */
302 ec_debugfs_resp_bytes = 0;
303
304 printk(KERN_DEBUG "olpc-ec: bad ec cmd: "
305 "cmd:response-count [arg1 [arg2 ...]]\n");
306 size = -EINVAL;
307 goto out;
308 }
309
310 /* convert scanf'd ints to char */
311 ec_cmd_bytes = m - 2;
312 for (i = 0; i <= ec_cmd_bytes; i++)
313 ec_cmd[i] = ec_cmd_int[i];
314
315 printk(KERN_DEBUG "olpc-ec: debugfs cmd 0x%02x with %d args "
316 "%02x %02x %02x %02x %02x, want %d returns\n",
317 ec_cmd[0], ec_cmd_bytes, ec_cmd[1], ec_cmd[2], ec_cmd[3],
318 ec_cmd[4], ec_cmd[5], ec_debugfs_resp_bytes);
319
320 olpc_ec_cmd(ec_cmd[0], (ec_cmd_bytes == 0) ? NULL : &ec_cmd[1],
321 ec_cmd_bytes, ec_debugfs_resp, ec_debugfs_resp_bytes);
322
323 printk(KERN_DEBUG "olpc-ec: response "
324 "%02x %02x %02x %02x %02x %02x %02x %02x (%d bytes expected)\n",
325 ec_debugfs_resp[0], ec_debugfs_resp[1], ec_debugfs_resp[2],
326 ec_debugfs_resp[3], ec_debugfs_resp[4], ec_debugfs_resp[5],
327 ec_debugfs_resp[6], ec_debugfs_resp[7], ec_debugfs_resp_bytes);
328
329out:
330 mutex_unlock(&ec_debugfs_cmd_lock);
331 return size;
332}
333
334static ssize_t ec_debugfs_cmd_read(struct file *file, char __user *buf,
335 size_t size, loff_t *ppos)
336{
337 unsigned int i, r;
338 char *rp;
339 char respbuf[64];
340
341 mutex_lock(&ec_debugfs_cmd_lock);
342 rp = respbuf;
343 rp += sprintf(rp, "%02x", ec_debugfs_resp[0]);
344 for (i = 1; i < ec_debugfs_resp_bytes; i++)
345 rp += sprintf(rp, ", %02x", ec_debugfs_resp[i]);
346 mutex_unlock(&ec_debugfs_cmd_lock);
347 rp += sprintf(rp, "\n");
348
349 r = rp - respbuf;
350 return simple_read_from_buffer(buf, size, ppos, respbuf, r);
351}
352
353static const struct file_operations ec_debugfs_genops = {
354 .write = ec_debugfs_cmd_write,
355 .read = ec_debugfs_cmd_read,
356};
357
358static void setup_debugfs(void)
359{
360 ec_debugfs_dir = debugfs_create_dir("olpc-ec", 0);
361 if (ec_debugfs_dir == ERR_PTR(-ENODEV))
362 return;
363
364 debugfs_create_file("cmd", 0600, ec_debugfs_dir, NULL,
365 &ec_debugfs_genops);
366}
367
368static int olpc_ec_suspend(void)
369{
370 return olpc_ec_mask_write(ec_wakeup_mask);
371}
372
373static bool __init check_ofw_architecture(struct device_node *root) 266static bool __init check_ofw_architecture(struct device_node *root)
374{ 267{
375 const char *olpc_arch; 268 const char *olpc_arch;
@@ -424,8 +317,59 @@ static int __init add_xo1_platform_devices(void)
424 return 0; 317 return 0;
425} 318}
426 319
427static struct syscore_ops olpc_syscore_ops = { 320static int olpc_xo1_ec_probe(struct platform_device *pdev)
428 .suspend = olpc_ec_suspend, 321{
322 /* get the EC revision */
323 olpc_ec_cmd(EC_FIRMWARE_REV, NULL, 0,
324 (unsigned char *) &olpc_platform_info.ecver, 1);
325
326 /* EC version 0x5f adds support for wide SCI mask */
327 if (olpc_platform_info.ecver >= 0x5f)
328 olpc_platform_info.flags |= OLPC_F_EC_WIDE_SCI;
329
330 pr_info("OLPC board revision %s%X (EC=%x)\n",
331 ((olpc_platform_info.boardrev & 0xf) < 8) ? "pre" : "",
332 olpc_platform_info.boardrev >> 4,
333 olpc_platform_info.ecver);
334
335 return 0;
336}
337static int olpc_xo1_ec_suspend(struct platform_device *pdev)
338{
339 olpc_ec_mask_write(ec_wakeup_mask);
340
341 /*
342 * Squelch SCIs while suspended. This is a fix for
343 * <http://dev.laptop.org/ticket/1835>.
344 */
345 return olpc_ec_cmd(EC_SET_SCI_INHIBIT, NULL, 0, NULL, 0);
346}
347
348static int olpc_xo1_ec_resume(struct platform_device *pdev)
349{
350 /* Tell the EC to stop inhibiting SCIs */
351 olpc_ec_cmd(EC_SET_SCI_INHIBIT_RELEASE, NULL, 0, NULL, 0);
352
353 /*
354 * Tell the wireless module to restart USB communication.
355 * Must be done twice.
356 */
357 olpc_ec_cmd(EC_WAKE_UP_WLAN, NULL, 0, NULL, 0);
358 olpc_ec_cmd(EC_WAKE_UP_WLAN, NULL, 0, NULL, 0);
359
360 return 0;
361}
362
363static struct olpc_ec_driver ec_xo1_driver = {
364 .probe = olpc_xo1_ec_probe,
365 .suspend = olpc_xo1_ec_suspend,
366 .resume = olpc_xo1_ec_resume,
367 .ec_cmd = olpc_xo1_ec_cmd,
368};
369
370static struct olpc_ec_driver ec_xo1_5_driver = {
371 .probe = olpc_xo1_ec_probe,
372 .ec_cmd = olpc_xo1_ec_cmd,
429}; 373};
430 374
431static int __init olpc_init(void) 375static int __init olpc_init(void)
@@ -435,16 +379,17 @@ static int __init olpc_init(void)
435 if (!olpc_ofw_present() || !platform_detect()) 379 if (!olpc_ofw_present() || !platform_detect())
436 return 0; 380 return 0;
437 381
438 spin_lock_init(&ec_lock); 382 /* register the XO-1 and 1.5-specific EC handler */
383 if (olpc_platform_info.boardrev < olpc_board_pre(0xd0)) /* XO-1 */
384 olpc_ec_driver_register(&ec_xo1_driver, NULL);
385 else
386 olpc_ec_driver_register(&ec_xo1_5_driver, NULL);
387 platform_device_register_simple("olpc-ec", -1, NULL, 0);
439 388
440 /* assume B1 and above models always have a DCON */ 389 /* assume B1 and above models always have a DCON */
441 if (olpc_board_at_least(olpc_board(0xb1))) 390 if (olpc_board_at_least(olpc_board(0xb1)))
442 olpc_platform_info.flags |= OLPC_F_DCON; 391 olpc_platform_info.flags |= OLPC_F_DCON;
443 392
444 /* get the EC revision */
445 olpc_ec_cmd(EC_FIRMWARE_REV, NULL, 0,
446 (unsigned char *) &olpc_platform_info.ecver, 1);
447
448#ifdef CONFIG_PCI_OLPC 393#ifdef CONFIG_PCI_OLPC
449 /* If the VSA exists let it emulate PCI, if not emulate in kernel. 394 /* If the VSA exists let it emulate PCI, if not emulate in kernel.
450 * XO-1 only. */ 395 * XO-1 only. */
@@ -452,14 +397,6 @@ static int __init olpc_init(void)
452 !cs5535_has_vsa2()) 397 !cs5535_has_vsa2())
453 x86_init.pci.arch_init = pci_olpc_init; 398 x86_init.pci.arch_init = pci_olpc_init;
454#endif 399#endif
455 /* EC version 0x5f adds support for wide SCI mask */
456 if (olpc_platform_info.ecver >= 0x5f)
457 olpc_platform_info.flags |= OLPC_F_EC_WIDE_SCI;
458
459 printk(KERN_INFO "OLPC board revision %s%X (EC=%x)\n",
460 ((olpc_platform_info.boardrev & 0xf) < 8) ? "pre" : "",
461 olpc_platform_info.boardrev >> 4,
462 olpc_platform_info.ecver);
463 400
464 if (olpc_platform_info.boardrev < olpc_board_pre(0xd0)) { /* XO-1 */ 401 if (olpc_platform_info.boardrev < olpc_board_pre(0xd0)) { /* XO-1 */
465 r = add_xo1_platform_devices(); 402 r = add_xo1_platform_devices();
@@ -467,9 +404,6 @@ static int __init olpc_init(void)
467 return r; 404 return r;
468 } 405 }
469 406
470 register_syscore_ops(&olpc_syscore_ops);
471 setup_debugfs();
472
473 return 0; 407 return 0;
474} 408}
475 409
diff --git a/arch/x86/realmode/rm/Makefile b/arch/x86/realmode/rm/Makefile
index b2d534cab25f..88692871823f 100644
--- a/arch/x86/realmode/rm/Makefile
+++ b/arch/x86/realmode/rm/Makefile
@@ -72,7 +72,7 @@ KBUILD_CFLAGS := $(LINUXINCLUDE) -m32 -g -Os -D_SETUP -D__KERNEL__ -D_WAKEUP \
72 -Wall -Wstrict-prototypes \ 72 -Wall -Wstrict-prototypes \
73 -march=i386 -mregparm=3 \ 73 -march=i386 -mregparm=3 \
74 -include $(srctree)/$(src)/../../boot/code16gcc.h \ 74 -include $(srctree)/$(src)/../../boot/code16gcc.h \
75 -fno-strict-aliasing -fomit-frame-pointer \ 75 -fno-strict-aliasing -fomit-frame-pointer -fno-pic \
76 $(call cc-option, -ffreestanding) \ 76 $(call cc-option, -ffreestanding) \
77 $(call cc-option, -fno-toplevel-reorder,\ 77 $(call cc-option, -fno-toplevel-reorder,\
78 $(call cc-option, -fno-unit-at-a-time)) \ 78 $(call cc-option, -fno-unit-at-a-time)) \
diff --git a/arch/x86/syscalls/syscall_64.tbl b/arch/x86/syscalls/syscall_64.tbl
index 51171aeff0dc..a582bfed95bb 100644
--- a/arch/x86/syscalls/syscall_64.tbl
+++ b/arch/x86/syscalls/syscall_64.tbl
@@ -60,8 +60,8 @@
6051 common getsockname sys_getsockname 6051 common getsockname sys_getsockname
6152 common getpeername sys_getpeername 6152 common getpeername sys_getpeername
6253 common socketpair sys_socketpair 6253 common socketpair sys_socketpair
6354 common setsockopt sys_setsockopt 6354 64 setsockopt sys_setsockopt
6455 common getsockopt sys_getsockopt 6455 64 getsockopt sys_getsockopt
6556 common clone stub_clone 6556 common clone stub_clone
6657 common fork stub_fork 6657 common fork stub_fork
6758 common vfork stub_vfork 6758 common vfork stub_vfork
@@ -318,7 +318,7 @@
318309 common getcpu sys_getcpu 318309 common getcpu sys_getcpu
319310 64 process_vm_readv sys_process_vm_readv 319310 64 process_vm_readv sys_process_vm_readv
320311 64 process_vm_writev sys_process_vm_writev 320311 64 process_vm_writev sys_process_vm_writev
321312 64 kcmp sys_kcmp 321312 common kcmp sys_kcmp
322 322
323# 323#
324# x32-specific system call numbers start at 512 to avoid cache impact 324# x32-specific system call numbers start at 512 to avoid cache impact
@@ -353,3 +353,5 @@
353538 x32 sendmmsg compat_sys_sendmmsg 353538 x32 sendmmsg compat_sys_sendmmsg
354539 x32 process_vm_readv compat_sys_process_vm_readv 354539 x32 process_vm_readv compat_sys_process_vm_readv
355540 x32 process_vm_writev compat_sys_process_vm_writev 355540 x32 process_vm_writev compat_sys_process_vm_writev
356541 x32 setsockopt compat_sys_setsockopt
357542 x32 getsockopt compat_sys_getsockopt
diff --git a/arch/x86/um/asm/ptrace.h b/arch/x86/um/asm/ptrace.h
index 950dfb7b8417..e72cd0df5ba3 100644
--- a/arch/x86/um/asm/ptrace.h
+++ b/arch/x86/um/asm/ptrace.h
@@ -30,10 +30,10 @@
30#define profile_pc(regs) PT_REGS_IP(regs) 30#define profile_pc(regs) PT_REGS_IP(regs)
31 31
32#define UPT_RESTART_SYSCALL(r) (UPT_IP(r) -= 2) 32#define UPT_RESTART_SYSCALL(r) (UPT_IP(r) -= 2)
33#define UPT_SET_SYSCALL_RETURN(r, res) (UPT_AX(r) = (res)) 33#define PT_REGS_SET_SYSCALL_RETURN(r, res) (PT_REGS_AX(r) = (res))
34 34
35static inline long regs_return_value(struct uml_pt_regs *regs) 35static inline long regs_return_value(struct pt_regs *regs)
36{ 36{
37 return UPT_AX(regs); 37 return PT_REGS_AX(regs);
38} 38}
39#endif /* __UM_X86_PTRACE_H */ 39#endif /* __UM_X86_PTRACE_H */
diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c
index 64effdc6da94..b2e91d40a4cb 100644
--- a/arch/x86/xen/p2m.c
+++ b/arch/x86/xen/p2m.c
@@ -194,6 +194,11 @@ RESERVE_BRK(p2m_mid_mfn, PAGE_SIZE * (MAX_DOMAIN_PAGES / (P2M_PER_PAGE * P2M_MID
194 * boundary violation will require three middle nodes. */ 194 * boundary violation will require three middle nodes. */
195RESERVE_BRK(p2m_mid_identity, PAGE_SIZE * 2 * 3); 195RESERVE_BRK(p2m_mid_identity, PAGE_SIZE * 2 * 3);
196 196
197/* When we populate back during bootup, the amount of pages can vary. The
198 * max we have is seen is 395979, but that does not mean it can't be more.
199 * But some machines can have 3GB I/O holes even. So lets reserve enough
200 * for 4GB of I/O and E820 holes. */
201RESERVE_BRK(p2m_populated, PMD_SIZE * 4);
197static inline unsigned p2m_top_index(unsigned long pfn) 202static inline unsigned p2m_top_index(unsigned long pfn)
198{ 203{
199 BUG_ON(pfn >= MAX_P2M_PFN); 204 BUG_ON(pfn >= MAX_P2M_PFN);