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-rw-r--r--arch/powerpc/kernel/entry_64.S89
1 files changed, 13 insertions, 76 deletions
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index a94f155db78e..0d525ce3717f 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -223,7 +223,11 @@ END_FTR_SECTION_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
223 223
224 beq- 1f 224 beq- 1f
225 ACCOUNT_CPU_USER_EXIT(r11, r12) 225 ACCOUNT_CPU_USER_EXIT(r11, r12)
226 HMT_MEDIUM_LOW_HAS_PPR 226
227BEGIN_FTR_SECTION
228 HMT_MEDIUM_LOW
229END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
230
227 ld r13,GPR13(r1) /* only restore r13 if returning to usermode */ 231 ld r13,GPR13(r1) /* only restore r13 if returning to usermode */
2281: ld r2,GPR2(r1) 2321: ld r2,GPR2(r1)
229 ld r1,GPR1(r1) 233 ld r1,GPR1(r1)
@@ -312,7 +316,13 @@ syscall_exit_work:
312 subi r12,r12,TI_FLAGS 316 subi r12,r12,TI_FLAGS
313 317
3144: /* Anything else left to do? */ 3184: /* Anything else left to do? */
315 SET_DEFAULT_THREAD_PPR(r3, r10) /* Set thread.ppr = 3 */ 319BEGIN_FTR_SECTION
320 lis r3,INIT_PPR@highest /* Set thread.ppr = 3 */
321 ld r10,PACACURRENT(r13)
322 sldi r3,r3,32 /* bits 11-13 are used for ppr */
323 std r3,TASKTHREADPPR(r10)
324END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
325
316 andi. r0,r9,(_TIF_SYSCALL_DOTRACE|_TIF_SINGLESTEP) 326 andi. r0,r9,(_TIF_SYSCALL_DOTRACE|_TIF_SINGLESTEP)
317 beq ret_from_except_lite 327 beq ret_from_except_lite
318 328
@@ -452,43 +462,11 @@ _GLOBAL(_switch)
452 /* r3-r13 are caller saved -- Cort */ 462 /* r3-r13 are caller saved -- Cort */
453 SAVE_8GPRS(14, r1) 463 SAVE_8GPRS(14, r1)
454 SAVE_10GPRS(22, r1) 464 SAVE_10GPRS(22, r1)
455 mflr r20 /* Return to switch caller */ 465 std r0,_NIP(r1) /* Return to switch caller */
456 mfmsr r22
457 li r0, MSR_FP
458#ifdef CONFIG_VSX
459BEGIN_FTR_SECTION
460 oris r0,r0,MSR_VSX@h /* Disable VSX */
461END_FTR_SECTION_IFSET(CPU_FTR_VSX)
462#endif /* CONFIG_VSX */
463#ifdef CONFIG_ALTIVEC
464BEGIN_FTR_SECTION
465 oris r0,r0,MSR_VEC@h /* Disable altivec */
466 mfspr r24,SPRN_VRSAVE /* save vrsave register value */
467 std r24,THREAD_VRSAVE(r3)
468END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
469#endif /* CONFIG_ALTIVEC */
470 and. r0,r0,r22
471 beq+ 1f
472 andc r22,r22,r0
473 MTMSRD(r22)
474 isync
4751: std r20,_NIP(r1)
476 mfcr r23 466 mfcr r23
477 std r23,_CCR(r1) 467 std r23,_CCR(r1)
478 std r1,KSP(r3) /* Set old stack pointer */ 468 std r1,KSP(r3) /* Set old stack pointer */
479 469
480#ifdef CONFIG_PPC_BOOK3S_64
481BEGIN_FTR_SECTION
482 /* Event based branch registers */
483 mfspr r0, SPRN_BESCR
484 std r0, THREAD_BESCR(r3)
485 mfspr r0, SPRN_EBBHR
486 std r0, THREAD_EBBHR(r3)
487 mfspr r0, SPRN_EBBRR
488 std r0, THREAD_EBBRR(r3)
489END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
490#endif
491
492#ifdef CONFIG_SMP 470#ifdef CONFIG_SMP
493 /* We need a sync somewhere here to make sure that if the 471 /* We need a sync somewhere here to make sure that if the
494 * previous task gets rescheduled on another CPU, it sees all 472 * previous task gets rescheduled on another CPU, it sees all
@@ -576,47 +554,6 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
576 mr r1,r8 /* start using new stack pointer */ 554 mr r1,r8 /* start using new stack pointer */
577 std r7,PACAKSAVE(r13) 555 std r7,PACAKSAVE(r13)
578 556
579#ifdef CONFIG_PPC_BOOK3S_64
580BEGIN_FTR_SECTION
581 /* Event based branch registers */
582 ld r0, THREAD_BESCR(r4)
583 mtspr SPRN_BESCR, r0
584 ld r0, THREAD_EBBHR(r4)
585 mtspr SPRN_EBBHR, r0
586 ld r0, THREAD_EBBRR(r4)
587 mtspr SPRN_EBBRR, r0
588
589 ld r0,THREAD_TAR(r4)
590 mtspr SPRN_TAR,r0
591END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
592#endif
593
594#ifdef CONFIG_ALTIVEC
595BEGIN_FTR_SECTION
596 ld r0,THREAD_VRSAVE(r4)
597 mtspr SPRN_VRSAVE,r0 /* if G4, restore VRSAVE reg */
598END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
599#endif /* CONFIG_ALTIVEC */
600#ifdef CONFIG_PPC64
601BEGIN_FTR_SECTION
602 lwz r6,THREAD_DSCR_INHERIT(r4)
603 ld r0,THREAD_DSCR(r4)
604 cmpwi r6,0
605 bne 1f
606 ld r0,PACA_DSCR_DEFAULT(r13)
6071:
608BEGIN_FTR_SECTION_NESTED(70)
609 mfspr r8, SPRN_FSCR
610 rldimi r8, r6, FSCR_DSCR_LG, (63 - FSCR_DSCR_LG)
611 mtspr SPRN_FSCR, r8
612END_FTR_SECTION_NESTED(CPU_FTR_ARCH_207S, CPU_FTR_ARCH_207S, 70)
613 cmpd r0,r25
614 beq 2f
615 mtspr SPRN_DSCR,r0
6162:
617END_FTR_SECTION_IFSET(CPU_FTR_DSCR)
618#endif
619
620 ld r6,_CCR(r1) 557 ld r6,_CCR(r1)
621 mtcrf 0xFF,r6 558 mtcrf 0xFF,r6
622 559