diff options
Diffstat (limited to 'arch/mips/txx9/rbtx4938/setup.c')
-rw-r--r-- | arch/mips/txx9/rbtx4938/setup.c | 63 |
1 files changed, 55 insertions, 8 deletions
diff --git a/arch/mips/txx9/rbtx4938/setup.c b/arch/mips/txx9/rbtx4938/setup.c index 9ab48dec0fe8..e077cc4d3a59 100644 --- a/arch/mips/txx9/rbtx4938/setup.c +++ b/arch/mips/txx9/rbtx4938/setup.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/delay.h> | 15 | #include <linux/delay.h> |
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
18 | #include <linux/mtd/physmap.h> | ||
18 | 19 | ||
19 | #include <asm/reboot.h> | 20 | #include <asm/reboot.h> |
20 | #include <asm/io.h> | 21 | #include <asm/io.h> |
@@ -110,6 +111,7 @@ static void __init rbtx4938_pci_setup(void) | |||
110 | #define SEEPROM2_CS 0 /* IOC */ | 111 | #define SEEPROM2_CS 0 /* IOC */ |
111 | #define SEEPROM3_CS 1 /* IOC */ | 112 | #define SEEPROM3_CS 1 /* IOC */ |
112 | #define SRTC_CS 2 /* IOC */ | 113 | #define SRTC_CS 2 /* IOC */ |
114 | #define SPI_BUSNO 0 | ||
113 | 115 | ||
114 | static int __init rbtx4938_ethaddr_init(void) | 116 | static int __init rbtx4938_ethaddr_init(void) |
115 | { | 117 | { |
@@ -119,7 +121,7 @@ static int __init rbtx4938_ethaddr_init(void) | |||
119 | int i; | 121 | int i; |
120 | 122 | ||
121 | /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */ | 123 | /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */ |
122 | if (spi_eeprom_read(SEEPROM1_CS, 0, dat, sizeof(dat))) { | 124 | if (spi_eeprom_read(SPI_BUSNO, SEEPROM1_CS, 0, dat, sizeof(dat))) { |
123 | printk(KERN_ERR "seeprom: read error.\n"); | 125 | printk(KERN_ERR "seeprom: read error.\n"); |
124 | return -ENODEV; | 126 | return -ENODEV; |
125 | } else { | 127 | } else { |
@@ -173,23 +175,30 @@ static void __init rbtx4938_mem_setup(void) | |||
173 | #endif | 175 | #endif |
174 | 176 | ||
175 | #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61 | 177 | #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_PIO58_61 |
176 | printk(KERN_INFO "PIOSEL: disabling both ata and nand selection\n"); | 178 | pr_info("PIOSEL: disabling both ATA and NAND selection\n"); |
177 | txx9_clear64(&tx4938_ccfgptr->pcfg, | 179 | txx9_clear64(&tx4938_ccfgptr->pcfg, |
178 | TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL); | 180 | TX4938_PCFG_NDF_SEL | TX4938_PCFG_ATA_SEL); |
179 | #endif | 181 | #endif |
180 | 182 | ||
181 | #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND | 183 | #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_NAND |
182 | printk(KERN_INFO "PIOSEL: enabling nand selection\n"); | 184 | pr_info("PIOSEL: enabling NAND selection\n"); |
183 | txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); | 185 | txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); |
184 | txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); | 186 | txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); |
185 | #endif | 187 | #endif |
186 | 188 | ||
187 | #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA | 189 | #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_ATA |
188 | printk(KERN_INFO "PIOSEL: enabling ata selection\n"); | 190 | pr_info("PIOSEL: enabling ATA selection\n"); |
189 | txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); | 191 | txx9_set64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_ATA_SEL); |
190 | txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); | 192 | txx9_clear64(&tx4938_ccfgptr->pcfg, TX4938_PCFG_NDF_SEL); |
191 | #endif | 193 | #endif |
192 | 194 | ||
195 | #ifdef CONFIG_TOSHIBA_RBTX4938_MPLEX_KEEP | ||
196 | pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); | ||
197 | pr_info("PIOSEL: NAND %s, ATA %s\n", | ||
198 | (pcfg & TX4938_PCFG_NDF_SEL) ? "enabled" : "disabled", | ||
199 | (pcfg & TX4938_PCFG_ATA_SEL) ? "enabled" : "disabled"); | ||
200 | #endif | ||
201 | |||
193 | rbtx4938_spi_setup(); | 202 | rbtx4938_spi_setup(); |
194 | pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */ | 203 | pcfg = ____raw_readq(&tx4938_ccfgptr->pcfg); /* updated */ |
195 | /* fixup piosel */ | 204 | /* fixup piosel */ |
@@ -279,9 +288,9 @@ static int __init rbtx4938_spi_init(void) | |||
279 | .mode = SPI_MODE_1 | SPI_CS_HIGH, | 288 | .mode = SPI_MODE_1 | SPI_CS_HIGH, |
280 | }; | 289 | }; |
281 | spi_register_board_info(&srtc_info, 1); | 290 | spi_register_board_info(&srtc_info, 1); |
282 | spi_eeprom_register(SEEPROM1_CS); | 291 | spi_eeprom_register(SPI_BUSNO, SEEPROM1_CS, 128); |
283 | spi_eeprom_register(16 + SEEPROM2_CS); | 292 | spi_eeprom_register(SPI_BUSNO, 16 + SEEPROM2_CS, 128); |
284 | spi_eeprom_register(16 + SEEPROM3_CS); | 293 | spi_eeprom_register(SPI_BUSNO, 16 + SEEPROM3_CS, 128); |
285 | gpio_request(16 + SRTC_CS, "rtc-rs5c348"); | 294 | gpio_request(16 + SRTC_CS, "rtc-rs5c348"); |
286 | gpio_direction_output(16 + SRTC_CS, 0); | 295 | gpio_direction_output(16 + SRTC_CS, 0); |
287 | gpio_request(SEEPROM1_CS, "seeprom1"); | 296 | gpio_request(SEEPROM1_CS, "seeprom1"); |
@@ -290,10 +299,46 @@ static int __init rbtx4938_spi_init(void) | |||
290 | gpio_direction_output(16 + SEEPROM2_CS, 1); | 299 | gpio_direction_output(16 + SEEPROM2_CS, 1); |
291 | gpio_request(16 + SEEPROM3_CS, "seeprom3"); | 300 | gpio_request(16 + SEEPROM3_CS, "seeprom3"); |
292 | gpio_direction_output(16 + SEEPROM3_CS, 1); | 301 | gpio_direction_output(16 + SEEPROM3_CS, 1); |
293 | tx4938_spi_init(0); | 302 | tx4938_spi_init(SPI_BUSNO); |
294 | return 0; | 303 | return 0; |
295 | } | 304 | } |
296 | 305 | ||
306 | static void __init rbtx4938_mtd_init(void) | ||
307 | { | ||
308 | struct physmap_flash_data pdata = { | ||
309 | .width = 4, | ||
310 | }; | ||
311 | |||
312 | switch (readb(rbtx4938_bdipsw_addr) & 7) { | ||
313 | case 0: | ||
314 | /* Boot */ | ||
315 | txx9_physmap_flash_init(0, 0x1fc00000, 0x400000, &pdata); | ||
316 | /* System */ | ||
317 | txx9_physmap_flash_init(1, 0x1e000000, 0x1000000, &pdata); | ||
318 | break; | ||
319 | case 1: | ||
320 | /* System */ | ||
321 | txx9_physmap_flash_init(0, 0x1f000000, 0x1000000, &pdata); | ||
322 | /* Boot */ | ||
323 | txx9_physmap_flash_init(1, 0x1ec00000, 0x400000, &pdata); | ||
324 | break; | ||
325 | case 2: | ||
326 | /* Ext */ | ||
327 | txx9_physmap_flash_init(0, 0x1f000000, 0x1000000, &pdata); | ||
328 | /* System */ | ||
329 | txx9_physmap_flash_init(1, 0x1e000000, 0x1000000, &pdata); | ||
330 | /* Boot */ | ||
331 | txx9_physmap_flash_init(2, 0x1dc00000, 0x400000, &pdata); | ||
332 | break; | ||
333 | case 3: | ||
334 | /* Boot */ | ||
335 | txx9_physmap_flash_init(1, 0x1bc00000, 0x400000, &pdata); | ||
336 | /* System */ | ||
337 | txx9_physmap_flash_init(2, 0x1a000000, 0x1000000, &pdata); | ||
338 | break; | ||
339 | } | ||
340 | } | ||
341 | |||
297 | static void __init rbtx4938_arch_init(void) | 342 | static void __init rbtx4938_arch_init(void) |
298 | { | 343 | { |
299 | gpiochip_add(&rbtx4938_spi_gpio_chip); | 344 | gpiochip_add(&rbtx4938_spi_gpio_chip); |
@@ -306,6 +351,8 @@ static void __init rbtx4938_device_init(void) | |||
306 | rbtx4938_ethaddr_init(); | 351 | rbtx4938_ethaddr_init(); |
307 | rbtx4938_ne_init(); | 352 | rbtx4938_ne_init(); |
308 | tx4938_wdt_init(); | 353 | tx4938_wdt_init(); |
354 | rbtx4938_mtd_init(); | ||
355 | txx9_iocled_init(RBTX4938_LED_ADDR - IO_BASE, -1, 8, 1, "green", NULL); | ||
309 | } | 356 | } |
310 | 357 | ||
311 | struct txx9_board_vec rbtx4938_vec __initdata = { | 358 | struct txx9_board_vec rbtx4938_vec __initdata = { |