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-rw-r--r--arch/mips/include/asm/octeon/octeon-feature.h114
1 files changed, 105 insertions, 9 deletions
diff --git a/arch/mips/include/asm/octeon/octeon-feature.h b/arch/mips/include/asm/octeon/octeon-feature.h
index cba6fbed9f43..8008da2f8779 100644
--- a/arch/mips/include/asm/octeon/octeon-feature.h
+++ b/arch/mips/include/asm/octeon/octeon-feature.h
@@ -31,8 +31,14 @@
31 31
32#ifndef __OCTEON_FEATURE_H__ 32#ifndef __OCTEON_FEATURE_H__
33#define __OCTEON_FEATURE_H__ 33#define __OCTEON_FEATURE_H__
34#include <asm/octeon/cvmx-mio-defs.h>
35#include <asm/octeon/cvmx-rnm-defs.h>
34 36
35enum octeon_feature { 37enum octeon_feature {
38 /* CN68XX uses port kinds for packet interface */
39 OCTEON_FEATURE_PKND,
40 /* CN68XX has different fields in word0 - word2 */
41 OCTEON_FEATURE_CN68XX_WQE,
36 /* 42 /*
37 * Octeon models in the CN5XXX family and higher support 43 * Octeon models in the CN5XXX family and higher support
38 * atomic add instructions to memory (saa/saad). 44 * atomic add instructions to memory (saa/saad).
@@ -42,8 +48,13 @@ enum octeon_feature {
42 OCTEON_FEATURE_ZIP, 48 OCTEON_FEATURE_ZIP,
43 /* Does this Octeon support crypto acceleration using COP2? */ 49 /* Does this Octeon support crypto acceleration using COP2? */
44 OCTEON_FEATURE_CRYPTO, 50 OCTEON_FEATURE_CRYPTO,
51 OCTEON_FEATURE_DORM_CRYPTO,
45 /* Does this Octeon support PCI express? */ 52 /* Does this Octeon support PCI express? */
46 OCTEON_FEATURE_PCIE, 53 OCTEON_FEATURE_PCIE,
54 /* Does this Octeon support SRIOs */
55 OCTEON_FEATURE_SRIO,
56 /* Does this Octeon support Interlaken */
57 OCTEON_FEATURE_ILK,
47 /* Some Octeon models support internal memory for storing 58 /* Some Octeon models support internal memory for storing
48 * cryptographic keys */ 59 * cryptographic keys */
49 OCTEON_FEATURE_KEY_MEMORY, 60 OCTEON_FEATURE_KEY_MEMORY,
@@ -64,6 +75,15 @@ enum octeon_feature {
64 /* Octeon MDIO block supports clause 45 transactions for 10 75 /* Octeon MDIO block supports clause 45 transactions for 10
65 * Gig support */ 76 * Gig support */
66 OCTEON_FEATURE_MDIO_CLAUSE_45, 77 OCTEON_FEATURE_MDIO_CLAUSE_45,
78 /*
79 * CN52XX and CN56XX used a block named NPEI for PCIe
80 * access. Newer chips replaced this with SLI+DPI.
81 */
82 OCTEON_FEATURE_NPEI,
83 OCTEON_FEATURE_HFA,
84 OCTEON_FEATURE_DFM,
85 OCTEON_FEATURE_CIU2,
86 OCTEON_MAX_FEATURE
67}; 87};
68 88
69static inline int cvmx_fuse_read(int fuse); 89static inline int cvmx_fuse_read(int fuse);
@@ -96,30 +116,78 @@ static inline int octeon_has_feature(enum octeon_feature feature)
96 return !cvmx_fuse_read(121); 116 return !cvmx_fuse_read(121);
97 117
98 case OCTEON_FEATURE_CRYPTO: 118 case OCTEON_FEATURE_CRYPTO:
99 return !cvmx_fuse_read(90); 119 if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {
120 union cvmx_mio_fus_dat2 fus_2;
121 fus_2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2);
122 if (fus_2.s.nocrypto || fus_2.s.nomul) {
123 return 0;
124 } else if (!fus_2.s.dorm_crypto) {
125 return 1;
126 } else {
127 union cvmx_rnm_ctl_status st;
128 st.u64 = cvmx_read_csr(CVMX_RNM_CTL_STATUS);
129 return st.s.eer_val;
130 }
131 } else {
132 return !cvmx_fuse_read(90);
133 }
134
135 case OCTEON_FEATURE_DORM_CRYPTO:
136 if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) {
137 union cvmx_mio_fus_dat2 fus_2;
138 fus_2.u64 = cvmx_read_csr(CVMX_MIO_FUS_DAT2);
139 return !fus_2.s.nocrypto && !fus_2.s.nomul && fus_2.s.dorm_crypto;
140 } else {
141 return 0;
142 }
100 143
101 case OCTEON_FEATURE_PCIE: 144 case OCTEON_FEATURE_PCIE:
102 case OCTEON_FEATURE_MGMT_PORT:
103 case OCTEON_FEATURE_RAID:
104 return OCTEON_IS_MODEL(OCTEON_CN56XX) 145 return OCTEON_IS_MODEL(OCTEON_CN56XX)
105 || OCTEON_IS_MODEL(OCTEON_CN52XX); 146 || OCTEON_IS_MODEL(OCTEON_CN52XX)
147 || OCTEON_IS_MODEL(OCTEON_CN6XXX);
148
149 case OCTEON_FEATURE_SRIO:
150 return OCTEON_IS_MODEL(OCTEON_CN63XX)
151 || OCTEON_IS_MODEL(OCTEON_CN66XX);
152
153 case OCTEON_FEATURE_ILK:
154 return (OCTEON_IS_MODEL(OCTEON_CN68XX));
106 155
107 case OCTEON_FEATURE_KEY_MEMORY: 156 case OCTEON_FEATURE_KEY_MEMORY:
157 return OCTEON_IS_MODEL(OCTEON_CN38XX)
158 || OCTEON_IS_MODEL(OCTEON_CN58XX)
159 || OCTEON_IS_MODEL(OCTEON_CN56XX)
160 || OCTEON_IS_MODEL(OCTEON_CN6XXX);
161
108 case OCTEON_FEATURE_LED_CONTROLLER: 162 case OCTEON_FEATURE_LED_CONTROLLER:
109 return OCTEON_IS_MODEL(OCTEON_CN38XX) 163 return OCTEON_IS_MODEL(OCTEON_CN38XX)
110 || OCTEON_IS_MODEL(OCTEON_CN58XX) 164 || OCTEON_IS_MODEL(OCTEON_CN58XX)
111 || OCTEON_IS_MODEL(OCTEON_CN56XX); 165 || OCTEON_IS_MODEL(OCTEON_CN56XX);
166
112 case OCTEON_FEATURE_TRA: 167 case OCTEON_FEATURE_TRA:
113 return !(OCTEON_IS_MODEL(OCTEON_CN30XX) 168 return !(OCTEON_IS_MODEL(OCTEON_CN30XX)
114 || OCTEON_IS_MODEL(OCTEON_CN50XX)); 169 || OCTEON_IS_MODEL(OCTEON_CN50XX));
170 case OCTEON_FEATURE_MGMT_PORT:
171 return OCTEON_IS_MODEL(OCTEON_CN56XX)
172 || OCTEON_IS_MODEL(OCTEON_CN52XX)
173 || OCTEON_IS_MODEL(OCTEON_CN6XXX);
174
175 case OCTEON_FEATURE_RAID:
176 return OCTEON_IS_MODEL(OCTEON_CN56XX)
177 || OCTEON_IS_MODEL(OCTEON_CN52XX)
178 || OCTEON_IS_MODEL(OCTEON_CN6XXX);
179
115 case OCTEON_FEATURE_USB: 180 case OCTEON_FEATURE_USB:
116 return !(OCTEON_IS_MODEL(OCTEON_CN38XX) 181 return !(OCTEON_IS_MODEL(OCTEON_CN38XX)
117 || OCTEON_IS_MODEL(OCTEON_CN58XX)); 182 || OCTEON_IS_MODEL(OCTEON_CN58XX));
183
118 case OCTEON_FEATURE_NO_WPTR: 184 case OCTEON_FEATURE_NO_WPTR:
119 return (OCTEON_IS_MODEL(OCTEON_CN56XX) 185 return (OCTEON_IS_MODEL(OCTEON_CN56XX)
120 || OCTEON_IS_MODEL(OCTEON_CN52XX)) 186 || OCTEON_IS_MODEL(OCTEON_CN52XX)
121 && !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X) 187 || OCTEON_IS_MODEL(OCTEON_CN6XXX))
122 && !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X); 188 && !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X)
189 && !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X);
190
123 case OCTEON_FEATURE_DFA: 191 case OCTEON_FEATURE_DFA:
124 if (!OCTEON_IS_MODEL(OCTEON_CN38XX) 192 if (!OCTEON_IS_MODEL(OCTEON_CN38XX)
125 && !OCTEON_IS_MODEL(OCTEON_CN31XX) 193 && !OCTEON_IS_MODEL(OCTEON_CN31XX)
@@ -127,14 +195,42 @@ static inline int octeon_has_feature(enum octeon_feature feature)
127 return 0; 195 return 0;
128 else if (OCTEON_IS_MODEL(OCTEON_CN3020)) 196 else if (OCTEON_IS_MODEL(OCTEON_CN3020))
129 return 0; 197 return 0;
130 else if (OCTEON_IS_MODEL(OCTEON_CN38XX_PASS1))
131 return 1;
132 else 198 else
133 return !cvmx_fuse_read(120); 199 return !cvmx_fuse_read(120);
200
201 case OCTEON_FEATURE_HFA:
202 if (!OCTEON_IS_MODEL(OCTEON_CN6XXX))
203 return 0;
204 else
205 return !cvmx_fuse_read(90);
206
207 case OCTEON_FEATURE_DFM:
208 if (!(OCTEON_IS_MODEL(OCTEON_CN63XX)
209 || OCTEON_IS_MODEL(OCTEON_CN66XX)))
210 return 0;
211 else
212 return !cvmx_fuse_read(90);
213
134 case OCTEON_FEATURE_MDIO_CLAUSE_45: 214 case OCTEON_FEATURE_MDIO_CLAUSE_45:
135 return !(OCTEON_IS_MODEL(OCTEON_CN3XXX) 215 return !(OCTEON_IS_MODEL(OCTEON_CN3XXX)
136 || OCTEON_IS_MODEL(OCTEON_CN58XX) 216 || OCTEON_IS_MODEL(OCTEON_CN58XX)
137 || OCTEON_IS_MODEL(OCTEON_CN50XX)); 217 || OCTEON_IS_MODEL(OCTEON_CN50XX));
218
219 case OCTEON_FEATURE_NPEI:
220 return OCTEON_IS_MODEL(OCTEON_CN56XX)
221 || OCTEON_IS_MODEL(OCTEON_CN52XX);
222
223 case OCTEON_FEATURE_PKND:
224 return OCTEON_IS_MODEL(OCTEON_CN68XX);
225
226 case OCTEON_FEATURE_CN68XX_WQE:
227 return OCTEON_IS_MODEL(OCTEON_CN68XX);
228
229 case OCTEON_FEATURE_CIU2:
230 return OCTEON_IS_MODEL(OCTEON_CN68XX);
231
232 default:
233 break;
138 } 234 }
139 return 0; 235 return 0;
140} 236}