diff options
Diffstat (limited to 'arch/arm/boot/dts/stih415-pinctrl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stih415-pinctrl.dtsi | 121 |
1 files changed, 121 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih415-pinctrl.dtsi b/arch/arm/boot/dts/stih415-pinctrl.dtsi index 887c5e59c73e..9ca20aafba24 100644 --- a/arch/arm/boot/dts/stih415-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih415-pinctrl.dtsi | |||
| @@ -119,6 +119,56 @@ | |||
| 119 | }; | 119 | }; |
| 120 | }; | 120 | }; |
| 121 | }; | 121 | }; |
| 122 | |||
| 123 | gmac1 { | ||
| 124 | pinctrl_mii1: mii1 { | ||
| 125 | st,pins { | ||
| 126 | txd0 = <&PIO0 0 ALT1 OUT SE_NICLK_IO 0 CLK_A>; | ||
| 127 | txd1 = <&PIO0 1 ALT1 OUT SE_NICLK_IO 0 CLK_A>; | ||
| 128 | txd2 = <&PIO0 2 ALT1 OUT SE_NICLK_IO 0 CLK_A>; | ||
| 129 | txd3 = <&PIO0 3 ALT1 OUT SE_NICLK_IO 0 CLK_A>; | ||
| 130 | txer = <&PIO0 4 ALT1 OUT SE_NICLK_IO 0 CLK_A>; | ||
| 131 | txen = <&PIO0 5 ALT1 OUT SE_NICLK_IO 0 CLK_A>; | ||
| 132 | txclk = <&PIO0 6 ALT1 IN NICLK 0 CLK_A>; | ||
| 133 | col = <&PIO0 7 ALT1 IN BYPASS 1000>; | ||
| 134 | mdio = <&PIO1 0 ALT1 OUT BYPASS 0>; | ||
| 135 | mdc = <&PIO1 1 ALT1 OUT NICLK 0 CLK_A>; | ||
| 136 | crs = <&PIO1 2 ALT1 IN BYPASS 1000>; | ||
| 137 | mdint = <&PIO1 3 ALT1 IN BYPASS 0>; | ||
| 138 | rxd0 = <&PIO1 4 ALT1 IN SE_NICLK_IO 0 CLK_A>; | ||
| 139 | rxd1 = <&PIO1 5 ALT1 IN SE_NICLK_IO 0 CLK_A>; | ||
| 140 | rxd2 = <&PIO1 6 ALT1 IN SE_NICLK_IO 0 CLK_A>; | ||
| 141 | rxd3 = <&PIO1 7 ALT1 IN SE_NICLK_IO 0 CLK_A>; | ||
| 142 | rxdv = <&PIO2 0 ALT1 IN SE_NICLK_IO 0 CLK_A>; | ||
| 143 | rx_er = <&PIO2 1 ALT1 IN SE_NICLK_IO 0 CLK_A>; | ||
| 144 | rxclk = <&PIO2 2 ALT1 IN NICLK 0 CLK_A>; | ||
| 145 | phyclk = <&PIO2 3 ALT1 IN NICLK 1000 CLK_A>; | ||
| 146 | }; | ||
| 147 | }; | ||
| 148 | |||
| 149 | pinctrl_rgmii1: rgmii1-0 { | ||
| 150 | st,pins { | ||
| 151 | txd0 = <&PIO0 0 ALT1 OUT DE_IO 1000 CLK_A>; | ||
| 152 | txd1 = <&PIO0 1 ALT1 OUT DE_IO 1000 CLK_A>; | ||
| 153 | txd2 = <&PIO0 2 ALT1 OUT DE_IO 1000 CLK_A>; | ||
| 154 | txd3 = <&PIO0 3 ALT1 OUT DE_IO 1000 CLK_A>; | ||
| 155 | txen = <&PIO0 5 ALT1 OUT DE_IO 0 CLK_A>; | ||
| 156 | txclk = <&PIO0 6 ALT1 IN NICLK 0 CLK_A>; | ||
| 157 | mdio = <&PIO1 0 ALT1 OUT BYPASS 0>; | ||
| 158 | mdc = <&PIO1 1 ALT1 OUT NICLK 0 CLK_A>; | ||
| 159 | rxd0 = <&PIO1 4 ALT1 IN DE_IO 0 CLK_A>; | ||
| 160 | rxd1 = <&PIO1 5 ALT1 IN DE_IO 0 CLK_A>; | ||
| 161 | rxd2 = <&PIO1 6 ALT1 IN DE_IO 0 CLK_A>; | ||
| 162 | rxd3 = <&PIO1 7 ALT1 IN DE_IO 0 CLK_A>; | ||
| 163 | |||
| 164 | rxdv = <&PIO2 0 ALT1 IN DE_IO 500 CLK_A>; | ||
| 165 | rxclk = <&PIO2 2 ALT1 IN NICLK 0 CLK_A>; | ||
| 166 | phyclk = <&PIO2 3 ALT4 OUT NICLK 0 CLK_B>; | ||
| 167 | |||
| 168 | clk125= <&PIO3 7 ALT4 IN NICLK 0 CLK_A>; | ||
| 169 | }; | ||
| 170 | }; | ||
| 171 | }; | ||
| 122 | }; | 172 | }; |
| 123 | 173 | ||
| 124 | pin-controller-front { | 174 | pin-controller-front { |
| @@ -284,6 +334,77 @@ | |||
| 284 | }; | 334 | }; |
| 285 | }; | 335 | }; |
| 286 | }; | 336 | }; |
| 337 | |||
| 338 | gmac0{ | ||
| 339 | pinctrl_mii0: mii0 { | ||
| 340 | st,pins { | ||
| 341 | mdint = <&PIO13 6 ALT2 IN BYPASS 0>; | ||
| 342 | txen = <&PIO13 7 ALT2 OUT SE_NICLK_IO 0 CLK_A>; | ||
| 343 | |||
| 344 | txd0 = <&PIO14 0 ALT2 OUT SE_NICLK_IO 0 CLK_A>; | ||
| 345 | txd1 = <&PIO14 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>; | ||
| 346 | txd2 = <&PIO14 2 ALT2 OUT SE_NICLK_IO 0 CLK_B>; | ||
| 347 | txd3 = <&PIO14 3 ALT2 OUT SE_NICLK_IO 0 CLK_B>; | ||
| 348 | |||
| 349 | txclk = <&PIO15 0 ALT2 IN NICLK 0 CLK_A>; | ||
| 350 | txer = <&PIO15 1 ALT2 OUT SE_NICLK_IO 0 CLK_A>; | ||
| 351 | crs = <&PIO15 2 ALT2 IN BYPASS 1000>; | ||
| 352 | col = <&PIO15 3 ALT2 IN BYPASS 1000>; | ||
| 353 | mdio = <&PIO15 4 ALT2 OUT BYPASS 3000>; | ||
| 354 | mdc = <&PIO15 5 ALT2 OUT NICLK 0 CLK_B>; | ||
| 355 | |||
| 356 | rxd0 = <&PIO16 0 ALT2 IN SE_NICLK_IO 0 CLK_A>; | ||
| 357 | rxd1 = <&PIO16 1 ALT2 IN SE_NICLK_IO 0 CLK_A>; | ||
| 358 | rxd2 = <&PIO16 2 ALT2 IN SE_NICLK_IO 0 CLK_A>; | ||
| 359 | rxd3 = <&PIO16 3 ALT2 IN SE_NICLK_IO 0 CLK_A>; | ||
| 360 | rxdv = <&PIO15 6 ALT2 IN SE_NICLK_IO 0 CLK_A>; | ||
| 361 | rx_er = <&PIO15 7 ALT2 IN SE_NICLK_IO 0 CLK_A>; | ||
| 362 | rxclk = <&PIO17 0 ALT2 IN NICLK 0 CLK_A>; | ||
| 363 | phyclk = <&PIO13 5 ALT2 OUT NICLK 1000 CLK_A>; | ||
| 364 | |||
| 365 | }; | ||
| 366 | }; | ||
| 367 | |||
| 368 | pinctrl_gmii0: gmii0 { | ||
| 369 | st,pins { | ||
| 370 | mdint = <&PIO13 6 ALT2 IN BYPASS 0>; | ||
| 371 | mdio = <&PIO15 4 ALT2 OUT BYPASS 3000>; | ||
| 372 | mdc = <&PIO15 5 ALT2 OUT NICLK 0 CLK_B>; | ||
| 373 | txen = <&PIO13 7 ALT2 OUT SE_NICLK_IO 3000 CLK_A>; | ||
| 374 | |||
| 375 | txd0 = <&PIO14 0 ALT2 OUT SE_NICLK_IO 3000 CLK_A>; | ||
| 376 | txd1 = <&PIO14 1 ALT2 OUT SE_NICLK_IO 3000 CLK_A>; | ||
| 377 | txd2 = <&PIO14 2 ALT2 OUT SE_NICLK_IO 3000 CLK_B>; | ||
| 378 | txd3 = <&PIO14 3 ALT2 OUT SE_NICLK_IO 3000 CLK_B>; | ||
| 379 | txd4 = <&PIO14 4 ALT2 OUT SE_NICLK_IO 3000 CLK_B>; | ||
| 380 | txd5 = <&PIO14 5 ALT2 OUT SE_NICLK_IO 3000 CLK_B>; | ||
| 381 | txd6 = <&PIO14 6 ALT2 OUT SE_NICLK_IO 3000 CLK_B>; | ||
| 382 | txd7 = <&PIO14 7 ALT2 OUT SE_NICLK_IO 3000 CLK_B>; | ||
| 383 | |||
| 384 | txclk = <&PIO15 0 ALT2 IN NICLK 0 CLK_A>; | ||
| 385 | txer = <&PIO15 1 ALT2 OUT SE_NICLK_IO 3000 CLK_A>; | ||
| 386 | crs = <&PIO15 2 ALT2 IN BYPASS 1000>; | ||
| 387 | col = <&PIO15 3 ALT2 IN BYPASS 1000>; | ||
| 388 | rxdv = <&PIO15 6 ALT2 IN SE_NICLK_IO 1500 CLK_A>; | ||
| 389 | rx_er = <&PIO15 7 ALT2 IN SE_NICLK_IO 1500 CLK_A>; | ||
| 390 | |||
| 391 | rxd0 = <&PIO16 0 ALT2 IN SE_NICLK_IO 1500 CLK_A>; | ||
| 392 | rxd1 = <&PIO16 1 ALT2 IN SE_NICLK_IO 1500 CLK_A>; | ||
| 393 | rxd2 = <&PIO16 2 ALT2 IN SE_NICLK_IO 1500 CLK_A>; | ||
| 394 | rxd3 = <&PIO16 3 ALT2 IN SE_NICLK_IO 1500 CLK_A>; | ||
| 395 | rxd4 = <&PIO16 4 ALT2 IN SE_NICLK_IO 1500 CLK_A>; | ||
| 396 | rxd5 = <&PIO16 5 ALT2 IN SE_NICLK_IO 1500 CLK_A>; | ||
| 397 | rxd6 = <&PIO16 6 ALT2 IN SE_NICLK_IO 1500 CLK_A>; | ||
| 398 | rxd7 = <&PIO16 7 ALT2 IN SE_NICLK_IO 1500 CLK_A>; | ||
| 399 | |||
| 400 | rxclk = <&PIO17 0 ALT2 IN NICLK 0 CLK_A>; | ||
| 401 | clk125 = <&PIO17 6 ALT1 IN NICLK 0 CLK_A>; | ||
| 402 | phyclk = <&PIO13 5 ALT4 OUT NICLK 0 CLK_B>; | ||
| 403 | |||
| 404 | |||
| 405 | }; | ||
| 406 | }; | ||
| 407 | }; | ||
| 287 | }; | 408 | }; |
| 288 | 409 | ||
| 289 | pin-controller-left { | 410 | pin-controller-left { |