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authorXenia Ragiadakou <burzalodowa@gmail.com>2013-11-14 22:34:06 -0500
committerSarah Sharp <sarah.a.sharp@linux.intel.com>2013-12-02 15:59:48 -0500
commitb0ba9720846c980d053b1ffcd766fddfbef95d4c (patch)
tree03c170ac268064f2aeb07d37e13c37deee938c8d /drivers/usb/host/xhci.c
parent2a100047481a5c7430c72883b586eb6f2df34812 (diff)
xhci: replace xhci_readl() with readl()
Function xhci_readl() is used to read 32bit xHC registers residing in MMIO address space. It takes as first argument a pointer to the xhci_hcd although it does not use it. xhci_readl() internally simply calls readl(). This creates an illusion that xhci_readl() is an xhci specific function that has to be called in a context where a pointer to xhci_hcd is available. Remove the unnecessary xhci_readl() wrapper function and replace its calls to with calls to readl() to make the code more straightforward. Signed-off-by: Xenia Ragiadakou <burzalodowa@gmail.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Diffstat (limited to 'drivers/usb/host/xhci.c')
-rw-r--r--drivers/usb/host/xhci.c86
1 files changed, 43 insertions, 43 deletions
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c
index 900ba36ee2b8..5e6a8651c2a8 100644
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
@@ -60,7 +60,7 @@ int xhci_handshake(struct xhci_hcd *xhci, void __iomem *ptr,
60 u32 result; 60 u32 result;
61 61
62 do { 62 do {
63 result = xhci_readl(xhci, ptr); 63 result = readl(ptr);
64 if (result == ~(u32)0) /* card removed */ 64 if (result == ~(u32)0) /* card removed */
65 return -ENODEV; 65 return -ENODEV;
66 result &= mask; 66 result &= mask;
@@ -82,11 +82,11 @@ void xhci_quiesce(struct xhci_hcd *xhci)
82 u32 mask; 82 u32 mask;
83 83
84 mask = ~(XHCI_IRQS); 84 mask = ~(XHCI_IRQS);
85 halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT; 85 halted = readl(&xhci->op_regs->status) & STS_HALT;
86 if (!halted) 86 if (!halted)
87 mask &= ~CMD_RUN; 87 mask &= ~CMD_RUN;
88 88
89 cmd = xhci_readl(xhci, &xhci->op_regs->command); 89 cmd = readl(&xhci->op_regs->command);
90 cmd &= mask; 90 cmd &= mask;
91 xhci_writel(xhci, cmd, &xhci->op_regs->command); 91 xhci_writel(xhci, cmd, &xhci->op_regs->command);
92} 92}
@@ -124,7 +124,7 @@ static int xhci_start(struct xhci_hcd *xhci)
124 u32 temp; 124 u32 temp;
125 int ret; 125 int ret;
126 126
127 temp = xhci_readl(xhci, &xhci->op_regs->command); 127 temp = readl(&xhci->op_regs->command);
128 temp |= (CMD_RUN); 128 temp |= (CMD_RUN);
129 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.", 129 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
130 temp); 130 temp);
@@ -158,14 +158,14 @@ int xhci_reset(struct xhci_hcd *xhci)
158 u32 state; 158 u32 state;
159 int ret, i; 159 int ret, i;
160 160
161 state = xhci_readl(xhci, &xhci->op_regs->status); 161 state = readl(&xhci->op_regs->status);
162 if ((state & STS_HALT) == 0) { 162 if ((state & STS_HALT) == 0) {
163 xhci_warn(xhci, "Host controller not halted, aborting reset.\n"); 163 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
164 return 0; 164 return 0;
165 } 165 }
166 166
167 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC"); 167 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
168 command = xhci_readl(xhci, &xhci->op_regs->command); 168 command = readl(&xhci->op_regs->command);
169 command |= CMD_RESET; 169 command |= CMD_RESET;
170 xhci_writel(xhci, command, &xhci->op_regs->command); 170 xhci_writel(xhci, command, &xhci->op_regs->command);
171 171
@@ -422,7 +422,7 @@ static void compliance_mode_recovery(unsigned long arg)
422 xhci = (struct xhci_hcd *)arg; 422 xhci = (struct xhci_hcd *)arg;
423 423
424 for (i = 0; i < xhci->num_usb3_ports; i++) { 424 for (i = 0; i < xhci->num_usb3_ports; i++) {
425 temp = xhci_readl(xhci, xhci->usb3_ports[i]); 425 temp = readl(xhci->usb3_ports[i]);
426 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) { 426 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
427 /* 427 /*
428 * Compliance Mode Detected. Letting USB Core 428 * Compliance Mode Detected. Letting USB Core
@@ -611,19 +611,19 @@ int xhci_run(struct usb_hcd *hcd)
611 611
612 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 612 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
613 "// Set the interrupt modulation register"); 613 "// Set the interrupt modulation register");
614 temp = xhci_readl(xhci, &xhci->ir_set->irq_control); 614 temp = readl(&xhci->ir_set->irq_control);
615 temp &= ~ER_IRQ_INTERVAL_MASK; 615 temp &= ~ER_IRQ_INTERVAL_MASK;
616 temp |= (u32) 160; 616 temp |= (u32) 160;
617 xhci_writel(xhci, temp, &xhci->ir_set->irq_control); 617 xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
618 618
619 /* Set the HCD state before we enable the irqs */ 619 /* Set the HCD state before we enable the irqs */
620 temp = xhci_readl(xhci, &xhci->op_regs->command); 620 temp = readl(&xhci->op_regs->command);
621 temp |= (CMD_EIE); 621 temp |= (CMD_EIE);
622 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 622 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
623 "// Enable interrupts, cmd = 0x%x.", temp); 623 "// Enable interrupts, cmd = 0x%x.", temp);
624 xhci_writel(xhci, temp, &xhci->op_regs->command); 624 xhci_writel(xhci, temp, &xhci->op_regs->command);
625 625
626 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); 626 temp = readl(&xhci->ir_set->irq_pending);
627 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 627 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
628 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending", 628 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
629 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp)); 629 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
@@ -698,9 +698,9 @@ void xhci_stop(struct usb_hcd *hcd)
698 698
699 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 699 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
700 "// Disabling event ring interrupts"); 700 "// Disabling event ring interrupts");
701 temp = xhci_readl(xhci, &xhci->op_regs->status); 701 temp = readl(&xhci->op_regs->status);
702 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status); 702 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
703 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); 703 temp = readl(&xhci->ir_set->irq_pending);
704 xhci_writel(xhci, ER_IRQ_DISABLE(temp), 704 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
705 &xhci->ir_set->irq_pending); 705 &xhci->ir_set->irq_pending);
706 xhci_print_ir_set(xhci, 0); 706 xhci_print_ir_set(xhci, 0);
@@ -709,7 +709,7 @@ void xhci_stop(struct usb_hcd *hcd)
709 xhci_mem_cleanup(xhci); 709 xhci_mem_cleanup(xhci);
710 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 710 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
711 "xhci_stop completed - status = %x", 711 "xhci_stop completed - status = %x",
712 xhci_readl(xhci, &xhci->op_regs->status)); 712 readl(&xhci->op_regs->status));
713} 713}
714 714
715/* 715/*
@@ -739,7 +739,7 @@ void xhci_shutdown(struct usb_hcd *hcd)
739 739
740 xhci_dbg_trace(xhci, trace_xhci_dbg_init, 740 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
741 "xhci_shutdown completed - status = %x", 741 "xhci_shutdown completed - status = %x",
742 xhci_readl(xhci, &xhci->op_regs->status)); 742 readl(&xhci->op_regs->status));
743 743
744 /* Yet another workaround for spurious wakeups at shutdown with HSW */ 744 /* Yet another workaround for spurious wakeups at shutdown with HSW */
745 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP) 745 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
@@ -749,15 +749,15 @@ void xhci_shutdown(struct usb_hcd *hcd)
749#ifdef CONFIG_PM 749#ifdef CONFIG_PM
750static void xhci_save_registers(struct xhci_hcd *xhci) 750static void xhci_save_registers(struct xhci_hcd *xhci)
751{ 751{
752 xhci->s3.command = xhci_readl(xhci, &xhci->op_regs->command); 752 xhci->s3.command = readl(&xhci->op_regs->command);
753 xhci->s3.dev_nt = xhci_readl(xhci, &xhci->op_regs->dev_notification); 753 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
754 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr); 754 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
755 xhci->s3.config_reg = xhci_readl(xhci, &xhci->op_regs->config_reg); 755 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
756 xhci->s3.erst_size = xhci_readl(xhci, &xhci->ir_set->erst_size); 756 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
757 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base); 757 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
758 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue); 758 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
759 xhci->s3.irq_pending = xhci_readl(xhci, &xhci->ir_set->irq_pending); 759 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
760 xhci->s3.irq_control = xhci_readl(xhci, &xhci->ir_set->irq_control); 760 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
761} 761}
762 762
763static void xhci_restore_registers(struct xhci_hcd *xhci) 763static void xhci_restore_registers(struct xhci_hcd *xhci)
@@ -866,7 +866,7 @@ int xhci_suspend(struct xhci_hcd *xhci)
866 /* skipped assuming that port suspend has done */ 866 /* skipped assuming that port suspend has done */
867 867
868 /* step 2: clear Run/Stop bit */ 868 /* step 2: clear Run/Stop bit */
869 command = xhci_readl(xhci, &xhci->op_regs->command); 869 command = readl(&xhci->op_regs->command);
870 command &= ~CMD_RUN; 870 command &= ~CMD_RUN;
871 xhci_writel(xhci, command, &xhci->op_regs->command); 871 xhci_writel(xhci, command, &xhci->op_regs->command);
872 872
@@ -885,7 +885,7 @@ int xhci_suspend(struct xhci_hcd *xhci)
885 xhci_save_registers(xhci); 885 xhci_save_registers(xhci);
886 886
887 /* step 4: set CSS flag */ 887 /* step 4: set CSS flag */
888 command = xhci_readl(xhci, &xhci->op_regs->command); 888 command = readl(&xhci->op_regs->command);
889 command |= CMD_CSS; 889 command |= CMD_CSS;
890 xhci_writel(xhci, command, &xhci->op_regs->command); 890 xhci_writel(xhci, command, &xhci->op_regs->command);
891 if (xhci_handshake(xhci, &xhci->op_regs->status, 891 if (xhci_handshake(xhci, &xhci->op_regs->status,
@@ -951,7 +951,7 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
951 xhci_set_cmd_ring_deq(xhci); 951 xhci_set_cmd_ring_deq(xhci);
952 /* step 3: restore state and start state*/ 952 /* step 3: restore state and start state*/
953 /* step 3: set CRS flag */ 953 /* step 3: set CRS flag */
954 command = xhci_readl(xhci, &xhci->op_regs->command); 954 command = readl(&xhci->op_regs->command);
955 command |= CMD_CRS; 955 command |= CMD_CRS;
956 xhci_writel(xhci, command, &xhci->op_regs->command); 956 xhci_writel(xhci, command, &xhci->op_regs->command);
957 if (xhci_handshake(xhci, &xhci->op_regs->status, 957 if (xhci_handshake(xhci, &xhci->op_regs->status,
@@ -960,7 +960,7 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
960 spin_unlock_irq(&xhci->lock); 960 spin_unlock_irq(&xhci->lock);
961 return -ETIMEDOUT; 961 return -ETIMEDOUT;
962 } 962 }
963 temp = xhci_readl(xhci, &xhci->op_regs->status); 963 temp = readl(&xhci->op_regs->status);
964 } 964 }
965 965
966 /* If restore operation fails, re-initialize the HC during resume */ 966 /* If restore operation fails, re-initialize the HC during resume */
@@ -984,9 +984,9 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
984 xhci_cleanup_msix(xhci); 984 xhci_cleanup_msix(xhci);
985 985
986 xhci_dbg(xhci, "// Disabling event ring interrupts\n"); 986 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
987 temp = xhci_readl(xhci, &xhci->op_regs->status); 987 temp = readl(&xhci->op_regs->status);
988 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status); 988 xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
989 temp = xhci_readl(xhci, &xhci->ir_set->irq_pending); 989 temp = readl(&xhci->ir_set->irq_pending);
990 xhci_writel(xhci, ER_IRQ_DISABLE(temp), 990 xhci_writel(xhci, ER_IRQ_DISABLE(temp),
991 &xhci->ir_set->irq_pending); 991 &xhci->ir_set->irq_pending);
992 xhci_print_ir_set(xhci, 0); 992 xhci_print_ir_set(xhci, 0);
@@ -994,7 +994,7 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
994 xhci_dbg(xhci, "cleaning up memory\n"); 994 xhci_dbg(xhci, "cleaning up memory\n");
995 xhci_mem_cleanup(xhci); 995 xhci_mem_cleanup(xhci);
996 xhci_dbg(xhci, "xhci_stop completed - status = %x\n", 996 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
997 xhci_readl(xhci, &xhci->op_regs->status)); 997 readl(&xhci->op_regs->status));
998 998
999 /* USB core calls the PCI reinit and start functions twice: 999 /* USB core calls the PCI reinit and start functions twice:
1000 * first with the primary HCD, and then with the secondary HCD. 1000 * first with the primary HCD, and then with the secondary HCD.
@@ -1023,7 +1023,7 @@ int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
1023 } 1023 }
1024 1024
1025 /* step 4: set Run/Stop bit */ 1025 /* step 4: set Run/Stop bit */
1026 command = xhci_readl(xhci, &xhci->op_regs->command); 1026 command = readl(&xhci->op_regs->command);
1027 command |= CMD_RUN; 1027 command |= CMD_RUN;
1028 xhci_writel(xhci, command, &xhci->op_regs->command); 1028 xhci_writel(xhci, command, &xhci->op_regs->command);
1029 xhci_handshake(xhci, &xhci->op_regs->status, STS_HALT, 1029 xhci_handshake(xhci, &xhci->op_regs->status, STS_HALT,
@@ -1464,7 +1464,7 @@ int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1464 ret = usb_hcd_check_unlink_urb(hcd, urb, status); 1464 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1465 if (ret || !urb->hcpriv) 1465 if (ret || !urb->hcpriv)
1466 goto done; 1466 goto done;
1467 temp = xhci_readl(xhci, &xhci->op_regs->status); 1467 temp = readl(&xhci->op_regs->status);
1468 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) { 1468 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1469 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb, 1469 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1470 "HW died, freeing TD."); 1470 "HW died, freeing TD.");
@@ -3585,7 +3585,7 @@ void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3585 3585
3586 spin_lock_irqsave(&xhci->lock, flags); 3586 spin_lock_irqsave(&xhci->lock, flags);
3587 /* Don't disable the slot if the host controller is dead. */ 3587 /* Don't disable the slot if the host controller is dead. */
3588 state = xhci_readl(xhci, &xhci->op_regs->status); 3588 state = readl(&xhci->op_regs->status);
3589 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) || 3589 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3590 (xhci->xhc_state & XHCI_STATE_HALTED)) { 3590 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3591 xhci_free_virt_device(xhci, udev->slot_id); 3591 xhci_free_virt_device(xhci, udev->slot_id);
@@ -4042,7 +4042,7 @@ int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4042 port_array = xhci->usb2_ports; 4042 port_array = xhci->usb2_ports;
4043 port_num = udev->portnum - 1; 4043 port_num = udev->portnum - 1;
4044 pm_addr = port_array[port_num] + PORTPMSC; 4044 pm_addr = port_array[port_num] + PORTPMSC;
4045 pm_val = xhci_readl(xhci, pm_addr); 4045 pm_val = readl(pm_addr);
4046 hlpm_addr = port_array[port_num] + PORTHLPMC; 4046 hlpm_addr = port_array[port_num] + PORTHLPMC;
4047 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes); 4047 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4048 4048
@@ -4084,7 +4084,7 @@ int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4084 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev); 4084 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4085 xhci_writel(xhci, hlpm_val, hlpm_addr); 4085 xhci_writel(xhci, hlpm_val, hlpm_addr);
4086 /* flush write */ 4086 /* flush write */
4087 xhci_readl(xhci, hlpm_addr); 4087 readl(hlpm_addr);
4088 } else { 4088 } else {
4089 hird = xhci_calculate_hird_besl(xhci, udev); 4089 hird = xhci_calculate_hird_besl(xhci, udev);
4090 } 4090 }
@@ -4092,16 +4092,16 @@ int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4092 pm_val &= ~PORT_HIRD_MASK; 4092 pm_val &= ~PORT_HIRD_MASK;
4093 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id); 4093 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4094 xhci_writel(xhci, pm_val, pm_addr); 4094 xhci_writel(xhci, pm_val, pm_addr);
4095 pm_val = xhci_readl(xhci, pm_addr); 4095 pm_val = readl(pm_addr);
4096 pm_val |= PORT_HLE; 4096 pm_val |= PORT_HLE;
4097 xhci_writel(xhci, pm_val, pm_addr); 4097 xhci_writel(xhci, pm_val, pm_addr);
4098 /* flush write */ 4098 /* flush write */
4099 xhci_readl(xhci, pm_addr); 4099 readl(pm_addr);
4100 } else { 4100 } else {
4101 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK); 4101 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4102 xhci_writel(xhci, pm_val, pm_addr); 4102 xhci_writel(xhci, pm_val, pm_addr);
4103 /* flush write */ 4103 /* flush write */
4104 xhci_readl(xhci, pm_addr); 4104 readl(pm_addr);
4105 if (udev->usb2_hw_lpm_besl_capable) { 4105 if (udev->usb2_hw_lpm_besl_capable) {
4106 spin_unlock_irqrestore(&xhci->lock, flags); 4106 spin_unlock_irqrestore(&xhci->lock, flags);
4107 mutex_lock(hcd->bandwidth_mutex); 4107 mutex_lock(hcd->bandwidth_mutex);
@@ -4704,7 +4704,7 @@ int xhci_get_frame(struct usb_hcd *hcd)
4704{ 4704{
4705 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 4705 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4706 /* EHCI mods by the periodic size. Why? */ 4706 /* EHCI mods by the periodic size. Why? */
4707 return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3; 4707 return readl(&xhci->run_regs->microframe_index) >> 3;
4708} 4708}
4709 4709
4710int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks) 4710int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
@@ -4748,16 +4748,16 @@ int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4748 4748
4749 xhci->cap_regs = hcd->regs; 4749 xhci->cap_regs = hcd->regs;
4750 xhci->op_regs = hcd->regs + 4750 xhci->op_regs = hcd->regs +
4751 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase)); 4751 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4752 xhci->run_regs = hcd->regs + 4752 xhci->run_regs = hcd->regs +
4753 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK); 4753 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4754 /* Cache read-only capability registers */ 4754 /* Cache read-only capability registers */
4755 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1); 4755 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4756 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2); 4756 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4757 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3); 4757 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4758 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase); 4758 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4759 xhci->hci_version = HC_VERSION(xhci->hcc_params); 4759 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4760 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params); 4760 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4761 xhci_print_registers(xhci); 4761 xhci_print_registers(xhci);
4762 4762
4763 get_quirks(dev, xhci); 4763 get_quirks(dev, xhci);