diff options
author | Shyam Sundar S K <ssundark@amd.com> | 2016-12-08 07:01:14 -0500 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-01-12 05:39:07 -0500 |
commit | 3c4eef31670361212d4f762c9420fa9a4ff160c0 (patch) | |
tree | fedd2fd96914c52fd0d61344eeadb7ae6c92daf8 /drivers/pinctrl | |
parent | c7b1b7951d9d08a7b9ec19354fa8f33b5d1e9ddb (diff) |
pinctrl/amd: Set the level based on ACPI tables
commit 2983f296f2327bc517e3b29344fce82271160197 upstream.
In the function amd_gpio_irq_set_type, read the values from
the ACPI table to set the level and drop the settings passed
by the client.
Reviewed-by: Pankaj Sen <Pankaj.Sen@amd.com>
Reviewed-by: Nitesh Kumar Agrawal <Nitesh-kumar.Agrawal@amd.com>
Reviewed-by: Shah, Nehal-bakulchandra <Nehal-bakulchandra.Shah@amd.com>
Signed-off-by: Shyam-sundar S-k <Shyam-sundar.S-k@amd.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r-- | drivers/pinctrl/pinctrl-amd.c | 19 |
1 files changed, 7 insertions, 12 deletions
diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c index aea310a91821..c9a146948192 100644 --- a/drivers/pinctrl/pinctrl-amd.c +++ b/drivers/pinctrl/pinctrl-amd.c | |||
@@ -382,26 +382,21 @@ static int amd_gpio_irq_set_type(struct irq_data *d, unsigned int type) | |||
382 | { | 382 | { |
383 | int ret = 0; | 383 | int ret = 0; |
384 | u32 pin_reg; | 384 | u32 pin_reg; |
385 | unsigned long flags; | 385 | unsigned long flags, irq_flags; |
386 | bool level_trig; | ||
387 | u32 active_level; | ||
388 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); | 386 | struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
389 | struct amd_gpio *gpio_dev = gpiochip_get_data(gc); | 387 | struct amd_gpio *gpio_dev = gpiochip_get_data(gc); |
390 | 388 | ||
391 | spin_lock_irqsave(&gpio_dev->lock, flags); | 389 | spin_lock_irqsave(&gpio_dev->lock, flags); |
392 | pin_reg = readl(gpio_dev->base + (d->hwirq)*4); | 390 | pin_reg = readl(gpio_dev->base + (d->hwirq)*4); |
393 | 391 | ||
394 | /* | 392 | /* Ignore the settings coming from the client and |
395 | * When level_trig is set EDGE and active_level is set HIGH in BIOS | 393 | * read the values from the ACPI tables |
396 | * default settings, ignore incoming settings from client and use | 394 | * while setting the trigger type |
397 | * BIOS settings to configure GPIO register. | ||
398 | */ | 395 | */ |
399 | level_trig = !(pin_reg & (LEVEL_TRIGGER << LEVEL_TRIG_OFF)); | ||
400 | active_level = pin_reg & (ACTIVE_LEVEL_MASK << ACTIVE_LEVEL_OFF); | ||
401 | 396 | ||
402 | if(level_trig && | 397 | irq_flags = irq_get_trigger_type(d->irq); |
403 | ((active_level >> ACTIVE_LEVEL_OFF) == ACTIVE_HIGH)) | 398 | if (irq_flags != IRQ_TYPE_NONE) |
404 | type = IRQ_TYPE_EDGE_FALLING; | 399 | type = irq_flags; |
405 | 400 | ||
406 | switch (type & IRQ_TYPE_SENSE_MASK) { | 401 | switch (type & IRQ_TYPE_SENSE_MASK) { |
407 | case IRQ_TYPE_EDGE_RISING: | 402 | case IRQ_TYPE_EDGE_RISING: |