ath9k_hw: Add few routines for rx edma support

* Set rx buf size in register 0x60
* Set rxdp on the respective hw rx queue (HP and LP queues)
* Process rx descriptor

Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

1 files changed, 95 insertions, 0 deletions

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mac.c b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
index ee84e64b8b0c..20890060ee2c 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
@@ -26,3 +26,98 @@ void ar9003_hw_attach_mac_ops(struct ath_hw *hw)
 
         ops->rx_enable = ar9003_hw_rx_enable;
 }
+
+void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size)
+{
+        REG_WRITE(ah, AR_DATABUF_SIZE, buf_size & AR_DATABUF_SIZE_MASK);
+}
+EXPORT_SYMBOL(ath9k_hw_set_rx_bufsize);
+
+void ath9k_hw_addrxbuf_edma(struct ath_hw *ah, u32 rxdp,
+                            enum ath9k_rx_qtype qtype)
+{
+        if (qtype == ATH9K_RX_QUEUE_HP)
+                REG_WRITE(ah, AR_HP_RXDP, rxdp);
+        else
+                REG_WRITE(ah, AR_LP_RXDP, rxdp);
+}
+EXPORT_SYMBOL(ath9k_hw_addrxbuf_edma);
+
+int ath9k_hw_process_rxdesc_edma(struct ath_hw *ah, struct ath_rx_status *rxs,
+                                 void *buf_addr)
+{
+        struct ar9003_rxs *rxsp = (struct ar9003_rxs *) buf_addr;
+        unsigned int phyerr;
+
+        /* TODO: byte swap on big endian for ar9300_10 */
+
+        if ((rxsp->status11 & AR_RxDone) == 0)
+                return -EINPROGRESS;
+
+        if (MS(rxsp->ds_info, AR_DescId) != 0x168c)
+                return -EINVAL;
+
+        if ((rxsp->ds_info & (AR_TxRxDesc | AR_CtrlStat)) != 0)
+                return -EINPROGRESS;
+
+        rxs->rs_status = 0;
+        rxs->rs_flags =  0;
+
+        rxs->rs_datalen = rxsp->status2 & AR_DataLen;
+        rxs->rs_tstamp =  rxsp->status3;
+
+        /* XXX: Keycache */
+        rxs->rs_rssi = MS(rxsp->status5, AR_RxRSSICombined);
+        rxs->rs_rssi_ctl0 = MS(rxsp->status1, AR_RxRSSIAnt00);
+        rxs->rs_rssi_ctl1 = MS(rxsp->status1, AR_RxRSSIAnt01);
+        rxs->rs_rssi_ctl2 = MS(rxsp->status1, AR_RxRSSIAnt02);
+        rxs->rs_rssi_ext0 = MS(rxsp->status5, AR_RxRSSIAnt10);
+        rxs->rs_rssi_ext1 = MS(rxsp->status5, AR_RxRSSIAnt11);
+        rxs->rs_rssi_ext2 = MS(rxsp->status5, AR_RxRSSIAnt12);
+
+        if (rxsp->status11 & AR_RxKeyIdxValid)
+                rxs->rs_keyix = MS(rxsp->status11, AR_KeyIdx);
+        else
+                rxs->rs_keyix = ATH9K_RXKEYIX_INVALID;
+
+        rxs->rs_rate = MS(rxsp->status1, AR_RxRate);
+        rxs->rs_more = (rxsp->status2 & AR_RxMore) ? 1 : 0;
+
+        rxs->rs_isaggr = (rxsp->status11 & AR_RxAggr) ? 1 : 0;
+        rxs->rs_moreaggr = (rxsp->status11 & AR_RxMoreAggr) ? 1 : 0;
+        rxs->rs_antenna = (MS(rxsp->status4, AR_RxAntenna) & 0x7);
+        rxs->rs_flags  = (rxsp->status4 & AR_GI) ? ATH9K_RX_GI : 0;
+        rxs->rs_flags  |= (rxsp->status4 & AR_2040) ? ATH9K_RX_2040 : 0;
+
+        rxs->evm0 = rxsp->status6;
+        rxs->evm1 = rxsp->status7;
+        rxs->evm2 = rxsp->status8;
+        rxs->evm3 = rxsp->status9;
+        rxs->evm4 = (rxsp->status10 & 0xffff);
+
+        if (rxsp->status11 & AR_PreDelimCRCErr)
+                rxs->rs_flags |= ATH9K_RX_DELIM_CRC_PRE;
+
+        if (rxsp->status11 & AR_PostDelimCRCErr)
+                rxs->rs_flags |= ATH9K_RX_DELIM_CRC_POST;
+
+        if (rxsp->status11 & AR_DecryptBusyErr)
+                rxs->rs_flags |= ATH9K_RX_DECRYPT_BUSY;
+
+        if ((rxsp->status11 & AR_RxFrameOK) == 0) {
+                if (rxsp->status11 & AR_CRCErr) {
+                        rxs->rs_status |= ATH9K_RXERR_CRC;
+                } else if (rxsp->status11 & AR_PHYErr) {
+                        rxs->rs_status |= ATH9K_RXERR_PHY;
+                        phyerr = MS(rxsp->status11, AR_PHYErrCode);
+                        rxs->rs_phyerr = phyerr;
+                } else if (rxsp->status11 & AR_DecryptCRCErr) {
+                        rxs->rs_status |= ATH9K_RXERR_DECRYPT;
+                } else if (rxsp->status11 & AR_MichaelErr) {
+                        rxs->rs_status |= ATH9K_RXERR_MIC;
+                }
+        }
+
+        return 0;
+}
+EXPORT_SYMBOL(ath9k_hw_process_rxdesc_edma);