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authorDavid S. Miller <davem@davemloft.net>2016-07-06 13:35:22 -0400
committerDavid S. Miller <davem@davemloft.net>2016-07-06 13:35:22 -0400
commit30d0844bdcea9fb8b0b3c8abfa5547bc3bcf8baa (patch)
tree87302af9e03ee50cf135cc9ce6589f41fe3b3db1 /drivers/net/phy
parentae3e4562e2ce0149a4424c994a282955700711e7 (diff)
parentbc86765181aa26cc9afcb0a6f9f253cbb1186f26 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Conflicts: drivers/net/ethernet/mellanox/mlx5/core/en.h drivers/net/ethernet/mellanox/mlx5/core/en_main.c drivers/net/usb/r8152.c All three conflicts were overlapping changes. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r--drivers/net/phy/dp83867.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c
index 2afa61b51d41..91177a4a32ad 100644
--- a/drivers/net/phy/dp83867.c
+++ b/drivers/net/phy/dp83867.c
@@ -57,6 +57,7 @@
57 57
58/* PHY CTRL bits */ 58/* PHY CTRL bits */
59#define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14 59#define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14
60#define DP83867_PHYCR_FIFO_DEPTH_MASK (3 << 14)
60 61
61/* RGMIIDCTL bits */ 62/* RGMIIDCTL bits */
62#define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4 63#define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4
@@ -133,8 +134,8 @@ static int dp83867_of_init(struct phy_device *phydev)
133static int dp83867_config_init(struct phy_device *phydev) 134static int dp83867_config_init(struct phy_device *phydev)
134{ 135{
135 struct dp83867_private *dp83867; 136 struct dp83867_private *dp83867;
136 int ret; 137 int ret, val;
137 u16 val, delay; 138 u16 delay;
138 139
139 if (!phydev->priv) { 140 if (!phydev->priv) {
140 dp83867 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83867), 141 dp83867 = devm_kzalloc(&phydev->mdio.dev, sizeof(*dp83867),
@@ -151,8 +152,12 @@ static int dp83867_config_init(struct phy_device *phydev)
151 } 152 }
152 153
153 if (phy_interface_is_rgmii(phydev)) { 154 if (phy_interface_is_rgmii(phydev)) {
154 ret = phy_write(phydev, MII_DP83867_PHYCTRL, 155 val = phy_read(phydev, MII_DP83867_PHYCTRL);
155 (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT)); 156 if (val < 0)
157 return val;
158 val &= ~DP83867_PHYCR_FIFO_DEPTH_MASK;
159 val |= (dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT);
160 ret = phy_write(phydev, MII_DP83867_PHYCTRL, val);
156 if (ret) 161 if (ret)
157 return ret; 162 return ret;
158 } 163 }