diff options
author | hayeswang <hayeswang@realtek.com> | 2013-04-01 18:23:41 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2013-04-07 16:44:13 -0400 |
commit | 1a9646497b163a8b9da5e70008d809dc91b32855 (patch) | |
tree | c48323e5574c08dbcd3755489c24e8cc73520d05 /drivers/net/ethernet/realtek | |
parent | 57538c4a89506c333b480ff5bdfcd4f16f78ccdf (diff) |
r8169: adjust the flow of hw_start
The suggestion as following:
- initial settings or default settings
- rtl_hw_start_xxx. rtl_hw_start_xxx may change some default settings.
- enable tx/rx. This has to be after the above two steps.
- rtl_set_rx_mode. AcceptXXXs have to be enabled after enabling tx/rx.
Signed-off-by: Hayes Wang <hayeswang@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/realtek')
-rw-r--r-- | drivers/net/ethernet/realtek/r8169.c | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index 573b693cb10e..85536bf5e762 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c | |||
@@ -5240,10 +5240,7 @@ static void rtl_hw_start_8168(struct net_device *dev) | |||
5240 | 5240 | ||
5241 | rtl_set_rx_tx_desc_registers(tp, ioaddr); | 5241 | rtl_set_rx_tx_desc_registers(tp, ioaddr); |
5242 | 5242 | ||
5243 | rtl_set_rx_mode(dev); | 5243 | rtl_set_rx_tx_config_registers(tp); |
5244 | |||
5245 | RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) | | ||
5246 | (InterFrameGap << TxInterFrameGapShift)); | ||
5247 | 5244 | ||
5248 | RTL_R8(IntrMask); | 5245 | RTL_R8(IntrMask); |
5249 | 5246 | ||
@@ -5330,9 +5327,11 @@ static void rtl_hw_start_8168(struct net_device *dev) | |||
5330 | break; | 5327 | break; |
5331 | } | 5328 | } |
5332 | 5329 | ||
5330 | RTL_W8(Cfg9346, Cfg9346_Lock); | ||
5331 | |||
5333 | RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); | 5332 | RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); |
5334 | 5333 | ||
5335 | RTL_W8(Cfg9346, Cfg9346_Lock); | 5334 | rtl_set_rx_mode(dev); |
5336 | 5335 | ||
5337 | RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000); | 5336 | RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xF000); |
5338 | } | 5337 | } |
@@ -5490,6 +5489,17 @@ static void rtl_hw_start_8101(struct net_device *dev) | |||
5490 | 5489 | ||
5491 | RTL_W8(Cfg9346, Cfg9346_Unlock); | 5490 | RTL_W8(Cfg9346, Cfg9346_Unlock); |
5492 | 5491 | ||
5492 | RTL_W8(MaxTxPacketSize, TxPacketMax); | ||
5493 | |||
5494 | rtl_set_rx_max_size(ioaddr, rx_buf_sz); | ||
5495 | |||
5496 | tp->cp_cmd &= ~R810X_CPCMD_QUIRK_MASK; | ||
5497 | RTL_W16(CPlusCmd, tp->cp_cmd); | ||
5498 | |||
5499 | rtl_set_rx_tx_desc_registers(tp, ioaddr); | ||
5500 | |||
5501 | rtl_set_rx_tx_config_registers(tp); | ||
5502 | |||
5493 | switch (tp->mac_version) { | 5503 | switch (tp->mac_version) { |
5494 | case RTL_GIGA_MAC_VER_07: | 5504 | case RTL_GIGA_MAC_VER_07: |
5495 | rtl_hw_start_8102e_1(tp); | 5505 | rtl_hw_start_8102e_1(tp); |
@@ -5521,24 +5531,14 @@ static void rtl_hw_start_8101(struct net_device *dev) | |||
5521 | 5531 | ||
5522 | RTL_W8(Cfg9346, Cfg9346_Lock); | 5532 | RTL_W8(Cfg9346, Cfg9346_Lock); |
5523 | 5533 | ||
5524 | RTL_W8(MaxTxPacketSize, TxPacketMax); | ||
5525 | |||
5526 | rtl_set_rx_max_size(ioaddr, rx_buf_sz); | ||
5527 | |||
5528 | tp->cp_cmd &= ~R810X_CPCMD_QUIRK_MASK; | ||
5529 | RTL_W16(CPlusCmd, tp->cp_cmd); | ||
5530 | |||
5531 | RTL_W16(IntrMitigate, 0x0000); | 5534 | RTL_W16(IntrMitigate, 0x0000); |
5532 | 5535 | ||
5533 | rtl_set_rx_tx_desc_registers(tp, ioaddr); | ||
5534 | |||
5535 | RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); | 5536 | RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); |
5536 | rtl_set_rx_tx_config_registers(tp); | ||
5537 | |||
5538 | RTL_R8(IntrMask); | ||
5539 | 5537 | ||
5540 | rtl_set_rx_mode(dev); | 5538 | rtl_set_rx_mode(dev); |
5541 | 5539 | ||
5540 | RTL_R8(IntrMask); | ||
5541 | |||
5542 | RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000); | 5542 | RTL_W16(MultiIntr, RTL_R16(MultiIntr) & 0xf000); |
5543 | } | 5543 | } |
5544 | 5544 | ||