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authorVivien Didelot <vivien.didelot@savoirfairelinux.com>2016-07-18 20:45:29 -0400
committerDavid S. Miller <davem@davemloft.net>2016-07-19 22:42:00 -0400
commitd51c542b782fac35a9f37a23391f3bee884b7401 (patch)
tree5ba91515af7927fbdff5e50d1cab27794b4c51bb /drivers/net/dsa
parent183fc1537ec39be242dc8b619f71fc11b393d295 (diff)
net: dsa: mv88e6xxx: remove basic function flags
All 88E6xxx Marvell switches (even the old not supported yet 88E6060) have at least an ATU, per-port STP states and VLAN map, to run basic switch functions such as Spanning Tree and port based VLANs. Get rid of the related MV88E6XXX_FLAG_{ATU,PORTSTATE,VLANTABLE} flags, as they are defaults to every chip. This enables STP on 6185 and removes many inconsistencies on others. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/dsa')
-rw-r--r--drivers/net/dsa/mv88e6xxx/chip.c23
-rw-r--r--drivers/net/dsa/mv88e6xxx/mv88e6xxx.h46
2 files changed, 6 insertions, 63 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 5cb06f7673af..3feb842ec1d6 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -1460,9 +1460,6 @@ static void mv88e6xxx_port_stp_state_set(struct dsa_switch *ds, int port,
1460 int stp_state; 1460 int stp_state;
1461 int err; 1461 int err;
1462 1462
1463 if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_PORTSTATE))
1464 return;
1465
1466 switch (state) { 1463 switch (state) {
1467 case BR_STATE_DISABLED: 1464 case BR_STATE_DISABLED:
1468 stp_state = PORT_CONTROL_STATE_DISABLED; 1465 stp_state = PORT_CONTROL_STATE_DISABLED;
@@ -2398,11 +2395,6 @@ static int mv88e6xxx_port_fdb_prepare(struct dsa_switch *ds, int port,
2398 const struct switchdev_obj_port_fdb *fdb, 2395 const struct switchdev_obj_port_fdb *fdb,
2399 struct switchdev_trans *trans) 2396 struct switchdev_trans *trans)
2400{ 2397{
2401 struct mv88e6xxx_chip *chip = ds_to_priv(ds);
2402
2403 if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_ATU))
2404 return -EOPNOTSUPP;
2405
2406 /* We don't need any dynamic resource from the kernel (yet), 2398 /* We don't need any dynamic resource from the kernel (yet),
2407 * so skip the prepare phase. 2399 * so skip the prepare phase.
2408 */ 2400 */
@@ -2418,9 +2410,6 @@ static void mv88e6xxx_port_fdb_add(struct dsa_switch *ds, int port,
2418 GLOBAL_ATU_DATA_STATE_UC_STATIC; 2410 GLOBAL_ATU_DATA_STATE_UC_STATIC;
2419 struct mv88e6xxx_chip *chip = ds_to_priv(ds); 2411 struct mv88e6xxx_chip *chip = ds_to_priv(ds);
2420 2412
2421 if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_ATU))
2422 return;
2423
2424 mutex_lock(&chip->reg_lock); 2413 mutex_lock(&chip->reg_lock);
2425 if (_mv88e6xxx_port_fdb_load(chip, port, fdb->addr, fdb->vid, state)) 2414 if (_mv88e6xxx_port_fdb_load(chip, port, fdb->addr, fdb->vid, state))
2426 netdev_err(ds->ports[port].netdev, 2415 netdev_err(ds->ports[port].netdev,
@@ -2434,9 +2423,6 @@ static int mv88e6xxx_port_fdb_del(struct dsa_switch *ds, int port,
2434 struct mv88e6xxx_chip *chip = ds_to_priv(ds); 2423 struct mv88e6xxx_chip *chip = ds_to_priv(ds);
2435 int ret; 2424 int ret;
2436 2425
2437 if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_ATU))
2438 return -EOPNOTSUPP;
2439
2440 mutex_lock(&chip->reg_lock); 2426 mutex_lock(&chip->reg_lock);
2441 ret = _mv88e6xxx_port_fdb_load(chip, port, fdb->addr, fdb->vid, 2427 ret = _mv88e6xxx_port_fdb_load(chip, port, fdb->addr, fdb->vid,
2442 GLOBAL_ATU_DATA_STATE_UNUSED); 2428 GLOBAL_ATU_DATA_STATE_UNUSED);
@@ -2542,9 +2528,6 @@ static int mv88e6xxx_port_fdb_dump(struct dsa_switch *ds, int port,
2542 u16 fid; 2528 u16 fid;
2543 int err; 2529 int err;
2544 2530
2545 if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_ATU))
2546 return -EOPNOTSUPP;
2547
2548 mutex_lock(&chip->reg_lock); 2531 mutex_lock(&chip->reg_lock);
2549 2532
2550 /* Dump port's default Filtering Information Database (VLAN ID 0) */ 2533 /* Dump port's default Filtering Information Database (VLAN ID 0) */
@@ -2587,9 +2570,6 @@ static int mv88e6xxx_port_bridge_join(struct dsa_switch *ds, int port,
2587 struct mv88e6xxx_chip *chip = ds_to_priv(ds); 2570 struct mv88e6xxx_chip *chip = ds_to_priv(ds);
2588 int i, err = 0; 2571 int i, err = 0;
2589 2572
2590 if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_VLANTABLE))
2591 return -EOPNOTSUPP;
2592
2593 mutex_lock(&chip->reg_lock); 2573 mutex_lock(&chip->reg_lock);
2594 2574
2595 /* Assign the bridge and remap each port's VLANTable */ 2575 /* Assign the bridge and remap each port's VLANTable */
@@ -2614,9 +2594,6 @@ static void mv88e6xxx_port_bridge_leave(struct dsa_switch *ds, int port)
2614 struct net_device *bridge = chip->ports[port].bridge_dev; 2594 struct net_device *bridge = chip->ports[port].bridge_dev;
2615 int i; 2595 int i;
2616 2596
2617 if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_VLANTABLE))
2618 return;
2619
2620 mutex_lock(&chip->reg_lock); 2597 mutex_lock(&chip->reg_lock);
2621 2598
2622 /* Unassign the bridge and remap each port's VLANTable */ 2599 /* Unassign the bridge and remap each port's VLANTable */
diff --git a/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h b/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h
index 83f06620133d..2ff62f4b8224 100644
--- a/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h
+++ b/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h
@@ -374,11 +374,6 @@ enum mv88e6xxx_family {
374}; 374};
375 375
376enum mv88e6xxx_cap { 376enum mv88e6xxx_cap {
377 /* Address Translation Unit.
378 * The ATU is used to lookup and learn MAC addresses. See GLOBAL_ATU_OP.
379 */
380 MV88E6XXX_CAP_ATU,
381
382 /* Energy Efficient Ethernet. 377 /* Energy Efficient Ethernet.
383 */ 378 */
384 MV88E6XXX_CAP_EEE, 379 MV88E6XXX_CAP_EEE,
@@ -394,11 +389,6 @@ enum mv88e6xxx_cap {
394 */ 389 */
395 MV88E6XXX_CAP_MULTI_CHIP, 390 MV88E6XXX_CAP_MULTI_CHIP,
396 391
397 /* Port State Filtering for 802.1D Spanning Tree.
398 * See PORT_CONTROL_STATE_* values in the PORT_CONTROL register.
399 */
400 MV88E6XXX_CAP_PORTSTATE,
401
402 /* PHY Polling Unit. 392 /* PHY Polling Unit.
403 * See GLOBAL_CONTROL_PPU_ENABLE and GLOBAL_STATUS_PPU_POLLING. 393 * See GLOBAL_CONTROL_PPU_ENABLE and GLOBAL_STATUS_PPU_POLLING.
404 */ 394 */
@@ -430,12 +420,6 @@ enum mv88e6xxx_cap {
430 MV88E6XXX_CAP_TEMP, 420 MV88E6XXX_CAP_TEMP,
431 MV88E6XXX_CAP_TEMP_LIMIT, 421 MV88E6XXX_CAP_TEMP_LIMIT,
432 422
433 /* In-chip Port Based VLANs.
434 * Each port VLANTable register (see PORT_BASE_VLAN) is used to restrict
435 * the output (or egress) ports to which it is allowed to send frames.
436 */
437 MV88E6XXX_CAP_VLANTABLE,
438
439 /* VLAN Table Unit. 423 /* VLAN Table Unit.
440 * The VTU is used to program 802.1Q VLANs. See GLOBAL_VTU_OP. 424 * The VTU is used to program 802.1Q VLANs. See GLOBAL_VTU_OP.
441 */ 425 */
@@ -443,11 +427,9 @@ enum mv88e6xxx_cap {
443}; 427};
444 428
445/* Bitmask of capabilities */ 429/* Bitmask of capabilities */
446#define MV88E6XXX_FLAG_ATU BIT(MV88E6XXX_CAP_ATU)
447#define MV88E6XXX_FLAG_EEE BIT(MV88E6XXX_CAP_EEE) 430#define MV88E6XXX_FLAG_EEE BIT(MV88E6XXX_CAP_EEE)
448#define MV88E6XXX_FLAG_EEPROM BIT(MV88E6XXX_CAP_EEPROM) 431#define MV88E6XXX_FLAG_EEPROM BIT(MV88E6XXX_CAP_EEPROM)
449#define MV88E6XXX_FLAG_MULTI_CHIP BIT(MV88E6XXX_CAP_MULTI_CHIP) 432#define MV88E6XXX_FLAG_MULTI_CHIP BIT(MV88E6XXX_CAP_MULTI_CHIP)
450#define MV88E6XXX_FLAG_PORTSTATE BIT(MV88E6XXX_CAP_PORTSTATE)
451#define MV88E6XXX_FLAG_PPU BIT(MV88E6XXX_CAP_PPU) 433#define MV88E6XXX_FLAG_PPU BIT(MV88E6XXX_CAP_PPU)
452#define MV88E6XXX_FLAG_PPU_ACTIVE BIT(MV88E6XXX_CAP_PPU_ACTIVE) 434#define MV88E6XXX_FLAG_PPU_ACTIVE BIT(MV88E6XXX_CAP_PPU_ACTIVE)
453#define MV88E6XXX_FLAG_SMI_PHY BIT(MV88E6XXX_CAP_SMI_PHY) 435#define MV88E6XXX_FLAG_SMI_PHY BIT(MV88E6XXX_CAP_SMI_PHY)
@@ -455,22 +437,17 @@ enum mv88e6xxx_cap {
455#define MV88E6XXX_FLAG_SWITCH_MAC BIT(MV88E6XXX_CAP_SWITCH_MAC_WOL_WOF) 437#define MV88E6XXX_FLAG_SWITCH_MAC BIT(MV88E6XXX_CAP_SWITCH_MAC_WOL_WOF)
456#define MV88E6XXX_FLAG_TEMP BIT(MV88E6XXX_CAP_TEMP) 438#define MV88E6XXX_FLAG_TEMP BIT(MV88E6XXX_CAP_TEMP)
457#define MV88E6XXX_FLAG_TEMP_LIMIT BIT(MV88E6XXX_CAP_TEMP_LIMIT) 439#define MV88E6XXX_FLAG_TEMP_LIMIT BIT(MV88E6XXX_CAP_TEMP_LIMIT)
458#define MV88E6XXX_FLAG_VLANTABLE BIT(MV88E6XXX_CAP_VLANTABLE)
459#define MV88E6XXX_FLAG_VTU BIT(MV88E6XXX_CAP_VTU) 440#define MV88E6XXX_FLAG_VTU BIT(MV88E6XXX_CAP_VTU)
460 441
461#define MV88E6XXX_FLAGS_FAMILY_6095 \ 442#define MV88E6XXX_FLAGS_FAMILY_6095 \
462 (MV88E6XXX_FLAG_ATU | \ 443 (MV88E6XXX_FLAG_MULTI_CHIP | \
463 MV88E6XXX_FLAG_MULTI_CHIP | \
464 MV88E6XXX_FLAG_PPU | \ 444 MV88E6XXX_FLAG_PPU | \
465 MV88E6XXX_FLAG_VLANTABLE | \
466 MV88E6XXX_FLAG_VTU) 445 MV88E6XXX_FLAG_VTU)
467 446
468#define MV88E6XXX_FLAGS_FAMILY_6097 \ 447#define MV88E6XXX_FLAGS_FAMILY_6097 \
469 (MV88E6XXX_FLAG_ATU | \ 448 (MV88E6XXX_FLAG_MULTI_CHIP | \
470 MV88E6XXX_FLAG_MULTI_CHIP | \
471 MV88E6XXX_FLAG_PPU | \ 449 MV88E6XXX_FLAG_PPU | \
472 MV88E6XXX_FLAG_STU | \ 450 MV88E6XXX_FLAG_STU | \
473 MV88E6XXX_FLAG_VLANTABLE | \
474 MV88E6XXX_FLAG_VTU) 451 MV88E6XXX_FLAG_VTU)
475 452
476#define MV88E6XXX_FLAGS_FAMILY_6165 \ 453#define MV88E6XXX_FLAGS_FAMILY_6165 \
@@ -481,51 +458,40 @@ enum mv88e6xxx_cap {
481 MV88E6XXX_FLAG_VTU) 458 MV88E6XXX_FLAG_VTU)
482 459
483#define MV88E6XXX_FLAGS_FAMILY_6185 \ 460#define MV88E6XXX_FLAGS_FAMILY_6185 \
484 (MV88E6XXX_FLAG_ATU | \ 461 (MV88E6XXX_FLAG_MULTI_CHIP | \
485 MV88E6XXX_FLAG_MULTI_CHIP | \
486 MV88E6XXX_FLAG_PPU | \ 462 MV88E6XXX_FLAG_PPU | \
487 MV88E6XXX_FLAG_VLANTABLE | \
488 MV88E6XXX_FLAG_VTU) 463 MV88E6XXX_FLAG_VTU)
489 464
490#define MV88E6XXX_FLAGS_FAMILY_6320 \ 465#define MV88E6XXX_FLAGS_FAMILY_6320 \
491 (MV88E6XXX_FLAG_ATU | \ 466 (MV88E6XXX_FLAG_EEE | \
492 MV88E6XXX_FLAG_EEE | \
493 MV88E6XXX_FLAG_EEPROM | \ 467 MV88E6XXX_FLAG_EEPROM | \
494 MV88E6XXX_FLAG_MULTI_CHIP | \ 468 MV88E6XXX_FLAG_MULTI_CHIP | \
495 MV88E6XXX_FLAG_PORTSTATE | \
496 MV88E6XXX_FLAG_PPU_ACTIVE | \ 469 MV88E6XXX_FLAG_PPU_ACTIVE | \
497 MV88E6XXX_FLAG_SMI_PHY | \ 470 MV88E6XXX_FLAG_SMI_PHY | \
498 MV88E6XXX_FLAG_SWITCH_MAC | \ 471 MV88E6XXX_FLAG_SWITCH_MAC | \
499 MV88E6XXX_FLAG_TEMP | \ 472 MV88E6XXX_FLAG_TEMP | \
500 MV88E6XXX_FLAG_TEMP_LIMIT | \ 473 MV88E6XXX_FLAG_TEMP_LIMIT | \
501 MV88E6XXX_FLAG_VLANTABLE | \
502 MV88E6XXX_FLAG_VTU) 474 MV88E6XXX_FLAG_VTU)
503 475
504#define MV88E6XXX_FLAGS_FAMILY_6351 \ 476#define MV88E6XXX_FLAGS_FAMILY_6351 \
505 (MV88E6XXX_FLAG_ATU | \ 477 (MV88E6XXX_FLAG_MULTI_CHIP | \
506 MV88E6XXX_FLAG_MULTI_CHIP | \
507 MV88E6XXX_FLAG_PORTSTATE | \
508 MV88E6XXX_FLAG_PPU_ACTIVE | \ 478 MV88E6XXX_FLAG_PPU_ACTIVE | \
509 MV88E6XXX_FLAG_SMI_PHY | \ 479 MV88E6XXX_FLAG_SMI_PHY | \
510 MV88E6XXX_FLAG_STU | \ 480 MV88E6XXX_FLAG_STU | \
511 MV88E6XXX_FLAG_SWITCH_MAC | \ 481 MV88E6XXX_FLAG_SWITCH_MAC | \
512 MV88E6XXX_FLAG_TEMP | \ 482 MV88E6XXX_FLAG_TEMP | \
513 MV88E6XXX_FLAG_VLANTABLE | \
514 MV88E6XXX_FLAG_VTU) 483 MV88E6XXX_FLAG_VTU)
515 484
516#define MV88E6XXX_FLAGS_FAMILY_6352 \ 485#define MV88E6XXX_FLAGS_FAMILY_6352 \
517 (MV88E6XXX_FLAG_ATU | \ 486 (MV88E6XXX_FLAG_EEE | \
518 MV88E6XXX_FLAG_EEE | \
519 MV88E6XXX_FLAG_EEPROM | \ 487 MV88E6XXX_FLAG_EEPROM | \
520 MV88E6XXX_FLAG_MULTI_CHIP | \ 488 MV88E6XXX_FLAG_MULTI_CHIP | \
521 MV88E6XXX_FLAG_PORTSTATE | \
522 MV88E6XXX_FLAG_PPU_ACTIVE | \ 489 MV88E6XXX_FLAG_PPU_ACTIVE | \
523 MV88E6XXX_FLAG_SMI_PHY | \ 490 MV88E6XXX_FLAG_SMI_PHY | \
524 MV88E6XXX_FLAG_STU | \ 491 MV88E6XXX_FLAG_STU | \
525 MV88E6XXX_FLAG_SWITCH_MAC | \ 492 MV88E6XXX_FLAG_SWITCH_MAC | \
526 MV88E6XXX_FLAG_TEMP | \ 493 MV88E6XXX_FLAG_TEMP | \
527 MV88E6XXX_FLAG_TEMP_LIMIT | \ 494 MV88E6XXX_FLAG_TEMP_LIMIT | \
528 MV88E6XXX_FLAG_VLANTABLE | \
529 MV88E6XXX_FLAG_VTU) 495 MV88E6XXX_FLAG_VTU)
530 496
531struct mv88e6xxx_info { 497struct mv88e6xxx_info {