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authorJon Hunter <jonathanh@nvidia.com>2016-05-10 11:14:45 -0400
committerMarc Zyngier <marc.zyngier@arm.com>2016-05-11 05:12:44 -0400
commitd6490461a102094891d8a2712c51365f86ac1a40 (patch)
treee3fe1419962edd1ece543b25150103ba0edbd3c9 /drivers/irqchip/irq-gic.c
parentf673b9b5cb5453fa14032d99edd55f49ac3980cc (diff)
irqchip/gic: Add helper functions for GIC setup and teardown
Move the code that sets-up a GIC via device-tree into it's own function and add a generic function for GIC teardown that can be used for both device-tree and ACPI to unmap the GIC memory. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'drivers/irqchip/irq-gic.c')
-rw-r--r--drivers/irqchip/irq-gic.c61
1 files changed, 42 insertions, 19 deletions
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index f4c14f9ca15b..113e2d02c812 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -1197,6 +1197,17 @@ void __init gic_init(unsigned int gic_nr, int irq_start,
1197 __gic_init_bases(gic, irq_start, NULL); 1197 __gic_init_bases(gic, irq_start, NULL);
1198} 1198}
1199 1199
1200static void gic_teardown(struct gic_chip_data *gic)
1201{
1202 if (WARN_ON(!gic))
1203 return;
1204
1205 if (gic->raw_dist_base)
1206 iounmap(gic->raw_dist_base);
1207 if (gic->raw_cpu_base)
1208 iounmap(gic->raw_cpu_base);
1209}
1210
1200#ifdef CONFIG_OF 1211#ifdef CONFIG_OF
1201static int gic_cnt __initdata; 1212static int gic_cnt __initdata;
1202 1213
@@ -1238,6 +1249,30 @@ static bool gic_check_eoimode(struct device_node *node, void __iomem **base)
1238 return true; 1249 return true;
1239} 1250}
1240 1251
1252static int gic_of_setup(struct gic_chip_data *gic, struct device_node *node)
1253{
1254 if (!gic || !node)
1255 return -EINVAL;
1256
1257 gic->raw_dist_base = of_iomap(node, 0);
1258 if (WARN(!gic->raw_dist_base, "unable to map gic dist registers\n"))
1259 goto error;
1260
1261 gic->raw_cpu_base = of_iomap(node, 1);
1262 if (WARN(!gic->raw_cpu_base, "unable to map gic cpu registers\n"))
1263 goto error;
1264
1265 if (of_property_read_u32(node, "cpu-offset", &gic->percpu_offset))
1266 gic->percpu_offset = 0;
1267
1268 return 0;
1269
1270error:
1271 gic_teardown(gic);
1272
1273 return -ENOMEM;
1274}
1275
1241int __init 1276int __init
1242gic_of_init(struct device_node *node, struct device_node *parent) 1277gic_of_init(struct device_node *node, struct device_node *parent)
1243{ 1278{
@@ -1252,15 +1287,9 @@ gic_of_init(struct device_node *node, struct device_node *parent)
1252 1287
1253 gic = &gic_data[gic_cnt]; 1288 gic = &gic_data[gic_cnt];
1254 1289
1255 gic->raw_dist_base = of_iomap(node, 0); 1290 ret = gic_of_setup(gic, node);
1256 if (WARN(!gic->raw_dist_base, "unable to map gic dist registers\n")) 1291 if (ret)
1257 return -ENOMEM; 1292 return ret;
1258
1259 gic->raw_cpu_base = of_iomap(node, 1);
1260 if (WARN(!gic->raw_cpu_base, "unable to map gic cpu registers\n")) {
1261 iounmap(gic->raw_dist_base);
1262 return -ENOMEM;
1263 }
1264 1293
1265 /* 1294 /*
1266 * Disable split EOI/Deactivate if either HYP is not available 1295 * Disable split EOI/Deactivate if either HYP is not available
@@ -1269,13 +1298,9 @@ gic_of_init(struct device_node *node, struct device_node *parent)
1269 if (gic_cnt == 0 && !gic_check_eoimode(node, &gic->raw_cpu_base)) 1298 if (gic_cnt == 0 && !gic_check_eoimode(node, &gic->raw_cpu_base))
1270 static_key_slow_dec(&supports_deactivate); 1299 static_key_slow_dec(&supports_deactivate);
1271 1300
1272 if (of_property_read_u32(node, "cpu-offset", &gic->percpu_offset))
1273 gic->percpu_offset = 0;
1274
1275 ret = __gic_init_bases(gic, -1, &node->fwnode); 1301 ret = __gic_init_bases(gic, -1, &node->fwnode);
1276 if (ret) { 1302 if (ret) {
1277 iounmap(gic->raw_dist_base); 1303 gic_teardown(gic);
1278 iounmap(gic->raw_cpu_base);
1279 return ret; 1304 return ret;
1280 } 1305 }
1281 1306
@@ -1388,7 +1413,7 @@ static int __init gic_v2_acpi_init(struct acpi_subtable_header *header,
1388 ACPI_GICV2_DIST_MEM_SIZE); 1413 ACPI_GICV2_DIST_MEM_SIZE);
1389 if (!gic->raw_dist_base) { 1414 if (!gic->raw_dist_base) {
1390 pr_err("Unable to map GICD registers\n"); 1415 pr_err("Unable to map GICD registers\n");
1391 iounmap(gic->raw_cpu_base); 1416 gic_teardown(gic);
1392 return -ENOMEM; 1417 return -ENOMEM;
1393 } 1418 }
1394 1419
@@ -1406,8 +1431,7 @@ static int __init gic_v2_acpi_init(struct acpi_subtable_header *header,
1406 domain_handle = irq_domain_alloc_fwnode(gic->raw_dist_base); 1431 domain_handle = irq_domain_alloc_fwnode(gic->raw_dist_base);
1407 if (!domain_handle) { 1432 if (!domain_handle) {
1408 pr_err("Unable to allocate domain handle\n"); 1433 pr_err("Unable to allocate domain handle\n");
1409 iounmap(gic->raw_cpu_base); 1434 gic_teardown(gic);
1410 iounmap(gic->raw_dist_base);
1411 return -ENOMEM; 1435 return -ENOMEM;
1412 } 1436 }
1413 1437
@@ -1415,8 +1439,7 @@ static int __init gic_v2_acpi_init(struct acpi_subtable_header *header,
1415 if (ret) { 1439 if (ret) {
1416 pr_err("Failed to initialise GIC\n"); 1440 pr_err("Failed to initialise GIC\n");
1417 irq_domain_free_fwnode(domain_handle); 1441 irq_domain_free_fwnode(domain_handle);
1418 iounmap(gic->raw_cpu_base); 1442 gic_teardown(gic);
1419 iounmap(gic->raw_dist_base);
1420 return ret; 1443 return ret;
1421 } 1444 }
1422 1445