iommu/amd: Implements irq_set_vcpu_affinity() hook to setup vapic mode for pass-through devices

This patch implements irq_set_vcpu_affinity() function to set up interrupt
remapping table entry with vapic mode for pass-through devices.

In case requirements for vapic mode are not met, it falls back to set up
the IRTE in legacy mode.

Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>

1 files changed, 64 insertions, 4 deletions

diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index 089e1ed4deec..69fc57e0b975 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -3718,7 +3718,8 @@ out:
         return index;
 }
 
-static int modify_irte_ga(u16 devid, int index, struct irte_ga *irte)
+static int modify_irte_ga(u16 devid, int index, struct irte_ga *irte,
+                          struct amd_ir_data *data)
 {
         struct irq_remap_table *table;
         struct amd_iommu *iommu;
@@ -3741,6 +3742,8 @@ static int modify_irte_ga(u16 devid, int index, struct irte_ga *irte)
         entry->hi.val = irte->hi.val;
         entry->lo.val = irte->lo.val;
         entry->lo.fields_remap.valid = 1;
+        if (data)
+                data->ref = entry;
 
         spin_unlock_irqrestore(&table->lock, flags);
 
@@ -3839,7 +3842,7 @@ static void irte_ga_activate(void *entry, u16 devid, u16 index)
         struct irte_ga *irte = (struct irte_ga *) entry;
 
         irte->lo.fields_remap.valid = 1;
-        modify_irte_ga(devid, index, irte);
+        modify_irte_ga(devid, index, irte, NULL);
 }
 
 static void irte_deactivate(void *entry, u16 devid, u16 index)
@@ -3855,7 +3858,7 @@ static void irte_ga_deactivate(void *entry, u16 devid, u16 index)
         struct irte_ga *irte = (struct irte_ga *) entry;
 
         irte->lo.fields_remap.valid = 0;
-        modify_irte_ga(devid, index, irte);
+        modify_irte_ga(devid, index, irte, NULL);
 }
 
 static void irte_set_affinity(void *entry, u16 devid, u16 index,
@@ -3876,7 +3879,7 @@ static void irte_ga_set_affinity(void *entry, u16 devid, u16 index,
         irte->hi.fields.vector = vector;
         irte->lo.fields_remap.destination = dest_apicid;
         irte->lo.fields_remap.guest_mode = 0;
-        modify_irte_ga(devid, index, irte);
+        modify_irte_ga(devid, index, irte, NULL);
 }
 
 #define IRTE_ALLOCATED (~1U)
@@ -4211,6 +4214,62 @@ static struct irq_domain_ops amd_ir_domain_ops = {
         .deactivate = irq_remapping_deactivate,
 };
 
+static int amd_ir_set_vcpu_affinity(struct irq_data *data, void *vcpu_info)
+{
+        struct amd_iommu *iommu;
+        struct amd_iommu_pi_data *pi_data = vcpu_info;
+        struct vcpu_data *vcpu_pi_info = pi_data->vcpu_data;
+        struct amd_ir_data *ir_data = data->chip_data;
+        struct irte_ga *irte = (struct irte_ga *) ir_data->entry;
+        struct irq_2_irte *irte_info = &ir_data->irq_2_irte;
+
+        pi_data->ir_data = ir_data;
+
+        /* Note:
+         * SVM tries to set up for VAPIC mode, but we are in
+         * legacy mode. So, we force legacy mode instead.
+         */
+        if (!AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir)) {
+                pr_debug("AMD-Vi: %s: Fall back to using intr legacy remap\n",
+                         __func__);
+                pi_data->is_guest_mode = false;
+        }
+
+        iommu = amd_iommu_rlookup_table[irte_info->devid];
+        if (iommu == NULL)
+                return -EINVAL;
+
+        pi_data->prev_ga_tag = ir_data->cached_ga_tag;
+        if (pi_data->is_guest_mode) {
+                /* Setting */
+                irte->hi.fields.ga_root_ptr = (pi_data->base >> 12);
+                irte->hi.fields.vector = vcpu_pi_info->vector;
+                irte->lo.fields_vapic.guest_mode = 1;
+                irte->lo.fields_vapic.ga_tag = pi_data->ga_tag;
+
+                ir_data->cached_ga_tag = pi_data->ga_tag;
+        } else {
+                /* Un-Setting */
+                struct irq_cfg *cfg = irqd_cfg(data);
+
+                irte->hi.val = 0;
+                irte->lo.val = 0;
+                irte->hi.fields.vector = cfg->vector;
+                irte->lo.fields_remap.guest_mode = 0;
+                irte->lo.fields_remap.destination = cfg->dest_apicid;
+                irte->lo.fields_remap.int_type = apic->irq_delivery_mode;
+                irte->lo.fields_remap.dm = apic->irq_dest_mode;
+
+                /*
+                 * This communicates the ga_tag back to the caller
+                 * so that it can do all the necessary clean up.
+                 */
+                ir_data->cached_ga_tag = 0;
+        }
+
+        return modify_irte_ga(irte_info->devid, irte_info->index, irte, ir_data);
+}
+
 static int amd_ir_set_affinity(struct irq_data *data,
                                const struct cpumask *mask, bool force)
 {
@@ -4255,6 +4314,7 @@ static void ir_compose_msi_msg(struct irq_data *irq_data, struct msi_msg *msg)
 static struct irq_chip amd_ir_chip = {
         .irq_ack = ir_ack_apic_edge,
         .irq_set_affinity = amd_ir_set_affinity,
+        .irq_set_vcpu_affinity = amd_ir_set_vcpu_affinity,
         .irq_compose_msi_msg = ir_compose_msi_msg,
 };