diff options
author | Sebastian Reichel <sre@kernel.org> | 2016-04-30 10:23:12 -0400 |
---|---|---|
committer | Sebastian Reichel <sre@kernel.org> | 2016-06-27 18:37:43 -0400 |
commit | b6616be32412a4c9a0f04aec247d2760fcad8cfd (patch) | |
tree | f10d15b2e399c57c1fdb485d223ca0307a9e7846 /drivers/hsi/controllers | |
parent | 8c009f1f5def91a4764410c65f8b5739724b9e19 (diff) |
HSI: omap_ssi: do not reset module
module reset and power management rule setup
is already done by hwmod. Remove this cruft,
which predates hwmod.
Signed-off-by: Sebastian Reichel <sre@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Pavel Machek <pavel@ucw.cz>
Diffstat (limited to 'drivers/hsi/controllers')
-rw-r--r-- | drivers/hsi/controllers/omap_ssi.h | 2 | ||||
-rw-r--r-- | drivers/hsi/controllers/omap_ssi_core.c | 19 |
2 files changed, 1 insertions, 20 deletions
diff --git a/drivers/hsi/controllers/omap_ssi.h b/drivers/hsi/controllers/omap_ssi.h index 7b4dec2c69ff..ba2f92722c09 100644 --- a/drivers/hsi/controllers/omap_ssi.h +++ b/drivers/hsi/controllers/omap_ssi.h | |||
@@ -138,7 +138,6 @@ struct gdd_trn { | |||
138 | * @fck_rate: clock rate | 138 | * @fck_rate: clock rate |
139 | * @loss_count: To follow if we need to restore context or not | 139 | * @loss_count: To follow if we need to restore context or not |
140 | * @max_speed: Maximum TX speed (Kb/s) set by the clients. | 140 | * @max_speed: Maximum TX speed (Kb/s) set by the clients. |
141 | * @sysconfig: SSI controller saved context | ||
142 | * @gdd_gcr: SSI GDD saved context | 141 | * @gdd_gcr: SSI GDD saved context |
143 | * @get_loss: Pointer to omap_pm_get_dev_context_loss_count, if any | 142 | * @get_loss: Pointer to omap_pm_get_dev_context_loss_count, if any |
144 | * @port: Array of pointers of the ports of the controller | 143 | * @port: Array of pointers of the ports of the controller |
@@ -158,7 +157,6 @@ struct omap_ssi_controller { | |||
158 | u32 loss_count; | 157 | u32 loss_count; |
159 | u32 max_speed; | 158 | u32 max_speed; |
160 | /* OMAP SSI Controller context */ | 159 | /* OMAP SSI Controller context */ |
161 | u32 sysconfig; | ||
162 | u32 gdd_gcr; | 160 | u32 gdd_gcr; |
163 | int (*get_loss)(struct device *dev); | 161 | int (*get_loss)(struct device *dev); |
164 | struct omap_ssi_port **port; | 162 | struct omap_ssi_port **port; |
diff --git a/drivers/hsi/controllers/omap_ssi_core.c b/drivers/hsi/controllers/omap_ssi_core.c index a3e0febfb64a..54943e439488 100644 --- a/drivers/hsi/controllers/omap_ssi_core.c +++ b/drivers/hsi/controllers/omap_ssi_core.c | |||
@@ -452,8 +452,6 @@ out_err: | |||
452 | static int ssi_hw_init(struct hsi_controller *ssi) | 452 | static int ssi_hw_init(struct hsi_controller *ssi) |
453 | { | 453 | { |
454 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); | 454 | struct omap_ssi_controller *omap_ssi = hsi_controller_drvdata(ssi); |
455 | unsigned int i; | ||
456 | u32 val; | ||
457 | int err; | 455 | int err; |
458 | 456 | ||
459 | err = pm_runtime_get_sync(ssi->device.parent); | 457 | err = pm_runtime_get_sync(ssi->device.parent); |
@@ -461,27 +459,12 @@ static int ssi_hw_init(struct hsi_controller *ssi) | |||
461 | dev_err(&ssi->device, "runtime PM failed %d\n", err); | 459 | dev_err(&ssi->device, "runtime PM failed %d\n", err); |
462 | return err; | 460 | return err; |
463 | } | 461 | } |
464 | /* Reseting SSI controller */ | ||
465 | writel_relaxed(SSI_SOFTRESET, omap_ssi->sys + SSI_SYSCONFIG_REG); | ||
466 | val = readl(omap_ssi->sys + SSI_SYSSTATUS_REG); | ||
467 | for (i = 0; ((i < 20) && !(val & SSI_RESETDONE)); i++) { | ||
468 | msleep(20); | ||
469 | val = readl(omap_ssi->sys + SSI_SYSSTATUS_REG); | ||
470 | } | ||
471 | if (!(val & SSI_RESETDONE)) { | ||
472 | dev_err(&ssi->device, "SSI HW reset failed\n"); | ||
473 | pm_runtime_put_sync(ssi->device.parent); | ||
474 | return -EIO; | ||
475 | } | ||
476 | /* Reseting GDD */ | 462 | /* Reseting GDD */ |
477 | writel_relaxed(SSI_SWRESET, omap_ssi->gdd + SSI_GDD_GRST_REG); | 463 | writel_relaxed(SSI_SWRESET, omap_ssi->gdd + SSI_GDD_GRST_REG); |
478 | /* Get FCK rate in KHz */ | 464 | /* Get FCK rate in KHz */ |
479 | omap_ssi->fck_rate = DIV_ROUND_CLOSEST(ssi_get_clk_rate(ssi), 1000); | 465 | omap_ssi->fck_rate = DIV_ROUND_CLOSEST(ssi_get_clk_rate(ssi), 1000); |
480 | dev_dbg(&ssi->device, "SSI fck rate %lu KHz\n", omap_ssi->fck_rate); | 466 | dev_dbg(&ssi->device, "SSI fck rate %lu KHz\n", omap_ssi->fck_rate); |
481 | /* Set default PM settings */ | 467 | |
482 | val = SSI_AUTOIDLE | SSI_SIDLEMODE_SMART | SSI_MIDLEMODE_SMART; | ||
483 | writel_relaxed(val, omap_ssi->sys + SSI_SYSCONFIG_REG); | ||
484 | omap_ssi->sysconfig = val; | ||
485 | writel_relaxed(SSI_CLK_AUTOGATING_ON, omap_ssi->sys + SSI_GDD_GCR_REG); | 468 | writel_relaxed(SSI_CLK_AUTOGATING_ON, omap_ssi->sys + SSI_GDD_GCR_REG); |
486 | omap_ssi->gdd_gcr = SSI_CLK_AUTOGATING_ON; | 469 | omap_ssi->gdd_gcr = SSI_CLK_AUTOGATING_ON; |
487 | pm_runtime_put_sync(ssi->device.parent); | 470 | pm_runtime_put_sync(ssi->device.parent); |