Merge tag 'dmaengine-4.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine updates from Vinod Koul:
 "This round we have few new features, new driver and updates to few
  drivers.

  The new features to dmaengine core are:
   - Synchronized transfer termination API to terminate the dmaengine
     transfers in synchronized and async fashion as required by users.
     We have its user now in ALSA dmaengine lib, img, at_xdma, axi_dmac
     drivers.
   - Universal API for channel request and start consolidation of
     request flows.  It's user is ompa-dma driver.
   - Introduce reuse of descriptors and use in pxa_dma driver

  Add/Remove:
   - New STM32 DMA driver
   - Removal of unused R-Car HPB-DMAC driver

  Updates:
   - ti-dma-crossbar updates for supporting eDMA
   - tegra-apb pm updates
   - idma64
   - mv_xor updates
   - ste_dma updates"

* tag 'dmaengine-4.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (54 commits)
  dmaengine: mv_xor: add suspend/resume support
  dmaengine: mv_xor: de-duplicate mv_chan_set_mode*()
  dmaengine: mv_xor: remove mv_xor_chan->current_type field
  dmaengine: omap-dma: Add support for DMA filter mapping to slave devices
  dmaengine: edma: Add support for DMA filter mapping to slave devices
  dmaengine: core: Introduce new, universal API to request a channel
  dmaengine: core: Move and merge the code paths using private_candidate
  dmaengine: core: Skip mask matching when it is not provided to private_candidate
  dmaengine: mdc: Correct terminate_all handling
  dmaengine: edma: Add probe callback to edma_tptc_driver
  dmaengine: dw: fix potential memory leak in dw_dma_parse_dt()
  dmaengine: stm32-dma: Fix unchecked deference of chan->desc
  dmaengine: sh: Remove unused R-Car HPB-DMAC driver
  dmaengine: usb-dmac: Document SoC specific compatibility strings
  ste_dma40: Delete an unnecessary variable initialisation in d40_probe()
  ste_dma40: Delete another unnecessary check in d40_probe()
  ste_dma40: Delete an unnecessary check before the function call "kmem_cache_destroy"
  dmaengine: tegra-apb: Free interrupts before killing tasklets
  dmaengine: tegra-apb: Update driver to use GFP_NOWAIT
  dmaengine: tegra-apb: Only save channel state for those in use
  ...

1 files changed, 15 insertions, 5 deletions

diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index 370c661c7d7b..39f59666f93f 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -863,8 +863,12 @@ at_xdmac_interleaved_queue_desc(struct dma_chan *chan,
          * access. Hopefully we can access DDR through both ports (at least on
          * SAMA5D4x), so we can use the same interface for source and dest,
          * that solves the fact we don't know the direction.
+         * ERRATA: Even if useless for memory transfers, the PERID has to not
+         * match the one of another channel. If not, it could lead to spurious
+         * flag status.
          */
-        u32                     chan_cc = AT_XDMAC_CC_DIF(0)
+        u32                     chan_cc = AT_XDMAC_CC_PERID(0x3f)
+                                        | AT_XDMAC_CC_DIF(0)
                                         | AT_XDMAC_CC_SIF(0)
                                         | AT_XDMAC_CC_MBSIZE_SIXTEEN
                                         | AT_XDMAC_CC_TYPE_MEM_TRAN;
@@ -1041,8 +1045,12 @@ at_xdmac_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
          * access DDR through both ports (at least on SAMA5D4x), so we can use
          * the same interface for source and dest, that solves the fact we
          * don't know the direction.
+         * ERRATA: Even if useless for memory transfers, the PERID has to not
+         * match the one of another channel. If not, it could lead to spurious
+         * flag status.
          */
-        u32                     chan_cc = AT_XDMAC_CC_DAM_INCREMENTED_AM
+        u32                     chan_cc = AT_XDMAC_CC_PERID(0x3f)
+                                        | AT_XDMAC_CC_DAM_INCREMENTED_AM
                                         | AT_XDMAC_CC_SAM_INCREMENTED_AM
                                         | AT_XDMAC_CC_DIF(0)
                                         | AT_XDMAC_CC_SIF(0)
@@ -1143,8 +1151,12 @@ static struct at_xdmac_desc *at_xdmac_memset_create_desc(struct dma_chan *chan,
          * access. Hopefully we can access DDR through both ports (at least on
          * SAMA5D4x), so we can use the same interface for source and dest,
          * that solves the fact we don't know the direction.
+         * ERRATA: Even if useless for memory transfers, the PERID has to not
+         * match the one of another channel. If not, it could lead to spurious
+         * flag status.
          */
-        u32                     chan_cc = AT_XDMAC_CC_DAM_UBS_AM
+        u32                     chan_cc = AT_XDMAC_CC_PERID(0x3f)
+                                        | AT_XDMAC_CC_DAM_UBS_AM
                                         | AT_XDMAC_CC_SAM_INCREMENTED_AM
                                         | AT_XDMAC_CC_DIF(0)
                                         | AT_XDMAC_CC_SIF(0)
@@ -1998,8 +2010,6 @@ static int at_xdmac_remove(struct platform_device *pdev)
         dma_async_device_unregister(&atxdmac->dma);
         clk_disable_unprepare(atxdmac->clk);
 
-        synchronize_irq(atxdmac->irq);
-
         free_irq(atxdmac->irq, atxdmac->dma.dev);
 
         for (i = 0; i < atxdmac->dma.chancnt; i++) {