aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/crypto/s5p-sss.c
diff options
context:
space:
mode:
authorKrzysztof Kozlowski <k.kozlowski@samsung.com>2016-04-19 09:44:12 -0400
committerHerbert Xu <herbert@gondor.apana.org.au>2016-04-20 05:50:07 -0400
commit5512442553bbe8d4fcdba3e17b30f187706384a7 (patch)
treee439822973a596f48d048139e4b90b3085e56f29 /drivers/crypto/s5p-sss.c
parent07c8fccbf7fd6adf896db380c5a32c66a5b32aca (diff)
crypto: s5p-sss - Remove useless hash interrupt handler
Beside regular feed control interrupt, the driver requires also hash interrupt for older SoCs (samsung,s5pv210-secss). However after requesting it, the interrupt handler isn't doing anything with it, not even clearing the hash interrupt bit. Driver does not provide hash functions so it is safe to remove the hash interrupt related code and to not require the interrupt in Device Tree. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'drivers/crypto/s5p-sss.c')
-rw-r--r--drivers/crypto/s5p-sss.c34
1 files changed, 6 insertions, 28 deletions
diff --git a/drivers/crypto/s5p-sss.c b/drivers/crypto/s5p-sss.c
index b0484d4d68d9..71ca6a5d636d 100644
--- a/drivers/crypto/s5p-sss.c
+++ b/drivers/crypto/s5p-sss.c
@@ -149,7 +149,6 @@
149 149
150/** 150/**
151 * struct samsung_aes_variant - platform specific SSS driver data 151 * struct samsung_aes_variant - platform specific SSS driver data
152 * @has_hash_irq: true if SSS module uses hash interrupt, false otherwise
153 * @aes_offset: AES register offset from SSS module's base. 152 * @aes_offset: AES register offset from SSS module's base.
154 * 153 *
155 * Specifies platform specific configuration of SSS module. 154 * Specifies platform specific configuration of SSS module.
@@ -157,7 +156,6 @@
157 * expansion of its usage. 156 * expansion of its usage.
158 */ 157 */
159struct samsung_aes_variant { 158struct samsung_aes_variant {
160 bool has_hash_irq;
161 unsigned int aes_offset; 159 unsigned int aes_offset;
162}; 160};
163 161
@@ -178,7 +176,6 @@ struct s5p_aes_dev {
178 struct clk *clk; 176 struct clk *clk;
179 void __iomem *ioaddr; 177 void __iomem *ioaddr;
180 void __iomem *aes_ioaddr; 178 void __iomem *aes_ioaddr;
181 int irq_hash;
182 int irq_fc; 179 int irq_fc;
183 180
184 struct ablkcipher_request *req; 181 struct ablkcipher_request *req;
@@ -201,12 +198,10 @@ struct s5p_aes_dev {
201static struct s5p_aes_dev *s5p_dev; 198static struct s5p_aes_dev *s5p_dev;
202 199
203static const struct samsung_aes_variant s5p_aes_data = { 200static const struct samsung_aes_variant s5p_aes_data = {
204 .has_hash_irq = true,
205 .aes_offset = 0x4000, 201 .aes_offset = 0x4000,
206}; 202};
207 203
208static const struct samsung_aes_variant exynos_aes_data = { 204static const struct samsung_aes_variant exynos_aes_data = {
209 .has_hash_irq = false,
210 .aes_offset = 0x200, 205 .aes_offset = 0x200,
211}; 206};
212 207
@@ -421,15 +416,13 @@ static irqreturn_t s5p_aes_interrupt(int irq, void *dev_id)
421 416
422 spin_lock_irqsave(&dev->lock, flags); 417 spin_lock_irqsave(&dev->lock, flags);
423 418
424 if (irq == dev->irq_fc) { 419 status = SSS_READ(dev, FCINTSTAT);
425 status = SSS_READ(dev, FCINTSTAT); 420 if (status & SSS_FCINTSTAT_BRDMAINT)
426 if (status & SSS_FCINTSTAT_BRDMAINT) 421 s5p_aes_rx(dev);
427 s5p_aes_rx(dev); 422 if (status & SSS_FCINTSTAT_BTDMAINT)
428 if (status & SSS_FCINTSTAT_BTDMAINT) 423 s5p_aes_tx(dev);
429 s5p_aes_tx(dev);
430 424
431 SSS_WRITE(dev, FCINTPEND, status); 425 SSS_WRITE(dev, FCINTPEND, status);
432 }
433 426
434 spin_unlock_irqrestore(&dev->lock, flags); 427 spin_unlock_irqrestore(&dev->lock, flags);
435 428
@@ -795,21 +788,6 @@ static int s5p_aes_probe(struct platform_device *pdev)
795 goto err_irq; 788 goto err_irq;
796 } 789 }
797 790
798 if (variant->has_hash_irq) {
799 pdata->irq_hash = platform_get_irq(pdev, 1);
800 if (pdata->irq_hash < 0) {
801 err = pdata->irq_hash;
802 dev_warn(dev, "hash interrupt is not available.\n");
803 goto err_irq;
804 }
805 err = devm_request_irq(dev, pdata->irq_hash, s5p_aes_interrupt,
806 IRQF_SHARED, pdev->name, pdev);
807 if (err < 0) {
808 dev_warn(dev, "hash interrupt is not available.\n");
809 goto err_irq;
810 }
811 }
812
813 pdata->busy = false; 791 pdata->busy = false;
814 pdata->variant = variant; 792 pdata->variant = variant;
815 pdata->dev = dev; 793 pdata->dev = dev;