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authorLucas Stach <l.stach@pengutronix.de>2015-09-21 12:54:03 -0400
committerShawn Guo <shawnguo@kernel.org>2015-09-26 00:59:02 -0400
commit0822f933735c1eee6adfc236c72f763f42ac0f3d (patch)
treee75629660b00c3758d4cf4d7a9833e560cb643ce /drivers/clk/imx
parent89981a6f7bbe5b98c3f9c8e01ca53c1f7b28030d (diff)
clk: imx6: retain early UART clocks during kernel init
Make sure to keep UART clocks enabled during kernel init if earlyprintk or earlycon are active. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk/imx')
-rw-r--r--drivers/clk/imx/clk-imx6q.c8
-rw-r--r--drivers/clk/imx/clk-imx6sl.c8
-rw-r--r--drivers/clk/imx/clk-imx6sx.c8
3 files changed, 24 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index b2c1c047dc94..e9ba018ac6a3 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -130,6 +130,12 @@ static inline int clk_on_imx6dl(void)
130 return of_machine_is_compatible("fsl,imx6dl"); 130 return of_machine_is_compatible("fsl,imx6dl");
131} 131}
132 132
133static struct clk ** const uart_clks[] __initconst = {
134 &clk[IMX6QDL_CLK_UART_IPG],
135 &clk[IMX6QDL_CLK_UART_SERIAL],
136 NULL
137};
138
133static void __init imx6q_clocks_init(struct device_node *ccm_node) 139static void __init imx6q_clocks_init(struct device_node *ccm_node)
134{ 140{
135 struct device_node *np; 141 struct device_node *np;
@@ -541,5 +547,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
541 /* All existing boards with PCIe use LVDS1 */ 547 /* All existing boards with PCIe use LVDS1 */
542 if (IS_ENABLED(CONFIG_PCI_IMX6)) 548 if (IS_ENABLED(CONFIG_PCI_IMX6))
543 clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF_100M]); 549 clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF_100M]);
550
551 imx_register_uart_clocks(uart_clks);
544} 552}
545CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init); 553CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init);
diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c
index a0d4cf26cfa9..3c3333faae8e 100644
--- a/drivers/clk/imx/clk-imx6sl.c
+++ b/drivers/clk/imx/clk-imx6sl.c
@@ -184,6 +184,12 @@ void imx6sl_set_wait_clk(bool enter)
184 imx6sl_enable_pll_arm(false); 184 imx6sl_enable_pll_arm(false);
185} 185}
186 186
187static struct clk ** const uart_clks[] __initconst = {
188 &clks[IMX6SL_CLK_UART],
189 &clks[IMX6SL_CLK_UART_SERIAL],
190 NULL
191};
192
187static void __init imx6sl_clocks_init(struct device_node *ccm_node) 193static void __init imx6sl_clocks_init(struct device_node *ccm_node)
188{ 194{
189 struct device_node *np; 195 struct device_node *np;
@@ -439,5 +445,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
439 445
440 clk_set_parent(clks[IMX6SL_CLK_LCDIF_AXI_SEL], 446 clk_set_parent(clks[IMX6SL_CLK_LCDIF_AXI_SEL],
441 clks[IMX6SL_CLK_PLL2_PFD2]); 447 clks[IMX6SL_CLK_PLL2_PFD2]);
448
449 imx_register_uart_clocks(uart_clks);
442} 450}
443CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init); 451CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init);
diff --git a/drivers/clk/imx/clk-imx6sx.c b/drivers/clk/imx/clk-imx6sx.c
index 5b95c2c2bf52..f0ad8bbc12f8 100644
--- a/drivers/clk/imx/clk-imx6sx.c
+++ b/drivers/clk/imx/clk-imx6sx.c
@@ -135,6 +135,12 @@ static u32 share_count_ssi1;
135static u32 share_count_ssi2; 135static u32 share_count_ssi2;
136static u32 share_count_ssi3; 136static u32 share_count_ssi3;
137 137
138static struct clk ** const uart_clks[] __initconst = {
139 &clks[IMX6SX_CLK_UART_IPG],
140 &clks[IMX6SX_CLK_UART_SERIAL],
141 NULL
142};
143
138static void __init imx6sx_clocks_init(struct device_node *ccm_node) 144static void __init imx6sx_clocks_init(struct device_node *ccm_node)
139{ 145{
140 struct device_node *np; 146 struct device_node *np;
@@ -557,5 +563,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
557 563
558 clk_set_parent(clks[IMX6SX_CLK_QSPI1_SEL], clks[IMX6SX_CLK_PLL2_BUS]); 564 clk_set_parent(clks[IMX6SX_CLK_QSPI1_SEL], clks[IMX6SX_CLK_PLL2_BUS]);
559 clk_set_parent(clks[IMX6SX_CLK_QSPI2_SEL], clks[IMX6SX_CLK_PLL2_BUS]); 565 clk_set_parent(clks[IMX6SX_CLK_QSPI2_SEL], clks[IMX6SX_CLK_PLL2_BUS]);
566
567 imx_register_uart_clocks(uart_clks);
560} 568}
561CLK_OF_DECLARE(imx6sx, "fsl,imx6sx-ccm", imx6sx_clocks_init); 569CLK_OF_DECLARE(imx6sx, "fsl,imx6sx-ccm", imx6sx_clocks_init);