aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/clk/clk-divider.c
diff options
context:
space:
mode:
authorStephen Boyd <sboyd@codeaurora.org>2015-07-24 15:21:12 -0400
committerStephen Boyd <sboyd@codeaurora.org>2015-07-28 14:59:28 -0400
commit661e2180cf050a2f859d466f30d74e990b9345be (patch)
treedee0ccf4613fa0fc115145eb144c02819e24e44b /drivers/clk/clk-divider.c
parent169f05e80522e2848c9089a17976ebf31e735d5c (diff)
clk: basic-type: Silence warnings about lock imbalances
The basic clock types use conditional locking for the register accessor spinlocks. Add __acquire() and __release() markings in the right locations so that sparse isn't tripped up on the conditional locking. drivers/clk/clk-mux.c:68:12: warning: context imbalance in 'clk_mux_set_parent' - different lock contexts for basic block drivers/clk/clk-divider.c:379:12: warning: context imbalance in 'clk_divider_set_rate' - different lock contexts for basic block drivers/clk/clk-gate.c:71:9: warning: context imbalance in 'clk_gate_endisable' - different lock contexts for basic block drivers/clk/clk-fractional-divider.c:36:9: warning: context imbalance in 'clk_fd_recalc_rate' - different lock contexts for basic block drivers/clk/clk-fractional-divider.c:68:12: warning: context imbalance in 'clk_fd_set_rate' - different lock contexts for basic block Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/clk-divider.c')
-rw-r--r--drivers/clk/clk-divider.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 2cab88b9c1a8..a417162537b8 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -395,6 +395,8 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
395 395
396 if (divider->lock) 396 if (divider->lock)
397 spin_lock_irqsave(divider->lock, flags); 397 spin_lock_irqsave(divider->lock, flags);
398 else
399 __acquire(divider->lock);
398 400
399 if (divider->flags & CLK_DIVIDER_HIWORD_MASK) { 401 if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
400 val = div_mask(divider->width) << (divider->shift + 16); 402 val = div_mask(divider->width) << (divider->shift + 16);
@@ -407,6 +409,8 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
407 409
408 if (divider->lock) 410 if (divider->lock)
409 spin_unlock_irqrestore(divider->lock, flags); 411 spin_unlock_irqrestore(divider->lock, flags);
412 else
413 __release(divider->lock);
410 414
411 return 0; 415 return 0;
412} 416}