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authorHendrik Brueckner <brueckner@linux.vnet.ibm.com>2015-09-29 04:04:41 -0400
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2015-10-14 08:32:08 -0400
commitb5510d9b68c33964abd938148f407ad3789e369f (patch)
tree7cf0eb3e5e74e861030f850c8c0894095ac70bc9 /arch/s390/kernel/traps.c
parent395e6aa1d0ffbc493a04469aa8f6751ed2aad8c5 (diff)
s390/fpu: always enable the vector facility if it is available
If the kernel detects that the s390 hardware supports the vector facility, it is enabled by default at an early stage. To force it off, use the novx kernel parameter. Note that there is a small time window, where the vector facility is enabled before it is forced to be off. With enabling the vector facility by default, the FPU save and restore functions can be improved. They do not longer require to manage expensive control register updates to enable or disable the vector enablement control for particular processes. Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com> Reviewed-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/kernel/traps.c')
-rw-r--r--arch/s390/kernel/traps.c39
1 files changed, 0 insertions, 39 deletions
diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c
index 9861613fb35a..d9c45318f19b 100644
--- a/arch/s390/kernel/traps.c
+++ b/arch/s390/kernel/traps.c
@@ -224,29 +224,6 @@ NOKPROBE_SYMBOL(illegal_op);
224DO_ERROR_INFO(specification_exception, SIGILL, ILL_ILLOPN, 224DO_ERROR_INFO(specification_exception, SIGILL, ILL_ILLOPN,
225 "specification exception"); 225 "specification exception");
226 226
227int alloc_vector_registers(struct task_struct *tsk)
228{
229 __vector128 *vxrs;
230 freg_t *fprs;
231
232 /* Allocate vector register save area. */
233 vxrs = kzalloc(sizeof(__vector128) * __NUM_VXRS,
234 GFP_KERNEL|__GFP_REPEAT);
235 if (!vxrs)
236 return -ENOMEM;
237 preempt_disable();
238 if (tsk == current)
239 save_fpu_regs();
240 /* Copy the 16 floating point registers */
241 convert_fp_to_vx(vxrs, tsk->thread.fpu.fprs);
242 fprs = tsk->thread.fpu.fprs;
243 tsk->thread.fpu.vxrs = vxrs;
244 tsk->thread.fpu.flags |= FPU_USE_VX;
245 kfree(fprs);
246 preempt_enable();
247 return 0;
248}
249
250void vector_exception(struct pt_regs *regs) 227void vector_exception(struct pt_regs *regs)
251{ 228{
252 int si_code, vic; 229 int si_code, vic;
@@ -281,13 +258,6 @@ void vector_exception(struct pt_regs *regs)
281 do_trap(regs, SIGFPE, si_code, "vector exception"); 258 do_trap(regs, SIGFPE, si_code, "vector exception");
282} 259}
283 260
284static int __init disable_vector_extension(char *str)
285{
286 S390_lowcore.machine_flags &= ~MACHINE_FLAG_VX;
287 return 1;
288}
289__setup("novx", disable_vector_extension);
290
291void data_exception(struct pt_regs *regs) 261void data_exception(struct pt_regs *regs)
292{ 262{
293 __u16 __user *location; 263 __u16 __user *location;
@@ -296,15 +266,6 @@ void data_exception(struct pt_regs *regs)
296 location = get_trap_ip(regs); 266 location = get_trap_ip(regs);
297 267
298 save_fpu_regs(); 268 save_fpu_regs();
299 /* Check for vector register enablement */
300 if (MACHINE_HAS_VX && !is_vx_task(current) &&
301 (current->thread.fpu.fpc & FPC_DXC_MASK) == 0xfe00) {
302 alloc_vector_registers(current);
303 /* Vector data exception is suppressing, rewind psw. */
304 regs->psw.addr = __rewind_psw(regs->psw, regs->int_code >> 16);
305 clear_pt_regs_flag(regs, PIF_PER_TRAP);
306 return;
307 }
308 if (current->thread.fpu.fpc & FPC_DXC_MASK) 269 if (current->thread.fpu.fpc & FPC_DXC_MASK)
309 signal = SIGFPE; 270 signal = SIGFPE;
310 else 271 else