aboutsummaryrefslogtreecommitdiffstats
path: root/arch/s390/kernel/traps.c
diff options
context:
space:
mode:
authorMartin Schwidefsky <schwidefsky@de.ibm.com>2015-07-20 04:01:46 -0400
committerMartin Schwidefsky <schwidefsky@de.ibm.com>2015-07-20 07:22:18 -0400
commit3827ec3d8fd51aef8352b0282b14f0f3ab615930 (patch)
tree9d6cc01706efdb44c6fb7cdb8024fa93d98a7dab /arch/s390/kernel/traps.c
parent52721d9d3334c1cb1f76219a161084094ec634dc (diff)
s390: adapt entry.S to the move of thread_struct
git commit 0c8c0f03e3a292e031596484275c14cf39c0ab7a "x86/fpu, sched: Dynamically allocate 'struct fpu'" moved the thread_struct to the end of the task_struct. This causes some of the offsets used in entry.S to overflow their instruction operand field. To fix this use aghi to create a dedicated pointer for the thread_struct. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Diffstat (limited to 'arch/s390/kernel/traps.c')
-rw-r--r--arch/s390/kernel/traps.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c
index 4d96c9f53455..7bea81d8a363 100644
--- a/arch/s390/kernel/traps.c
+++ b/arch/s390/kernel/traps.c
@@ -259,7 +259,7 @@ void vector_exception(struct pt_regs *regs)
259 } 259 }
260 260
261 /* get vector interrupt code from fpc */ 261 /* get vector interrupt code from fpc */
262 asm volatile("stfpc %0" : "=m" (current->thread.fp_regs.fpc)); 262 asm volatile("stfpc %0" : "=Q" (current->thread.fp_regs.fpc));
263 vic = (current->thread.fp_regs.fpc & 0xf00) >> 8; 263 vic = (current->thread.fp_regs.fpc & 0xf00) >> 8;
264 switch (vic) { 264 switch (vic) {
265 case 1: /* invalid vector operation */ 265 case 1: /* invalid vector operation */
@@ -297,7 +297,7 @@ void data_exception(struct pt_regs *regs)
297 297
298 location = get_trap_ip(regs); 298 location = get_trap_ip(regs);
299 299
300 asm volatile("stfpc %0" : "=m" (current->thread.fp_regs.fpc)); 300 asm volatile("stfpc %0" : "=Q" (current->thread.fp_regs.fpc));
301 /* Check for vector register enablement */ 301 /* Check for vector register enablement */
302 if (MACHINE_HAS_VX && !current->thread.vxrs && 302 if (MACHINE_HAS_VX && !current->thread.vxrs &&
303 (current->thread.fp_regs.fpc & FPC_DXC_MASK) == 0xfe00) { 303 (current->thread.fp_regs.fpc & FPC_DXC_MASK) == 0xfe00) {