MIPS: uasm: Add MTHI/MTLO instructions

Add MTHI/MTLO instructions for writing to the hi & lo registers to uasm
so that KVM can use uasm for generating its entry point code at runtime.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c
index 2b7d85b8241f..86a3c76a1ad8 100644
--- a/arch/mips/mm/uasm-mips.c
+++ b/arch/mips/mm/uasm-mips.c
@@ -119,6 +119,8 @@ static struct insn insn_table[] = {
         { insn_mflo,  M(spec_op, 0, 0, 0, 0, mflo_op), RD },
         { insn_mtc0,  M(cop0_op, mtc_op, 0, 0, 0, 0),  RT | RD | SET},
         { insn_mthc0,  M(cop0_op, mthc0_op, 0, 0, 0, 0),  RT | RD | SET},
+        { insn_mthi,  M(spec_op, 0, 0, 0, 0, mthi_op), RS },
+        { insn_mtlo,  M(spec_op, 0, 0, 0, 0, mtlo_op), RS },
         { insn_mul, M(spec2_op, 0, 0, 0, 0, mul_op), RS | RT | RD},
         { insn_ori,  M(ori_op, 0, 0, 0, 0, 0),  RS | RT | UIMM },
         { insn_or,  M(spec_op, 0, 0, 0, 0, or_op),  RS | RT | RD },