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authorJaedon Shin <jaedon.shin@gmail.com>2016-04-06 02:01:08 -0400
committerRalf Baechle <ralf@linux-mips.org>2016-05-13 08:02:04 -0400
commit5c40d493e2e63d2979610aed75df7e3744b87921 (patch)
tree641ba8b07984c2b7777c1eea2a56f063e40b6915 /arch/mips/boot
parent23021b2bb98543d08e22725122650644d824bf18 (diff)
MIPS: BMIPS: Add support UART, I2C, SATA device
Add UART, I2C, SATA device tree nodes on Broadcom BCM7xxx MIPS-based platforms. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Dragan Stancevic <dragan.stancevic@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/13016/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/boot')
-rw-r--r--arch/mips/boot/dts/brcm/bcm7125.dtsi69
-rw-r--r--arch/mips/boot/dts/brcm/bcm7346.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm7358.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm7360.dtsi42
-rw-r--r--arch/mips/boot/dts/brcm/bcm7362.dtsi2
-rw-r--r--arch/mips/boot/dts/brcm/bcm7420.dtsi77
-rw-r--r--arch/mips/boot/dts/brcm/bcm7425.dtsi94
-rw-r--r--arch/mips/boot/dts/brcm/bcm7435.dtsi134
-rw-r--r--arch/mips/boot/dts/brcm/bcm97125cbmb.dts24
-rw-r--r--arch/mips/boot/dts/brcm/bcm97360svmb.dts8
-rw-r--r--arch/mips/boot/dts/brcm/bcm97420c.dts28
-rw-r--r--arch/mips/boot/dts/brcm/bcm97425svmb.dts28
-rw-r--r--arch/mips/boot/dts/brcm/bcm97435svmb.dts36
13 files changed, 530 insertions, 16 deletions
diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
index 3ae16053a0c9..550e1d9e3ee0 100644
--- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
@@ -85,14 +85,15 @@
85 compatible = "brcm,bcm7120-l2-intc"; 85 compatible = "brcm,bcm7120-l2-intc";
86 reg = <0x406780 0x8>; 86 reg = <0x406780 0x8>;
87 87
88 brcm,int-map-mask = <0x44>; 88 brcm,int-map-mask = <0x44>, <0xf000000>;
89 brcm,int-fwd-mask = <0x70000>; 89 brcm,int-fwd-mask = <0x70000>;
90 90
91 interrupt-controller; 91 interrupt-controller;
92 #interrupt-cells = <1>; 92 #interrupt-cells = <1>;
93 93
94 interrupt-parent = <&periph_intc>; 94 interrupt-parent = <&periph_intc>;
95 interrupts = <18>; 95 interrupts = <18>, <19>;
96 interrupt-names = "upg_main", "upg_bsc";
96 }; 97 };
97 98
98 sun_top_ctrl: syscon@404000 { 99 sun_top_ctrl: syscon@404000 {
@@ -118,6 +119,70 @@
118 status = "disabled"; 119 status = "disabled";
119 }; 120 };
120 121
122 uart1: serial@406b40 {
123 compatible = "ns16550a";
124 reg = <0x406b40 0x20>;
125 reg-io-width = <0x4>;
126 reg-shift = <0x2>;
127 native-endian;
128 interrupt-parent = <&periph_intc>;
129 interrupts = <64>;
130 clocks = <&uart_clk>;
131 status = "disabled";
132 };
133
134 uart2: serial@406b80 {
135 compatible = "ns16550a";
136 reg = <0x406b80 0x20>;
137 reg-io-width = <0x4>;
138 reg-shift = <0x2>;
139 native-endian;
140 interrupt-parent = <&periph_intc>;
141 interrupts = <65>;
142 clocks = <&uart_clk>;
143 status = "disabled";
144 };
145
146 bsca: i2c@406200 {
147 clock-frequency = <390000>;
148 compatible = "brcm,brcmstb-i2c";
149 interrupt-parent = <&upg_irq0_intc>;
150 reg = <0x406200 0x58>;
151 interrupts = <24>;
152 interrupt-names = "upg_bsca";
153 status = "disabled";
154 };
155
156 bscb: i2c@406280 {
157 clock-frequency = <390000>;
158 compatible = "brcm,brcmstb-i2c";
159 interrupt-parent = <&upg_irq0_intc>;
160 reg = <0x406280 0x58>;
161 interrupts = <25>;
162 interrupt-names = "upg_bscb";
163 status = "disabled";
164 };
165
166 bscc: i2c@406300 {
167 clock-frequency = <390000>;
168 compatible = "brcm,brcmstb-i2c";
169 interrupt-parent = <&upg_irq0_intc>;
170 reg = <0x406300 0x58>;
171 interrupts = <26>;
172 interrupt-names = "upg_bscc";
173 status = "disabled";
174 };
175
176 bscd: i2c@406380 {
177 clock-frequency = <390000>;
178 compatible = "brcm,brcmstb-i2c";
179 interrupt-parent = <&upg_irq0_intc>;
180 reg = <0x406380 0x58>;
181 interrupts = <27>;
182 interrupt-names = "upg_bscd";
183 status = "disabled";
184 };
185
121 ehci0: usb@488300 { 186 ehci0: usb@488300 {
122 compatible = "brcm,bcm7125-ehci", "generic-ehci"; 187 compatible = "brcm,bcm7125-ehci", "generic-ehci";
123 reg = <0x488300 0x100>; 188 reg = <0x488300 0x100>;
diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index be7991917d29..2a6efe6942b5 100644
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -24,8 +24,6 @@
24 24
25 aliases { 25 aliases {
26 uart0 = &uart0; 26 uart0 = &uart0;
27 uart1 = &uart1;
28 uart2 = &uart2;
29 }; 27 };
30 28
31 cpu_intc: cpu_intc { 29 cpu_intc: cpu_intc {
diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
index 060805be619a..ca57fb5eb122 100644
--- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
@@ -18,8 +18,6 @@
18 18
19 aliases { 19 aliases {
20 uart0 = &uart0; 20 uart0 = &uart0;
21 uart1 = &uart1;
22 uart2 = &uart2;
23 }; 21 };
24 22
25 cpu_intc: cpu_intc { 23 cpu_intc: cpu_intc {
diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index bcdb09bfe07b..1c0c3d438c7a 100644
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -18,8 +18,6 @@
18 18
19 aliases { 19 aliases {
20 uart0 = &uart0; 20 uart0 = &uart0;
21 uart1 = &uart1;
22 uart2 = &uart2;
23 }; 21 };
24 22
25 cpu_intc: cpu_intc { 23 cpu_intc: cpu_intc {
@@ -241,5 +239,45 @@
241 interrupts = <66>; 239 interrupts = <66>;
242 status = "disabled"; 240 status = "disabled";
243 }; 241 };
242
243 sata: sata@181000 {
244 compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
245 reg-names = "ahci", "top-ctrl";
246 reg = <0x181000 0xa9c>, <0x180020 0x1c>;
247 interrupt-parent = <&periph_intc>;
248 interrupts = <86>;
249 #address-cells = <1>;
250 #size-cells = <0>;
251 status = "disabled";
252
253 sata0: sata-port@0 {
254 reg = <0>;
255 phys = <&sata_phy0>;
256 };
257
258 sata1: sata-port@1 {
259 reg = <1>;
260 phys = <&sata_phy1>;
261 };
262 };
263
264 sata_phy: sata-phy@180100 {
265 compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
266 reg = <0x180100 0x0eff>;
267 reg-names = "phy";
268 #address-cells = <1>;
269 #size-cells = <0>;
270 status = "disabled";
271
272 sata_phy0: sata-phy@0 {
273 reg = <0>;
274 #phy-cells = <0>;
275 };
276
277 sata_phy1: sata-phy@1 {
278 reg = <1>;
279 #phy-cells = <0>;
280 };
281 };
244 }; 282 };
245}; 283};
diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index d3b1b762e6c3..4153e0851b05 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -24,8 +24,6 @@
24 24
25 aliases { 25 aliases {
26 uart0 = &uart0; 26 uart0 = &uart0;
27 uart1 = &uart1;
28 uart2 = &uart2;
29 }; 27 };
30 28
31 cpu_intc: cpu_intc { 29 cpu_intc: cpu_intc {
diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
index 3302a1b8a5c9..0586bf662571 100644
--- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
@@ -86,14 +86,15 @@
86 compatible = "brcm,bcm7120-l2-intc"; 86 compatible = "brcm,bcm7120-l2-intc";
87 reg = <0x406780 0x8>; 87 reg = <0x406780 0x8>;
88 88
89 brcm,int-map-mask = <0x44>; 89 brcm,int-map-mask = <0x44>, <0x1f000000>;
90 brcm,int-fwd-mask = <0x70000>; 90 brcm,int-fwd-mask = <0x70000>;
91 91
92 interrupt-controller; 92 interrupt-controller;
93 #interrupt-cells = <1>; 93 #interrupt-cells = <1>;
94 94
95 interrupt-parent = <&periph_intc>; 95 interrupt-parent = <&periph_intc>;
96 interrupts = <18>; 96 interrupts = <18>, <19>;
97 interrupt-names = "upg_main", "upg_bsc";
97 }; 98 };
98 99
99 sun_top_ctrl: syscon@404000 { 100 sun_top_ctrl: syscon@404000 {
@@ -118,6 +119,78 @@
118 status = "disabled"; 119 status = "disabled";
119 }; 120 };
120 121
122 uart1: serial@406b40 {
123 compatible = "ns16550a";
124 reg = <0x406b40 0x20>;
125 reg-io-width = <0x4>;
126 reg-shift = <0x2>;
127 interrupt-parent = <&periph_intc>;
128 interrupts = <64>;
129 clocks = <&uart_clk>;
130 status = "disabled";
131 };
132
133 uart2: serial@406b80 {
134 compatible = "ns16550a";
135 reg = <0x406b80 0x20>;
136 reg-io-width = <0x4>;
137 reg-shift = <0x2>;
138 interrupt-parent = <&periph_intc>;
139 interrupts = <65>;
140 clocks = <&uart_clk>;
141 status = "disabled";
142 };
143
144 bsca: i2c@406200 {
145 clock-frequency = <390000>;
146 compatible = "brcm,brcmstb-i2c";
147 interrupt-parent = <&upg_irq0_intc>;
148 reg = <0x406200 0x58>;
149 interrupts = <24>;
150 interrupt-names = "upg_bsca";
151 status = "disabled";
152 };
153
154 bscb: i2c@406280 {
155 clock-frequency = <390000>;
156 compatible = "brcm,brcmstb-i2c";
157 interrupt-parent = <&upg_irq0_intc>;
158 reg = <0x406280 0x58>;
159 interrupts = <25>;
160 interrupt-names = "upg_bscb";
161 status = "disabled";
162 };
163
164 bscc: i2c@406300 {
165 clock-frequency = <390000>;
166 compatible = "brcm,brcmstb-i2c";
167 interrupt-parent = <&upg_irq0_intc>;
168 reg = <0x406300 0x58>;
169 interrupts = <26>;
170 interrupt-names = "upg_bscc";
171 status = "disabled";
172 };
173
174 bscd: i2c@406380 {
175 clock-frequency = <390000>;
176 compatible = "brcm,brcmstb-i2c";
177 interrupt-parent = <&upg_irq0_intc>;
178 reg = <0x406380 0x58>;
179 interrupts = <27>;
180 interrupt-names = "upg_bscd";
181 status = "disabled";
182 };
183
184 bsce: i2c@406800 {
185 clock-frequency = <390000>;
186 compatible = "brcm,brcmstb-i2c";
187 interrupt-parent = <&upg_irq0_intc>;
188 reg = <0x406800 0x58>;
189 interrupts = <28>;
190 interrupt-names = "upg_bsce";
191 status = "disabled";
192 };
193
121 enet0: ethernet@468000 { 194 enet0: ethernet@468000 {
122 phy-mode = "internal"; 195 phy-mode = "internal";
123 phy-handle = <&phy1>; 196 phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index 15b27aae15a9..85339791eb2e 100644
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -87,14 +87,32 @@
87 compatible = "brcm,bcm7120-l2-intc"; 87 compatible = "brcm,bcm7120-l2-intc";
88 reg = <0x406780 0x8>; 88 reg = <0x406780 0x8>;
89 89
90 brcm,int-map-mask = <0x44>; 90 brcm,int-map-mask = <0x44>, <0x7000000>;
91 brcm,int-fwd-mask = <0x70000>; 91 brcm,int-fwd-mask = <0x70000>;
92 92
93 interrupt-controller; 93 interrupt-controller;
94 #interrupt-cells = <1>; 94 #interrupt-cells = <1>;
95 95
96 interrupt-parent = <&periph_intc>; 96 interrupt-parent = <&periph_intc>;
97 interrupts = <55>; 97 interrupts = <55>, <53>;
98 interrupt-names = "upg_main", "upg_bsc";
99 };
100
101 upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
102 compatible = "brcm,bcm7120-l2-intc";
103 reg = <0x409480 0x8>;
104
105 brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
106 brcm,int-fwd-mask = <0>;
107 brcm,irq-can-wake;
108
109 interrupt-controller;
110 #interrupt-cells = <1>;
111
112 interrupt-parent = <&periph_intc>;
113 interrupts = <56>, <54>, <59>;
114 interrupt-names = "upg_main_aon", "upg_bsc_aon",
115 "upg_spi";
98 }; 116 };
99 117
100 sun_top_ctrl: syscon@404000 { 118 sun_top_ctrl: syscon@404000 {
@@ -119,6 +137,78 @@
119 status = "disabled"; 137 status = "disabled";
120 }; 138 };
121 139
140 uart1: serial@406b40 {
141 compatible = "ns16550a";
142 reg = <0x406b40 0x20>;
143 reg-io-width = <0x4>;
144 reg-shift = <0x2>;
145 interrupt-parent = <&periph_intc>;
146 interrupts = <62>;
147 clocks = <&uart_clk>;
148 status = "disabled";
149 };
150
151 uart2: serial@406b80 {
152 compatible = "ns16550a";
153 reg = <0x406b80 0x20>;
154 reg-io-width = <0x4>;
155 reg-shift = <0x2>;
156 interrupt-parent = <&periph_intc>;
157 interrupts = <63>;
158 clocks = <&uart_clk>;
159 status = "disabled";
160 };
161
162 bsca: i2c@409180 {
163 clock-frequency = <390000>;
164 compatible = "brcm,brcmstb-i2c";
165 interrupt-parent = <&upg_aon_irq0_intc>;
166 reg = <0x409180 0x58>;
167 interrupts = <27>;
168 interrupt-names = "upg_bsca";
169 status = "disabled";
170 };
171
172 bscb: i2c@409400 {
173 clock-frequency = <390000>;
174 compatible = "brcm,brcmstb-i2c";
175 interrupt-parent = <&upg_aon_irq0_intc>;
176 reg = <0x409400 0x58>;
177 interrupts = <28>;
178 interrupt-names = "upg_bscb";
179 status = "disabled";
180 };
181
182 bscc: i2c@406200 {
183 clock-frequency = <390000>;
184 compatible = "brcm,brcmstb-i2c";
185 interrupt-parent = <&upg_irq0_intc>;
186 reg = <0x406200 0x58>;
187 interrupts = <24>;
188 interrupt-names = "upg_bscc";
189 status = "disabled";
190 };
191
192 bscd: i2c@406280 {
193 clock-frequency = <390000>;
194 compatible = "brcm,brcmstb-i2c";
195 interrupt-parent = <&upg_irq0_intc>;
196 reg = <0x406280 0x58>;
197 interrupts = <25>;
198 interrupt-names = "upg_bscd";
199 status = "disabled";
200 };
201
202 bsce: i2c@406300 {
203 clock-frequency = <390000>;
204 compatible = "brcm,brcmstb-i2c";
205 interrupt-parent = <&upg_irq0_intc>;
206 reg = <0x406300 0x58>;
207 interrupts = <26>;
208 interrupt-names = "upg_bsce";
209 status = "disabled";
210 };
211
122 enet0: ethernet@b80000 { 212 enet0: ethernet@b80000 {
123 phy-mode = "internal"; 213 phy-mode = "internal";
124 phy-handle = <&phy1>; 214 phy-handle = <&phy1>;
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index a1757efe612f..cce752b27055 100644
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -102,14 +102,32 @@
102 compatible = "brcm,bcm7120-l2-intc"; 102 compatible = "brcm,bcm7120-l2-intc";
103 reg = <0x406780 0x8>; 103 reg = <0x406780 0x8>;
104 104
105 brcm,int-map-mask = <0x44>; 105 brcm,int-map-mask = <0x44>, <0x7000000>;
106 brcm,int-fwd-mask = <0x70000>; 106 brcm,int-fwd-mask = <0x70000>;
107 107
108 interrupt-controller; 108 interrupt-controller;
109 #interrupt-cells = <1>; 109 #interrupt-cells = <1>;
110 110
111 interrupt-parent = <&periph_intc>; 111 interrupt-parent = <&periph_intc>;
112 interrupts = <60>; 112 interrupts = <60>, <58>;
113 interrupt-names = "upg_main", "upg_bsc";
114 };
115
116 upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
117 compatible = "brcm,bcm7120-l2-intc";
118 reg = <0x409480 0x8>;
119
120 brcm,int-map-mask = <0x40>, <0x18000000>, <0x100000>;
121 brcm,int-fwd-mask = <0>;
122 brcm,irq-can-wake;
123
124 interrupt-controller;
125 #interrupt-cells = <1>;
126
127 interrupt-parent = <&periph_intc>;
128 interrupts = <61>, <59>, <64>;
129 interrupt-names = "upg_main_aon", "upg_bsc_aon",
130 "upg_spi";
113 }; 131 };
114 132
115 sun_top_ctrl: syscon@404000 { 133 sun_top_ctrl: syscon@404000 {
@@ -134,6 +152,78 @@
134 status = "disabled"; 152 status = "disabled";
135 }; 153 };
136 154
155 uart1: serial@406b40 {
156 compatible = "ns16550a";
157 reg = <0x406b40 0x20>;
158 reg-io-width = <0x4>;
159 reg-shift = <0x2>;
160 interrupt-parent = <&periph_intc>;
161 interrupts = <67>;
162 clocks = <&uart_clk>;
163 status = "disabled";
164 };
165
166 uart2: serial@406b80 {
167 compatible = "ns16550a";
168 reg = <0x406b80 0x20>;
169 reg-io-width = <0x4>;
170 reg-shift = <0x2>;
171 interrupt-parent = <&periph_intc>;
172 interrupts = <68>;
173 clocks = <&uart_clk>;
174 status = "disabled";
175 };
176
177 bsca: i2c@406300 {
178 clock-frequency = <390000>;
179 compatible = "brcm,brcmstb-i2c";
180 interrupt-parent = <&upg_irq0_intc>;
181 reg = <0x406300 0x58>;
182 interrupts = <26>;
183 interrupt-names = "upg_bsca";
184 status = "disabled";
185 };
186
187 bscb: i2c@409400 {
188 clock-frequency = <390000>;
189 compatible = "brcm,brcmstb-i2c";
190 interrupt-parent = <&upg_aon_irq0_intc>;
191 reg = <0x409400 0x58>;
192 interrupts = <28>;
193 interrupt-names = "upg_bscb";
194 status = "disabled";
195 };
196
197 bscc: i2c@406200 {
198 clock-frequency = <390000>;
199 compatible = "brcm,brcmstb-i2c";
200 interrupt-parent = <&upg_irq0_intc>;
201 reg = <0x406200 0x58>;
202 interrupts = <24>;
203 interrupt-names = "upg_bscc";
204 status = "disabled";
205 };
206
207 bscd: i2c@406280 {
208 clock-frequency = <390000>;
209 compatible = "brcm,brcmstb-i2c";
210 interrupt-parent = <&upg_irq0_intc>;
211 reg = <0x406280 0x58>;
212 interrupts = <25>;
213 interrupt-names = "upg_bscd";
214 status = "disabled";
215 };
216
217 bsce: i2c@409180 {
218 clock-frequency = <390000>;
219 compatible = "brcm,brcmstb-i2c";
220 interrupt-parent = <&upg_aon_irq0_intc>;
221 reg = <0x409180 0x58>;
222 interrupts = <27>;
223 interrupt-names = "upg_bsce";
224 status = "disabled";
225 };
226
137 enet0: ethernet@b80000 { 227 enet0: ethernet@b80000 {
138 phy-mode = "internal"; 228 phy-mode = "internal";
139 phy-handle = <&phy1>; 229 phy-handle = <&phy1>;
@@ -236,5 +326,45 @@
236 interrupts = <78>; 326 interrupts = <78>;
237 status = "disabled"; 327 status = "disabled";
238 }; 328 };
329
330 sata: sata@181000 {
331 compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
332 reg-names = "ahci", "top-ctrl";
333 reg = <0x181000 0xa9c>, <0x180020 0x1c>;
334 interrupt-parent = <&periph_intc>;
335 interrupts = <45>;
336 #address-cells = <1>;
337 #size-cells = <0>;
338 status = "disabled";
339
340 sata0: sata-port@0 {
341 reg = <0>;
342 phys = <&sata_phy0>;
343 };
344
345 sata1: sata-port@1 {
346 reg = <1>;
347 phys = <&sata_phy1>;
348 };
349 };
350
351 sata_phy: sata-phy@180100 {
352 compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
353 reg = <0x180100 0x0eff>;
354 reg-names = "phy";
355 #address-cells = <1>;
356 #size-cells = <0>;
357 status = "disabled";
358
359 sata_phy0: sata-phy@0 {
360 reg = <0>;
361 #phy-cells = <0>;
362 };
363
364 sata_phy1: sata-phy@1 {
365 reg = <1>;
366 #phy-cells = <0>;
367 };
368 };
239 }; 369 };
240}; 370};
diff --git a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
index e046b1109eab..f2449d147c6d 100644
--- a/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97125cbmb.dts
@@ -21,6 +21,30 @@
21 status = "okay"; 21 status = "okay";
22}; 22};
23 23
24&uart1 {
25 status = "okay";
26};
27
28&uart2 {
29 status = "okay";
30};
31
32&bsca {
33 status = "okay";
34};
35
36&bscb {
37 status = "okay";
38};
39
40&bscc {
41 status = "okay";
42};
43
44&bscd {
45 status = "okay";
46};
47
24/* FIXME: USB is wonky; disable it for now */ 48/* FIXME: USB is wonky; disable it for now */
25&ehci0 { 49&ehci0 {
26 status = "disabled"; 50 status = "disabled";
diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
index d48462e091f1..73124be9548a 100644
--- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
@@ -56,3 +56,11 @@
56&ohci0 { 56&ohci0 {
57 status = "okay"; 57 status = "okay";
58}; 58};
59
60&sata {
61 status = "okay";
62};
63
64&sata_phy {
65 status = "okay";
66};
diff --git a/arch/mips/boot/dts/brcm/bcm97420c.dts b/arch/mips/boot/dts/brcm/bcm97420c.dts
index 67fe1f3a3891..600d57abee05 100644
--- a/arch/mips/boot/dts/brcm/bcm97420c.dts
+++ b/arch/mips/boot/dts/brcm/bcm97420c.dts
@@ -23,6 +23,34 @@
23 status = "okay"; 23 status = "okay";
24}; 24};
25 25
26&uart1 {
27 status = "okay";
28};
29
30&uart2 {
31 status = "okay";
32};
33
34&bsca {
35 status = "okay";
36};
37
38&bscb {
39 status = "okay";
40};
41
42&bscc {
43 status = "okay";
44};
45
46&bscd {
47 status = "okay";
48};
49
50&bsce {
51 status = "okay";
52};
53
26/* FIXME: MAC driver comes up but cannot attach to PHY */ 54/* FIXME: MAC driver comes up but cannot attach to PHY */
27&enet0 { 55&enet0 {
28 status = "disabled"; 56 status = "disabled";
diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
index 689c68a4f9c8..119c714805cb 100644
--- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
@@ -23,6 +23,34 @@
23 status = "okay"; 23 status = "okay";
24}; 24};
25 25
26&uart1 {
27 status = "okay";
28};
29
30&uart2 {
31 status = "okay";
32};
33
34&bsca {
35 status = "okay";
36};
37
38&bscb {
39 status = "okay";
40};
41
42&bscc {
43 status = "okay";
44};
45
46&bscd {
47 status = "okay";
48};
49
50&bsce {
51 status = "okay";
52};
53
26&enet0 { 54&enet0 {
27 status = "okay"; 55 status = "okay";
28}; 56};
diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
index 68f486eba3f7..43e3ba27f07b 100644
--- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
@@ -23,6 +23,34 @@
23 status = "okay"; 23 status = "okay";
24}; 24};
25 25
26&uart1 {
27 status = "okay";
28};
29
30&uart2 {
31 status = "okay";
32};
33
34&bsca {
35 status = "okay";
36};
37
38&bscb {
39 status = "okay";
40};
41
42&bscc {
43 status = "okay";
44};
45
46&bscd {
47 status = "okay";
48};
49
50&bsce {
51 status = "okay";
52};
53
26&enet0 { 54&enet0 {
27 status = "okay"; 55 status = "okay";
28}; 56};
@@ -58,3 +86,11 @@
58&ohci3 { 86&ohci3 {
59 status = "okay"; 87 status = "okay";
60}; 88};
89
90&sata {
91 status = "okay";
92};
93
94&sata_phy {
95 status = "okay";
96};
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-03 13:55:35 -0400